MTT 1222

1 2 3 4 5 6 7 8
MTT Chief River Block Diagram 01

A A
USB-11
LCD/CCD Con. P28
EXT_LVDS
DDRIII-SODIMM1
DDRIII-SODIMM2 Ivy Bridge(UMA+VGA) VGA EXT_CRT
P13,14
PCI-E x16 Thames_M2 CRT Con. P28
DDR SYSTEM MEMORY

PCI-E
Dual Channel DDR III P15,16,17,18,19,20,21,22,25 EXT_HDMI
HDMI Level Shift
P27 HDMI Con. P27
rPGA 989
P3,4, 5, 6,
VRAM DDR3-64M*16
SATA - HDD VRAM DDR3-128M*16
P33
FDI
DMI
DMI(x4)
SATA - ODD
P33 SATA 0
FDI USB-11
DMI INT_LVDS LCD/CCD Con. P28
SATA 4 PCI-E
B B
SATA
Graphics Interfaces
INT_CRT
CRT Con. P28
INT_HDMI HDMI Level Shift

USB-3 P27 HDMI Con. P27
SIM CARD.
P29 PantherPoint
PCIE-1
USB-8
Card Reader Con. USB
USB-2 3G
P36 PCH P29
P7,8, 9, 10, 11,12
USB 2.0 LD Con. USB-9 PCIE-3
P32
USB-10 WLAN
RTC
P29
BATTERY PCIE-4
C
Giga/10/100 Lan C
P8 P35
PCI-E
PCIE-2
Azalia IHDA USB3.0 Controller
NVRAM P30 USB-0
USB 3.0 Right Con.
LPC P31
USB3.0 Level Shift

LPC P32 USB-1
USB 3.0 LU Con.
P32
Audio Codec EC
P34 P37
POWER SYSTEM
Charger (ISL88731C) P40
System 5V/3V (TPS51123A) P41
FAN K/B Con. HALL Sensor SPI Flash Touch Pad /B Power /B P42
Con. Con. DDR1.5V (TPS51216)
MIC JACK HP SPK Con. P43
P34 P34 P34 P3 P38 P28 P8 P38 P38
VTT (RT8240BGQW)
+VCCSA (TI51461) P44
D D
+VCORE+VGFX (ISL95836) P45

+1.8V (G966A) P46
AMD_GPU (ISL95870A) P47
Quanta Computer Inc.

PROJECT : MTT
Size Document Number Rev
A1A
Block Diagram
Date: Saturday, December 22, 2012 Sheet 1 of 49
1 2 3 4 5 6 7 8
5 4 3 2 1
AO6402A
low switch +5V MAIND enable
02
+5V_S5 (Peak 5.774A ,AVG 4.042A)
AC/DC Insert enable
(Peak 12.85A ,AVG 9A) TPS51461 +VCCSA HWPG_VTT enable
D AC OCP 15A
PWM D
System SYSTEM POWER (Peak 6A ,AVG 4.2A)

Charger RT8223
ISL88731C PWM
DC
AON7406
PWM low switch +3V MAIND enable
+3V_S5
AC/DC Insert enable (Peak 6.816A ,AVG 4.771A)
(Peak 13.47A ,AVG 9.43A) OCP 15A G9661-25ADJ

LDO +1.8V MAINON enable
(Peak 1.242A ,AVG 0.869A)
+SMDDR_VTERM
SUSON enable
TPS51216 +SMDDR_VTERM
C PWM SUSON enable C
AO6402A
+1.5VSUS +1.5V MAIND enable
SUSON enable low switch
CONTROL Power States
(Peak 17.81A ,AVG 12.46A) OCP 20A (Peak 0.67A ,AVG 0.453A) POWER PLANE VOLTAGE SIGNAL ACTIVE IN
VIN 10V~+19V S0~S5
+VCCRTC +3.0V~+3.3V S0~S5
+3V +3.3V MAIN_ON S0

RT8240 +VTT +1.05V
PWM MAINON enable +3V_S5 +3.3V S5_ON S0~S5
(Peak 18.05A ,AVG 12.63A) OCP 20A
+3V_HDP +3.3V MAIN_ON S0
+3VPCU +3.3V AC/DC Insert enable S0
B
+VCC_CORE +5V +5V MAIN_ON S0
B
VRON enable
ISL95836HRZ-T (Peak 33A ,AVG 33A)
+5V_S5 +5V S5_ON S0~S5
PWM
+VAXG +5VPCU +5V AC/DC Insert enable S0~S5
VRON enable WIMAX_P +3.3V WMAX_P for WLAN
(Peak 33A ,AVG 23.1A)
+1.8V +1.8V MAIN_ON S0
+1.5V +1.5V MAIN_ON S0
+1.5V_SUS +1.5V SUSON S0~S3
+VCC_CORE VRON S0
+VTT +1.05V MAIN_ON S0
+1.05V +1.05V MAIN_ON S0
+VAXG MPWROK S0
A A

PROJECT : MTT
A1A
POWER TREE TABLE
5 4 3 2 1
www.vinafix.vn
5 4 3 2 1
Ivy Bridge Processor (DMI,PEG,FDI) CPU/VGA Ivy Bridge Processor (CLK,MISC,JTAG)CPU
{7}
{7}
DMI_TXN0
DMI_TXN1
M2
P6
P1
U1001A
DMI_RX#[0]
DMI_RX#[1]
PEG_ICOMPI
PEG_ICOMPO
PEG_RCOMPO
G3
G1
G4
PEG_COMP
U1001B
R123
03
{7} DMI_TXN2 P10 DMI_RX#[2] H22 J3 CLK_CPU_BCLKP_R 2 1
{7} DMI_TXN3 DMI_RX#[3] PEG_RX#[0] BCLK CLK_CPU_BCLKP {9}
J21 For MTT UMA Del H2 CLK_CPU_BCLKN_R 4 3
CLK_CPU_BCLKN {9}
CLOCKS
PEG_RX#[1] BCLK#
MISC
N3 B22
{7} DMI_TXP0 P7 DMI_RX[0] PEG_RX#[2] D21 F49
{7} DMI_TXP1 DMI_RX[1] PEG_RX#[3] {8} H_SNB_IVB# PROC_SELECT# 0X2
DMI
P3 A19 AG3 CLK_DPLL_SSCLKP_R R78 1K_4
{7} DMI_TXP2 P11 DMI_RX[2] PEG_RX#[4] D17 DPLL_REF_CLK AG1 CLK_DPLL_SSCLKN_R R84 1K_4 +VTT
{7} DMI_TXP3 DMI_RX[3] PEG_RX#[5] B14 SKTOCC# C57 DPLL_REF_CLK#
K1 PEG_RX#[6] D13 TP1 PROC_DETECT#
D {7} DMI_RXN0 M8 DMI_TX#[0] PEG_RX#[7] A11 N59 CLK_XDP_ITPP D
{7} DMI_RXN1 N4 DMI_TX#[1] PEG_RX#[8] B10 BCLK_ITP N58 CLK_XDP_ITPN TP87 REV-A1A for XDP debug port
{7} DMI_RXN2 R2 DMI_TX#[2] PEG_RX#[9] G8 BCLK_ITP# TP48
C5579
{7} DMI_RXN3 DMI_TX#[3] PEG_RX#[10] A8 TP_CATERR# C49
PEG_RX#[11] *10P/50V_4C TP2 CATERR#
K3 B6
{7} DMI_RXP0 DMI_TX[0] PEG_RX#[12]
THERMAL
M7 H8
{7} DMI_RXP1 P4 DMI_TX[1] PEG_RX#[13] E5
{7} DMI_RXP2 T3 DMI_TX[2] PEG_RX#[14] K7 A48 AT30
{7} DMI_RXP3 DMI_TX[3] PEG_RX#[15] {37} EC_PECI PECI SM_DRAMRST# CPU_DRAMRST# {26}
K22
PEG_RX[0] K19 BF44 SM_RCOMP_0 R1007 140/F_4
PEG_RX[1] C21 H_PROCHOT# R1006 56_4 H_PROCHOT#_R C45 SM_RCOMP[0] BE43 SM_RCOMP_1 R1008 25.5/F_4 C5602 C5603
{45} H_PROCHOT#
DDR3
MISC
U7 PEG_RX[2] D19 PROCHOT# SM_RCOMP[1] BG43 SM_RCOMP_2 R1009 200/F_4
{7} FDI_TXN0 FDI0_TX#[0] PEG_RX[3] SM_RCOMP[2] 39P/50V_4N 0.1U/10V_4X
W11 C19
{7} FDI_TXN1 W1 FDI0_TX#[1] PEG_RX[4] D16
PCI EXPRESS -- GRAPHICS

{7} FDI_TXN2 AA6 FDI0_TX#[2] PEG_RX[5] C13 PM_THRMTRIP#_R D45
{7} FDI_TXN3 W6 FDI0_TX#[3] PEG_RX[6] D12 THERMTRIP#
{7} FDI_TXN4 V4 FDI1_TX#[0] PEG_RX[7] C11
{7} FDI_TXN5 Y2 FDI1_TX#[1] PEG_RX[8] C9 N53 XDP_PRDY#_R TP3
{7} FDI_TXN6 FDI1_TX#[2] PEG_RX[9] PRDY#
Intel(R) FDI
AC9 F8 N55 XDP_PREQ# TP4
{7} FDI_TXN7 FDI1_TX#[3] PEG_RX[10] C8 PREQ#
PEG_RX[11] C5 L56 XDP_TCLK
U6 PEG_RX[12] H6 TCK L55 XDP_TMS
{7} FDI_TXP0 FDI0_TX[0] PEG_RX[13] TMS
PWR MANAGEMENT
W10 F6 J58 XDP_TRST#
{7} FDI_TXP1
JTAG & BPM

W3 FDI0_TX[1] PEG_RX[14] K6 TRST#
{7} FDI_TXP2 AA7 FDI0_TX[2] PEG_RX[15] C48 M60 XDP_TDI_R
{7} PM_SYNC TP5
{7} FDI_TXP3 W7 FDI0_TX[3] G22 PM_SYNC TDI L59 XDP_TDO_R TP6
{7} FDI_TXP4 T4 FDI1_TX[0] PEG_TX#[0] C23 TDO
C5590 *39P/50V_4N
{7} FDI_TXP5 AA3 FDI1_TX[1] PEG_TX#[1] D23
{7} FDI_TXP6 AC8 FDI1_TX[2] PEG_TX#[2] F21 B46
{7} FDI_TXP7 FDI1_TX[3] PEG_TX#[3] {10} H_PWRGOOD UNCOREPWRGOOD
H19 K58 XDP_DBR#_R R1013 *SHORT_4
PEG_TX#[4] DBR# XDP_DBRST# {7}
AA11 C17 R1012 10K_4
{7} FDI_FSYNC0 AC12 FDI0_FSYNC PEG_TX#[5] K15
{7} FDI_FSYNC1 FDI1_FSYNC PEG_TX#[6] F17 BE45 G58 XDP_OBS0
{26} PM_DRAM_PWRGD_R TP7
U11 PEG_TX#[7] F14 SM_DRAMPWROK BPM#[0] E55 XDP_OBS1 TP8
{7} FDI_INT FDI_INT PEG_TX#[8] A15 BPM#[1] E59 XDP_OBS2
C
TP9 C
AA10 PEG_TX#[9] J14 R1014 *75/F_4 BPM#[2] G55 XDP_OBS3 TP10
{7} FDI_LSYNC0 FDI0_LSYNC PEG_TX#[10] +VTT BPM#[3]
AG8 H13 G59 XDP_OBS4 TP11
{7} FDI_LSYNC1 FDI1_LSYNC PEG_TX#[11] M10 CPU_PLTRST# CPU_PLTRST#_R D44 BPM#[4] H60 XDP_OBS5
R1015 *43_4 TP12
PEG_TX#[12] F10 RESET# BPM#[5] J59 XDP_OBS6 TP13
PEG_TX#[13] D9 BPM#[6] J61 XDP_OBS7 TP14
PEG_TX#[14] J4 BPM#[7]
AF3 PEG_TX#[15] C5595 C5577
eDP_COMP AD2 eDP_COMPIO F22
eDP_ICOMPO PEG_TX[0] 39P/50V_4N 0.1U/10V_4X
AG11 A23
eDP_HPD PEG_TX[1] D24
PEG_TX[2] E21
AG4 PEG_TX[3] G19 IC_SNB_2CBGA_1P0 CPU_PLTRST#_R C14632 *0.1U/10V_4X R9556 *10_4
AF4 eDP_AUX# PEG_TX[4] B18
eDP_AUX PEG_TX[5] K17 CPU_DRAMRST# C14633 *0.1U/10V_4X R9555 *10_4
PEG_TX[6]
DP
G17
AC3 PEG_TX[7] E14 H_PWRGOOD C14634 *0.1U/10V_4X R17078 *10_4
AC4 eDP_TX#[0] PEG_TX[8] C15
AE11 eDP_TX#[1] PEG_TX[9] K13 PM_THRMTRIP#_R C14635 *0.1U/10V_4X R17077 *10_4
AE7 eDP_TX#[2] PEG_TX[10] G13
eDP_TX#[3] PEG_TX[11] K10 XDP_DBR#_R C14636 *0.1U/10V_4X R17075 *10_4
AC1 PEG_TX[12] G10
AA4 eDP_TX[0] PEG_TX[13] D8 XDP_PREQ# C14637 *0.1U/10V_4X R17076 *10_4
AE10 eDP_TX[1] PEG_TX[14] K4
AE6 eDP_TX[2] PEG_TX[15]
eDP_TX[3]
Near chipset
IC_SNB_2CBGA_1P0
FDI Disabling (Discrete Only) DP & PEG CompensationCPU Processor pull-up CPU Level CPU Thermal Trip & Process HOT CPU Intel Turbo mode only CPU
+3V_S5
+VTT
OEV Shift C1033

+VTT
6
B U1002 *0.1U/10V_4X B
R1028 *OEV@1K_4 FDI_INT 1 5
R1016 24.9/F_4 eDP_COMP NC VCC 2
FDI_FSYNC0 +VTT 2 {7,45} DELAY_VR_PWRGOOD H_PROCHOT#
R1001 *OEV@1K_4 {9,29,35,36,37} PLTRST# Q1002A
IN
W=12mil; S=15mil; L<500mil
R1018 *OEV@1K_4 FDI_FSYNC1 3 4 CPU_PLTRST# 2N7002KDW_115MA
1
H_PROCHOT# R1017 62_4 GND OUT C5570
R1021 *OEV@1K_4 FDI_LSYNC0 *74LVC1G07GW R1020 100K_4 *47P/50V_4N
3
XDP_TMS R1019 51_4
R1023 *OEV@1K_4 FDI_LSYNC1 XDP_TDI_R R1022 51_4
+VTT XDP_TDO_R R1024 *51_4 R1027 H_PROCHOT_EC 5
XDP_TCLK CPU_PLTRST#_R {37} H_PROCHOT_EC
R1025 51_4 R1030 1.5K/F_4
XDP_TRST# R1026 51_4 1K_4 Q1002B
R1029 24.9/F_4 PEG_COMP R1031
4
Q1003 R9797 2N7002KDW_115MA
2
W=12mil; S=15mil; L<500mil 750/F_4 100K_4
METR3904-G_200MA
PM_THRMTRIP#_R 1 3
S5_ON {3,37,41}
PM_THRMTRIP# {10}
FAN Control-->For one FAN solution THC CPU Thermal sensor / MB Local
TEMP
Rset(Kohm)=0.0012T*T-0.9308T+96.147
+3V
R1038 *EV@29.4K/F_4
U1004
R1032 R1036 150_4 +3VPCU_HW_SD 5 1 R1037 29.4K/F_4
+3VPCU VCC SET
*10K_4 C1035 2
+5V CN1001 GND
A U1003 {37} FANSIG1 FANSIG1 0.1U/16V_4Y A
C1034 2.2U/6.3V_4X 2 3 TH_FAN_POWER1 4 3
VIN VO 1 HYST OT# S5_ON {3,37,41}
5
GND 2
1
/FON GND
6
3 HYST=VCC for 10 G708T1U
7
4 GND 8
degree Hys. R1039 *470K_4 D2013 *1SS355_100MA +3VPCU
C1036
{37} VFAN1 VSET GND HYST=GND for 30
G991P11U 2.2U/6.3V_4X 50273-0030N-001 degree Hys.

PROJECT :MTT
Ivy Bridge 1/4 A1A

5 4 3 2 1
5 4 3 2 1
<CPU>
Ivy/Sandy Bridge Processor (DDR3) 04
U1001C U1001D
{14} M_B_DQ[63:0]
{13} M_A_DQ[63:0] M_A_DQ0 AG6 M_B_DQ0 AL4
M_A_DQ1 AJ6 SA_DQ[0] AU36 M_B_DQ1 AL1 SB_DQ[0] BA34
SA_DQ[1] SA_CLK[0] M_A_CLKP0 {13} SB_DQ[1] SB_CLK[0] M_B_CLKP0 {14}
M_A_DQ2 AP11 AV36 M_B_DQ2 AN3 AY34
D SA_DQ[2] SA_CLK#[0] M_A_CLKN0 {13} SB_DQ[2] SB_CLK#[0] M_B_CLKN0 {14} D
M_A_DQ3 AL6 AY26 M_B_DQ3 AR4 AR22
SA_DQ[3] SA_CKE[0] M_A_CKE0 {13} SB_DQ[3] SB_CKE[0] M_B_CKE0 {14}
M_A_DQ4 AJ10 M_B_DQ4 AK4
M_A_DQ5 AJ8 SA_DQ[4] M_B_DQ5 AK3 SB_DQ[4]
M_A_DQ6 AL8 SA_DQ[5] M_B_DQ6 AN4 SB_DQ[5]
M_A_DQ7 AL7 SA_DQ[6] M_B_DQ7 AR1 SB_DQ[6]
M_A_DQ8 AR11 SA_DQ[7] M_B_DQ8 AU4 SB_DQ[7]
M_A_DQ9 AP6 SA_DQ[8] AT40 M_B_DQ9 AT2 SB_DQ[8] BA36
SA_DQ[9] SA_CLK[1] M_A_CLKP1 {13} SB_DQ[9] SB_CLK[1] M_B_CLKP1 {14}
M_A_DQ10 AU6 AU40 M_B_DQ10 AV4 BB36
SA_DQ[10] SA_CLK#[1] M_A_CLKN1 {13} SB_DQ[10] SB_CLK#[1] M_B_CLKN1 {14}
M_A_DQ11 AV9 BB26 M_B_DQ11 BA4 BF27
SA_DQ[11] SA_CKE[1] M_A_CKE1 {13} SB_DQ[11] SB_CKE[1] M_B_CKE1 {14}
M_A_DQ12 AR6 M_B_DQ12 AU3
M_A_DQ13 AP8 SA_DQ[12] M_B_DQ13 AR3 SB_DQ[12]
M_A_DQ14 AT13 SA_DQ[13] M_B_DQ14 AY2 SB_DQ[13]
M_A_DQ15 AU13 SA_DQ[14] M_B_DQ15 BA3 SB_DQ[14]
M_A_DQ16 BC7 SA_DQ[15] M_B_DQ16 BE9 SB_DQ[15]
M_A_DQ17 BB7 SA_DQ[16] BB40 M_B_DQ17 BD9 SB_DQ[16] BE41
SA_DQ[17] SA_CS#[0] M_A_CS#0 {13} SB_DQ[17] SB_CS#[0] M_B_CS#0 {14}
M_A_DQ18 BA13 BC41
M_A_CS#1 {13} M_B_DQ18 BD13 BE47
M_B_CS#1 {14}
M_A_DQ19 BB11 SA_DQ[18] SA_CS#[1] M_B_DQ19 BF12 SB_DQ[18] SB_CS#[1]
M_A_DQ20 BA7 SA_DQ[19] M_B_DQ20 BF8 SB_DQ[19]
M_A_DQ21 BA9 SA_DQ[20] M_B_DQ21 BD10 SB_DQ[20]
M_A_DQ22 BB9 SA_DQ[21] M_B_DQ22 BD14 SB_DQ[21]
M_A_DQ23 AY13 SA_DQ[22] M_B_DQ23 BE13 SB_DQ[22]
M_A_DQ24 AV14 SA_DQ[23] AY40 M_B_DQ24 BF16 SB_DQ[23] AT43
SA_DQ[24] SA_ODT[0] M_A_ODT0 {13} SB_DQ[24] SB_ODT[0] M_B_ODT0 {14}
M_A_DQ25 AR14 BA41 M_B_DQ25 BE17 BG47
SA_DQ[25] SA_ODT[1] M_A_ODT1 {13} SB_DQ[25] SB_ODT[1] M_B_ODT1 {14}
M_A_DQ26 AY17 M_B_DQ26 BE18
M_A_DQ27 AR19 SA_DQ[26] M_B_DQ27 BE21 SB_DQ[26]
M_A_DQ28 BA14 SA_DQ[27] M_B_DQ28 BE14 SB_DQ[27]
M_A_DQ29 AU14 SA_DQ[28] M_B_DQ29 BG14 SB_DQ[28]
M_A_DQ30 BB14 SA_DQ[29] M_B_DQ30 BG18 SB_DQ[29]
M_A_DQ31 BB17 SA_DQ[30] AL11 M_A_DQSN0 M_A_DQSN[7:0] {13} M_B_DQ31 BF19 SB_DQ[30] AL3 M_B_DQSN0 M_B_DQSN[7:0] {14}
M_A_DQ32 BA45 SA_DQ[31] SA_DQS#[0] AR8 M_A_DQSN1 M_B_DQ32 BD50 SB_DQ[31] SB_DQS#[0] AV3 M_B_DQSN1
M_A_DQ33 AR43 SA_DQ[32] SA_DQS#[1] AV11 M_A_DQSN2 M_B_DQ33 BF48 SB_DQ[32] SB_DQS#[1] BG11 M_B_DQSN2
M_A_DQ34 AW48 SA_DQ[33] SA_DQS#[2] AT17 M_A_DQSN3 M_B_DQ34 BD53 SB_DQ[33] SB_DQS#[2] BD17 M_B_DQSN3
C M_A_DQ35 BC48 SA_DQ[34] SA_DQS#[3] AV45 M_A_DQSN4 M_B_DQ35 BF52 SB_DQ[34] SB_DQS#[3] BG51 M_B_DQSN4 C
DDR SYSTEM MEMORY A
DDR SYSTEM MEMORY B

M_A_DQ36 BC45 SA_DQ[35] SA_DQS#[4] AY51 M_A_DQSN5 M_B_DQ36 BD49 SB_DQ[35] SB_DQS#[4] BA59 M_B_DQSN5
M_A_DQ37 AR45 SA_DQ[36] SA_DQS#[5] AT55 M_A_DQSN6 M_B_DQ37 BE49 SB_DQ[36] SB_DQS#[5] AT60 M_B_DQSN6
M_A_DQ38 AT48 SA_DQ[37] SA_DQS#[6] AK55 M_A_DQSN7 M_B_DQ38 BD54 SB_DQ[37] SB_DQS#[6] AK59 M_B_DQSN7
M_A_DQ39 AY48 SA_DQ[38] SA_DQS#[7] M_B_DQ39 BE53 SB_DQ[38] SB_DQS#[7]
M_A_DQ40 BA49 SA_DQ[39] M_B_DQ40 BF56 SB_DQ[39]
M_A_DQ41 AV49 SA_DQ[40] M_B_DQ41 BE57 SB_DQ[40]
M_A_DQ42 BB51 SA_DQ[41] M_B_DQ42 BC59 SB_DQ[41]
M_A_DQ43 AY53 SA_DQ[42] M_B_DQ43 AY60 SB_DQ[42]
M_A_DQ44 BB49 SA_DQ[43] M_B_DQ44 BE54 SB_DQ[43]
M_A_DQ45 AU49 SA_DQ[44] AJ11 M_A_DQSP0 M_A_DQSP[7:0] {13} M_B_DQ45 BG54 SB_DQ[44]
SA_DQ[45] SA_DQS[0] SB_DQ[45] M_B_DQSP[7:0] {14}
M_A_DQ46 BA53 AR10 M_A_DQSP1 M_B_DQ46 BA58 AM2 M_B_DQSP0
M_A_DQ47 BB55 SA_DQ[46] SA_DQS[1] AY11 M_A_DQSP2 M_B_DQ47 AW59 SB_DQ[46] SB_DQS[0] AV1 M_B_DQSP1
M_A_DQ48 BA55 SA_DQ[47] SA_DQS[2] AU17 M_A_DQSP3 M_B_DQ48 AW58 SB_DQ[47] SB_DQS[1] BE11 M_B_DQSP2
M_A_DQ49 AV56 SA_DQ[48] SA_DQS[3] AW45 M_A_DQSP4 M_B_DQ49 AU58 SB_DQ[48] SB_DQS[2] BD18 M_B_DQSP3
M_A_DQ50 AP50 SA_DQ[49] SA_DQS[4] AV51 M_A_DQSP5 M_B_DQ50 AN61 SB_DQ[49] SB_DQS[3] BE51 M_B_DQSP4
M_A_DQ51 AP53 SA_DQ[50] SA_DQS[5] AT56 M_A_DQSP6 M_B_DQ51 AN59 SB_DQ[50] SB_DQS[4] BA61 M_B_DQSP5
M_A_DQ52 AV54 SA_DQ[51] SA_DQS[6] AK54 M_A_DQSP7 M_B_DQ52 AU59 SB_DQ[51] SB_DQS[5] AR59 M_B_DQSP6
M_A_DQ53 AT54 SA_DQ[52] SA_DQS[7] M_B_DQ53 AU61 SB_DQ[52] SB_DQS[6] AK61 M_B_DQSP7
M_A_DQ54 AP56 SA_DQ[53] M_B_DQ54 AN58 SB_DQ[53] SB_DQS[7]
M_A_DQ55 AP52 SA_DQ[54] M_B_DQ55 AR58 SB_DQ[54]
M_A_DQ56 AN57 SA_DQ[55] M_B_DQ56 AK58 SB_DQ[55]
M_A_DQ57 AN53 SA_DQ[56] M_B_DQ57 AL58 SB_DQ[56]
M_A_DQ58 AG56 SA_DQ[57] M_B_DQ58 AG58 SB_DQ[57]
M_A_DQ59 AG53 SA_DQ[58] M_B_DQ59 AG59 SB_DQ[58]
M_A_DQ60 AN55 SA_DQ[59] M_B_DQ60 AM60 SB_DQ[59]
SA_DQ[60] M_A_A[15:0] {13} SB_DQ[60] M_B_A[15:0] {14}
M_A_DQ61 AN52 BG35 M_A_A0 M_B_DQ61 AL59 BF32 M_B_A0
M_A_DQ62 AG55 SA_DQ[61] SA_MA[0] BB34 M_A_A1 M_B_DQ62 AF61 SB_DQ[61] SB_MA[0] BE33 M_B_A1
M_A_DQ63 AK56 SA_DQ[62] SA_MA[1] BE35 M_A_A2 M_B_DQ63 AH60 SB_DQ[62] SB_MA[1] BD33 M_B_A2
SA_DQ[63] SA_MA[2] BD35 M_A_A3 SB_DQ[63] SB_MA[2] AU30 M_B_A3
SA_MA[3] AT34 M_A_A4 SB_MA[3] BD30 M_B_A4
SA_MA[4] AU34 M_A_A5 SB_MA[4] AV30 M_B_A5
B SA_MA[5] BB32 M_A_A6 SB_MA[5] BG30 M_B_A6 B
BD37 SA_MA[6] AT32 M_A_A7 BG39 SB_MA[6] BD29 M_B_A7
{13} M_A_BS#0 SA_BS[0] SA_MA[7] {14} M_B_BS#0 SB_BS[0] SB_MA[7]
BF36 AY32 M_A_A8 BD42 BE30 M_B_A8
BA28 AV32 M_A_A9 AT22 BE28 M_B_A9
BE37 M_A_A10 BD43 M_B_A10
SA_MA[10] BA30 M_A_A11 SB_MA[10] AT28 M_B_A11
SA_MA[11] BC30 M_A_A12 SB_MA[11] AV28 M_B_A12
BE39 SA_MA[12] AW41 M_A_A13 AV43 SB_MA[12] BD46 M_B_A13
{13} M_A_CAS# SA_CAS# SA_MA[13] {14} M_B_CAS# SB_CAS# SB_MA[13]
BD39 AY28 M_A_A14 BF40 AT26 M_B_A14
{13} M_A_RAS# SA_RAS# SA_MA[14] {14} M_B_RAS# SB_RAS# SB_MA[14]
AT41 AU26 M_A_A15 BD45 AU22 M_B_A15
{13} M_A_WE# SA_WE# SA_MA[15] {14} M_B_WE# SB_WE# SB_MA[15]
IC_SNB_2CBGA_1P0 IC_SNB_2CBGA_1P0
A A

PROJECT : MTT
Ivy Bridge 2/4 A1A

5 4 3 2 1
5 4 3 2 1
<CPU> Ivy/Sandy Bridge Processor (POWER)
U1001F
Ivy/Sandy Bridge Processor (GRAPHIC POWER)
U1001G
05
+VTT
+VCC_CORE AA46
+VAXG VAXG[1]
AF46 AB47
VCCIO[1] AG48 AB50 VAXG[2]
VCCIO[3] AG50 AB51 VAXG[3] AY43 +VDDR_REF_CPU
VCCIO[4] VAXG[4] SM_VREF +VDDR_REF_CPU
A26 AG51 AB52
A29 VCC[1] VCCIO[5] AJ17 AB53 VAXG[5]
VCC[2] VCCIO[6] VAXG[6]
W=20mil ; S=20 mil; L<500mil
A31 AJ21 AB55
D D
A38 VCC[5] VCCIO[9] AJ47 C384 C185 C385 C169 C193 C184 AB59 VAXG[9] AJ28
VCC[6] VCCIO[10] VAXG[10] VDDQ[1] +1.5V_CPU
A39 AK50 10U/6.3V_6X *10U/6.3V_6X 10U/6.3V_6X 10U/6.3V_6X 10U/6.3V_6X 10U/6.3V_6X AC61 AJ33
A42 VCC[7] VCCIO[11] AK51 AD47 VAXG[11] VDDQ[2] AJ36
C26 VCC[8] VCCIO[12] AL14 AD48 VAXG[12] VDDQ[3] AJ40 C186 C170 C182 C181
C27 VCC[9] VCCIO[13] AL15 AD50 VAXG[13] VDDQ[4] AL30 10U/6.3V_6X 10U/6.3V_6X 10U/6.3V_6X 10U/6.3V_6X
VCC[10] VCCIO[14] VAXG[14] VDDQ[5]
- 1.5V RAILS
C32 AL16 C155 C161 C187 C167 AD51 AL34
C34 VCC[11] VCCIO[15] AL20 10U/6.3V_6X 10U/6.3V_6X 10U/6.3V_6X 10U/6.3V_6X AD52 VAXG[15] VDDQ[6] AL38
C37 VCC[12] VCCIO[16] AL22 AD53 VAXG[16] VDDQ[7] AL42
C156 C149 C333 C158 C358 C150 C360 C39 VCC[13] VCCIO[17] AL26 AD55 VAXG[17] VDDQ[8] AM33
10U/6.3V_6X 10U/6.3V_6X 10U/6.3V_6X 10U/6.3V_6X 10U/6.3V_6X 10U/6.3V_6X 10U/6.3V_6X C42 VCC[14] VCCIO[18] AL45 C177 C188 C176 C175 AD56 VAXG[18] VDDQ[9] AM36
D27 VCC[15] VCCIO[19] AL48 10U/6.3V_6X 10U/6.3V_6X 10U/6.3V_6X 10U/6.3V_6X AD58 VAXG[19] VDDQ[10] AM40
D32 VCC[16] VCCIO[20] AM16 AD59 VAXG[20] VDDQ[11] AN30 C189 C168
D34 VCC[17] VCCIO[21] AM17 AE46 VAXG[21] VDDQ[12] AN34 10U/6.3V_6X 10U/6.3V_6X
D37 VCC[18] VCCIO[22] AM21 C180 C152 C178 C166 N45 VAXG[22] VDDQ[13] AN38
POWER
D39 VCC[19] VCCIO[23] AM43 10U/6.3V_6X 10U/6.3V_6X 10U/6.3V_6X 10U/6.3V_6X P47 VAXG[23] VDDQ[14] AR26
D42 VCC[20] VCCIO[24] AM47 P48 VAXG[24] VDDQ[15] AR28
C163 C341 C148 C359 C164 C157 C162 E26 VCC[21] VCCIO[25] AN20 P50 VAXG[25] VDDQ[16] AR30
10U/6.3V_6X 10U/6.3V_6X 10U/6.3V_6X 10U/6.3V_6X 10U/6.3V_6X 10U/6.3V_6X 10U/6.3V_6X E28 VCC[22] VCCIO[26] AN42 P51 VAXG[26] VDDQ[17] AR32
E32 VCC[23] VCCIO[27] AN45 P52 VAXG[27] VDDQ[18] AR34
DDR3
E34 VCC[24] VCCIO[28] AN48 P53 VAXG[28] VDDQ[19] AR36
E37 VCC[25] VCCIO[29] P55 VAXG[29] VDDQ[20] AR40
E38 VCC[26] P56 VAXG[30] VDDQ[21] AV41
VCC[27] VAXG[31] VDDQ[22]
CORE SUPPLY
F25 P61 AW26
F26 VCC[28] T48 VAXG[32] VDDQ[23] BA40
PEG AND DDR

VCC[29] VAXG[33] VDDQ[24]
GRAPHICS
F28 T58 BB28
F32 VCC[30] T59 VAXG[34] VDDQ[25] BG33
F34 VCC[31] T61 VAXG[35] VDDQ[26]
C342 C340 C332 C357 C339 F37 VCC[32] AA14 U46 VAXG[36]
10U/6.3V_6X 10U/6.3V_6X 10U/6.3V_6X 10U/6.3V_6X 10U/6.3V_6X F38 VCC[33] VCCIO[30] AA15 V47 VAXG[37]
F42 VCC[34] VCCIO[31] AB17 V48 VAXG[38]
G42 VCC[35] VCCIO[32] AB20 V50 VAXG[39]
H25 VCC[36] VCCIO[33] AC13 V51 VAXG[40]
H26 VCC[37] VCCIO[34] AD16 V52 VAXG[41]
H32 VCC[40] VCCIO[37] AE14 V56 VAXG[44]
H34 VCC[41] VCCIO[38] AE15 V58 VAXG[45]
H35 VCC[42] VCCIO[39] AF16 V59 VAXG[46]
H37 VCC[43] VCCIO[40] AF18 W50 VAXG[47]
H38 VCC[44] VCCIO[41] AF20 W51 VAXG[48]
H40 VCC[45] VCCIO[42] AG15 W52 VAXG[49]
J25 VCC[46] VCCIO[43] AG16 W53 VAXG[50]
C J29 VCC[49] VCCIO[46] AG21 W61 VAXG[53] C
J32 VCC[50] VCCIO[47] AJ14 Y48 VAXG[54]
VCC[51] VCCIO[48] VAXG[55]
POWER
J34 AJ15 Y61
J35 VCC[52] VCCIO[49] VAXG[56]
J37 VCC[53]
J38 VCC[54]
J40 VCC[55]
J42 VCC[56]
QUIET RAILS
K26 VCC[57] W16 100/F_4 R207 AM28
VCC[58] VCCIO50 +VAXG VCCDQ[1]
LINES
SENSE
K27 W17 +VTT {45} VCC_AXG_SENSE R203 0_4 VCC_AXG_SENSE_RR F45 AN26 +1.5VSUS
K29 VCC[59] VCCIO51 R202 0_4 VSS_AXG_SENSE_RR G45 VAXG_SENSE VCCDQ[2]
VCC[60] {45} VSS_AXG_SENSE VSSAXG_SENSE
K32 100/F_4 R206
K34 VCC[61] C192
K35 VCC[62] 1U/6.3V_4X
K37 VCC[63]
VCC[64]
1.8V RAIL
K39
K42 VCC[66] BC22 R478 10K_4
VCC[67] VCCIO_SEL +3V
L25 BB3
VCC[68] +1.8V VCCPLL[1]
L28 BC1
L33 VCC[69] BC4 VCCPLL[2]
L36 VCC[70] C395 C396 VCCPLL[3]
L40 VCC[71] 1U/6.3V_4X 1U/6.3V_4X
QUIET RAILS
N26 VCC[72]
N30 VCC[73] AM25 BC43 R469 *51_4
VCC[74] VCCPQE[1] VDDQ_SENSE +1.5VSUS
N34 AN22 +VTT BA43 R223 *51_4
SENSE LINES
N38 VCC[75] VCCPQE[2] VSS_SENSE_VDDQ
VCC[76] R17083 Celeron@0_1206 L17
+1.05V VCCSA[1]
C190 R17084 Celeron@0_1206 L21
1U/6.3V_4X N16 VCCSA[2]
C159 C160 N20 VCCSA[3] R197 *i3@100/F_4
+VCCSA VCCSA[4] +VCCSA
SA RAIL
10U/6.3V_6X 10U/6.3V_6X N22
P17 VCCSA[5]
A44 H_CPU_SVIDALRT# P20 VCCSA[6] U10 VCCSA_VCCSSENSE
VIDALERT# VCCSA[7] VCCSA_SENSE VCCSA_VCCSSENSE {44}
B43 H_CPU_SVIDCLK R16
SVID
VIDSCLK C44 H_CPU_SVIDDAT R18 VCCSA[8]

VIDSOUT R21 VCCSA[9]
U15 VCCSA[10] R390 10K_4
V16 VCCSA[11]
V17 VCCSA[12] D48
VCCSA[13] VCCSA_VID[0] VCCSA_VID0 {44}
V18 D49 VCCSA_VID1 {44}
V21 VCCSA[14] VCCSA_VID[1]
W20 VCCSA[15] R402 10K_4
VCCSA[16]
R98 100/F_4 +VCC_CORE
B F43 VCC_SENSE_RR R120 0_4 VCC_SENSE {45} B
SENSE LINES
VCC_SENSE G43 VSS_SENSE_RR R122 0_4

VSS_SENSE VSS_SENSE {45}
R97 100/F_4
IC_SNB_2CBGA_1P0
R219 10/F_4 +VTT

AN16 VCCP_SENSE_R R222 0_4
VCCIO_SENSE VCCP_SENSE {43}
AN17 VSSP_SENSE_R R220 0_4
VSS_SENSE_VCCIO VSSP_SENSE {43}
R221 10/F_4
Layout note: need routing

IC_SNB_2CBGA_1P0
together and ALERT need
between CLK and DATA
H_CPU_SVIDCLK R121 *SHORT_4 VR_SVID_CLK {45}
+VTT
R95
130/F_4
H_CPU_SVIDDAT R101 *SHORT_4 VR_SVID_DATA {45}
+VTT
A A
R99
75/F_4
H_CPU_SVIDALRT# R119 43_4 VR_SVID_ALERT# {45}

PROJECT : MTT
A1A
Ivy Bridge 3/4
5 4 3 2 1
5 4 3 2 1
<CPU>
Ivy/Sandy Bridge Processor (GND)
BG17
BG21
U1001I
VSS[181] VSS[251]
M4
M58 A13
U1001H
AM38
Ivy Bridge Processor (RESERVED, CFG) 06
BG24 VSS[182] VSS[252] M6 A17 VSS[1] VSS[91] AM4 U1001E
BG28 VSS[183] VSS[253] N1 A21 VSS[2] VSS[92] AM42
BG45 VSS[186] VSS[256] N25 A33 VSS[5] VSS[95] AM58 CFG0 B50 BE7 SMDDR_VREF_DQ0_M3_R
VSS[187] VSS[257] VSS[6] VSS[96] TP15 CFG[0] RSVD28
BG49 N28 A37 AN1 CFG1 C51 BG7 SMDDR_VREF_DQ1_M3_R
BG53 VSS[188] VSS[258] N33 A40 VSS[7] VSS[97] AN21 TP16 B54 CFG[1] RSVD29
CFG2
BG9 VSS[189] VSS[259] N36 A45 VSS[8] VSS[98] AN25 CFG3 D53 CFG[2]
VSS[190] VSS[260] VSS[9] VSS[99] TP17 CFG[3]
D C29 N40 A49 AN28 CFG4 A51 N42 D
C35 VSS[191] VSS[261] N43 A53 VSS[10] VSS[100] AN33 CFG5 C53 CFG[4] RSVD30 L42 R475 R473
C40 VSS[192] VSS[262] N47 A9 VSS[11] VSS[101] AN36 CFG6 C55 CFG[5] RSVD31 L45
D10 VSS[193] VSS[263] N48 AA1 VSS[12] VSS[102] AN40 CFG7 H49 CFG[6] RSVD32 L47 *1K_4 *1K_4
D14 VSS[194] VSS[264] N51 AA13 VSS[13] VSS[103] AN43 A55 CFG[7] RSVD33
D18 VSS[195] VSS[265] N52 AA50 VSS[14] VSS[104] AN47 H51 CFG[8]
D22 VSS[196] VSS[266] N56 AA51 VSS[15] VSS[105] AN50 K49 CFG[9] M13
D26 VSS[197] VSS[267] N61 AA52 VSS[16] VSS[106] AN54 K53 CFG[10] RSVD34 M14
D29 VSS[198] VSS[268] P14 AA53 VSS[17] VSS[107] AP10 F53 CFG[11] RSVD35 U14
D35 VSS[199] VSS[269] P16 AA55 VSS[18] VSS[108] AP51 G53 CFG[12] RSVD36 W14
D4 VSS[200] VSS[270] P18 AA56 VSS[19] VSS[109] AP55 L51 CFG[13] RSVD37 P13
D40 VSS[201] VSS[271] P21 AA8 VSS[20] VSS[110] AP7 F51 CFG[14] RSVD38
D43 VSS[202] VSS[272] P58 AB16 VSS[21] VSS[111] AR13 D52 CFG[15]
D46
D50
VSS[203]
VSS[204]
VSS[205]
VSS VSS[273]
VSS[274]
VSS[275]
P59
P9
AB18
AB21
VSS[22]
VSS[23]
VSS[24]
VSS[112]
VSS[113]
VSS[114]
AR17
AR21
L53 CFG[16]
CFG[17] RSVD39
RSVD40
AT49
K24
D54 R17 AB48 AR41
VSS[206] VSS[276] VSS[25] VSS[115]
RESERVED
D58 R20 AB61 AR48 H43
D6 VSS[207] VSS[277] R4 AC10 VSS[26] VSS[116] AR61 K43 VCC_VAL_SENSE AH2
E25 VSS[208] VSS[278] R46 AC14 VSS[27] VSS[117] AR7 VSS_VAL_SENSE RSVD41 AG13
E29 VSS[209] VSS[279] T1 AC46 VSS[28] VSS[118] AT14 RSVD42 AM14
E3 VSS[210] VSS[280] T47 AC6 VSS[29] VSS[119] AT19 H45 RSVD43 AM15
E35 VSS[211] VSS[281] T50 AD17 VSS[30] VSS[120] AT36 K45 VAXG_VAL_SENSE RSVD44
E40 VSS[212] VSS[282] T51 AD20 VSS[31] VSS[121] AT4 VSSAXG_VAL_SENSE
F13 VSS[213] VSS[283] T52 AD4 VSS[32] VSS[122] AT45 N50
F15
F19
VSS[214]
VSS[215]
VSS[216]
VSS[284]
VSS[285]
VSS[286]
T53
T55
AD61
AE13
VSS[33]
VSS[34]
VSS[35]
VSS VSS[123]
VSS[124]
VSS[125]
AT52
AT58
F48
VCC_DIE_SENSE
RSVD45
F29 T56 AE8 AU1

F35 VSS[217] VSS[287] U13 AF1 VSS[36] VSS[126] AU11 H48
F40 VSS[218] VSS[288] U8 AF17 VSS[37] VSS[127] AU28 K48 RSVD6
F55 VSS[219] VSS[289] V20 AF21 VSS[38] VSS[128] AU32 RSVD7 A4
G48 VSS[220] VSS[290] V61 AF47 VSS[39] VSS[129] AU51 DC_TEST_A4 C4
G51 VSS[221] VSS[291] W13 AF48 VSS[40] VSS[130] AU7 BA19 DC_TEST_C4 D3
G6 VSS[222] VSS[292] W15 AF50 VSS[41] VSS[131] AV17 AV19 RSVD8 DC_TEST_D3 D1
G61 VSS[223] VSS[293] W18 AF51 VSS[42] VSS[132] AV21 AT21 RSVD9 DC_TEST_D1 A58
H10 VSS[224] VSS[294] W21 AF52 VSS[43] VSS[133] AV22 BB21 RSVD10 DC_TEST_A58 A59
H14 VSS[225] VSS[295] W46 AF53 VSS[44] VSS[134] AV34 BB19 RSVD11 DC_TEST_A59 C59
H17 VSS[226] VSS[296] W8 AF55 VSS[45] VSS[135] AV40 AY21 RSVD12 DC_TEST_C59 A61
H21 VSS[227] VSS[297] Y4 AF56 VSS[46] VSS[136] AV48 BA22 RSVD13 DC_TEST_A61 C61
H4 VSS[228] VSS[298] Y47 AF58 VSS[47] VSS[137] AV55 AY22 RSVD14 DC_TEST_C61 D61
C C
H53 VSS[229] VSS[299] Y58 AF59 VSS[48] VSS[138] AW13 AU19 RSVD15 DC_TEST_D61 BD61
H58 VSS[230] VSS[300] Y59 AG10 VSS[49] VSS[139] AW43 AU21 RSVD16 DC_TEST_BD61 BE61
J1 VSS[231] VSS[301] AG14 VSS[50] VSS[140] AW61 BD21 RSVD17 DC_TEST_BE61 BE59
J49 VSS[232] AG18 VSS[51] VSS[141] AW7 BD22 RSVD18 DC_TEST_BE59 BG61
J55 VSS[233] AG47 VSS[52] VSS[142] AY14 BD25 RSVD19 DC_TEST_BG61 BG59
K11 VSS[234] AG52 VSS[53] VSS[143] AY19 BD26 RSVD20 DC_TEST_BG59 BG58
K21 VSS[235] AG61 VSS[54] VSS[144] AY30 BG22 RSVD21 DC_TEST_BG58 BG4
K51 VSS[236] A5 AG7 VSS[55] VSS[145] AY36 BE22 RSVD22 DC_TEST_BG4 BG3
K8 VSS[237] VSS_NCTF_1 A57 AH4 VSS[56] VSS[146] AY4 BG26 RSVD23 DC_TEST_BG3 BE3
L16 VSS[238] VSS_NCTF_2 BC61 AH58 VSS[57] VSS[147] AY41 BE26 RSVD24 DC_TEST_BE3 BG1
L20 VSS[239] VSS_NCTF_3 BD3 AJ13 VSS[58] VSS[148] AY45 BF23 RSVD25 DC_TEST_BG1 BE1
L22 VSS[240] VSS_NCTF_4 BD59 AJ16 VSS[59] VSS[149] AY49 BE24 RSVD26 DC_TEST_BE1 BD1
VSS[241] VSS_NCTF_5 VSS[60] VSS[150] RSVD27 DC_TEST_BD1
NCTF
L26 BE4 AJ20 AY55

L30 VSS[242] VSS_NCTF_6 BE58 AJ22 VSS[61] VSS[151] AY58
L34 VSS[243] VSS_NCTF_7 BG5 AJ26 VSS[62] VSS[152] AY9
L38 VSS[244] VSS_NCTF_8 BG57 AJ30 VSS[63] VSS[153] BA1
L43 VSS[245] VSS_NCTF_9 C3 AJ34 VSS[64] VSS[154] BA11 IC_SNB_2CBGA_1P0
L48 VSS[246] VSS_NCTF_10 C58 AJ38 VSS[65] VSS[155] BA17
L61 VSS[247] VSS_NCTF_11 D59 AJ42 VSS[66] VSS[156] BA21
M11 VSS[248] VSS_NCTF_12 E1 AJ45 VSS[67] VSS[157] BA26
M15 VSS[249] VSS_NCTF_13 E61 AJ48 VSS[68] VSS[158] BA32
VSS[250] VSS_NCTF_14 AJ7 VSS[69] VSS[159] BA48
AK1 VSS[70] VSS[160] BA51
AK52 VSS[71] VSS[161] BB53
AL10 VSS[72] VSS[162] BC13
AL13 VSS[73] VSS[163] BC5
IC_SNB_2CBGA_1P0 AL17 VSS[74] VSS[164] BC57
AL21 VSS[75] VSS[165] BD12
AL25 VSS[76] VSS[166] BD16
AL28 VSS[77] VSS[167] BD19
AL33 VSS[78] VSS[168] BD23
AL36 VSS[79] VSS[169] BD27
AL40 VSS[80] VSS[170] BD32
AL43 VSS[81] VSS[171] BD36
AL47 VSS[82] VSS[172] BD40
AL61 VSS[83] VSS[173] BD44
AM13 VSS[84] VSS[174] BD48
AM20 VSS[85] VSS[175] BD52
B VSS[86] VSS[176] B
AM22 BD56
AM26 VSS[87] VSS[177] BD8
AM30 VSS[88] VSS[178] BE5
AM34 VSS[89] VSS[179] BG13
VSS[90] VSS[180]
IC_SNB_2CBGA_1P0
Processor Strapping DDR3 VREF DQ (M3) S3P

The CFG signals have a default value of '1' if not terminated on the board.
1 0 R145 NS3@0_4
CFG2
(PCI-E Static x16 Lane Reversal) Normal Operation Lane Reversed SMDDR_VREF_DQ0_M3_R 1 3 SMDDR_VREF_DQ0_M3 {13}
CFG3 Q8
Normal Operation Lane Reversed R1064 S3@ME2N7002E_200MA
(PCI-E Static x4 Lane Reversal)
2
*S3@1K_4
CFG4
(DP Presence Strap) Disable; No physical DP attached to eDP Enable; An ext DP device is connected to eDP E3C
{6,26} DRAMRST_CNTRL
A A
CFG[6:5] (PCIE Port Bifurcation Straps) R146 NS3@0_4
CFG2 R118 *1K_4 CFG5 R104 *1K_4 11: (Default) x16 - Device 1 functions 1 and 2 disabled
CFG6 R116 *1K_4 10: x8, x8 - Device 1 function 1 enabled ; function 2 disabled
01: Reserved - (Device 1 function 1 disabled ; function 2 enabled) SMDDR_VREF_DQ1_M3_R 1 3
00: x8,x4,x4 - Device 1 functions 1 and 2 enabled SMDDR_VREF_DQ1_M3 {14}
CFG4 R117 *1K_4
Q9
R1063 S3@ME2N7002E_200MA
2
*S3@1K_4
E3C
CFG7 R115 *1K_4 PROJECT : MTT
{6,26} DRAMRST_CNTRL Size Document Number Rev
A1A
Ivy Bridge 4/4
5 4 3 2 1
5 4 3 2 1
Cougar Point (DMI,FDI,PM)CLG

U2000C
{16,37} LVDS_BKLT
R5365 PIV@0_4
Cougar Point (LVDS,DDI) CLG/CRU/LDU
U2000D
07
LVDS_BKLT_PCH J47 AP43
BC24 BJ14 LVDS_DIGON M45 L_BKLTEN SDVO_TVCLKINN AP45
{3} DMI_RXN0 DMI0RXN FDI_RXN0 FDI_TXN0 {3} {28} LVDS_DIGON L_VDD_EN SDVO_TVCLKINP
BE20 AY14
{3} DMI_RXN1 DMI1RXN FDI_RXN1 FDI_TXN1 {3}
{3} DMI_RXN2
BG18 BE14 P45 AM42
BG20 DMI2RXN FDI_RXN2 BH13 FDI_TXN2 {3} {28} LVDS_PWM L_BKLTCTL SDVO_STALLN AM40
D {3} DMI_RXN3 DMI3RXN FDI_RXN3 FDI_TXN3 {3} SDVO_STALLP D
BC12 T40
BE24 FDI_RXN4 BJ12 FDI_TXN4 {3} {28} INT_LVDS_EDIDCLK K47 L_DDC_CLK AP39
{3} DMI_RXP0 DMI0RXP FDI_RXN5 FDI_TXN5 {3} {28} INT_LVDS_EDIDDATA L_DDC_DATA SDVO_INTN
{3} DMI_RXP1
BC20 BG10 AP40
BJ18 DMI1RXP FDI_RXN6 BG9 FDI_TXN6 {3} T45 SDVO_INTP
{3} DMI_RXP2 +3V R2001 PIV@2.2K_4 L_CTRL_CLK
BJ20 DMI2RXP FDI_RXN7 FDI_TXN7 {3} P39 L_CTRL_CLK
{3} DMI_RXP3 R2002 PIV@2.2K_4 L_CTRL_DATA
DMI3RXP BG14 L_CTRL_DATA
AW24 FDI_RXP0 BB14 FDI_TXP0 {3} AF37 P38
{3} DMI_TXN0 R2003 PIV@2.37K/F_4 LVD_IBG
AW20 DMI0TXN FDI_RXP1 BF14 FDI_TXP1 {3} AF36 LVD_IBG SDVO_CTRLCLK M39 HDMI_DDCCLK {27}
{3} DMI_TXN1 DMI1TXN FDI_RXP2 FDI_TXP2 {3} T2001 LVD_VBG SDVO_CTRLDATA HDMI_DDCDATA {27}
{3} DMI_TXN2
BB18 BG13
AV18 DMI2TXN FDI_RXP3 BE12 FDI_TXP3 {3} AE48
{3} DMI_TXN3
DMI
FDI
DMI3TXN FDI_RXP4 BG12 FDI_TXP4 {3} AE47 LVD_VREFH AT49
AY24 FDI_RXP5 BJ10 FDI_TXP5 {3} LVD_VREFL DDPB_AUXN AT47
{3} DMI_TXP0 DMI0TXP FDI_RXP6 FDI_TXP6 {3} DDPB_AUXP
{3} DMI_TXP1
AY20 BH9 AT40
AY18 DMI1TXP FDI_RXP7 FDI_TXP7 {3} AK39 DDPB_HPD HDMI_CON_HP_PCH {27}
{3} DMI_TXP2
LVDS
AU18 DMI2TXP {28} INT_TXLCLKOUT- AK40 LVDSA_CLK# AV42
{3} DMI_TXP3 DMI3TXP {28} INT_TXLCLKOUT+ LVDSA_CLK DDPB_0N INT_HDMITX2N {27}
AW16 AV40
FDI_INT FDI_INT {3} AN48 DDPB_0P AV45 INT_HDMITX2P {27}
BJ24 AV12 {28} INT_TXLOUT0- AM47 LVDSA_DATA#0 DDPB_1N AV46 INT_HDMITX1N {27}
DMI_ZCOMP FDI_FSYNC0 FDI_FSYNC0 {3} {28} INT_TXLOUT1- LVDSA_DATA#1 DDPB_1P INT_HDMITX1P {27}
Digital Display Interface

AK47 AU48
BG25 BC10 {28} INT_TXLOUT2- AJ48 LVDSA_DATA#2 DDPB_2N AU47 INT_HDMITX0N {27}
+1.05V R2000 49.9/F_4 DMI_COMP
DMI_IRCOMP FDI_FSYNC1 FDI_FSYNC1 {3} LVDSA_DATA#3 DDPB_2P AV47 INT_HDMITX0P {27}
BH21 AV14 AN47 DDPB_3N AV49 INT_HDMICLK- {27}
R2004 750/F_4 DMI2RBIAS
DMI2RBIAS FDI_LSYNC0 FDI_LSYNC0 {3} {28} INT_TXLOUT0+ AM49 LVDSA_DATA0 DDPB_3P INT_HDMICLK+ {27}
BB10 {28} INT_TXLOUT1+ AK49 LVDSA_DATA1
FDI_LSYNC1 FDI_LSYNC1 {3} {28} INT_TXLOUT2+ AJ47 LVDSA_DATA2 P46
LVDSA_DATA3 DDPC_CTRLCLK P42
DDPC_CTRLDATA
A18 AF40
DSWVRMEN DSWVREN {8} LVDSB_CLK#
AF39 AP47
LVDSB_CLK DDPC_AUXN AP49
System Power Management

SUSACK#_R C12 E22 DPWROK_R AH45 DDPC_AUXP AT38
SUSACK# DPWROK AH47 LVDSB_DATA#0 DDPC_HPD
AF49 LVDSB_DATA#1 AY47
C XDP_DBRST# K3 B9 PCIE_WAKE# AF45 LVDSB_DATA#2 DDPC_0N AY49 C
{3} XDP_DBRST# SYS_RESET# WAKE# PCIE_WAKE# {29,35,37} LVDSB_DATA#3 DDPC_0P AY43
AH43 DDPC_1N AY45
P12 N3 CLKRUN# AH49 LVDSB_DATA0 DDPC_1P BA47
SYS_PWROK_R
SYS_PWROK +3VCLKRUN# / GPIO32 CLKRUN# {37} LVDSB_DATA1 DDPC_2N
AF47 BA48
AF43 LVDSB_DATA2 DDPC_2P BB47
LVDSB_DATA3 DDPC_3N
MPWROK R2005 *SHORT_4 EC_PWROK_R L22
PWROK +3V_S5 SUS_STAT# / GPIO61
G8
T2000 DDPC_3P
BB49 1 -- LVDS
ENABLE
L_DDC_DATA
L10 +3V_S5 N14 N48 M43
APWROK SUSCLK / GPIO62 SUSCLK {37} {28} INT_CRT_BLU CRT_BLUE DDPD_CTRLCLK
{28} INT_CRT_GRN
P49
CRT_GREEN DDPD_CTRLDATA
M36 0 -- LVDS DISABLE
T49
{28} INT_CRT_RED CRT_RED
{26} PM_DRAM_PWRGD PM_DRAM_PWRGD B13 +3V_S5 D10 T2002
DRAMPWROK SLP_S5# / GPIO63 AT45
CRT
DDPD_AUXN
{28} INT_CRT_DDCCLK
T39
CRT_DDC_CLK DDPD_AUXP
AT43 1 -- PORT B
C21 H4 M40 BH41
{37} RSMRST# RSMRST#
RSMRST# SLP_S4# SUSC# {37} {28} INT_CRT_DDCDAT CRT_DDC_DATA DDPD_HPD Detected
SDVO_CTRLDATA
BB43
DDPD_0N
SUS_PWR_ACK_R K16 +3V_S5 SLP_S3#
SUSWARN#/SUSPWRDNACK/GPIO30
F4
SUSB# {37} {28} INT_HSYNC
R2006 ICRT@33_4 CRT_HSYNC_R M47
CRT_HSYNC DDPD_0P
BB45 0 -- PORT
R2007 ICRT@33_4 CRT_VSYNC_R M49 BF44
{28} INT_VSYNC CRT_VSYNC DDPD_1N BE44 B Disable
E20 G10 DDPD_1P BF42
{37} DNBSWON# PWRBTN# SLP_A# T2003 DDPD_2N
CRT IMPEDANCE MATCHING
DAC_IREF T43 BE42
T42 DAC_IREF DDPD_2P BJ42
AC_PRESENT_R H20 G16 SLP_SUS#_R CRT_IRTN DDPD_3N BG42
ACPRESENT / GPIO31 DSW SLP_SUS#
R2008
DDPD_3P
CRU
1K/D_4 CougarPoint_R1P0
PM_BATLOW# E10 AP14
BATLOW# / GPIO72 +3V_S5 PMSYNCH PM_SYNC {3}
PM_RI# A10 +3V_S5 K14 GPIO29

RI# SLP_LAN# / GPIO29
R2009 ICRT@150/F_4 INT_CRT_BLU
B CougarPoint_R1P0 B
R2010 ICRT@150/F_4 INT_CRT_GRN
Near chipset
R2011 ICRT@150/F_4 INT_CRT_RED
R17080 *10_4 C14638 *0.1U/10V_4X EC_PWROK_R
PCH CLG/PIV/S3P System CLG Deep Sx CLG

Pull-high/low +3V
PWR_OK R2012 NS3_NDS3@10K_4 +3V_S5
CLKRUN# R2015 8.2K_4
R2021 *SHORT_4 R2014 DS3@10K_4 +3V_DSW
XDP_DBRST# R2018 1K_4
AC_PRESENT_R R2017 DS3@0_4 AC_PRESENT {37}

+V3A
+V3A SUSACK#_R R17070 DS3@0_4 SUSACK# {37}

PM_RI# R2013 10K_4
PM_BATLOW# R2016 8.2K_4 R2022 *0_4
PCIE_WAKE# R2019 10K_4

C2009
GPIO29 R2020 10K_4 *0.1U/10V_4X SUS_PWR_ACK_R R2024 DS3@0_4 SUS_PWR_ACK {37}
SUS_PWR_ACK R2023 10K_4
5
A PM_DRAM_PWRGD R2025 *S3@200/F_4 2 R2026 NS3_NDS3@0_4 RSMRST# A

DELAY_VR_PWRGOOD {3,45}
{26} SYS_PWROK_R SYS_PWROK_R 4
1 MPWROK
MPWROK {37,45}
DPWROK_R R2027 DS3@0_4 SYS_HWPG {37,41}
U2001 *TC7SH08FU(F)
3
RSMRST# R2028 10K_4 C5573 C5580 C5583

0.1U/10V_4X *0.1U/10V_4X 39P/50V_4N
SYS_PWROK_R R2030 100K_4
LVDS_BKLT_PCH R2032 *PIV@100K_4

SLP_SUS#_R R2031 DS3@0_4 SLP_SUS# {11,37} Quanta Computer Inc.
PROJECT : MTT
Cougar Point 1/6 A1A

5 4 3 2 1
5 4 3 2 1
RTC RTC
Circuitry
+3V_RTC
Trace = 30mils for power C2010 15P/50V_4C
Cougar Point (HDA,JTAG,SATA) CLG/GCK
08
2
1
D2002 *RB500V-40_100MA R2035 20K_4 RTC_RST# U2000A
+3VPCU
Y2000 R2036
D14 C2012 G2000 32.768KHZ_10 10M_4 RTC_X1 A20 C38 LAD0 {29,37}
RTCX1 FWH0 / LAD0 A38 LAD1 {29,37}
LPC
3
4
1U/6.3V_4X C2013 12P/50V_4C RTC_X2 C20 FWH1 / LAD1 B37
RTCX2 FWH2 / LAD2 LAD2 {29,37}
*SHORT PAD C37 LAD3 {29,37}
RTC_RST# D20 FWH3 / LAD3
BAT54C-7-F_200MA RTCRST# D36
FWH4 / LFRAME# LFRAME# {29,37}
SRTC_RST# G22
R_3VRTC D2003 *RB500V-40_100MA R2042 20K_4 SRTC_RST# SRTCRST# E36 PCH_DRQ#0 TP2003
RTC
R2041 1M_4 SM_INTRUDER# K22 LDRQ0# K36
+3V_RTC INTRUDER# +3V LDRQ1# / GPIO23 BOARD_ID17 {10}
R218 C2011 C2014 G2002
D PCH_INVRMEN C17 V5 SERIRQ SERIRQ {37}
D
1K_4 1U/6.3V_4X 1U/6.3V_4X INTVRMEN SERIRQ
*SHORT PAD
AM3
SATA0RXN SATA_RXN_1ST_HDD# {33}
R17079 *10_4 C741 *0.1U/10V_4X RTC_RST# ACZ_BITCLK_R N34 AM1
HDA_BCLK SATA0RXP SATA_RXP_1ST_HDD {33}
SATA 6G
AP7 SATA HDD/SSD
R_3VRTC_R SATA0TXN SATA_TXN_1ST_HDD# {33}
ACZ_SYNC_R L34 AP5
HDA_SYNC SATA0TXP SATA_TXP_1ST_HDD {33}
Near chipset PCBEEP T10 AM10
{34} PCBEEP SPKR SATA1RXN
1
AM8
CN2000 ACZ_RST#_R K34 SATA1RXP AP11
HDA_RST# SATA1TXN AP10
SATA1TXP
ACZ_SDIN0_AUDIO E34 AD7
AAA-BAT-054-K01 HDA_SDIN0 SATA2RXN AD5
G34 SATA2RXP AH5
2
HDA_SDIN1 SATA2TXN AH4

C34 SATA2TXP
IHDA
HDA_SDIN2 AB8
A34 SATA3RXN AB10
HDA_SDIN3 SATA3RXP
PU & Password Clear CLG
AF3
SATA3TXN AF1
ACZ_SDOUT_R A36 SATA3TXP
SATA
HDA_SDO Y7
+3V SATA4RXN SATA_RXN_ODD# {33}
Y5
SATA4RXP SATA_RXP_ODD {33}
C36 +3V AD3 SATA ODD
+3V TP2040 HDA_DOCK_EN# / GPIO33 SATA4TXN SATA_TXN_ODD# {33}
GPIO21 R2040 10K_4 AD1
SATA4TXP SATA_TXP_ODD {33}
{10} BOARD_ID16 N32 +3V_S5
G2001 HDA_DOCK_RST# / GPIO13 Y3
SERIRQ R2037 8.2K_4 SATA5RXN Y1
SATA5RXP AB3
*SHORT PAD
GPIO19 R2039 10K_4 PCH_JTAG_TCK J3 SATA5TXN AB1
JTAG_TCK SATA5TXP
PCH_JTAG_TMS H7 Y11
JTAG
JTAG_TMS SATAICOMPO
PCH_JTAG_TDI K5 Y10 SATA_COMP R2049 37.4/F_4 +1.05V
JTAG_TDI SATAICOMPI
PCH_JTAG_TDO H1
TP2009 JTAG_TDO
HDA Bus CLG
AB12
SATA3RCOMPO
C +5V AB13 SATA3_COMP R2050 49.9/F_4 C
SATA3COMPI
R2046 PCH_SPI_CLK_R2R R2221 0_4 PCH_SPI_CLK_R2 T3 AH1 SATA3_RBIAS R2052 750/F_4

R2051 33_4 ACZ_BITCLK_R SPI_CLK SATA3RBIAS
{34} BIT_CLK_AUDIO
*33K/F_4 PCH_SPI_CS0#_R2R R2229 0_4 PCH_SPI_CS0#_R2 Y14
C5569 *0.1U/16V_4Y SPI_CS0#
PCH_SPI_CS1#_R2 T1
SPI
TP2039 SPI_CS1#
C2015 P3 R2055 10K_4 +3V
R2053 33_4 ACZ_SYNC_R1 SATALED#
{34} ACZ_SYNC_AUDIO
2
*33P/50V_4N PCH_SPI_SI_R2R R2227 0_4 PCH_SPI_SI_R2 V4 +3V V14 GPIO21

R2054 33_4 ACZ_RST#_R SPI_MOSI SATA0GP / GPIO21
{34} ACZ_RST#_AUDIO
ACZ_SYNC_R1 1 3 ACZ_SYNC_R PCH_SPI_SO_RR R2244 0_4 PCH_SPI_SO_R U3 +3V P1 GPIO19
R2056 33_4 ACZ_SDOUT_R SPI_MISO SATA1GP / GPIO19
{34} ACZ_SDOUT_AUDIO
Q2001
{34} ACZ_SDIN0_AUDIO ACZ_SDIN0_AUDIO *2N7002K_300MA CougarPoint_R1P0
R2047
*1M_4
R2048 *SHORT_4 PCH Strap Table
Pin Name Strap description Sampled Configuration
PCH JTAG Debug DEG +V3A
SPKR No reboot mode setting PWROK
0 = Default (weak pull-down 20K)
1 = Setting to No-Reboot mode +3V R2057 *1K_4 PCBEEP
0 = "top-block swap" mode R2058 *1K_4

GNT3# / GPIO55 Top-Block Swap Override PWROK 1 = Default (weak pull-up 20K) PCI_GNT3# {9}
R2059 R2060
*210/F_4 *210/F_4
INTVRMEN Integrated 1.05V VRM enable ALWAYS Should be always pull-up +3V_RTC R2061 330K_4 PCH_INVRMEN
PCH_JTAG_TMS
PCH_JTAG_TDI
PCH_JTAG_TCK
GNT1# / GPIO51 Boot BIOS Selection 1 [bit-1] PWROK GNT1# GPIO19 Boot Location
R2062 R2063 R2064 R2065 *1K_4
*51_4 *100/F_4 *100/F_4
1 1 SPI * GNT1# {9}
B
GPIO19 Boot BIOS Selection 0 [bit-0] PWROK 0 0 LPC R2066 *1K_4 GPIO19 B
0 = Override R2067 *1K_4 ACZ_SDOUT_R

HDA_SDO Flash Descriptor Security RSMRST 1 = Default (weak pull-up 20K) +3V_S5 ACZ_SDOUT_R {37}
PCH Dual SPI CLG 0 = Set to Vss R2068

R2069
2.2K_4
1K_4
+1.8V
DF_TVS DMI/FDI Termination voltage PWROK 1 = Set to Vcc (weak pull-down 20K) DF_TVS {10}
H_SNB_IVB# {3}
0 = Disable +V3A R2070 *10K_4

GPIO28 On-die PLL Voltage Regulator RSMRST# 1 = Enable (Default) R2071 *1K_4 PLL_ODVR_EN {10}
+V3A
U2002
0 = Support by 1.8V (weak pull-down) R2072 1K_4 ACZ_SYNC_R
R2228 33_4 PCH_SPI_CS0#_R2R 1 8
HDA_SYNC On-Die PLL VR Voltage Select RSMRST 1= Support by 1.5V +3V_S5
{37} PCH_SPI_CS0# CE# VDD
{37} PCH_SPI_CLK R2220 33_4 PCH_SPI_CLK_R2R 6
R2224 33_4 PCH_SPI_SI_R2R 5 SCK
{37} PCH_SPI_SO SI
{37} PCH_SPI_SI R2238 33_4 PCH_SPI_SO_RR 2 7 SPI_HOLD# R2073 3.3K/F_4 INIT3_3V# Reserved PWROK 1 = Default (weak pull-up 20K) Should not pull low. leave as No Connect
SO HOLD#
C2017 3 4
WP# VSS
*22P/50V_4N W25Q64FVSSIQ
GNT2#/ 1 = Default. Should not be pulled low
GPIO53 ESI Strap (Server Only) PWROK for desktop and mobile Should not pull low for desktop and mobile
C2018
R2075 3.3K/F_4 SPI_WP# 0.1U/16V_4Y

0 = Default. TLS no Confidentiality R2074 1K_4
+V3A GPIO15 TLS Confidentiality RSMRST 1 = TLS Confidentiality +V3A GPIO15 {10}
LVDS Detected 0 = Default. Not Detected 1= PU to 3V

L_DDC_DATA PWROK 1 = Detected
Port B Detected 0 = Default. Not Detected 1= PU to 3V

SDVO_CTRLDATA PWROK 1 = Detected
A
Port C Detected 0 = Default. Not Detected 0=NC A
DDPC_CTRLDATA PWROK 1 = Detected
Port D Detected 0 = Default. Not Detected 0=NC

DDPD_CTRLDATA PWROK 1 = Detected
SATA3GP/ Reserved
GPIO37 PWROK 0 = Default Should not be pulled high when strap is sampled
SATA2GP/ Reserved
GPIO36 PWROK 0 = Default Should not be pulled high when strap is sampled Quanta Computer Inc.
Deep S4/S5 Well On -Die 0 = Disable DSWVREN {7}
PROJECT : MTT
DSWVRMEN ALWAYS Size Document Number Rev
Voltage Regulator Enable 1 = Enable R2076 330K_4 R2077 *330K_4 A1A
+3V_RTC Cougar Point 2/6
5 4 3 2 1
5 4 3 2 1
Cougar Point-M (PCI,USB,NVRAM) CLG/DEG

Cougar Point-M (PCI-E,SMBUS,CLK)CLG/GCK/MNG/U3C
U2000B
09
BG34
U2000E BJ34 PERN1 E12
PERP1 +3V_S5 SMBALERT# / GPIO11
SMBALERT#
AY7 3G AV32
RSVD1 AV7 AU32 PETN1 H14 SCLK
RSVD2 PETP1 SMBCLK SCLK {13,29} DDR / PCIE Mini Card/LAN
BG26 AU3
BJ26 TP1 RSVD3 BG4 BE34 C9 SDATA
TP2 RSVD4 PERN2 SMBDATA SDATA {13,29}
BH25 BF34
BJ16 TP3 AT10 BB32 PERP2
BG16 TP4 RSVD5 BC8 AY32 PETN2
SMBUS
AH38 TP5 RSVD6 PETP2 A12 DRAMRST_CNTRL_PCH
TP6 +3V_S5 SML0ALERT# / GPIO60 DRAMRST_CNTRL_PCH {26}
AH37 AU2 {29} PCIE_RXN_WLAN# BG36
D
AK43 TP7 RSVD7 AT4 BJ36 PERN3 C8 SMB_ME0_CLK D
TP8 RSVD8 {29} PCIE_RXP_WLAN PERP3 SML0CLK
AK45 AT3 WLAN {29} PCIE_TXN_WLAN# C2027 0.1U/10V_4X PCIE_TXN_WLAN#_C AV34
C18 TP9 RSVD9 AT1 C2028 0.1U/10V_4X PCIE_TXP_WLAN_C AU34 PETN3 G12 SMB_ME0_DAT
TP10 RSVD10 {29} PCIE_TXP_WLAN PETP3 SML0DATA
N30 AY3
H3 TP11 RSVD11 AT5 BF36
TP12 RSVD12 {35} PCIE_RXN_LAN# PERN4
AH12 AV3 {35} PCIE_RXP_LAN BE36
AM4 TP13 RSVD13 AV1 C2029 LAN@0.1U/10V_4X PCIE_TXN_LAN#_C AY34 PERP4 C13 SML1ALERT#_R
TP14 RSVD14 LAN {35} PCIE_TXN_LAN# PETN4 +3V_S5 SML1ALERT# / PCHHOT# / GPIO74
AM5 BB1 {35} PCIE_TXP_LAN C2030 LAN@0.1U/10V_4X PCIE_TXP_LAN_C BB34
Y13 TP15 RSVD15 BA3 PETP4 E14 SMB_ME1_CLK
+3V_S5 PCH Temp
PCI-E*
K24 TP16 RSVD16 BB5 BG37 SML1CLK / GPIO58
L24 TP17 RSVD17 BB3 BH37 PERN5 M16
TP18 RSVD18 PERP5 +3V_S5 SML1DATA / GPIO75
SMB_ME1_DAT
AB46 BB7 AY36
AB45 TP19 RSVD19 BE8 BB36 PETN5
RSVD
TP20 RSVD20 BD4 PETP5
RSVD21 BF6 BJ38
RSVD22 BG38 PERN6
Controller
B21 AV5 NV_ALE AU36 PERP6 M7
TP21 RSVD23 TP2010 Reserve for INTEL LAN PETN6 CL_CLK1
M20 AV10 AV36
AY16 TP22 RSVD24 PETP6
Pather Point HM76
Link
BG46 TP23 AT8 BG40 T11
TP24 RSVD25 BJ40 PERN7 CL_DATA1
AY5 AY40 PERP7
(R1) RSVD26 PETN7
BA2 BB40 P10
BE28 RSVD27 PETP7 CL_RST1#
{31} USB30_RXN1_R TP25
BC30 AT12 BE38
{32} USB30_RXN3_L1 TP26 RSVD28 PERN8
BE32 BF3 BC38
BJ32 TP27 RSVD29 AW38 PERP8
(L1) TP28 PETN8
BC28 AY38
{31} USB30_RXP1_R TP29 PETP8
BE30
{32} USB30_RXP3_L1 TP30
USB30 Combo Port

BF32 +3V_S5 M10 CLK_PEGA_REQ#
BG32 TP31 C24 Y40 PEG_A_CLKRQ# / GPIO47
TP32 USBP0N USBP0- {31} (R1) {35} CLK_PCIE_LAN# CLKOUT_PCIE0N
{31} USB30_TXN1_R AV26 A24 LAN {35} CLK_PCIE_LAN Y39
TP33 USBP0P USBP0+ {31} CLKOUT_PCIE0P
{32} USB30_TXN3_L1 BB26 C25 (L1) AB37 CLK_PCIE_VGAN {15}
TP34 USBP1N USBP2- {32} CLKOUT_PEG_A_N
CLOCKS
AU28 B25 {35} PCIE_CLK_LAN_REQ# PCIE_CLK_LAN_REQ# J2 +3V_S5 AB38 CLK_PCIE_VGAP {15}
TP35 USBP1P USBP2+ {32} PCIECLKRQ0# / GPIO73 CLKOUT_PEG_A_P
AY30 C26
TP36 USBP2N USB_TPANEL# {28}
{31} USB30_TXP1_R AU26 A26 (TouchPanel)
TP37 USBP2P USB_TPANEL {28}
{32} USB30_TXP3_L1 AY26 K28 AB49 AV22 CLK_CPU_BCLKN {3}
AV28 TP38 USBP3N H28 AB47 CLKOUT_PCIE1N CLKOUT_DMI_N AU22
TP39 USBP3P 3G CLKOUT_PCIE1P CLKOUT_DMI_P CLK_CPU_BCLKP {3}
AW30 E28 (SIM) EHCI1
TP40 USBP4N D28 M1
C
USBP4P
PCIE_CLK_3G_REQ#
PCIECLKRQ1# / GPIO18 +3V C
GPIO52 for 2013 17ME KB backlight USBP5N
C28
CLKOUT_DP_N
AM12
A28 AM13
USBP5P C29 AA48 CLKOUT_DP_P
USBP6N B29 AA47 CLKOUT_PCIE2N
USBP6P Cardreader CLKOUT_PCIE2P
PCI_PIRQA# K40 N28 <Port6/7 Support by SKU > BF18 CLK_BUF_PCIE_3GPLLN
K38 PIRQA# USBP7N M28 V10 CLKIN_DMI_N BE18
PCI_PIRQB# PCIECLKRQ2# +3V CLK_BUF_PCIE_3GPLLP
PCI
PCI_PIRQC# H38 PIRQB# USBP7P L30 PCIECLKRQ2# / GPIO20 CLKIN_DMI_P

PIRQC# USBP8N USB_CARD# {36}
PCI_PIRQD# G38 K30 USB_CARD {36} (CARD READER)
PIRQD# USBP8P G30 Y37 BJ30 CLK_BUF_BCLKN
USBP9N USBP9- {32} {29} CLK_PCIE_WLAN# CLKOUT_PCIE3N CLKIN_GND1_N
{25} DGPU_HOLD_RST# DGPU_HOLD_RST# C46 +3V E30 (USB2.0 L2) {29} CLK_PCIE_WLAN Y36 BG30 CLK_BUF_BCLKP
USB
REQ1# / GPIO50 USBP9P USBP9+ {32} CLKOUT_PCIE3P CLKIN_GND1_P

GPIO52 C44 +3V C30 USB_WLAN# WLAN
REQ2# / GPIO52 USBP10N USB_WLAN# {29}
{25} DGPU_PWR_EN_R DGPU_PWR_EN_R E40 +3V A30 USB_WLAN (WLAN) {29} PCIE_CLK_WLAN_REQ# PCIE_CLK_MINI_REQ# A8 +3V_S5
REQ3# / GPIO54 USBP10P USB_WLAN {29} PCIECLKRQ3# / GPIO25
L32 USB_CCD# G24 CLK_BUF_DREFCLKN
USBP11N USB_CCD# {28} CLKIN_DOT_96N
{8} GNT1# GNT1# D47 +3V K32 USB_CCD (CCD) EHCI2 E24 CLK_BUF_DREFCLKP
GNT1# / GPIO51 USBP11P USB_CCD {28} CLKIN_DOT_96P
GPIO53 E42 +3V G32 Y43
{8} PCI_GNT3# PCI_GNT3# F46 GNT2# / GPIO53
+3V USBP12N E32 USB3.0 Y45 CLKOUT_PCIE4N Near chipset
GNT3# / GPIO55 USBP12P C32 CLKOUT_PCIE4P AK7 CLK_BUF_DREFSSCLKN
USBP13N A32 PCIE_CLK_USB30_REQ# L12 CLKIN_SATA_N AK5 C14639 *0.1U/10V_4X R17081 *10_4
USBP13P Cougar Point PCIECLKRQ4# / GPIO26 +3V_S5 CLKIN_SATA_P
CLK_BUF_DREFSSCLKP XTAL25_OUT
{33} ODD_MD# ODD_MD# G42 +3V
G40 PIRQE# / GPIO2
{10} BOARD_ID14 PIRQF# / GPIO3 +3V
{10} BOARD_ID3 C42 +3V C33 USB_BIAS R2090 22.6/F_4 V45 K45 CLK_PCH_14M
D44 PIRQG# / GPIO4 USBRBIAS# V46 CLKOUT_PCIE5N REFCLK14IN
{10} BOARD_ID0 PIRQH# / GPIO5 +3V CLKOUT_PCIE5P
B33 GPIO44 L14 +3V_S5 H45 CLK_PCI_FB C2033 12P/50V_4C
TP2014 PCI_PME# K10 USBRBIAS PCIECLKRQ5# / GPIO44 CLKIN_PCILOOPBACK
PME#
4
3
PCI_PLTRST# C6 +3V_S5 A14 USB_OC_RIGHT# AB42 V47 XTAL25_IN Y2001
PLTRST# OC0# / GPIO59 K20 AB40 CLKOUT_PEG_B_N XTAL25_IN V49 XTAL25_OUT R2094 25MHZ_30
+3V_S5 OC1# / GPIO40
USB_OC1_4# EHCI1 CLKOUT_PEG_B_P XTAL25_OUT
+3V_S5 B17 GPIO41 1M_4
H49 OC2# / GPIO41 C16 E6
+3V_S5 GPIO42 S3_STRAP +3V_S5
1
2
H43 CLKOUT_PCI0 OC3# / GPIO42 L16 PEG_B_CLKRQ# / GPIO56 C2034 12P/50V_4C
CLKOUT_PCI1 +3V_S5 OC4# / GPIO43
USB_OC1_4#
CLK_PCI_FB R2096 22_4 CLK_PCI_FB_R J48 +3V_S5 A16 USB30_SMI# EHCI2 Y47 XCLK_RCOMP R2097 90.9/F_4 +1.05V
K42 CLKOUT_PCI2 OC5# / GPIO9 D14 V40 XCLK_RCOMP
PCLK_DEBUG_R
CLKOUT_PCI3 +3V_S5 OC6# / GPIO10
GPIO10
CLKOUT_PCIE6N
PCLK_591_R H40 +3V_S5 C14 SCI#_R V42
R2098 NMP@22_4 CLKOUT_PCI4 OC7# / GPIO14 CLKOUT_PCIE6P
{29} PCLK_DEBUG
GPIO45 T13 +3V_S5
CougarPoint_R1P0 PCIECLKRQ6# / GPIO45
{37} PCLK_591 R2099 22_4 V38 +3V K43 CLK_FLEX0
TP2019
FLEX CLOCKS
V37 CLKOUT_PCIE7N CLKOUTFLEX0 / GPIO64
B
C5567 C5568 OC[0:3]# can only be use for EHCI1 CLKOUT_PCIE7P
+3V F47 CLK_FLEX1 B
CLKOUTFLEX1 / GPIO65
*0.1U/16V_4Y *0.1U/16V_4Y OC[4:7]# can only be use for EHCI2 {10} GPIO46 K12
PCIECLKRQ7# / GPIO46 +3V_S5
H47 C5565 *0.1U/16V_4Y
+3V CLKOUTFLEX2 / GPIO66
AK14
AK13 CLKOUT_ITPXDP_N K49 CLK_FLEX3
Near chipset CLKOUT_ITPXDP_P +3V CLKOUTFLEX3 / GPIO67 48M_CARD {36}
C5566 *0.1U/16V_4Y
R17082 *10_4 C14640 *0.1U/10V_4X PCI_PLTRST# CougarPoint_R1P0
CLG/S3P/NS3P/VGA/UGA
PLTRST# CLG PCI/USBOC# Pull-up CLG CLK_REQ/Strap Pin SMBus/Pull-up CLG
+3V +V3A
+V3A R2240 10K_4 PCIE_CLK_LAN_REQ# +V3A 33MHz 27MHz 48/24MHz 14.318MHz 25MHz
PCI_PIRQA# R2203 8.2K_4 R2241 10K_4 PCIE_CLK_USB30_REQ#
+V3A PCI_PIRQB# R2204 8.2K_4 R2242 10K_4 PCIE_CLK_MINI_REQ# Q2002A
2
PCI_PIRQC# R2205 8.2K_4 *2N7002KDW_115MA CLK_FLEX0
R2102 PCI_PIRQD# R2208 8.2K_4 R2158 10K_4 GPIO45
10 1 SCI#_R R2151 10K_4 GPIO44 {37} 2ND_MBCLK 6 1 SMB_ME1_CLK
USB_OC1_4# 9 2 USB_OC_RIGHT# +3V CLK_FLEX1
C2037 GPIO41 8 3 GPIO10
*0.1U/10V_4X GPIO42 7 4 USB30_SMI# +3V
USB_OC1_4# 6 5 DGPU_PWR_EN_R R2218 10K_4 CLK_FLEX2
5
GPIO52 R2217 10K_4 R2118 10K_4 PCIECLKRQ2# +V3A

PCI_PLTRST# 2 10KX8 DGPU_HOLD_RST# R2211 10K_4 R2121 10K_4 PCIE_CLK_3G_REQ#
4 PLTRST# {3,29,35,36,37} ODD_MD# R2216 10K_4 Q2002B CLK_FLEX3
5
1 GPIO53 R2243 *10K_4 *2N7002KDW_115MA
U2003 +V3A {37} 2ND_MBDATA 3 4 SMB_ME1_DAT

3
*TC7SH08FU(F) R2116
100K_4 R2125 NS3@10K_4 S3_STRAP
R2126 S3@10K_4
+V3A
+V3A R2139 NDS3@1K_4 DRAMRST_CNTRL_PCH

R2123 *SHORT_4 R2131 *EV@0_4 VGA_PLTRST# {25}
2
A Q29A +V3A A
DS3@2N7002KDW_115MA R2142 *10K_4
USB_OC_RIGHT# 1 6 R2127 IV@10K_4 CLK_PEGA_REQ#
USB_SC_OC# {31,37}
R2128 *EV@10K_4
R338 NS3_NDS3@0_4 +V3A
+V3A R2140 2.2K_4 SDATA

+V3A R2141 2.2K_4 SCLK
Q37 Q29B CLK_BUF_DREFCLKN R2163 10K_4 R2143 2.2K_4 SMB_ME0_CLK
2
DS3@2N7002K_300MA DS3@2N7002KDW_115MA CLK_BUF_DREFCLKP R2164 10K_4 R2144 2.2K_4 SMB_ME0_DAT

CLK_BUF_DREFSSCLKN R2175 10K_4 R2146 2.2K_4 SMB_ME1_CLK
SCI#_R 1 3
SCI# {37}
USB_OC1_4# 4 3
USB_Normal_OC# {32,37}
CLK_BUF_DREFSSCLKP
CLK_BUF_BCLKN
R2177
R2180
10K_4
10K_4
R2147 2.2K_4 SMB_ME1_DAT Quanta Computer Inc.
R2187 10K_4
R337 NS3_NDS3@0_4
CLK_BUF_BCLKP
CLK_BUF_PCIE_3GPLLN R2188 10K_4 PROJECT : MTT
R476 NS3_NDS3@0_4 CLK_BUF_PCIE_3GPLLP R2193 10K_4 R2148 10K_4 SMBALERT# Size Document Number Rev
R2145 10K_4 R2191 10K_4 A1A
CLK_PCH_14M SML1ALERT#_R
Cougar Point 3/6
5 4 3 2 1
5 4 3 2 1
Cougar Point (GPIO,VSS_NCTF,RSVD) CLG

BOARD ID SETTING CLG/PX/OEV/UGA/CLG-Strap
10
GPIO12 for 2013 17ME BOX Speaker
U2000F Board ID ID0 ID1 ID2 ID3 ID4 ID5 ID6 ID7 ID8 ID12ID13 ID14 ID16 ID17
HM70 H
BOARD_ID4 T7 +3V +3V C40 PCH_ODD_EN PCH_ODD_EN {33} HM76 L
BMBUSY# / GPIO0 TACH4 / GPIO68
BOARD_ID5 A42 +3V +3V B41 BOARD_ID13 UMA SKU H
TACH1 / GPIO1 TACH5 / GPIO69
VGA SKU L
BOARD_ID6 H36 +3V +3V C41 BOARD_ID11
D TACH2 / GPIO6 TACH6 / GPIO70 D
VRAM-1000MHz H
BOARD_ID2 E38 +3V +3V A40 BOARD_ID12 VRAM-900MHz L
TACH3 / GPIO7 TACH7 / GPIO71
GPIO8 C10 +3V_S5 CF SV H
GPIO8
CF ULT L
GPIO12 C4 +3V_S5
LAN_PHY_PWR_CTRL / GPIO12
17" H
G2
GPIO15 +3V_S5
{8} GPIO15 GPIO15 P4 GATEA20 {37} 14" L
A20GATE
AU16 GV2 H
PECI TP2027
{33} ODD_PRSNT# ODD_PRSNT# U2 +3V GL L
SATA4GP / GPIO16 P5 RCIN#
RCIN# RCIN# {37}
W/ G-sensor H
GPIO
{25,37,47,48} DGPU_PWROK D40 +3V AY11 H_PWRGOOD {3} W/O G-sensor L
CPU/MISC
TACH0 / GPIO17 PROCPWRGD
BOARD_ID10 T5 +3V AY10 PCH_THRMTRIP# R2149 390_4 PM_THRMTRIP# {3} W/ HDMI H
SCLOCK / GPIO22 THRMTRIP#
W/O HDMI L
E8
GPIO24 / MEM_LED +3V_S5
GPIO24 T14
INIT3_3V# TP2022
w CRT H
{37} GPIO27 GPIO27 E16 DSW AY1 DF_TVS {8} wo CRT L
GPIO27 DF_TVS
{8} PLL_ODVR_EN PLL_ODVR_EN P8 +3V_S5 Only VGA H
GPIO28 AH8
TS_VSS1 PX mode L
BOARD_ID9 K1 +3V
STP_PCI# / GPIO34 AK11
TS_VSS2 Win7(Reserve) H
K4
GPIO35 +3V Win8(Reserve) L
BOARD_ID7
AH10
V8 TS_VSS3
SATA2GP / GPIO36 +3V HM70_76 H
GPIO36
AK10 NM70 L
M5 TS_VSS4
TP2024 SATA3GP / GPIO37 +3V
Celeron CPU H
BOARD_ID1 N2 +3V P37 i3 CPU(Reserve) L
SLOAD / GPIO38 NC_1
C M3 C
BOARD_ID8
SDATAOUT0 / GPIO39 +3V i5(Reserve) H
i7(Reserve) L
GPIO48 V13 +3V BG2
SDATAOUT1 / GPIO48 VSS_NCTF_15 +V3A
{9} GPIO46 +3V
{37} TEMP_ALERT# TEMP_ALERT# V3 +3V BG48 +3V +3V
SATA5GP / GPIO49 VSS_NCTF_16
D6 BH3
GPIO57 +3V_S5
GPIO57 R2235 *10K_4 R2234 10K_4
VSS_NCTF_17 R2161 R2150 R2185
BH47 R2232 *10K_4 GPIO8 R2157 10K_4
VSS_NCTF_18 *HM70@10K_4 *1000M@10K_4 *10K_4
A4 BJ4 R2233 10K_4 GPIO24 R2226 *10K_4
VSS_NCTF_1 VSS_NCTF_19 BOARD_ID2
BOARD_ID0 {9} BOARD_ID3 {9}
A44 BJ44
VSS_NCTF_2 VSS_NCTF_20
A45 BJ45 +V3A R2169 R2173
NCTF
A46 BJ46 *76@10K_4 10K_4

VSS_NCTF_4 VSS_NCTF_22 GPIO12 R2156 10K_4
A5 BJ5
A6 BJ6 +3V +3V +3V +3V
VSS_NCTF_6 VSS_NCTF_24 R2104
B3 C2 10 1
VSS_NCTF_7 VSS_NCTF_25 ODD_PRSNT# 9 2 PCH_ODD_EN R2153 R2159 R2165
B47 C48 TEMP_ALERT# 8 3 HM@10K_4
VSS_NCTF_8 VSS_NCTF_26 RCIN# 7 4 *GV2@10K_4 CRT@10K_4
BD1 D1 GATEA20 6 5
VSS_NCTF_9 VSS_NCTF_27 BOARD_ID5 BOARD_ID6 BOARD_ID7 BOARD_ID8
BD49 D49 10KX8 BOARD_ID4
BE1 E1 R2155 R2167 R2182
VSS_NCTF_11 VSS_NCTF_29 R2171 R2166
BE49 E49 +3V_DSW *GL@10K_4 NHM@10K_4 NCRT@10K_4
B VSS_NCTF_12 VSS_NCTF_30 10K_4 10K_4 B
BF1 F1 GPIO27 R17071 *1K_4
BF49 F49
GPIO36 R2239 10K_4 +3V +3V +3V
CougarPoint_R1P0 +3V
GPIO27 R2174 10K_4
R2160 R2184 R2189 R2196
U3@10K_4 S&C@10K_4 10K_4 *10K_4
BOARD_ID9 BOARD_ID10 BOARD_ID11 BOARD_ID13
+3V
+V3A +3V +3V R2168 R2170 R2172 R2198
+V3A +3V
NU3@10K_4 NS&C@10K_4 *10K_4 10K_4
R2162 R2152 R2178 R2199
R17086 R17088 *OEV@10K_4
10K_4 IV@10K_4 *HM70_76@10K_4
Celeron@10K_4 *45W@10K_4
GPIO48 GPIO57 ID_Detect {38} BOARD_ID1 BOARD_ID12 BOARD_ID14 {9} Description ID9 ID10 ID11
BOARD_ID16 {8} BOARD_ID17 {8}
NU3@/NSC@/NUR@ ULU-2 and W/O R-USB Port L L L
R17103 R2225 R2154 R2186 R2200
R17085 R17087 NU3@/NSC@/UR@ ULU-2 and W/O S&C UR-2 L L H
10K_4 *10K_4 *EV@10K_4 *PX@10K_4 NM70@10K_4
*i3@10K_4 *35W@10K_4 U3@/NSC@/UR@ ULU-2 and W/O S&C UR-3 H L H
NU3@/SC@/UR@ ULU-2 and W/S&C UR-2 L H H
A U3@/SC@/UR@ ULU-3 and W/S&C UR-3 H H H A
GPIO48 default ID_Detect default
EDP H Metal/IMR H U3@ S&C@ UR@
LVDS L TEXTURE L NU3@ NS&C@ NUR@

PROJECT : MTT

5 4 3 2 1
5 4 3 2 1
COUGAR POINT (POWER) CLG CLG/PIV/OEV CLG CLG
VccADAC =1mA(8mils)
+VCCA_DAC_1_2
L1 FCM1608KF-102T01_100MA
+3V
+1.05V R2176 *0_4

+1.05V_VCCUSBCORE +1.05V
11
+3V_DSW C2044
POWER C2045 C2039 C2046 C2058 U2000J POWER 1U/6.3V_4X
+V3A
U2000G 0.01U/25V_4X 0.1U/10V_4X 22U/6.3V_6X *22U/6.3V_6X
+1.05V +1.05V_PCH_VCC R2179 *0_4 +VCCACLK AD49 N26
+3VPCU VCCACLK VCCIO[29]
VccCORE =1.3 A(60mils) VCCSUS3_3 = 119mA(15mils)
AA23 U48 VCCDSW3_3= 3mA P26
AC23 VCCCORE[1] VCCADAC +VCCALVDS +3V R2183 0_4 +VCCPDSW T16 VCCIO[30]
VCCCORE[2] +3V_S5 VCCDSW3_3
AD21 VccALVDS=1mA(8mils) P28 C2042
CRT
D
C2040 C2047 C2056 C2041 AD23 VCCCORE[3] U47 R2181 PIV@0_4 VCCIO[31] 0.1U/10V_4X D
1U/6.3V_4X 1U/6.3V_4X 1U/6.3V_4X 10U/6.3V_6X AF21 VCCCORE[4] VSSADAC C2048 PCH_VCCDSW V12 T27
VCC CORE
AF23 VCCCORE[5] R2237 *OEV@0_4 0.1U/10V_4X DCPSUSBYP VCCIO[32]
AG21 VCCCORE[6] T29
+1.05V +1.05V_PCH_VCCDPLL_EXP AG23 VCCCORE[7] C2057 +3V_SUS_CLKF33 T38 VCCIO[33]
AG24 VCCCORE[8] AK36 +1.05V +VCCAPLL_CPY_PCH *0.1U/10V_4X VCC3_3[5]
AG26 VCCCORE[9] VCCALVDS T23 +3V_VCCPUSB
AG27 VCCCORE[10] AK37 L2 *10uh_8_100MA BH23 VCCSUS3_3[7] C2049
VCCCORE[11] VSSALVDS +VCC_TX_LVDS +1.8V VCCAPLLDMI2
AG29 VccTX_LVDS=60mA(10mils) T24 0.1U/10V_4X
AJ23 VCCCORE[12] R2190 *SHORT_4 +VCCDPLL_CPY AL29 VCCSUS3_3[8]
+1.05V
LVDS
AJ26 VCCCORE[13] AM37 L3 PIV@0.1uh_8_250MA C2051 VCCIO[14] V23
USB
+1.05V +1.05V_VCCAPLL_EXP AJ27 VCCCORE[14] VCCTX_LVDS[1] *10U/6.3V_6X VCCSUS3_3[9]
AJ29 VCCCORE[15] AM38 R2236 *OEV@0_4 +VCCSUS1 AL24 V24
VCCCORE[16] VCCTX_LVDS[2] DCPSUS[3] VCCSUS3_3[10] +1.05V
L4 *1uh_6_25MA AJ31 C2050 C2052 C2053
VCCCORE[17] AP36 PIV@0.01U/25V_4X PIV@0.01U/25V_4X *PIV@10U/6.3V_6X P24 +3V_VCCAUBG
VCCTX_LVDS[3] C2059 VCCSUS3_3[6] C2055
C2054 AP37 *1U/6.3V_4X AA19 *1U/6.3V_4X
*10U/6.3V_6X AN19 VCCTX_LVDS[4] VCCASW[1] T26 +VCCAUPLL
VCCIO[28] +1.05V +1.05V_VCCEPW AA21 VCCIO[34]
VCCASW[2]
+3V_VCC_GIO +3V
VccASW =1.01 A(60mils) VCC5REFSUS=1mA
BJ22 AA24 M26 +5V_PCH_VCC5REFSUS R2192 10/F_4 +V5A
+1.05V +1.05V_VCCIO VCCAPLLEXP VCCASW[3] V5REF_SUS
Clock and Miscellaneous

VccIO =2.925 A(140mils) V33 AA26
HVCMOS
AN16 VCC3_3[6] C2064 C2065 C2066 VCCASW[4] AN23 +VCCA_USBSUS C2067 D2004 RB500V-40_100MA
VCCIO[15] DCPSUS[4] +V3A
1U/6.3V_4X 1U/6.3V_4X 1U/6.3V_4X AA27 0.1U/10V_4X
AN17 C2063 VCCASW[5] AN24 +3V_VCCPSUS
C2060 C2061 C2062 VCCIO[16] V34 0.1U/10V_4X +1.1V_VCC_DMI +VTT AA29 VCCSUS3_3[1] C2068
1U/6.3V_4X 1U/6.3V_4X 1U/6.3V_4X VCC3_3[7] VCCASW[6] *1U/6.3V_4X
AN21
VCCIO[17] +VCCAFDI_VRM
AA31
VCCASW[7] V5REF= 1mA
AN26 AC26 P34 +5V_PCH_VCC5REF R2194 10/F_4 +5V
VCCIO[18] C2069 + VCCASW[8] V5REF
AN27 AT16 +VCCAFDI_VRM 1U/6.3V_4X C2073 C2074 C2075 AC27 D2005 RB500V-40_100MA
VCCIO[19] VCCVRM[3] VCCASW[9] +3V
10U/6.3V_6X 10U/6.3V_6X *220U/2.5V_3528P_E35b N20 C2076
VCCSUS3_3[2]
PCI/GPIO/LPC
AP21 AC29 1U/6.3V_4X
+ C2072 VCCIO[20] VCCASW[10]
C2070 C2071 VCCDMI = 42mA(10mils) N22
VCCSUS3_3[3]
1U/6.3V_4X 10U/6.3V_6X *220U/2.5V_3528P_E35b AP23
VCCIO[21] VCCDMI[1]
AT20
C3A AC31
VCCASW[11] VCCSUS3_3 = 119mA
P20 +3V_VCCPSUS +V3A
DMI
AP24 +1.1V_VCC_DMI_CCI +VCC_DMI_CCI +1.05V AD29 VCCSUS3_3[4]
VCCIO
VCCIO[22] VCCASW[12]
C VCCCLKDMI = 20mA(8mils) VCCSUS3_3[5]
P22 C
AP26 AB36 L5 *10uh_8_100MA R2195 *1/F_4 AD31 C2078
VCCIO[23] VCCCLKDMI VCCASW[13] 1U/6.3V_4X
AT24 R2197 *SHORT_4 W21 AA16
+3V +3V_VCC_EXP VCCIO[24] VCCASW[14] VCC3_3[1]
C2077 C2079 VCCPCORE = 28mA
1U/6.3V_4X *10U/6.3V_6X W23 W16 +3V_VCCPCORE
AN33 E3A VCCASW[15] VCC3_3[8] +3V
VCCIO[25] W24 T34
VCCASW[16] VCC3_3[4] +3V
C2080 AN34 AG16 C2081
0.1U/10V_4X VCCIO[26] VCCDFTERM[1] +VCCP_NAND +1.8V W26 0.1U/10V_4X
+1.05V VCCASW[17] C2083
BH29 AG17 W29 0.1U/10V_4X
VCC3_3[3] VCCDFTERM[2] VCCASW[18]
DFT / SPI
VCCPNAND = 190 mA(15mils) W31 AJ2

VCCASW[19] VCC3_3[2] +3V
AJ16 C2082
VCCDFTERM[3] 0.1U/10V_4X R2202 *SHORT_4 W33
+1.05V +VCCAFDI_VRM AP16 VCCASW[20] AF13 C2085
+VCCAFDI_VRM VCCVRM[2] VCCIO[5]
AJ17 0.1U/10V_4X
VCCDFTERM[4] C2086 C2087 0.1U/10V_4X +VCCRTCEXT N16
R2201 *0_4 +1.05V_VCCAPLL_FDI BG6 1U/6.3V_4X DCPRTC AH13 +V1.05S_SATA3
VccAFDIPLL VCCIO[12] +1.05V
+3V_VCCME_SPI +3V_S5 +VCCAFDI_VRM Y49 AH14
+VCCAFDI_VRM VCCVRM[4] VCCIO[13]
+1.05V_VCCDPLL_FDI AP17 R2206 *SHORT_4 C2090
VCCIO[27] V1
FDI
1U/6.3V_4X
VCCSPI AF14
VCCIO[6]
+VTT
AU20 VCCSPI = 20mA(8mils) C2091 65mA(10mils) +1.05V_VCCA_A_DPL BD47
SATA
VCCDMI[2] C2089 1U/6.3V_4X VCCADPLLA AK1 +V1.1LAN_VCCAPLL L6 *10uh_8_100MA +1.05V
VCCAPLLSATA
1U/6.3V_4X 8mA(8mils) +1.05V_VCCA_B_DPL BF47
VCCADPLLB
CougarPoint_R1P0 C2092
R2207 *SHORT_4
VCCVRM[1]
AF11 +VCCAFDI_VRM *10U/6.3V_6X VCCVRM= 114mA(15mils)
+VCCDIFFCLK AF17
+VCCDIFFCLKN AF33 VCCIO[7]
C2093 AF34 VCCDIFFCLKN[1] AC16 +VCC_SATA
VCCDIFFCLKN[2] VCCIO[2] +1.05V
1U/6.3V_4X VCCDIFFCLKN= 55mA(10mils) AG34
+1.05V VCCDIFFCLKN[3]
VCCSSC= 95mA(10mils) VCCIO[3]
AC17
C2094
R2209 *0_4 +V1.05V_SSCVCC AG33 AD17 1U/6.3V_4X
VCCSSC VCCIO[4]
C2095 C2096 0.1U/10V_4X +VCCSST V16 +1.05V_VCCEPW

B DCPSST B
*1U/6.3V_4X VCCME = 1.01A(60mils)
T17 T21
+VTT +V1.05M_VCCSUS V19 DCPSUS[1] VCCASW[22]
DCPSUS[2]
MISC
R2210 *SHORT_4 +VTT_VCCPCPU V21
VCCASW[23]
CPU
BJ8
C2097 C2098 C2099 V_PROC_IO T19
4.7U/6.3V_6X 0.1U/10V_4X *0.1U/10V_4X VCCASW[21]
+3V_RTC VCCSUSHDA= 10mA(8mils)
Internal PLL and CLG Display PLL A/B Analog Power CLG/PIV/OEV A22 P32
RTC
+V3.3A_1.5A_HDA_IO +3V_S5
HDA
VCCRTC VCCSUSHDA
VRMS C2100 C2101 C2102 CougarPoint_R1P0
C2103
*1U/6.3V_4X
C2104
0.1U/10V_4X
+1.05V L7 PIV@10uh_8_100MA +1.05V_VCCA_A_DPL 1U/6.3V_4X 0.1U/10V_4X *0.1U/10V_4X
+
+1.5V +VCCAFDI_VRM C2108 C2109 R2213
*PIV@220U/2.5V_3528P_E35b 1U/6.3V_4X *SHORT_6
R2212 *SHORT_6 L8 *OEV@0_8 +1.05V_VCCA_B_DPL
+
C2105 C2112 C2113 +3V_S5 +V3A +5V_S5 +V5A
*10U/6.3V_6X *PIV@220U/2.5V_3528P_E35b 1U/6.3V_4X
R466 NS3_NDS3@0_6 R464 NS3_NDS3@0_4
1 3 1 3
C459 R17069 Q36 DS3@ME1303_3A C458 R472 Q35 DS3@ME1303_3A
2
Deep Sx power CLG Clock power on CLG
*DS3@0.33U/6.3V_4X DS3@100K_4 *DS3@0.33U/6.3V_4X DS3@100K_4
well core well

A A
R474 R17068
+V3A +3V_DSW
+3V DS3@0_4 DS3@0_4
D2006 *RB500V-40_100MA R2214 *0_6
3
R2215 1/F_4 +3V_SUS_CLKF33_L L9 10uh_8_100MA +3V_SUS_CLKF33
2 5
C2110
10U/6.3V_6X
C2111
1U/6.3V_4X
{7,37} SLP_SUS#
Q38A Q38B Quanta Computer Inc.
DS3@2N7002KDW_115MA DS3@2N7002KDW_115MA
PROJECT : MTT
4
A1A
Cougar Point 5/6
5 4 3 2 1
5 4 3 2 1
IBEX PEAK-M (GND) CLG

12
U2000I
U2000H
H5 AY4 H46
VSS[0] AY42 VSS[159] VSS[259] K18
AA17 AK38 AY46 VSS[160] VSS[260] K26
AA2 VSS[1] VSS[80] AK4 AY8 VSS[161] VSS[261] K39
AA3 VSS[2] VSS[81] AK42 B11 VSS[162] VSS[262] K46
AA33 VSS[3] VSS[82] AK46 B15 VSS[163] VSS[263] K7
D AA34 VSS[4] VSS[83] AK8 B19 VSS[164] VSS[264] L18 D
AB11 VSS[5] VSS[84] AL16 B23 VSS[165] VSS[265] L2
AB7 VSS[11] VSS[90] AL26 F45 VSS[171] VSS[271] M12
AC19 VSS[12] VSS[91] AL27 BB12 VSS[172] VSS[272] P16
AC2 VSS[13] VSS[92] AL31 BB16 VSS[173] VSS[273] M18
AC34 VSS[17] VSS[96] AM11 BB28 VSS[177] VSS[277] M32
AC48 VSS[18] VSS[97] AM14 BB30 VSS[178] VSS[278] M34
AD10 VSS[19] VSS[98] AM36 BB38 VSS[179] VSS[279] M38
AD13 VSS[22] VSS[101] AM45 BC14 VSS[182] VSS[282] M46
AD19 VSS[23] VSS[102] AM46 BC18 VSS[183] VSS[283] M8
AD24 VSS[24] VSS[103] AM7 BC2 VSS[184] VSS[284] N18
AD26 VSS[25] VSS[104] AN2 BC22 VSS[185] VSS[285] P30
AD27 VSS[26] VSS[105] AN29 BC26 VSS[186] VSS[286] N47
AD36 VSS[29] VSS[108] AP12 BC36 VSS[189] VSS[289] T33
AD37 VSS[30] VSS[109] AP19 BC40 VSS[190] VSS[290] P40
AD4 VSS[33] VSS[112] AP32 BD46 VSS[193] VSS[293] P7
AD40 VSS[34] VSS[113] AP38 BD5 VSS[194] VSS[294] R2
AD42 VSS[35] VSS[114] AP4 BE22 VSS[195] VSS[295] R48
AD43 VSS[36] VSS[115] AP42 BE26 VSS[196] VSS[296] T12
AD45 VSS[37] VSS[116] AP46 BE40 VSS[197] VSS[297] T31
AD46 VSS[38] VSS[117] AP8 BF10 VSS[198] VSS[298] T37
C
AD8 VSS[39] VSS[118] AR2 BF12 VSS[199] VSS[299] T4 C
AE2 VSS[40] VSS[119] AR48 BF16 VSS[200] VSS[300] W34
AE3 VSS[41] VSS[120] AT11 BF20 VSS[201] VSS[301] T46
AF10 VSS[42] VSS[121] AT13 BF22 VSS[202] VSS[302] T47
AF12 VSS[43] VSS[122] AT18 BF24 VSS[203] VSS[303] T8
AD14 VSS[44] VSS[123] AT22 BF26 VSS[204] VSS[304] V11
AD16 VSS[45] VSS[124] AT26 BF28 VSS[205] VSS[305] V17
AF16 VSS[46] VSS[125] AT28 BD3 VSS[206] VSS[306] V26
AF19 VSS[47] VSS[126] AT30 BF30 VSS[207] VSS[307] V27
AF29 VSS[51] VSS[130] AT42 BG17 VSS[211] VSS[311] V39
AF4 VSS[54] VSS[133] AU24 BG44 VSS[214] VSS[314] W17
AF42 VSS[55] VSS[134] AU30 BG8 VSS[215] VSS[315] W19
AF46 VSS[56] VSS[135] AV16 BH11 VSS[216] VSS[316] W2
AF8 VSS[59] VSS[138] AV30 BH19 VSS[219] VSS[319] Y12
AG19 VSS[60] VSS[139] AV38 H10 VSS[220] VSS[320] Y38
AG2 VSS[61] VSS[140] AV4 BH27 VSS[221] VSS[321] Y4
AH11 VSS[64] VSS[143] AW14 BH35 VSS[224] VSS[324] Y8
AH3 VSS[65] VSS[144] AW18 BH39 VSS[225] VSS[325] BG29
AH36 VSS[66] VSS[145] AW2 BH43 VSS[226] VSS[328] N24
AH39 VSS[67] VSS[146] AW22 BH7 VSS[227] VSS[329] AJ3
AH40 VSS[68] VSS[147] AW26 D3 VSS[228] VSS[330] AD47
AH42 VSS[69] VSS[148] AW28 D12 VSS[229] VSS[331] B43
AH46 VSS[70] VSS[149] AW32 D16 VSS[230] VSS[333] BE10
AH7 VSS[71] VSS[150] AW34 D18 VSS[231] VSS[334] BG41
AJ19 VSS[72] VSS[151] AW36 D22 VSS[232] VSS[335] G14
AJ21 VSS[73] VSS[152] AW40 D24 VSS[233] VSS[337] H16
B B
AJ24 VSS[74] VSS[153] AW48 D26 VSS[234] VSS[338] T36
AJ33 VSS[75] VSS[154] AV11 D30 VSS[235] VSS[340] BG22
AJ34 VSS[76] VSS[155] AY12 D32 VSS[236] VSS[342] BG24
AK12 VSS[77] VSS[156] AY22 D34 VSS[237] VSS[343] C22
AK3 VSS[78] VSS[157] AY28 D38 VSS[238] VSS[344] AP13
VSS[79] VSS[158] D42 VSS[239] VSS[345] M14
CougarPoint_R1P0 D8 VSS[240] VSS[346] AP3
E18 VSS[241] VSS[347] AP1
E26 VSS[242] VSS[348] BE16
G18 VSS[243] VSS[349] BC16
G20 VSS[244] VSS[350] BG28
G26 VSS[245] VSS[351] BJ28
G28 VSS[246] VSS[352]
G36 VSS[247]
G48 VSS[248]
H12 VSS[249]
H18 VSS[250]
H22 VSS[251]
H24 VSS[252]
H26 VSS[253]
H30 VSS[254]
H32 VSS[255]
H34 VSS[256]
F3 VSS[257]
VSS[258]
CougarPoint_R1P0
A A

PROJECT : MTT

5 4 3 2 1
1 2 3 4 5 6 7 8
DDR
H=8 (Rev)
+1.5VSUS 13
JDIM3001A M_A_DQ[63:0] {4} JDIM3001B
{4} M_A_A[15:0]
M_A_A0 98 5 M_A_DQ5 75 44
M_A_A1 97 A0 DQ0 7 M_A_DQ1 76 VDD1 VSS16 48
A M_A_A7 86 A6 DQ6 18 M_A_DQ3 94 VDD7 VSS22 65 A
M_A_A10 107 A9 DQ9 33 M_A_DQ15 C5564 *3.3P/50V_4C 105 VDD10 VSS25 72
M_A_A11 84 A10/AP DQ10 35 M_A_DQ11 106 VDD11 VSS26 127
PC2100 DDR3 SDRAM SO-DIMM

M_A_A13 119 A12/BC# DQ12 24 M_A_DQ13 112 VDD13 VSS28 133
A15 DQ15 39 M_A_DQ16 123 VDD16 VSS31 139
DQ16 VDD17 VSS32

109 41 M_A_DQ17 124 144
{4} M_A_BS#0 BA0 DQ17 VDD18 VSS33
108 51 M_A_DQ18 145
{4} M_A_BS#1 BA1 DQ18 VSS34
79 53 M_A_DQ23 199 150
{4} M_A_BS#2 BA2 DQ19 +3V VDDSPD VSS35
114 40 M_A_DQ21 151
{4} M_A_CS#0 S0# DQ20 VSS36
121 42 M_A_DQ20 77 155
{4} M_A_CS#1 S1# DQ21 NC1 VSS37
101 50 M_A_DQ22 122 156
{4} M_A_CLKP0 CK0 DQ22 NC2 VSS38
103 52 M_A_DQ19 125 161
{4} M_A_CLKN0 CK0# DQ23 NCTEST VSS39
102 57 M_A_DQ24 162
{4} M_A_CLKP1 CK1 DQ24 VSS40
104 59 M_A_DQ28 R3002 *10K_4 PM_EXTTS#0 198 167
{4} M_A_CLKN1 CK1# DQ25 +3V EVENT# VSS41
73 67 M_A_DQ26 30 168
{4} M_A_CKE0 CKE0 DQ26 {14,26} DDR3_DRAMRST# RESET# VSS42
74 69 M_A_DQ27 172
{4} M_A_CKE1 CKE1 DQ27 VSS43
115 56 M_A_DQ25 173
{4} M_A_CAS# CAS# DQ28 VSS44
110 58 M_A_DQ29 R3004 0_4 SMDDR_VREF_DQ0_R 1 178
{4} M_A_RAS# RAS# DQ29 {6} SMDDR_VREF_DQ0_M3 VREF_DQ VSS45
113 68 M_A_DQ30 SMDDR_VREF_DIMM 126 179
{4} M_A_WE# WE# DQ30 VREF_CA VSS46
R3001 10K_4 DIMM0_SA0 197 70 M_A_DQ31 SMDDR_VREF_DQ0 R3018 *SHORT_4 184
R3003 10K_4 DIMM0_SA1 201 SA0 DQ31 129 M_A_DQ36 VSS47 185
CGCLK_SMB 202 SA1 DQ32 131 M_A_DQ32 2 VSS48 189
{14,29,38} CGCLK_SMB SCL DQ33 VSS1 VSS49
CGDAT_SMB 200 141 M_A_DQ35 3 190
{14,29,38} CGDAT_SMB SDA DQ34 VSS2 VSS50
143 M_A_DQ34 8 195
116 DQ35 130 M_A_DQ33 9 VSS3 VSS51 196
(204P)
{4} M_A_ODT0 ODT0 DQ36 VSS4 VSS52
120 132 M_A_DQ37 13
{4} M_A_ODT1 ODT1 DQ37 VSS5
140 M_A_DQ39 14
B 11 DQ38 142 M_A_DQ38 19 VSS6 B
28 DM0 DQ39 147 M_A_DQ45 20 VSS7
46 DM1 DQ40 149 M_A_DQ44 25 VSS8
63 DM2 DQ41 157 M_A_DQ46 26 VSS9 203
(204P)
DM3 DQ42 VSS10 VTT1 +SMDDR_VTERM

136 159 M_A_DQ42 31 204
153 DM4 DQ43 146 M_A_DQ40 32 VSS11 VTT2
170 DM5 DQ44 148 M_A_DQ41 37 VSS12
187 DM6 DQ45 158 M_A_DQ43 38 VSS13
DM7 DQ46 160 M_A_DQ47 43 VSS14
GND
GND
{4} M_A_DQSP[7:0] DQ47 VSS15
M_A_DQSP0 12 163 M_A_DQ53
M_A_DQSP1 29 DQS0 DQ48 165 M_A_DQ48
205
206
M_A_DQSP5 154 DQS4 DQ52 166 M_A_DQ52 91-93469-285
{4} M_A_DQSN[7:0] DQS7 DQ55
M_A_DQSN0 10 181 M_A_DQ60
M_A_DQSN1 27 DQS#0 DQ56 183 M_A_DQ56
DQS#7 DQ63
91-93469-285
C C
DDR Power Decoupling DDR DDR3 VREF DDR SMBUS DDR

+1.5VSUS CA ISOLATE +3V
SMDDR_VREF_DIMM
SMDDR_VREF_DIMM {14}
C5589 *39P/50V_4N
C5588 *39P/50V_4N C3002 0.1U/10V_4X R3007 *SHORT_4 +SMDDR_VREF

R3005
C3001 4.7U/6.3V_6X 4.7K_4
2
SMDDR_VREF_DQ0_R R3008 *10K/F_4 R3009 *10K/F_4 +1.5VSUS
C3006 4.7U/6.3V_6X
6 1 CGDAT_SMB
{9,29} SDATA
C3003 0.1U/10V_4X
C3046 4.7U/6.3V_6X Q5051A 2N7002KDW_115MA
DDR3 VREF DQ (M1) DDR

C3005 *2.2U/6.3V_4X
C3010 *4.7U/6.3V_6X
+3V R3006
4.7K_4
C3012 *4.7U/6.3V_6X
SMDDR_VREF_DIMM +1.5VSUS
5
C3014 *4.7U/6.3V_6X +SMDDR_VTERM
C3013 0.1U/10V_4X 3 4 CGCLK_SMB
D {9,29} SCLK D
+1.5VSUS
C3016 0.1U/10V_4X C3004 1U/6.3V_4X R3010 Q5051B 2N7002KDW_115MA
C3015 *2.2U/6.3V_4X 1K/F_4
C3017 0.1U/10V_4X C3007 1U/6.3V_4X SMDDR_VREF_DQ0
+ C3019
C3018 0.1U/10V_4X +3V C3009 1U/6.3V_4X
R3011 C3021 *330U/2V_7343P_E9c Quanta Computer Inc.
1K/F_4 0.1U/10V_4X
C3020 0.1U/10V_4X C3023 2.2U/6.3V_4X C3011 1U/6.3V_4X
PROJECT : MTT
C3047 *0.1U/10V_4X A1A
DDR3 DIMM-0
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
DDR
14
H=4 (Rev) +1.5VSUS
JDIM3002A M_B_DQ[63:0] {4}

{4} M_B_A[15:0]
M_B_A0 98 5 M_B_DQ0
M_B_A1 97 A0 DQ0 7 M_B_DQ4 JDIM3002B
A
M_B_A2 96 A1 DQ1 15 M_B_DQ7 75 44 A
M_B_A3 95 A2 DQ2 17 M_B_DQ3 76 VDD1 VSS16 48
M_B_A11 84 A10/AP DQ10 35 M_B_DQ12 100 VDD9 VSS24 71
M_B_A12 83 A11 DQ11 22 M_B_DQ10 C5563 *3.3P/50V_4C 105 VDD10 VSS25 72
M_B_A13 119 A12/BC# DQ12 24 M_B_DQ13 106 VDD11 VSS26 127

A15 DQ15 39 M_B_DQ21 117 VDD14 VSS29 134
109 DQ16 41 118 VDD15 VSS30 138

{4} M_B_BS#0 M_B_DQ17
108 BA0 DQ17 51 M_B_DQ22 123 VDD16 VSS31 139
{4} M_B_BS#1 BA1 DQ18 VDD17 VSS32
{4} M_B_BS#2 79 53 M_B_DQ23 124 144
114 BA2 DQ19 40 M_B_DQ20 VDD18 VSS33 145
{4} M_B_CS#0 S0# DQ20 VSS34
{4} M_B_CS#1
121 42 M_B_DQ16 199 150
S1# DQ21 +3V VDDSPD VSS35
{4} M_B_CLKP0 101 50 M_B_DQ18 151
103 CK0 DQ22 52 M_B_DQ19 77 VSS36 155
{4} M_B_CLKN0 CK0# DQ23 NC1 VSS37
{4} M_B_CLKP1 102 57 M_B_DQ24 122 156
104 CK1 DQ24 59 M_B_DQ29 125 NC2 VSS38 161
{4} M_B_CLKN1 CK1# DQ25 NCTEST VSS39
{4} M_B_CKE0 73 67 M_B_DQ27 162
74 CKE0 DQ26 69 M_B_DQ31 R3012 *10K_4 PM_EXTTS#1 198 VSS40 167
{4} M_B_CKE1 CKE1 DQ27 +3V EVENT# VSS41
{4} M_B_CAS# 115 56 M_B_DQ25 {13,26} DDR3_DRAMRST# 30 168
110 CAS# DQ28 58 M_B_DQ28 RESET# VSS42 172
{4} M_B_RAS# RAS# DQ29 VSS43
{4} M_B_WE#
113 68 M_B_DQ30 173
R3013 10K_4 DIMM1_SA0 197 W E# DQ30 70 M_B_DQ26 R3015 0_4 SMDDR_VREF_DQ1_R 1 VSS44 178
B {6} SMDDR_VREF_DQ1_M3 B
R3014 10K_4 DIMM1_SA1 201 SA0 DQ31 129 M_B_DQ36 126 VREF_DQ VSS45 179
+3V SA1 DQ32 VREF_CA VSS46
{13,29,38} CGCLK_SMB 202 131 M_B_DQ33 SMDDR_VREF_DQ1 R3019 *SHORT_4 184
200 SCL DQ33 141 M_B_DQ35 VSS47 185
{13,29,38} CGDAT_SMB SDA DQ34 {13} SMDDR_VREF_DIMM VSS48
143 M_B_DQ38 2 189
116 DQ35 130 M_B_DQ32 3 VSS1 VSS49 190
{4} M_B_ODT0 ODT0 DQ36 VSS2 VSS50
{4} M_B_ODT1 120 132 M_B_DQ37 8 195
ODT1 DQ37 140 M_B_DQ39 9 VSS3 VSS51 196
(204P)
11 DQ38 142 M_B_DQ34 13 VSS4 VSS52
28 DM0 DQ39 147 M_B_DQ45 14 VSS5
46 DM1 DQ40 149 M_B_DQ41 19 VSS6
SO-DIMMB SPD Address is 0XA4 63 DM2 DQ41 157 M_B_DQ42 20 VSS7
(204P)
136 DM3 DQ42 159 25 VSS8

SO-DIMMB TS Address is 0X34 DM4 DQ43
M_B_DQ46
VSS9
153 146 M_B_DQ44 26 203 +SMDDR_VTERM
170 DM5 DQ44 148 M_B_DQ40 31 VSS10 VTT1 204
187 DM6 DQ45 158 M_B_DQ47 32 VSS11 VTT2
DM7 DQ46 160 M_B_DQ43 37 VSS12
{4} M_B_DQSP[7:0] DQ47 VSS13
M_B_DQSP0 12 163 M_B_DQ55 38
M_B_DQSP1 29 DQS0 DQ48 165 M_B_DQ53 43 VSS14
GND
GND
M_B_DQSP2 47 DQS1 DQ49 175 M_B_DQ54 VSS15
M_B_DQSP3 64 DQS2 DQ50 177 M_B_DQ51
205
206
M_B_DQSP7 188 DQS6 DQ54 176 M_B_DQ52 91-93469-178
{4} M_B_DQSN[7:0] DQS7 DQ55
M_B_DQSN0 10 181 M_B_DQ56
M_B_DQSN1 27 DQS#0 DQ56 183 M_B_DQ57
C
M_B_DQSN5 152 DQS#4 DQ60 182 M_B_DQ61 C
DQS#7 DQ63
91-93469-178
DDR Power Decoupling DDR DDR3 VREF DQ (M1) DDR
+1.5VSUS
C3024 4.7U/6.3V_6X
SMDDR_VREF_DIMM
C3027 4.7U/6.3V_6X
C3025 0.1U/10V_4X +1.5VSUS
C3030 4.7U/6.3V_6X
C3028 *2.2U/6.3V_4X
C3032 *4.7U/6.3V_6X R3016 +1.5VSUS

1K/F_4
C3034 *4.7U/6.3V_6X SMDDR_VREF_DQ1_R SMDDR_VREF_DQ1

D +SMDDR_VTERM D
C3036 0.1U/10V_4X
C3035 *4.7U/6.3V_6X C3026 1U/6.3V_4X + C3042
R3017 C3039
C3038 *2.2U/6.3V_4X 1K/F_4 0.1U/10V_4X *330U/2V_7343P_E9c
C3037 0.1U/10V_4X C3029 1U/6.3V_4X
C3041 0.1U/10V_4X
+3V
C3031 1U/6.3V_4X
C3045 *2.2U/6.3V_4X
PROJECT : MTT
C3043 0.1U/10V_4X C3033 1U/6.3V_4X Size Document Number Rev
C3044 *0.1U/10V_4X A1A
DDR3 DIMM-1
1 2 3 4 5 6 7 8
VGA
PART 1 0F 9
U5000A
15
For MTT UMA Del AA38 PCIE_TX0P Y33 For MTT UMA Del
Y37 PCIE_RX0P Y32
PCIE_RX0N PCIE_TX0N
Y35 W33
Thames and Seymour Power-on sequence
PCIE_RX1P PCIE_TX1P
W36 PCIE_TX1N W32
PCIE_RX1N 1 => +1V_GPU
W38
PCIE_RX2P PCIE_TX2P U33 2 => +3V_D
V37 PCIE_TX2N U32
PCIE_RX2N 3 => +VGPU_CORE,+1.5V_GPU
V35
PCIE_RX3P PCIE_TX3P U30 4 => +1.8V_GPU
U36 PCIE_TX3N U29
PCIE_RX3N
U38 PCIE_TX4P T33

T37 PCIE_RX4P T32
PCIE_RX4N PCIE_TX4N
T35 T30
PEG
PCIE_RX5P PCIE_TX5P
R36 PCIE_TX5N T29
PCIE_RX5N Intel platform: Lane0 ~ Lane15
R38
PCIE_RX6P PCIE_TX6P P33 Brazos platform: Lane12 ~ Lane15
P37 PCIE_TX6N P32
PCIE_RX6N Comal and Sabine platform: Lane8 ~Lane15
P35 PCIE_TX7P P30
N36 PCIE_RX7P P29
PCIE_RX7N PCIE_TX7N
N38 PCIE_TX8P N33

M37 PCIE_RX8P N32
PCIE_RX8N PCIE_TX8N
M35 PCIE_TX9P N30

L36 PCIE_RX9P N29
PCIE_RX9N PCIE_TX9N
L38 PCIE_TX10P L33

K37 PCIE_RX10P L32
PCIE_RX10N PCIE_TX10N
K35 PCIE_TX11P L30

J36 PCIE_RX11P L29
J38 PCIE_TX12P K33

H37 PCIE_RX12P K32
H35 PCIE_TX13P J33

G36 PCIE_RX13P J32
G38 K30
PCI EXPRESS INTERFACE
PCIE_RX14P PCIE_TX14P
F37 PCIE_TX14N K29
PCIE_RX14N
F35 PCIE_TX15P H33

E37 PCIE_RX15P H32
AB35
CLOCK
{9} CLK_PCIE_VGAP
AA36 PCIE_REFCLKP
{9} CLK_PCIE_VGAN PCIE_REFCLKN R5003 *EV@1.69K/F_4 +1V_GPU
CALIBRATION
PCIE_CALR_TX Y30 R5001 *EV@1.27K/F_4
R5000 *EV@10K_4 AH16 PCIE_CALR_RX Y29 R5002 *EV@2K/F_4 +1V_GPU

TEST_PG
{25} PERST#_BUF
PERST#_BUF AA30
PERSTB
PROJECT : MTT
*EV@HEATHROW M2
A1A
Thames_M2/ PEG*16
VGA/CRV/PX4
{18} GENIL_CLK
{18} GENIL_VSYNC
AD29
AC29
MUTI GFX
GENLK_CLK
GENLK_VSYNC
U5000B
PART 2 0F 9
TXCAP_DPA3P
TXCAM_DPA3N
AU24
AV23 EXT_HDMICLK+ {27}
EXT_HDMICLK- {27}
16
TX0P_DPA2P AT25
EXT_HDMITX0P {27}
AJ21 TX0M_DPA2N AR24
AK21 SWAPLOCKA DPA EXT_HDMITX0N {27}
SWAPLOCKB TX1P_DPA1P AU26
EXT_HDMITX1P {27}
TX1M_DPA1N AV25
EXT_HDMITX1N {27}
AR8 TX2P_DPA0P AT27
AU8 DVPCNTL_MVP_0 AR26
EXT_HDMITX2P {27}
DVPCNTL_MVP_1 TX2M_DPA0N EXT_HDMITX2N {27}
AP8
AW8 DVPCNTL_0 TXCBP_DPB3P AR30
AR3 DVPCNTL_1 AT29
DVPCNTL_2 TXCBM_DPB3N
AR1
AU1 DVPCLK AV31
{18} RAM_STRAP0 DVPDATA_0 TX3P_DPB2P
AU3 TX3M_DPB2N AU30
{18} RAM_STRAP1
AW3 DVPDATA_1 DPB
{18} RAM_STRAP2 AP6 DVPDATA_2 AR32
{18} RAM_STRAP3 DVPDATA_3 TX4P_DPB1P
AW5 TX4M_DPB1N AT31
{18} RAM_STRAP4
AU5 DVPDATA_4
AR6 DVPDATA_5 TX5P_DPB0P AT33
AW6 DVPDATA_6 AU32
1.8V GPIO DVPDATA_7 TX5M_DPB0N
AU6
AT7 DVPDATA_8 AU14
DVPDATA_9 TXCCP_DPC3P
AV7 TXCCM_DPC3N AV13
AN7 DVPDATA_10
AV9 DVPDATA_11 AT15
DVPDATA_12 TX0P_DPC2P
AT9 TX0M_DPC2N AR14
AR10 DVPDATA_13
AW10 DVPDATA_14 DPC TX1P_DPC1P AU16
AU10 DVPDATA_15 TX1M_DPC1N AV15
AP10 DVPDATA_16
AV11 DVPDATA_17 AT17
DVPDATA_18 TX2P_DPC0P
AT11 TX2M_DPC0N AR16
AR12 DVPDATA_19
AW12 DVPDATA_20 AU20
DVPDATA_21 TXCDP_DPD3P
AU12 TXCDM_DPD3N AT19
AP12 DVPDATA_22
DVPDATA_23 AT21
TX3P_DPD2P
TX3M_DPD2N AR20
Tempeature function: Connect to EC
GPU_SMBCLK AJ23 DPD TX4P_DPD1P AU22
GPU_SMBDAT AH23 SMBCLK SMBus AV21
SMBDATA TX4M_DPD1N
TX5P_DPD0P AT23
TX5M_DPD0N AR22
+3V_D R5006 *EV@10K/F_4 GPU_SCL AK26
R5007 *EV@10K/F_4 GPU_SDA AJ26 SCL I2C
SDA
R AD39
AD37 EXT_CRT_RED {28}
GENERAL PURPOSE I/O AVSSN#1
AH20
{18} GPU_GPIO0 AH18 GPIO_0 AE36
{18} GPU_GPIO1 GPIO_1 G EXT_CRT_GRN {28}
AN16 AVSSN#2 AD35
{18} GPU_GPIO2 GPIO_2
B AF37
EXT_CRT_BLU {28}
T5027 AH17 AVSSN#3 AE38
AJ17 GPIO_5_AC_BATT
R5133 *OEV@0_4 GPIO_7_BLON AK17 GPIO_6 DAC1 HSYNC AC36
{7,37} LVDS_BKLT
AJ13 GPIO_7_BLON AC38
EXT_HSYNC {28}
{18} GPU_GPIO8 GPIO_8_ROMSO VSYNC EXT_VSYNC {28}
AH15
{18} GPU_GPIO9
{18} GPU_GPIO10
AJ16
AK16
GPIO_9_ROMSI
GPIO_10_ROMSCK AB34
For MTT UMA Del SMBUS power plane isolate
{18} GPU_GPIO11 GPIO_11 RSET R5011 *EV@499/F_4
+3V_D
AL16
{18} GPU_GPIO12
AM16 GPIO_12 AD34 AVDD
{18} GPU_GPIO13 GPIO_13 AVDD
GPIO_7_BLON AM14 AVSSQ AE34
AM13 GPIO_14_HPD2
{47} GFX_CORE_CNTRL0 AK14 GPIO_15_PWRCNTL_0 AC33 VDD1DI
GPIO_16 VDD1DI
R5037 T5003 AG30 VSS1DI AC34
*OEV@10K_4 AN14 GPIO_17_THERMAL_INT
T5026 AM17 GPIO_18_HPD3 R5005
AL13 GPIO_19_CTF NC#1 V13 T5006 *EV@10K/F_4
{47} GFX_CORE_CNTRL1 AJ14 GPIO_20_PWRCNTL_1 U13
{18} GPU_GPIO21 GPIO_21 NC#2
AK13 NC#3 AC31 T5008
{18} GPU_GPIO22 GPIO_22_ROMCSB
2
T5025 AN13 NC#4 AD30 T5010
CLKREQB AC32
NC#5 T5011
NC#6 AD32 T5012 6 1 GPU_SMBCLK
AG32 AF32 {31,37} 3ND_MBCLK
T5013 NC#7 T5014
T5015 AG33 GPIO_29 AA29
GPIO_30 NC#8 T5016 Q5047A *EV@2N7002KDW_115MA
NC#9 AG21
AJ19
AK19 GENERICA +3V_D
AJ20 GENERICB
{18} GPU_GENERICC
AK20 GENERICC
AJ24 GENERICD AF33
GENERICE_HPD4 NC_TSVSSQ R5012 *EV@0_4 NC_TSVSSQ should be tied
AH26 to GND on Thames/Whistler/Seymour
AH24 GENERICF_HPD5 R5004
GENERICG_HPD6 *EV@10K/F_4
PS_0 AM34 R5013 *EV@0_4 PS_0 should be tied to GND on
+1.8V_GPU Thames/Whistler/Seymour
5
T5024 AC30
CEC_1
AK24 PS_1 AD31 3 4 GPU_SMBDAT
R5014
{27} EXT_HDMI_HPD HPD1 MLPS {31,37} 3ND_MBDATA
*EV@499/F_4 Q5047B *EV@2N7002KDW_115MA
GPU_VREFG AH13 PS_2 AG31 PS_1,PS_2, PS_3 are NC on

VREFG Thames/Whistler/Seymour
R5015 C5038 BACO

*EV@249/F_4 R5016 *PX4@0_4 AL21 PS_3 AD33
*EV@0.1U/10V_4X
{25} PX_EN
R5017 *EV@0_4
PX_EN DAC Power
DDC/AUX +1.8V_GPU
DEBUG AM26
DDC1CLK AN26
EV_HDMI_DDCCLK {27}
DAC1 Analog Power
R5018 *EV@1K_4 AD28
TESTEN
DDC1DATA
AM27
EV_HDMI_DDCDAT {27} HDMI 1.8V@18mA
R5019 *EV@5.11K/F_4 AUX1P AL27 AVDD L5000 *EV@BLM15BD121SN1D_300MA
+3V_D AUX1N
T5038 AM23 DDC2CLK AM19
T5042 AN23 JTAG_TRSTB AL19
DDC2DATA C5032 C5033 C5034
T5043 AK23
AL24
JTAG_TDI
JTAG_TCK AN20
For MTT UMA Del LVDS *EV@0.1U/10V_4X *EV@1U/6.3V_4X *EV@4.7U/6.3V_6X
T5044
T5045 AM24 JTAG_TMS AUX2P AM20
JTAG_TDO AUX2N
DDCCLK_AUX3P AL30
EV_CRTDCLK {28}
DDCDATA_AUX3N AM30 DAC1 Digital Power
THERMAL AL29
EV_CRTDDAT {28} CRT 1.8V@117mA
DDCCLK_AUX4P
T5037 AF29 DDCDATA_AUX4N AM29 VDD1DI L5001 *EV@BLM15BD121SN1D_300MA
T5039 AG29 DPLUS
DMINUS DDCCLK_AUX5P AN21
DDCDATA_AUX5N AM21 C5035 C5036 C5037
R5020 *EV@10K/F_4 AK32 *EV@0.1U/10V_4X *EV@1U/6.3V_4X *EV@4.7U/6.3V_6X
+3V_D GPIO_28_FDO
PU:Disable MLPS DDCCLK_AUX6P AK30
PD:Enable MLPS R5021 *EV@10K/F_4 AL31 DDCDATA_AUX6N AK29
1.8V@8mA TS_A
DDCVGACLK AJ30
AJ32 AJ31 EV_CRTDCLK_aux {28}
+1.8V_GPU L5002 *EV@BLM15BD121SN1D_300MA TSVDD DDCVGADATA
AJ33 TSVDD EV_CRTDDAT_aux {28}
on-die thermal sensor power C5039 C5040 TSVSS Quanta Computer Inc.
*EV@4.7U/6.3V_6X *EV@1U/6.3V_4X *EV@HEATHROW M2 PROJECT : MTT
A1A
02_Thames_M2/ GPIO_DP_CRT_I2C
For MTT UMA Del
VGA/GCK/LDV
17
Display phase-locked loop power.
1.8V@75mA Dedicated analog power pin for the display and DISPCLK PLLs. DPE/DPF/LVDS
+1.8V_GPU L5003 *EV@PBY160808T-501Y-N_1.2A DPLL_PVDD
C5042 C5043 C5044 U5000G
*EV@4.7U/6.3V_6X *EV@1U/6.3V_4X *EV@0.1U/10V_4X U5000I PART 7 0F 9

AK27
For MTT UMA Del
VARY_BL
PART 9 0F 9 LVDS CONTROL DIGON AJ27
Display phase-locked loop power.

1V@140mA Dedicated digital power pin for the display PLLs. AM32
DPLL_PVDD XTALIN AV33 GPU_XTALIN C5045 *EV@12P/50V_4C TXCLK_UP_DPF3P AK35
TXCLK_UN_DPF3N AL36
4
3
+1V_GPU L5004 *EV@PBY160808T-501Y-N_1.2A DPLL_VDDC AN31
DPLL_VDDC R5024 Y5000 TXOUT_U0P_DPF2P AJ38
C5046 C5047 C5048 *EV@1M/F_4 *EV@27MHZ_20 TXOUT_U0N_DPF2N AK37
AN32 Brazos use DPF interface
DPLL_PVSS to LVDS display
*EV@4.7U/6.3V_6X *EV@1U/6.3V_4X *EV@0.1U/10V_4X TXOUT_U1P_DPF1P AH35
1
2
XTALOUT AU34 GPU_XTALOUT R5025 *EV@0_4 C5049 *EV@12P/50V_4C TXOUT_U1N_DPF1N AJ36
TXOUT_U2P_DPF0P AG38
TXOUT_U2N_DPF0N AH37
Memory phase-locked loop power. H7
MPLL_PVDD
LVTMDP
1.8V@150mA Dedicated analog power pin for the memory PLLs. H8
MPLL_PVDD TXOUT_U3P AF35
TXOUT_U3N AG36
+1.8V_GPU L5005 *EV@PBY160808T-501Y-N_1.2A MPLL_PVDD XO_IN AW34 T5040
PLLS/XTAL
C5050 C5051 C5052 AM10
SPLL_PVDD
*EV@4.7U/6.3V_6X *EV@1U/6.3V_4X *EV@0.1U/10V_4X TXCLK_LP_DPE3P AP34
TXCLK_LN_DPE3N AR34
AN9 XO_IN2 AW35 T5041
SPLL_VDDC AW37
TXOUT_L0P_DPE2P
TXOUT_L0N_DPE2N AU35
Engine phase-locked loop power. AN10 TXOUT_L1P_DPE1P AR37

SPLL_PVSS
1.8V@75mA Dedicated analog power pin for the engine and UVD PLLs. TXOUT_L1N_DPE1N AU39
+1.8V_GPU L5006 *EV@BLM15BD121SN1D_300MA SPLL_PVDD TXOUT_L2P_DPE0P AP35

CLKTESTA AK10 CLKTESTA TXOUT_L2N_DPE0N AR35
C5053 C5054 C5055 AF30 CLKTESTB AL10 CLKTESTB For MTT UMA Del
AF31 NC_XTAL_PVDD AN36
NC_XTAL_PVSS TXOUT_L3P
*EV@4.7U/6.3V_6X *EV@1U/6.3V_4X *EV@0.1U/10V_4X TXOUT_L3N AP37
C5056 C5057
*EV@0.1U/10V_4X *EV@0.1U/10V_4X
Engine phase-locked loop power. *EV@HEATHROW M2

1V@150mA Dedicated digital power pin for the engine and UVD PLLs. *EV@HEATHROW M2
R5026 R5027
+1V_GPU L5007 *EV@PBY160808T-501Y-N_1.2A SPLL_VDDC *EV@51.1/F_4 *EV@51.1/F_4
C5058 C5059 C5060
*EV@4.7U/6.3V_6X *EV@1U/6.3V_4X *EV@0.1U/10V_4X
DPLL_PVDD R5028 *EV@0_4
R5029 *EV@0_4

PROJECT : MTT
A1A
Thames_M2/ XTAL_LVDS
VGA/VGA-Strap
{16} GPU_GPIO0
R5030
R5031
*EV@10K_4
*EV@10K_4
+3V_D
{16} RAM_STRAP0
R5047
R5048
*Sam@10K_4
*Hyn@10K_4
+1.8V_GPU
18
{16} GPU_GPIO1
R5125 *AMD@10K_4 CONFIGURATION STRAPS -- SEE EACH DATABOOK FOR STRAP DETAILS
R5032 *EV@10K_4 ALLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESE GPIOS ARE USED,
{16} GPU_GPIO2
THEY MUST NOT CONFLICT DURING RESET
R5033 *EV@10K_4 R5049 *AMD@10K_4 +1.8V_GPU
{16} GPU_GPIO9 {16} RAM_STRAP1
R5034 *EV@10K_4 R5050 *Sam@10K_4 STRAPS MLPS GPIO PIN DESCRIPTION OF DEFAULT SETTINGS MB Default Setting(IC internal PD)
{16} GPU_GPIO11
R5035 *EV@10K_4 R5134 *Hyn@10K_4
{16} GPU_GPIO12
MLPS_DISABLE NA GPIO_28_FDO Enable MLPS, NA for Thames/Whistler/Seymour 1
R5036 *EV@10K_4 0: Enable MLPS, disable GPIO PINSTRAP
{16} GPU_GPIO13
1: Disable MLPS, enable GPIO PINSTRAP
R5038 *EV@10K_4 R5051 *2G@10K_4 +1.8V_GPU
{16} GPU_GPIO22 {16} RAM_STRAP2
R5039 *EV@10K_4 R5127 *1G8@10K_4 +1.8V_GPU TX_PWRS_ENB PS_1[4] GPIO0 Transmitter Power Savings Enable
{16} GENIL_VSYNC
0: 50% Tx output swing 1
1: Full Tx output swing
For MTT UMA Del R5052 *512M@10K_4
TX_DEEMPH_EN PS_1[5] GPIO1 PCIE Transmitter De-emphasis Enable 1
R5135 *1G4@10K_4 0: Tx de-emphasis disabled
R5043 *EV@10K_4 1: Tx de-emphasis enabled
{16} GENIL_CLK
R5151 *4G@10K_4
R5044 *EV@10K_4 BIF_GEN3_EN_A GPIO2 PCIE Gen3 Enable (NOTE: RESERVED for Thames/Whistler/Seymour) 0
{16} GPU_GPIO8 PS_1[1]
0: GEN3 not supported at power-on
R5045 *EV@10K_4 1: GEN3 supported at power-on
{16} GPU_GPIO21
R5053 *1G4@10K_4 +1.8V_GPU
{16} RAM_STRAP3
R5046 *EV@10K_4 BIF_VGA DIS GPIO9 VGA Control 0
{16} GPU_GENERICC PS_2[4]
R5128 *2G@10K_4 +1.8V_GPU 0: VGA controller capacity enabled
R5145 *EV@10K_4
{16} GPU_GPIO10 1: VGA controller capacity disabled (for multi-GPU)
R5054 *512M@10K_4
R5152 *1G8@10K_4 ROMIDCFG[2:0] PS_0[3..1] GPIO[13:11] Serial ROM type or Memory Aperture Size Select
R5153 *4G@10K_4 XXX
If GPIO22 = 0, defines memory aperture size
If GPIO22 = 1, defines ROM type
100 - 512Kbit M25P05A (ST)
R5055 *4G@10K_4 +1.8V_GPU 101 - 1Mbit M25P10A (ST)
{16} RAM_STRAP4
101 - 2Mbit M25P20 (ST)
R5056 *512M@10K_4 101 - 4Mbit M25P40 (ST)
101 - 8Mbit M25P80 (ST)
100 - 512Kbit Pm25LV512 (Chingis)
R5154 *1G4@10K_4 101 - 1Mbit Pm25LV010 (Chingis)
For MTT UMA Del BIOS_ROM_EN PS_2[3] GPIO22 Enable external BIOS ROM device 0
0: Disabled
R5156 *2G@10K_4 1: Enabled
AUD[1] NA HSYNC 00 - No audio function XX

AUD[0] NA VSYNC 01 - Audio for DP only
10 - Audio for DP and HDMI if dongle is detected
11 - Audio for both DP and HDMI
HDMI must only be enabled on systems that are legally entitled. It is the
responsibility of the system designer to ensure that the system is entitled to
support this feature.
CEC_DIS PS_0[4] GENLK_VSYNC Enable CEC function. Reserved for Thames/Whistler/Seymour 0

0: Disabled
1: Enabled
DDR3 Memory TYPE Size Vendor

RAM_STRAP4 RAM_STRAP3 RAM_STRAP2 RAM_STRAP1 RAM_STRAP0 NOTE: ALLOW FOR PULLUP PADS FOR THE RESERVED STRAPS BUT DO NOT INSTALL RESISTOR
Vendor Vendor P/N STN B/S P/N Size IF THESE GPIOS ARE USEED, THEY MUST KEEP LOW AND NOT CONFLICT DURING RESET
DVPDATA_4 DVPDATA_3 DVPDATA_2 DVPDATA_1 DVPDATA_0
RESERVED PS_1[3] GENLK_CLK Reserved 0
RESERVED PS_1[2] GPIO8 Reserved 0
H5TQ1G63DFR-11C AKD5LZWTW02 *4 512MB 512@ & Hyn@
(64M*16) 0 0 0 0 0 RESERVED
RESERVED
NA
NA
GPIO21
GENERICC
Reserved
Reserved (for Thames/Whistler/Seymour only)
0
0
Hynix
AKD5LZWTW02 *8 1GB 1G8@ & Hyn@
0 0 1 0 0 AUD_PORT_CONN_PINSTRAP[2] PS_3[5] NA STRAPS TO INDICATE THE NUMBER OF AUDIO CAPABLE DISPLAY OUTPUTS XXX
AUD_PORT_CONN_PINSTRAP[1] PS_3[4] NA 111 = 0 usable endpoints
NA 110 = 1 usable endpoints
AUD_PORT_CONN_PINSTRAP[0] PS_0[5]
H5TQ2G63BFR-11C AKD5MGWTW00 * 4 1GB 0 0 101 = 2 usable endpoints
0 1 0 1G4@ & Hyn@ 100 = 3 usable endpoints
(128M*16) 011 = 4 usable endpoints
010 = 5 usable endpoints
001 = 6 usable endpoints
AKD5MGWTW00 * 8 2GB 0 1 1 0 0 2G@ & Hyn@

000 = all endpoints are usable
H5TQ4G****** 4GB 1 0 0 0 0 4G@ & Hyn@ System Memory Aperture size

(256M*16) AK************* *8
GPIO22 GPIO13 GPIO12 GPIO11

512@ & Sam@ BIOSROM ROMIDCFG2 ROMIDCFG1 ROMIDCFG0
K4W1G1646G-BC11 AKD5EGGT500 *4 512MB 0 0 0 0 1
(64M*16)
1G8@ & Sam@ 0 128M 0 0 0
AKD5EGGT500 *8 1GB 0 0 1 0 1 0 256M 0 0 1
Samsung 0 1 0 0 1 1G4@ & Sam@ 0 64M 0 1 0
K4W2G1646C-HC11 AKD5MGWT500 * 4 1GB
(128M*16) 0 32M 0 1 1
0 1 1 0 1 2G@ & Sam@
AKD5MGWT500 * 8 2GB
K4W4G****** 1 0 0 0 1 4G@ & Sam@

(256M*16) AK************* *8 4GB
23EY2387MC11 AKD5EZWT700 *4 0 0 0 1 0 512@ & AMD@

512MB
(64M*16)
AKD5EZWT700 *8 1G8@ & AMD@

1GB 0 0 1 1 0
AMD 1GB 1G4@ & AMD@
23EY4187MC11 AKD5DZWT700 *4 0 1 0 1 0
(128M*16)
AKD5DZWT700 * 8 0 1 1 2G@ & AMD@

2GB 1 0
23EY********** 4G@ & AMD@
(256M*16) AK************* *8 4GB 1 0 0 1 0
PROJECT : MTT
A1A
Thames_M2/ STRAPS_Thermal
VGA
19
U5000E
PCIe IO power. +1.8V_GPU
+1.5V_GPU
PART 5 0F 9
(1.8V@440mA)
(1.5V@2.2A / DDR3 128bits 900MHz) MEM I/O
AC7 NC_PCIE_VDDR AA31 PCIE_VDDR L5008 *EV@HCB1608KF-181T15_1.5A
AD11 VDDR1 AA32
VDDR1 NC_PCIE_VDDR
AF7 NC_PCIE_VDDR AA33
C5062 C5063 C5064 C5065 AG10 VDDR1 AA34 C5066 C5067 C5068 C5069 C5070
VDDR1 NC_PCIE_VDDR
*EV@4.7U/6.3V_6X *EV@4.7U/6.3V_6X *EV@4.7U/6.3V_6X *EV@4.7U/6.3V_6X AJ7 NC_PCIE_VDDR W30 *EV@0.01U/25V_4X *EV@0.1U/10V_4X *EV@1U/6.3V_4X *EV@1U/6.3V_4X *EV@4.7U/6.3V_6X
AK8 VDDR1 Y31
VDDR1 NC_PCIE_VDDR
AL9 NC_BIF_VDDC V28
G11 VDDR1 W29
VDDR1 NC_BIF_VDDC
G14 PCIE_PVDD AB37
VDDR1
PCIE
G17
G20 VDDR1 G30
VDDR1 PCIE_VDDC
C5071 C5084 C5072 C5073 C5074 C5085 C5075 G23 PCIE_VDDC G31 PCIe digital power supply. +1V_GPU
*EV@1U/6.3V_4X *EV@1U/6.3V_4X *EV@1U/6.3V_4X *EV@1U/6.3V_4X *EV@1U/6.3V_4X *EV@1U/6.3V_4X *EV@1U/6.3V_4X G26 VDDR1 H29
VDDR1 PCIE_VDDC
G29 PCIE_VDDC H30
H10 VDDR1 J29
VDDR1 PCIE_VDDC
J7 PCIE_VDDC J30
J9 VDDR1 L28 C5076 C5077 C5078 C5079 C5086 C5087
VDDR1 PCIE_VDDC
K11 PCIE_VDDC M28 *EV@1U/6.3V_4X *EV@1U/6.3V_4X *EV@1U/6.3V_4X *EV@1U/6.3V_4X *EV@1U/6.3V_4X *EV@4.7U/6.3V_6X
K13 VDDR1 N28
VDDR1 PCIE_VDDC
C5080 C5081 C5082 C5083 K8 PCIE_VDDC R28
*EV@0.1U/10V_4X *EV@0.1U/10V_4X *EV@0.1U/10V_4X *EV@0.1U/10V_4X L12 VDDR1 T28
VDDR1 PCIE_VDDC
L16 PCIE_VDDC U28
L21 VDDR1 +BIF_VDDC
L23 VDDR1 Separate core power for the PCIe bus logic.
L26 VDDR1 N27 In non-BACO designs, connect to VDDC.
VDDR1 BIF_VDDC In BACO designs, must be the same voltage as VDDC when the GPU is operating,
L7
VDDR1 BACO BIF_VDDC T27
M11
C5088 C5089 C5090 C5091 N11 VDDR1 C5092 C5093
*EV@0.1U/10V_4X *EV@0.1U/10V_4X *EV@0.1U/10V_4X *EV@0.1U/10V_4X P7 VDDR1 AA15 *EV@1U/6.3V_4X *EV@4.7U/6.3V_6X
VDDR1 VDDC
R11
VDDR1 CORE VDDC AA17
U11 VDDC AA20
U7 VDDR1 AA22
VDDR1 VDDC
Y11 VDDC AA24
Y7 VDDR1 AA27 Dedicated core power, provides power to the internal logic.
VDDR1 VDDC +VGPU_CORE
VDDC AB16
Level translation between core and I/O, VDDC AB18 (0.9~1V@30A)
excluding memory receivers. VDDC AB21
VDDC AB23
(1.8V@17mA) VDDC AB26
LEVEL AB28 C5094 C5095 C5096 C5097 C5098
TRANSLATION VDDC
L5009 *EV@BLM15BD121SN1D_300MA VDDC_CT AF26 VDDC AC17 *EV@1U/6.3V_4X *EV@1U/6.3V_4X *EV@1U/6.3V_4X *EV@1U/6.3V_4X *EV@1U/6.3V_4X
+1.8V_GPU VDD_CT
AF27 VDDC AC20
AG26 VDD_CT AC22
VDD_CT VDDC
C5099 C5100 C5101 AG27 VDDC AC24
I/O power for 3.3-V pins, such as GPIOs. *EV@4.7U/6.3V_6X *EV@1U/6.3V_4X *EV@0.1U/10V_4X VDD_CT AC27
VDDC
VDDC AD18
(3.3V@60mA) VDDC AD21
AF23
I/O AD23
VDDR3 VDDC
L5010 *EV@FCM1005KF-221T03_300MA VDDR3 AF24 VDDC AD26
+3V_D VDDR3
AG23 VDDC AF17 C5102 C5103 C5104 C5105 C5106 C5107 C5108 C5109 C5110 C5111
AG24 VDDR3 AF20 *EV@1U/6.3V_4X *EV@1U/6.3V_4X *EV@1U/6.3V_4X *EV@1U/6.3V_4X *EV@1U/6.3V_4X *EV@1U/6.3V_4X *EV@1U/6.3V_4X *EV@1U/6.3V_4X *EV@1U/6.3V_4X *EV@1U/6.3V_4X
VDDR3 VDDC
C5112 C5113 C5114 VDDC AF22
*EV@4.7U/6.3V_6X *EV@1U/6.3V_4X *EV@1U/6.3V_4X VDDC AG16
AD12
DVP AG18
VDDR4 VDDC
AF11
Power for all DVP pins; DVPDATA_[23:0]—DVO or GPIO. AF12 VDDR4 AH22
VDDR4 VDDC
(1.8V@170mA) AF13 VDDC AH27
VDDR4 AH28
VDDC
L5011 *EV@FCM1005KF-221T03_300MA VDDR4 VDDC M26
+1.8V_GPU
AF15 VDDC N24 C5115 C5116 C5117 C5118 C5119 C5120 C5121 C5122 C5123 C5124
AG11 VDDR4 R18 *EV@4.7U/6.3V_6X *EV@4.7U/6.3V_6X *EV@4.7U/6.3V_6X *EV@4.7U/6.3V_6X *EV@4.7U/6.3V_6X *EV@4.7U/6.3V_6X *EV@4.7U/6.3V_6X *EV@4.7U/6.3V_6X *EV@4.7U/6.3V_6X *EV@4.7U/6.3V_6X
VDDR4 VDDC
C5125 C5126 C5127 AG13 VDDC R21
*EV@4.7U/6.3V_6X *EV@1U/6.3V_4X *EV@0.1U/10V_4X AG15 VDDR4 R23
VDDR4 VDDC
VDDC R26
VDDC T17
VDDC T20
VDDC T22
VDDC T24
VDDC U16
VDDC U18
VDDC U21
VDDC U23
VDDC U26
VDDC V17
VDDC V20
VDDC V22
VDDC V24
VDDC V27 Isolated (clean) core power for the l/O logic.
VDDC Y16
VDDC Y18 (0.9V~1V@3.8A / DDR3 128bits 900MHz)
Y21 +VGPU_CORE
VDDC
VDDC Y23
VDDC Y26
VDDC Y28 L5012 *EV@HCB1608KF-121T30_3A
VDDCI AA13 VDDCI L5013 *EV@HCB1608KF-121T30_3A

VDDCI AB13
VDDCI AC12
VDDCI AC15 C5128 C5129 C5130 C5131
VDDCI AD13 *EV@1U/6.3V_4X *EV@1U/6.3V_4X *EV@1U/6.3V_4X *EV@1U/6.3V_4X
VDDCI AD16
VDDCI M15
VDDCI M16
VDDCI M18
VOLTAGE M23
ISOLATED
VDDCI
CORE I/O
SENESE VDDCI N13

R9532 *EV@0_4 AF28 VDDCI N15
{47} GPU_CORE_SEN
R9533 *EV@0_4 FB_VDDC N17 C5132 C5133 C5134 C5135 C5136 C5137
{47} GPU_CORE_RTN VDDCI
VDDCI N20 *EV@4.7U/6.3V_6X *EV@4.7U/6.3V_6X *EV@4.7U/6.3V_6X *EV@1U/6.3V_4X *EV@1U/6.3V_4X *EV@1U/6.3V_4X
AG28 VDDCI N22
FB_VDDCI R12
VDDCI
VDDCI R13
AH29 VDDCI R16
FB_GND
VDDCI T12
T15
VDDCI
V15
VDDCI
VDDCI Y13 PROJECT : MTT
A1A
Thames_M2/ MainPower
*EV@HEATHROW M2
VGA
20
DP/TMDS/LVDS Transmitter Power
0.935V@222mA per port
U5000H
(1V@222mA)
PART 8 0F 9
DPAB_VDD10 L5014 *EV@PBY160808T-501Y-N_1.2A +1V_GPU
DP_VDDR DP_VDDC
DP/TMDS/LVDS Transmitter Power DP_VDDC AP31 C5141 C5142 C5143
DP_VDDC AP32
DP mode: 1.8V@188mA per port DP_VDDC AN33 *EV@4.7U/6.3V_6X *EV@1U/6.3V_4X *EV@0.1U/10V_4X
HDMI mode: 1.8V@237mA per port DP_VDDC AP33
AN24 (1V@222mA)
AP24 DP_VDDR AP13
(1.8V@237mA) DP_VDDR DP_VDDC
AP25 DP_VDDC AT13 DPCD_VDD10 L5016 *EV@PBY160808T-501Y-N_1.2A
DP_VDDR +1V_GPU
+1.8V_GPU L5015 *EV@PBY160808T-501Y-N_1.2A DPAB_VDD18 AP26 DP_VDDC AP14
AU28 DP_VDDR AP15 C5144 C5145 C5146
DP_VDDR DP_VDDC
AV29
C5138 C5139 C5140 DP_VDDR DP_VDDC AL33 *EV@4.7U/6.3V_6X *EV@1U/6.3V_4X *EV@0.1U/10V_4X
*EV@4.7U/6.3V_6X *EV@1U/6.3V_4X *EV@0.1U/10V_4X DP_VDDC AM33
AP20 DP_VDDC AK33 (1V@222mA)
AP21 DP_VDDR AK34
DP_VDDR DP_VDDC
(1.8V@237mA) AP22 DPEF_VDD10 L5017 *EV@PBY160808T-501Y-N_1.2A
DP_VDDR +1V_GPU
AP23
L5018 *EV@PBY160808T-501Y-N_1.2A DPCD_VDD18 AU18 DP_VDDR C5147 C5148 C5149
+1.8V_GPU DP_VDDR
AV19 DP GND
DP_VDDR *EV@4.7U/6.3V_6X *EV@1U/6.3V_4X *EV@0.1U/10V_4X
C5150 C5151 C5152 DP_VSSR AN27
*EV@4.7U/6.3V_6X *EV@1U/6.3V_4X *EV@0.1U/10V_4X AH34 DP_VSSR AP27
AJ34 DP_VDDR AP28
DP_VDDR DP_VSSR
(1.8V@237mA) AF34 DP_VSSR AW24
AG34 DP_VDDR AW26
DP_VDDR DP_VSSR
AM37 DP_VSSR AN29
L5019 *EV@PBY160808T-501Y-N_1.2A DPEF_VDD18 AL38 DP_VDDR DP_VSSR AP29
+1.8V_GPU DP_VDDR
DP_VSSR AP30
DP_VSSR AW30
C5155 DP_VSSR AW32
*EV@0.1U/10V_4X DP_VSSR AN17
DP_VSSR AP16
AP17 +1V_GPU
For MTT UMA Del DP_VSSR
DP_VSSR AW14
DP_VSSR AW16
DP_VSSR AN19
DP_VSSR AP18
DP_VSSR AP19 C5584 C5585
DP_VSSR AW20 *EV@39P/50V_4N *EV@39P/50V_4N
CALIBRATION DP_VSSR AW22
DP_VSSR AN34
DP_VSSR AP39
R5057 *EV@150/F_4 AW28 DP_VSSR AR39
DPAB_CALR AU37
DP_VSSR
DP_VSSR AF39
DP_VSSR AH39
R5058 *EV@150/F_4 AW18 DP_VSSR AK39
DPCD_CALR AL34
DP_VSSR
DP_VSSR AV27
DP_VSSR AR28
AM39 DP_VSSR AV17
DPEF_CALR DP_VSSR AR18
DP_VSSR AN38
For MTT UMA Del DP_VSSR AM35
*EV@HEATHROW M2

PROJECT : MTT
A1A
Thames_M2/ DP_Powers
VGA
AB39
U5000F
PART 6 0F 9
A3
21
PCIE_VSS GND
E39 GND A37
F34 PCIE_VSS GND AA16
F39 PCIE_VSS AA18
PCIE_VSS GND
G33 GND AA2
G34 PCIE_VSS AA21
PCIE_VSS GND
H31 GND AA23
H34 PCIE_VSS AA26
PCIE_VSS GND
H39 GND AA28
J31 PCIE_VSS AA6
PCIE_VSS GND
J34 GND AB12
K31 PCIE_VSS AB15
PCIE_VSS GND
K34 GND AB17
K39 PCIE_VSS AB20
PCIE_VSS GND
L31 GND AB22
L34 PCIE_VSS AB24
PCIE_VSS GND
M34 GND AB27
M39 PCIE_VSS GND AC11
N31 PCIE_VSS AC13
PCIE_VSS GND
N34 GND AC16
P31 PCIE_VSS AC18
PCIE_VSS GND
P34 GND AC2
P39 PCIE_VSS AC21
PCIE_VSS GND
R34 GND AC23
T31 PCIE_VSS AC26
PCIE_VSS GND
T34 GND AC28
T39 PCIE_VSS GND AC6
U31 PCIE_VSS AD15
PCIE_VSS GND
U34 GND AD17
V34 PCIE_VSS AD20
PCIE_VSS GND
V39 GND AD22
W31 PCIE_VSS GND AD24
W34 PCIE_VSS AD27
PCIE_VSS GND
Y34 GND AD9
Y39 PCIE_VSS GND AE2
PCIE_VSS AE6
GND
GND AF10
GND AF16
GND AF18
GND AF21
GND GND AG17
F15 GND AG2
F17 GND AG20
GND GND
F19 GND AG22
F21 GND AG6
GND GND
F23 GND AG9
F25 GND AH21
GND GND
F27 GND AJ10
F29 GND AJ11
GND GND
F31 GND AJ2
F33 GND AJ28
GND GND
F7 GND AJ6
F9 GND GND AK11
G2 GND AK31
GND GND
G6 GND AK7
H9 GND AL11
GND GND
J2 GND AL14
J27 GND AL17
GND GND
J6 GND AL2
J8 GND GND AL20
K14 GND
K7 GND AL23
GND GND
L11 GND AL26
L17 GND AL32
GND GND
L2 GND AL6
L22 GND AL8
GND GND
L24 GND AM11
L6 GND GND AM31
M17 GND AM9
GND GND
M22 GND AN11
M24 GND AN2
GND GND
N16 GND AN30
N18 GND GND AN6
N2 GND AN8
GND GND
N21 GND AP11
N23 GND AP7
GND GND
N26 GND AP9
N6 GND GND AR5
R15 GND B11
GND GND
R17 GND B13
R2 GND B15
GND GND
R20 GND B17
R22 GND B19
GND GND
R24 GND B21
R27 GND B23
GND GND
R6 GND B25
T11 GND GND B27
T13 GND GND B29
T16 GND B31
GND GND
T18 GND B33
T21 GND B7
GND GND
T23 GND B9
T26 GND GND C1
U15 GND C39
GND GND
U17 GND E35
U2 GND E5
GND GND
U20 GND F11
U22 GND F13
GND GND
U24
U27 GND
U6 GND
V11 GND
V16 GND
V18 GND
V21 GND
V23 GND
V26 GND
W2 GND
W6 GND
Y15 GND
Y17 GND
Y20 GND
Y22 GND VSS_MECH A39
Y24 GND AW1
GND VSS_MECH
Y27 VSS_MECH AW39
GND
*EV@HEATHROW M2

PROJECT : MTT
A1A
Thames_M2/ GND
VGA
{24} VMB_DQ[63..0]
{24} VMB_DM[7..0]
VMB_DQ[63..0]
VMB_DM[7..0]
U5000D
22
U5000C VMB_RDQS[7..0]
{24} VMB_RDQS[7..0] PART 4 0F 9
PART 3 0F 9 VMB_WDQS[7..0] GDDR5/DDR3
VMA_DQ[63..0] {24} VMB_WDQS[7..0]
GDDR5/DDR3 VMB_DQ0 C5 MAB0_0/MAB_0 P8 VMB_MA0
{23} VMA_DQ[63..0]
VMA_DQ0 C37 G24 VMA_MA0 VMB_DQ1 C3 DQB0_0 T9 VMB_MA1
DQA0_0 MAA0_0/MAA_0 DQB0_1 MAB0_1/MAB_1
VMA_DM[7..0] VMA_DQ1 C35 MAA0_1/MAA_1 J23 VMA_MA1 VMB_MA[14..0] VMB_DQ2 E3 MAB0_2/MAB_2 P9 VMB_MA2
{23} VMA_DM[7..0]
VMA_DQ2 A35 DQA0_1 H24 VMA_MA2
{24} VMB_MA[14..0]
VMB_DQ3 E1 DQB0_2 N7
DQA0_2 MAA0_2/MAA_2 DQB0_3 MAB0_3/MAB_3 VMB_MA3
VMA_RDQS[7..0] VMA_DQ3 E34 MAA0_3/MAA_3 J24 VMA_MA3 VMB_DQ4 F1 MAB0_4/MAB_4 N8 VMB_MA4
{23} VMA_RDQS[7..0]
VMA_DQ4 G32 DQA0_3 H26 VMA_MA4 VMB_BA0 VMB_DQ5 F3 DQB0_4 N9
DQA0_4 MAA0_4/MAA_4 {24} VMB_BA0 DQB0_5 MAB0_5/MAB_5 VMB_MA5
VMA_WDQS[7..0] VMA_DQ5 D33 MAA0_5/MAA_5 J26 VMA_MA5 VMB_BA1 VMB_DQ6 F5 MAB0_6/MAB_6 U9 VMB_MA6
{23} VMA_WDQS[7..0]
VMA_DQ6 F32 DQA0_5 H21 VMA_MA6
{24} VMB_BA1
VMB_BA2 VMB_DQ7 G4 DQB0_6 U8 VMB_MA7
DQA0_6 MAA0_6/MAA_6 {24} VMB_BA2 DQB0_7 MAB0_7/MAB_7
VMA_DQ7 E32 MAA0_7/MAA_7 G21 VMA_MA7 VMB_DQ8 H5 MAB1_0/MAB_8 Y9 VMB_MA8
VMA_DQ8 D31 DQA0_7 H19 VMA_MA8 VMB_DQ9 H6 DQB0_8 W9 VMB_MA9
VMA_MA[14..0] VMA_DQ9 F30 MAA1_1/MAA_9 H20 VMA_MA9 VMB_DQ10 J4 MAB1_2/MAB_10 AC8 VMB_MA10
{23} VMA_MA[14..0]
VMA_DQ10 C30 DQA0_9 L13 VMA_MA10 VMB_DQ11 K6 DQB0_10 AC9 VMB_MA11
VMA_DQ11 A30 MAA1_3/MAA_11 G16 VMA_MA11 VMB_DQ12 K5 MAB1_4/MAB_12 AA7 VMB_MA12
DQA0_11 DQB0_12
MEMORY INTERFACE B
VMA_BA0 VMA_DQ12 F28 MAA1_4/MAA_12 J16 VMA_MA12 VMB_DQ13 L4 MAB1_5/BA2 AA8 VMB_BA2
{23} VMA_BA0
VMA_BA1 VMA_DQ13 C28 DQA0_12 H16 VMA_BA2 VMB_DQ14 M6 DQB0_13 Y8 VMB_BA0
{23} VMA_BA1 DQA0_13 MAA1_5/MAA_BA2 DQB0_14 MAB1_6/BA0
VMA_BA2 VMA_DQ14 A28 MAA1_6/MAA_BA0 J17 VMA_BA0 VMB_DQ15 M1 MAB1_7/BA1 AA9 VMB_BA1
{23} VMA_BA2
VMA_DQ15 E28 DQA0_14
MAA1_7/MAA_BA1 H17 VMA_BA1 VMB_DQ16 M3 DQB0_15
DQA0_15 DQB0_16
MEMORY INTERFACE A
VMA_DQ16 D27 VMB_DQ17 M5 WCKB0_0/DQMB_0 H3 VMB_DM0
VMA_DQ17 F26 DQA0_16 A32 VMA_DM0 VMB_DQ18 N4 DQB0_17 H1
DQA0_17 WCKA0_0/DQMA_0 DQB0_18 WCKB0B_0/DQMB_1 VMB_DM1
VMA_DQ18 C26 WCKA0B_0/DQMA_1 C32 VMA_DM1 VMB_DQ19 P6 WCKB0_1/DQMB_2 T3 VMB_DM2
VMA_DQ19 A26 DQA0_18 D23 VMA_DM2 VMB_DQ20 P5 DQB0_19 T5
DQA0_19 WCKA0_1/DQMA_2 DQB0_20 WCKB0B_1/DQMB_3 VMB_DM3
VMA_DQ20 F24 WCKA0B_1/DQMA_3 E22 VMA_DM3 VMB_DQ21 R4 WCKB1_0/DQMB_4 AE4 VMB_DM4
VMA_DQ21 C24 DQA0_20
WCKA1_0/DQMA_4 C14 VMA_DM4 VMB_DQ22 T6 DQB0_21 WCKB1B_0/DQMB_5 AF5 VMB_DM5
VMA_DQ22 A24 DQA0_21 A14 VMA_DM5 VMB_DQ23 T1 DQB0_22 AK6
DQA0_22 WCKA1B_0/DQMA_5 DQB0_23 WCKB1_1/DQMB_6 VMB_DM6
VMA_DQ23 E24 WCKA1_1/DQMA_6 E10 VMA_DM6 VMB_DQ24 U4 WCKB1B_1/DQMB_7 AK5 VMB_DM7
VMA_DQ24 C22 DQA0_23
WCKA1B_1/DQMA_7 D9 VMA_DM7 VMB_DQ25 V6 DQB0_24
VMA_DQ25 A22 DQA0_24 VMB_DQ26 V1 DQB0_25 F6 VMB_RDQS0
DQA0_25 DQB0_26 EDCB0_0/QSB_0
VMA_DQ26 F22 EDCA0_0/QSA_0 C34 VMA_RDQS0 VMB_DQ27 V3 EDCB0_1/QSB_1 K3 VMB_RDQS1
VMA_DQ27 D21 DQA0_26 D29 VMA_RDQS1 VMB_DQ28 Y6 DQB0_27 P3
DQA0_27 EDCA0_1/QSA_1 DQB0_28 EDCB0_2/QSB_2 VMB_RDQS2
VMA_DQ28 A20 EDCA0_2/QSA_2 D25 VMA_RDQS2 VMB_DQ29 Y1 EDCB0_3/QSB_3 V5 VMB_RDQS3 QSB[7..0]
VMA_DQ29 F20 DQA0_28
EDCA0_3/QSA_3 E20 VMA_RDQS3 VMB_DQ30 Y3 DQB0_29 EDCB1_0/QSB_4 AB5 VMB_RDQS4
VMA_DQ30 D19 DQA0_29 E16 VMA_RDQS4 VMB_DQ31 Y5 DQB0_30 AH1 VMB_RDQS5
DQA0_30 EDCA1_0/QSA_4 DQB0_31 EDCB1_1/QSB_5
VMA_DQ31 E18 EDCA1_1/QSA_5 E12 VMA_RDQS5 VMB_DQ32 AA4 EDCB1_2/QSB_6 AJ9 VMB_RDQS6
VMA_DQ32 C18 DQA0_31 J10 VMA_RDQS6 VMB_DQ33 AB6 DQB1_0 AM5
DQA1_0 EDCA1_2/QSA_6 DQB1_1 EDCB1_3/QSB_7 VMB_RDQS7
VMA_DQ33 A18 EDCA1_3/QSA_7 D7 VMA_RDQS7 VMB_DQ34 AB1
VMA_DQ34 F18 DQA1_1 VMB_DQ35 AB3 DQB1_2 G7
DQA1_2 DQB1_3 DDBIB0_0/QSB_0B VMB_WDQS0
VMA_DQ35 D17 DDBIA0_0/QSA_0B A34 VMA_WDQS0 VMB_DQ36 AD6 DDBIB0_1/QSB_1B K1 VMB_WDQS1
VMA_DQ36 A16 DQA1_3 E30 VMA_WDQS1 VMB_DQ37 AD1 DQB1_4 P1 VMB_WDQS2
DQA1_4 DDBIA0_1/QSA_1B DQB1_5 DDBIB0_2/QSB_2B
VMA_DQ37 F16 DDBIA0_2/QSA_2B E26 VMA_WDQS2 VMB_DQ38 AD3 DDBIB0_3/QSB_3B W4 VMB_WDQS3 QSB#[7..0]
VMA_DQ38 D15 DQA1_5 C20 VMA_WDQS3 VMB_DQ39 AD5 DQB1_6 AC4 VMB_WDQS4
VMA_DQ39 E14 DDBIA1_0/QSA_4B C16 VMA_WDQS4 VMB_DQ40 AF1 DDBIB1_1/QSB_5B AH3 VMB_WDQS5
VMA_DQ40 F14 DQA1_7 C12 VMA_WDQS5 VMB_DQ41 AF3 DQB1_8 AJ8 VMB_WDQS6
VMA_DQ41 D13 DDBIA1_2/QSA_6B J11 VMA_WDQS6 VMB_DQ42 AF6 DDBIB1_3/QSB_7B AM3 VMB_WDQS7
VMA_DQ42 F12 DQA1_9
DDBIA1_3/QSA_7B F8 VMA_WDQS7 VMB_DQ43 AG4 DQB1_10
VMA_DQ43 A12 DQA1_10 VMB_DQ44 AH5 DQB1_11 T7
VMA_DQ44 D11 DQA1_11
ADBIA0/ODTA0 J21 VMB_DQ45 AH6 DQB1_12 ADBIB0/ODTB0 W7
VMB_ODT0 {24}
VMA_DQ45 F10 DQA1_12
ADBIA1/ODTA1 G19
VMA_ODT0 {23}
VMB_DQ46 AJ4 DQB1_13 ADBIB1/ODTB1 VMB_ODT1 {24}
VMA_DQ46 A10 DQA1_13 VMA_ODT1 {23}
VMB_DQ47 AK3 DQB1_14 L9 VMB_CLK0
VMA_DQ47 C10 DQA1_14 H27 VMA_CLK0 VMB_DQ48 AF8 DQB1_15 CLKB0 L8 VMB_CLK0#
VMB_CLK0 {24}
DQA1_15 CLKA0 VMA_CLK0 {23} DQB1_16 CLKB0B VMB_CLK0# {24}
VMA_DQ48 G13 CLKA0B G27 VMA_CLK0# VMB_DQ49 AF9
VMA_DQ49 H13 DQA1_16 VMA_CLK0# {23}
VMB_DQ50 AG8 DQB1_17 AD8 VMB_CLK1
VMA_DQ50 J13 DQA1_17 J14 VMA_CLK1 VMB_DQ51 AG7 DQB1_18 CLKB1 AD7 VMB_CLK1#
VMB_CLK1 {24}
DQA1_18 CLKA1 VMA_CLK1 {23} DQB1_19 CLKB1B VMB_CLK1# {24}
VMA_DQ51 H11 CLKA1B H14 VMA_CLK1# VMB_DQ52 AK9
VMA_DQ52 G10 DQA1_19 VMA_CLK1# {23}
VMB_DQ53 AL7 DQB1_20 T10 VMB_RAS0#
VMA_DQ53 G8 DQA1_20
RASA0B K23 VMA_RAS0# VMB_DQ54 AM8 DQB1_21 RASB0B Y10 VMB_RAS1# VMB_RAS0# {24}
VMA_DQ54 K9 DQA1_21
RASA1B K19 VMA_RAS1#
VMA_RAS0# {23}
VMB_DQ55 AM7 DQB1_22 RASB1B VMB_RAS1# {24}
VMA_DQ55 K10 DQA1_22 VMA_RAS1# {23}
VMB_DQ56 AK1 DQB1_23 W10 VMB_CAS0#
VMA_DQ56 G9 DQA1_23
CASA0B K20 VMA_CAS0# VMB_DQ57 AL4 DQB1_24 CASB0B AA10 VMB_CAS1# VMB_CAS0# {24}
+1.5V_GPU VMA_DQ57 A8 DQA1_24
CASA1B K17 VMA_CAS1#
VMA_CAS0# {23}
+1.5V_GPU VMB_DQ58 AM6 DQB1_25 CASB1B VMB_CAS1# {24}
VMA_DQ58 C8 DQA1_25 VMA_CAS1# {23}
VMB_DQ59 AM1 DQB1_26 P10 VMB_CS0#
E8 DQA1_26 K24 VMA_CS0# AN4 DQB1_27 CSB0B_0 L10
VMB_CS0# {24}
(0.7*VDDR1) VMA_DQ59
DQA1_27 CSA0B_0 VMA_CS0# {23} (0.7*VDDR1) VMB_DQ60
DQB1_28 CSB0B_1
VMA_DQ60 A6 CSA0B_1 K27 VMB_DQ61 AP3
VMA_DQ61 C6 DQA1_28 VMB_DQ62 AP1 DQB1_29 AD10 VMB_CS1#
Ra R5060 VMA_DQ62 E6 DQA1_29
CSA1B_0 M13 VMA_CS1# Ra R5061 VMB_DQ63 AP5 DQB1_30 CSB1B_0 AC10
VMB_CS1# {24}
*EV@40.2/F_4 VMA_DQ63 A5 DQA1_30
CSA1B_1 K16 VMA_CS1# {23}
*EV@40.2/F_4 DQB1_31 CSB1B_1
DQA1_31 U10 VMB_CKE0
MVREFDA L18 CKEA0 K21 VMA_CKE0 MVREFDB Y12 CKEB0 AA11 VMB_CKE1
VMB_CKE0 {24}
MVREFSA L20 MVREFDA
CKEA1 J20 VMA_CKE1 VMA_CKE0 {23}
MVREFSB AA12 MVREFDB CKEB1 VMB_CKE1 {24}
MVREFSA VMA_CKE1 {23} MVREFSB N10 VMB_WE0#
R5063 *Thames@243/F_4 L27 WEA0B K26 VMA_WE0# WEB0B AB11 VMB_WE1# VMB_WE0# {24}
+1.5V_GPU NC_MEM_CALRN0 VMA_WE0# {23} WEB1B VMB_WE1# {24}
Rb R5062 C5156 R5065 *Seymour@243/F_4 N12 WEA1B L15 VMA_WE1# Rb R5064 C5157
*EV@100/F_4 *EV@1U/6.3V_4X R5066 *Thames@243/F_4 AG12
NC_MEM_CALRN1 VMA_WE1# {23}
*EV@100/F_4 *EV@1U/6.3V_4X
NC_MEM_CALRN2 T8 VMB_MA13
MAB0_8/MAB_13
R5067 *Seymour@243/F_4 M12 MAA0_8/MAA_13 H23 VMA_MA13 MAB1_8/MAB_14 W8 VMB_MA14
R5068 *Thames@243/F_4 M27
NC_MEM_CALRP1 J19 VMA_MA14 U12
MEM_CALRP0 MAA1_8/MAA_14 MAB0_9/MAB_15
R5069 *Thames@243/F_4 AH12 MAA0_9/MAA_15 M21 MAB1_9/RSVD V12
MEM_CALRP2 M20
MAA1_9/RSVD
+1.5V_GPU +1.5V_GPU AH11 GPU_DRAM_RST
DRAM_RST
(0.7*VDDR1) (0.7*VDDR1)
*EV@HEATHROW M2
Ra R5070 Ra R5071
*EV@40.2/F_4 *EV@HEATHROW M2 *EV@40.2/F_4
Rb R5072 C5158
Ball Name Thames Seymour Rb R5073 C5159
*EV@100/F_4 *EV@1U/6.3V_4X *EV@100/F_4 *EV@1U/6.3V_4X
MEM_CALRN0 243R X 25mm (max) 5mm (max) 25mm (max)
MEM_CALRN1 X 243R GPU_DRAM_RST R5074 *EV@10/F_4 R5075 *EV@51.1/F_4

MEM_RST# {23,24}
MEM_CALRN2 243R X R5076 C5160

*EV@4.99K/F_4 *EV@120P/50V_4N
MEM_CALRP0 243R X
MEM_CALRP1 X 243R
MEM_CALRP2 243R X Place all these componets very close to GPU (within 25mm)
and keep all components close to each other
** This basic topology should be used for DRAM_RAT for DDR3/GDDR5
These Capacitors and Resistor values arre an example only

The series R and || cap values will depend on the DRAM loads
and will have to be calculated for differrent Memory, DRAM loads and board
to pass Reset Signal Spec

PROJECT : MTT
A1A
Thames_M2/ MEM Interface
5 4 3 2 1
CHANNEL A: 512MB DDR3 (64M*16*4pcs) <VGA>

23
VMA_DQ[63..0]
{22} VMA_DQ[63..0]
VMA_DM[7..0]
{22} VMA_DM[7..0]
VMA_RDQS[7..0] QSA[7..0]
{22} VMA_RDQS[7..0]
VMA_WDQS[7..0] QSA#[7..0]
{22} VMA_WDQS[7..0]
U5004 U5005
VMA_MA[14..0] U5002 U5003
{22,23} VMA_MA[14..0]
VREFC_VMA3 M8 E3 VMA_DQ54 VREFC_VMA4 M8 E3 VMA_DQ46
VREFC_VMA1 M8 E3 VMA_DQ5 VREFC_VMA2 M8 E3 VMA_DQ12 VREFD_VMA3 H1 VREFCA DQL0 F7 VMA_DQ50 VREFD_VMA4 H1 VREFCA DQL0 F7 VMA_DQ45
VREFD_VMA1 H1 VREFCA DQL0 F7 VMA_DQ0 VREFD_VMA2 H1 VREFCA DQL0 F7 VMA_DQ14 VREFDQ DQL1 F2 VMA_DQ53 VREFDQ DQL1 F2 VMA_DQ44
VREFDQ DQL1 F2 VMA_DQ6 VREFDQ DQL1 F2 VMA_DQ8 VMA_MA0 N3 DQL2 F8 VMA_DQ49 VMA_MA0 N3 DQL2 F8 VMA_DQ40
VMA_MA0 N3 DQL2 F8 VMA_DQ1 VMA_MA0 N3 DQL2 F8 VMA_DQ11 VMA_MA1 P7 A0 DQL3 H3 VMA_DQ52 VMA_MA1 P7 A0 DQL3 H3 VMA_DQ41
{22,23} VMA_MA0 A0 DQL3 A0 DQL3 A1 DQL4 A1 DQL4
VMA_MA1 P7 H3 VMA_DQ4 VMA_MA1 P7 H3 VMA_DQ10 VMA_MA2 P3 H8 VMA_DQ51 VMA_MA2 P3 H8 VMA_DQ42
VMA_MA2 P3 H8 VMA_DQ3 VMA_MA2 P3 H8 VMA_DQ15 VMA_MA3 N2 G2 VMA_DQ55 VMA_MA3 N2 G2 VMA_DQ43
VMA_MA3 N2 G2 VMA_DQ7 VMA_MA3 N2 G2 VMA_DQ9 VMA_MA4 P8 H7 VMA_DQ48 VMA_MA4 P8 H7 VMA_DQ47
D {22,23} VMA_MA3 A3 DQL6 A3 DQL6 A4 DQL7 A4 DQL7 D
VMA_MA4 P8 H7 VMA_DQ2 VMA_MA4 P8 H7 VMA_DQ13 VMA_MA5 P2 VMA_MA5 P2
{22,23} VMA_MA4 A4 DQL7 A4 DQL7 A5 A5
VMA_MA5 P2 VMA_MA5 P2 VMA_MA6 R8 VMA_MA6 R8
{22,23} VMA_MA5 A5 A5 A6 A6
VMA_MA6 R8 VMA_MA6 R8 VMA_MA7 R2 D7 VMA_DQ32 VMA_MA7 R2 D7 VMA_DQ61
{22,23} VMA_MA6 A6 A6 A7 DQU0 A7 DQU0
VMA_MA7 R2 D7 VMA_DQ24 VMA_MA7 R2 D7 VMA_DQ20 VMA_MA8 T8 C3 VMA_DQ36 VMA_MA8 T8 C3 VMA_DQ58
{22,23} VMA_MA7 A7 DQU0 A7 DQU0 A8 DQU1 A8 DQU1
VMA_MA8 T8 C3 VMA_DQ31 VMA_MA8 T8 C3 VMA_DQ19 VMA_MA9 R3 C8 VMA_DQ33 VMA_MA9 R3 C8 VMA_DQ63
VMA_MA9 R3 C8 VMA_DQ27 VMA_MA9 R3 C8 VMA_DQ23 VMA_MA10 L7 C2 VMA_DQ37 VMA_MA10 L7 C2 VMA_DQ56
{22,23} VMA_MA9 A9 DQU2 A9 DQU2 A10/AP DQU3 A10/AP DQU3
VMA_MA10 L7 C2 VMA_DQ28 VMA_MA10 L7 C2 VMA_DQ17 VMA_MA11 R7 A7 VMA_DQ34 VMA_MA11 R7 A7 VMA_DQ60
{22,23} VMA_MA10 A10/AP DQU3 A10/AP DQU3 A11 DQU4 A11 DQU4
VMA_MA11 R7 A7 VMA_DQ25 VMA_MA11 R7 A7 VMA_DQ22 VMA_MA12 N7 A2 VMA_DQ39 VMA_MA12 N7 A2 VMA_DQ59
{22,23} VMA_MA11 A11 DQU4 A11 DQU4 A12/BC DQU5 A12/BC DQU5
VMA_MA12 N7 A2 VMA_DQ29 VMA_MA12 N7 A2 VMA_DQ16 VMA_MA13 T3 B8 VMA_DQ35 VMA_MA13 T3 B8 VMA_DQ62
{22,23} VMA_MA12 A12/BC DQU5 A12/BC DQU5 A13 DQU6 A13 DQU6
VMA_MA13 T3 B8 VMA_DQ26 VMA_MA13 T3 B8 VMA_DQ21 VMA_MA14 T7 A3 VMA_DQ38 VMA_MA14 T7 A3 VMA_DQ57
VMA_MA14 T7 A3 VMA_DQ30 VMA_MA14 T7 A3 VMA_DQ18 M7 M7
{22,23} VMA_MA14 A14 DQU7 A14 DQU7 A15 A15
M7 M7 +1.5V_GPU +1.5V_GPU
A15 +1.5V_GPU A15 +1.5V_GPU
VMA_BA0 M2 B2 VMA_BA0 M2 B2
VMA_BA0 M2 B2 VMA_BA0 M2 B2 VMA_BA1 N8 BA0 VDD#B2 D9 VMA_BA1 N8 BA0 VDD#B2 D9
{22} VMA_BA0 BA0 VDD#B2 BA0 VDD#B2 BA1 VDD#D9 BA1 VDD#D9
VMA_BA1 N8 D9 VMA_BA1 N8 D9 VMA_BA2 M3 G7 VMA_BA2 M3 G7
{22} VMA_BA1 BA1 VDD#D9 BA1 VDD#D9 BA2 VDD#G7 BA2 VDD#G7
VMA_BA2 M3 G7 VMA_BA2 M3 G7 K2 K2
{22} VMA_BA2 BA2 VDD#G7 BA2 VDD#G7 VDD#K2 VDD#K2
K2 K2 K8 K8
VDD#K2 K8 VDD#K2 K8 VDD#K8 N1 VDD#K8 N1
VDD#K8 N1 VDD#K8 N1 VMA_CLK1 J7 VDD#N1 N9 VMA_CLK1 J7 VDD#N1 N9
VDD#N1 VDD#N1 {22} VMA_CLK1 CK VDD#N9 CK VDD#N9
VMA_CLK0 J7 N9 VMA_CLK0 J7 N9 VMA_CLK1# K7 R1 VMA_CLK1# K7 R1
{22} VMA_CLK0 CK VDD#N9 CK VDD#N9 {22} VMA_CLK1# CK VDD#R1 CK VDD#R1
VMA_CLK0# K7 R1 VMA_CLK0# K7 R1 VMA_CKE1 K9 R9 VMA_CKE1 K9 R9
{22} VMA_CLK0# CK VDD#R1 CK VDD#R1 {22} VMA_CKE1 CKE VDD#R9 CKE VDD#R9
VMA_CKE0 K9 R9 VMA_CKE0 K9 R9 +1.5V_GPU +1.5V_GPU
{22} VMA_CKE0 CKE VDD#R9 CKE VDD#R9
+1.5V_GPU +1.5V_GPU
VMA_ODT1 K1 A1 VMA_ODT1 K1 A1
{22} VMA_ODT1 ODT VDDQ#A1 ODT VDDQ#A1
VMA_ODT0 K1 A1 VMA_ODT0 K1 A1 VMA_CS1# L2 A8 VMA_CS1# L2 A8
{22} VMA_ODT0 ODT VDDQ#A1 ODT VDDQ#A1 {22} VMA_CS1# CS VDDQ#A8 CS VDDQ#A8
VMA_CS0# L2 A8 VMA_CS0# L2 A8 VMA_RAS1# J3 C1 VMA_RAS1# J3 C1
{22} VMA_CS0# CS VDDQ#A8 CS VDDQ#A8 {22} VMA_RAS1# RAS VDDQ#C1 RAS VDDQ#C1
VMA_RAS0# J3 C1 VMA_RAS0# J3 C1 VMA_CAS1# K3 C9 VMA_CAS1# K3 C9
{22} VMA_RAS0# RAS VDDQ#C1 RAS VDDQ#C1 {22} VMA_CAS1# CAS VDDQ#C9 CAS VDDQ#C9
VMA_CAS0# K3 C9 VMA_CAS0# K3 C9 VMA_WE1# L3 D2 VMA_WE1# L3 D2
{22} VMA_CAS0# CAS VDDQ#C9 CAS VDDQ#C9 {22} VMA_WE1# WE VDDQ#D2 WE VDDQ#D2
VMA_WE0# L3 D2 VMA_WE0# L3 D2 E9 E9
{22} VMA_WE0# WE VDDQ#D2 WE VDDQ#D2 VDDQ#E9 VDDQ#E9
E9 E9 F1 F1
VDDQ#E9 F1 VDDQ#E9 F1 VMA_RDQS6 F3 VDDQ#F1 H2 VMA_RDQS5 F3 VDDQ#F1 H2
VMA_RDQS0 F3 VDDQ#F1 H2 VMA_RDQS1 F3 VDDQ#F1 H2 VMA_RDQS4 C7 DQSL VDDQ#H2 H9 VMA_RDQS7 C7 DQSL VDDQ#H2 H9
VMA_RDQS3 C7 DQSL VDDQ#H2 H9 VMA_RDQS2 C7 DQSL VDDQ#H2 H9 DQSU VDDQ#H9 DQSU VDDQ#H9
DQSU VDDQ#H9 DQSU VDDQ#H9
VMA_DM6 E7 A9 VMA_DM5 E7 A9
VMA_DM0 E7 A9 VMA_DM1 E7 A9 VMA_DM4 D3 DML VSS#A9 B3 VMA_DM7 D3 DML VSS#A9 B3
C VMA_DM3 D3 DML VSS#A9 B3 VMA_DM2 D3 DML VSS#A9 B3 DMU VSS#B3 E1 DMU VSS#B3 E1 C
DMU VSS#B3 E1 DMU VSS#B3 E1 VSS#E1 G8 VSS#E1 G8
VSS#E1 G8 VSS#E1 G8 VMA_WDQS6 G3 VSS#G8 J2 VMA_WDQS5 G3 VSS#G8 J2
VMA_WDQS0 G3 VSS#G8 J2 VMA_WDQS1 G3 VSS#G8 J2 VMA_WDQS4 B7 DQSL VSS#J2 J8 VMA_WDQS7 B7 DQSL VSS#J2 J8
VMA_WDQS3 B7 DQSL VSS#J2 J8 VMA_WDQS2 B7 DQSL VSS#J2 J8 DQSU VSS#J8 M1 DQSU VSS#J8 M1
DQSU VSS#J8 M1 DQSU VSS#J8 M1 VSS#M1 M9 VSS#M1 M9
VSS#M1 M9 VSS#M1 M9 VSS#M9 P1 VSS#M9 P1
VSS#M9 P1 VSS#M9 P1 MEM_RST# T2 VSS#P1 P9 MEM_RST# T2 VSS#P1 P9
MEM_RST# T2 VSS#P1 P9 MEM_RST# T2 VSS#P1 P9 RESET VSS#P9 T1 RESET VSS#P9 T1
{22,24} MEM_RST# RESET VSS#P9 T1 RESET VSS#P9 T1 VMA_ZQ3 L8 VSS#T1 T9 VMA_ZQ4 L8 VSS#T1 T9
VMA_ZQ1 L8 VSS#T1 T9 VMA_ZQ2 L8 VSS#T1 T9 ZQ VSS#T9 ZQ VSS#T9
ZQ VSS#T9 ZQ VSS#T9
B1 B1
B1 B1 VSSQ#B1 B9 VSSQ#B1 B9
VSSQ#B1 B9 VSSQ#B1 B9 R5079 VSSQ#B9 D1 R5080 VSSQ#B9 D1
R5077 VSSQ#B9 D1 R5078 VSSQ#B9 D1 *Thames@243/F_4 VSSQ#D1 D8 *Thames@243/F_4 VSSQ#D1 D8
*Thames@243/F_4 VSSQ#D1 D8 *Thames@243/F_4 VSSQ#D1 D8 VSSQ#D8 E2 VSSQ#D8 E2
VSSQ#D8 E2 VSSQ#D8 E2 J1 VSSQ#E2 E8 J1 VSSQ#E2 E8
J1 VSSQ#E2 E8 J1 VSSQ#E2 E8 L1 NC#J1 VSSQ#E8 F9 L1 NC#J1 VSSQ#E8 F9
L1 NC#J1 VSSQ#E8 F9 L1 NC#J1 VSSQ#E8 F9 J9 NC#L1 VSSQ#F9 G1 J9 NC#L1 VSSQ#F9 G1
J9 NC#L1 VSSQ#F9 G1 J9 NC#L1 VSSQ#F9 G1 L9 NC#J9 VSSQ#G1 G9 L9 NC#J9 VSSQ#G1 G9
L9 NC#J9 VSSQ#G1 G9 L9 NC#J9 VSSQ#G1 G9 NC#L9 VSSQ#G9 NC#L9 VSSQ#G9
NC#L9 VSSQ#G9 NC#L9 VSSQ#G9 100-BALL 100-BALL
100-BALL 100-BALL SDRAM DDR3 SDRAM DDR3
SDRAM DDR3 SDRAM DDR3 *Thames@VRAM _DDR3 *Thames@VRAM _DDR3
*Thames@VRAM _DDR3 *Thames@VRAM _DDR3
TOP Left BOT Left BOT Right TOP Right

Group-A0 VREF Group-A1 VREF
+1.5V_GPU +1.5V_GPU +1.5V_GPU +1.5V_GPU
B B
R5081 R5082 R5083 R5084
R5085 R5086 R5087 R5088
*Thames@4.99K/F_4 *Thames@4.99K/F_4 *Thames@4.99K/F_4 *Thames@4.99K/F_4
*Thames@4.99K/F_4 *Thames@4.99K/F_4 *Thames@4.99K/F_4 *Thames@4.99K/F_4
VREFC_VMA1 VREFD_VMA1 VREFC_VMA2 VREFD_VMA2
VREFC_VMA3 VREFD_VMA3 VREFC_VMA4 VREFD_VMA4
R5089 C5161 R5090 C5162 R5091 C5163 R5092 C5164

R5093 C5165 R5094 C5166 R5095 C5167 R5096 C5168
*Thames@4.99K/F_4 *Thames@0.1U/10V_4X *Thames@4.99K/F_4 *Thames@0.1U/10V_4X *Thames@4.99K/F_4 *Thames@0.1U/10V_4X *Thames@4.99K/F_4 *Thames@0.1U/10V_4X
*Thames@4.99K/F_4 *Thames@0.1U/10V_4X *Thames@4.99K/F_4 *Thames@0.1U/10V_4X *Thames@4.99K/F_4 *Thames@0.1U/10V_4X *Thames@4.99K/F_4 *Thames@0.1U/10V_4X
MEM_A0 CLK
For MTT UMA Del For MTT UMA Del
MEM_A1 CLK
VMA_CLK0 VMA_CLK1
VMA_CLK0# VMA_CLK1#
R5097 R5098
*Thames@40.2/F_4 *Thames@40.2/F_4 R5099 R5100
*Thames@40.2/F_4 *Thames@40.2/F_4
C5189
*Thames@0.01U/25V_4X C5185
A *Thames@0.01U/25V_4X A

PROJECT : MTT
A1A
VRAM_A: DDR3*4PCS
5 4 3 2 1
5 4 3 2 1
CHANNEL B: 512MB DDR3 (64M*16*4pcs)

{22} VMB_DQ[63..0]
{22} VMB_DM[7..0]
{22} VMB_RDQS[7..0]
VMB_DQ[63..0]
VMB_DM[7..0]
VMB_RDQS[7..0]
VMB_WDQS[7..0]
QSA[7..0]
<VGA>
24
{22} VMB_WDQS[7..0] QSA#[7..0]
U5006 U5007 U5008 U5009
VMB_MA[14..0]
{22,24} VMB_MA[14..0] M8 E3 M8 E3 M8 E3 M8 E3
VREFC_VMB1 VMB_DQ23 VREFC_VMB2 VMB_DQ1 VREFC_VMB3 VMB_DQ55 VREFC_VMB4 VMB_DQ62
VREFD_VMB1 H1 VREFCA DQL0 F7 VMB_DQ16 VREFD_VMB2 H1 VREFCA DQL0 F7 VMB_DQ4 VREFD_VMB3 H1 VREFCA DQL0 F7 VMB_DQ51 VREFD_VMB4 H1 VREFCA DQL0 F7 VMB_DQ61
VREFDQ DQL1 F2 VMB_DQ21 VREFDQ DQL1 F2 VMB_DQ2 VREFDQ DQL1 F2 VMB_DQ54 VREFDQ DQL1 F2 VMB_DQ63
VMB_MA0 N3 DQL2 F8 VMB_DQ17 VMB_MA0 N3 DQL2 F8 VMB_DQ5 VMB_MA0 N3 DQL2 F8 VMB_DQ50 VMB_MA0 N3 DQL2 F8 VMB_DQ60
{22,24} VMB_MA0 A0 DQL3 A0 DQL3 A0 DQL3 A0 DQL3
VMB_MA1 P7 H3 VMB_DQ22 VMB_MA1 P7 H3 VMB_DQ0 VMB_MA1 P7 H3 VMB_DQ52 VMB_MA1 P7 H3 VMB_DQ59
{22,24} VMB_MA1 P3 A1 DQL4 H8 P3 A1 DQL4 H8 P3 A1 DQL4 H8 P3 A1 DQL4 H8
VMB_MA2 VMB_DQ19 VMB_MA2 VMB_DQ7 VMB_MA2 VMB_DQ49 VMB_MA2 VMB_DQ58
{22,24} VMB_MA2 A2 DQL5 A2 DQL5 A2 DQL5 A2 DQL5
VMB_MA3 N2 G2 VMB_DQ20 VMB_MA3 N2 G2 VMB_DQ3 VMB_MA3 N2 G2 VMB_DQ53 VMB_MA3 N2 G2 VMB_DQ57
D {22,24} VMB_MA3 A3 DQL6 A3 DQL6 A3 DQL6 A3 DQL6 D
VMB_MA4 P8 H7 VMB_DQ18 VMB_MA4 P8 H7 VMB_DQ6 VMB_MA4 P8 H7 VMB_DQ48 VMB_MA4 P8 H7 VMB_DQ56
{22,24} VMB_MA4 P2 A4 DQL7 P2 A4 DQL7 P2 A4 DQL7 P2 A4 DQL7
VMB_MA5 VMB_MA5 VMB_MA5 VMB_MA5
{22,24} VMB_MA5 A5 A5 A5 A5
VMB_MA6 R8 VMB_MA6 R8 VMB_MA6 R8 VMB_MA6 R8
{22,24} VMB_MA6 R2 A6 D7 R2 A6 D7 R2 A6 D7 R2 A6 D7
{22,24} VMB_MA7 A7 DQU0 A7 DQU0 A7 DQU0 A7 DQU0
VMB_MA8 T8 C3 VMB_DQ30 VMB_MA8 T8 C3 VMB_DQ10 VMB_MA8 T8 C3 VMB_DQ47 VMB_MA8 T8 C3 VMB_DQ32
VMB_MA9 R3 C8 VMB_DQ28 VMB_MA9 R3 C8 VMB_DQ14 VMB_MA9 R3 C8 VMB_DQ40 VMB_MA9 R3 C8 VMB_DQ36
{22,24} VMB_MA9 L7 A9 DQU2 C2 L7 A9 DQU2 C2 L7 A9 DQU2 C2 L7 A9 DQU2 C2
{22,24} VMB_MA10 A10/AP DQU3 A10/AP DQU3 A10/AP DQU3 A10/AP DQU3
VMB_MA11 R7 A7 VMB_DQ24 VMB_MA11 R7 A7 VMB_DQ12 VMB_MA11 R7 A7 VMB_DQ44 VMB_MA11 R7 A7 VMB_DQ37
{22,24} VMB_MA11 N7 A11 DQU4 A2 N7 A11 DQU4 A2 N7 A11 DQU4 A2 N7 A11 DQU4 A2
{22,24} VMB_MA12 A12/BC DQU5 A12/BC DQU5 A12/BC DQU5 A12/BC DQU5
VMB_MA13 T3 B8 VMB_DQ25 VMB_MA13 T3 B8 VMB_DQ13 VMB_MA13 T3 B8 VMB_DQ43 VMB_MA13 T3 B8 VMB_DQ39
VMB_MA14 T7 A3 VMB_DQ29 VMB_MA14 T7 A3 VMB_DQ11 VMB_MA14 T7 A3 VMB_DQ42 VMB_MA14 T7 A3 VMB_DQ34
{22,24} VMB_MA14 M7 A14 DQU7 M7 A14 DQU7 M7 A14 DQU7 M7 A14 DQU7
A15 +1.5V_GPU A15 +1.5V_GPU A15 +1.5V_GPU A15 +1.5V_GPU
VMB_BA0 M2 B2 VMB_BA0 M2 B2 VMB_BA0 M2 B2 VMB_BA0 M2 B2

{22} VMB_BA0 BA0 VDD#B2 BA0 VDD#B2 BA0 VDD#B2 BA0 VDD#B2
VMB_BA1 N8 D9 VMB_BA1 N8 D9 VMB_BA1 N8 D9 VMB_BA1 N8 D9
{22} VMB_BA1 M3 BA1 VDD#D9 G7 M3 BA1 VDD#D9 G7 M3 BA1 VDD#D9 G7 M3 BA1 VDD#D9 G7
VMB_BA2 VMB_BA2 VMB_BA2 VMB_BA2
{22} VMB_BA2 BA2 VDD#G7 BA2 VDD#G7 BA2 VDD#G7 BA2 VDD#G7
K2 K2 K2 K2
VDD#K2 K8 VDD#K2 K8 VDD#K2 K8 VDD#K2 K8
VDD#K8 N1 VDD#K8 N1 VDD#K8 N1 VDD#K8 N1
VMB_CLK0 J7 VDD#N1 N9 VMB_CLK0 J7 VDD#N1 N9 VMB_CLK1 J7 VDD#N1 N9 VMB_CLK1 J7 VDD#N1 N9
{22} VMB_CLK0 K7 CK VDD#N9 R1 K7 CK VDD#N9 R1 {22} VMB_CLK1 K7 CK VDD#N9 R1 K7 CK VDD#N9 R1
VMB_CLK0# VMB_CLK0# VMB_CLK1# VMB_CLK1#
{22} VMB_CLK0# CK VDD#R1 CK VDD#R1 {22} VMB_CLK1# CK VDD#R1 CK VDD#R1
VMB_CKE0 K9 R9 VMB_CKE0 K9 R9 VMB_CKE1 K9 R9 VMB_CKE1 K9 R9
{22} VMB_CKE0 CKE VDD#R9 CKE VDD#R9 {22} VMB_CKE1 CKE VDD#R9 CKE VDD#R9
VMB_ODT0 K1 A1 VMB_ODT0 K1 A1 VMB_ODT1 K1 A1 VMB_ODT1 K1 A1

{22} VMB_ODT0 L2 ODT VDDQ#A1 A8 L2 ODT VDDQ#A1 A8 {22} VMB_ODT1 L2 ODT VDDQ#A1 A8 L2 ODT VDDQ#A1 A8
VMB_CS0# VMB_CS0# VMB_CS1# VMB_CS1#
{22} VMB_CS0# CS VDDQ#A8 CS VDDQ#A8 {22} VMB_CS1# CS VDDQ#A8 CS VDDQ#A8
VMB_RAS0# J3 C1 VMB_RAS0# J3 C1 VMB_RAS1# J3 C1 VMB_RAS1# J3 C1
{22} VMB_RAS0# K3 RAS VDDQ#C1 C9 K3 RAS VDDQ#C1 C9 {22} VMB_RAS1# K3 RAS VDDQ#C1 C9 K3 RAS VDDQ#C1 C9
VMB_CAS0# VMB_CAS0# VMB_CAS1# VMB_CAS1#
{22} VMB_CAS0# CAS VDDQ#C9 CAS VDDQ#C9 {22} VMB_CAS1# CAS VDDQ#C9 CAS VDDQ#C9
VMB_WE0# L3 D2 VMB_WE0# L3 D2 VMB_WE1# L3 D2 VMB_WE1# L3 D2
{22} VMB_WE0# WE VDDQ#D2 WE VDDQ#D2 {22} VMB_WE1# WE VDDQ#D2 WE VDDQ#D2
E9 E9 E9 E9
VDDQ#E9 F1 VDDQ#E9 F1 VDDQ#E9 F1 VDDQ#E9 F1
VMB_RDQS2 F3 VDDQ#F1 H2 VMB_RDQS0 F3 VDDQ#F1 H2 VMB_RDQS6 F3 VDDQ#F1 H2 VMB_RDQS7 F3 VDDQ#F1 H2
VMB_RDQS3 C7 DQSL VDDQ#H2 H9 VMB_RDQS1 C7 DQSL VDDQ#H2 H9 VMB_RDQS5 C7 DQSL VDDQ#H2 H9 VMB_RDQS4 C7 DQSL VDDQ#H2 H9
DQSU VDDQ#H9 DQSU VDDQ#H9 DQSU VDDQ#H9 DQSU VDDQ#H9
VMB_DM2 E7 A9 VMB_DM0 E7 A9 VMB_DM6 E7 A9 VMB_DM7 E7 A9

VMB_DM3 D3 DML VSS#A9 B3 VMB_DM1 D3 DML VSS#A9 B3 VMB_DM5 D3 DML VSS#A9 B3 VMB_DM4 D3 DML VSS#A9 B3
C C
DMU VSS#B3 E1 DMU VSS#B3 E1 DMU VSS#B3 E1 DMU VSS#B3 E1
VSS#E1 G8 VSS#E1 G8 VSS#E1 G8 VSS#E1 G8
VMB_WDQS2 G3 VSS#G8 J2 VMB_WDQS0 G3 VSS#G8 J2 VMB_WDQS6 G3 VSS#G8 J2 VMB_WDQS7 G3 VSS#G8 J2
VMB_WDQS3 B7 DQSL VSS#J2 J8 VMB_WDQS1 B7 DQSL VSS#J2 J8 VMB_WDQS5 B7 DQSL VSS#J2 J8 VMB_WDQS4 B7 DQSL VSS#J2 J8
DQSU VSS#J8 M1 DQSU VSS#J8 M1 DQSU VSS#J8 M1 DQSU VSS#J8 M1
VSS#M1 M9 VSS#M1 M9 VSS#M1 M9 VSS#M1 M9
VSS#M9 P1 VSS#M9 P1 VSS#M9 P1 VSS#M9 P1
MEM_RST# T2 VSS#P1 P9 MEM_RST# T2 VSS#P1 P9 MEM_RST# T2 VSS#P1 P9 MEM_RST# T2 VSS#P1 P9
{22,23} MEM_RST# RESET VSS#P9 T1 RESET VSS#P9 T1 RESET VSS#P9 T1 RESET VSS#P9 T1
VMB_ZQ1 L8 VSS#T1 T9 VMB_ZQ2 L8 VSS#T1 T9 VMB_ZQ3 L8 VSS#T1 T9 VMB_ZQ4 L8 VSS#T1 T9
ZQ VSS#T9 ZQ VSS#T9 ZQ VSS#T9 ZQ VSS#T9
B1 B1 B1 B1
VSSQ#B1 B9 VSSQ#B1 B9 VSSQ#B1 B9 VSSQ#B1 B9
R5101 VSSQ#B9 D1 R5102 VSSQ#B9 D1 R5103 VSSQ#B9 D1 R5104 VSSQ#B9 D1
VSSQ#D1 D8 VSSQ#D1 D8 VSSQ#D1 D8 VSSQ#D1 D8
*EV@243/F_4 VSSQ#D8 *EV@243/F_4 VSSQ#D8 *EV@243/F_4 VSSQ#D8 *EV@243/F_4 VSSQ#D8
E2 E2 E2 E2
J1 VSSQ#E2 E8 J1 VSSQ#E2 E8 J1 VSSQ#E2 E8 J1 VSSQ#E2 E8
L1 NC#J1 VSSQ#E8 F9 L1 NC#J1 VSSQ#E8 F9 L1 NC#J1 VSSQ#E8 F9 L1 NC#J1 VSSQ#E8 F9
J9 NC#L1 VSSQ#F9 G1 J9 NC#L1 VSSQ#F9 G1 J9 NC#L1 VSSQ#F9 G1 J9 NC#L1 VSSQ#F9 G1
L9 NC#J9 VSSQ#G1 G9 L9 NC#J9 VSSQ#G1 G9 L9 NC#J9 VSSQ#G1 G9 L9 NC#J9 VSSQ#G1 G9
NC#L9 VSSQ#G9 NC#L9 VSSQ#G9 NC#L9 VSSQ#G9 NC#L9 VSSQ#G9
100-BALL 100-BALL 100-BALL 100-BALL
SDRAM DDR3 SDRAM DDR3 SDRAM DDR3 SDRAM DDR3
*EV@VRAM _DDR3 *EV@VRAM _DDR3 *EV@VRAM _DDR3 *EV@VRAM _DDR3
BOT Down TOP Down TOP Up BOT Up
Group-B0 VREF Group-B1 VREF

+1.5V_GPU +1.5V_GPU +1.5V_GPU +1.5V_GPU +1.5V_GPU +1.5V_GPU +1.5V_GPU +1.5V_GPU
B B
R5105 R5106 R5107 R5108 R5109 R5110 R5111 R5112

*EV@4.99K/F_4 *EV@4.99K/F_4 *EV@4.99K/F_4 *EV@4.99K/F_4 *EV@4.99K/F_4 *EV@4.99K/F_4 *EV@4.99K/F_4 *EV@4.99K/F_4
VREFC_VMB1 VREFD_VMB1 VREFC_VMB2 VREFD_VMB2 VREFC_VMB3 VREFD_VMB3 VREFC_VMB4 VREFD_VMB4
R5113 C5213 R5114 C5214 R5115 C5215 R5116 C5216 R5117 C5217 R5118 C5218 R5119 C5219 R5120 C5220
*EV@4.99K/F_4 *EV@0.1U/10V_4X *EV@4.99K/F_4 *EV@0.1U/10V_4X *EV@4.99K/F_4 *EV@0.1U/10V_4X *EV@4.99K/F_4 *EV@0.1U/10V_4X *EV@4.99K/F_4 *EV@0.1U/10V_4X *EV@4.99K/F_4 *EV@0.1U/10V_4X *EV@4.99K/F_4 *EV@0.1U/10V_4X *EV@4.99K/F_4 *EV@0.1U/10V_4X
MEM_B0 CLK For MTT UMA Del For MTT UMA Del
MEM_B1 CLK
VMB_CLK1
VMB_CLK0 VMB_CLK1#
VMB_CLK0#
R5121 R5122
R5123 R5124 *EV@40.2/F_4 *EV@40.2/F_4
*EV@40.2/F_4 *EV@40.2/F_4
A A
C5236
C5237 *EV@0.01U/25V_4X
*EV@0.01U/25V_4X

PROJECT : MTT
A1A
VRAM_B: DDR3*4PCS
5 4 3 2 1
5 4 3 2 1
VGA Power Enable Reverse

PX Platform Reset PX/OEV PX Mode control signal PX4/PX5
25
(Intel --> Low Active)
+3V +3V
+3V
D C5263 *PX4@0.1U/10V_4X D
R5147
*PX@1K_4 R5126
*PX4@10K_4
5
+3V
DGPU_PW R_EN 2
DGPU_PW R_EN {48}
4 PX_MODE
PX_MODE {47,48}
3 1
PX_EN =0, for Normal operation U5010
3
3
C5559 *PX@0.1U/10V_4X PX_EN =1, for BACO MODE *PX4@TC7SH08FU(F)
{9} DGPU_PW R_EN_R 2

{16} PX_EN 2
5
Q5049
*PX@ME2N7002E_200MA {9} DGPU_HOLD_RST# 2 Q5046 R5136 *PX5@0_4
4 PERST#_BUF R5129 *PX4@ME2N7002E_200MA
PERST#_BUF {15}
1
{9} VGA_PLTRST# 1
1
*PX4@5.11K/F_4
U5034
3
*PX@TC7SH08FU(F)
C C
R5149 *OEV@0_4
Core power for PCIE Logic PX4/PX5/OEV Designs that do not support the
3.3V VGA/PX4/PX5/OEV
BACO option must connect the
BIF_VDDC to VDDC
+VGPU_CORE R5148 *OEV@0_4
+5V +5V R5130 *PX5@0_4

+3V
B R5132 R5131 1 3 PX_Q 3 1 B

*PX4@1K/F_4 *PX4@1K/F_4
1
Q5003 Q5004
+3V *PX4@PMV45EN_4A *PX4@PMV45EN_4A+BIF_VDDC R5146 R5150
2
*OEV@0_6 *PX4@0_6
2
DGPU_PW R_EN_R
C5270 *PX4@0.1U/10V_4X +BIF_+1V_EN +BIF_CORE_EN Q5001
C5269 *PX5@ME1303_3A GPU +3V power
3
0.5A
5
*PX4@22U/6.3V_8X
3
PX_MODE 2 +3V_D
4 PX_PW RGOOD_Q2 2
1 +1V_GPU C5266 C5267 C5268
10,37,47,48} DGPU_PW ROK
Q5006
U5011 *PX4@ME2N7002E_200MA Q5005 R5139 *0_4 *EV@10U/6.3V_6X *EV@1U/6.3V_4X *EV@0.1U/10V_4X
3
*PX4@TC7SH08FU(F)
1
*PX4@ME2N7002E_200MA
1 3 PX_L 3 1
Q5007
Q5000 *PX4@PMV45EN_4A
2
2
A *PX4@PMV45EN_4A A

PROJECT : MTT
Thames_M2/ Baco A1A

5 4 3 2 1
5 4 3 2 1
S3 power Reduction (SM_DRAMRST#)

+1.5VSUS
S3P/NS3P/CPU S3 power Reduction (SM_DRAMPWROK) S3P/NS3P/CPU
26
R9511 R9512 NS3@0_4 +3V_S5
1K/F_4
D D
R9513 1K/F_4 DDR3_DRAMRST#_R 3 1 +1.5V_CPU
{13,14} DDR3_DRAMRST# CPU_DRAMRST# {3}
C5271
Q5008 S3@ME2N7002E_200MA S3@0.1U/10V_4X
2
{6} DRAMRST_CNTRL R9514
5
200/F_4
R9517 {7} SYS_PWROK_R 2
C5272 S3@4.99K/F_4 4 PM_DRAM_PWRGD_Q R9515 130/F_4 PM_DRAM_PWRGD_R PM_DRAM_PWRGD_R {3}
{9} DRAMRST_CNTRL_PCH R9516 NDS3@0_4 S3@0.047U/10V_4X {7} PM_DRAM_PWRGD 1
U5012 S3@TC7SH08FU(F)
3
R9518 *S3@39/F_4 3 1
{37} EC_DRAMRST_CTRL R455 DS3@0_4 Q5009 *S3@2N7002K_300MA
2
+3VPCU R9519 NS3@0_4 MAINON_ON_G {26,46}
R459 DS3@1K_4 EC_DRAMRST_CTRL
For S3 power Reduction Sequence S3P/NS3P/CPU S3P/NS3P/CPU

C
S3 power Reduction (CPU Power) C
+SMDDR_VREF +VDDR_REF_CPU +1.5VSUS +1.5V_CPU

+3V_S5 +1.5V_CPU +1.5VSUS
R9520 NS3@0_6
R9521 NS3@0_1206
+3V_S5
R9523 NS3@0_8 R9524 NS3@0_1206
R9522 C5273 C5274 C5275 C5276
5
R9525 6 0.1U/10V_4X 0.1U/10V_4X 0.1U/10V_4X 0.1U/10V_4X

2 S3@10K_4 5 4
MAINON {37,43,46}
{42} S3_1.5V R9526 S3@100K_4 4 S3@10K_4 3 4 2
1 1
Q5016B S3@2N7002KDW_115MA Q5010 +1.5V_CPU
U5013 S3@TC7SH08FU(F) S3@AO6402A
3
3
3
{41,42,46} MAIND MAIND R9527 MAIND
3
100K_4
5 2 R9528 S3@1K_4 C5277 R9529

*S3@470P/50V_4X S3@220_8
Q5013
Q5014B S3@FDV301N_200MA
3
S3@2N7002KDW_115MA C5278
1
6
*S3@0.1U/10V_4X
2 MAINON_ON_G {26,46} {26,46} MAINON_ON_G 2

B B
Q5014A Q5015
S3@2N7002KDW_115MA S3@ME2N7002E_200MA
1
1
For S3 power Reduction VTT discharge S3P/NS3P/CPU
+SMDDR_VTERM
R9534
S3@22_4
6
A {26,46} MAINON_ON_G
2 A
Q5016A
S3@2N7002KDW_115MA
1

PROJECT : MTT
A1A
S3 power Reduction
5 4 3 2 1
5 4 3 2 1
HDMI Conn HDM/HMU/HMV

{16} EXT_HDMITX2P
{16} EXT_HDMITX2N
C434
C426
*EHM@0.1U/10V_4X
*EHM@0.1U/10V_4X
HDMITX2_R
HDMITX2#_R
HDMI CEC CEC
27
C2002 IHM@0.1U/10V_4X
{7} INT_HDMITX2P
C2001 IHM@0.1U/10V_4X
{7} INT_HDMITX2N
EXT_HDMITX2P R4565 *EHM@100_4 EXT_HDMITX2N
C418 *EHM@0.1U/10V_4X HDMITX1_R EXT_HDMITX1P R4566 *EHM@100_4 EXT_HDMITX1N

{16} EXT_HDMITX1P
C415 *EHM@0.1U/10V_4X HDMITX1#_R
{16} EXT_HDMITX1N
EXT_HDMITX0P R4567 *EHM@100_4 EXT_HDMITX0N
C2004 IHM@0.1U/10V_4X
{7} INT_HDMITX1P
C2003 IHM@0.1U/10V_4X
{7} INT_HDMITX1N
D EXT_HDMICLK+ R4571 *EHM@100_4 EXT_HDMICLK- D
C444 *EHM@0.1U/10V_4X HDMITX0_R

{16} EXT_HDMITX0P
C440 *EHM@0.1U/10V_4X HDMITX0#_R
{16} EXT_HDMITX0N
C2006 IHM@0.1U/10V_4X
{7} INT_HDMITX0P
C2005 IHM@0.1U/10V_4X
{7} INT_HDMITX0N
C448 *EHM@0.1U/10V_4X HDMICLK_R

{16} EXT_HDMICLK+
C446 *EHM@0.1U/10V_4X HDMICLK#_R
{16} EXT_HDMICLK-
C2008 IHM@0.1U/10V_4X CN2001

{7} INT_HDMICLK+
C2007 IHM@0.1U/10V_4X 20
{7} INT_HDMICLK- SHELL1
HDMITX2_R 1
2 D2+
HDMITX2#_R 3 D2 Shield
HDMITX1_R 4 D2-
5 D1+
HDMITX1#_R 6 D1 Shield
HDMITX0_R 7 D1-
8 D0+
HDMITX0#_R 9 D0 Shield 23
HDMICLK_R 10 D0- GND
11 CK+ 22
HDMICLK#_R 12 CK Shield GND
13 CK-
F1 *HM@SMD1206P110TFT 14 CE Remote
+5V NC
HDMI_CON_DDCCLK 15
HDMI_CON_DDCDATA 16 DDC CLK
17 DDC DATA
R9545 HM@0_6 DDC5V D2007 2 1 *HM@B220LFA-13-F_2A +5V_HDMI 18 GND
+5V +5V
HDMI_CON_HP 19
Q2009 HP DET 21
3 1 SHELL2
IN OUT 2 C5282
GND HM@2HE1584-000111F
C HM@AP2337SA-7 HM@0.1U/16V_4Y C
1 D32 C5545
*HM@220P/50V_4X
*AZ5125-01J
2
HDMI-HPD HDM/HMU/HMV HDMI HDM/HMU/HMV

LEVEL
SHIFT
+5V
R9547 IHM@680_4 HDMITX0#_R
+3V +3V R9548 IHM@680_4 HDMITX0_R

3
R9549 IHM@680_4 HDMITX1#_R
R9564 2 R9550 IHM@680_4 HDMITX1_R

HM@1M_4 Q2004
2
R9583 HM@2N7002K_300MA R9551 IHM@680_4 HDMITX2#_R
R4563 IHM@0_4 HDMI_CON_HP_PCH_R 1 3 HDMI_CON_HP R9552 IHM@680_4 HDMITX2_R

{7} HDMI_CON_HP_PCH
1
HM@100K_4
Q2003 R9553 IHM@680_4 HDMICLK#_R
R4562 *EHM@0_4 HM@2N7002K_300MA R9566
{16} EXT_HDMI_HPD
R9554 IHM@680_4 HDMICLK_R
HM@20K_4
B R9584 *EHM@499/F_4 HDMITX0#_R B
R9570 *EHM@499/F_4 HDMITX0_R
R9575 *EHM@499/F_4 HDMITX1#_R
R9572 *EHM@499/F_4 HDMITX2#_R
R9586 *EHM@499/F_4 HDMICLK#_R
R9585 *EHM@499/F_4 HDMICLK_R
HDMI-SMBus HDM/HMU/HMV
+3V +3V +5V
+3V +3V +5V
D14017
HM@RB500V-40_100MA
D14016
A HM@RB500V-40_100MA A
R9559 R9567 R9568

HM@2.2K_4
HM@2.2K_4 R9560 HM@2.2K_4
HM@2.2K_4
2
R4568 IHM@0_4 1 3 HDMI_CON_DDCCLK R4570 IHM@0_4 1 3 HDMI_CON_DDCDATA

{7} HDMI_DDCCLK {7} HDMI_DDCDATA
R4569 *EHM@0_4
Q2005 HM@FDV301N_200MA
R4564 *EHM@0_4
Q2006 HM@FDV301N_200MA Quanta Computer Inc.
{16} EV_HDMI_DDCCLK {16} EV_HDMI_DDCDAT
PROJECT : MTT
A1A
HDMI CONN
5 4 3 2 1
5 4 3 2 1
Panel backlight control LDS LCD POWER SWITCH LDS/LDU/LDV HALL

Sensor
HSR
28
+3V
LCDVCC
C519 U26 +3VPCU R9571 100K_4

DISPON_O 1U/6.3V_4X
DISPON_O {37}
6 1
IN OUT
4 2
D IN GND C516 C518 C515 D
R422 PIV@0_4 3 5 1 2 LID591#
{7} LVDS_DIGON ON/OFF GND LID591# {37}
R9574 0.1U/16V_4Y *0.01U/25V_4X *10U/6.3V_6X
MR1
*100K_4 AP2821KTR-G1
For MTT UMA Del C5293 YB8251ST23
3
0.1U/16V_4Y
R2033
PIV@100K_4
For MTT UMA Del
CRT CRT/CRU/CRV CRT_DDCCLK R9576 CRT@2.2K_4

+3V
CRT_DDCDAT R9577 CRT@2.2K_4
CRTDCLK R9578 CRT@2.7K_4

+5V_CRT
CRTDDAT R9579 CRT@2.7K_4
R415 ICRT@0_4 CRT_RED

{7} INT_CRT_RED
C5294 CRT@0.1U/16V_4Y U5018
R417 ICRT@0_4 CRT_GRN +5V_CRT 1 16 CRTVSYNC
{7} INT_CRT_GRN VCC_SYNC SYNC_OUT2
C5295 CRT@0.1U/16V_4Y 14 CRTHSYNC
R420 ICRT@0_4 CRT_BLU 7 SYNC_OUT1
{7} INT_CRT_BLU +5V VCC_DDC
C5297 CRT@0.22U/10V_4X 8 C5296 C5298
BYP 15 CRT_VSYNC
C C
R416 *ECRT@0_4 2 SYNC_IN2 13 CRT_HSYNC CRT@10P/50V_4C CRT@10P/50V_4C
{16} EXT_CRT_RED +3V VCC_VIDEO SYNC_IN1
C5299 CRT@0.1U/16V_4Y
R418 *ECRT@0_4
{16} EXT_CRT_GRN
CRT_RED L5021 ICRT@BLM18BA470SN1D_300MA CRT_R1 3 10 CRT_DDCCLK
R419 *ECRT@0_4 CRT_GRN L5022 ICRT@BLM18BA470SN1D_300MA CRT_G1 4 VIDEO_1 DDC_IN1 11 CRT_DDCDAT
{16} EXT_CRT_BLU VIDEO_2 DDC_IN2
CRT_BLU L5023 ICRT@BLM18BA470SN1D_300MA CRT_B1 5
VIDEO_3 9 CRTDCLK
R103 ICRT@0_4 CRT_DDCCLK R9580 C5300 R9581 C5301 R9582 C5304 C5302 C5303 C5305 6 DDC_OUT1 12 CRTDDAT
{7} INT_CRT_DDCCLK GND DDC_OUT2
R108 ICRT@0_4 CRT_DDCDAT CRT@150/F_4 CRT@6.8P/50V_4N CRT@150/F_4 CRT@6.8P/50V_4N CRT@150/F_4 CRT@6.8P/50V_4N CRT@6.8P/50V_4N CRT@6.8P/50V_4N CRT@6.8P/50V_4N CRT@CM2009-02QR C5306 C5307
{7} INT_CRT_DDCDAT
R102 ICRT@0_4 CRT_HSYNC CRT@10P/50V_4C CRT@10P/50V_4C
{7} INT_HSYNC
R113 ICRT@0_4 CRT_VSYNC
{7} INT_VSYNC
R112 *ECRT@0_4
{16} EV_CRTDCLK
R107 *ECRT@0_4
{16} EV_CRTDDAT
CRT_RED L5039 *ECRT@BLM18BA470SN1D_300MA CRT_R1
16
CRT_GRN L5038 *ECRT@BLM18BA470SN1D_300MA CRT_G1
CRT_BLU L5026 *ECRT@BLM18BA470SN1D_300MA CRT_B1
R114 *ECRT@0_4 6
{16} EV_CRTDCLK_aux
CRT_R1 1 11
R109 *ECRT@0_4 7
{16} EV_CRTDDAT_aux
CRT_G1 2 12 CRTDDAT
+5V_CRT 8
CRT_B1 3 13 CRTHSYNC
R106 *ECRT@0_4 D2011 CRT@SS14L_1A +5V_CRT1 F2 CRT@SMD1206P110TFT 9
{16} EXT_HSYNC +5V
4 14 CRTVSYNC
R105 *ECRT@0_4 10
{16} EXT_VSYNC
5 15 CRTDCLK
1
D33
CN2002
*AZ5125-01J
17
CRT@DHR48-15K1200
2
B B
LCD Panel Module CCD CCD
INT_TXLCLKOUT+ LCD_TXLCLKOUT+ CN2003

{7} INT_TXLCLKOUT+
INT_TXLCLKOUT- LCD_TXLCLKOUT- VIN 1
{7} INT_TXLCLKOUT- 1
+3V :12 mil 2
2
3
4 3
+3V 4
LCD_EDIDCLK 5
LCD_EDIDDATA 6 5
R423 PIV@0_4 LVDS_PWM_R 7 6 USB_CCD_R L12 4 3 E@MCM2012B900GBE
{7} LVDS_PWM 7 USB_CCD {9}
L5024 FCM1005KF-221T03_300MA 8 USB_CCD#_R 1 2
{34} INT_DMIC_DATA 8 USB_CCD# {9}
INT_TXLOUT2+ LCD_TXLOUT2+ L5025 FCM1005KF-221T03_300MA 9
{7} INT_TXLOUT2+ {34} INT_DMIC_CLK 9
INT_TXLOUT2- LCD_TXLOUT2- 10
{7} INT_TXLOUT2- 10
LCD_TXLOUT0- 11
LCD_TXLOUT0+ 12 11
13 12
LCD_TXLOUT1- 14 13
LCD_TXLOUT1+ 15 14
16 15 F3 SMD1206P110TFT CCD_POWER
16 +3V
INT_TXLOUT1+ LCD_TXLOUT1+ LCD_TXLOUT2- 17
{7} INT_TXLOUT1+ 17
INT_TXLOUT1- LCD_TXLOUT1- LCD_TXLOUT2+ 18 C5308 *10U/6.3V_6X
+
{7} INT_TXLOUT1- 18
19
LCD_TXLCLKOUT- 20 19
LCD_TXLCLKOUT+ 21 20
22 21
LCDVCC 22
23
23
INT_TXLOUT0+ LCD_TXLOUT0+
{7} INT_TXLOUT0+
INT_TXLOUT0- LCD_TXLOUT0-
{7} INT_TXLOUT0-
A A
DISPON_O R9593 1.2K/F_4 DISPON_O_R 24 34
CCD_POWER 25 24 34
USB_CCD#_R 26 25 33
USB_CCD_R 27 26 33
INT_LVDS_EDIDCLK LCD_EDIDCLK 28 27 32
{7} INT_LVDS_EDIDCLK 28 32
INT_LVDS_EDIDDATA LCD_EDIDDATA R17098 0_4 USB_TPANEL#_L 29
{7} INT_LVDS_EDIDDATA {9} USB_TPANEL# 29
R17099 0_4 USB_TPANEL_L 30 31
{9} USB_TPANEL 30 31
DISPON_O_R
50373-03001-002
D2012 Quanta Computer Inc.

LCP0G050M0R2R
R9609 2.2K_4
+3V LCD_EDIDCLK
PROJECT : MTT
R9610 2.2K_4 LCD_EDIDDATA A1A
LCD/LED Panel/CCD
5 4 3 2 1
5 4 3 2 1
MINI Card Slot#1(WiFi / Wimax

/ Combo)
MNW/DEG
+1.5V WIMAX_P
+3V
[AOAC]
WIMAX_P
29
L10 NAOAC@HCB1608KF-121T30_3A
0.5A(30mils)
2.75A(120mils)
WIMAX_P WIMAX_P 1 3
+3V_S5
C5371 C5310 C5311 C5312 C5313 C5314 C5315 C5316 C5383 Q5031 AOAC@ME1303_3A +3V_S5
2
D
R9614 *47P/50V_4N E@0.1U/10V_4X E@0.1U/10V_4X *10U/6.3V_6X 0.1U/16V_4Y *0.1U/16V_4Y E@0.1U/10V_4X *10U/6.3V_6X *47P/50V_4N D
10K_4 C5572 C5571
R9615
AOAC@0.01U/25V_4X *AOAC@0.01U/25V_4X AOAC@4.7K_4
2
R9730 AOAC@3.01K/F_4
3 1 PCIE_CLK_WLAN_REQ#_R Q5033
{9} PCIE_CLK_WLAN_REQ#
3
CN2004
Q5032 ME2N7002E_200MA BT_DISABLE#_INTEL 51 52
49 NC +3.3V 50 2
C-Link_RST GND WMAX_P {37}
PLTRST# R9616 NMP@0_4 PLTRST#_debug 47 48
{3,9,35,36,37} PLTRST# C-Link_DAT +1.5V
R9617 *0_4 R9618 NMP@0_4 PCLK__debug_R 45 46
{9} PCLK_DEBUG C-Link_CLK LED_WPAN#
43 44 AOAC@LTC044EUBFS8TL_30MA
1
41 GND LED_WLAN# 42
39 NC NC 40
37 NC NC 38
GND USB_D+ USB_WLAN {9}
35 36
GND USB_D- USB_WLAN# {9}
33 34
{9} PCIE_TXP_WLAN PETp0 GND
31 32 SDATA_WLAN
WIMAX_P WIMAX_P {9} PCIE_TXN_WLAN# PETn0 SMB_DATA
29 30 SCLK_WLAN
27 GND SMB_CLK 28
25 GND +1.5V 26 WIMAX_P
{9} PCIE_RXP_WLAN PERp0 GND
23 24
{9} PCIE_RXN_WLAN# PERn0 +3.3Vaux
R76 21 22 PLTRST#
AOAC@10K_4 19 GND PERST# 20 RF_EN
NC W_DISABLE# RF_EN {37}
17 18
NC GND
2
15 16 LFRAME#_PCIE R9621 NMP@0_4 R9622 R9623

13 GND NC 14 LAD3_PCIE R9624 NMP@0_4 LFRAME# {8,37}
{9} CLK_PCIE_WLAN REFCLK+ NC
2
3 1 PCIE_WAKE#_R 11 12 LAD2_PCIE R9626 NMP@0_4 LAD3 {8,37} AOAC@4.7K_4 AOAC@4.7K_4
{7,35,37} PCIE_WAKE# {9} CLK_PCIE_WLAN# REFCLK- NC
9 10 LAD1_PCIE R9627 NMP@0_4 LAD2 {8,37}
Q15 AOAC@ME2N7002E_200MA PCIE_CLK_WLAN_REQ#_R 7 GND NC 8 LAD0_PCIE R9629 NMP@0_4 LAD1 {8,37} 6 1 SDATA_WLAN
CLKREQ# NC LAD0 {8,37} {9,13} SDATA
5 6
3 BT_CHCLK +1.5V 4 Q5048A AOAC@2N7002KDW_115MA
R9630 *AOAC@0_4 PCIE_WAKE#_R 1 BT_DATA GND 2
WAKE# +3.3V R9631 NAOAC@0_4
{13,14,38} CGDAT_SMB
80003-5121
C C
WIMAX_P
5
WIMAX_P 3 4 SCLK_WLAN
{9,13} SCLK
Q5048B AOAC@2N7002KDW_115MA
R9620 R9632 NAOAC@0_4

{13,14,38} CGCLK_SMB
10K_4
BT_DISABLE#_INTEL
3
2 Q5035
{37} BT_RFCTRL
LTC044EUBFS8TL_30MA
1
B B
A A

PROJECT : MTT
A1A
MINI CARD(WLAN/3G/SIM Card)
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
A A

PROJECT : MTT
A1A
USB 3.0(FL1009)
5 4 3 2 1
5 4 3 2 1
USB CONNECT <U3B/USB>

RIGHT(UR)
{9} USBP0-
RN17 1
4
2
3
E@MCM2012B900GBE USB20N_R
USB20P_R
+5V_S5 +5V_S5
31
{9} USBP0+
R16770
D D
*S&C@10K_4
+5V_S5
2
SC_SCL 1 6
3ND_MBCLK {16,37}
Q14028A *S&C@2N7002KDW_115MA
C5358
S&C@0.1U/16V_4Y +5V_S5 +5V_S5

U5022
R9862 *S&C@10K_4
5 6 USB20P_R R9853 NS&C@0_4
R9861 *S&C@0_4 VCC TDP 7 USB20N_R R9854 NS&C@0_4 R16769
{37} USB_BUS_SW4 TDM
R9860 *S&C@0_4 1 *S&C@10K_4
{31,37} USB_BUS_SW3 CEN# / INT
R16764 S&C@0_4 8
{31,37} USB_BUS_SW2 CB0 / SDA
5
3 USB20P_CONN_C
R16766 *S&C@0_4 DP 2 USB20N_CONN_C
{31,37} USB_BUS_SW3 DM R16765 *S&C@0_4 SC_SDA 4 3
USB_BUS_SW2 {31,37} 3ND_MBDATA {16,37}
SC_SDA R16768 *S&C@0_4
9 4 R9859 S&C@0_4 Q14029B *S&C@2N7002KDW_115MA
GND CB1 / SCL USB_BUS_SW3 {31,37}
R16767 *S&C@0_4 SC_SCL
S&C@MAX14641ETA+T
R9858 *S&C@0_4
R9861 R9860 R9859 R9858 R9862 R16764 R16766 R16768 R16767 +3V_S5
14566 V V +5V_S5
14600 V V R9748
U5021
14617(with CB2) V V 10K_4 2
IN1 OUT3
8 +5VSUS_USBP0
3 7
IN2 OUT2
C 14617(no CB2) V V OUT1
6 C
USB_SC_EN# 4
{37} USB_SC_EN# EN#
14641/14642/14644 V V 1
GND
C14615 C14613 R9750
C5364 9 5 *10U/6.3V_6X 220U/6.3V_105CS_E18e
GND-C OC#
14640 V V 470/F_4
1U/6.3V_4X BD82025FVJ-E2
3
SW2 SW3 14600
2
CB0 CB1 Status {9,37} USB_SC_OC#
Q5017
0 0 Auto mode Charger , AM ME2N7002E_200MA
2013 Chief River/Brazos
1
0 1 Force dedicated charger mode Charger , FM
1 0 Pass-Through(USB) mode USB , PM
1 1 pass-through(USB) with CDP USB , CM
Emulation
SW3 SW2 14641

CB1 CB0 Status
0 0 2A Auto mode for Apple device Charger , AM2 CN2021
2013 Shark bay / Kabini
1 0 Force 1A for Apple device Charger , AP1 CN2007
+5VSUS_USBP0 1
1 VBUS
0 1 Pass-Through(USB) mode USB , PM USB20N_CONN_C 2
6
3 2 D-
USB20P_CONN_C
3 D+
1 1 pass-through(USB) with CDP USB , CM 4
4 GND
+5VSUS_USBP0
1
USB30_RX1-_RR 5 USB20N_CONN_C
Emulation {9} USB30_RXN1_R
USB30_RX1+_RR 6 5 SSRX- USB20P_CONN_C 2
B {9} USB30_RXP1_R 6 SSRX+ 3 B
7
1
USB30_TX1-_RR C5365 UR-3@0.1U/10V_4X USB30_TX1-_C 8 7 GND 4
{9} USB30_TXN1_R 8 SSTX- D31
SW3 SW2 14644 {9} USB30_TXP1_R
USB30_TX1+_RR C5366 UR-3@0.1U/10V_4X USB30_TX1+_C 9
9 SSTX+ *AZ5125-01J
5
13
12
11
10
CB1 CB0 Status
2
13
12
11
10
0 0 2A Auto mode for Apple device Charger , AM2 UR-3@TARAH-9V1391
UR-2@UARCF-4K1986
1 0 Force dedicated charger mode Charger , FM
Emulation
USB20N_CONN_C USB20P_CONN_C USB30_RX1-_RR USB30_RX1+_RR USB30_TX1-_C USB30_TX1+_C
SW3 SW2 14642

CB1 CB0 Status 1
1
D14018 D14019 D14020 D14021 D14022 D14023
X 0 2A Auto mode for Apple device Charger , AM2 *TVUFB0201AD0 *TVUFB0201AD0 *TVUFB0201AD0 *TVUFB0201AD0 *TVUFB0201AD0 *TVUFB0201AD0

2
2
Emulation
A A

PROJECT : MTT
A1A
USB3 Redriver/S&C/USB2
5 4 3 2 1
5 4 3 2 1
USB CONNECT
LEFT1(ULU)
USB 3.0
Rrdriver IC
USB3.0 re-driver IC
+3V_S5
R9721
+5V_S5
U5023
32
RN14 2 1 E@MCM2012B900GBE USB20N_L1_C U5024 10K_4 2 8 +5VSUS_USBP1
{9} USBP2- IN1 OUT3
3 4 USB20P_L1_C 3 7
{9} USBP2+ IN2 OUT2
C5375 *ULU-3@0.1U/10V_4X USB30_TX3-_CC 8 23 USB30_TX3-_RR 6
{9} USB30_TXN3_L1 RX1- TX1- OUT1
C5377 *ULU-3@0.1U/10V_4X USB30_TX3+_CC 9 22 USB30_TX3+_RR 4
{9} USB30_TXP3_L1 RX1+ TX1+ {37} USB_Normal_EN# EN#
1 C14620 C5369 R9757
C5378 *ULU-3@0.1U/10V_4X USB30_RX3-_CC 11 20 USB30_RX3-_RR 9 GND 5 *10U/6.3V_6X 220U/6.3V_105CS_E18e
D {9} USB30_RXN3_L1 TX2- RX2- GND-C OC# D
C5376 *ULU-3@0.1U/10V_4X USB30_RX3+_CC 12 19 USB30_RX3+_RR C5372 470/F_4
{9} USB30_RXP3_L1 TX2+ RX2+ BD82025FVJ-E2
1U/6.3V_4X
1 R9710 **ULU-3@4.99K/F_4
+USB_RE_PWR VCC
3
13 5 EN_RXD R9711 **ULU-3@4.99K/F_4 +USB_RE_PWR
EQ1 2 VCC EN_RXD
EQ1 14 CM R9712 **ULU-3@4.99K/F_4
EQ2 17 CM R9713 *ULU-3@4.7K/F_4 2
EQ2 7
NC1 {9,37} USB_Normal_OC#
DE1 3 24 Q5021
DE1 NC2 ME2N7002E_200MA
DE2 16 6 R17064 **ULU-3@0_4
EN_RXD {37}
1
DE2 GND 10
OS1 4 GND 18 R17065 **ULU-3@0_4
OS1 GND 21
OS2 15 GND
OS2
*ULU-3@PI3EQX7502IZDE
CN2008
+5VSUS_USBP1 1
1 VBUS
USB20N_L1_C 2
+USB_RE_PWR 2 D-
USB20P_L1_C 3
4 3 D+
USB30_RX3-_RR 5 4 GND
6 5 SSRX-
Control pins setting USB30_RX3+_RR
7 6 SSRX+
8 7 GND
R9703 R9704 R9705 R9706 R9707 R9708
EN_RXD Device function CM Device function USB30_TX3-_RR
USB30_TX3+_RR
C5373
C5374
*ULU-3@0.1U/10V_4X
*ULU-3@0.1U/10V_4X
USB30_TX3-_C
USB30_TX3+_C 9 8 SSTX-
9 SSTX+
1(default) Normal Operation 0(default) Normal Operation
13
12
11
10
C C
0 Sleep Mode 1 Compliance Test Mode
13
12
11
10
*ULU-3@0_4 *ULU-3@0_4 **ULU-3@4.99K/F_4 **ULU-3@4.99K/F_4 **ULU-3@4.99K/F_4 **ULU-3@4.99K/F_4
EQ1
EQ2
DE1
DE2
OS1 +USB_RE_PWR
OS2 +3V
*ULU-3@TARA9-9V1391
R9702 **ULU-3@0_6 +USB_RE_PWR
R9714 R9715 R9716 R9717 R9718 R9719
C5379 C5380 C5381 C5382 CN2022
+3V_S5
*ULU-3@1U/6.3V_4X *ULU-3@0.1U/16V_4Y *ULU-3@2.2U/6.3V_4X *ULU-3@470P/50V_4X
**ULU-3@4.99K/F_4 **ULU-3@4.99K/F_4 **ULU-3@75K/F_4 **ULU-3@75K/F_4 *ULU-3@4.99K/F_4 *ULU-3@4.99K/F_4 R9709 *ULU-3@0_6
6
+5VSUS_USBP1
USB20N_L1_C 1
USB20P_L1_C 2
3
1
4
D34
*AZ5125-01J
5
2
USB20N_L1_C USB20P_L1_C USB30_RX3-_RR USB30_RX3+_RR USB30_TX3-_C USB30_TX3+_C
UARC6-4K1926
1
1
D14024 D14025 D14026 D14027 D14028 D14029
*TVUFB0201AD0 *TVUFB0201AD0 *TVUFB0201AD0 *TVUFB0201AD0 *TVUFB0201AD0 *TVUFB0201AD0
2
2
B B
USB CONNECT
LEFT2(ULD) CN2009
USBP9-_C USBP9+_C
6
+5VSUS_USBP1
EMI
RN6 2 1 E@MCM2012B900GBE USBP9-_C 1
1
{9} USBP9- 2
3 4 USBP9+_C
{9} USBP9+ 3 D14030 D14031
1
4 *TVUFB0201AD0 *TVUFB0201AD0
D30
2
*AZ5125-01J
5
2
UARC6-4K1926
A A

PROJECT : MTT
A1A
USB3 Redriver/USB2_Left
5 4 3 2 1
5 4 3 2 1
SATA
HDD
HDD
33
CN2010
23
GND23
1
GND1 2 SATA_TXP_1ST_HDD_C C5387 0.01U/25V_4X
RXP 3 SATA_TXP_1ST_HDD {8}
D SATA_TXN_1ST_HDD#_C C5388 0.01U/25V_4X D
RXN 4 SATA_TXN_1ST_HDD# {8}
GND2 5 SATA_RXN_1ST_HDD#_C C5389 0.01U/25V_4X
TXN 6 SATA_RXN_1ST_HDD# {8}
SATA_RXP_1ST_HDD_C C5390 0.01U/25V_4X
TXP 7 SATA_RXP_1ST_HDD {8}
GND3
8
3.3V 9
3.3V 10
3.3V 11
GND 12
GND 13
GND 14
5V 15
5V 16 +5V_HDD1
5V +5V
17
GND 18
RSVD 19 C5391 C5392 + C5393
GND 20
12V 21 *0.1U/16V_4Y *10U/6.3V_6X *100U/6.3V_3528P_E45b
12V 22
12V
24
GND24
SAT-22ESAB
C C
SATA ODD <ODD> ODD Zero power . <OZP>

(Only for Intel)
CN2011
14
GND14
1
GND1 2 SATA_TXP_ODD_C C5394 0.01U/25V_4X
RXP SATA_TXP_ODD {8}
3 SATA_TXN_ODD#_C C5395 0.01U/25V_4X
RXN SATA_TXN_ODD# {8} +5V +5V_ODD
4
GND2 5 SATA_RXN_ODD#_C C5396 0.01U/25V_4X
TXN SATA_RXN_ODD# {8}
6 SATA_RXP_ODD_C C5399 0.01U/25V_4X SATA_RXP_ODD {8}
TXP 7
GND3 L11 HCB1608KF-121T30_3A
+5V
8 ODD_PRSNT# {10}
DP 9 1 3
+5V 10 +5V_ODD
+5V +5V_ODD
11 ODD_MD# {9}
B MD B
12 C5397 Q5040 C5398 R9722
2
GND 13 C5400 C5401 + C5402 *ZPR@4.7K_4
GND *ZPR@0.01U/25V_4X *ZPR@ME1303_3A **ZPR@0.01U/25V_4X
15 *0.1U/16V_4Y *10U/6.3V_6X *100U/6.3V_3528P_E45b
GND15 R9723 *ZPR@3.01K/F_4
91929-0137P
3
+5V_ODD 2
PCH_ODD_EN {10}
Q5041
1
R9724
*ZPR@LTC044EUBFS8TL_30MA
*ZPR@22_8
3
2
Q5042
1
*ZPR@ME2N7002E_200MA
A A

PROJECT : MTT
A1A
HDD/ODD
5 4 3 2 1
5 4 3 2 1
Codec (CX20671-21Z)<ADO> External MIC <ADO>
MIC1-VREFO
34
R9725 R9726
3.3K/F_4 3.3K/F_4
FILT_1.65V
CN2012
1
C5403 C5404 MIC1_L1 R9727 100/F_6 MIC1_L2 L5031 HCB1608KF-121T20_2A MIC1_L3 2 7
6 8
D 1U/6.3V_4X 0.1U/16V_4Y MIC1_R1 R9728 100/F_6 MIC1_R2 L5032 HCB1608KF-121T20_2A MIC1_R3 3 9 D
4 10
Port_B# 5
ADOGND
2SJ3013-009311F Shield_GND
+3V R9729 *SHORT_6 +3AVDD C5405 C5406 C5407 Normal Open Jack
AVDD_3.3
C5409 C5411 C5412 100P/50V_4N 100P/50V_4N *TVL040201AB1
C5408 C5410
0.1U/16V_4Y 4.7U/6.3V_6X 0.1U/16V_4Y
4.7U/6.3V_6X 0.1U/16V_4Y
MIC1_L3 MIC1_R3
ADOGND
ADOGND
R9731 *SHORT_6 +3AVDD_S5
1
+3V_S5
C5413 C5414 +5AVDD (100mils) D14032 D14033
+5V *TVL040201AB1 *TVL040201AB1 MIC1_L3 C5597 *0.1U/10V_4X
*10U/6.3V_6X 0.1U/16V_4Y C5415 C5416
2
MIC1_R3 C5596 *0.1U/10V_4X
*10U/6.3V_6X 0.1U/16V_4Y
+3AVDD
C5417 C5418
CLASSD_5V (40mils)
Headphone <ADO>
*10U/6.3V_6X 0.1U/16V_4Y
C5419 C5420 C5421 C5422
0.1U/16V_4Y 0.1U/16V_4Y 10U/6.3V_6X 10U/6.3V_6X

FILT_1.8V
C5424
C C
R9855 C5423 C5425 CN2013
0.1U/16V_4Y 1
*10K_4 4.7U/6.3V_6X 0.1U/16V_4Y HPOUT-L R9732 5.1/F_6 HPOUT-L2 L5033 HCB1608KF-121T20_2A HPOUT-L3 2 7
+3AVDD 6 8
HPOUT-R R9733 5.1/F_6 HPOUT-R2 L5034 HCB1608KF-121T20_2A HPOUT-R3 3 9
4 10
18
26
29
27
28
12
15
17
3
2
7
U5026
R9734 Port_A# 5
VDD_IO
CLASSDREF
FILT_1.8
VAUX_3.3
DVDD_3.3
FILT_1.65
AVDD_3.3
LPWR_5.0
RPWR_5.0
AVDD_HP
AVDD_5V
GND C5426 *0.1U/16V_4Y
5.11K/F_4 2SJ3013-009311F Shield_GND
9 C5427 C5428 C5429
{8} ACZ_RST#_AUDIO RESET# Normal Open Jack
R9735 39.2K/F_4 Port_A# *100P/50V_4N *100P/50V_4N *TVL040201AB1
R9736 E@0_4 BIT_CLK_AUDIO_R 5 36 SENSE_A R9737 20K/F_4 Port_B#
{8} BIT_CLK_AUDIO 8 BIT_CLK SENSE_A
{8} ACZ_SYNC_AUDIO 6 SYNC
{8} ACZ_SDIN0_AUDIO R9738 33_4 SDATA_IN HPOUT-L3 HPOUT-R3
4 SDATA_IN
{8} ACZ_SDOUT_AUDIO SDATA_OUT ADOGND
35 MIC1-RR C5430 2.2U/6.3V_4X MIC1_R1
1
PORTB_R 34 MIC1-LL C5431 2.2U/6.3V_4X MIC1_L1
PORTB_L D14034 D14035
33 MIC1-VREFO_B R9739 *SHORT_4 MIC1-VREFO
B_BIAS *TVL040201AB1 *TVL040201AB1
C5432 0.1U/16V_4Y PCBEEP_C 10 32
{8} PCBEEP
2
PC_BEEP C_BIAS 31 TP2034
39 PORTC_R 30 TP2035 HPOUT-L3 C5598 *0.1U/10V_4X
SPDIF PORTC_L TP2036
38 HPOUT-R3 C5599 *0.1U/10V_4X
TP2037 37 GPIO0/EAPD#
AMP_MUTE# CX20671-21Z
{37} AMP_MUTE# GPIO1/SPK_MUTE#
25
NC_DR 24
NC_DL
23 HPOUT-R
R9740 33_4 DMIC 40 PORTA_R 22 HPOUT-L
{28} INT_DMIC_CLK DMIC_CLK PORTA_L
Internal Speaker <ADO>
INT_DMIC_DATA 1
{28} INT_DMIC_DATA DMIC_1/2 21
B AVEE B
AVEE 20 FLY_N CN2014
FLY_N 19 FLY_P C5433 1U/6.3V_4X SPK_R+ R9741 BLM18PG471SN1D_1A INSPKR+N 1
FLY_P C5434 C5435 SPK_R- R9742 BLM18PG471SN1D_1A INSPKR-N 2 1
2
EP_GND
SPK_L- R9743 BLM18PG471SN1D_1A INSPKL-N 3

RIGHT+
RIGHT-
3
LEFT+
LEFT-
0.1U/16V_4Y 4.7U/6.3V_6X SPK_L+ R9744 BLM18PG471SN1D_1A INSPKL+N 4

4
88266-040L
11
13
14
16
41
C14621 1000P/50V_4X
INSPKL-N
C14622 1000P/50V_4X INSPKL+N
C5436 *0.47U/6.3V_4X DMIC INSPKR-N
INSPKR+N
C5437 *0.47U/6.3V_4X INT_DMIC_DATA C14623 1000P/50V_4X
C5438 C5439 C5440 C5441
E@2200P/50V_4X E@2200P/50V_4X E@2200P/50V_4X E@2200P/50V_4X
INSPKR+N INSPKR-N
ADOGND
MIC1-RR C5442 *0.47U/6.3V_4X
C5443 *10P/50V_4C ACZ_RST#_AUDIO
1
MIC1-LL C5444 *0.47U/6.3V_4X D14036 D14037 INSPKL-N
C5445 *10P/50V_4C BIT_CLK_AUDIO SPK_R+ INSPKL+N
*TVL040201AB1 *TVL040201AB1 INSPKR-N
C5446 *10P/50V_4C ACZ_SDOUT_AUDIO SPK_R- INSPKR+N
2
SPK_L-
C5591 C5592 C5593 C5594
SPK_L+ 39P/50V_4N 39P/50V_4N 39P/50V_4N 39P/50V_4N
R17095 *E@SHORT_4
A A
INSPKL-N INSPKL+N
R17097 *E@SHORT_4
1
D14038 D14039
ADOGND ADOGND
*TVL040201AB1 *TVL040201AB1
2
PROJECT : MTT
A1A
Audio Codec (CX20671)
5 4 3 2 1
5 4 3 2 1
Atheros Lan <LAN/LN1.LNG>

LAN_VDD33
C5447
LAN@10U/6.3V_6X
C5448
0.163A(20mils)
LAN@10U/6.3V_6X
C5449
*LAN@1000P/50V_4X
LAN_VDD33
C5450
LAN@1U/6.3V_4X
C5451
LAN@0.1U/16V_4Y
1
U5027
VDD33 LED1/LED_LINK10/100n
39
38
LAN_LINKLED#
LAN_ACTLED
35
LED0/LED_ACTn 23 LAN_LED2#
LED2/CLKREQn
C5452 LAN@1U/6.3V_4X
37 DVDDL C5453 LAN@0.1U/16V_4Y

DVDD_REG 24 T5049
DVDDL
Atheros
2 31 AVDDL C5455 LAN@0.1U/16V_4Y
{3,9,29,36,37} PLTRST# PCIE_LAN_WAKE# 3 PERSTn AVDDL 34 AVDDVCO C5456 LAN@0.1U/16V_4Y
CKREQ_G# 4 WAKEn AVDDL
VDDCT_REG/CKRn 33 CLK_PCIE_LAN C14626 *LAN@1U/6.3V_4X
D REFCLKP CLK_PCIE_LAN {9} D
LAN_VDD33 R9787 LAN@30K/F_4 5 32 CLK_PCIE_LAN#
VDDCT REFCLKN 36 CLK_PCIE_LAN# {9} C14627 *LAN@4.7U/6.3V_6X
RX_N 35 PCIE_TXN_LAN# {9}
AVDDL 6 RX_P 30 PCIE_RXP6_C C5458 LAN@0.1U/10V_4X PCIE_TXP_LAN {9}
AVDDL_REG
AR8151/AR8152 TX_P
TX_N
29 PCIE_RXN6_C C5459 LAN@0.1U/10V_4X
PCIE_RXP_LAN
PCIE_RXN_LAN#
{9}
{9}
C5462 C5463 C5460 LAN@15P/50V_4C LAN_XTLO 7 28 T5048
XTLO TEST_RST 27
LAN@0.1U/16V_4Y LAN@1U/6.3V_4X Y5002 LAN@25MHZ_30 TESTMODE
3 2 LAN_XTLI 8 26 SB_SMBDATA1_LAN T5046 CLK_PCIE_LAN C14641 *LAN@4.7P/50V_4C
4 1 XTLI SMDATA 25 SB_SMBCLK1_LAN T5047 CLK_PCIE_LAN# C14642 *LAN@4.7P/50V_4C
SMCLK
C5466 LAN@15P/50V_4C 40 LX L5035 LAN@4.7uh_C_1A DVDDL
AVDDH 9 LX
AVDDH_REG C5467 C5468 C5469
R9758 LAN@2.37K/F_4 RBIAS 10 41
C5470 C5471 RBIAS GND1 *LAN@1000P/50V_4X LAN@10U/6.3V_6X LAN@0.1U/16V_4Y
TX0P 11
LAN@0.1U/16V_4Y LAN@1U/6.3V_4X TX0N 12 TRXP0
TRXN0 22 AVDDH C5472 LAN@0.1U/16V_4Y
LAN_VDD33 LAN_VDD33 TX1P 14 AVDDH C754 LAN@1U/6.3V_4X
TX1N 15 TRXP1
TRXN1 16 AVDDH_C C5473 LAN@0.1U/16V_4Y
TX2P 17 AVDDH 19 AVDDL C5474 61@0.1U/16V_4Y
TX2N 18 TRXP2 AVDDL 13
R5 TRXN2 AVDDL
LAN@10K_4 TX3P 20 AVDDL C5475 LAN@0.1U/16V_4Y R744 LAN@0_6
GND10
TRXP3 LAN_VDD33
GND2
GND3
GND4
GND5
GND6
GND7
GND8
GND9
TX3N 21
TRXN3
2
6 1 PCIE_LAN_WAKE# 61_62@AR8161-A
{7,29,37} PCIE_WAKE#
42
43
44
45
46
47
48
49
50
Q14030A LAN@2N7002KDW_115MA L5035,C5467,C5468,C5469
Switch mode
R9749 *LAN@0_4 Mount
C C
LDO mode
NC
+3V_S5 LAN_VDD33
LAN_VDD33 LAN_VDD33
R9761 *LAN@0_6
R6
LAN@4.7K_4
+3V_S5
AVDDVCO L5040 LAN@HCB1608KF-601T10_1A AVDDL L5041 LAN@HCB1608KF-601T10_1A DVDDL LAN_P {37}
5
1 3
3 4 CKREQ_G# R81
{9} PCIE_CLK_LAN_REQ#
Q14030B LAN@2N7002KDW_115MA C183 Q5043 C195
2
LAN@4.7K_4
L5041 LAN@0.01U/25V_4X LAN@ME1303_3A *LAN@0.01U/25V_4X Q10
R12 *LAN@0_4
Switch mode LAN@LTC044EUBFS8TL_30MA
Mount R91 LAN@3.01K/F_4 3 1
LDO mode
NC
<LAN/LN1.LNG> <LAN>
B
CN2015 B
X-TX3N 8
NC4/3-
C5476 *LAN@1000P/50V_4X X-TX3P 7
U5028 NC/3+
C5477 LAN@0.1U/16V_4Y AVDD_CEN_T 1 24 TERM1 X-TX1N 6
TX0P 2 TCT1 MCT1 23 X-TX0P RX-/1-
C5478 *LAN@1000P/50V_4X TX0N 3 TD1+ MX1+ 22 X-TX0N U5038 X-TX2N 5
TD1- MX1- TX1P 1 6 TX1N NC2/2-
C5479 LAN@0.1U/16V_4Y AVDD_CEN_T 4 21 TERM2 CH1 CH4 X-TX2P 4
TX1P 5 TCT2 MCT2 20 X-TX1P 2 5 NC1/2+
TD2+ MX2+ GND VDD LAN_VDD33
C5480 *61@1000P/50V_4X TX1N 6 19 X-TX1N X-TX1P 3
TD2- MX2- TX0P 3 4 TX0N RX+/1+
C5483 61@0.1U/16V_4Y AVDD_CEN_T 7 18 TERM3 CH2 CH3 X-TX0N 2
TX2P 8 TCT3 MCT3 17 X-TX2P *LAN@TVLST2304AD0 TX-/0-
C5484 *61@1000P/50V_4X TX2N 9 TD3+ MX3+ 16 X-TX2N X-TX0P 1
TD3- MX3- TX+/0+ 9
C5487 61@0.1U/16V_4Y AVDD_CEN_T 10 15 TERM4 GND 10
TX3P 11 TCT4 MCT4 14 X-TX3P GND
TX3N 12 TD4+ MX4+ 13 X-TX3N
TD4- MX4-
61@GST5009BLF LAN@130456-031
C5488 C5489 C5490 C5491 U5039
TX3P 1 6 TX3N
LAN@0.01U/100V_6X LAN@0.01U/100V_6X LAN@0.01U/100V_6X LAN@0.01U/100V_6X CH1 CH4
2 5 LAN_VDD33
TERM4_C
TERM3_C
TERM2_C
TERM1_C
GND VDD
TX2P 3 4 TX2N
U5033 CH2 CH3
AVDD_CEN_T 1 24 TERM1 *LAN@TVLST2304AD0 LAN_VDD33 R17072 *LAN@10K_4 LAN_ACTLED R9765 *LAN@10K_4
TX0P 2 TCT1 MCT1 23 X-TX0P R9766 R9768 R9769 R9771
TD1- MX1- LAN@75/F_8 LAN@75/F_8 LAN@75/F_8 LAN@75/F_8 R9767 *LAN@10K_4 LAN_LINKLED# R9770 *LAN@10K_4
LAN_VDD33
A AVDD_CEN_T 4 21 TERM2 A
TX1P 5 TCT2 MCT2 20 X-TX1P TERM1 C14628 LAN@GT1206200ASMD
TX1N 6 TD2+ MX2+ 19 X-TX1N R17074 *LAN@10K_4 LAN_LED2# R17073 *LAN@10K_4
TD2- MX2- LAN_VDD33
TERM2 C14629 LAN@GT1206200ASMD
AVDD_CEN_T 7 18 TERM3
TERM9
TERM9
TX2P 8 TCT3 MCT3 17 X-TX2P TERM3 C14630 LAN@GT1206200ASMD

TD3- MX3- TERM4 C14631 LAN@GT1206200ASMD
AVDD_CEN_T 10 15 TERM4
TX3P 11 TCT4 MCT4 14 X-TX3P C5495 C5496
TX3N 12 TD4+ MX4+ 13 X-TX3N 61@10P/3KV_1808N 62@220P/3KV_1808X
TD4- MX4-
62@TST1284ALF C14643 0.1U/50V_6X TX0P C5493 E@6.8P/50V_4N
C14644 0.1U/50V_6X C5526 E@6.8P/50V_4N
TX0N
TX1P C5532 E@6.8P/50V_4N PROJECT : MTT
TX1N C5546 E@6.8P/50V_4N Size Document Number Rev
A1A
Audio Codec (CX20671)
5 4 3 2 1
5 4 3 2 1
Card Reader (AU6437B53-GDL-GR) <MMC> 2 IN 1 Card Reader <MMC>
36
CTRL3 R9773 E@33_4 SD_CD#
D D
VCC_XD
11
12
4
CN2016
VDD
C/D
CD COM
CTRL1 R9772 E@BLM15BD121SN1D_300MA SD_W P 10
DATA2 R9781 E@33_4 SD_D2 9 W/P
DATA1 R9774 E@33_4 SD_D1 8 DATA2
DATA0 R9776 E@33_4 SD_D0 7 DATA1
6 DATA0
R9778 *0_4 CTRL0 R9775 E@BLM15BD121SN1D_300MA SD_CLK 5 VSS2 15
WP COM
R9780 *0_4 3 CLK GND3
VSS1
GND2
CTRL2 R9777 E@33_4 SD_CMD 2
CMD
XTALSEL
DATA1
DATA0
CTRL1
CTRL3
DATA3 R9779 E@33_4 SD_D3 1
NBMD
+1.8V_Card DATA3
+3V_Card
C5499
13
14
C5500 156-5001902601
0.1U/16V_4Y
0.1U/16V_4Y
+3V
48
47
46
45
44
43
42
41
40
39
38
37
C U5029 C
VDDHM2
GND2
VDD3
XTALSEL
NC5
NBMD
CTRL1
CTRL3
DATA1
DATA0
DATA7
NC4
R9782
C5501 *33P/50V_4N
VCC_XD
*10K_4 1 36
2 GPON7 NC3 35 SD_CLK C5502 *10P/50V_4C
{9} 48M_CARD EXT48IN DATA6
{3,9,29,35,37} PLTRST# 3 34 CTRL0
R9785 330_4 4 RSTN CTRL0 33 C5503 C5504
5 REXT DATA5 32 CTRL2 4.7U/6.3V_6X 0.1U/16V_4Y
+3V_Card VD33P
C5506 {9} USB_CARD 6
DP AU6437B53-GDL-GR CTRL2
DATA4
31
C5505 {9} USB_CARD# 7 30 DATA3
*1U/6.3V_4X 8 DM DATA3 29 DATA2
4.7U/6.3V_6X 9 VS33P DATA2 28
10 XI XDWPN 27
11 XO XDCEN 26
+1.8V_Card VDD1 EEPDATA
12 25
V18 EEPCLK
SDWPEN
VDDHM1
AGND5V
AVDD5V
C5507
CF_V33
XDCDN
CTRL4
GND1
VDD2
NC1
NC2
V33
4.7U/6.3V_6X
13
14
15
16
17
18
19
20
21
22
23
24
B AU6437B53-GDL-GR B
VCC_XD
SDW P R9786 *0_4
+3V +3V_Card
+1.8V_Card
+3V_Card
+3V_Card
C5508 C5509
4.7U/6.3V_6X 0.1U/16V_4Y C5510 C5511 SDWPEN (SD write protect enable)

0.1U/16V_4Y 0.1U/16V_4Y 1 : decided by SDWP(default)
0 : SD always write-able
NBMD (Power saving mode enable)

1 : enable (default)
0 : disable
A A
XTALSEL (Clock input selection)

1 : 48MHz input (default) Quanta Computer Inc.
0 : 12MHz input
PROJECT : MTT
A1A
Card Reader(AU6437)
5 4 3 2 1
5 4 3 2 1
EC <KBC> SM BUS <KBC>

37
SMBUS Devices Address
PU/Address 1 Battery(A)
+3VPCU +3V PCH(S5)
+3VPCU
R9788 HCB1608KF-601T10_1A +A3VPCU +3V_VDD_EC R9794 2.2_6 TEMP_MBAT C5523 *10U/6.3V_6X G-sensor(S0)
MBCLK R9791 4.7K_4 2
R9790 C5512 C5513 C5521 C5522 MBDATA R9792 4.7K_4 CPU Thermal(A) 98H
2.2_6 ICMNT C5520 *10U/6.3V_6X 2ND_MBCLK R9795 4.7K_4
0.1U/16V_4Y 10U/6.3V_6X 0.1U/16V_4Y 10U/6.3V_6X 2ND_MBDATA R9796 4.7K_4 IDROM(A)
+3VPCU_EC AC SET_EC C5524 *10U/6.3V_6X VGA Thermal(A or S0) 98H
C5514 C5515 C5516 C5517 C5518 C5519 8769AGND +3VPCU
3 CEC(A)
115
102
19
46
76
88
4
10U/6.3V_6X 0.1U/16V_4Y 0.1U/16V_4Y *0.1U/16V_4Y 0.1U/16V_4Y *0.1U/16V_4Y U5030 MMB(A)
3ND_MBCLK R9798 4.7K_4
AVCC
VDD
VCC1
VCC2
VCC3
VCC4
VCC5
R9799 *100K/F_4 R9800 4.7K_4
D H=1.6mm +3VPCU
3ND_MBDATA
D
3 97
{8,29} LFRAME# LFRAME GPIO90/AD0 TEMP_MBAT {40}
TP <KBC>
126 98 ICMNT
{8,29} LAD0 LAD0 GPIO91/AD1 ICMNT {40} +3V
127 A/D 99 AC SET_EC
{8,29} LAD1 LAD1 GPIO92/AD2 AC SET_EC {40}
128 100 SKU_STRAP_4 R17100 *0_4
{8,29} LAD2 LAD2 GPIO93/AD3 USB_BUS_SW4 {31}
1 108 TPCLK R9793 *4.7K_4
{8,29} LAD3 LAD3 GPIO05/AD4 USB_SC_OC# {9,31}
2 96 TPDATA R9801 *4.7K_4
{9} PCLK_591 LCLK GPIO04/AD5 USB_BUS_SW2 {31}
95 R9804 1.2K/F_4
GPIO03/AD6 NBSWON# {38}
{7} CLKRUN# 8 94
GPIO11/CLKRUN GPIO07/AD7 SUSB# {7}
LED PU/PD <LED>
+5VPCU +5V +5V_S5
121
{10} GATEA20 GPIO85/GA20
D/A 101 SUSLED_EC# R9803 10K_4
GPIO94/DA0 USB_BUS_SW3 {31}
122 105 BAT_SAT0# R9805 10K_4
{10} RCIN# KBRST/GPIO86 GPIO95/DA1 VFAN1 {3}
106 BAT_SAT1# R9806 10K_4 RF_LED# R9802 NAOAC@10K_4
GPIO96/DA2 LAN_P {35,37}
29 LPC
{9} SCI# ECSCI/GPIO54 R17090 330_4 +5V
R162 DS3@0_4 6 R17089 *330_4 +5VPCU R9810 AOAC@10K_4
{10} GPIO27 GPIO24 DISPON_O {28}
64 PWRLED PWRLED R9807 *100K_4
GPIO01/TB2 ACIN {40} PWRLED {38}
124 79 SKU_STRAP_2
GPIO10/LPCPD GPIO02 93
GPIO06/IOX_DOUT LID591# {28}
{3,9,29,35,36} PLTRST#
7
LREST GPIO16
114
GFX_MAINON {47,48} GPIO30 for 2013 17ME Power Ring LED
109 RF_EN R9808 10K_4
123 GPIO30 15 R135 0_4
{32} USB_Normal_EN# GPIO67/PWUREQ GPIO36 VRON {45}
80 SKU_STRAP_3
125 GPIO41 17 H_PROCHOT_EC
{8} SERIRQ SERIRQ GPIO42/TCK H_PROCHOT_EC {3}
20 R138 *0_4
GPIO43/TMS AMP_MUTE# {34}
9 21
{9,32} USB_Normal_OC# GPIO65/SMI GPIO44/TDI ID {40}
GPIO 24 WMAX_P {29}
GPO47/SCL4
INTERNAL KEYBOARD <KBC>
25
GPIO50/PSCLK3/TDO D/C# {40}
54 26 R17067 *0_4
{38} MX0 KBSIN0 GPIO51 S5_ON {3,41} EN_RXD {32}
STRIP SET
55 27
{38} MX1 KBSIN1 GPIO52/PSDAT3/RDY LVDS_BKLT {7,16}
56 28 HWPG MY0 R9809 10K_4 +3VPCU
{38} MX2 KBSIN2 GPIO53/SDA4
57 73
{38} MX3 KBSIN3 GPIO70 SUSC# {7}
58 74
{38} MX4 KBSIN4 GPIO71 MPWROK {7,45}
ID <KBC>
59 75
{38} MX5 KBSIN5 GPIO72 RSMRST# {7}
60 82 R17066 DS3@0_4
{38} MX6 KBSIN6 GPIO75 SLP_SUS# {7,11}
EEPROM
61 83 RF_EN RF_EN {29} +3VPCU
{38} MX7 KBSIN7 GPO76/SHBM U5031
GPIO77
84 GPIO82 for 2013 17ME Numberlock LED
C 53 91 2ND_MBCLK 6 1 C
{38} MY0 KBSOUT0/JENK GPIO81 DNBSWON# {7} SCL A0
52 110 R179 *0_4 2ND_MBDATA 5 2
{38} MY1 KBSOUT1/TCK GPO82/IOX_LDSH/TEST LAN_P {35,37} SDA A1
51 112 3
{38} MY2 KBSOUT2/TMS GPO84/IOX_SCLK/XORTR SUSACK# {7} A2
50 107
{38} MY3 KBSOUT3/TDI GPIO97 DGPU_PWROK {10,25,47,48}
49 KB 7 8
{38} MY4 KBSOUT4/JENO WP VCC
48 4
{38} MY5 KBSOUT5/TDO GND
47 31 SKU_STRAP_1 C5525
{38} MY6 KBSOUT6/RDY GPIO56/TA1
43 TIMER GPIO20/TA2/IOX_DIN_DIO 117 TEMP_ALERT# {10} BR24T08FJ-WGE2
{38} MY7 KBSOUT7
42 63 0.1U/16V_4Y
{38} MY8 KBSOUT8 GPIO14/TB1 FANSIG1 {3}
41
{38} MY9 KBSOUT9/SDP_VIS
40 ADDRESS: A0H
{38} MY10 KBSOUT10/P80_CLK
39 32 RF_LED#
{38} MY11 KBSOUT11/P80_DAT GPIO15/A_PWM RF_LED# {39}
38 118 SUSLED_EC#
{38} MY12 KBSOUT12/GPIO64 GPIO21/B_PWM SUSLED_EC# {39}
37 TIMER 62 BAT_SAT0#
{38} MY13 KBSOUT13/GPIO63 GPIO13/C_PWM BAT_SAT0# {39}
SPI <KBC>
36 65 BAT_SAT1#
{38} MY14 KBSOUT14/GPIO62 GPIO32/D_PWM BAT_SAT1# {39}
35 22
{38} MY15 KBSOUT15/GPIO61/XOR_OUT GPIO45/E_PWM SUSON {42}
FLASH
34 16
{38} MY16 GPIO60/KBSOUT16 GPIO40/F_PWM MAINON {26,43,46}
{38} MY17
33
GPIO57/KBSOUT17 GPIO66/G_PWM
81 GPIO66 for 2013 17ME KB backlight
66
GPIO33/H_PWM CAPSLED {38}
MBCLK 70 14
{40} MBCLK GPIO17/SCL1 GPIO34 BT_RFCTRL {29}
MBDATA 69 SPI_SDI_uR
{40} MBDATA GPIO22/SDA1 PCH_SPI_SI {8}
2ND_MBCLK 67 SMB
{9} 2ND_MBCLK GPIO73/SCL2
2ND_MBDATA 68 113 SPI_SDO_uR
{9} 2ND_MBDATA GPIO74/SDA2 GPIO87/SIN_CR PCH_SPI_SO {8}
3ND_MBCLK 119 IR 23 R9816 1K_4
{16,31} 3ND_MBCLK GPIO23/SCL3 GPIO46/TRST ACZ_SDOUT_R {8}
3ND_MBDATA 120 111 SPI_SCK_uR
{16,31} 3ND_MBDATA GPIO31/SDA3 GPO83/SOUT_CR/TRIST PCH_SPI_CLK {8}
R9818 *10K_4 +3VPCU
R9819 *100K/F_4 SPI_CS0#_uR
PCH_SPI_CS0# {8}
TPCLK 72 86 SPI_SDI_uR
{38} TPCLK GPIO37/PSCLK1 F_SDI/F_SDIO1
TPDATA 71 87 SPI_SDO_uR
{38} TPDATA GPIO35/PSDAT1 F_SDIO&F_SDIO0 EC_DRAMRST_CTRL {26}
10 PS/2 FIU 90 SPI_CS0#_uR R9820 10K_4 +3V_S5
{7} AC_PRESENT GPIO26/PSCLK2 F_CS0
11 92 SPI_SCK_uR
{31} USB_SC_EN# GPIO27PSDAT2 F_SCK
77 30
{7} SUSCLK GPIO00/EXTCLK GPIO55/CLKOUT/IOX_DIN_DIO SUS_PWR_ACK {7}
R124 DS3@0_4 85 VCC_POR# R9825 4.7K_4 +3VPCU
{7,29,35} PCIE_WAKE# VCC_POR
12
VCORF
+VTT VTT
AGND
GND1
GND2
GND3
GND4
GND5
GND6
13 104 VREF_uR R9827 *0_4 +A3VPCU

PECI VREF
B
HWPG circuit <KBC> B
5
18
45
78
89
116
103
44
C5527 NPCE985LA0DX
{3} EC_PECI R9826 43_4 EC_PECR_R
VCORF_uR
*0.1U/16V_4Y
+3VPCU
L5037 *SHORT_6
R9828
C5528
L5037 Can't del, DG link 10K_4
PCLK_591 GND/AGND w 0ohm or one point 1U/6.3V_4X
8769AGND {48} GFX_PG

R9834 *OEV@0_4
R9830
R9832 *PIV@0_4
{45} GFX_PWRGD
*22_4
C5529
R9833 *i3@0_4 HWPG
{44} HWPG_VCCSA
*10P/50V_4C
R9836 *SHORT_4
{46} HWPG_1.8V
Capetown@/Luxor@ EV@ / IV@
SKU_STRAP_1 R5138 *10K_4 +3VPCU
Power Button <KBC> MS Strap SKU_STRAP_1 SKU_STRAP_2 SKU_STRAP_3 R9837 *SHORT_4

{7,41} SYS_HWPG
R5137 *10K_4
13'' UMA 0 0 0
SKU_STRAP_2 R5141 10K_4 +3VPCU
13'' DIS 0 0 1 {42} HWPG_1.5V
R9841 *SHORT_4
R5140 *10K_4
14'' Capetown UMA 0 1 0
R5142 *10K_4
14'' Capetown DIS 0 1 1
DNBSWON# C5530 *0.1U/16V_4Y SKU_STRAP_3 R5144 *EV@10K_4 +3VPCU
14'' Luxor UMA 1 0 0
A R5143 IV@10K_4 A
14'' Luxor DIS 1 0 1
NBSWON# C5531 *0.1U/16V_4Y
Place on easy use location SKU_STRAP_4 R17102 *10K_4 +3VPCU

R17101 10K_4
SKU_STRAP_4
H Shark Bay
L Chief River
PROJECT : MTT
A1A
EC-NPCE885L
5 4 3 2 1
5 4 3 2 1
Power board w LED <PSW>

INT KeyBoard <KBC> TP board <TPD>
38
CN2018
36
K_LED_P
1 MY16
2 MY16 {37}
3 MY17
4 MY17 {37}
5 K_LED_P
6 MY2
7 MY2 {37}
MY1
8 MY1 {37}
MY0
9 MY0 {37}
C5533 *220P/50V_4X MX7 MY4
10 MY4 {37}
C5534 *220P/50V_4X MX2 MY3
11 MY3 {37}
C5535 *220P/50V_4X MX3 MY5
12 MY5 {37}
C5536 *220P/50V_4X MX4 MY14
13 MY14 {37}
MY6
D 14 MY6 {37} D
MY7
15 MY7 {37}
MY13
16 MY13 {37}
C5537 *220P/50V_4X MX0 MY8
17 MY8 {37} +5V
C5538 *220P/50V_4X MX5 MY9 R17094 0_4
18 MY9 {37} {37,38} PWRLED
C5539 *220P/50V_4X MX6 MY10
19 MY10 {37}
C5540 *220P/50V_4X MX1 MY11
20 MY11 {37}
MY12 +5V R17093 *0_4
21 MY12 {37}
MY15 CN2020
22 MY15 {37}
MX7 +5VPCU R17092 *0_4
23 MX7 {37} 1
C5541 *220P/50V_4X MY7 MX2
24 MX2 {37} {37} NBSWON# 2
C5542 *220P/50V_4X MY13 MX3 CN2019
25 MX3 {37} 3
C5543 *220P/50V_4X MY12 MX4 +5V_TP 1
26 MX4 {37} 1 4
C5544 *220P/50V_4X MY15 MX0 TPCLK_L 2 R17091 0_4
27 MX0 {37} {37,38} TPCLK 2
MX5 TPDATA_L 3 88513-0401
28 MX5 {37} {37,38} TPDATA 3
MX6 4
29 MX6 {37} 4
MX1 5
30 MX1 {37} {10,38} ID_Detect 5
K_LED_P C5547 +3V 6
31 6
3
C5549 *220P/50V_4X MY3 CAPSLED E@0.1U/10V_4X
32 CAPSLED {37}
C5550 *220P/50V_4X MY5 2 Q14031
33 {37,38} PWRLED
C5551 *220P/50V_4X MY14 88513-0601 *METR3904-G_200MA
C5552 *220P/50V_4X MY6 34
1
C5561 C5575
35 ID_Detect default E@2200P/50V_4X E@0.1U/10V_4X
C5553 *220P/50V_4X MY2 91504-340N Metal/IMR H

C5554 *220P/50V_4X MY1
C5555 *220P/50V_4X MY0 TEXTURE L
C5556 *220P/50V_4X MY4
+3VPCU
C5557 *100P/50V_4N MY17
RP15
10 1 10KX8 MX7
MX1 9 2 MX2
C5558 *100P/50V_4N MY16 MX6 8 3 MX3
MX5 7 4 MX4
MX0 6 5
C (10mils) B2B C
+3V R9842 150_4 K_LED_P
HOLE
TP board <TPD>
HOLE1 HOLE2 HOLE3
7 6
8 5
9 4
1
1
2
3
CN2025
*h-c276d118p2 *h-c91d91n +5V +5V_TP 1
*hg-tsbsd118p2 TPCLK_L 2 1
{37,38} TPCLK 2
TPDATA_L 3
{37,38} TPDATA 3
4
5 4
{10,38} ID_Detect 5
+3V 6
HOLE4 CGDAT_SMB 7 6
{13,14,29} CGDAT_SMB 7
CGCLK_SMB 8
{13,14,29} CGCLK_SMB 8
*50503-0080N-001
1
*h-tc161bc236d161pb
Need add Level Shift on daughter board for 3V/5V TP Device
HOLE5 HOLE6 HOLE7

7 6
8 5
9 4
B B
1
1
2
3
*h-tc315bc273d118p2 *h-tc315bc273d118p2
*hg-c276d118p2
HOLE8 HOLE9 HOLE10 HOLE11 HOLE12

1
*h-tc161bc236d161pb *h-c236d118p2 *h-c236d146pt *h-c236d146pt *h-c236d146pt
HOLE18 HOLE19
HOLE13 HOLE15 HOLE16 HOLE17
7 6 7 6 7 6 7 6
8 5 8 5 8 5 8 5
9 4 9 4 9 4 9 4
1
1
1
2
3
1
2
3
1
2
3
1
2
3
*h-c91d91n *h-c91d91n
*hg-c276d118p2 *hg-c273d118p2 *hg-c273d118p2 *hg-c273d118p2
HOLE14 HOLE20 HOLE21 HOLE22 HOLE23 HOLE24

1
A A
*O-MTT-3 *o-mtt-2 *h-tc197bc91d91pt *h-tc197bc91d91pt
*o-mtt-1 *h-tc197bc91d91pt
HOLE25 HOLE26 HOLE27

1
*h-tc197bc91d91pt *h-tc197bc91d91pt
*h-tc197bc91d91pt PROJECT : MTT
A1A
KB/TP&TP/PB/FL/LEB/MMB/B-CAS
5 4 3 2 1
5 4 3 2 1
LED LED RF LED LED

BATERRY
+5V
39
+5V_S5
3
+5VPCU 3G_WIMAX_LED# LED1 1 2 12-21/S2C-AQ2R2B/2C R9848 NAOAC@1.2K/F_4
{37} RF_LED#
D R9863 AOAC@1.2K/F_4 D
2 -BATLED0 R9844 2.2K_4 BAT_SAT0#

BAT_SAT0# {37}
1
3 -BATLED1 R9845 1.2K/F_4 BAT_SAT1#

BAT_SAT1# {37}
LED2
12-12Z/S2ST3D-C31/2C(QN)
POWER LED ESD Protect LED
+5VPCU
FOR BATTERY LED FOR W-LAN FOR Power LED
2 LED
1 -BATLED1 3G_WIMAX_LED#
1 1 1
3 -SUSLED R9847 1.2K/F_4 SUSLED_EC# 3 3 3

SUSLED_EC# {37} -BATLED0 -SUSLED
LED3 2 D2033 2 D2034 2 D2035
C C
B2A 12-11Z/T3D-CP2Q2B12Y/2C(QN) *PJMBZ5V6 *PJMBZ5V6 *PJMBZ5V6
B B
EMI EMI
VIN
VIN VIN
+5V_S5 +3V +3V_S5 +3VPCU
C2136 C2137 C2138 C14624

E@1U/25V_6X E@2200P/50V_4X E@1U/25V_6X *E@0.1U/25V_4X
C2145 C2146 C2147 C2148 C2149 C2156 C2157 C2158 C2150 C2151 C2152 C2153 C2154 C2155
*0.1U/16V_4Y E@0.1U/16V_4Y E@0.1U/16V_4Y E@0.1U/16V_4Y E@0.1U/16V_4Y E@0.1U/16V_4Y E@0.1U/16V_4Y E@0.1U/16V_4Y *0.1U/16V_4Y *0.1U/16V_4Y *0.1U/16V_4Y *0.1U/16V_4Y *0.1U/16V_4Y *0.1U/16V_4Y
C2142 C2144 C2143
E@2200P/50V_4X E@2200P/50V_4X E@2200P/50V_4X
VIN
+1.5V
C2118 C2129 C2135 C2139 C2140 C2141

E@1U/25V_6X E@1U/25V_6X E@1U/25V_6X E@1U/25V_6X E@1U/25V_6X E@1U/25V_6X
C2134 C14625
*0.1U/16V_4Y *E@0.1U/16V_4Y
A A
VIN +3V +5V_S5 +3V_S5 +5V +1.5VSUS
C2114
E@2200P/50V_4X
C2115
E@2200P/50V_4X
C2116
E@0.1U/25V_6X
C2117
E@2200P/50V_4X
C2119
*0.1U/16V_4Y
C2120
E@0.1U/16V_4Y
C2121
*0.1U/16V_4Y
C2122
*0.1U/16V_4Y
C2123
E@0.1U/16V_4Y
C2124
*0.1U/16V_4Y
C2125
*0.1U/16V_4Y
C2126
E@0.1U/10V_4X
C2127
*0.1U/16V_4Y
C2128
*0.1U/16V_4Y
C2130
*0.1U/16V_4Y
C2131
E@0.1U/10V_4X
C2132
*0.1U/16V_4Y
C2133
*0.1U/16V_4Y
PROJECT : MTT
A1A
LED/EMI/Green CLK
5 4 3 2 1
5 4 3 2 1
PCN1
4 DC_JACK
PF1
F1206HA15V024TM
1 2 VA0
VA1 PD1
1
3 VA2 1
0.01_3720
PR1
R1
2 VA3
1
2
PQ5001
AP4439GMT
5
VIN
1
2
PQ5002
AP4439GMT
5
P1
BAT-V
2 3 3
3
SBR1045SP5-13
1
PC1 PC2 PC25 PC3 PR2 PC4
4
2 E@2200P/50V_4X E@0.1U/25V_4X E@1U/25V_6X 0.1U/25V_6X 220K/F_4 E@1U/25V_6X PR3
PD2 33K_6
1
D D
PR4 PR5
2
PD3 TVS_SMAJ20A 10/F_6 10/F_6
PC5 PR6
50322-0044L-001 1SS355_100MA ( Near by sense R side) E@2200P/50V_4X 10K/F_6
1 6
PR7 2 5
3
220K/F_4
3 4
PQ5004
PR8 CSIN PQ5003 2 2N7002K_300MA
{37} D/C#
82.5K/F_6 IMD2AT108
+3VPCU
CSIP
{37} AC SET_EC
1
VIN
10U/6.3V_6X
PR10
PC8
PR9 10K/F_4 PC16 PC9 1U/6.3V_4X

10K/F_4 0.1U/10V_4X 1 2
10U/25V_8X
10U/25V_8X
*2200P/50V_4X
*10U/25V_8X
*10U/25V_8X
*0.1U/25V_4X
PC10
PC11
PC12
PC13
PC14
PC15
PR11
( Near by IC side) 4.7_6
PC17 1U/6.3V_4X
1 2
ACIN
33
32
31
30
28
27
26
21
C C
{37} ACIN
5
+3VPCU
PC18 0.1U/10V_4X
CSSP
VDDP
NC
GND
GND
GND
GND
CSSN
VCC
PQ5005
PR12 PC19
2.7_6 0.1U/25V_6X 4 AON7410
{37,40} MBDATA 11 25
VDDSMB BOOT
0.01_3720
3
2
1
{37,40} MBCLK 9 24 88731A_U_GATE PR13
SDA UGATE
PL1
10 23 88731A_PHASE 1 2 BAT-V
SCL PHASE
10U/25V_8X
10U/25V_8X
PD4 3.3UH_7X7_TOK
TVLST2304AD0 13 20 88731A_L_GATE
1 6 ACOK LGATE
PC21
PC22
ID MBDATA PQ5006 PR14
CH1 CH4 PC20 E@2.2/F_6
2 5 PR15 0.1U/25V_6X 19 4 AON7410
VN VP +3VPCU PGND
49.9/F_6 PU1 PR16 PR17
TEMP_MBAT 3 4 MBCLK DCIN 22 ISL88732HRTZ-T 10/F_6 10/F_6
CH2 CH3 DCIN PC23
3
2
1
PR18 E@1000P/50V_4X
82.5K/F_6 3.2V 18
2 CSOP
88731ACIN
ACIN ( Near by sense R side)
PC24
0.1U/10V_4X CSOP
PR19 3 ( Near by IC side)
22K/F_6 VREF 17 CSON
+3VPCU CSON
B B
4
PR21 ICOMP 16
PR20 NC
*SHORT_4
*100K_4 5
NC
PCN2 PF2 15 PR22 100_4 BAT-V
F1206HA15V024TM 6 VBF
10 1 2 VCOMP 29
1
MBAT+ BAT-V
GND (Please place this R near by battery pack side)
GND
2
ICM
PR30 1K_4 NC
NC
3 ID {37}
BAT-GND
4 TEMP_MBAT_C
5
7
14
12
M-DATA
6 M-CLOCK PR23
7 2.21K/F_6
8 PC28 +3VPCU
9 PC30 PC31 PC32
11
2
PC29 47P/50V_4N
PR25 PR26
100/F_4 PR27 *1U/6.3V_4X 2200P/50V_4X 0.01U/25V_4X PR28
1
100/F_4 ICMNT {37}

100K_4
BTS1E-9K8040 47P/50V_4N MBDATA {37,40} 100_4
10U/6.3V_6X
1K_4 PC33
MBCLK {37,40}
TEMP_MBAT {37}
PR29
1
A PC34 A
0.01U/25V_4X
2

PROJECT : MTT
CHARGER-ISL88731C A1A
5 4 3 2 1
5 4 3 2 1
VIN
VIN
P2
10U/25V_8X
VIN
+5VPCU PC35
PC36
10U/25V_8X
PC39 0.1U/25V_6X
PC37 1 2
PC38
0.1U/25V_6X PR32
D 2.2/F_8 10U/6.3V_6X D
+3VPCU +2VREF
10U/6.3V_6X
1
1
PC41 PC42
PC43
0.1U/25V_6X 1U/6.3V_4X
2
PR33
PQ5007 *0_2/S
16
17
8
5
(Peak 12.85A ,AVG 9A) AON7410 PU2 PQ5008
(Peak 13.47A, AVG 9.43A)
VIN
VREG3
VREG5
REF
13 4
OCP:15A 4 TP2038 EN TONSEL
AON7410
5V_UGATE1 21 10 3V_UGATE2 4
OCP:15A
PR34 UGATE1 UGATE2 PR35 PC45
+5V_S5 PC44 0.1U/25V_6X 1 25V_BST1 22 9 1 2 +3V_S5
1
2
3
BOOT1 BOOT2
3
2
1
PL2 2.2_6
20
RT8223P 11
2.2_6 0.1U/25V_6X PL3
+5V_1 5V_PHASE1 3V_PHASE2 +3.3V_1
2.2UH_7X7_TOK PHASE1 TOP Side PHASE2 2.2UH_7X7_TOK
5
5V_LGATE1 19 12 3V_LGATE2
220U/6.3V_7343P_E15b
220U/6.3V_7343P_E15b
PR36 LGATE1 LGATE2
24
PC46
PC47
ENTRIP1
ENTRIP2
SKIPSEL
+ *2.2/F_6 5V_FB1 2 VOUT1 7 PR37 +
C FB1 OUT2 C
4 4
EMC
GND
GND
PR38 DDPW RGD_R 23 5 3V_FB2 *2.2/F_6 PR40
PQ5009 PGOOD FB2 PQ5010 PR39 6.8K/F_4
*0_2/S
*0_2/S
1
2
3
18
14
25
15
3
2
1
PC48 AON7752 AON7752 PC49
*1000P/50V_4X
PR41 PR42 *1000P/50V_4X
15.4K/F_4 Rds(on) 13m ohm
158K/F_4 PR43
PR44 *0_4/S
+3VPCU
Rds(on) 13m ohm
169K/F_4
1
PR45 PR46
10K/F_4 PR47 0_6
10K_4 PR48
PR203
2
*SHORT_4 10K/F_4
PC50 +3VPCU
2 {3,37} S5_ON
0.1U/25V_6X
PD5
BAV99W -7-F_150MA 3
1
PC51
PR49
0.1U/25V_6X
B B
2 *10K_4
PD6
BAV99W -7-F_150MA
3
PC52
1 0.1U/25V_6X DDPW RGD_R
SYS_HW PG {7,37}
PR50 +3V_S5
+15V_ALW P +5V_S5
+15V
22_8
PC53
0.1U/25V_6X
5
PQ5011
AON7406
MAIND 4
1
2
5
6
MAIND 3 PQ5012
3
2
1
AO6402A TOP Side
{26,42,46} MAIND MAIND
4
TOP Side
+3V
A A
(Peak 9.3515A, AVG 6.55A)
+5V
(Peak 4.7683A, AVG 3.338A)
PROJECT : MTT
System 3V/5V(TPS51123A) A1A
5 4 3 2 1
5 4 3 2 1
Be careful to this two net name.
P3
29.4K/F_4 PR53
VIN
PR51 *SHORT_4
10U/25V_8X
PR214
S3_1.5V {26}
200K_4
+3VPCU
PC56
*100K_4 S5_1.5V PC55
SUSON {37}
PR54 *SHORT_4 0.1U/25V_6X
D D
{37} HWPG_1.5V PR55
PR52
PC54 0.1U/25V_6X
2.2/F_6
OCP:20A
23
22
21
20
19
18
17
16
PU3 PQ5013 (Peak 17.81A, AVG 12.46A)
HP8S36TB
PGOOD
MODE
TRIP
PwPad-2
PwPad-1
PwPad
S3
S5
1 15 ESR :
+SMDDR_VTERM VTTSNS VBST
2
9mΩ
G1
D1
D1
D1
2 14 1.5SUS_HG f : 400k Hz
+1.5VSUS_SRC VLDOIN DRVH
3 TPS51216RUKR 13
VTT SW
10U/6.3V_6X
10U/6.3V_6X
S1/D2
PC57
PC58
4 12
VDDQSNS
PL4
VTTGND V5IN
PwPad-3
PwPad-4
PwPad-5
1.5SUS_PHASE 9 +1.5VSUS_SRC
+1.5VSUS
REFIN
PGND
5 11
VREF
GND
VTTREF DRVL 1.5UH_10X10
+5V_S5
G2
S2
S2
S2
PR57 PC60 PC104
24
25
26
10
5
PR56 PC61 1 2 1U/6.3V_4X + + PC181
+SMDDR_VREF
330U/2V_7343P_E9c
*330U/2V_7343P_E9c
C E@2.2/F_6 C
0_8 1.5SUS_LG *10U/6.3V_6X
PC62
(Peak 0.1A, AVG 0.07A) 0.22U/10V_4X
PC63
RDSon=3.3m ohm PC59
E@1000P/50V_4X *0.1U/10V_4X
PR58 +1.5VSUS
10K/F_4 R1
Vout =1.8 x (R2/R1+R2)
PC64
B 0.1U/10V_4X PC66 B
1
2
5
6
0.01U/25V_4X
PR59
52.3K/F_4 MAIND 3 PQ5015
{26,41,46} MAIND
R2 AO6402A
4
+1.5V
(Peak 0.167A, AVG 0.117A)
A A

PROJECT : MTT
A1A
DDR1.5V
5 4 3 2 1
5 4 3 2 1
D
+3V_S5
P4 D
PR63 PR64
10K_4 *0_4
+5V_S5 PR65 10/F_6

VIN
RT8240BVCC
RT8240BTON
1
PC71
10U/25V_8X
1U/6.3V_4X
+3V_S5
PC74
PC72
2
PQ5021
*0.1U/25V_4X OCP:30A
HP8S36TB (Peak 25A, AVG 17A)
PR66
11
PR68 PC75
2
10K_4 PU5
G1
D1
D1
D1
3 RT8240BDH
VCC
G0
PR67 UGATE
C 10 PC73 C
CS 4 RT8240BBST_1 2.2_6 0.1U/25V_6X *2200P/50V_4X +VTT +1.05V
66.5K/F_4 BOOST
S1/D2
9 RT8240BZQW PL5
{44} HWPG_VCCIO PGOOD 2 RT8240BLX 9
8 PHASE
EN 1 RT8240BDL 1.0UH_10X10
G2
LGATE
RGND
S2
S2
S2
GND
13 PR215
0.1U/10V_4X
FB
5
PAD
10U/6.3V_6X
PC77
E@2.2/F_6
330U/2V_7343P_E9c
*Celeron@330U/2V_7343P_E9c
12
PC108
+ +
PR69
0_4
RT8240BFB
PC76
PC105
PC196
{26,37,46} MAINON
B E@1000P/50V_4X B
PC78 PC79
0.1U/10V_4X PR71
*100P/50V_4N
PR72
PR73 0_4 VCCP_SENSE {5} 100_4
0_4
R1
PR74
PR75 0_4
*10K/F_4
VSSP_SENSE {5}
R2
PR76
*0_4
A
Quanta Computer Inc. A
PROJECT : MTT
A1A
VOUT=(1+R1/R2)*0.5 +VCCIO(RT8240BGQW)
5 4 3 2 1
1 2 3 4 5
P5
PR77 *i3@2.2K_4
{37} HWPG_VCCSA
VCCSA_VID1 {5}
A A
+5V_S5 VCCSA_VID0 {5}
PC80 *i3@1U/6.3V_4X
PR78 *i3@2.2K_4
PC81
HWPG_VCCIO {43}
*i3@2.2U/6.3V_4X OCP:8.12A
(Peak 6.000A ,AVG 4.200A)
PC122 **i3@0.033U/10V_4X Total capacitor : 66uF
18
17
16
15
14
13
ESR :
VID1
VID0
PGOOD
EN
V5FILT
V5DRV
PC82
19 12 9mΩ
B PGND BST f : 300k Hz B
*i3@0.1U/25V_6X +VCCSA
20 11
PGND SW
PL6
21 10
PC84 PGND *i3@TPS51463RGER SW *i3@0.47UH_5X5 PC87
PC83 PC85 PU6 *i3@22U/6.3V_8X PC107
*i3@10U/6.3V_6X *i3@0.1U/10V_4X 22 9 *i3@22U/6.3V_8X
VIN SW
PR79
*i3@100_4
*i3@10U/6.3V_6X PC86 PC88
*i3@22U/6.3V_8X *i3@22U/6.3V_8X
23 8
VIN SW
24 7
VIN SW
COMP
MODE
SLEW
VOUT
VCCSA_VCCSSENSE_R
VREF
GND
+5V_S5 VCCSA_VCCSSENSE {5}

C PR216 C
*i3@0_4
1
6
R +VCCSA
PR80 **i3@33K/F_4 OPEN *0.8V
VCCSA_VID0 VCCSA_VID1 +VCCSA PC89
33K *0.85V
0 0 0.9V R
*i3@0.22U/10V_4X
*i3@0.01U/25V_4X
PR81
PC90
0 1 *0.8V
*i3@5.1K/F_4
*i3@3300P/50V_4X
PC92
0 1 *0.85V
PR95
1 0 0.725V **i3@10K_4
1 1 0.675V
D
Quanta Computer Inc. D
*0.8V FOR SV TYPE

*0.85V FOR LV/ULV TYPE PROJECT : MTT
A1A
+VCCSA(TI51461)
1 2 3 4 5
5 4 3 2 1
PR101 PIV@1/F_6
P6
95836_UGATE1G VIN
E@0.1U/25V_4X
PIV@10U/25V_8X
PIV@10U/25V_8X
PR83 PQ5018
PC96
PC93
PC94
PR84 PC95 PIV@2.2/F_6 PIV@HP8S36TB
2
PC97 PIV@2K/F_4 PIV@330P/50V_4X 95836_BOOT1G
G1
D1
D1
D1
*PIV@330P/50V_4X Max. DCR=1.4m
PR85 PC91
D PIV@0_4 PR88 35.7K/F_4 PIV@0.22U/25V_6X D
S1/D2
{5} VCC_AXG_SENSE VCC_AXG_SENSE_R PL7 PIV@0.24UH_7X7
95836_PHASE1G 9 +VAXG
{5} VSS_AXG_SENSE VSS_AXG_SENSE_R PR86 PR87 PC98
PIV@560U/2V_7343P_E4.5a_3pin
PC99 PIV@2.61K/F_4 PIV@267K/F_4 PIV@150P/50V_4N
PIV@1000P/50V_4X PIV@2.2/F_6
G2
S2
S2
S2
PR89
PR91
PIV@0_4
PIV@10U/6.3V_6X
*PIV@0.1U/10V_4X
8
PIV@330U/2V_7343P_E9c
ISUMPG
PR70
PR204
PC179
PIV@0.01U/25V_4X PC100 PR90 PC101 95836_LGATE1G + +
PC180
PIV@390P/50V_4X PIV@499/F_4 PIV@47P/50V_4N
PC102
PC103
ISUMNG
PC106
*0_2/S
*0_2/S
+5V_S5 PR92
+5V_S5 PIV@3.65K/F_6
ISUMPG
PR93 +VCC_GFX
PR96
+5V_S5 *OEV@1K_4 PR94
PIV@2.61K/F_4
TDC : 35A
1/F_6 PR97
GFX_CORE Load Line : PEAK : 46A
*SHORT_6
PR98 connect to +5V ISUMPG
PC109 PC110 PR105
PIV@11K/F_4
VSUMG- PR99 PIV@1/F_4
-3.9mV/A for GT2 OCP : 55A
PIV@1K/F_4 PIV@0.1U/10V_4X PIV@0.022U/16V_4X Width : 1400mil
39
38
37
40
(disable AXG-2)
3
ISUMNG
PR106 +VAXG
RTNG
FBG
COMPG
ISUMPG
ISUMNG
ISEN1G
ISEN2G
+3V_S5 +3V_S5 +1.05V PR100 PIV@NTC_10K_4
PC112 PC111 PIV@453/F_4 PC195
1U/6.3V_4X 1U/6.3V_4X PC191 PC193 PIV@22U/6.3V_8X PC143
*100K/F_4
C5574 0.1U/10V_4X 95836_VCCP 26 35 PIV@22U/6.3V_8X PIV@22U/6.3V_8X E@0.1U/10V_4X

*1.91K/F_4
VCCP PWM2G PC113 PC114

*499/F_4
1.91K/F_4
PR108 95836_VDD 25 31 95836_BOOT1G *PIV@3300P/50V_4X

PR102
PR103
PR104
PR107
PR211 0_4 100K_4 VDD BOOT1G PIV@0.1U/10V_4X

{7,37} MPWROK
32 95836_UGATE1G
UGATE1G PR109
{37} VRON PR110 *0_4 95836_VRON 9 33 95836_PHASE1G *PIV@619/F_4
VR_ON PHASE1G PC190 PC192 PC194 PC142
C {37} GFX_PWRGD
36 34 95836_LGATE1G PIV@22U/6.3V_8X PIV@22U/6.3V_8X PIV@22U/6.3V_8X E@0.1U/10V_4X C
PGOODG LGATE1G
{3,7} DELAY_VR_PWRGOOD
19 30
PGOOD BOOT2
{3} H_PROCHOT#
8 PU7 29 DEL Phase 2 for saving space PR124 1/F_6
VR_HOT# ISL95836HRZ-T UGATE2 95836_UGATE1 VIN
{5} VR_SVID_CLK
5 28
SCKL PHASE2
1
PC115 PR111
10U/25V_8X
10U/25V_8X
E@0.1U/25V_4X
43P/50V_4N 6 27 2.2/F_6 PQ5019 +
{5} VR_SVID_ALERT# ALERT# LGATE2
Check pull up resister to 95836_BOOT1 HP8S36TB PC189
PC118
PC119
PC120
7 20
1.05V for H_PROCHOT# {5} VR_SVID_DATA 95836_BOOT1 100U/25V_105CE_f
VCORE Load Line :
2
SDA BOOT1
2
1.9mV/A
G1
D1
D1
D1
95836_NTCG 4 21 95836_UGATE1 PC116
+1.05V NTCG UGATE1 0.22U/25V_6X
95836_NTC 10 22 95836_PHASE1 (Peak 33A ,AVG 33A)
NTC PHASE1 +5V_S5
S1/D2
23 95836_LGATE1 PL8 0.24UH_7X7
PR116 LGATE1 95836_PHASE1 9 +VCC_CORE
PIV@27.4K/F_4 PR118 24 95836_PWM3
PR112
PR113
PR114
130/F_4
*75/F_4
54.9/F_4
PWM3
560U/2V_7343P_E4.5a_3pin
*560U/2V_7343P_E4.5a_3pin
27.4K/F_4
E@2.2/F_6
G2
S2
S2
S2
ISEN3/FB2
41 PR119
PR120
VR_SVID_CLK PAD 1K/F_4
ISUMN
ISUMP
330U/2V_7343P_E9c
8
5
COMP
ISEN1
PR115 PR117 ISEN2 + +
PR205
PR206
RTN
PIV@NTC_470K_4 NTC_470K_4 95836_LGATE1 +
PC186
PC187
PC188
FB
E@1000P/50V_4X
VR_SVID_ALERT#
PR121 PR122
PC123
18
17
16
15
14
13
12
11
VR_SVID_DATA PIV@3.83K/F_4 3.83K/F_4
*0_2/S
*0_2/S
PR123
3.65K/F_6
VSUM+
95836_COMP PR125 1K/F_4
+5V_S5
PC125 PR126 PC126

68P/50V_4C 499/F_4 390P/50V_4X VSUM- PR127 1/F_4
B B
PR131
PC130
150P/50V_4N 1.96K/F_4
PR129 VSUM+
267K/F_4
PR132 PR134
PR133 2.61K/F_4
0.1U/10V_4X
40.2K/F_4
PR135
PC135
2K/F_4
PC138 11K/F_4
0.022U/16V_4X
PC139 PR136
680P/50V_4X NTC_10K_4
PR137 453/F_4
VSUM-
PC140
0.1U/10V_4X
PC141 PR138
0.01U/50V_4X 619/F_4
PC144
*330P/50V_4X
{5} VCC_SENSE PR140 0_4 VCC_SENSE_R
{5} VSS_SENSE PR142 0_4 VSS_SENSE_R
PC146
0.01U/25V_4X
A A

PROJECT : MTT
A1A
+VCC_CORE+VGFX (ISL95836) 35W
5 4 3 2 1
5 4 3 2 1
+5V_S5
P7
+3V_S5
PR217 *10K_4
PU8
G9661-25ADJF12U
PC147 0.1U/10V_4X 4 1
{26,37,43,46} MAINON VPP PGOOD HWPG_1.8V {37}
2 6
VEN VO +1.8V
D PR146 0_4 (Peak 1.242A, AVG 0.869A) D
+3V_S5 3
VIN
10U/6.3V_6X
8
GND
ADJ
PC148
9 5
GND NC
10U/6.3V_6X
PC150
7
PC149 PC151
0.1U/10V_4X *0.1U/10V_4X
R1 PR147
12.7K/F_4
PR148
Vout =0.8(1+R1/R2) 10K/F_4
R2
C C
VIN +3V +5V +SMDDR_VTERM +VTT +1.5V +15V
PR149 PR151 PR155 PR225 PR226 PR154 PR150

1M_4 22_8 22_8 22_8 22_8 22_8 1M_4 {26,41,42} MAIND
{26} MAINON_ON_G
3
3
PR152 PQ5025A PQ5025B PQ5035A PQ5035B PQ5026A PQ5026B
B 2 1M_4 2 5 2 5 2 5 PC152 B
{26,37,43,46} MAINON 2200P/50V_4X
2N7002KDW_115MA 2N7002KDW_115MA 2N7002KDW_115MA 2N7002KDW_115MA 2N7002KDW_115MA 2N7002KDW_115MA
PQ5024
1
4
PR153
100K_4
LTC044EUBFS8TL_30MA
A
Quanta Computer Inc. A
PROJECT :MTT
A1A
+1.8V/Discharge
5 4 3 2 1
5 4 3 2 1
PC153
2 1
*EV@1U/6.3V_4X
PR156
*EV@2.2/F_6
+5V_S5
PR157
P8
*EV@2.2/F_6
PQ5028 VIN
*EV@HP8S36TB
D D
*EV@10U/25V_8X
*EV@10U/25V_8X
+VGPU_CORE
1
G1
D1
D1
D1
Fs=300K
PC155
PC156
PC154
20
1
PC157
TDC : 20.5A
2
*EV@4.7U/6.3V_6X +3V
LGATE
PVCC
S1/D2
PR158 9 Imax :30A
*EV@0_6 2
PGND VCC
19 ISL95870A_AGND *EV@0.1U/25V_6X OCP :36A
PR159
*EV@1K_4
ISL95870A_AGND
G2
S2
S2
S2
PC158
3 18
5
GND BOOT PR160
*EV@2.2/F_6 *EV@0.1U/25V_6X
4 17
RTN UGATE PL10 +VGPU_CORE
Max.
*EV@0.36UH_10X10-O DCR=1.4m
GFX_CORE_CNTRL1 5 16 CORE-PHASE1 1 2
{16} GFX_CORE_CNTRL1 VID1 PHASE
PR161 *PX@10K/F_4 +3V_S5
4
GFX_CORE_CNTRL0 6 PU9 15 PR162 *PX@0_4 PR163
{16} GFX_CORE_CNTRL0 VID0 EN PX_MODE {25,48}
PR212 *OEV@0_4 *EV@2.2/F_6
*EV@330U/2V_7343P_E6b
*EV@330U/2V_7343P_E6b
GFX_MAINON {37,48}
*EV@ISL95870AHRUZ-T
7 14 + +
SREF PGOOD DGPU_PWROK {10,25,37,48}
R1 8 13
PC159
PC160
PR165 *EV@0_4 ISL95870A_AGND PC161
PR223 PR164 SET0 FSEL *EV@1000P/50V_4X
*Thames@18.7K/F_4 *Seymour@68.1K/F_4
*EV@0.1U/10V_4X
C 9 12 C
SET1 VO
PC162
OCSET
R2
FB
*EV@0.022U/16V_4X
PR222 PR168 PR169
10
11
PC163
*Thames@66.5K/F_4 *Seymour@332K/F_4
*Seymour@31.6K/F_4
R4 PR172 Roc
PR220
+3VPCU
R3 *Thames@71.5K/F_4
*EV@7.15K/F_4
95870A_FB
PR221 PR173
*Thames@590K/F_4 *Seymour@590K/F_4 PC164
PR167
PR174
PR166 *EV@10K_4
*EV@10K_4 *EV@0.1U/25V_6X
*EV@3.09K/F_4
GFX_CORE_CNTRL0 GFX_CORE_CNTRL1 PR175
ISL95870A_AGND
PR170 PR171 Csen *EV@7.15K/F_4

*EV@10K_4 *EV@10K_4 PR178 PR176 PR177
*EV@3.09K/F_4 *EV@10/F_6 *EV@10/F_6
R5
PR179 *Seymour@2.49K/F_4
B GPU_CORE_SEN {19} B
PR219 *Thames@2.32K/F_4
R6
PR180 *Seymour@2.49K/F_4
GPU_CORE_RTN {19}
PR218 *Thames@2.32K/F_4
Seymous XT
+VGPU_CORE
VIN
GFX_CORE_CNTRL1 GFX_CORE_CNTRL0 +VGPU_CORE
Seymous XT Thames XT
1 1 0.9V
R1 68.1K 18.7K
PR182 1 0 1V
PR181 *EV@22_8 R2 31.6K 66.5K
*EV@1M_4 0 1 1.05V
PR210 *OEV@22_8 R3 590K 590K
GFX_MAINON
0 0 1.15V
R4 332K 71.5K
3
Thames XT R5 2.49K 2.32K

PX_MODE 2 R6 2.49K 2.32K
PR183 2 GFX_CORE_CNTRL1 GFX_CORE_CNTRL0 +VGPU_CORE
PR209 *PX@22_8 *EV@1M_4
PQ5030 1 1 0.875V
1
A PQ5029 *EV@2N7002K_300MA A
*EV@LTC044EUBFS8TL_30MA 1 0 0.9V
1
0 1 1V
0 0 1V
PROJECT : MTT
GPU Core ( ISL62881C) A1A

5 4 3 2 1
5 4 3 2 1
+5V_S5
+3V_S5
PR184
+1.5VSUS
P9
2
*EV@100K_4 PC165 PC166 +3V_S5
*EV@10U/6.3V_6X *EV@0.1U/10V_4X
PR185 PC167 PU10
1
DGPU_PWR_EN *PX@0_4 *EV@0.1U/10V_4X *EV@G9661-25ADJF12U +1.05V +1V_GPU
D 4 1 PQ5031 *EV@AON7406 D
VPP PGOOD GFX_PG {37}
PR189 1 PR186
DGPU_PWROK *OEV@0_4 2 6 R9530 *OEV@0_8 2 5 *EV@100K_4
VEN VO +1.8V_GPU PU11
3
3 *EV@G9334TB1U
+3V_S5 VIN
8 5 4 +1V_GPU_PG
GND DRV PGD
ADJ
9 5 Rg PR187 PR213 *OEV@0_4
GFX_MAINON {37,47}
4
GND NC PR188 PC168 *EV@10K/F_4
PC169 PC172 1 PR190 *PX@0_4 DGPU_PWR_EN
7
PC170 *EV@43.2K/F_6 *EV@10U/6.3V_6X *EV@10U/6.3V_6X *EV@10U/6.3V_6X 3 EN
*EV@10U/6.3V_6X FB +5V_S5
GND
6
VCC
PC171 PC173 Rh PR191 PR192
2
*EV@0.1U/10V_4X *EV@0.1U/10V_4X *EV@10K/F_4 *EV@100/F_6
PR193 PC174
Vout =0.8(1+R1/R2) =1.8V *EV@34K/F_6 PC175 *EV@0.1U/10V_4X
1
*EV@0.033U/50V_6X
VIN Vout1 = (1+Rg/Rh)*0.5
(Peak 6.000A ,AVG 4.200A)

C +15V +1.5VSUS C
Total capacitor : 22uF
PQ5027B +3V_D
*EV@2N7002KDW_115MA
PQ5032
PC6 PC26 PR194 PR195 *EV@AON7516
*PX5@22_8
5
*E@1U/25V_6X *EV@1M_4 *EV@1M_4
*E@2200P/50V_4X PR224
5
PR202 *PX@0_4 GFXPG_1.5V_EN_D 4

{25,47} PX_MODE
3
3
PR201 *PX5@0_4 +1.5V_GPU
3
{25} DGPU_PWR_EN
3
2
1
6
PR196 *OEV@0_4 2
{10,25,37,47} DGPU_PWROK
2 PC176 2
*EV@22_8
PR198 PR197 PQ5027A
B2A
1
*EV@100K_4 PQ5033 *EV@1M_4 PR199 *EV@2200P/50V_4X PQ5034

*EV@2N7002KDW_115MA *PX5@2N7002K_300MA PC177
1
*EV@10U/6.3V_6X
1
+1.5V_GPU
B *EV@LTC044EUBFS8TL_30MA B
Power On Sequence
1. +3V_GPU connect +3V
2.PX_PWRGOOD Enable +VGPU_CORE
3.DGPU_PWROK Enable(Delay) +1.8V_GFX
4. DGPU_PWR_EN Enable(Delay) +1.5V_GFX
5.DGPU_PWR_EN Enable(Delay) +1V_GFX
A A

PROJECT : MTT
A1A
+VGACORE
5 4 3 2 1
5 4 3 2 1
MODEL MTT
Model REV CHANGE LIST PAGE FROM To
A1A Schematic Release
1 1A
Page 27:HDMI support Dongle feature with AP2337 HDMI Power switch. 2 1A
B2A Page 27:Remove CEC feature , 2013 CEC feature not support. 3 1A
MTT Page 35:Change LAN schematic from AR8151/52 to AR8161/62 4 1A
Page 43: Reverse PC196 and change PL5 footprint for support Celeron CPU and change PR67 value to 66.5K/F_4 5 1A
D
Page 5: Add R17083/R17084 and change R197 value to add i3@ for support Celeron CPU 6 1A D
Page 44: Change VCCSA schematic value to add i3@ for option i357 / Celeron CPU 7 1A
Page 38: Add MOS to support LED EC pin change from low-active to high-active and change Hole14 Footprint for ME placement 8 1A
Page 35: Change CN2015 pin9 and hole1 from LAN_GND to GND 9 1A
Page 37: Change R9827 Value from *short0402 to *0_4 for EC985 leaking current issue and change U5030 from 885 to 985 10 1A
Page 37: Change R9807 Value to 100K_4 PD and and EC GPIO66(CAP LED) change to GPIO33 11 1A
Page 8: R2075 PU from +3V_S5 to +V3A 12 1A
Page 10: Add board ID 16/17 for Celeron/i357 CPU 13 1A
14 1A
15 1A
16 1A
17 1A
18 1A
19 1A
20 1A
21 1A
22 1A
23 1A
24 1A
C
25 1A C
26 1A
27 1A
28 1A
29 1A
30 1A
B B
A A
PROJECT MODEL : MTT APPROVED BY: DATE: Quanta Computer Inc.

DOC NO. 204 PROJECT : MTT
PART NUMBER: DRAWING BY: REVISON: Size Document Number Rev
1A
Change list
5 4 3 2 1

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1 2 3 4 5 6 7 8

MTT Chief River Block Diagram 01

DDR SYSTEM MEMORY

INT_HDMI HDMI Level Shift

USB3.0 Level Shift

+VCORE+VGFX (ISL95836) P45

Quanta Computer Inc.

System SYSTEM POWER (Peak 6A ,AVG 4.2A)

(Peak 13.47A ,AVG 9.43A) OCP 15A G9661-25ADJ

+VCCRTC +3.0V~+3.3V S0~S5

+3V +3.3V MAIN_ON S0

+3VPCU +3.3V AC/DC Insert enable S0

+1.5V +1.5V MAIN_ON S0

+1.5V_SUS +1.5V SUSON S0~S3

+VTT +1.05V MAIN_ON S0

+1.05V +1.05V MAIN_ON S0

Quanta Computer Inc.

Ivy Bridge Processor (DMI,PEG,FDI) CPU/VGA Ivy Bridge Processor (CLK,MISC,JTAG)CPU

PCI EXPRESS -- GRAPHICS

JTAG & BPM

OEV Shift C1033

Quanta Computer Inc.

Date: Saturday, December 22, 2012 Sheet 3 of 49

DDR SYSTEM MEMORY B

Quanta Computer Inc.

Date: Saturday, December 22, 2012 Sheet 4 of 49

<CPU> Ivy/Sandy Bridge Processor (POWER)

PEG AND DDR

VIDSCLK C44 H_CPU_SVIDDAT R18 VCCSA[8]

VCC_SENSE G43 VSS_SENSE_RR R122 0_4

R219 10/F_4 +VTT

Layout note: need routing

H_CPU_SVIDCLK R121 *SHORT_4 VR_SVID_CLK {45}

H_CPU_SVIDDAT R101 *SHORT_4 VR_SVID_DATA {45}

H_CPU_SVIDALRT# R119 43_4 VR_SVID_ALERT# {45}

Quanta Computer Inc.

F29 T56 AE8 AU1

L26 BE4 AJ20 AY55

Processor Strapping DDR3 VREF DQ (M3) S3P

Cougar Point (DMI,FDI,PM)CLG

Digital Display Interface

System Power Management

PM_RI# A10 +3V_S5 K14 GPIO29

PCH CLG/PIV/S3P System CLG Deep Sx CLG

AC_PRESENT_R R2017 DS3@0_4 AC_PRESENT {37}

+V3A SUSACK#_R R17070 DS3@0_4 SUSACK# {37}

PM_BATLOW# R2016 8.2K_4 R2022 *0_4

PCIE_WAKE# R2019 10K_4

A PM_DRAM_PWRGD R2025 *S3@200/F_4 2 R2026 NS3_NDS3@0_4 RSMRST# A

RSMRST# R2028 10K_4 C5573 C5580 C5583

LVDS_BKLT_PCH R2032 *PIV@100K_4

Date: Saturday, December 22, 2012 Sheet 7 of 49

HDA_SDIN1 SATA2TXN AH4

R2046 PCH_SPI_CLK_R2R R2221 0_4 PCH_SPI_CLK_R2 T3 AH1 SATA3_RBIAS R2052 750/F_4

*33P/50V_4N PCH_SPI_SI_R2R R2227 0_4 PCH_SPI_SI_R2 V4 +3V V14 GPIO21

0 = "top-block swap" mode R2058 *1K_4

0 = Override R2067 *1K_4 ACZ_SDOUT_R

PCH Dual SPI CLG 0 = Set to Vss R2068

R2212 SHORT_6 L8 OEV@0_8 +1.05V_VCCA_B_DPL

D2006 RB500V-40_100MA R2214 0_6

C5588 39P/50V_4N C3002 0.1U/10V_4X R3007 SHORT_4 +SMDDR_VREF

R5000 EV@10K_4 AH16 PCIE_CALR_RX Y29 R5002 EV@2K/F_4 +1V_GPU

EV@4.7U/6.3V_6X EV@1U/6.3V_4X *EV@0.1U/10V_4X U5000I PART 7 0F 9

EV@4.7U/6.3V_6X EV@1U/6.3V_4X *EV@0.1U/10V_4X