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FAN5660
Monolithic Inductorless CMOS DC/DC Converter

Features General Description

• Inverts, Doubles or Splits Input Supply Voltage
• 90% Typ Conversion Efficiency at 100mA load current
• 0.5V Typ Loss at 100mA Load
• Low 160µA Operating Current
• 5.0Ω Typ Output Resistance for C1 = C2 = 100µF
• Selectable Oscillator Frequency: 5kHz/50kHz
• 8-pin SOIC package.
Applications
The FAN5660 is a monolithic charge-pump which can
invert, double or split a +1.5V to +5.5V input voltage.
Using only two identical low-cost capacitors, the charge
pump replaces switching regulators, thus eliminating
inductors and their associated cost, size, and EMI. The
device has a greater than 90% efficiency over most of its load
current range and a typical operating current of only 160µA.
The FAN5660 is ideal for both battery-powered and board-
level voltage conversion applications.

• Laptop Computers In order to enable the user optimize capacitor size and
• Medical Instruments quiescent current, the FAN5660 is offered with a frequency
• Interface Power Supplies control (FC) pin which selects either 5kHz or 50kHz
• Hand-Held Instruments operation.
• Operational-Amplifier Power Supplies
The Oscillator frequency can also be driven with an external
clock. The FAN5660 is available in 8-pin small-outline
packages.

Simplified Block Diagram

CAP+ CAP–

VSS

V+ VSH

CONTROL LV

SYNC OSCILLATOR FC

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Pin Configuration

FC 1 8 V+

CAP+ 2 7 SYNC
FAN5660
VSS 3 6 LV

CAP- 4 5 VSH

SOIC

Typical Applications
VIN

FC V+

FC V+ VOUT = 2VIN
CAP+ SYNC
+
CAP+ SYNC C2
+
C1 LV +
VSS
C1
VOUT = –VIN
+VIN VSS LV
CAP- VSH

C2 CAP- VSH
RL +

C1 = C2 = 1 to 470µF C1 = C2 = 1 to 470µF

Figure 1. Inverter, Test Circuit Figure 2. Doubler

FC V+ VIN

CAP+ SYNC
+
VOUT = –VIN/2 C1 FAN5660
VSS LV

CAP- VSH
+
C2

C1 = C2 = 1 to 470µF

Figure 3. Splitter

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 FAN5660

Pin Definition
Pin Pin Pin Function Description
Number Name Inverter Splitter Doubler
1 FC Frequency Control for Internal Same as Inverter Same as Inverter
Oscillator, FC open, fOSC = 5kHz
typ; FC = V+, fOSC = 50kHz typ.
FC has no effect when SYNC pin is
driven externally
2 CAP+ Charge-Pump Capacitor, Positive Same as Inverter Same as Inverter
Terminal
3 VSS Power-Supply Ground Input Power-Supply Power-Supply
Positive Voltage Output Positive Voltage Input
4 CAP- Charge-Pump Capacitor, Same as Inverter Same as Inverter
Negative Terminal
5 VSH Output, Negative Voltage Power-Supply Power-Supply
Ground Input Ground Input
6 LV Low-Voltage Operation Input. LV must be left open for all LV must be left open for
Tie LV to VSS when input voltage is input voltages all input voltages
less than 2V.
Above 2V, LV must be left open.
7 SYNC Oscillator Control Input. Same as inverter, however, Same as inverter,
An external Oscillator may be do not use SYNC in however, do not use
connected to overdrive SYNC via a voltage-splitting mode. SYNC in voltage-
2 to 5 nF capacitor. doubling mode.

SYNC shall not be connected to a

low impedance DC voltage
8 V+ Power-Supply Positive Voltage Positive Voltage Input Positive Voltage Output
Input

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FAN5660

Absolute Maximum Ratings

Absolute maximum ratings are the values beyond which the device may be damaged or have its useful life
impaired. Functional operation under these conditions is not implied.
Parameter Min. Max. Units
Supply Voltage: V+ to VSS -0.3 6 V
VSH Voltage to VSS -6 0.3 V
Voltage on all other pin to VSS -0.3 (V+) + 0.3 V
VSH and V+ Continuous Output Current (Note 1) 120 mA
Junction Temperature 125 °C
Storage Temperature -40 150 °C
Lead Soldering Temperature, 10 seconds 300 °C
Electrostatic Discharge Protection (Note 2) 4 kV
Power Dissipation (PD) at 85C 300 mW
Notes
1. VSH must not be shorted to VSS or V+, even instantaeously, or device damage may result.
2. Using Mil Std. 883E, method 3015.7(Human Body Model), 400V when using JEDEC method A115-A (Machine Model).

Recommended Operating Conditions

Parameter Conditions Min. Typ. Max. Units
Supply Voltage V+ to VSS or VSS to VSH LV open 2 5.5 V
LV = VSS 1.5 2
External SYNC signal Connected via 2 V peak
C =2 to 5 nF to peak
Ambient Operating Temperature TA -40 85 °C

Electrical Specifications
V+ = 5V, RL = ∞, and TA = +25°C using circuit in Figure 1 with C1 = C2 = 100µF, FC and LV open, unless otherwise
specified (Note 3)
Parameter Symbol Conditions Min. Typ. Max. Units
Quiescent Current IIN FC open 0.16 0.5 mA
FC to V+ 1 2
Output Current IVSH VSH more negative than -4V 100 mA
Output Resistance RVSH 100mA load current 5 8 Ω
Oscillator Frequency fOSC FC open 2.5 5 10 kHz
FC to V+ 30 50 90
Power Efficiency η RL=1kΩ 96 98 %
RL=0.5kΩ 92 96
100mA load current 90
Voltage Conversion Efficiency ηV 99 99.96 %
Note
3 . In the test circuit, capacitors C1 and C2 are 0.2Ω maximum ESR capacitors. Capacitors with higher ESR will increase output
resistance, reduce output voltage and efficiency.

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Typical Applications Diagrams

Unless otherwise specified TA=25°C,V+=5V, C1=C2=100µF, Iload=0, FC and LV open, using circuit in Figure 1

Supply Current vs. Supply Voltage Supply Current vs. Oscillator Frequency
1.2 1.8
1.6
1.0
1.4
Supply Current (mA)

Supply Current (mA)

FC = V+
0.8 1.2
1.0
0.6 FC = V+,
LV = GND 0.8
0.4 0.6
0.4
0.2
LV to FC and LV open 0.2
GND
0 0
1 2 3 4 5 6 1 10 100
Supply Voltage (V) Oscillator frequency (kHz)

Oscillator Frequency vs.

Supply Voltage, FC to V+ Oscillator Frequency vs. Supply Voltage
60 7
Oscillator Frequency (kHz)

Oscillator Frequency (kHz)

LV to GND
55 6

50 5

45 4
LV to
GND
40 3
1.5 2 2.5 3 3.5 4 4.5 5 5.5 1.5 2 2.5 3 3.5 4 4.5 5 5.5
Supply Voltage (V) Supply Voltage (V)

Efficiency vs. Operating Frequency Efficiency vs. Load Current

100 1.00
Iload = 10mA
0.95
90 V+ = 5.5V
Iload = 80mA
Efficiency (%)

Efficiency (%)

0.90
V+ = 4.5V
80 0.85
V+ = 3.5V
0.80
70 V+ = 1.5V V+ = 2.5V
Iload = 1mA 0.75

60 0.70
1 10 100 0 20 40 60 80 100 120
Operating Frequency (kHz) Load Current (mA)

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FAN5660

Typical Applications Diagrams (continued)

Output Voltage vs. Frequency Oscillator Frequency vs. Temperature

-5.0 8
Iload = 1mA
-4.9 V+ = 5.5V
7

Oscillator Frequency (kHz)

Iload = 10mA
-4.8
Output Voltage (V)

-4.7 6
-4.6
-4.5 5
V+ = 1.8V
-4.4
-4.3 4

-4.2 3
Iload = 80mA
-4.1
-4.0 2
1 10 100 -10 0 10 20 30 40 50 60 70 80 90
Operating Frequency (kHz) Temperature (°C)

Oscillator Frequency vs. Output Source Resistance vs.

Temperature, FC to Vin Supply Voltage
70 Output Source Resistance (ohm) 12
Iout = 50mA
Oscillator Frequency (kHz)

65

60 10
55
V+ = 5.5V
50 8
45 25 deg C
80 deg C
40 6
V+ = 1.8V
35
-10 deg C
30 4
-10 0 10 20 30 40 50 60 70 80 90 1.5 2.5 3.5 4.5 5.5
Temperature (°C) Supply Voltage (V)

Output Current vs. Capacitance

(at Voltage Efficiency = 90%) Output Voltage Drop vs. Load Current
100 0.7
Voltage Drop from Supply (V)

V+ = 5V V+ = 2.5V
0.6
V+ = 4V
V+ = 1.5V V+ = 3.5V
0.5
Output Current

V+ = 3V 0.4
50 V+ = 4.5V
0.3
V+ = 5.5V
0.2

0.1

0 0
0 10 20 30 40 50 0 25 50 75 100 125
Capacitance (µF) Load Current (mA)

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 FAN5660

Application Information Positive Voltage Doubler

The FAN5660 capacitive charge pump circuit either inverts,
splits or doubles the input voltage (see Typical Applications).
For highest performance, capacitors with low effective series
resistance (ESR) should be used (see Capacitor Selection
section for more details). When using the inverting mode
with a supply voltage less than 2V, LV may be connected to
VSS. This bypasses the internal regulator circuitry and
provides best performance in low-voltage applications.
When using the inverter mode with a supply voltage above
2V, LV must be left open.
The FAN5660 operates in the voltage-doubling mode as
shown in Figure 2. The no-load output is 2 × VIN.
Positive Voltage Splitter
The FAN5660 operates in voltage splitting mode as shown
Figure 3. The no-load output is VIN/2.
Changing Oscillator Frequency
Three modes control the FAN5660’s clock frequency, as
listed below:

Negative Voltage Converter FC SYNC Oscillator frequency

The most common application of the FAN5660 is as a charge
pump voltage inverter. The operating circuit uses only two
identical external capacitors, C1 and C2 (see Typical
Circuits). Even though its output is not actively regulated,
the FAN5660 is very insensitive to load current changes.
A typical output source resistance of 5Ω means that with an
input of +5V the output voltage is -5V under light load, and
decreases only to 4.5V with a load of 100mA.
Capacitors selection
Low ESR capacitors should be used at the output of
FAN5660 to minimize output ripple, output resistance and to
maximize efficiency. This can be achieved using ceramic
capacitors, but certain types of tantalum capacitors may be
sufficient. Output ripple voltage is calculated observing that
the output current is solely supplied from capacitor C2
during one-half of the charge-pump cycle. This introduces a
peak-to-peak ripple of:
VRIPPLE = IVSH/(2f x C2 ) + IVSH × (ESR C2)
Open Open 5kHz
FC = V+ Open 50kHz
Open External External Clock
Clock Frequency
When FC and SYNC are unconnected (open), the Oscillator
runs at 5kHz. When FC is connected to V+, the Oscillator
frequency increases 10 times. In the inverter mode, SYNC
may also be overdriven by an external clock source. A square
wave signal of 2V peak-to-peak typical may be applied to
SYNC via a 2 to 5nF capacitor to overdrive the internal
oscillator. When SYNC is overdriven, FC has no effect. In
some applications, the 5kHz output ripple frequency may be
low enough to interfere with other circuitry. If desired, the
Oscillator frequency can then be increased through use of the
FC pin or an external Oscillator as described above. Increas-
ing the clock frequency increases the FAN5660’s quiescent
current, but also allows smaller capacitance value to be used
for C1 and C2.

For example, for a nominal f= 5kHz and C2 = 100µF with an

ESR of 0.05Ω, ripple is approximately 100mV with a
100mA load current. If C2 is raised to 470µF, the ripple
drops to approximately 25mV.

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FAN5660

Package Dimensions
8-Pin SOIC

Inches Millimeters Notes:

Symbol Notes 1. Dimensioning and tolerancing per ANSI Y14.5M-1982.
Min. Max. Min. Max.
2. "D" and "E" do not include mold flash. Mold flash or
A .053 .069 1.35 1.75 protrusions shall not exceed .010 inch (0.25mm).
A1 .004 .010 0.10 0.25 3. "L" is the length of terminal for soldering to a substrate.
B .013 .020 0.33 0.51 4. Terminal numbers are shown for reference only.
C .0075 .010 0.20 0.25 5 5. "C" dimension does not include solder finish thickness.
D .189 .197 4.80 5.00 2
6. Symbol "N" is the maximum number of terminals.
E .150 .158 3.81 4.01 2
e .050 BSC 1.27 BSC
H .228 .244 5.79 6.20
h .010 .020 0.25 0.50
L .016 .050 0.40 1.27 3
N 8 8 6
α 0° 8° 0° 8°
ccc — .004 — 0.10

8 5

E H

1 4

D h x 45°
A1 C
A
α
SEATING –C–
e PLANE LEAD COPLANARITY L

B ccc C

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FAN5660

Ordering Information TA = -40°C to +85°C

Part Number Package
FAN5660IM 8-Pin SOIC,Tubes
FAN5660IMX 8-Pin SOIC, Tape and Reel

DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO
ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME
ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN;
NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES
OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR
CORPORATION. As used herein:
1. Life support devices or systems are devices or systems 2. A critical component in any component of a life support
which, (a) are intended for surgical implant into the body, device or system whose failure to perform can be
or (b) support or sustain life, and (c) whose failure to reasonably expected to cause the failure of the life support
perform when properly used in accordance with device or system, or to affect its safety or effectiveness.
instructions for use provided in the labeling, can be
reasonably expected to result in a significant injury of the
user.

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