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Electrical Engineering
Gross EE1- 1
FUNDAMENTALS OF ENGINEERING
(FE) EXAMINATION REVIEW
ELECTRICAL
ENGINEERING
Charles A. Gross, Professor Emeritus
Electrical and Comp Engineering
Auburn University Broun 212
334.844.1812
gross@eng.auburn.edu
www.railway-technology.com
1
EE Review Problems
1. dc Circuits:
2
Solution
Solution
V4 4 I a 40V (L)
3
Solution
V10 60
Ic 6A L
10 10
KCL :
I b I a I c 10 6 4 A
V8 8 I b 32V ( L)
V7 7 I b 28V ( L)
FE: Electric Circuits © C.A. Gross EE1- 7
Absorbed Powers...
R4 I a2 4 10 400W
2
In General:
R10 I 10 6 360W
2 2
c
PABS = PDEV
R7 I b2 7 4 112W
2
(Tellegen's
R8 I 8 4 128W
2 2
b
Theorem)
Total Absorbed Power 1000W
4
2. Complex Numbers
Consider x2 2 x 5 0
2 (2) 2 4(1)(5) 2 16
x
2 1 2
4 1
1 1 2 1
2
The numbers "1 2 1" are called complex numbers
Summer 2008
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Summer 2008
10
5
Polar Form
Math Department.....
Z R e i a complex number
R | Z | modulus of Z
arg Z argument of Z radians
ECE Department.....
Z Z a complex number
Z | Z | magnitude of Z
ang Z angle of Z degrees
11
+2 Z X jY 1 j 2
6
Conversions
Retangular Polar
Z X2 Y2
Y
Y
tan 1 Z
X
Polar Retangular.....
X Z cos X
Y Z sin
Summer 2008
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Example: Z 3 j4
X e Z 3 4
Y Im Z 4 5
7
Conjugate Z X jY Z
Z * conjugate of Z X jY Z
Example...
(3 j 4)* 3 j 4 5 53.10
Summer 2008
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A a jb A 3 j 4 553.10
B c jd B 5 j12 13 67.40
A B (a jb) (c jd )
(a c ) j (b d )
A B (3 j 4) (5 j12)
(3 5) j (4 12) 8 j8
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8
Multiplication (think polar)
A a jb A 3 j 4 553.10
B c jd B 5 j12 13 67.40
A B ( A ) ( B )
A B( )
A B (553.10 ) (13 67.40 )
(5) (13) (53.10 67.40 ) 65 14.30
Summer 2008
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A a jb A 3 j 4 553.10
B c jd B 5 j12 13 67.40
A A A
( )
B B B
A 553.10 5
0
B 13 63.4 13
53.10 67.40
0.3846120.50
Summer 2008
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9
Multiplication (rectangular)
A B (a jb) c jd
ac bd j ad bc
A B (3 j 4) (5 j12)
(15 48) j ( 36 20)
63 j16 65 14.30
Summer 2008 EL
19 EC
38
10
Addition (polar)
553.10
Complex number
addition is the 11.31 450
same as "vector
addition"!
20
Summer 2008 13 67.40EC
EL
38
10
10
3. ac Circuits
i(t)
Find "everything"
8 in the given
+ circuit.
v(t) 0.663 mF
-
26.53 mH
v (t ) 141.4cos(377 t ) V
FE: Electric Circuits © C.A. Gross EE1- 21
Frequency, period
v (t ) 141.4cos(377 t ) V
11
The ac Circuit
R : Z R R j0 8 j0
L : Z L 0 j L 0 j (0.377)(26.53) 0 j10
1 1
C : ZC 0 0 j 0 j4
j C 0.377(0.663)
FE: Electric Circuits © C.A. Gross EE1- 23
The Phasor
v (t ) VMAX cos( t )
VMAX
To convert to a phasor... V
2
For example.. v (t ) 141.4cos(377 t )
VMAX
V 100 0o
2
FE: Electric Circuits © C.A. Gross EE1- 24
12
The "ac circuit"
I
L(ac ) :
VR V
I
Z
1000 100
VC
8 j10 j 4
10 36.9o
VL
i (t ) 14.14 cos(377 t 36.9o )
FE: Electric Circuits © C.A. Gross EE1- 25
13
Absorbed powers S V I * P jQ
Delivered power
14
The Power Triangle S 800 j 600
S = 1000 VA
Q = 600 var
V 1000o
= 36.90
Leading Case
I Q<0
V
Lagging Case
V
I Q>0
15
A Lagging pf Example
V 7.200 kV R jX
R 103.68 jX j 43.2
Currents
I
V
IR IL
V
R jX
V 7.2
IR 69.44 A
R 103.68 I IR IL
V 7.2 I 69.44 j166.7
IL j166.7 A
jX j 43.20 I 180.6 67.380 A
16
Powers pf cos cos 67.360 0.3845
I
IR IL
V 1300 kVA
R jX 1200 k var
S R V I R * 500 kW j 0
S L V I L * 0 j1200 k var
500 kW
SS V I * S R S L
SS 500 j1200 130067.380
FE: Electric Circuits © C.A. Gross EE1- 33
Add Capacitance
I
I C j125
jX C
V
IR IL IC
I R 69.44
IC
V
7.2
j125 A I L j166.7
jX j 57.6
I I R I L IC
I 69.44 j166.7 j125 81 310 A
FE: Electric Circuits © C.A. Gross EE1- 34
17
Powers pf cos cos 310 0.8575
900 kvar
1200 kvar
SS V I * S R S L SC
SS 500 j1200 j 900 500 kW
SS 583.1310 kVA
Observations
18
Observations
We will be using the same numerical data as we did in the previous example.
Pretty clever, eh’ what?
Load
Utility
pf correcting
capacitance
19
PF Correction: the solution
500 kW
FE: Electric Circuits © C.A. Gross EE1- 39
Let QX 1200 QC
Therefore SS 500 jQX S S 310 kVA
20
PF Correction: the solution
QX QX 300 kvar
0.6
500
QC 1200 Q X 900 kvar
900 kvar
The new source power triangle
1200 kvar
Install 900 kvar of
7.2 kV Capacitors
300 kvar
500 kW
4. Three-phase ac Circuits
21
A single-phase ac circuit
n
Generator Line Load
“a” is the “phase” conductor
“n” is the “neutral” conductor
Ia
+
Ib
+
Ic
+
In
If I a I b I c I then I n 3I
22
But what if the currents are not in phase?
A 50% savings!
23
"Balanced" voltage means equal in
magnitude, 120o separated in phase
Van V 00
Vbn V 1200
Vcn V 1200
2 2
Vbc V 3 900
Vca V 31500
24
When a power engineer says “the
An Example primary distribution voltage is 12 kV”
he/she means…
Vab 12.47300 kV
Vab Vbc Vca VL 12.47 kV Vbc 12.47 900 kV
Vca 12.47 1500 kV
Van 7.2 00 kV
VL
Van Vbn Vcn 7.2 kV Vbn 7.2 1200 kV
3
Vcn 7.2 1200 kV
An Important Insight….
To demonstrate…
25
Recall the pf Correction Problem
V 7.200 kV 104 j 43.2
1300 kVA
1200 kvar
I I R I L 181 67 A 0
500 kW
FE: Electric Circuits © C.A. Gross EE1- 51
bc
Van 7.200 kV 104 j 43.2
3900 kVA
3600 kvar
3 times bigger!
I a 181 670 A
1500 kW
52
FE: Electric Circuits © C.A. Gross EE1-
26
If we want all the V’s, I’s, and S’s
3600 kvar
The circuitry in the 3-
phase case is a bit
more complicated. 900 kvar
There are two
possibilities….
1500 kW
27
The wye connection….
a
S
O b L
U c O
R A
C n D
E
a
S
O b L
U c O
R A
C n D
E
28
wye-delta connections Z 3 ZY
29
The inductive case
di L
vL L
dt
An Example…
di L
vL L
dt i L (0 ) i L (0) i L (0 )
30
Solution....
t 0: vC (t ) vC (0) constant
t : vC (t ) vC ( ) constant
0 t : vC (t ) vC ( ) vC (0) vC ( ) e t /
Rab C
Solution....
For a dvC
capacitor: iC C
dt
C's are OPENS to dc
vC(t) cannot change in zero time
31
Solution: T < 0; switch and "C" OPEN
a
0
+ +
120V vC
- -
A b
120
vC 0 12 48 V
12 6 12
FE: Electric Circuits © C.A. Gross EE1- 63
6 12
iC Rab 4
a
6 12
0.2 F
+ +
120V vC
- -
A Rab C
b
4(0.2) 0.8 s
120
vC 12 80 V
0 6 12
FE: Electric Circuits © C.A. Gross EE1- 64
32
Solution....
vC (0) 48 vC ( ) 80
t 0: vC (t ) 80 48 80 e 1.25 t
vC (t ) 80 32 e 1.25 t
0.4 H
33
Solution....
t 0: i L (t ) i L (0)
t 0: i L (t ) i L ( ) i L (0) i L ( ) e t /
L
Rab
Solution....
For an di L
inductor: vL L
dt
L's are SHORTS to dc
iL(t) cannot change in zero time
34
Solution: T < 0; switch OPEN; L SHORT
a
iL
+ +
120V vC
- -
A b
120
iL 0 6.667 A
12 6
FE: Electric Circuits © C.A. Gross EE1- 69
6 12
iL Rab 4
a
6 12
+ +
0.4 H
120V vL
- - L 0.4
A b
Rab 4
0.1 s
120
iL 20 A
060
FE: Electric Circuits © C.A. Gross EE1- 70
35
Solution....
t 0: i L (t ) 6.667
t 0: i L (t ) 20 6.667 20 e t /
i L (t ) 20 13.33 e 10 t
5. Control
+
R(s) G(s) C(s)
-
H(s)
1
G ( s) H ( s) K
( s 1)( s 4)
36
a. Write the closed loop transfer function in
rational form
1
C G ( s 1)( s 4)
R 1 GH 1 K
( s 1)( s 4)
C 1 1
2
R ( s 1)( s 4) K s 3s ( K 4)
s 2 3s ( K 4) 0
c. What is the system order? 2
d. For K = 0, where are the poles located?
s 2 3s 4 s 1 s 4 0
s = +1; s = - 4
e. For K = 0, is the system stable? NO
FE: Electric Circuits © C.A. Gross EE1- 74
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f. Complete the table s 2 3s ( K 4) 0
K poles damping
0 4 .0 0, 1 .0 0 u n stab le
4 3 .0 0, 0 .0 0 o ver
5 2 .6 2, 0 .3 8 2 o ver
6 .2 5 1 .5 0, 1 .5 0 critical
1 0 .2 5 1 .5 j 2, 1 .5 j 2 u n d er
Poles at s = 0; s = - 3
Therefore for K>4, poles are in LH s-plane
and system is stable.
K≥4
FE: Electric Circuits © C.A. Gross EE1- 76
38
h. Find K for critical damping
CE : s 2 3s ( K 4) 0
3 9 4( K 4)
Solving the CE: s
2
Critical damping occurs when the poles are
real and equal
9 4( K 4) 0
K 4 9 / 4;
K 4 2.25 6.25
6. Signal Processing
39
c. Matching
d.
t
b. y(t )
x( ) h(t ) d c. X ( j ) x(t ) e
j t
dt
1
X ( j ) e
j t
d. X ( s ) x(t ) e st dt e. x(t ) d
2
0
c. Matching
d.
Z-Transform d DFT c
Inverse ZT a Discrete Convolution b
Inverse DFT e
a. X ( j) x[n] e
n
jn
k
b. y[ k ]
n
x[ n ] h[ n k ] N 1
c. X k x[ n] e j 2 kn / N
n0
d. X ( z ) x[ n] z n
N 1
1
n0
e. x[n]
N
X
k 0
k e j 2 kn / N
40
7. Electronics
v
e (t ) v
e
e (t ) 169.7 sin( t ) T
Ideal OpAmp....
•infinite input resistance
• zero input voltage
•infinite gain
• zero output resistance
41
Find the output voltage.
vi 5 V
Ri 10 k
R f 50 k
vi v
KCL : 0 0
Ri R f
Rf
50 v0 vi
v0 5 25 V Ri
10
40k KCL :
0 +
10k
v1 v2 v3 v
20k 0 0
5 + R1 R2 R3 R f
10k -
5 +
+
+
vo LOAD
-
42
Solution: "SUMMER"
0 5 5 v
40k 0 0
0 + 40 20 10 10
10k
20k
5 + 10 10 10
v0 5 5 0
10k -
10 20 40
5 +
+
+
vo LOAD
v0 7.5 V
-
43
a. Complete the Truth Table
A C 0
AND Half Adder (HA)
B S 0
XOR
A + B = CS
A B C S
0 0 0 0 0 + 0 = 00
0 1 0 1 0 + 1 = 01
1 0 0 1 1 + 0 = 01
1 1 1 0 1 + 1 = 10
FE: Electric Circuits © C.A. Gross EE1- 87
C1 A1 B1 C2 S1
A C0
0 0 0 0 0 A
11 1
0 0 1 0 1 HA S 1
OR C2
B
01
0 1 0 0 1 1
0 1 1 1 0 C 0
HA
1 0 0 0 1 1C1 S1
1 0 1 1 0
1 1 0 1 0
Full Adder (FA)
1 1 1 1 1
FE: Electric Circuits © C.A. Gross EE1- 88
44
c. Indicate the inputs and outputs to perform
the given sum in a 4-bit adder
1 1 1 0 1 1 1 1 0 0 0 1010
A3 B3 C2 A2 B2 C1 A1 B1 C0 A0 B0 +1110
11000
FA FA FA HA
C3 S3 S2 S1 S0
1 1 0 0 0
45
d. Finished Design ABC = 110
40k
0 C+ 10 10 10
10k
v0 5 5 0
20k 10 20 40
5 B+ 7.50
10k -
5 A+
+
+
vo LOAD
-
Good Evening...
FE: Electric Circuits © C.A. Gross EE1- 92
46