Lesson 39 Cumulative Review

1/66
Lesson 39: Cumulative Review
Lesson #39: Cumulative Review

Announcements 2/66
• Course Evals are up! PLEASE participate to improve this

course for future students.
• Final Exam: May 11, 10:30 AM, GEM 159

– Authorized Aid:
• 4 hand-written sheets of notes
• Hand-held calculator

Course Objectives 3/66
• Determine the transfer function for electrical, mechanical, and

electromechanical systems.
• Determine the time response of a system from its transfer function.
• Reduce a block diagram of multiple subsystems to a single block representing
the transfer function from input to output.
• Determine the stability of a system represented as a transfer function.
• Calculate the steady-state error for both unity and non-unity feedback systems.
• Sketch the root locus of a closed-loop system and use it to find the poles of the
system.
• Use root locus methods to design cascade compensators.
• Use a system’s frequency response to determine its stability, transient response,
and steady- state error.
• Use frequency response methods to design cascade compensators.
• Design digital control systems to meet specifications on stability, transient
response, and steady-state error.
• Determine the state-space representation of a system and use that representation
to find its time response.
4/66
Section 9.2
Cascade Compensation and
Steady-State Error

Lag Compensation 5/66
• An ideal integral controller uses active elements to

place the pole directly at the origin, increasing the
system type by one and driving the steady-state
error to zero for the input type in question.
• We can use passive elements
to design a compensator that
places the pole close to, but
not directly at, the origin.
• This will reduce the steady-
state error, but it will not
drive it all the way to zero.
• Such a passive device is called a lag compensator.
Lag Compensator 6/66
Uncompensated System:
Kz1 z 2 !
Kv0 =
p1 p2 !
Compensated System:
K ( z1 z 2 !)zc
K vN =
( p1 p2 !) pc

Lag Compensator 7/66
zc
K vN = K v 0 > Kv0
pc
Uncompensated System Lag Compensated System

Lag Compensation Example #1 8/66
We have selected K=164.6 to meet a target of

z=0.174.
164.6 1
K p = lim G ( s) = = 8.23 estep,uncompensated (¥) = = 0.108
s ®0 1× 2 ×10 1 + 8.23
The goal now is to add a lag compensator that will

reduce steady-state error by a factor of 10 without
significantly changing z or K.
0.108 1
estep (¥) = = 0.0108 =
10 1 + K pN
zc K pN
K pN = 91.59 =
pc K p 0
= 11.13
Let pc = 0.01 zc = 11.13 pc = 0.111


• All the parameters of the compensated system are

nearly unchanged, except Kp.


13/66
Section 9.3
Improving Transient Response
via Cascade Compensation

Lead Compensator 14/66
• Such an approximation to the PD controller is

called a Lead Compensator.
• It creates a desired zero on the real axis, but it
also creates an additional pole on the real axis.

Lead Compensator 15/66
• The combined effect of zc and pc must now bring

the desired point to an angle of 180°.
q 2 - q1 - q3 - q 4 + q5 = (2k + 1) ×180°
qC = q 2 - q1

Lead Compensators 16/66
There are an infinite number of lead compensators

that can provide the same contribution (qC) to the
phase angle of the desired operating point.

Lead Compensator Example 17/66
Design a lead compensator for this system

operating with 30% overshoot and reduce the
settling time by 50%.
1
G( s) H ( s) =
s( s + 4)(s + 6)
30% OS: z = 0.358
s = -1.007 + j 2.627
4 4
TS 0 = = = 3.972
sd0 1.007
TSN = 3.972 × 0.5 = 1.986
4
s dN = = 2.014 wdN = 2.014 × tan(180° - 110.98°) = 5.252
1.986
Arbitrarily select zc=-5.

s+5
G( s) H ( s) =
s( s + 4)(s + 6)
Evaluate this function at the desired operating point:
2.014 + j5.252 + 5
G( s) H ( s) s =2.014+ j 5.252 =
(2.014 + j5.252)(2.014 + j5.252 + 4)(2.014 + j5.252 + 6)
G(s) H (s) s =-2.014+ j 5.252 = -0.0288 - j 0.00369 = 0.0029Ð -172.69°

Now we need to select the value of pc in order to
contribute an additional –7.31º to this phase angle.
(Recall that zeroes add their angles, while poles
subtract their angles.)
Imag(Desired Point)
= tan(Required Angle)
p c - Real(Desired Point)
5.252
= tan(7.31°)
p c - 2.014
pc = 42.96

Compensated Root Locus

Compensated Step Response

A: Zero at s=-5
B: Zero at s=-4
C: Zero at s=-2 (No pole-zero cancellation)

22/66
Section 11.3
Design of Lag Compensation
via Frequency Response

• Recall that the purpose of lag compensation is to

improve steady-state error without significantly
affecting transient response.
• In root locus methods, we did this by placing a
pole and zero close to the origin. The ratio of
zc/pc yielded the improvement in Kp, Kv, or Ka
and, therefore, steady-state error.
• In frequency response methods, we will increase
the low-frequency amplitude (improving steady-
state error) without increasing the high-frequency
amplitude (which would change the transient
response).
Two goals:
1. Improve
static error
constant by
increasing only
the low-
frequency gain.
2. Increase the
phase margin to
yield the desired
transient
response.

Lag Compensator Design Procedure 25/66
1. Set the gain, K, to the value that satisfies the steady-state

error specification and plot the Bode diagrams for this
value of gain.
2. Find the frequency where the phase margin is 5° to 12°
(typically, 10°) greater than the phase margin that yields
the desired transient response. This will be w0dB.
3. Select lag compensator such that its magnitude goes
through 0dB at w0dB. The upper break frequency should
be one decade below w0dB, and the lower breakpoint
should be at 0dB.
4. Set the compensator gain so that GC(0)=1 to keep the
static error constant the same as in step 1.
We are relying on the initial gain setting to meet the steady-

state error requirement, and then we are relying on the lag
compensator’s –20dB/decade slope to meet the transient
response requirement by setting the 0dB crossing of the
magnitude plot. Lag Compensator Bode Plot:
0dB
One decade below w0dB.
Zero w
Pole 0dB
s + 0.1
-20dB GC ( s) =
5° to 12° s + 0.01
Makes M=0dB for low

frequencies.

Lag Compensator Example 27/66
• Improve the steady-state response of the previous

example by a factor of ten without significantly
modifying its transient response.
100K 58,390 %OS = 9.5%
G( s) = =
s( s + 36)(s + 100) s( s + 36)(s + 100) F M = 59.2°
K v 0 = lim sG( s) =
s ®0
58,390
36 ×100
= 16.22 KvN = 162.2 K = 5839
583,900
GN ( s ) =
s( s + 36)(s + 100)
583,900
GN (0.01) » = 16,219 = 84.2dB (Desired magnitude at
0.01(36)(100) left end of Bode plot)

Boosting K to 5839 has made the system unstable.

K = 5839
0dB -20
dB/dec
FM = 59.2° 180° - (FM + 10°) » -110° w0 dB = 9.8 rad/s
“LAG”

• Thus, we need a zero at 0.98 rad/sec and a pole at

0.062 rad/sec.
• To maintain the overall gain of the system (which
we set to yield the steady-state response), we set
the DC gain of the compensator so GC(0)=1:
0.063( s + 0.98) 36,786 × ( s + 0.98)
GC ( s) = GTOTAL ( s) =
( s + 0.062) s( s + 36)(s + 100)(s + 0.062)

30/66
Section 11.4
Lead Compensation via
Frequency Response

Lead Compensation via Freq. Response 31/66
• In designing a lag compensator, our goal was to

have minimal impact on the phase diagram at the
phase margin frequency, because we wanted the
transient response to remain unchanged.
• In designing a lead compensator, though, we want
to increase the phase margin in order to achieve a
better transient response.
• We would also like to increase wBW, which will
improve both peak time and settling time.

Lead Compensation 32/66
The lead
compensator will
simultaneously
increase the phase
margin while also
increasing the
bandwidth.

Lead Compensator and b 33/66
The lead compensator will have a single parameter, b:

1
s+
1 T
GC ( s) = ×
b s+ 1
bT

Lead Compensator Characteristics 34/66
1
s+
1 T
GC ( s) = ×
b s+ 1
bT
1
wMAX =
T b
æ 1- b ö
fMAX = tan ç
-1
÷
ç2 b ÷
è ø
1
GC ( jwMAX ) =
b

Lead Compensator Design Procedure 35/66
1. Find wBW.
2. Select K to achieve SS error requirements.
3. Create Bode plot, observe uncompensated phase
margin.
4. Calculate required FM.
5. Determine b from the require phase contribution.
6. Determine |GC(jw)| at wMAX.
7. Determine wFm
8. Design the break frequencies.
9. Reset system gain.
10.Check bandwidth, simulate, and redesign.
Lead Compensation Example 36/66
Design a lead compensator for this system to yield

20% overshoot, Kv=40, and TP=0.1 second.
100K
G( s) =
s( s + 36)(s + 100)
%OS = e
æç -zp
è
1-z 2 ö÷
ø
= 0.20 z = 0.456
p
Tp = (1 - 2z ) +
2
4z 4 - 4z 2 + 2 = 0.1 wBW = 46.6 rad/sec
w BW 1 - z 2
100K
K v = lim sG( s) = = 40
s ®0 36 ×100
K = 1440
Lead Compensation Example Uncomp-
37/66
K = 1440 ensated:
wF = 29.6 rad/s
M
f = -146°
FM = 34°
Target:
z = 0.456
FM = 48.1°
Compensator:
fMAX =
48.1° - 34° + 10°
= 24.1°
fMAX = 24.1° | G |= -3.76dB at w = 39 rad/sec

fMAX -1
æ 1- b
= tan çç
ö
÷
÷
wMAX = wF = w0 dB = 39 rad/sec
è2 b
M
ø
b = 0.42 wMAX =
11 1
= 25.3 = 60.2
T b T bT
1
GC ( jwMAX ) = 1
s+
b 1 T
GC ( s) = ×
b s+ 1
GC ( jwMAX ) = 1.54
bT
GC ( jwMAX ) = 3.76dB 1 s + 25.3
GC ( s) = ×
wMAX = wF = w0 dB 0.42 s + 60.2
342,600 × (s + 25.3)
M
This must occur at a frequency GC ( s) × G( s) =

s( s + 36)(s + 100)(s + 60.2)
where | G uncomp |= -3.76dB.
342,600 × (s + 25.3)
GC ( s) × G( s) =
s( s + 36)(s + 100)(s + 60.2)

40/66
Section 11.5
Lag-Lead Compensation via
Frequency Response

Lag-Lead Compensation 41/66
• There are two possible methods for designing a

lag-lead compensator:
– You could first design a lag compensator, improving
steady-state error, then design a lead compensator to
improve transient response.
• These two designs would require two different circuits, and
you would have to include a buffer between them to prevent
one from loading the other.
– You could design an integrated lag-lead compensator
in a single step, requiring a single circuit with no
buffer needed.

Lag-Lead Compensator 42/66
æ 1 öæ 1 ö
çs+ ÷ç s + ÷
T1 T2
GC ( s ) = GLEAD ( s )GLAG ( s ) = ç
ç g
÷ç
÷ç 1
÷
÷ (g > 1)
çs+T ÷ç s + gT ÷
è 1 øè 2 ø
• There is an additional constraint on this circuit:
the parameter g replaces the parameter a for the
lag network and the parameter b for the lead
network. We now require that a =1/ b.
• As a result, we may have to make some design
trade-offs.
Lag-Lead Design Procedure 43/66
1. Calculate the required wBW.

2. Calculate K for steady-state error requirement.
3. Create open-loop uncompensated Bode plots for that
value of K.
4. Calculate required phase margin.
5. Select a new wFM near wBW. (0.8wBW is a good choice.)
6. Calculate additional phase needed to meet phase margin
requirement. Include 5°-20° adjustment factor.
7. Calculate the value of g=1/b required.
8. Determine the break frequencies of the lag comp.
9. Determine the break frequencies of the lead comp.
10.Check the bandwidth and re-design if necessary.
Lag-Lead Frequency Response 44/66

Lag-Lead Compensator Design Example 45/66
Design a passive lag-lead compensator to yield a

13.25% overshoot, TP=2 seconds, and Kv=12.
K
G( s) =
s( s + 1)(s + 4)
TP = 2 sec wBW = 2.29 rad/sec
K v = 12 K = 48
%OS = 13.25% z = 0.54 FM = 55°

46/66
Lag-Lead Compensator Design Example
K=48
wF = 0.8wBW
M
wF = 1.83 rad/s
M
f = -176°
FM = 4°
fMAX = (55° - 4°) + 5°

fMAX = 56°

1 - sin (fMAX ) 1
fMAX = 56° b= = 0.094 g= = 10.6
1 + sin (fMAX ) b
Choose the lag compensator’s upper break
frequency one decade below wFM:
wF = 1.83 rad/s
M
zC , LAG = 0.183 rad/s
The lower break frequency is a factor of g lower:
0.183 rad/s æ
ç s+
1 ö
pC , LAG = 1ç T2
÷
÷ = 0.094 (s + 0.183)
10.6 GLAG ( s ) =
g çs+ 1 ÷ (s + 0.0172 )
pC , LAG = 0.0172 rad/s ç
è gT2 ÷
ø
The lag-compensated system now has a transfer

function of: 4.53 × (s + 0.183)
G( s) =
s( s + 1)(s + 4)(s + 0.0172)
1 1
wMAX = zC , LEAD = = wMAX b = 0.56 rad/sec
T1 b T1
æ 1 ö
1 çs+ ÷
pC , LEAD = = 5.96 rad/sec G ç T1 ÷ = 10.6 (s + 0.56 )
b × T1 LEAD ( s ) = g
ç g ÷ (s + 5.96 )
çs+T ÷
è 1 ø

GLAG - LEAD ( s) =
(s + 0.183)(s + 0.56 )
(s + 0.0172)(s + 5.96)
48(s + 0.183)(s + 0.56 )
GTOTAL ( s) =
s(s + 1)(s + 4)(s + 0.0172)(s + 5.96 )
The system as designed meets or exceeds all
required specifications:

50/66
Section 13.4
Transfer Functions in Digital
Control Systems

Z-Transform Example #1 51/66
Given a z.o.h. in cascade with G1(s)=(s+2)/(s+1),

find the equivalent G(z) for T=0.5 seconds.
Assume that both the input and output are sampled.
-Ts
1- e
G( s) =
s
(
× G1 ( s) = 1 - e -Ts
)
×
G1 ( s)
s
ì G1 ( s) ü æ z - 1 ö ì ( s + 2) ü
(
G( z ) = 1 - z -1
)
× zí ý=ç ÷ × zí ý
î s þ è z ø î s( s + 1) þ
s+2 2 -1 æ z -1 ö ì 2 1 ü
= + G( z) = ç ÷ × zí - ý
s( s + 1) s s + 1 è z ø î s s + 1þ
Z-Transform Example #1 52/66
æ z -1 ö ì 2 1 ü
G( z) = ç ÷ × zí - ý
è z ø î s s + 1þ
æ z -1 ö æ 2z -z ö
G( z) = ç ÷×ç + -T ÷
è z ø è z -1 z - e ø
æ z -1 ö æ 2z z ö
G( z) = ç ÷×ç - ÷ (T=0.5)
è z ø è z - 1 z - 0.607 ø
æ z - 1 ö æ z 2
- 0.213z ö
G( z ) = ç ÷ × çç ÷÷
è z ø è (z - 1)(z - 0.607) ø
z - 0.213
G( z) =
z - 0.607
53/66
Section 13.10
Cascade Compensation
Design via the S-Plane

Cascade Compensator Design 54/66
• If the root locus does not pass through the desired

operating point, we need to add a compensator to
shift it.
• In digital control systems, compensation can be
done by the computer, which uses an algorithm to
implement the adjustment, rather than a passive
or active electrical network.
• We will design the compensator on the s-plane,
and then we will use a special “bilateral
transformation” to bring it to the z-plane.

Digital Compensator Design 55/66
Design of digital compensators is a three-step process:
1. Design the compensator

in the s-domain:
2. Convert the compensator

into the z-domain:
3. Implement the
compensator using an
algorithm:
The Tustin Transformation 56/66
To convert the compensator design from the s-

domain into the z-domain, use the Tustin
transformation:
T
2( z - 1) 1+ s
s= z= 2
T ( z + 1) T
1- s
2
You should also choose the sampling interval T:
0.15 0.50
T= to
wF M
wF M
(where wFM is the 0dB crossing frequency.)

Digital Compensator Example 57/66
Design a digital lead compensator for the following

system so that the system will operate with 20%
overshoot and a settling time of 1.1 seconds.
1
G p ( s) =
s( s + 6)(s + 10)
We designed this lead compensator in the s-domain

in lesson 22 earlier this semester:
1977 × (s + 6)
GC ( s) =
(s + 29.1)
1977 × (s + 6)
Ge ( s) =
s( s + 6)(s + 10)(s + 29.1)
• We can use Matlab to draw a Bode plot of this

system and determine that wFM=5.8 rad/sec.
• Thus, a good choice of T would be between
0.15/5.8=0.026 and 0.5/5.9=0.086. However,
since faster sampling intervals always yield better
results, we will be safe and choose T=0.01 sec.
1977 × (s + 6) 2( z - 1)
GC ( s) = s=
(s + 29.1) T ( z + 1)
æ 2( z - 1) ö
1977 × çç + 6 ÷÷
è T ( z + 1) ø
GC ( z ) =
æ 2( z - 1) ö T = 0.01
çç + 29.1÷÷
è T ( z + 1) ø
1778 z - 1674
GC ( z ) =
z - 0.746
Converting the plant with a zero-order-hold:

-Ts
1- e 1
G p ( s) =
s s( s + 6)(s + 10)
-Ts æ 0.01667 - 0.0044 0.00694 - 0.0025 ö
G p (s) = 1 - e ç + + + ÷
è s
2
s s+6 s + 10 ø
æ z - 1 öæç 0.01667 × T × z - 0.0044 × z 0.00694 × z - 0.0025 × z ö÷

Gp ( z) = ç ÷ç + + +
è z øè (z - 1)
2
( z - 1) -6T
(z - e ) ( z - e -10T ) ÷ø
0.000000160 × z 2 + 0.00000616 × z + 0.000000148

Gp ( z) =
z 3 - 2.847 × z 2 + 2.699 × z - 0.8521

62/66
Section 13.11
Implementing the Digital
Compensator

Implementing the Digital Compensator 63/66
• Gc(z) can be implemented directly via

calculations in the digital computer.
• Our job is to find an expression for the
computer’s output, x*(t), as a function of its
current and previous inputs, e*(t), and its previous
outputs.

X ( z ) a3 z + a2 z + a1 z + a0
3 2
GC ( z ) = =
E( z) b2 z + b1 z + b0
2
(b z
2
2
) (
+ b1 z + b0 X ( z ) = a3 z + a2 z + a1 z + a0 E ( z )
3 2
)
2
( 3 2
)
b2 z X ( z ) = a3 z + a2 z + a1 z + a0 E ( z ) - (b1 z + b0 )X ( z )
æ a3 a2 a1 -1 a0 -2 ö æ b1 -1 b0 -2 ö
X ( z ) = çç z + + z + z ÷÷ E ( z ) - çç z + z ÷÷ X ( z )
è b2 b2 b2 b2 ø è b2 b2 ø
a3 * a a a b b
x* (t ) = e (t + T ) + 2 e* (t ) + 1 e* (t - T ) + 0 e* (t - 2T ) - 1 x* (t - T ) - 0 x* (t - 2T )
b2 b2 b2 b2 b2 b2
Future Present Past Past

Input InputLesson #39: Cumulative
Inputs Review Outputs
• Future inputs are not yet available, so we will

need to ensure that a3=0.
• More generally, the numerator of the
compensator’s transfer function must be of equal
or lower order than the denominator.
X ( z ) a2 z + a1 z + a0
2
GC ( z ) = =
E ( z ) b2 z + b1 z + b0
2
a2 * a1 * a0 * b1 * b0 *
x (t ) = e (t ) + e (t - T ) + e (t - 2T ) - x (t - T ) - x (t - 2T )
*
b2 b2 b2 b2 b2

Digital Compensator Flowchart 66/66
a2 * a1 * a0 * b1 * b0 *
x (t ) = e (t ) + e (t - T ) + e (t - 2T ) - x (t - T ) - x (t - 2T )
*
b2 b2 b2 b2 b2

z + 0.5 X ( z)
GC ( z ) = 2 =
z - 0.5 z + 0.7 E ( z )
(z 2
)
- 0.5z + 0.7 X ( z ) = (z + 0.5)E ( z )
z 2 X ( z ) = (z + 0.5)E ( z ) + (0.5z - 0.7)X ( z )
( ) ( )
X ( z ) = z -1 + 0.5z -2 E ( z ) + 0.5z -1 - 0.7 z -2 X ( z )
x* (t ) = e* (t - T ) + 0.5e* (t - 2T ) + 0.5x* (t - T ) - 0.7 x* (t - 2T )

Digital Compensator Flowchart 68/66
x (t ) = e (t - T ) + 0.5e (t - 2T ) + 0.5x (t - T ) - 0.7 x (t - 2T )

* * * * *

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Lesson 39: Cumulative Review

Lesson #39: Cumulative Review

• Course Evals are up! PLEASE participate to improve this

• Final Exam: May 11, 10:30 AM, GEM 159

Lesson #39: Cumulative Review

• Determine the transfer function for electrical, mechanical, and

Lesson #39: Cumulative Review

• An ideal integral controller uses active elements to

Lesson #39: Cumulative Review

Uncompensated System Lag Compensated System

We have selected K=164.6 to meet a target of

The goal now is to add a lag compensator that will

Let pc = 0.01 zc = 11.13 pc = 0.111

Lesson #39: Cumulative Review

Lesson #39: Cumulative Review

• All the parameters of the compensated system are

Lesson #39: Cumulative Review

Lesson #39: Cumulative Review

Lesson #39: Cumulative Review

• Such an approximation to the PD controller is

Lesson #39: Cumulative Review

• The combined effect of zc and pc must now bring

Lesson #39: Cumulative Review

There are an infinite number of lead compensators

Lesson #39: Cumulative Review

Design a lead compensator for this system

Arbitrarily select zc=-5.

G(s) H (s) s =-2.014+ j 5.252 = -0.0288 - j 0.00369 = 0.0029Ð -172.69°

Lesson #39: Cumulative Review

Compensated Root Locus

Lesson #39: Cumulative Review

Compensated Step Response

Lesson #39: Cumulative Review

Lesson #39: Cumulative Review

• Recall that the purpose of lag compensation is to

Lesson #39: Cumulative Review

1. Set the gain, K, to the value that satisfies the steady-state

We are relying on the initial gain setting to meet the steady-

Makes M=0dB for low

Lesson #39: Cumulative Review

• Improve the steady-state response of the previous

Lesson #39: Cumulative Review

Boosting K to 5839 has made the system unstable.

FM = 59.2° 180° - (FM + 10°) » -110° w0 dB = 9.8 rad/s

Lesson #39: Cumulative Review

• Thus, we need a zero at 0.98 rad/sec and a pole at

Lesson #39: Cumulative Review

Lesson #39: Cumulative Review

• In designing a lag compensator, our goal was to

Lesson #39: Cumulative Review

Lesson #39: Cumulative Review

The lead compensator will have a single parameter, b:

Lesson #39: Cumulative Review

Lesson #39: Cumulative Review

Design a lead compensator for this system to yield

fMAX = 24.1° | G |= -3.76dB at w = 39 rad/sec

This must occur at a frequency GC ( s) × G( s) =

Lesson #39: Cumulative Review