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‘A INSTITUTE OF TECHNOLOGY School of EE-ECE-COE VISION ‘Mapa sta be an jrternatonal center of excellence technology eaucaton by: providing instructions that are current in contant and state-of the atin delivery; ‘= enganing in cutting-edge research, and ‘responding tothe big lcal and global technological chalenges of the times Mission 8) The missin of Napéa Insthute of Technology to dsseminate, generate, preserve and apply scenic, engineering, architectural and IT knowledge. 1) The Instiute shel, sing the mst effecive mears, provide ts students with professional and advanced eantfic and engineering, archtectural ard information tectnology education through rigorous and up toate academic roars th are oporuntes forthe exerci of crest and the exgerence of shall plement curricula tha, while beng steeped in Yectnoleges, shal also be rch in the humanities, languages and social sciancas that wil inealato ethics. ‘The Institate shall advance and preserve knowledge by undertaking research and reporting on the resus cofsuch inquies, ‘The Institute, singly orf collaboration with others, shal bring to bear the word's vast store of kowedge in scence, engineering and other realms onthe problems ofthe industy and the community ‘inorder to make the Phiippines and the word a better place PROGRAM EDUCATIONAL OBJECTIVES. To equip the studenis with a broad foundation on the basie cenginterng concepts and fundamentals of Computer Engineering. To dev@iop the stufents capaoily to apply these armed concepis Inengineering design and to implement such 9 career ae procilng, “To inculcate to the students the importance of lifelong learning To deveop In the student anv appredaton of tecinotogy and deterring its uno inthe advancement of seit cfg + COE 121 MICROPROCESSOR (LECTURE) 2 requisite 2 COR NT/IT Co-requiste + COE rat Credit/Class Schedule 3 waits /45 lecture hours por wesk Course Description: This course provides an overview of the Intel family of microprocessors. It emphasizes the evolution, inerral architecture, operation, contol, and programming of Intel microprocessor from 80X86 tothe Pentium family of microprocessor unis “The fundamental concep\s of microconroller are also covered here ea Ta ‘Date Efective: [Dito Ravsadi | Pret br Tore Micwenensar(iecere) [quater | Sectenber2, ae tors Svar _| 08 re conta _| Nod 8.unangin 2 Program Outcomes and Relationship to Program Educational Objectives Program Outcomes Program Eduestional Objective eS [hn ahiliy to apply knowledge of mathomatis, science, and] 9 bnginverin YER i _ PMability todesien and conduct experiments, as wettas | y | y | y | y alyze ad interpret data SD Penabilly designe system, componen rpms Ty] | fncet desired needs (B)_| Am ability to function on malty diseiplinary feams Rin abiity to Mentfy, formulate, and solve engineer (© problems u * {| \n understanding of profesional and ethical responsi] v [Sm abitity to communicate effectively Th v jy) [Me broad education necessary tounderstand the impact | y rngineering solutions in a global and societsjgeontext x jp Pe Recoumition ofthe need for, andan ability meals ife-long learn [)_[\ Kiowledge of comtemporary issies veh 1 Pimabilty wo ase the techniques, sa y Yiw 8% Course Objectives and Rett Coarse Obi Program Outcomer The sles sn ele ae Tate tebe ie 1 Staiy te histor microprocessor Tarn the mic 7 programming and machine ; scx ie] SOBC/ROSS. es x i Ramat concept hand : v v 1 So Th foqrocessrs Learn te fundamen concenis of Mabie | | y 7 alaly CPUs. x z ® Course Coverage WETHOBOLGGYS | EVALUATION eS pone) STRATEGY TOOLS 1 [oenson tectire Taredacton istry end ciltin of microprocessors Trends and development nmicorrocrsers tecture Homework carat Dai eine | ind — RT amo eronecor(acse) | xen | Stent 2 raezets Sse Bok DawaRT OTe METOPTORETOT ieopennl Lecture Roctation [oases Lecture Rectaion Ticreprocenor Operator Fetch Drcode snd Execute Cte Lect Recitation Giz nurber Bamination “The ite! 8088/8086 Nicroprocessor Unit 3 | The Programming Necet dt purpose regitrs Special prpece reghters Lecture Rectaion Segment Rogéters Flag Regster ary Fag, Fay Flog, Zeo Fig, Sn Flag ‘rertion Flag, iterupt Flag, Direction Fl, tecture 4 [aprtag. 16 friviege Level, Nested Task "tol nok mony odd mode memory addresing Protected mode memory adresing ie ( Taressing Woes ‘Dota acresing mode offe K 5 [Program memory acer wade Sack memory adresing mode ta Homework ‘Ghiznunber? Bsamination Testvton Set Data movement etructons vectute snare were «¢|_Anthmetic and tog insructions ~ Bit manipulation structions Sting ntructions Progen conto ntructions = Bord wk Programming the intel ‘Assembler Diectves Semple programs and pogren gas |e Lecture Board werk ardvare and Sottware Lectore Seaton Lecture ‘seatvonk Tectare Gaara We tecture Bord werk ‘amination management (ipsinng) structions re intel 80888086 ro, Pentium Penta Hand Lecture ocitation van, Teoh, Tans ana Ta yodvctoninte's Nee CPUS tecture Recitation Taamination comes and Relationship to Co se Objectives/ Program Outcomes Coarse Outcomes Connrse Objectives Program Outcomes A sat completing his couse sheadd i a ithe miro be ae: Tepe stele lelale Te e ke Tast the history, evolution and development of] vv yy fy viydyfy} fyfy]y microprocessors Txphin the block diag general structure, andthe] 1% |} [8] |S a es ea Ta ‘Date Efective: [Dito Ravsadi | Pret br Tore Micwenensar(iecere) [quater | Sectenber2, Page 3ots Svar _| 08 re conta _| Nod 8.unangin Tunctonal cements of a microprocessor based syste, Demonstrate the Microprocessor operation such as fetch, decode and execute. Distinguish the programming model of the Intel S086/088, microprocessor unit including its multi-purpose registers, special purpose registers, flag register and segment registers Tiustate the menory manigement modes from Intel 8086/8088 to Pentium processor List the Insiruction Set of Intel SOB68O88. Apply the Tastraction Set of the Intel 80868088 through the basic Assembly Language Programming. List the Hardware and Software Inverupts Describe the Intel Pentiam microprocessors including. the RISC concepts, Bus ‘operations, instruction and data che, memory management (Gipelining) and additional Exphin the

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