9500V

MICROCODE VERSION 065B/D & 165B/D

RELEASED 11/04/2005

Newly supported features and functions for Version 065B/D & 165B/D

NONE

Improvements for Version 065B/D & 165B/D

NONE

The change of contents for Version 065B/D & 165B/D

1) Subsystem Down by “Data transfer check error[DSTPOSERR]"

Item Description
Contents Subsystem down occurs when all conditions are met.
A) Microcode x65B/C is installed High Speed Sequential Write Mode = OFF(Default)
B) LUN are configured in RAID5 4D+1P
C) Write command for area starting at 256KB boundary above LUN is issued from the host with
an I/O size of 1MB, 2MB, 3MB and 8MB. In case of High Speed Sequential Write Mode = ON
B) LUN are configured in RAID5 4D+1P or 8D+1P
C) Write command for the above LUN is issued from the host with an I/O size of 512KB or
larger.(These conditions may be met using True Copy, Hi Copy and External Storage of USP)
The microcode version x65B/C reinforced the check logic of the write position of write
command issued, the controller may then block by improper check logic in the above condition.
At that time the remaining controller attempts to continue processing, and then may block.

2) LAN Connection Failure from HDvM/HTM/DAMP

Item Description
Contents The LAN data transfer at customer site is so slow that the 9500 detects a LAN data transfer
timeout in the middle of a data transfer, and it cannot be recovered by command retry.
Conditions:
A) Microcode x65A/V or later
B) DAMP 10.31 or later or HDvM or HTM using DAMP API 10.31 or later
C) The LAN transfer rate is less than 60KB/sec. Note: With the combination of A&B, the large
data(max. 540KB) is transferred by a single command.

3) Controller failure by “Data transfer check error[WSEGLOCK]”

Item Description

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 Contents When the controller confirms cache memory during LU change processing from CTL0 to CTL1,
CTL1 fails. Then the normal controller receives host I/O, then the controller fails with “Data
transfer check error[WSEGLOCK]” because of a conflict in cache memory.The problem may
occur when all conditions are met.
A) Dual controller configuration.
B) CTL1 fails during LU ownership change from CTL0 to CTL1
C) A controller then receives host I/O just after the other CTL blocks

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