IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 16, NO.

5, SEPTEMBER 2001 581

A Systematic Approach to Developing Single-Stage

Soft Switching PWM Converters
Tsai-Fu Wu, Senior Member, IEEE and Shih-An Liang, Student Member, IEEE

Abstract—A systematic approach to developing soft switching

PWM converters based on the synchronous switch scheme is pre-
sented in this paper. With the approach, several families of passive
and active soft switching PWM converters, such as buck–boost,
Zeta, Ćuk, and Sepic, can be generated from the two basic con-
verters, buck and boost. Also, the approach is used to integrate
multiple converters to form a single-stage soft switching PWM con-
verter. It has been shown that analysis of the converters can be con-
veniently performed from the derived general configurations, re-
ducing the complexity significantly. Therefore, employing the tech- Fig. 1. Conceptual block diagram of converters in cascade connection.
nique can not only explore more physical insights into the con-
verters in a family but reveal more relationships among the soft
switching converters over conventional approaches. Measured re-
sults from a prototype have verified the feasibility of the derived
single-stage converters.
Index Terms—Single-stage converter, soft switching.

I. INTRODUCTION

T O ACHIEVE lighter weight, smaller size and higher

power density, pulse-width-modulated power converters
are operated at high switching frequency. However, as the
(a)

switching frequency increases, they suffer from high switching

losses, high EMI levels and, consequently, low efficiency in
hard switching converters. Several kinds of soft switching con-
verters, such as series and parallel resonant converters [1]–[3],
quasiresonant converters (QRCs) [4]–[6], and multi-resonant
converters (MRCs) [7]–[9], have been proposed to alleviate
these problems. In the converters, the power switching devices
are commutated with either zero-voltage switching (ZVS)
or zero-current switching (ZCS); thus, switching losses and
EMI are reduced significantly. Unfortunately, some of their
characteristics such as high voltage and current stresses, large
conduction losses, high load limitations and high costs restrict
the practical use of these converters [10], [11].
Most recent development in high frequency converter config-
uration is a hybrid of resonant soft switching and PWM control.
This group of converters are called soft switching PWM con-
verters which can relieve the drawbacks described previously.
In converter operation, the ZVS-PWM and/or ZCS-PWM tech-
niques can be used to minimize switching stresses and switching
losses, and are particularly attractive for high frequency appli-
cations. In the soft switching PWM converters, the switches op-
erate in resonant mode only during switching transitions and
Manuscript received November 29, 1999; revised April 27, 2001. Recom-
mended by Associate Editor J. Qian.
The authors are with the Power Electronics Applied Research Laboratory
(PEARL), Department of Electronics Engineering, National Chung Cheng Uni-
versity, Chia-Yi, Taiwan, R.O.C. (e-mail: tfwu@ee.ccu.edu.tw).
Publisher Item Identifier S 0885-8993(01)08046-2.
0885–8993/01$10.00 © 2001 IEEE
(b)
Fig. 2. Schematic diagrams of the passive soft switching PWM buck and boost
converters [19].
then, return to PWM operation for the rest of a switching period.
These converters can be classified into two groups: passive soft
switching converters and active soft switching converters. Pas-
sive methods use only passive components to achieve zero-cur-
rent transition at turn on and zero-voltage transition at turn off
[17]–[20]. Active methods incorporate passive components and
auxiliary active switch to achieve soft switching resonant com-
mutation [21]–[23]. In [12]–[23], the concepts of fundamental
soft switching cells were employed to generate many families of
soft switching PWM converters. A general rule for generating
these soft switching PWM converters, however, has not been es-
tablished.
In this paper, a systematic approach to developing soft
switching PWM converters is proposed, which is based on the
synchronous switch scheme proposed in [24], [25]. The basic
converter units (BCUs) of each passive or active soft switching
family are first identified, and the converters in a family are

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582
Fig. 3. Illustration of the derivation of passive soft switching buck–boost converter.
then synthesized systematically. Each type of passive or active
soft switching PWM converters is further divided into buck
and boost families for the convenience of analysis and design.
The proposed approach can explore more physical insights into
the converters in a family, and reveal more relationships among
converters over conventional approaches.
II. PROCEDURES FOR GENERATING SOFT SWITCHING
PWM CONVERTERS
Switching power converters are usually connected in cascade
to achieve multiple functions, such as adding a power factor
corrector (PFC) to prevent harmonic current pollution. These
can be conceptually illustrated by a two-converter system
shown in Fig. 1. In the figure, the multistage converter consists
of two power stages, namely converter unit 1 (CU1) and
converter unit 2 (CU2). Each stage in the cascaded converter
system can be controlled separately; that is, each power switch
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IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 16, NO. 5, SEPTEMBER 2001
can be turned on or off independently. When the power switches
can be operated synchronously and they share a common node,
the two-stage converter can be converted to a single-stage
converter (SSC) through an integration of the switches. In
the following, a family of soft switching PWM converters are
derived by using the synchronous switch scheme.
A. Generation of Passive Soft Switching PWM Converters
To reduce switching losses in high frequency PWM con-
verters, many passive soft switching configurations have
been proposed in the literature with zero-current transition at
turn on and zero-voltage transition at turn off. Therefore, the
switching losses and EMI can be effectively reduced, and high
performance, high reliability and low cost can be achieved.
As shown in Fig. 2, the passive soft switching buck and boost
converters are recognized as the two BCUs, and the passive soft
switching cells enclosed in the dashed line are formed with only
WU AND LIANG: SINGLE-STAGE SOFT SWITCHING PWM CONVERTERS
Fig. 4. Illustration of the derivation of passive soft switching Cuk converter.
passive switches and reactive elements. From the two BCUs,
another possible passive soft switching buck–boost, Zeta, Ćuk,
and Sepic can be generated by using the synchronous switch
scheme. With the passive soft switching Cell, the converter op-
eration is not changed except at the switching transition during
turn on and turn off. For the rest of the switching period, these
converters are operating in the regular PWM converter mode. To
obtain the passive soft switching single-stage converters (SSCs),
CU1, and CU2 are grafted through switch integration in which
one is PWM converter and the other is passive soft switching
PWM converter.
For instance, grafting passive soft switching PWM boost
converter on PWM buck converter yields a soft switching
buck–boost SSC. The derivation of this SSC is illustrated in
Fig. 3. Fig. 3(a) shows the two converters in cascade connec-
tion, corresponding to CU1 and CU2. First of all, we observe
that the function of an – – network is equivalent to
that of an , and relocate switch , without changing its
operating principle; thus, an equivalent converter configura-
tion is derived and drawn in Fig. 3(b). It reveals that active
switches and are in the – type configuration (with
a – common node); thus, with the synchronous switches
scheme, and are replaced with switch and diodes
and . The derived circuit is depicted in Fig. 3(c).
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583
It can be further simplified by removing diodes and
to become the one shown in Fig. 3(d), because the
currents through and are the same during the steady
on-state, and no differential current circulates through
and . It is apparent that, in Fig. 3(d), diodes and
are in series when conducting steady on-state current;
thus, they can be substituted with a single diode , as
illustrated in Fig. 3(e). By properly relocating switch
and rearranging the overall circuit configuration, the passive
soft switching PWM buck–boost converter is obtained and
depicted in Fig. 3(f).
By following the same derivation procedure, grafting passive
soft switching PWM buck converter on PWM boost converter
can yield a soft switching boost–buck SSC (i.e., Ćuk converter).
The soft switching Zeta SSC can be derived by properly cas-
coding PWM buck–boost converter and soft switching PWM
buck converter. Analogously, the soft switching Sepic SSC can
be developed by properly organizing the PWM boost–buck
converter as well as soft switching PWM boost converter.
The derivations of these SSC’s are illustrated in Figs. 4–6.
Alternatively, it is possible to derive the passive soft switching
converters by cascading a CU1 passive soft switching PWM
converter and a CU2 PWM converter, which is illustrated in
Fig. 7.
584
Fig. 5. Illustration of the derivation of passive soft switching Zeta converter.
B. Generation of Active Soft Switching PWM Converters
In addition to a passive soft switching method, an active
method also has been proposed by using additional active,
passive switches and reactive elements to achieve ZVS or ZCS
function. With this approach, the switching losses of the main
and auxiliary switches can be reduced, while without increasing
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IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 16, NO. 5, SEPTEMBER 2001
Fig. 6. Illustration of the derivation of passive soft switching Sepic converter.
voltage and current stresses. However, using the active method
increases the design complexity of both power stage and control
circuit, increasing circuit cost and deteriorating in system relia-
bility.
For convenience of illustration, grafting a PWM buck con-
verter on an active soft switching PWM boost converter which
yields a soft switching boost–buck (Ćuk) one is conducted.
Derivation of the converter is shown in Fig. 8. By following the
same philosophy described previously, the active soft switching
PWM Ćuk converter can be derived when the active switches
posses a common node and are operated in unison. Similarly,
by applying the synchronous switches technique, the other
converters with active soft switching can also be derived, which
are buck–boost, Zeta, and Sepic converters.
WU AND LIANG: SINGLE-STAGE SOFT SWITCHING PWM CONVERTERS
Fig. 7. Illustration of grafting a boost converter on a soft switching buck converter to yield a passive soft switching buck–boost converter.
C. Generation of Isolated Single-Stage ZVS-PWM
Active-Clamping Converters
To protect line source from harmonic current pollution, more
stringent regulation from IEC1000-3-2 has been imposed on
electronic equipment. To comply with the regulation, it is cus-
tomary to add a power factor corrector (PFC) in front of a dc
regulator. In the literature, many active PFC’s with tight output
regulation have been proposed. They can be divided into two
categories: two-stage PFC’s and single-stage PFC’s. Although
a two-stage PFC is relatively mature and viable in the applica-
tions with a wide power range, it is not an optimal design and
it may suffer from the drawbacks of low conversion efficiency,
high cost and high design complexity for low power applica-
tions.
In an effort to improve the conversion efficiency and also to
reduce the component count and cost, a number of single-stage
converter topologies have been proposed [26]–[31]. These con-
verters, however, have at least one of the following drawbacks:
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585
1) switches operating in hard switching, 2) low conversion effi-
ciency, and 3) high voltage stress. In order to relieve these dis-
advantages, a family of isolated single-stage ZVS-PWM con-
verters are derived with an active-clamping method. These con-
verters present soft commutation and low voltage stress im-
posed on switches, while without circulating reactive energy
that would cause extra conduction losses.
Generation of isolated single-stage ZVS-PWM ac-
tive-clamping converters includes selection of PFC’s and
regulator semi-stages, and applies the synchronous switch
technique to integrate the semi-stages. Fig. 9 illustrates the
derivation of a boost-forward ZVS-PWM SSC with the
clamping action achieved by a boost cell. The active clamping
of the SSC in Fig. 9 is formed with capacitor and switch
. In the steady state, the voltage across clamp capacitor is
(1)
586 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 16, NO. 5, SEPTEMBER 2001

Fig. 8. Illustration of the derivation of active soft switching ‘Cuk converter [20].

It can be seen that (1) is a transfer function same as that of a
boost converter. Thus, the clamping action is named as a boost
cell. Similarly, as shown in Fig. 10(a), the active clamping cell
is a buck type, in which the voltage across clamp capacitor
is
(2)
For the circuit shown in Fig. 10(b), the cell is a buck–boost cell,
in which can be expressed as
(3)
The boost and forward-boost ZVS-PWM converters con-
nected in cascade are shown in Fig. 9(a). Since the source leads
of and share the same node, and they can be operated
synchronously, by adopting the approach presented in [24],
[25], T-type synchronous switch is used to replace them,
as depicted in Fig. 9(b). After removing blocking diode , losses are still inevitable. In order to maintain high switching
the resulting converter is shown in Fig. 9(c). By following the
same procedure, the rest of the isolated ZVS-PWM SSC’s can
be derived, and are shown in Figs. 10 and 11.
D. A Family of Quadratic Soft Switching PWM Converters
In applications of converters that require a wide range of input
to output conversion, PWM converters must operate with an ex-
tremely low or high duty ratio. For example, the duty ratio would
have to be about 0.0688 for a 48-to-3.3 V conversion, which se-
verely limits the switching frequency and the dynamic range of
the load. An undesirable high peak current will be introduced,
which results in a great amount of power losses. Cascade of
two (or more) converters can significantly extend the conver-
sion ratio and resolve the problems mentioned above, but they
require more power switches. By using the synchronous switch
scheme, these converters are grafted to form an SSC, which can
obtain the merits of only one active switch, compact size, pos-
sible high reliability, and simple driver design.
In the above mentioned converters, however, switching
frequency operation while maximizing the converter efficiency,

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WU AND LIANG: SINGLE-STAGE SOFT SWITCHING PWM CONVERTERS 587

Fig. 9. Illustration of the derivation of isolated single-stage ZVS-PWM active-clamping converter [21]–[23].

Fig. 10. Isolated ZVS-PWM SSC’s derived from boost and forward converter [21]–[23].

soft switching cells are introduced to the converters. For It is apparent that the quadratic soft switching Zeta SSC can be
instance, grafting passive soft switching PWM Zeta converter derived by properly relocating switches and of the Zeta
on PWM Zeta converter yields a quadratic soft switching PWM converter shown in Fig. 12(a); thus, the circuit configuration
Zeta SSC. The derivation of this SSC is illustrated in Fig. 12. becomes the one shown in Fig. 12(b). Since switches

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588 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 16, NO. 5, SEPTEMBER 2001

Fig. 12. Illustration of the derivation of passive soft switching quadratic Zeta
converter.

degenerating and rearranging the circuit, the new quadratic

soft switching converter is obtained and shown in Fig. 12(d).
Moreover, with the analogous procedure, the other quadratic
soft switching PWM converters can be obtained, which are
illustrated in Fig. 13. All of these quadratic converters can
operate with soft switching, a wide load range and a wide
conversion ratio.

Fig. 11. Isolated ZVS-PWM SSC’s derived from boost and flyback converter III. APPLICATION OF AN ISOLATED SINGLE-STAGE ZVS-PWM
[21]–[23].
ACTIVE-CLAMPING CONVERTER
and are in – type, they can be replaced with an – This section presents an application of the isolated
synchronous switch , as shown in Fig. 12(c). By properly single-stage ZVS-PWM active-clamping converter which is the

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WU AND LIANG: SINGLE-STAGE SOFT SWITCHING PWM CONVERTERS 589

Fig. 14. An isolated ZVS-PWM SSC with synchronous rectifiers and current
doubler used as an illustration example.

ciency of ZVS-PWM SSC, the output configuration is designed

with a self driven synchronous rectifier. The current doubler
is adopted to reduce current stress and simplify transformer
structure.
To facilitate the analysis of the operating principle, Figs. 15
and 16 show the topological stages of the ZVS-PWM SSC
within a switching cycle and its key waveforms, respectively.
The operation of the converter can be explained as follows:

A. Operating Principle
The converter differs from conventional single-stage con-
verters by adding an auxiliary power MOSFET switch ,
a resonant inductor , a resonant capacitor which is
the output capacitance of power switch , and a clamping
capacitor to the converter. Switch is the main power
MOSFET switch. In the converter, the two power switches are
switched in a complementary way.
By employing these additional components, zero voltage
switching (ZVS) for both main switch and auxiliary
switch can be accomplished. Therefore, the ZVS feature
associated with a constant switching frequency makes the
converter suitable for high efficiency and high power density
applications. In Fig. 14, when switch turns off, the current
will continue to flow through clamping capacitor and the
body diode of . Then, the auxiliary power switch is
turned on, while the body diode of is forward biased,
resulting in that turns on with ZVS. Under the assumption
that the resonant frequency of the circuit formed by transformer
primary inductor and clamping capacitance is much
lower than the switching frequency, the voltage across will
not have a significant change. When the auxiliary power switch
is turned off, the magnetizing current will continue to flow
toward the source via the output capacitor of and the
transformer primary inductor of . Because is so small,
it leads to an approximately linear discharging characteristic
and the discharging time is very short. The voltage across
switch will decrease in the resonant manner toward zero,
and then a ZVS condition of can be achieved. The detailed
circuit operation can be explained stage by stage.
Stage 1 [Fig. 15(a), ]: At the main power
switch is turned on, and the current flowing
Fig. 13. Schematic diagrams of the passive soft switching quadratic PWM
converters. through the switch is given by the sum of boost inductor cur-
rent , primary winding current and magnetizing current
. As can be seen from Fig. 15(a), diode is reverse biased
combination of two semi-stages, namely boost PFC semi-stage and is forward biased. The inductor current is being
and isolated forward-boost ZVS-PWM active-clamping linearly increased, and the slope is given by
semi-stage. The schematic is depicted in Fig. 14, in which a
synchronous rectifier and a current doubler are added to the
(4)
isolated ZVS-PWM SSC. To improve the performance and effi-

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590
Fig. 15. Topological stages existing in the boost-forward-boost ZVS-PWM
SSC over one switching cycle.
Therefore, the dc-link capacitor
will be transferred to the secondary through the transformer.
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IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 16, NO. 5, SEPTEMBER 2001
discharges energy which
During in the on state, current in the secondary winding
can be expressed as
(5)
At this operation, there will be a voltage across the secondary
winding which will turn on and the current in the secondary
winding will flow through , the load, and synchronous
switch . Inductor is in free wheeling through and
output load.
Stage 2 [Fig. 15(b), ]: The main power switch
is turned off at . The output capacitor of is
charged by the magnetizing current, in which the charge time
is very short, leading to the drain to source voltage
rising steeply. Boost inductor current still continuously
flow and with a slope given as follows:
(6)
If is smaller than , the slope of current is
positive.
Stage 3 [Fig. 15(c), ]: When the output ca-
pacitor of is continuously charged, voltage
will increase over the rectified input voltage , resulting in the
slope of current being negative. Therefore, the polarity of
boost inductor voltage is reversed, as shown in Fig. 15(c); then
diode is maintained reverse biased and is forward bi-
ased.
Stage 4 [Fig. 15(d), ]: When is
increased so as diode is forward biased and diode is
reverse biased, current , which was flowing through main
power switch , is diverted to dc-link capacitor , as
indicated in Fig. 15(d). In the secondary winding, due to the
change of the voltage polarity, the current will flow through
output inductor , output load and synchronous rectifier
switch . The current through output inductor will
continue to flow via and the load.
Stage 5 [Fig. 15(e), ]: When is in-
creased to clamping capacitor voltage , the magnetizing cur-
rent of the transformer will continue to flow into the clamping
capacitor and the body diode of auxiliary switch . As a re-
sult, the auxiliary switch turns on at ZVS. At the same time,
the clamping circuit current is decreasing in a resonant manner.
The resonant frequency is determined by the clamping capaci-
tance and the sum of magnetizing inductance and leakage
inductance of the transformer. It is assumed that the resonant
frequency of the circuit is much lower than the switching fre-
quency. Therefore, the voltage across clamping capacitor
will not have a significant change during operation. The polarity
in the secondary winding did not change, and the secondary cur-
rent flow is the same as that during – interval.
Stage 6 [Fig. 15(f), ]: When the boost inductor
current reaches zero, the operation of circuit enters a dis-
continuous conduction mode (DCM) and both diodes and
are reverse biased. Within this stage, the current through
clamping capacitor and the transformer flows back to the
dc-link capacitor.
WU AND LIANG: SINGLE-STAGE SOFT SWITCHING PWM CONVERTERS 591

Fig. 18. Measured waveforms of drain-source voltage V across Q and

current i through Q .

Fig. 19. Measured waveforms of input voltage v and current i at v =

100 V and I = 3:5 A.

Fig. 16. Key waveforms of the ZVS-PWM SSC shown in Fig. 11. Fig. 20. Measured waveforms of input voltage v and current i at v =
230 V and I = 3:5 A.

input voltage: 90 264 , line frequency: 47 Hz 63

Hz;
output voltage: 20 V, output current: 3.5 A;
switching frequency: 100 kHz.
A circuit diagram of the SSC with the synchronous rectifiers
and current doubler is shown Fig. 14. It is designed with the
following parameters:
mH F
H F
Fig. 17. Measured waveforms of drain-source voltage V across Q and
current i through Q and C . H H
F F
Stage 7 [Fig. 15(g), ]: At time the IRFPE 50
auxiliary power switch is turned off. The reverse current will FEP6DT EI-33
continue to flow through the dc-link capacitor and the output turns turns
capacitor of main power switch . Voltage air gap mm
across will decrease in the resonant manner toward zero, Measured current and voltage waveforms of switches
creating a ZVS operating condition for . When the main and are shown in Figs. 17 and 18. These waveforms agree
power switch is turned on again at the end of stage 7, the with those predicted theoretically, and present ZVS commuta-
circuit operation described above will start once again. tions. Figs. 19 and 20 show the experimental waveforms of the
line current versus line voltage. It can be seen that the current
B. Experimental Results and Discussion follows the voltage closely and the waveforms are almost sinu-
To verify the theoretical discussion of the proposed isolated soidal, proving that a high power factor can be achieved by the
single-stage ZVS-PWM active-clamping converter, a 70 W SSC proposed ZVS-PWM SSC. Fig. 21 shows the plot of the input
with the following specifications is designed: power factor as a function of output power under different line

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592
Fig. 21. Plots of power factor versus output power under different line
voltages.
Fig. 22. Measured dc-link capacitor voltage V versus output power under
the input voltage of 264 V .
TABLE I
LIST OF THE POWER FACTOR AND CURRENT HARMONICS (% OF IEC 1000-3-2
CLASS D LIMITS MULTIPLIED BY 2.3) OF THE ZVS-PWM SSC UNDER THE
OPERATING CONDITION OF v = 100 V AND I = 3:5 A
TABLE II
LIST OF THE POWER FACTOR AND CURRENT HARMONICS (% OF IEC 1000-3-2
CLASS D LIMITS) OF THE ZVS-PWM SSC UNDER THE OPERATING
CONDITION OF v = 230 V AND I = 3:5 A
voltages. These show that the designed system is with a power
factor higher than 0.934 at heavy load and meets the requirement
from IEC 1000-3-2 over universal input voltage range. The mea-
surements of power factor, and the degree of line current distor-
tion under the operating condition of , 230
and A are listed in Tables I and II. Table III shows the
measurements of power factor (PF), total harmonic distortion
(THD), bulk-capacitor (or dc-link capacitor) voltage ( ) and
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IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 16, NO. 5, SEPTEMBER 2001
TABLE III
MEASURED PF, THD, V , AND  AT FULL LOAD
efficiency ( ) versus the line voltage range at full load. Fig. 22
shows the dc-link voltage of storage capacitor versus output
power with input voltage of 264 . The maximum dc-link
voltage is 408 V, so a 450 V rated dc-link bulk capacitor can
be used. In this paper, a high-voltage stress problem is solved
by operating the PFC semi-stage in DCM (discontinuous con-
duction mode) and the dc/dc regulator semi-stage in a combined
DCM/CCM (continuous conduction mode). At light load, the
dc/dc regulator semi-stage is operated in the DCM, while at
heavy load it is operated in the CCM; thus, the dc-link voltage
can be properly controlled within a certain voltage range. A de-
tailed description can be found from reference [32].
IV. CONCLUSIONS
It has been shown in the paper that existing and novel soft
switching PWM converters can be developed with a system-
atic approach based on the synchronous switch scheme. In the
paper, generation of several families of basic passive and ac-
tive soft switching PWM converters, and isolated single-stage
ZVS-PWM active-clamping converters with PFC function has
been presented in detail. Also, the approach is used to inte-
grate two converters to form a family of quadratic soft switching
PWM converters which can significantly extend the conversion
ratios.
Employing the synchronous switch technique can not only
provide physical insights into the converters in a family, but re-
veal relationships among these soft switching converters. Exper-
imental results measured from a laboratorious prototype have
verified the feasibility of the derived single-stage converters.
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Tsai-Fu Wu (S’89–M’91–SM’98) received the B.S.
degree in electronics engineering from National
Chiao-Tung University, Hsinchu, Taiwan, R.O.C.,
in 1983, the M.S. degree in electrical and computer
engineering from Ohio University, Athens, OH, in
1988, and the Ph.D. degree in electrical engineering
and computer science from the University of Illinois,
Chicago, in 1992.
From 1985 to 1986, he was a System Engineer
at SAMPO, Inc., Taiwan, developing and designing
graphic terminals. He was a Teaching and Research
Assistant in the Department of Electrical Engineering and Computer Science,
University of Illinois, Chicago, from 1988 to 1992. Since 1993, he has been
with the Electrical Engineering Department, National Chung Cheng University,
Taiwan, where he is currently a Professor and the Director of the Power
Electronics Applied Research Laboratory (PEARL). His research interests
include developing and modeling of power converters, design of electronic
dimming ballasts for fluorescent lamps, metal halide lamps and plasma display,
and design of solar-panel-supplied inverters for grid connection.
Dr. Wu is a senior member of the CIE.
Shin-An Liang (S’99) was born in Miaol, Taiwan,
ROC, in 1958. He received the B.S. degree in elec-
tronic engineering and the M.S. degree in automatic
control engineering from Feng Chia University,
Tai-Chung, Taiwan, in 1980 and 1987, respectively,
and is currently pursuing the Ph.D. degree at the
Power Electronics Applied and Research Laboratory
(PEARL), Department of Electrical Engineering,
National Chung Cheng University, Chia-Yi, Taiwan.
From 1982 to 1984, he was a Research Assistant at
the Chun-Shan Institute of Science and Technology,
Taiwan, developing and designing switching power supplies. From 1987
to 1989, he was a Lecturer at the Department of Electronic Engineering,
Yawn-darn College, and was also at the R&D Department, Hitron Corportation,
designing switching power supplies. From 1989 to 1998, he served as an
R&D Manager at Behavior Technique Corporation, Taiwan, where he has
been involved with research and development on switching power supplies.
His interests include developing and designing of converter topologies,
soft-switching techniques. DC/dc converters and power-factor-correction
techniques.