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Contents

1. Introduction ..................................................................................................................................... 2
2. Integrated Buck Boost Converter .................................................................................................... 5
3. MATLAB Software Design ............................................................................................................ 9
4. Hardware Design .......................................................................................................................... 11
555 Timer Designs ............................................................................................................................ 11
Astable 555 Oscillator Charge and Discharge Times .............................................................. 11
555 Oscillator Cycle Time .......................................................................................................... 12
555 Oscillator Frequency Equation ............................................................................................... 12
555 Oscillator Duty Cycle .............................................................................................................. 12
Power Circuit Design ........................................................................................................................ 13
BUCK Mode design........................................................................................................................ 13
BOOST Mode design ..................................................................................................................... 14
HARDWARE PARAMETERS ........................................................................................................ 14
5. Conclusion .................................................................................................................................... 15
6. References ..................................................................................................................................... 16

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1. Introduction

Now a day most of the fields such as industries, telecommunication, plug in hybrid
vehicles etc, there will be different voltage level because of the auxiliary circuits in addition to
main power circuit. In such system, Single Input Multiple output (SIMO) dc to dc converters
have very good place and researches on SIMO dc to dc converters are worthy. Integrated Dual
Output Buck Boost converter is one of the SIMO dc to dc converter which yields one step up
output and one step down voltage. This converter is developed by replacing the switch in
conventional boost converter by two series switches and taking a lowpass filter from the two
series connected switches. This can be extended to N outputs which require on only N switches.
But in conventional converters 2N switches are required. So the proposed converter reduces
the bill amount. The cross regulation and voltage regulation further can be reduced by N+1
switches for N outputs. This converter does not require any other circuit components in order
to achieve good cross regulation. So that it again reduces the cost which will be an attractive
feature in modern market. In order to check the behaviour of the converter simulation is carried
out in MATLAB environment. The simulation results validate the operation of the converter.

In the modern world fields such as industries, telecommunication, LED drivers, dc


based Nano grid etc require multiple output because of the auxiliary circuits present in those
system other than main circuit. So that the researches on Single Input Multiple Output dc-dc
converters are progressive in order to get a less bulky system, more reliable control strategy
and less cross regulation etc.

Fig 2.a and Fig 2.b shows conventional and proposed SIMO dc to dc converters
respectively. In conventional SIMO dc to dc converters individual dc to dc converters are
connected to common input dc bus. But in the proposed SIMO dc to dc converters, an
integrated architecture is used for multiple outputs.

Figure 1 Conventional Topology

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Figure 2 Proposed Topology

SIMO converters where individual dc to dc converters are used, the whole


system will be bulky. This is because it requires at least four switches including the front end
and the back end. So that the system will be bulky and there in turn costly.

SIMO dc to dc converters with cascaded dc-dc stages or time multiplexed and current
channelized multiple output converters are the examples for non isolated SIMO dc to dc
converters. Converters with cascaded dc to dc stages the system is bulky but the control system
is simple. But in the case of time multiplexed and current channelized converter the control
system is very complex. A multiple output converter has to meet many challenges. They are
its ability to regulate each of the individual outputs precisely, to have better cross-regulation
behaviour due to changes in the other output and to devise a suitable control system to
coordinate the power flow between the different outputs.

For a multiple output converter, cross regulation is the change in voltage on one output
(expressed as a percent) caused by the load change on another output. This may be due to
conduction loss of diodes, magnetic windings of the transformer, ESR of the capacitor, external
inductors included in the circuit. Cross regulation problems lead to the use of additional linear
and non-linear switching. But in this converter a better closed loop feedback control system is
employed for the reduction of cross regulation. Voltage regulation and cross regulation can be
achieved with suitable control system. The cross regulation again can be decreased by replacing
the diode by a switch. The switching pattern of this switch is just the complementary of the
second switch in Integrated Dual Output Buck Boost Converter.

In order to mitigate the above problems associated with SIMO converter a new version having
an integrated architecture with a step up output and multiple step down outputs it replaces all
the individual dc-dc converters be a series connected switches in a conventional boost circuit.

The integrated multiple-output converters (IMOCs) Fig 2.b utilize a reduced number of
switches ((N + 1) switches for N outputs) compared with separate converters. In conventional

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converters with separate dc-dc converters 2N switches are required. The use of a lower number
of switches reduces the cost of the switch and its associated drivers. In addition, due to its
integrated architecture, all the outputs of the system are regulated using the same set of
switches, and hence, the coordination control is easier.

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2. Integrated Buck Boost Converter

A multiple output converter has to meet many challenges. They are its ability to regulate
each of the individual outputs precisely, to have better cross-regulation behaviour due to
changes in the other output and to devise a suitable control system to coordinate the power flow
between the different output.

Voltage regulation and cross regulation can be achieved with suitable control system.
The cross regulation again can be decreased by replacing the diode by a switch. The switching
pattern of this switch is just the complementary of the second switch in Integrated Dual Output
Buck Boost Converter.

Different non-isolated SIMO converter designs have been reported in the roject, which
include the use of cascaded dc–dc stages, time-multiplexed and current-channelized multiple-
output converters, etc. Among the non-isolated designs, the number of circuit elements used in
cascaded stages is more, but the outputs can be precisely regulated using simple control
systems. In contrast, multiplexed converters use reduced circuit components, but the control
systems are associated with various constraints due to time multiplexing, operating modes,
cross-regulation, etc. A single-switch coupled-inductor-based dual-output dc–dc converter has
been proposed in, which can provide two different dc outputs from a single dc input.

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PROPOSED TOPOLOGY
In order to mitigate the above problems associated with SIMO converter a new version
having an integrated architecture with a step up output and multiple step down outputs it
replaces all the individual dc-dc converters be a series connected switches in a conventional
boost circuit. The integrated multiple-output converters (IMOCs) in this paper, utilize a
reduced number of switches ((N + 1) switches for N outputs) compared with separate
converters. In conventional converters with separate dc-dc converters 2N switches are required.
The use of a lower number of switches reduces the cost of the switch and its associated drivers.
In addition, due to its integrated architecture, all the outputs of the system are regulated using
the same set of switches, and hence, the coordination control is easier.

Topology with two switches is shown in the Fig This is developed by taking the
conventional boost converter ans replaces the switch by two series switches. Two switches are
bidirectional mosfets. Two inductors L1 and L2, two capacitors C1 and C2, one diode and two
loads are used in the circuit. This can be developed for N output with N switches

This paper presents a nonisolated SIMO dc–dc architecture that can provide a step-up
and multiple step-down outputs from a single dc input. The topology has been realized by
replacing the control switch of a boost converter topology by seriesconnected switches and
using the resulting switch nodes to synthesize additional outputs using low-pass filter networks.
The step-up and step-down gains achieved are the same as separate boost and buck converters,
respectively. However, compared with separate converters [see Fig. 1(a)], the proposed

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structure uses a lower number of switching elements. Moreover, the converter has continuous
currents both at the input and the step-down output. Hence, compared with a conventional buck
or buck–boost converter, the input filter requirement is lower. The complementary switching
operation need not have dead-time protection due to inherent protection provided by the circuit
topology. The control system is exactly similar to those implemented for conventional buck
and boost converter and, hence, can be easily extended to this design for precise regulation of
each output.

shows the schematic of a conventional boost converter with the single control switch Sa. The
switch node voltage vsn corresponding to gate signal GSa is shown in Fig. . The switch node
voltage is equal to zero when switch Sa is turned on (0 ≤ t ≤ Da.Ts) and is clamped to the boost
output voltage (vo) when the switch is off (neglecting diode drop) (Da.Ts ≤ t ≤ Ts). Fig. shows

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the boost converter circuit when switch Sa is replaced by two series-connected switches S1 and
S2. For boost operation (Da interval), both switches need to be turned on at the same time. The
D a interval in Fig can be achieved by turning off either S1 or S2 or both in Fig, and the switch
node voltage vsn1 is equal to vo. If during this interval (D a), switches S1 and S2 are switched.
in a complementary manner, the switch node vsn2 can be used as a buck output with input
voltage equal to vo. The resulting circuit is shown in Fig, where inductor L2 and capacitor C2
form the low-pass filter. Thus, the proposed modification results in the boost converter and the
buck converter being integrated in a single topology. Hence, in this paper, this converter is
regarded as IDOC, and the behavioral characteristic of the converter is studied. The same set
of switches S1 and S2 are used to regulate both the outputs. The proposed circuit modification
principle can be extended to achieve multiple dc outputs by replacing the boost converter
control switch Sa with N-number of series-connected switches and filter networks. Fig. shows
the schematic of the multiple-output converter. This concept leads to the use of only (N + 1)
switches for N-outputs, compared with 2N switches when individual converters are used. A
similar circuit modification was proposed in [29] to generate hybrid (simultaneous dc and ac)
outputs from a boost converter.

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3. MATLAB Software Design

MATLAB Simulation model:

Duty ratio design for 33% and 66%

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Output and Input current waveform:

Output and Input Voltage waveform :

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4. Hardware Design

555 Timer Designs


In the 555 Oscillator circuit above, pin 2 and pin 6 are connected together allowing the
circuit to re-trigger itself on each and every cycle allowing it to operate as a free running
oscillator. During each cycle capacitor, C charges up through both timing
resistors, R1 and R2 but discharges itself only through resistor, R2 as the other side of R2 is
connected to the discharge terminal, pin 7.

Then the capacitor charges up to 2/3Vcc (the upper comparator limit) which is determined by
the 0.693(R1+R2)C combination and discharges itself down to 1/3Vcc (the lower comparator
limit) determined by the 0.693(R2*C) combination. This results in an output waveform whose
voltage level is approximately equal to Vcc – 1.5V and whose output “ON” and “OFF” time
periods are determined by the capacitor and resistors combinations. The individual times
required to complete one charge and discharge cycle of the output is therefore given as:

Astable 555 Oscillator Charge and Discharge Times

Where, R is in Ω and C in Farads.

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When connected as an astable multivibrator, the output from the 555 Oscillator will continue
indefinitely charging and discharging between 2/3Vcc and 1/3Vcc until the power supply is
removed. As with the monostable multivibrator these charge and discharge times and therefore
the frequency are independent on the supply voltage.
The duration of one full timing cycle is therefore equal to the sum of the two individual times
that the capacitor charges and discharges added together and is given as:

555 Oscillator Cycle Time

The output frequency of oscillations can be found by inverting the equation above for the total
cycle time giving a final equation for the output frequency of an Astable 555 Oscillator as:

555 Oscillator Frequency Equation

By altering the time constant of just one of the RC combinations, the Duty Cycle better known
as the “Mark-to-Space” ratio of the output waveform can be accurately set and is given as the
ratio of resistor R2 to resistor R1. The Duty Cycle for the 555 Oscillator, which is the ratio of
the “ON” time divided by the “OFF” time is given by:

555 Oscillator Duty Cycle

The duty cycle has no units as it is a ratio but can be expressed as a percentage ( % ). If both
timing resistors, R1 and R2 are equal in value, then the output duty cycle will be 2:1 that is,
66% ON time and 33% OFF time with respect to the period.
As the timing capacitor, C charges through resistors R1 and R2 but only discharges through
resistor R2 the output duty cycle can be varied between 50 and 100% by changing the value
of resistor R2. By decreasing the value of R2 the duty cycle increases towards 100% and by
increasing R2 the duty cycle reduces towards 50%. If resistor, R2 is very large relative to
resistor R1 the output frequency of the 555 astable circuit will determined by R2 x C only.
The problem with this basic astable 555 oscillator configuration is that the duty cycle, the “mark
to-space” ratio will never go below 50% as the presence of resistor R2 prevents this. In other
words we cannot make the outputs “ON” time shorter than the “OFF” time, as (R1 +
R2)C will always be greater than the value of R1 x C. One way to overcome this problem is
to connect a signal bypassing diode in parallel with resistor R2 as shown below.

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Power Circuit Design

The IDOC requires one less switch compared with two separate converters. This
reduction in the number of switches increases as the number of outputs increases. The equations
governing the design of passive components of the IDOC are dependent upon the allowable
ripple content of the state variables. The design equations are similar to those associated with
conventional buck and boost converters.

However, for the IDOC, both the switches and the diode should be rated for the step-
up output voltage (vo1). This is because the effective input voltage for the step-down output is
equal to the step-up output voltage. Since IDOC is a dual-output converter also having a step-
up output, the switches should be rated for the output voltage (vo1) as in a boost converter.
Moreover, compared with a buck converter, for the same ripple specifications, inductor L2
would have a higher value.

The switches S1 and S2 conduct higher current compared with conventional converters
because, in the IDOC, the input current magnitude is greater than conventional boost converter,
as shown in relation. The switch current stresses for each interval are shown in Table II. A
comparison of the proposed IDOC with conventional buck and boost converters is done in
Section V. A design example is presented in the following section with its experimental
validation shown in above figure

BUCK Mode design

(1 − 𝐷)𝑅
Lmin =
2𝑓
1−𝐷
C=
8𝐿(𝛿𝑉)𝑓 2

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BOOST Mode design

𝐷(1 − 𝐷)2 𝑅
Lmin =
2𝑓
𝐷
C=
𝑅(𝛿𝑉)𝑓

HARDWARE PARAMETERS

Power circuit Control circuit


Buck part Boost part 555 timer IC
Components value Components value Components value
L 27.2mH L 6.8mH R1 1kΩ
C 30µF C 20µF R2 2kΩ
R(load) 220Ω R(load) 220Ω R1’ 1.66kΩ
MOSFET IRF840 MOSFET IRF840 R2’ 1.66kΩ
DIODE 1N4007 DIODE 1N4007 C1 & C1’ 0.1µF
Optoisolator EL817 Optoisolator EL817 C2 0.01µF

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5. Conclusion
This paper has proposed a multiple-port dual output dc–dc converter topology with
simultaneous step-down and step-up outputs. In contrast to a conventional buck converter, the
proposed converter has continuous input and step-down output current. Analysis and
characterization of the different modes of operation of the converter is done. It has been
established that the analog control system design associated with conventional converters can
be extended to the IBBC. The merits of the converter with respect to shoot-through protection,
lesser Bill of Material, and wider output ranges have been discussed. The converter behavior
has been verified using an experimental prototype.

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6. References

1. A. Emadi, Y. J. Lee, and K. Rajashekara, “Power electronics and motor drives in


electric, hybrid electric, plug-in hybrid electric vehicles,” IEEE Trans. Ind. Electron.,
vol. 55, no. 6, pp. 2237–2245, Jun. 2008.
2. P. Shamsi and B. Fahimi, “Dynamic behavior of multiport power electronic interface
under source/load disturbances,” IEEE Trans. Ind. Electron., vol. 60, no. 10, pp.
4500–4511, Oct. 2013.
3. C. N. Onwuchekwa and A. Kwasinski, “A modified-time-sharing switching technique
for multiple-input DC–DC converters,” IEEE Trans. Power Electron., vol. 27, no. 11,
pp. 4492–4502, Nov. 2012.
4. R. Adda, O. Ray, S. Mishra, and A. Joshi, “Synchronous reference frame based
control of switched boost inverter for standalone DC nanogrid applications,” IEEE
Trans. Power Electron., vol. 28, no. 3, pp. 1219–1233, Mar. 2013.
5. A. V. Stankovic, L. Nerone, and P. Kulkarni, “Modified synchronousbuck converter
for a dimmable HID electronics ballast,” IEEE Trans. Ind. Electron., vol. 59, no. 4,
pp. 1815–1824, Apr. 2012.
6. H. Chen, Y. Zhang, and D. Ma, “A SIMO parallel-string driver IC for dimmable LED
backlighting with local bus voltage optimization and single time-shared regulation
loop,” IEEE Trans. Power Electron., vol. 27, no. 1, pp. 452–462, Jan. 2012.
7. J.-K. Kim, S.-W. Choi, C.-E. Kim, and G.-W. Moon, “A new standby structure using
multi-output full-bridge converter integrating flyback converter,” IEEE Trans. Ind.
Electron., vol. 58, no. 10, pp. 4763–4767, Oct. 2011.
8. Linear Technology, LTC 2-Cell, Multi-Output DC/DC Converter with USB Power
Manager, Milpitas, CA, USA. [Online]. Available: http://
www.linear.com/product/LTC3456
9. M. Rodriguez, G. Stahl, L. Corradini, and D. Maksimovic, “Smart DC power
management system based on software-configurable power modules,” IEEE Trans.
Power Electron., vol. 28, no. 4, pp. 1571–1586, Apr. 2013.
10. A. Emadi and M. Ehsani, “Multi-converter power electronic systems: Definition and
applications,” in Proc. IEEE PESC, 2001, vol. 2, pp. 1230–1236.

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