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EE309 Notes 07 PDF
EE309 Notes 07 PDF
EE309 Notes 07 PDF
In this lecture: As before, assume that the components are all ideal, and the JFET switches
with a period of T. The duty cycle is D=ton/T.
5.1. operation
Mode 1 – JFET switch closed
5.2. Input/output characteristic
Assume the capacitor is initially charged. When the switch is closed, it shorts
5.3. Edge jitter point A to ground: VA=0, the diode does not conduct and we get two loops.
iL L A iC
5.4. Design Example
vL
+
Vin vC Rload vout
C
5.1. Operation -
L A
+ +
Vin JFET Rload
C vout
- Switch
-
Taking
E out = E in gives
vout i L (T − t on ) = Vin i LT
therefore
If T is kept sufficiently short then the current ripple is acceptably small.
EE301 GB06 Page 5 EE301 GB06 Page 6
• Vin = 10 V, D = 0.75.
⎛ 10 ⎞
v out (nominal) = 10⎜ ⎟ = 40V
⎝ 2 .5 ⎠
⎛ 10 + 0.1 ⎞
v out (max.) = 10⎜ ⎟ = 42.1V
⎝ 2 .5 − 0 .1 ⎠
⎛ 10 − 0.1 ⎞
v out (min.) = 10⎜ ⎟ = 38.1V
⎝ 2.5 + 0.1 ⎠
EE301 GB06 Page 9 EE301 GB06 Page 10
Solution With an average output current of 0.4A, the maximum permissible ripple
(2%) is 0.4x0.02=8mA.
1. Duty ratio
To find a value of L that permits this, recall that while the switch is closed
Switching period: T = 1 / f = 15µs (mode 1),
diL ∆I
We need an output voltage of 15V from an input of 5V, thus the switch-off v L = Vi = L ≈L L
time toff is given by dt t on
T giving
v out = Vin
t OFF
t on
V L= Vi
⇒ t OFF = i T = 13 T = 5µs ∆i L
Vo
t on T − t off 10 Recall the maximum permissible current ripple is ∆i L max = 8 mA , so we
And D = = = = 66%
T T 15 require
EE301 GB06 Page 11 EE301 GB06 Page 12
ton 3. Output voltage ripple and the capacitor
L> Vi
∆iL max
In mode 1 (0<t<ton), the charged capacitor supplies energy to the load,
(15 − 5) × 10 −6 maintaining the output voltage (approximately). The capacitor discharges
> × 5 = 6.25 mH
8 × 10 −3 slightly, and its voltage falls by a small amount.
So a larger inductor can store more energy during ton, and guarantees a Assuming the current falls linearly allows us to write
smaller ripple current.
∆vC ∆v
iC ≈ C = C out
If the load current were smaller, then a 2% ripple tolerance would represent ∆t t ON
an even smaller ∆IL, demanding an even bigger inductor. In this way, the
smaller the demanded ripple, the bigger the required inductor. Rearranging gives
t ON
C = iC
∆v out
t ON 10 × 10 −6
C > iC = (0.4 ) = 80 µF
∆vout max 50 × 10 −3
We have now defined all the components we need, so just picking values that
satisfy these constraints, comfortably above their minima, gives us the
following circuit:
10 mH A
D = 66%
toff = 5µs +
Vin Rload vout
100 µF
C = 100µF - toff
=5µs
L = 10mH
In the next lecture we will see a D.C.- D.C. converter that is capable of
voltages smaller or bigger than the input voltage.
END OF LECTURE