Micro

Code Control Document

By Muhammad Niyamathullah Khan
Student Number: 7228968
Date: 03/24/2017
Ver. 1.1

Table of Contents
Micro Code Control Document ............................................................................................................................. 1
By Muhammad Niyamathullah Khan ................................................................................................................ 1
Student Number: 7228968 .................................................................................................................................... 1
Date: 03/24/2017 ..................................................................................................................................................... 1
Ver. 1.1 ............................................................................................................................................................................ 1
1.Introduction .............................................................................................................. 3
1.1 Design Objective .................................................................................................... 3
1.2 Block Diagram ........................................................................................................ 4
2. Specification & Requirement .................................................................................... 4
3. Implementation Method .......................................................................................... 5
3.1 Design Flow ............................................................................................................ 5
3.1.2 Implementation Required (Outcome) .................................................................. 8
3.2 Technical Questions and Answers .......................................................................... 8
3.2.1 To Do List. ........................................................................................................... 8
3.2.2 Answers TO DO list. ............................................................................................. 9
3.3 Verification and Validation (End to End Testing) ..................................................... 9
4. Resources and Reference. ...................................................................................... 10



1.Introduction

Control logic is a sequential circuit that has internal states that dictate the control
commands for the system. However there are two types of control logic viz.
hardwired and Micro programmed.
Hardwired control logic uses the sequential circuits directly; changes to the control
algorithm require changes to the circuits and give the fastest operation.
A Micro programmed control logic stores the control information in memory,
changes in the algorithm require only changes/flashing the memory.
This document outlines only the micro programmed control logic.

1.1 Design Objective

Implement the micro coded control logic where it requires integrating:
• Register File/Memory
• Arithmetic logic Unit
• Shifter
The integration of the above elements should be accessed in a sequential manner,
which is done by designing the microcode.
The microcode is designed by taking the following factors in account:
• Control Address Register (CAR)
• Control Word
• Status flags

1.2 Block Diagram

Fig. 1 Micro control logic Block diagram

2. Specification & Requirement

• Instantiate and connect together the blocks:
REGFILE
ALU
SHIFTER
• Connect the functions of all the blocks stated above into microcode fields.
• At the top level, connect the module will be as follows:
DATA_0[7:0] – LEDR [7:0]
DATA_I[7:0] – SW[7:0]
DEBUG [15:0] –HEX0 [6:0] to display Hexadecimal
CLK – KEY [0]

Fig. 2 Block Diagram: Integration of Blocks

3. Implementation Method

3.1 Design Flow

Referring to Figure 1 and Figure 2 above we can understand the following:
Integration of components REGFILE, ALU and SHIFTER can be called as the
processor unit.



Fig.2

è Processor Unit






Fig. 3 Processor Unit

So, from the above implementation it is understood that the processor unit is the
integration block, which is in the Fig. 1 referring to the micro control logic.

Basically we have to implement the Control Address Register (CAR), Control Word
and Status Flags.



Control Address Register: This is an 8-bit size register/signal, which tells the
Control Memory which address to go next.

Control Word: This is a 24-bit size value, which is defined as follows:


ASEL: (A) select register/signal --3bit
BSEL:(B) Select register/signal --3 bit
DSEL:(destination) register/signal --3 bit
MUX1: Multiplexer 1 register/signal --1 bit
MUX2: Multiplexer 2 register/signal --3 bit
HSEL: Shifter o/p select register/signal --3 bits
SSEL: ALU o/p select register/signal --4 bits
MISC: Miscellaneous register/signal --4 bits

Adding all this bits will make it 24 bits.

Status Bits: These are Zero (Z), Carry(C), Sign (S) and Overflow (V) bits.

3.1.1 Implemented functions (Availability)

The following files/functions are available already:
• REGFILE: This file is a Register bank for the final implementation of Central
Processing Unit. This file takes in input from the switches or taking input
from the last generated output. Once the input is stored in the register
bank/array, selecting the right combination of the ASEL or BSEL the register
 can be accessed and processed from the outputs A and B respectively.

Fig. 4 Register File

• ALU: The arithmetic Logical unit is a data processing station for the outputs
taken out from the REGFILE. This data processing station performs
arithmetic and logical operations for combinations of register stored in the
register bank. This is responsible for generating status flags/bits, which
results in its operations. The operations depend on the parameters given to
the function SSEL that performs logical operation i.e. AND, OR, XOR, NOR etc.
and arithmetic operations i.e. addition, subtraction, increment, decrement
etc.

Fig. 5 ALU block
 • Shifter: This block is responsible for taking the input from the output of the
ALU and performs shifting operations i.e. Arithmetic shift right/left , Rotate
left/right, Rotate with carry , load all zeros and no shift of the data.

Fig 6. Shifter block.


• Microcode: This is a file, which contains the Control word and Control
address register.

Fig 7. Microinstruction

Referring to Fig 7. The combination of all the registers arranged in this particular
method gives us the 32 bit long Control Word and Control Address Register. These
sequential instructions such as the above form the Micro-Code, which will define the
functioning of the CPU.

3.1.2 Implementation Required (Outcome)

• Implementation of processor unit as described in Fig. 3.
• Implementation of Control logic and processor unit as described in Fig. 1

3.2 Technical Questions and Answers

3.2.1 To Do List.
1 MUX1 and MUX2 logic to update the CAR for every clock cycle.
2 Linking REGFILE, ALU and Shifter to make it the processor unit.
3 Precedence of Carry from Shifter and ALU.
4 Conflict in Register size as CPU defines it as 8 bits and all other files (REGFILE,
ALU, SHIFTER) are defined as 4 bits.
5 Use of signal doesn’t hold the data for registers such as CAR, A, B etc.
6 Generating the microcode.vhdl file for test cases.
7 Given the HEX displays are limited, how to maximize and show more debug
sections.

3.2.2 Answers TO DO list.

1 Since MUX1 decides the address of the CAR to be internal or external we can
define it as a condition to branch out. MUX2 decides where the CAR has to
branch based on the status bits and data it receives from the control memory,
this implementation can be realised as a condition or case statements.
2 First an entity or component of all the files should be instantiated in the CPU file.
Port mapping should be done, as required and corresponding signals should be
declared.
3 Precedence of carry should be selected for the Shifter rather the ALU because the
shifter generates the carry for the MUX2, which decides the update of the CAR
and not the ALU.
4 To combat this conflict we have to update all files to hold 8 bits for the registers
used in the microprocessor
5 Since VHDL generates the program in a concurrent method if a signal is
processed twice in a program gets corrupted or doesn’t update itself, So it
recommend to use variable/register to hold data for these registers rather than
signal.
6 Editing the microcode.asm file where user defined microinstructions can be
written and checked for each test case. A long micro-code can be made such that
all test cases can be incorporated.
7 One 7-segment display can be used to show two functions if a push button is
used. For example if you want to show what is the value of HSEL and FSEL on the
same 7 segment display, you can choose one function as default and display and
the other should be displayed when the push button is pressed (active low).

3.3 Verification and Validation (End to End Testing)

1 Develop logic for the MUX1 and MUX2 and set the CAR output on the Debug.
2 Make a test Microcode such as -/-/-/-/-/-/NEXT/-/- to check if the CAR is going
to the next address.
3 Link the Register File to the CPU to check if input data is showing is displayed on
the register.
4 Link the ALU to the CPU to check if the Input data can be transferred and
evaluated using arithmetic and logical operations.
5 Link the Shifter to the CPU to check if the data can be rotated and shifted.
6 Once all these checks are performed. Make a test Micro-code to check all above
conditions and to verify if the timing is right.

4. Resources and Reference.

1. Computer Engineering Hardware and Design by M Morris Mano, Prentice Hall.
ISBN: 0-13-162926-3.
2. Stackoverflow.com