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BLRF cd920 A3 C L3 V11
BLRF cd920 A3 C L3 V11
BLRF cd920 A3 C L3 V11
GSM ( CH 62 )
4
Q412
6
2
RX_EN RX275
Osc.
discrete
LOCAL
OSCILLATOR
41
GIFSYN Power Step:
04-11 - 50mVpp
Signal from the SMOC to the PAC
When this signal is low, the internal gain in the PAC is unity.
Loss from 430 MHz PLL DET_SW 12-15 - 900mVpp
circuty When this signal is high, the internal gain in the PAC is 1.
Antenna and EXT ANT 947,4 MHz
42
GSM -1.7dB B GSM 9,8dB
C
DCS -2.1dB GSM -0,6dB Q411 Q460 DCS 9,8dB GSM 10dB From uP to PAC.
FL400 FL461 TX_KEY
DCS -1,0dB 215 MHz DCS 10dB 46 2,75Vpp
This is a timing signal to the PAC to provide the current path for the initial loop precharge
7 GSM -2,2dB
C B C k 31 ATT.
RXI
5 GSM 12,8dB GSM -2,2dB 47
U401
DCS 9,3dB DCS -2,2dB
B C FL480 Q480 25dB DEMODULATION IQ REF to SMOC
Power Step:
DCS -2,2dB 48 Signal from SMOC to PAC.
4 B B C RXQ 04 - 520mVpp
C GSM -4,5dB AOC 15 - 280mVpp This is a linear control voltage for ramp up and ramp down of the PA output level.
2 Q430 SW_VCC 33
V1 V2 FL401 FL462 DCS -4,5dB This controls the voltage on the exciter control output (EXC) from the PAC.
SWITCH
EXT ANT j 12
6 3 c 16 VRef
Signal from uP but inverted via Q500 and used to time:-
SW_RF 1842,8 MHz b
from and to C B 1. GIF SYN 2. TIC 3. Tx VCO 4. PAC 5. RF Switch
3 2 RX_EN MDM_ANA_VCC Q221 13 TX_EN 3Vpp
J600 Pin2 DCS ( CH 700 ) GSM ( CH 62) DCS ( CH 700 ) to SMOCand 13 MHZ Clock Enables Tx Path when high
V1 V2
U401
U403 732,4 MHz h i 1627,8 MHz B+
E
17
E RF_START Signal from uP inverted via Q504.
SWITCH f 51
Logig_GSM_*DCS a RX275 Q222 DM_CS 2,8Vpp Enables TIC, PA and TX VCO.
18
8 CONTROL C B
g 19 When high, this enables Tx path.
Logig_*GSM_DCS
1 4 5 6
FILTER
SUPER
1 3 From SMOC IC to GIF SYN
TXI 2.1Vpp
RX_EN
TX_EN
MAIN VCO This signal is the in-phase input to the I-Q Modulator of the GIF SYN.
RX275
HarmonicAmpl.
a d c e C C
C212 732,4 MHz 813,9 MHz
DCS 23 57 AFC
C Q201
Q200 PLL Y702
GSM ( CH 62 ) C B Q202 B
902,4 MHz C
C213
LOOP FILTER
CR221
Modem Callprocessor Interface
GSM
Q206 C214
C B GSM 1,5V - 2,5V From uP to SMOC.
CR203 CR 202 2,8Vpp
DCS ( CH 700 ) DCS 1,5V - 3,0V MDM_RD 500us/cm This signal indicates when the uP is reading data from the SMOC. High when enabled.
1747,8 MHz
*GSM_DCS
2,8Vpp From uP to SMOC.
GSM / DCS 52 RF_SPI MDM_WR 500us/cm This signal indicates when the uP is writing data to the SMOC. High when enabled.
R275 SPI SERIAL
GSM -0.4dB DCS 1,8 - 2,1V DATA BUS 53 RF_SCK
DCS -0.5dB INTERFACE
Output
FL301
GSM -17dB GSM 21dB GSM 8,7dB C TX VCO 14 1
Rx SIGNALS - In Standby Mode
DCS 17dB DCS 12dB GSM -5dB DCS
DCS -13dB B 7
CR303 DCS -5dB
C
Q350 U370 / TIC DM_CS
R475V From uP to SMOC
11, 22, 44 This is an interrupt from the uP to the SMOC. When high this indicates to the SMOC the
R337 VR353 PHASE 9,10 2,8Vpp
FL301 U301 Q330 Q331 Attenuator
GSM
C
8 CHARGE
PUMP4 DET. R475 RX_ACQ 500us/cm beginning of the receive burst.
B 2 ,12 61
Q351
PA GSM 2,5dB
DCS 6,0dB
C 4 R275 62
TXQ_P
TXQ_M 2,8Vpp
From uP to GIF SYN
Signal to drive the GIFSYN IC. This is a pulsed signal which controls the sending of SPI data
Q305
Q362 VR354 MODULATION 63 from SMOC RF_START
Q306 4 TXI_P 20us/cm
to the GIFSYN for all RF functions.
64
GSM 170 MHz TXI_M
FLTR_-10V 4
EXC 6 2
DM_CS
DCS 120 MHz
Osc.
6 Rx SIGNALS - 110062#, 262000#, 25013#, 241#
U340 / PAC 7 Q309 discrete 7 PLL Frequency 217Hz - 1ms/cm
3 1
f circuty RX SIGNAL PATH
RF_IN Logig_GSM_*DCS TX From GIF Syn to SMOC IC.
DET g LOCAL
TX SIGNAL PATH RXI
1.8Vpp
500us/cm This is a baseband analogue signal to A/D convertors of SMOC
2 Logig_*GSM_DCS
CR223 CR 261 OSCILLATOR
PAC_EN
1, 3 GSM 340 MHz MAIN VCO SIGNAL PATH
SAT. GSM_*DCS
DCS 240 MHz RXQ 1.8Vpp
From GIF Syn to SMOC IC.
4, 14 C271 500us/cm This is a baseband analogue signal to A/D convertors of SMOC
10
10 12 8 11 TUNING VOLTAGES
SAT_DET
RF LAYER - ORDERABLE SPARES TEST COMMANDS RECEIVE DEBUG - GSM MODE TRANSMIT DEBUG
Part Part Part Part Part Part a MDM_ANA_VCC______, c -10V ______and
# press 2 sec. Enter Manual Test Mode with Test Card Before actually removing any cans it may be worth checking the RX275_____, b RX_EN______, e Put the phone into test mode and key in the commands: 110062#, 1200#, 310#
Designator Description Number Designator Description Number Firstly if no Transmiter output we should check the modulation output at U220 Pin 4 and the Main VCO
01 # Exit Manual Test Mode f is high to switch the output of Q412 Pin6 and Q205 Pin4 to high.
if the Logig_GSM_*DCS______
A1 Antenna Connector 3909155T01 Q350-351 TX VCO Transistor 4809940E01 j h i establish which of the signals are missing or if both the signals are missing.
at point _________to
07 # Mute Rx Audio Path TEST MODE: Type in Key commands: 110062#, 262000#, 25013#, 241#. Test for a set level eg. (-30dB’s) at point ______to compensate cable losses.
CR202 Main VCO Varactor 4809641F02 Q411 Receive Power Transistor 4809527E24 08 # Unmute Rx Audio Path k (pin 31of GIF).
- If the modulation output is missing and Main VCO is fine then remove SH03 and check in the TX Local Oscillator
The only real short-cut we can take is by probing the 215MHz test point_______ the CR212 and the tuning voltage from U220 Pin10. Check if Q222 and Q221 have both 2.7V.
CR203 Main VCO Diode 4809948D10 Q412 GSM / DCS Switch 4809939C07 09 # Mute Tx Audio Path
- If the 215 is OK then we can assume problem lies around GIF, either 430MHz Local Oscillator or in generation of RXI and RXQ. The can If still no problems found, measure from CPU DM_CS at SMOC Pin2. If ok replace U220.
10 # Unmute Tx Audio Path SH03 should then be removed. Check that IQ Ref from the SMOC is around 1.38Vdc and then the RXI and Q outputs from the GIF to check which is
CR220 RX Local Osc.Varactor 4809641F02 Q430 Receive Power Transistor 4809527E32 - -If Main VCO is missing but modulation is fine remove SH07 and check discretes, SF_VCC U220 Pin23 and
11 xxxx # Program Main Local Osc. to Channel faulty.
Main VCO tuning voltage U220 Pin21.
CR221 Master Xtal Varactor 4809641F04 Q460 Receive Mixer Transistor 4809527E20 - If the 215Mhz is low probe the R.F inputs to the Mixer to see which RF path (RF INPUT or MAIN VCO) the fault lies on.
12 xx # Set Tx Power level to fixed valure
- If Main VCO is low, the main suspicions are with the main VCO, or the VCO filter (FL461/462) and the SH07can should be removed. - If bothMain VCO and modulation are missing then check the collectors of Q221 and Q222 for 2.7V. If ok, then
CR223 Tx Local Osc. Diode 4809948D05 Q480 IF Isolation Aplifier 4809940E01 19 # Display SW Version Number of Call Processor check from CPU DM_CS at SMOC Pin2. Possible GIF SYN or SMOC problem.
. If the input to the filter is low, then there is some discretes under the VCO can. Check SF_VCC U220 Pin23 and Main VCO tuning voltage U220 Pin21.
CR261 Tx Local Osc. Varactor 4809641F02 U220 GIFSYN IC 5109632D92 20 # Display SW Version Number of Modem - If RF INPUT, and the MAIN VCO OK, the main suspicions are with the 2 input filters FL400 and FL401 and the can SH01 should be removed. - If TX is generated but is low then we look for problems under SH02 and SH09 and follow path through to antenna.
22 # Display SW Version Number of Speech Coder If the signal is low at the input to these, it could be losses caused by the Antenna Switch U401.
CR303 TX Exciter Diode 4809948D10 U401 Antenna Switch IC 5109572E04 k then we must also remove can SH08. The SAW filter (FL480) - If TX looks OK but fails in wingate check at the T/R switching circuitry (U401/U403) switching RF to J600 Pin2
- If 947.4 and 794.4 RF values are fine but 215MHz into GIF is low_____
25 # Set Continuous AGC and the J600 connector itself.
FL301 1st Rx Filter 9109193T05 U403 Switch Control 5109923D14 and IF Isolation AMP (Q480) is located under here.
26xxxx # Set Continuous AFC
FL400 2nd Rx Filter 9109144M01 U301 PA Dual FET IC 4809527E31 31x # Initiate Pseudo-Random Sequence with Midamble
FL401
FL480
VCO Filter
IF Saw Filter
9109111C08
9109035M01
U370
U340
TIC IC
PAC IC
5109879E12
5109632D91
33xxxx #
36 #
Synchronize to BCH Carrier
Initiate Acoustic Loopback
FREQUENCIES GSM / DCS
FL461 RX GSM Injection Filter 9109157M01 VR353 TX VCO Varactor 4809877C06 37 #
45xxxx #
Stop Test
Serving Cell Power Level
GSM / CHANNEL Tx Rx MAIN VCO Rx I.F Rx IF LO Tx I.F Tx IF LO REVISIONS
FL462 RX DCS Injection Filter 9109429J04 VR354 TX VCO Variator 4809877C04 1-Low 890.2 935.2 782.2 215 430 170 340 Europe Middle East & Africa Customer Services 13.04.99
46 # Display Current Valure od AFC DAC
LEVEL 3 COLOUR DIAGRAMS Rev. 1.1
Q200 Main VCO Transistor 4809527E30 SH1 Shield Low Noise Ampl. 2609474M01 47x # Set Audio Volume 62-Middle 902.4 947.4 794.4 215 430 170 340
Dual band ZAP
Q201-202 Main VCO Transistor 4809527E24 SH2 Shield PA 2609475M01 58 / xxxxxx # Display / Modify Security Code
124-High 914.8 959.8 806.8 215 430 170 340 Colin Jack, Michael Hansen, Billy Jenkins Page 2 of 2
Q205 GSM / DCS Switch 4809939C07 SH3 Shield GIFSYN 2609476M01 59 / xxx # Display / Modify Lock Code
60 # Display IMEI DCS / CHANNEL Tx Rx MAIN VCO Rx I.F Rx IF LO Tx I.F Tx IF LO
Q221-222 Supply Transistor 4809579E18 SH4 Shiel Exiter 2609477M01
7100 # Display Error Code
Q305-306 PAC Transistor 4809939C06 SH5-SH7 Shield VCO TIC 2609480M01 512-Low 1710 1805 1590 215 430 120 240
Q309 GSM / DCS Switch 4809939C07 SH8 Shield Mixer Iso Ampl. 2609478M01
700-Middle 1747,8 1842,8 1627,8 215 430 120 240
Q330 TX Buffer 4809527E26 SH9 Shield Rf Switch 2609479M01
885-High 1785 1880 1665 215 430 120 240
Q331 TX Predriver 4809527E24
DWNLINK_AUD
to BIC
ON_OFF_SENSE
SP_INT
Processing
U702
UPLINK_AUD
BATT_SENSE
to SMOC From CPU (U701) to Eprom.
AD_THERM
RF_START Chip uBGA 2.8Vpp
Time
ROM1_CS DUAL_CS
Unit
1. Chip Enable controlling read/write access to and from Eprom (U702).
B+_SENSE
to GIFSYN to U704 100ns / cm
DACOUT
RX_ACQ
to SMOC Select RAM1_CS
DM_CS to U702
to TIC ....
Call Processor
to PAC / SMOC
TX_KEY RAM2_CS
to U702
EEPROM RAM1_CS 2.8Vpp
From CPU (U701) to SRAM.
100ns / cm 1. Chip Enable controlling read/write access to and from 1st half of SRAM (U704).
BATT_CNTL U705
U701
BGA
VA_SPI_SCK
VA_CS RESET
GND From CPU (U701) to SRAM.
1, 3,10,15 RAM2_CS 2.8Vpp
to SMOC VA_SPI_MI 100ns / cm 1. Chip Enable controlling read/write access to and from 2nd half of SRAM (U704).
FLASH MAN_TEST
VA_SPI_MO 5
ADDRESSS / DATA BUS U704
SPI_RFCS External uBGA From CPU (U701) to Eprom.
Queued SCI_TX ROM1_CS 2.8Vpp
SPI_MOSI Bus 100ns / cm 1. Chip Enable controlling read/write access to and from Eprom (U702).
SPI_MISO Serial
Interface
SPI_CLK Module
start up or 2.8Vpp From CPU (U701) to display, via connector J101.
MDM_RD AUDIO_IN DP_EN 100ns / cm 1. Processor selects to enable display. When high, the display is enabled and low disabled.
press key
MDM_WR 8
BATTERY L_BATT+ start up or Speech Coder Interface. This is a signal from uP (U701) to Speech Coder (U801).
U709 SC_INT press key 2.8Vpp
ADDRESSS / DATA BUS
1) This is a 20ms timing signal from U701 which times the decoding and encoding function of the Speech Coder
ADDRESSS / DATA BUS
2ns / cm U801.
THERM J610, 1
13MHz CLOCK
from CPU
DATA J613, 1 BATT_CNTL From BIC to uP.
BATT_FDBAK 2.8Vpp
Parts of Q602 4 MF_INT
1ms / cm This signal periodically interrupts the uP at 217Hz. During Power Saving mode this signal is set
to DC.
Backhousing L_BATT+ J611, 1
CR605
EXT_B+
DWNLINK_AUD
Assembly 14 Regulator Output from CLA 4.4V From BIC to uP. This signal interrupts the uP for a number of reasons.
Q601 R602
UPLINK_AUD
AUDIO_OUT 50us / cm
9 3. SIM Functions
4. DSC Bus Status Indicators
SP_INT
FS_AUD
RESET
2.8Vpp From butt plug (J600) to BIC chip (J600).. This is a comms link from an external peripherale and the phone,
14 47 46 29 17 15 16 UPLINK 10us / cm and could be either data information or speech information. It is also used to sense the presence of a DHFA and
the ignition status of the DHFA with DC levels
CHARGER
RESET 18 MOBPORTB
30
RX_ACQ 65 62 47 98 56 64 63
J802 MIC From BIC chip (U703) to butt plug (J600).. This is a comms link from an external peripherale and the phone,
20 12 13 DOWNLINK
5Vpp and could be either data information or speech information. It is also used to sense the presence of a DHFA and
CPU 2 10us / cm the ignition status of the DHFA with DC levels
10 9 1
TX_KEY Tone - From GIF Syn to BIC IC - 13MHz clock..
16
Generator CLK_13_IN 1.6Vpp This is the master clock reference required for the radio
- - 20
SPEAKER
21 50ns / cm
+
MDM_RD Audio 45
MDM_WR
4 Filter -1 + 19
DM_CS
100
A/D Buffer
49 RX_AUD 6 - - 5 Measured in test mode
Processing
ALERT
2 +
Signal
TXI_M
GCAP SW 11 VRef It is a timing signal and runs at 512KHz, and times the transfer of speech information on the DSC
40 PLL U500 23 RXI 39 37
REFERENCE CLOCK Bus between BIC and SMOC.
IQ REF
AOC
39 Transmit SMOC IC 21
22 RXQ VA_SPI_SCK
VSWITCH 5.6V
DET_SW Power Orderable Part
SAT_DET
14 Control BGA AUX_MIC 7
5 VA_CS
VA_SPI_MI
to Call Processor L901 VSWITCH
2.8Vpp
This signal is from the BIC to the SMOC
15 D/A FS_AUD It is a timing signal at 8KHz and provides for frame synchronisation during speech transfer on
46 U982 6 VA_SPI_MO 5us / cm
20 Boost Mode Circuitry CR910 Non - Orderable Part the DSC bus.
J803 Connector Speaker 0909888M04 SH11 Shield Call Processor 2609482M01 26xxxx # Set Continuous AFC
31x # Initiate Pseudo-Random Sequence with Midamble
J900
LS802
SIM Connector
Speaker
3909426M01
5009076E12
SH12
SH13
Shield GCAP
Shield SMOC
2609481M01
2609483M01
33xxxx #
36 #
Synchronize to BCH Carrier
Initiate Acoustic Loopback
REVISIONS
Europe Middle East & Africa Customer Services 13.04.99
Mic Microphone 5009536H15 SH14 Shield BIC / EEPROM 2609484M01 37 # Stop Test
LEVEL 3 COLOUR DIAGRAMS Rev. 1.1
Q501 Transistor TX_EN 4809607E05 45xxxx # Serving Cell Power Level
Dual Band ZAP
46 # Display Current Valure od AFC DAC
Colin Jack, Michael Hansen, Billy Jenkins Page 1 of 2
47x # Set Audio Volume
58 / xxxxxx # Display / Modify Security Code
59 / xxx # Display / Modify Lock Code
60 # Display IMEI
7100 # Display Error Code