LT1124/LT1125

Dual/Quad Low Noise,

High Speed Precision Op Amps
U
FEATURES DESCRIPTIO
■ 100% Tested Low Voltage Noise: 2.7nV/√Hz Typ The LT®1124 dual and LT1125 quad are high performance
4.2nV/√Hz Max op amps that offer higher gain, slew rate and bandwidth
■ Slew Rate: 4.5V/µs Typ than the industry standard OP-27 and competing OP-270/
■ Gain Bandwidth Product: 12.5MHz Typ OP-470 op amps. In addition, the LT1124/LT1125 have
■ Offset Voltage, Prime Grade: 70µV Max lower IB and IOS than the OP-27; lower VOS and noise
Low Grade: 100µV Max than the OP-270/OP-470.
■ High Voltage Gain: 5 Million Min
■
In the design, processing and testing of the device, par-
Supply Current Per Amplifier: 2.75mA Max
■
ticular attention has been paid to the optimization of the
Common Mode Rejection: 112dB Min
■ Power Supply Rejection: 116dB Min entire distribution of several key parameters. Slew rate,
■
gain bandwidth and 1kHz noise are 100% tested for each
Available in 8-Pin SO Package
individual amplifier. Consequently, the specifications of
U even the lowest cost grades (the LT1124C and the
APPLICATIO S LT1125C) have been spectacularly improved compared
■ Two and Three Op Amp Instrumentation Amplifiers to equivalent grades of competing amplifiers.
■ Low Noise Signal Processing
■ Active Filters Power consumption of the LT1124 is one half of two
■ Microvolt Accuracy Threshold Detection OP-27s. Low power and high performance in an 8-pin SO
■ Strain Gauge Amplifiers package make the LT1124 a first choice for surface mounted
■ Direct Coupled Audio Gain Stages systems and where board space is restricted.
■ Tape Head Preamplifiers For a decompensated version of these devices, with three
■ Infrared Detectors times higher slew rate and bandwidth, please see the
, LTC and LT are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
LT1126/LT1127 data sheet.
Protected by U.S. Patents including 4775884, 4837496.

U
TYPICAL APPLICATIO
Instrumentation Amplifier with Shield Driver

3
+ Input Offset Voltage Distribution
1/4 1 1k 30k (All Packages, LT1124 and LT1125)
LT1125
2
– RF
3.4k 15V VS = ± 15V 758 DUALS
TA = 25°C 200 QUADS
30
5 4 2316 UNITS
GUARD + TESTED
RG
1/4 7
PERCENT OF UNITS

100Ω OUTPUT
10 LT1125
+ 6
+ 8 1/4
– 11 20
INPUT RG 30k
– LT1125 100Ω
9 –15V
–
10
GUARD GAIN = 30 (1 + RF/RG) ≈ 1000
POWER BW = 170kHz
SMALL-SIGNAL BW = 400kHz
13 RF NOISE = 3.8µV/√Hz AT OUTPUT
– 3.4k VOS = 35µV 0
1/4 14 –100 – 60 – 20 20 60 100
LT1125 INPUT OFFSET VOLTAGE (µV)
12 1k
+ 1124/25 TA02
1124/25 TA01

11245fb

1
LT1124/LT1125
W W W U
ABSOLUTE AXI U RATI GS (Note 1)
Supply Voltage ..................................................... ±22V Operating Temperature Range
Input Voltages ......................... Equal to Supply Voltage LT1124AC/LT1124C
Output Short-Circuit Duration ......................... Indefinite LT1125AC/LT1125C (Note 10) .......... – 40°C to 85°C
Differential Input Current (Note 6) ..................... ±25mA LT1124AI/LT1124I ............................ – 40°C to 85°C
Lead Temperature (Soldering, 10 sec)................. 300°C LT1124AM/LT1124M
Storage Temperature Range ................ – 65°C to 150°C LT1125AM/LT1125M OBSOLETE .... – 55°C to 125°C

U W U
PACKAGE/ORDER I FOR ATIO
TOP VIEW
TOP VIEW
ORDER PART ORDER PART
V+
NUMBER OUT A 1 8
NUMBER
+IN A 1 8 –IN A –IN A 2 7 OUT B
A
V– 2 A 7 OUT A LT1124CS8 +IN A 3 6 –IN B LT1124ACN8
B
+IN B 3 6 V + LT1124AIS8 V –
4 5 +IN B LT1124CN8
B
–IN B 4 5 OUT B LT1124IS8 N8 PACKAGE
8-LEAD PDIP
S8 PACKAGE S8 PART MARKING TJMAX = 140°C, θJA = 130°C/W
8-LEAD PLASTIC SO
J8 PACKAGE
TJMAX = 140°C, θJA = 190°C/W 1124 8-LEAD CERAMIC DIP
LT1124CJ8
NOTE: THIS PIN CONFIGURATION DIFFERS FROM THE 1124AI TJMAX = 160°C, θJA = 100°C/W LT1124AMJ8
8-PIN PDIP CONFIGURATION. INSTEAD, IT FOLLOWS
THE INDUSTRY STANDARD LT1013DS8 SO PACKAGE 1124I OBSOLETE PACKAGE LT1124MJ8
PIN LOCATIONS Consider the N8 for Alternative Source

TOP VIEW
LT1125CSW TOP VIEW LT1125ACN
OUT A 1 16 OUT D
–IN A 2 15 –IN D
OUT A 1 14 OUT D LT1125CN
A D –IN A 2 13 –IN D
+IN A 3 14 +IN D A D
+IN A 3 12 +IN D
V+ 4 13 V –
V+ 4 11 V –
+IN B 5 12 +IN C
B C +IN B 5 10 +IN C
–IN B 6 11 –IN C B C
–IN B 6 9 –IN C
OUT B 7 10 OUT C
OUT B 7 8 OUT C
NC 8 9 NC
N PACKAGE
SW PACKAGE 14-LEAD PDIP
16-LEAD PLASTIC SO WIDE TJMAX = 140°C, θJA = 110°C/W (N)
TJMAX = 140°C, θJA = 130°C/W
J PACKAGE
14-LEAD CERAMIC DIP
LT1125CJ
TJMAX = 160°C, θJA = 80°C/W LT1125AMJ
OBSOLETE PACKAGE LT1125MJ
Consider the N for Alternative Source

Order Options Tape and Reel: Add #TR

Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF
Lead Free Part Marking: http://www.linear.com/leadfree/

Consult LTC Marketing for parts specified with wider operating temperature ranges.

11245fb

2
 LT1124/LT1125
ELECTRICAL CHARACTERISTICS TA = 25°C, VS = ±15V, unless otherwise noted.
LT1124AC/AI/AM LT1124C/I/M
LT1125AC/AM LT1125C/M
SYMBOL PARAMETER CONDITIONS (Note 2) MIN TYP MAX MIN TYP MAX UNITS
VOS Input Offset Voltage LT1124 20 70 25 100 µV
LT1125 25 90 30 140 µV
∆VOS Long-Term Input Offset 0.3 0.3 µV/Mo
∆Time Voltage Stability
IOS Input Offset Current LT1124 5 15 6 20 nA
LT1125 6 20 7 30 nA
IB Input Bias Current ±7 ±20 ±8 ±30 nA
en Input Noise Voltage 0.1Hz to 10Hz (Notes 8, 9) 70 200 70 nVP-P
Input Noise Voltage Density fO = 10Hz (Note 5) 3.0 5.5 3.0 5.5 nV/√Hz
fO = 1000Hz (Note 3) 2.7 4.2 2.7 4.2 nV/√Hz
in Input Noise Current Density fO = 10Hz 1.3 1.3 pA/√Hz
fO = 1000Hz 0.3 0.3 pA/√Hz
VCM Input Voltage Range ±12 ±12.8 ±12 ±12.8 V
CMRR Common Mode Rejection Ratio VCM = ±12V 112 126 106 124 dB
PSRR Power Supply Rejection Ratio VS = ±4V to ±18V 116 126 110 124 dB
AVOL Large-Signal Voltage Gain RL ≥ 10k, VOUT = ±10V 5 17 3.0 15 V/µV
RL ≥ 2k, VOUT = ±10V 2 4 1.5 3 V/µV
VOUT Maximum Output Voltage Swing RL ≥ 2k ±13 ±13.8 ±12.5 ±13.8 V
SR Slew Rate RL ≥ 2k (Notes 3, 7) 3 4.5 2.7 4.5 V/µs
GBW Gain Bandwidth Product fO = 100kHz (Note 3) 9 12.5 8 12.5 MHz
ZO Open-Loop Output Resistance VOUT = 0, IOUT = 0 75 75 Ω
IS Supply Current per Amplifier 2.3 2.75 2.3 2.75 mA
Channel Separation f ≤ 10Hz (Note 9) 134 150 130 150 dB
VOUT = ±10V, RL = 2k

The ● denotes the specifications which apply over the –55°C ≤ TA ≤ 125°C temperature range, VS = ±15V, unless otherwise noted.
LT1124AM LT1124M
LT1125AM LT1125M
SYMBOL PARAMETER CONDITIONS (Note 2) MIN TYP MAX MIN TYP MAX UNITS
VOS Input Offset Voltage LT1124 ● 50 170 60 250 µV
LT1125 ● 55 190 70 290 µV
∆VOS Average Input Offset (Note 5) ● 0.3 1.0 0.4 1.5 µV/°C
∆Temp Voltage Drift
IOS Input Offset Current LT1124 ● 18 45 20 60 nA
LT1125 ● 18 55 20 70 nA
IB Input Bias Current ● ±18 ±55 ±20 ±70 nA
VCM Input Voltage Range ● ±11.3 ±12 ±11.3 ±12 V
CMRR Common Mode Rejection Ratio VCM = ±11.3V ● 106 122 100 120 dB
PSRR Power Supply Rejection Ratio VS = ±4V to ±18V ● 110 122 104 120 dB
AVOL Large-Signal Voltage Gain RL ≥ 10k, VOUT = ±10V ● 3 10 2.0 10 V/µV
RL ≥ 2k, VOUT = ±10V ● 1 3 0.7 2 V/µV
VOUT Maximum Output Voltage Swing RL ≥ 2k ● ±12.5 ±13.6 ±12 ±13.6 V
SR Slew Rate RL ≥ 2k (Notes 3, 7) ● 2.3 3.8 2 3.8 V/µs
IS Supply Current per Amplifier ● 2.5 3.25 2.5 3.25 mA
11245fb

3
LT1124/LT1125
ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the 0°C ≤ TA ≤ 70°C
temperature range, VS = ±15V, unless otherwise noted.
LT1124AC LT1124C
LT1125AC LT1125C
SYMBOL PARAMETER CONDITIONS (Note 2) MIN TYP MAX MIN TYP MAX UNITS
VOS Input Offset Voltage LT1124 ● 35 120 45 170 µV
LT1125 ● 40 140 50 210 µV
∆VOS Average Input Offset (Note 5) ● 0.3 1 0.4 1.5 µV/°C
∆Temp Voltage Drift
IOS Input Offset Current LT1124 ● 6 25 7 35 nA
LT1125 ● 7 35 8 45 nA
IB Input Bias Current ● ±8 ±35 ±9 ±45 nA
VCM Input Voltage Range ● ±11.5 ±12.4 ±11.5 ±12.4 V
CMRR Common Mode Rejection Ratio VCM = ±11.5V ● 109 125 102 122 dB
PSRR Power Supply Rejection Ratio VS = ±4V to ±18V ● 112 125 107 122 dB
AVOL Large-Signal Voltage Gain RL ≥ 10k, VOUT = ±10V ● 4.0 15 2.5 14 V/µV
RL ≥ 2k, VOUT = ±10V ● 1.5 3.5 1.0 2.5 V/µV
VOUT Maximum Output Voltage Swing RL ≥ 2k ● ±12.5 ±13.7 ±12 ±13.7 V
SR Slew Rate RL ≥ 2k (Notes 3, 7) ● 2.6 4 2.4 4 V/µs
IS Supply Current per Amplifier ● 2.4 3 2.4 3 mA

The ● denotes the specifications which apply over the –40°C ≤ TA ≤ 85°C temperature range, VS = ±15V,
unless otherwise noted. (Note 10)
LT1124AC/AI LT1124C/I
LT1125AC LT1125C
SYMBOL PARAMETER CONDITIONS (Note 2) MIN TYP MAX MIN TYP MAX UNITS
VOS Input Offset Voltage LT1124 ● 40 140 50 200 µV
LT1125 ● 45 160 55 240 µV
∆VOS Average Input Offset (Note 5) ● 0.3 1 0.4 1.5 µV/°C
∆Temp Voltage Drift
IOS Input Offset Current LT1124 ● 15 40 17 55 nA
LT1125 ● 15 50 17 65 nA
IB Input Bias Current ● ±15 ±50 ±17 ±65 nA
VCM Input Voltage Range ● ±11.4 ±12.2 ±11.4 ±12.2 V
CMRR Common Mode Rejection Ratio VCM = ±11.4V ● 107 124 101 121 dB
PSRR Power Supply Rejection Ratio VS = ±4V to ±18V ● 111 124 106 121 dB
AVOL Large-Signal Voltage Gain RL ≥ 10k, VOUT = ±10V ● 3.5 12 2.2 12 V/µV
RL ≥ 2k, VOUT = ±10V ● 1.2 3.2 0.8 2.3 V/µV
VOUT Maximum Output Voltage Swing RL ≥ 2k ● ±12.5 ±13.6 ±12 ±13.6 V
SR Slew Rate RL ≥ 2k (Notes 3, 7) ● 2.4 3.9 2.1 3.9 V/µs
IS Supply Current per Amplifier ● 2.4 3.25 2.4 3.25 mA
Note 1: Absolute Maximum Ratings are those values beyond which the life Note 7: Slew rate is measured in AV = –1; input signal is ±7.5V, output
of a device may be impaired. measured at ±2.5V.
Note 2: Typical parameters are defined as the 60% yield of parameter Note 8: 0.1Hz to 10Hz noise can be inferred from the 10Hz noise voltage
distributions of individual amplifiers; i.e., out of 100 LT1125s (or 100 density test. See the test circuit and frequency response curve for 0.1Hz to
LT1124s) typically 240 op amps (or 120) will be better than the indicated 10Hz tester in the Applications Information section of the LT1007 or
specification. LT1028 data sheets.
Note 3: This parameter is 100% tested for each individual amplifier. Note 9: This parameter is guaranteed but not tested.
Note 4: This parameter is sample tested only. Note 10: The LT1124C/LT1125C and LT1124AC/LT1125AC are guaranteed
Note 5: This parameter is not 100% tested. to meet specified performance from 0°C to 70°C and are designed,
Note 6: The inputs are protected by back-to-back diodes. Current limiting characterized and expected to meet these extended temperature limits, but
resistors are not used in order to achieve low noise. If differential input are not tested at –40°C and 85°C. The LT1124AI and LT1124I are
voltage exceeds ±1.4V, the input current should be limited to 25mA. guaranteed to meet the extended temperature limits.
11245fb

4
 LT1124/LT1125
U W
TYPICAL PERFOR A CE CHARACTERISTICS
0.1Hz to 10Hz Voltage Noise 0.01Hz to 1Hz Voltage Noise Voltage Noise vs Frequency
100
VS = ±15V

RMS VOLTAGE NOISE DENSITY (nV/√Hz)

TA = 25°C
30
VOLTAGE NOISE (40nV/DIV)

VOLTAGE NOISE (40nV/DIV)

10

MAXIMUM

3
TYPICAL
1/f CORNER
2.3Hz
1
0 2 4 6 8 10 0 20 40 60 80 100 0.1 1.0 10 100 1000
TIME (SECONDS) TIME (SECONDS) FREQUENCY (Hz)
1124/25 G01 1124/25 G02 1124/25 G03

Input Bias or Offset Current Output Short-Circuit Current

Current Noise vs Frequency vs Temperature vs Time
10.0 30 50
VS = ±15V VS = ±15V VS = ±15V
RMS CURRENT NOISE DENSITY (pA/√Hz)

40
INPUT BIAS OR OFFSET CURRENT (nA)

SOURCING
TA = 25°C
25°C

SHORT-CIRCUIT CURRENT (mA)

30 – 55°C
3.0
20
20
10 125°C

1.0 0

MAXIMUM –10
125°C
10 –20
LT1124M/LT1125M
SINKING

0.3 25°C
1/f CORNER TYPICAL –30
100Hz LT1124AM/LT1125AM –55°C
–40
0.1 0 –50
10 100 1k 10k –75 –50 –25 0 25 50 75 100 125 0 1 2 3 4
FREQUENCY (Hz) TEMPERATURE (°C) TIME FROM OUTPUT SHORT TO GND (MINUTES)
1124 G04 1124/25 G05 LT1124 G06

Input Bias Current Over the Common Mode Rejection Ratio Power Supply Rejection Ratio
Common Mode Range vs Frequency vs Frequency
20 160 160
VS = ±15V TA = 25°C TA = 25°C
COMMON MODE REJECTION RATIO (dB)

POWER SUPPLY REJECTION RATIO (dB)

15 TA = 25°C 140 VS = ±15V 140

VCM = ±10V
INPUT BIAS CURRENT (nA)

10 120 120
DEVICE WITH POSITIVE
5 INPUT CURRENT 100 100

0 80 80
– PSRR
–5 60 60
DEVICE WITH NEGATIVE +PSRR
– 10 INPUT CURRENT 40 40

–15 20 20

–20 0 0
–15 –10 –5 0 5 10 15 1k 10k 100k 1M 10M 1 10 102 103 104 105 106 107 108
COMMON MODE INPUT VOLTAGE (V) FREQUENCY (Hz) FREQUENCY (Hz)
1124/25 G07 1124/25 G08 1124/25 G09

11245fb

5
LT1124/LT1125
U W
TYPICAL PERFOR A CE CHARACTERISTICS
Voltage Gain vs Frequency Voltage Gain vs Temperature Gain, Phase Shift vs Frequency
180 20 50 80
VS = ±15V VS = ±15V
TA = 25°C 18 LT1124AM/LT1125AM TA = 25°C
40 CL = 10pF 100
140 16 Ø

PHASE SHIFT (DEGREES)

RL = 10k

VOLTAGE GAIN (V/ µV)

14

VOLTAEG GAIN (dB)

VOLTAGE GAIN (dB)

30 120
LT1124M/LT1125M
100 12
10 VS = ±15V 20 140
VOUT = ± 10V
60 8 GAIN
10 160
6 RL = 2k LT1124AM/LT1125AM
20 4
0 180
2 LT1124M/LT1125M
– 20 0 –10 200
0.01 1 100 10k 1M 100M –75 –50 –25 0 25 50 75 100 125 0.1 1 10 100
FREQUENCY (Hz) TEMPERATURE (°C) FREQUENCY (MHz)
1124/25 G10 1124/25 G11 1124/25 G12

Offset Voltage Drift with

Input Offset Voltage Drift Temperature of Representative
Distribution Units Supply Current vs Supply Voltage
40 50 3
VS = ±15V 200 N8 VS = ±15V

SUPPLY CURRENT PER AMPLIFIER (mA)

100 S8 40
125°C
96 J8 30
30 396 UNITS TESTED
OFFSET VOLTAGE (µV)

20 25°C
PERCENT OF UNITS

2
10 –55°C
20 0
–10
1
–20
10
–30
–40
0 –50 0
–0.8 –0.4 0 0.4 0.8 –50 –25 0 25 50 75 100 125 0 ±5 ±10 ±15 ±20
INPUT OFFSET VOLTAGE DRIFT (µV/°C) TEMPERATURE (°C) SUPPLY VOLTAGE (V)
1124/25 G13 1124/25 G14 1124/25 G15

Output Voltage Swing vs

Small-Signal Transient Response Large-Signal Transient Response Load Current
V + –0.8
VS = ±3V TO ±18V
–1.0
50mV 125°C
10V –1.2
OUTPUT VOLTAGE SWING (V)

–1.4 25°C

0 0 –1.6 –55°C

– 10V 1.2
– 50mV –55°C
1.0
25°C
0.8
AVCL = +1
1124/25 G16
AVCL = –1
1124/25 G17 125°C
VS = ±15V or ±5V VS = ±15V 0.6
CL = 15pF V – 0.4
–10 –8 –6 –4 –2 0 2 4 6 8 10
ISINK ISOURCE
OUTPUT CURRENT (mA)
1124/25 G18

11245fb

6
 LT1124/LT1125
U W
TYPICAL PERFOR A CE CHARACTERISTICS
Common Mode Limit vs
Temperature Channel Separation vs Frequency Warm-Up Drift
V + –0.5 180 10
VS = ±15V
–1.0 160 LIMITED BY
TA = 25°C
THERMAL INTERACTION

CHANGE IN OFFSET VOLTAGE (µV)

REFERRED TO POWER SUPPLY

–1.5 8

CHANNEL SEPARATION (dB)

140
COMMON MODE LIMIT (V)

V + = 3V TO 18V SO PACKAGE
–2.0
120
–2.5 VS = ±15V 6
100 RL = 2k
VOUT = 7VP-P
80 TA = 25°C
2.5 4 N, J PACKAGES
V – = –3V TO –18V 60 LIMITED BY PIN
2.0
TO PIN CAPACITANCE
1.5 40 2
1.0 20

V – 0.5 0 0
–60 –20 20 60 100 140 0 100 1k 10k 100k 1M 10M 0 1 2 3 4 5
TEMPERATURE (°C) FREQUENCY (Hz) TIME AFTER POWER ON (MINUTES)
1124/25 G19 1124/25 G20 1124/25 G21

Total Harmonic Distortion Total Harmonic Distortion Total Harmonic Distortion

and Noise vs Frequency for and Noise vs Frequency for and Noise vs Frequency for
Noninverting Gain Inverting Gain Competitive Devices
0.1 0.1 0.1

TOTAL HARMONIC DISTORTION + NOISE (%)

TOTAL HARMONIC DISTORTION + NOISE (%)

TOTAL HARMONIC DISTORTION + NOISE (%)

ZL = 2k/15pF ZL = 2k/15pF ZL = 2k/15pF

VO = 20VP-P VO = 20Vp-p VO = 20Vp-p
AV = +1, +10, +100 AV = –1, –10, –100 AV = –10
MEASUREMENT BANDWIDTH MEASUREMENT BANDWIDTH MEASUREMENT BANDWIDTH
= 10Hz TO 80kHz = 10Hz TO 80kHz = 10Hz TO 80kHz
0.010 0.010 0.010
AV = +100
AV = –100 OP270
AV = +10
AV = –10 OP27
0.001 0.001 0.001
AV = +1 LT1124
AV = –1

0.0001 0.0001 0.0001

20 100 1k 10k 20k 20 100 1k 10k 20k 20 100 1k 10k 20k
FREQUENCY (Hz) FREQUENCY (Hz) FREQUENCY (Hz)
1124/25 G22 1124/25 G23 1124/25 G24

Total Harmonic Distortion and Total Harmonic Distortion and Intermodulation Distortion
Noise vs Output Amplitude for Noise vs Output Amplitude for (CCIF Method)* vs Frequency
Noninverting Gain Inverting Gain LT1124 and OP270
1 1 0.010
TOTAL HARMONIC DISTORTION + NOISE (%)

TOTAL HARMONIC DISTORTION + NOISE (%)

ZL = 2k/15pF ZL = 2k/15pF ZL = 2k/15pF

INTERMODULATION DISTORTION (IMD)(%)

fO = 1kHz fO = 1kHz f (IM) = 1kHz

AV = +1, +10, +100 AV = –1, –10, –100 fO = 13.5kHz
0.1 MEASUREMENT BANDWIDTH 0.1 MEASUREMENT BANDWIDTH VO = 20Vp-p
= 10Hz TO 22kHz = 10Hz TO 22kHz AV = –10
MEASUREMENT BANDWIDTH
AV = +100 = 10Hz TO 80kHz
OP270
0.010 0.010 AV = –100 0.001
AV = +10
AV = –10

0.001 0.001
AV = +1 AV = –1 LT1124

0.0001 0.0001 0.0001

0.3 1 10 30 0.3 1 10 30 3k 10k 20k
OUTPUT SWING (VP-P) OUTPUT SWING (Vp-p) FREQUENCY (Hz)
1124/25 G25 1124/25 G26 1124/25 G27

*See LT1115 data sheet for definition of CCIF testing

11245fb

7
LT1124/LT1125
UO U W U
APPLICATI S I FOR ATIO
The LT1124 may be inserted directly into OP-270 sockets. (5µV/V). However, Table 1 can be used to estimate the
The LT1125 plugs into OP-470 sockets. Of course, all expected matching performance between the two sides of
standard dual and quad bipolar op amps can also be the LT1124, and between amplifiers A and D, and between
replaced by these devices. amplifiers B and C of the LT1125.

Matching Specifications Offset Voltage and Drift

In many applications the performance of a system de-
pends on the matching between two op amps, rather than
the individual characteristics of the two devices. The three
op amp instrumentation amplifier configuration shown in
this data sheet is an example. Matching characteristics are
not 100% tested on the LT1124/LT1125.
Some specifications are guaranteed by definition. For
example, 70µV maximum offset voltage implies that mis-
match cannot be more than 140µV. 112dB (= 2.5µV/V)
CMRR means that worst case CMRR match is 106dB
Thermocouple effects, caused by temperature gradients
across dissimilar metals at the contacts to the input
terminals, can exceed the inherent drift of the amplifier
unless proper care is exercised. Air currents should be
minimized, package leads should be short, the two input
leads should be close together and maintained at the same
temperature.
The circuit shown in Figure 1 to measure offset voltage is
also used as the burn-in configuration for the LT1124/
LT1125, with the supply voltages increased to ±16V.

50k*

15V

–
100Ω* VOUT
+
50k*
–15V

VOUT = 1000VOS
*RESISTORS MUST HAVE LOW
THERMOELECTRIC POTENTIAL 1124/25 F01

Figure 1. Test Circuit for Offset Voltage

and Offset Voltage Drift with Temperature

Table 1. Expected Match

LT1124AC/AM LT1124C/M
LT1125AC/AM LT1125C/M
PARAMETER 50% YIELD 98% YIELD 50% YIELD 98% YIELD UNITS
VOS Match, ∆VOS LT1124 20 110 30 130 µV
LT1125 30 150 50 180 µV
Temperature Coefficient Match 0.35 1.0 0.5 1.5 µV/°C
Average Noninverting IB 6 18 7 25 nA
Match of Noninverting IB 7 22 8 30 nA
CMRR Match 126 115 123 112 dB
PSRR Match 127 118 127 114 dB

11245fb

8

UO U W
APPLICATI S I FOR ATIO
High Speed Operation
When the feedback around the op amp is resistive (RF),
a pole will be created with RF, the source resistance and
capacitance (RS, CS), and the amplifier input capacitance
(CIN ≈ 2pF). In low closed loop gain configurations and
with RS and RF in the kilohm range, this pole can create
excess phase shift and even oscillation. A small capacitor
(CF) in parallel with RF eliminates this problem (see
Figure 2). With RS (CS + CIN) = RF CF, the effect of the
feedback pole is completely removed.
CF
RF
LT1124/LT1125
U
During the fast feedthrough-like portion of the output, the
input protection diodes effectively short the output to the
input and a current, limited only by the output short circuit
protection, will be drawn by the signal generator. With RF
≥500Ω, the output is capable of handling the current
requirements (IL ≤ 20mA at 10V) and the amplifier stays
in its active mode and a smooth transition will occur.
Noise Testing
Each individual amplifier is tested to 4.2nV/√Hz voltage
noise; i.e., for the LT1124 two tests, for the LT1125 four
tests are performed. Noise testing for competing multiple
op amps, if done at all, may be sample tested or tested
using the circuit shown in Figure 4.

–
en OUT = √(enA)2 + (enB)2 + (enC)2 + (enD)2
CIN OUTPUT If the LT1125 were tested this way, the noise limit would
RS CS
+ be √ 4 • (4.2nV/√Hz)2 = 8.4nV/√Hz. But is this an effective
screen? What if three of the four amplifiers are at a typical
1124/25 F02
2.7nV/√Hz, and the fourth one was contaminated and has
Figure 2. High Speed Operation 6.9nV/√Hz noise?
RMS Sum = √(2.7)2 + (2.7)2 + (2.7)2 + (6.9)2 = 8.33nV/√Hz
Unity Gain Buffer Applications This passes an 8.4nV/√Hz spec, yet one of the amplifiers
is 64% over the LT1125 spec limit. Clearly, for proper
When R F ≤ 100Ω and the input is driven with a fast, large
noise measurement, the op amps have to be tested
signal pulse (>1V), the output waveform will look as
individually.
shown in Figure 3.
RF
–
– D OUT
– C +
– – B +
OUTPUT 4.5V/µs
+ A +
+
1124/25 F03
1124/25 F04

Figure 3. Unity-Gain Buffer Applications Figure 4. Competing Quad Op Amp Noise Test Method

11245fb

9
LT1124/LT1125
U W W U
PERFOR A CE CO PARISO
Table 2 summarizes the performance of the LT1124/ but in most cases are superior. Normally dual and quad
LT1125 compared to the low cost grades of alternate performance is degraded when compared to singles, for
approaches. the LT1124/LT1125 this is not the case.
The comparison shows how the specs of the LT1124/
LT1125 not only stand up to the industry standard OP-27,
Table 2. Guaranteed Performance, VS = ±15V, TA = 25°C, Low Cost Devices
LT1124CN8
PARAMETER/UNITS LT1125CN OP-27 GP OP-270 GP OP-470 GP UNITS
Voltage Noise, 1kHz 4.2 4.5 – 5.0 nV/√Hz
100% Tested Sample Tested No Limit Sample Tested
Slew Rate 2.7 1.7 1.7 1.4 V/µs
100% Tested Not Tested
Gain Bandwidth Product 8.0 5.0 – – MHz
100% Tested Not Tested No Limit No Limit
Offset Voltage LT1124 100 100 250 – µV
LT1125 140 – – 1000 µV
Offset Current LT1124 20 75 20 – nA
LT1125 30 – – 30 nA
Bias Current 30 80 60 60 nA
Supply Current/Amp 2.75 5.67 3.25 2.75 mA
Voltage Gain, RL = 2k 1.5 0.7 0.35 0.4 V/µV
Common Mode Rejection Ratio 106 100 90 100 dB
Power Supply Rejection Ratio 110 94 104 105 dB
SO-8 Package Yes - LT1124 Yes No –

UO
TYPICAL APPLICATI S
Gain 1000 Amplifier with 0.01% Accuracy, DC to 1Hz Gain Error vs Frequency Closed-Loop Gain = 1000

340k 15k 20k 1.0

1% 5% TRIM
TYPICAL
PRECISION
OP AMP
15V
GAIN ERROR (PERCENT)

365Ω
1% 6 (S0-8) 0.1
2 8 (N8)
–
1/2 LT1124 OUTPUT
3 7 (SO-8)
+ 4 1 (N8) LT1124/LT1125
0.01
RN60C FILM RESISTORS
INPUT –15V
CLOSED-LOOP GAIN
GAIN ERROR =
THE HIGH GAIN AND WIDE BANDWIDTH OF THE LT1124/LT1125, IS USEFUL IN LOW OPEN-LOOP GAIN
FREQUENCY HIGH CLOSED-LOOP GAIN AMPLIFIER APPLICATIONS. A TYPICAL 0.001
PRECISION OP AMP MAY HAVE AN OPEN-LOOP GAIN OF ONE MILLION WITH 500kHz 0.1 1 10 100
BANDWIDTH. AS THE GAIN ERROR PLOT SHOWS, THIS DEVICE IS CAPABLE OF 0.1% FREQUENCY (Hz)
AMPLIFYING ACCURACY UP TO 0.3Hz ONLY. EVEN INSTRUMENTATION RANGE
1124/25 TA04
SIGNALS CAN VARY AT A FASTER RATE. THE LT1124/LT1125 “GAIN PRECISION —
BANDWIDTH PRODUCT” IS 75 TIMES HIGHER, AS SHOWN.
1124/25 TA03

11245fb

10
 LT1124/LT1125
W W
SCHE ATIC DIAGRA (1/2 LT1124, 1/4 LT1125)

V+

360µA 570µA 100µA

Q7
Q28
21k 200pF 21k 3.6k 3.6k 35pF
Q27
Q18
Q9 Q13 Q8 Q25 20Ω
OUTPUT
Q10 Q17 Q26

Q19 Q20 900Ω

20Ω
V–
NONINVERTING
INPUT (+) Q1A Q1B Q2A 400Ω
Q2B Q30
67pF
20pF
Q3 V+
INVERTING Q29
INPUT (–)
V+
Q22
Q11
Q12 Q15 Q16 Q23
Q24
200µA
200µA 100µA 200Ω 6k 200Ω 6k 50Ω
V–

1124/25 SS

11245fb

11
LT1124/LT1125
U
PACKAGE DESCRIPTIO
J8 Package
8-Lead CERDIP (Narrow 0.300, Hermetic)
(LTC DWG # 05-08-1110)
CORNER LEADS OPTION .405
(4 PLCS) (10.287)
.005 MAX
(0.127)
MIN
8 7 6 5
.023 – .045
(0.584 – 1.143)
HALF LEAD
OPTION .025 .220 – .310
.045 – .068 (0.635) (5.588 – 7.874)
(1.143 – 1.650) RAD TYP
FULL LEAD
OPTION
1 2 3 4 .200
.300 BSC
(5.080)
(7.62 BSC) MAX

.015 – .060
(0.381 – 1.524)

.008 – .018
0° – 15°
(0.203 – 0.457)

.045 – .065
.125
NOTE: LEAD DIMENSIONS APPLY TO SOLDER DIP/PLATE (1.143 – 1.651)
OR TIN PLATE LEADS 3.175
.014 – .026 MIN
.100
(0.360 – 0.660) (2.54)
BSC J8 0801

OBSOLETE PACKAGE
N8 Package
8-Lead PDIP (Narrow 0.300)
(LTC DWG # 05-08-1510)
.400*
(10.160)
MAX

8 7 6 5

.255 ± .015*
(6.477 ± 0.381)

1 2 3 4

.300 – .325 .045 – .065 .130 ± .005

(7.620 – 8.255) (1.143 – 1.651) (3.302 ± 0.127)

.065
(1.651)
.008 – .015 TYP
(0.203 – 0.381) .120
(3.048) .020
+.035 MIN (0.508)
.325 –.015

( )
.100 .018 ± .003 MIN
+0.889
8.255 (2.54) (0.457 ± 0.076)
–0.381 N8 1002
BSC
NOTE:
INCHES
1. DIMENSIONS ARE
MILLIMETERS
*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .010 INCH (0.254mm)
11245fb

12
 LT1124/LT1125
U
PACKAGE DESCRIPTIO
S8 Package
8-Lead Plastic Small Outline (Narrow 0.150)
(LTC DWG # 05-08-1610)

.189 – .197
.045 ±.005 (4.801 – 5.004)
.050 BSC NOTE 3
8 7 6 5

.245
MIN .160 ±.005
.150 – .157
.228 – .244
(3.810 – 3.988)
(5.791 – 6.197)
NOTE 3

.030 ±.005
TYP
1 2 3 4
RECOMMENDED SOLDER PAD LAYOUT

.010 – .020
× 45° .053 – .069
(0.254 – 0.508)
(1.346 – 1.752)
.004 – .010
.008 – .010
0°– 8° TYP (0.101 – 0.254)
(0.203 – 0.254)

.016 – .050
.014 – .019 .050
(0.406 – 1.270)
(0.355 – 0.483) (1.270)
NOTE: TYP BSC
INCHES
1. DIMENSIONS IN
(MILLIMETERS)
2. DRAWING NOT TO SCALE
3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm) SO8 0303

11245fb

13
LT1124/LT1125
U
PACKAGE DESCRIPTIO
J Package
14-Lead CERDIP (Narrow 0.300, Hermetic)
(LTC DWG # 05-08-1110)
.785
(19.939)
.005
MAX
(0.127)
MIN 14 13 12 11 10 9 8

.025 .220 – .310

(0.635) (5.588 – 7.874)
RAD TYP

1 2 3 4 5 6 7 .200
.300 BSC
(5.080)
(7.62 BSC) MAX

.015 – .060
(0.381 – 1.524)

.008 – .018
0° – 15°
(0.203 – 0.457)

.045 – .065 .100 .125

(1.143 – 1.651) (2.54) (3.175)
.014 – .026 BSC MIN
NOTE: LEAD DIMENSIONS APPLY TO SOLDER DIP/PLATE
OR TIN PLATE LEADS (0.360 – 0.660) J14 0801

OBSOLETE PACKAGE
N Package
14-Lead PDIP (Narrow 0.300)
(LTC DWG # 05-08-1510)

.770*
(19.558)
MAX
14 13 12 11 10 9 8

.255 ± .015*
(6.477 ± 0.381)

1 2 3 4 5 6 7

.300 – .325 .130 ± .005 .045 – .065

(7.620 – 8.255) (3.302 ± 0.127) (1.143 – 1.651)

.020
(0.508)
MIN .065
.008 – .015 (1.651)
(0.203 – 0.381) TYP

+.035
.325 –.015 .005
.018 ± .003

( )
.120
+0.889 (0.127) .100
8.255 (3.048) (0.457 ± 0.076)
–0.381 MIN MIN (2.54)
N14 1103
BSC
NOTE:
INCHES
1. DIMENSIONS ARE
MILLIMETERS
*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .010 INCH (0.254mm)
11245fb

14
 LT1124/LT1125
U
PACKAGE DESCRIPTIO
SW Package
16-Lead Plastic Small Outline (Wide 0.300)
(LTC DWG # 05-08-1620)

.030 ±.005 .050 BSC .045 ±.005 .398 – .413

TYP (10.109 – 10.490)
NOTE 4
N 16 15 14 13 12 11 10 9

.420 .325 ±.005

MIN
NOTE 3 .394 – .419
(10.007 – 10.643)

1 2 3 N/2 N/2

RECOMMENDED SOLDER PAD LAYOUT

1 2 3 4 5 6 7 8

.291 – .299
(7.391 – 7.595)
NOTE 4 .037 – .045
.093 – .104
.010 – .029 × 45° (0.940 – 1.143)
(2.362 – 2.642)
(0.254 – 0.737)
.005
(0.127)
RAD MIN 0° – 8° TYP

.050
.009 – .013 (1.270) .004 – .012
(0.229 – 0.330) NOTE 3 BSC (0.102 – 0.305)
.014 – .019
.016 – .050
(0.356 – 0.482)
(0.406 – 1.270)
TYP
NOTE:
INCHES
1. DIMENSIONS IN S16 (WIDE) 0502
(MILLIMETERS)
2. DRAWING NOT TO SCALE
3. PIN 1 IDENT, NOTCH ON TOP AND CAVITIES ON THE BOTTOM OF PACKAGES ARE THE MANUFACTURING OPTIONS.
THE PART MAY BE SUPPLIED WITH OR WITHOUT ANY OF THE OPTIONS
4. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm)

11245fb

15
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
LT1124/LT1125
U
TYPICAL APPLICATION
Strain Gauge Signal Conditioner with Bridge Excitation

15V

5k 1k
3 THE LT1124/LT1125 IS CAPABLE OF PROVIDING EXCITATION CURRENT DIRECTLY
+ TO BIAS THE 350Ω BRIDGE AT 5V WITH ONLY 5V ACROSS THE BRIDGE (AS OPPOSED
2.5V 1
1/4 TO THE USUAL 10V) TOTAL POWER DISSIPATION AND BRIDGE WARM-UP DRIFT IS
LT1125 REDUCED. THE BRIDGE OUTPUT SIGNAL IS HALVED, BUT THE LT1124/LT1125 CAN
LT1009 2
– AMPLIFY THE REDUCED SIGNAL ACCURATELY.

–15V
REFERENCE
OUTPUT
350Ω
BRIDGE 15V
5 4
+
1/4 7 0V TO 10V
301k* LT1125 OUTPUT
6
10k – 13
15V ZERO 1µF 301k*
TRIM –15V
13
– 50k
1/4 14 499Ω*
GAIN
12 LT1125
TRIM
+ 1k
*RN60C FILM RESISTORS

1124/25 TA05
–15V

RELATED PARTS
PART NUMBER DESCRIPTION COMMENTS
LT1007 Single Low Noise, Precision Op Amp 2.5nV/√Hz 1kHz Voltage Noise
LT1028/LT1128 Single Low Noise, Precision Op Amps 0.85nV/√Hz Voltage Noise
LT1112/LT1114 Dual/Quad Precision Picoamp Input 250pA Max IB
LT1113 Dual Low Noise JFET Op Amp 4.5nV/√Hz Voltage Noise, 10fA/√Hz Current Noise
LT1126/LT1127 Decompensated LT1124/LT1125 11V/µs Slew Rate
LT1169 Dual Low Noise JFET Op Amp 6nV/√Hz Voltage Noise, 1fA/√Hz Current Noise, 10pA Max IB
LT1792 Single LT1113 4.2nV/√Hz Voltage Noise, 10fA/√Hz Current Noise
LT1793 Single LT1169 6nV/√Hz Voltage Noise, 1fA/√Hz Current Noise, 10pA Max IB

11245fb

Linear Technology Corporation LT/LT 0705 REV B • PRINTED IN USA

16 1630 McCarthy Blvd., Milpitas, CA 95035-7417

(408) 432-1900 ● FAX: (408) 434-0507 ●
www.linear.com © LINEAR TECHNOLOGY CORPORATION 1992