There are 8 feeders fed from one substation bus with an LTC.

Each feeder has 10 load no

Test Conditions: Assume that the customer load reduction is proportional to the
Cases with voltage limit violations are unacceptable.
 The upper voltage limits at all secondary terminals are 5%, and
The LTC step is 0.625%
Sub-condition 1: The errors of volt/var control execution due to LTC bandwidth, a
See Cases 1 through 5
Sub-condition 2: The error in execution of the volt/var control is ±1% of the nomi
the LTC controller bandwidth, measurement and modeling error
Hence, the upper voltage limits are reduced by 1% (4%), and the
See Cases 6 through 10

Customer benefits are equal Load Reduction + 50% of Loss Redu

Total CVR benefits are equal Load Reduction + Loss Reduction

The summary results of the cases are presented in the table below. More detailed inform

Conditions and cases LTC boost, %

Case 1 Al capacitors are OFF 0

Case 2 Al capacitors are ON 0
Condition 1 Case 3 Al capacitors are OFF 1.875
Case 4 Al capacitors are ON 0
Case 5 Some capacitors OFF 0
Case 6 Al capacitors are OFF 0
Case 7 Al capacitors are ON 0
Condition 2 Case 8 Al capacitors are OFF 3.125
Case 9 Al capacitors are ON 1.25
Case 10 Some capacitors OFF 1.25

Analyze the Table above and answer the questions below.

For the answer that you considered correct put 1
The correct answer contributes 1 to the overall score, the incorrect subtracts 1 from the
If you are not sure about the answer do not guess. No answer does not change the scor

Questions for
Sub-condition 1 1 Is case 1 acceptable?

A. Yes
B. No

2 Is case 2 acceptable?
 A. Yes
B. No

3 What is the best that can be done by the LTC control only, if all capacitors are OFF?

A. Increase the initial bus voltage by 4 LTC steps

B. Increase the initial bus voltage by 2 LTC steps
C. Increase the initial bus voltage by 3 LTC steps

4 What is the best that can be done by the LTC control only, if all capacitors are ON?

A. Increase bus voltage by one LTC step

B. Keep the initial bus voltage
C. Reduce bus voltage by one LTC step

5 Can, in this case, a better CVR solution be found with some capacitors being OFF ?

A. All capacitors must be ON for loss reduction

B. Some capacitors can be OFF, if it reduces voltages within standard limits
C. Some capacitors can be OFF, if it reduces voltages within standard limits and the load re

8 Under which CVR-watt factors is Case 5 the most benefitial? (the increase of losses due to

A. 1.0
B. 0.8
C. 0.6

9 Under which CVR-watt factors is Case 5 the most benefitial for the customers?

A. 1.0
B. 0.7
C. 0.5

Questions for 9 Can the voltage violations be eliminated by LTC control only, if all capacitors are OFF?
Sub-condition 2
A. Yes
B. No

10 What is the best that can be done by the LTC control only, if all capacitors are OFF?

A. Increase the initial bus voltage by 4 LTC steps

B. Increase the initial bus voltage by 5 LTC steps
C. Increase the initial bus voltage by 6 LTC steps
11 What is the best that can be done by the LTC control only, if all capacitors are ON?

A. Increase bus voltage by 2 LTC steps

B. Reduce bus voltage by 1 LTC steps
C. Increase bus voltage by 1 LTC steps

12 Under which CVR-watt factors is Case 10 the most benefitial? (the increase of losses due t

A. 1.0
B. 0.7
C. 0.6

13 Under which CVR-watt factors is Case 10 the most benefitial for the customers?

A. 1.0
B. 0.7
C. 0.5

Your final score is Will show after 50%

 4

Condition 2
 7

10

11

12
an LTC. Each feeder has 10 load nodes and two switched capacitors.

d reduction is proportional to the average secondary voltage (across all feeder and all nodes).
tions are unacceptable.
secondary terminals are 5%, and the lower voltage limits are -5% of the nominal voltages

execution due to LTC bandwidth, as well as, measurement and modeling errors are ignored.

olt/var control is ±1% of the nominal voltage due to

measurement and modeling errors.
s are reduced by 1% (4%), and the lower voltage limits are higher by 1% (-4%)

oad Reduction + 50% of Loss Reduction

oad Reduction + Loss Reduction

table below. More detailed information can be found in the HELP Sheet

Minimum
Loss increase voltage deviation
Average Maximum due to
voltage voltage capacitors
deviation over violation per OFF, % of total
all nodes<% node, % load

-4.35 1.6 0.80 -6.6

-2.82 0.00 0.00 -5.0
-2.48 0 0.80 -4.7
-2.82 0 0.00 -5.0
-3.25 0 0.27 -5.0
-4.35 1.6 0.80 -6.6
-2.82 0.0 0.00 -5.0
-1.23 0 0.80 -3.4
-1.57 0 0.00 -3.7
-2.04 0 0.37 -3.9

the incorrect subtracts 1 from the score.

answer does not change the score.

A
B
 A
B

nly, if all capacitors are OFF?

A
B
C

nly, if all capacitors are ON?

A
B
C

ome capacitors being OFF ?

A
thin standard limits B
thin standard limits and the load reduction exceeds the increase in losses C

fitial? (the increase of losses due to reduced CVR_watt factor is negligible)

A
B
C

fitial for the customers?

A
B
C

only, if all capacitors are OFF?

A
B

nly, if all capacitors are OFF?

A
B
C
nly, if all capacitors are ON?

A
B
C

efitial? (the increase of losses due to reduced CVR_watt factor is negligible)

A
B
C

efitial for the customers?

A
B
C
1.002761
1.004143
1.005527
1.006913
LTC boost = 0
Case 1 All capacitors are OFF
Initial secondary voltages deviations from nominal voltage, %
Feeder #
Node #
1 2 3 4 5 6 7
1 -2.70 -0.46 -4.67 -2.22 -3.76 -5.05 -3.32
2 -0.62 -0.48 -2.65 -2.35 -4.66 -5.43 -4.25
3 -4.10 -1.50 -5.33 -3.08 -3.86 -5.68 -3.84
4 -4.20 -2.59 -5.53 -3.68 -4.01 -6.22 -3.98
5 -3.75 -2.10 -4.79 -3.00 -6.05 -6.57 -5.97
6 -5.03 -4.41 -5.88 -5.02 -4.23 -3.75 -4.36
7 -4.50 -5.23 -5.10 -5.50 -6.20 -3.79 -6.23
8 -5.53 -4.89 -6.06 -5.14 -4.40 -3.59 -4.55
9 -4.70 -5.02 -5.15 -5.19 -6.38 -3.56 -6.44
10 -6.02 -5.17 -6.41 -5.27 -4.52 -3.55 -4.75
Average voltage deviation across secondary terminals of all feeders
Minimum voltage deviation across secondary terminals of all feeders
Maximum voltage deviation across secondary terminals of all feeders
MinNodeVo -6.0 -5.2 -6.4 -5.5 -6.4 -6.6 -6.4
MaxNodeVo -0.6 -0.5 -2.6 -2.2 -3.8 -3.6 -3.3

Case1a Initial voltage deviations beyond low and high voltage limits, %.
Absolute values
Feeder #
Node #
1 2 3 4 5 6 7
1 0.00 0.00 0.00 0.00 0.00 0.05 0.00
2 0.00 0.00 0.00 0.00 0.00 0.43 0.00
3 0.00 0.00 0.33 0.00 0.00 0.68 0.00
4 0.00 0.00 0.53 0.00 0.00 1.22 0.00
5 0.00 0.00 0.00 0.00 1.05 1.57 0.97
6 0.03 0.00 0.88 0.02 0.00 0.00 0.00
7 0.00 0.23 0.10 0.50 1.20 0.00 1.23
8 0.53 0.00 1.06 0.14 0.00 0.00 0.00
9 0.00 0.02 0.15 0.19 1.38 0.00 1.44
10 1.02 0.17 1.41 0.27 0.00 0.00 0.00
Average voltage violation between maximum and minimum violations
Maximum voltage violation between maximum and minimum violations

LTC boost = 0
Case 2 All capacitors are ON
Initial secondary voltage deviation from nominal voltage, %
Feeder #
Node #
1 2 3 4 5 6 7
 1 -2.4 -0.1 -4.3 -1.9 -3.4 -4.7 -3.0
2 0.0 0.2 -2.0 -1.7 -4.0 -4.8 -3.6
3 -3.1 -0.5 -4.4 -2.1 -2.9 -4.7 -2.9
4 -2.9 -1.3 -4.2 -2.4 -2.7 -4.9 -2.7
5 -2.1 -0.5 -3.2 -1.4 -4.5 -5.0 -4.4
6 -3.1 -2.5 -4.0 -3.1 -2.3 -1.8 -2.4
7 -2.5 -3.2 -3.1 -3.5 -4.2 -1.8 -4.2
8 -3.4 -2.8 -4.0 -3.1 -2.3 -1.5 -2.5
9 -2.5 -2.8 -3.0 -3.0 -4.2 -1.4 -4.2
10 -3.7 -2.9 -4.1 -3.0 -2.2 -1.3 -2.5
Average voltage deviation across secondary terminals of all feeders
Minimum voltage deviation across secondary terminals of all feeders
Maximum voltage deviation across secondary terminals of all feeders
MinNodeVo -3.7 -3.2 -4.4 -3.5 -4.5 -5.0 -4.4
MaxNodeVo 0.0 0.2 -2.0 -1.4 -2.2 -1.3 -2.4

Case2a Initial voltage deviations beyond low and high voltage limits, %.
Absolute values
Feeder #
Node #
1 2 3 4 5 6 7
1 0.00 0.00 0.00 0.00 0.00 0.00 0.00
2 0.00 0.00 0.00 0.00 0.00 0.00 0.00
3 0.00 0.00 0.00 0.00 0.00 0.00 0.00
4 0.00 0.00 0.00 0.00 0.00 0.00 0.00
5 0.00 0.00 0.00 0.00 0.00 0.00 0.00
6 0.00 0.00 0.00 0.00 0.00 0.00 0.00
7 0.00 0.00 0.00 0.00 0.00 0.00 0.00
8 0.00 0.00 0.00 0.00 0.00 0.00 0.00
9 0.00 0.00 0.00 0.00 0.00 0.00 0.00
10 0.00 0.00 0.00 0.00 0.00 0.00 0.00
Average voltage violation between maximum and minimum violations
Maximum voltage violation between maximum and minimum violations

LTC_boost 1.875 %
Case 3. All capacitors are OFF
Voltages deviations from nominal voltage after LTC boost, %
Feeder #
Node #
1 2 3 4 5 6 7
1 -0.83 1.42 -2.80 -0.35 -1.89 -3.18 -1.44
2 1.25 1.39 -0.77 -0.47 -2.79 -3.56 -2.37
3 -2.23 0.38 -3.46 -1.21 -1.99 -3.80 -1.97
4 -2.33 -0.71 -3.66 -1.80 -2.14 -4.34 -2.11
5 -1.87 -0.23 -2.92 -1.12 -4.17 -4.69 -4.09
6 -3.15 -2.54 -4.01 -3.14 -2.36 -1.87 -2.48
7 -2.62 -3.35 -3.22 -3.63 -4.33 -1.91 -4.35
 8 -3.66 -3.01 -4.18 -3.26 -2.53 -1.72 -2.68
9 -2.83 -3.14 -3.28 -3.32 -4.50 -1.69 -4.56
10 -4.14 -3.29 -4.53 -3.39 -2.64 -1.68 -2.87
Average voltage deviation across secondary terminals of all feeders
Minimum voltage deviation across secondary terminals of all feeders
Maximum voltage deviation across secondary terminals of all feeders
MinNodeVo -4.1 -3.4 -4.5 -3.6 -4.5 -4.7 -4.6
MaxNodeVo 1.3 1.4 -0.8 -0.3 -1.9 -1.7 -1.4

Case3a Initial voltage deviations beyond low and high voltage limits, %.
Absolute values
Feeder #
Node #
1 2 3 4 5 6 7
1 0.00 0.00 0.00 0.00 0.00 0.00 0.00
2 0.00 0.00 0.00 0.00 0.00 0.00 0.00
3 0.00 0.00 0.00 0.00 0.00 0.00 0.00
4 0.00 0.00 0.00 0.00 0.00 0.00 0.00
5 0.00 0.00 0.00 0.00 0.00 0.00 0.00
6 0.00 0.00 0.00 0.00 0.00 0.00 0.00
7 0.00 0.00 0.00 0.00 0.00 0.00 0.00
8 0.00 0.00 0.00 0.00 0.00 0.00 0.00
9 0.00 0.00 0.00 0.00 0.00 0.00 0.00
10 0.00 0.00 0.00 0.00 0.00 0.00 0.00
Average voltage violation between maximum and minimum violations
Maximum voltage violation between maximum and minimum violations

LTC_boost 0%
Case 4. All capacitors are ON
Voltages deviations from nominal voltage after LTC boost, %
Feeder #
Node #
1 2 3 4 5 6 7
1 -2.4 -0.1 -4.3 -1.9 -3.4 -4.7 -3.0
2 0.0 0.2 -2.0 -1.7 -4.0 -4.8 -3.6
3 -3.1 -0.5 -4.4 -2.1 -2.9 -4.7 -2.9
4 -2.9 -1.3 -4.2 -2.4 -2.7 -4.9 -2.7
5 -2.1 -0.5 -3.2 -1.4 -4.5 -5.0 -4.4
6 -3.1 -2.5 -4.0 -3.1 -2.3 -1.8 -2.4
7 -2.5 -3.2 -3.1 -3.5 -4.2 -1.8 -4.2
8 -3.4 -2.8 -4.0 -3.1 -2.3 -1.5 -2.5
9 -2.5 -2.8 -3.0 -3.0 -4.2 -1.4 -4.2
10 -3.7 -2.9 -4.1 -3.0 -2.2 -1.3 -2.5
Average voltage deviation across secondary terminals of all feeders
Minimum voltage deviation across secondary terminals of all feeders
Maximum voltage deviation across secondary terminals of all feeders
MinNodeVo -3.7 -3.2 -4.4 -3.5 -4.5 -5.0 -4.4
MaxNodeVo 0.04 0.17 -2.0 -1.4 -2.2 -1.3 -2.4

Case4a Initial voltage deviations beyond low and high voltage limits, %.
Absolute values
Feeder #
Node #
1 2 3 4 5 6 7
1 0.00 0.00 0.00 0.00 0.00 0.00 0.00
2 0.00 0.00 0.00 0.00 0.00 0.00 0.00
3 0.00 0.00 0.00 0.00 0.00 0.00 0.00
4 0.00 0.00 0.00 0.00 0.00 0.00 0.00
5 0.00 0.00 0.00 0.00 0.00 0.00 0.00
6 0.00 0.00 0.00 0.00 0.00 0.00 0.00
7 0.00 0.00 0.00 0.00 0.00 0.00 0.00
8 0.00 0.00 0.00 0.00 0.00 0.00 0.00
9 0.00 0.00 0.00 0.00 0.00 0.00 0.00
10 0.00 0.00 0.00 0.00 0.00 0.00 0.00
Average voltage violation between maximum and minimum violations
Maximum voltage violation between maximum and minimum violations
Case 5 Some capacitors are OFF
Voltages deviations from nominal voltage after LTC boost, %
Feeder #
Node #
1 2 3 4 5 6 7
1 -2.6 -0.3 -4.3 -2.1 -3.4 -4.7 -3.0
2 -0.4 -0.2 -2.0 -2.1 -4.0 -4.8 -3.6
3 -3.8 -1.2 -4.4 -2.7 -2.9 -4.7 -2.9
4 -3.8 -2.1 -4.2 -3.2 -2.7 -4.9 -2.7
5 -3.2 -1.6 -3.2 -2.5 -4.5 -5.0 -4.4
6 -4.4 -3.8 -4.0 -4.4 -2.3 -1.8 -2.4
7 -3.8 -4.5 -3.1 -4.8 -4.2 -1.8 -4.2
8 -4.7 -4.1 -4.0 -4.3 -2.3 -1.5 -2.5
9 -3.8 -4.1 -3.0 -4.3 -4.2 -1.4 -4.2
10 -5.0 -4.2 -4.1 -4.3 -2.2 -1.3 -2.5
Average voltage deviation across secondary terminals of all feeders
Minimum voltage deviation across secondary terminals of all feeders
Maximum voltage deviation across secondary terminals of all feeders
MinNodeVo -5.0 -4.5 -4.4 -4.8 -4.5 -5.0 -4.4
MaxNodeVo -0.4 -0.2 -2.0 -2.1 -2.2 -1.3 -2.4
CX1 OFF OFF ON OFF ON ON ON
CX2 ON ON ON ON ON ON OFF
Loss
increase,
% of load 0.07 0.07 0.07 0.04

Voltage deviations from voltage limits, %. Positive numbers mean violation of upper
Case5a limits, and negative numbers mean violations of lower limits)
Negative numbers mean voltage violations.
 Feeder #
Node #
1 2 3 4 5 6 7
1 0.00 0.00 0.00 0.00 0.00 0.00 0.00
2 0.00 0.00 0.00 0.00 0.00 0.00 0.00
3 0.00 0.00 0.00 0.00 0.00 0.00 0.00
4 0.00 0.00 0.00 0.00 0.00 0.00 0.00
5 0.00 0.00 0.00 0.00 0.00 0.00 0.00
6 0.00 0.00 0.00 0.00 0.00 0.00 0.00
7 0.00 0.00 0.00 0.00 0.00 0.00 0.00
8 0.00 0.00 0.00 0.00 0.00 0.00 0.00
9 0.00 0.00 0.00 0.00 0.00 0.00 0.00
10 0.02 0.00 0.00 0.00 0.00 0.00 0.00
Average voltage deviation across secondary terminals of all feeders

Initial voltage deviations beyond low and high voltage limits with correction for
Case6 uncertainty , %.
Absolute values
Feeder #
Node #
1 2 3 4 5 6 7
1 0.0 0.0 0.0 0.0 0.0 0.1 0.0
2 0.0 0.0 0.0 0.0 0.0 0.4 0.0
3 0.0 0.0 0.3 0.0 0.0 0.7 0.0
4 0.0 0.0 0.5 0.0 0.0 1.2 0.0
5 0.0 0.0 0.0 0.0 1.0 1.6 1.0
6 0.0 0.0 0.9 0.0 0.0 0.0 0.0
7 0.0 0.2 0.1 0.5 1.2 0.0 1.2
8 0.5 0.0 1.1 0.1 0.0 0.0 0.0
9 0.0 0.0 0.2 0.2 1.4 0.0 1.4
10 1.0 0.2 1.4 0.3 0.0 0.0 0.0
Average voltage violation between maximum and minimum violations
Maximum voltage violation between maximum and minimum violations

Error 0.0

Initial voltage deviations beyond low and high voltage limits with correction for
Case7 uncertainty , %.
Absolute values
Feeder #
Node #
1 2 3 4 5 6 7
1 0.0 0.0 0.0 0.0 0.0 0.0 0.0
2 0.0 0.0 0.0 0.0 0.0 0.0 0.0
3 0.0 0.0 0.0 0.0 0.0 0.0 0.0
4 0.0 0.0 0.0 0.0 0.0 0.0 0.0
5 0.0 0.0 0.0 0.0 0.0 0.0 0.0
6 0.0 0.0 0.0 0.0 0.0 0.0 0.0
 7 0.0 0.0 0.0 0.0 0.0 0.0 0.0
8 0.0 0.0 0.0 0.0 0.0 0.0 0.0
9 0.0 0.0 0.0 0.0 0.0 0.0 0.0
10 0.0 0.0 0.0 0.0 0.0 0.0 0.0
Average voltage violation between maximum and minimum violations
Minimum voltage deviation across secondary terminals of all feeders
Maximum voltage deviation across secondary terminals of all feeders

Error 0.0
LTC_boost 3.125
Case 8 All capacitors are OFF
Voltages deviations from nominal voltage after LTC boost, %
Feeder #
Node #
1 2 3 4 5 6 7
1 0.42 2.67 -1.55 0.90 -0.64 -1.93 -0.19
2 2.50 2.64 0.48 0.78 -1.54 -2.31 -1.12
3 -0.98 1.63 -2.21 0.04 -0.74 -2.55 -0.72
4 -1.08 0.54 -2.41 -0.55 -0.89 -3.09 -0.86
5 -0.62 1.02 -1.67 0.13 -2.92 -3.44 -2.84
6 -1.90 -1.29 -2.76 -1.89 -1.11 -0.62 -1.23
7 -1.37 -2.10 -1.97 -2.38 -3.08 -0.66 -3.10
8 -2.41 -1.76 -2.93 -2.01 -1.28 -0.47 -1.43
9 -1.58 -1.89 -2.03 -2.07 -3.25 -0.44 -3.31
10 -2.89 -2.04 -3.28 -2.14 -1.39 -0.43 -1.62
Average voltage deviation across secondary terminals of all feeders
Minimum voltage deviation across secondary terminals of all feeders
Maximum voltage deviation across secondary terminals of all feeders

Voltage deviations from voltage limits, %. Positive numbers mean violation of upper
Case 8a limits, and negative numbers mean violations of lower limits)
Negative numbers mean voltage violations.
Feeder #
Node #
1 2 3 4 5 6 7
1 0.0 0.0 0.0 0.0 0.0 0.0 0.0
2 0.0 0.0 0.0 0.0 0.0 0.0 0.0
3 0.0 0.0 0.0 0.0 0.0 0.0 0.0
4 0.0 0.0 0.0 0.0 0.0 0.0 0.0
5 0.0 0.0 0.0 0.0 0.0 0.0 0.0
6 0.0 0.0 0.0 0.0 0.0 0.0 0.0
7 0.0 0.0 0.0 0.0 0.0 0.0 0.0
8 0.0 0.0 0.0 0.0 0.0 0.0 0.0
9 0.0 0.0 0.0 0.0 0.0 0.0 0.0
10 0.0 0.0 0.0 0.0 0.0 0.0 0.0
Average voltage violation between maximum and minimum violations
Error 0.0
LTC_boost 1.25 %
Case9 All capacitors are ON
Voltages deviations from nominal voltage after LTC boost, %
Feeder #
Node #
1 2 3 4 5 6 7
1 -1.1 1.1 -3.1 -0.6 -2.2 -3.5 -1.7
2 1.3 1.4 -0.7 -0.4 -2.8 -3.5 -2.3
3 -1.9 0.7 -3.1 -0.9 -1.6 -3.5 -1.6
4 -1.7 0.0 -3.0 -1.1 -1.5 -3.7 -1.4
5 -0.9 0.7 -1.9 -0.1 -3.2 -3.7 -3.1
6 -1.9 -1.2 -2.7 -1.9 -1.1 -0.6 -1.2
7 -1.3 -2.0 -1.9 -2.3 -3.0 -0.6 -3.0
8 -2.2 -1.6 -2.7 -1.8 -1.1 -0.3 -1.2
9 -1.3 -1.6 -1.7 -1.8 -2.9 -0.1 -3.0
10 -2.5 -1.6 -2.9 -1.7 -1.0 0.0 -1.2
Average voltage deviation across secondary terminals of all feeders
Minimum voltage deviation across secondary terminals of all feeders
Maximum voltage deviation across secondary terminals of all feeders

Voltage deviations from voltage limits, %. Positive numbers mean violation of upper
Case9a limits, and negative numbers mean violations of lower limits)
Negative numbers mean voltage violations.
Feeder #
Node #
1 2 3 4 5 6 7
1 0.0 0.0 0.0 0.0 0.0 0.0 0.0
2 0.00 0.00 0.00 0.00 0.00 0.00 0.00
3 0.00 0.00 0.00 0.00 0.00 0.00 0.00
4 0.00 0.00 0.00 0.00 0.00 0.00 0.00
5 0.00 0.00 0.00 0.00 0.00 0.00 0.00
6 0.00 0.00 0.00 0.00 0.00 0.00 0.00
7 0.00 0.00 0.00 0.00 0.00 0.00 0.00
8 0.00 0.00 0.00 0.00 0.00 0.00 0.00
9 0.00 0.00 0.00 0.00 0.00 0.00 0.00
10 0.00 0.00 0.00 0.00 0.00 0.00 0.00
Average voltage deviation across secondary terminals of all feeders

LTC_boost 1.5
Case 10 Some capacitors are OFF
Voltages deviations from nominal voltage after LTC boost, %
Feeder #
Node #
1 2 3 4 5 6 7
1 -1.1 0.9 -2.8 -0.6 -2.2 -3.2 -1.5
2 1.1 0.9 -0.8 -0.6 -2.8 -3.3 -2.1
3 -2.3 -0.1 -3.3 -1.2 -1.8 -3.2 -1.4
 4 -2.3 -1.2 -3.3 -1.7 -1.8 -3.4 -1.2
5 -1.7 -0.7 -2.3 -1.0 -3.6 -3.5 -2.9
6 -2.9 -3.0 -3.2 -2.9 -1.5 -0.3 -0.9
7 -2.3 -3.8 -2.4 -3.3 -3.5 -0.3 -2.7
9 -3.2 -3.5 -3.4 -2.8 -1.7 0.0 -1.0
10 -2.3 -3.6 -2.5 -2.8 -3.7 0.1 -2.7
Average voltage deviation across secondary terminals of all feeders
Minimum voltage deviation across secondary terminals of all feeders
Maximum voltage deviation across secondary terminals of all feeders
MinNodeVo -3.2 -3.8 -3.4 -3.3 -3.7 -3.5 -2.9
MaxNodeVo 1.1 0.9 -0.8 -0.6 -1.5 0.1 -0.9
CX1 OFF OFF ON OFF ON ON ON
CX2 ON OFF OFF ON OFF ON OFF
Loss
increase,
% of load 0.04 0.10 0.04 0.07 0.04 0.04

Voltage deviations from voltage limits, %. Positive numbers mean violation of upper
Case 10a limits, and negative numbers mean violations of lower limits)
Negative numbers mean voltage violations.
Feeder #
Node #
1 2 3 4 5 6 7
1 0.0 0.0 0.0 0.0 0.0 0.0 0.0
2 0.0 0.0 0.0 0.0 0.0 0.0 0.0
3 0.0 0.0 0.0 0.0 0.0 0.0 0.0
4 0.0 0.0 0.0 0.0 0.0 0.0 0.0
5 0.0 0.0 0.0 0.0 0.0 0.0 0.0
6 0.0 0.0 0.0 0.0 0.0 0.0 0.0
7 0.0 0.0 0.0 0.0 0.0 0.0 0.0
8 0.0 0.0 0.0 0.0 0.0 0.0 0.0
9 0.0 0.0 0.0 0.0 0.0 0.0 0.0
10 0.0 0.0 0.0 0.0 0.0 0.0 0.0
Average voltage deviation across secondary terminals of all feeders
 Table A
Contribution of voltage by Benefit =
voltage, % CXs by nodes, %
Cx1 Cx2 -0.43
8 0.2 0.1 -0.3448
-4.24 0.4 0.2 -0.2586
-4.66 0.6 0.3
-4.85 0.9 0.4 -0.47
-5.14 1.1 0.5 -0.37861
-5.80 1.3 0.6 -0.28396
-3.11 1.3 0.7
-3.25 1.3 0.8 -0.47
-3.04 1.3 0.9 -0.33129
-3.02 1.3 1.0 -0.23663
-3.02 Average contribution of
-4.35 voltage by Cxs per feeder, %
-6.57 CX1 CX2
-0.46 0.96 0.57
-5.8 Loss reduction by Cxs per
-3.0 feeder, % of total load
0.065 0.035
ge limits, %.

8
0.00
0.00
0.00
0.14
0.80
0.00
0.00
0.00
0.00
0.00
0.25
1.57

oltage, %

8
 -3.9
-4.0
-3.9
-3.8
-4.2
-1.2
-1.3
-1.0
-0.8
-0.7
-2.82
-4.97
0.17
-4.2
-0.7

ge limits, %.

8
0.00
0.00
0.00
0.00
0.00
0.00
0.00
0.00
0.00
0.00
0.00
0.00

st, %

8
-2.37
-2.78
-2.97
-3.26
-3.93
-1.23
-1.37
 -1.16
-1.15
-1.15
-2.48
-4.69
1.42
-3.9
-1.1

ge limits, %.

8
0.00
0.00
0.00
0.00
0.00
0.00
0.00
0.00
0.00
0.00
0.00
0.00

st, %

8
-3.9
-4.0
-3.9
-3.8
-4.2
-1.2
-1.3
-1.0
-0.8
-0.7
-2.82
-4.97
0.17
-4.2
 -0.7

ge limits, %.

8
0.00
0.00
0.00
0.00
0.00
0.00
0.00
0.00
0.00
0.00
0.000
0.00

st, %

8
-4.0
-4.2
-4.2
-4.3
-4.7
-1.8 savings due to Cxs 0.43
Total loss increase 0.27
-2.0
-1.8
-1.7
-1.7
-3.3
-5.0
-0.2
-4.7
-1.7
ON
OFF

0.04

ean violation of upper

wer limits)
s.
 8
0.00
0.00
0.00
0.00
0.00
0.00
0.00
0.00
0.00
0.00
0.00

with correction for

8
0.0
0.0
0.0
0.1
0.8
0.0
0.0
0.0
0.0
0.0
0.78
1.57

with correction for

8
0.0
0.0
0.0
0.0
0.0
0.0
 0.0
0.0
0.0
0.0
0.00
0.00
0.00

st, %

8
-1.12
-1.53
-1.72
-2.01
-2.68
0.02
-0.12
0.09
0.10
0.10
-1.23
-3.44
2.67

ean violation of upper

wer limits)
s.

8
0.0
0.0
0.0
0.0
0.0
0.0
0.0
0.0
0.0
0.0
0.00
st, %

8
-2.6
-2.8
-2.6
-2.6
-3.0
0.1
0.0
0.3
0.4
0.5
-1.57
-3.72
1.42

ean violation of upper

wer limits)
s.

8
0.0
0.00
0.00
0.00
0.00
0.00
0.00
0.00
0.00
0.00
0.0

st, %

8
-2.7
-3.0
-3.1
 -3.3
-3.9
-0.9
-1.0
-0.6
-0.5
-2.04
-3.88
1.12
-3.9
-0.5
OFF
ON

0.07 0.37

ean violation of upper

wer limits)
s.

8
0.0
0.0
0.0
0.0
0.0
0.0
0.0
0.0
0.0
0.0
0.00
 -0.43

0.3 -0.13
0.3 -0.04
0.301658 0.04

0.37 -0.10
0.37 -0.01
0.37 0.09

0.185 -0.29
0.185 -0.15
0.185 -0.05