2.

Introduction to MOS Amplifiers:

Concepts and
MOS Small-Signal-Model
Sedra & Smith Sec. 5.4 & 5.6
(S&S 5th Ed: Sec. 4.4 & 4.6)

ECE 102, Fall 2012, F. Najmabadi

 NMOS Transfer Function (1)
 Transfer Function: Relation between output and input voltages.

vi =

Circuit Equations:
o NMOS iv characteristics: iD = f (vGS , vDS )
o KVL: vo = vDS = VDD − RD iD

F. Najmabadi, ECE102, Fall 2012 (2/26)

 NMOS Transfer Function (2)

1) For vGS < Vt , NMOS is

in cutoff: iD = 0 &
vDS = VDD − RD iD = VDD

2) Just to the right of point A:

o VOV = vGS − Vt is small, so iD
is small.
o vDS = VDD − RD iD is close to VDD
o Thus, vDS > VOV and NMOS is in
saturation.
F. Najmabadi, ECE102, Fall 2012 (3/26)
 NMOS Transfer Function (2)

4) To the right of point B, vDS < VOV

= vGS − Vt and NMOS enters triode.
Point B is called the “Edge of
Saturation”

3) As vGS increases:
o VOV = vGS − Vt and iD become larger;
o vDS = VDD − RD iD becomes smaller.
o At point B, vDS = VOV

F. Najmabadi, ECE102, Fall 2012 (4/26)

 NMOS Transfer Function (2)

4) To the right of point B, vDS < VOV

1) For vGS < Vt , NMOS is = vGS − Vt and NMOS enters triode.
in cutoff: iD = 0 &
Point B is called the “Edge of
vDS = VDD − RD iD = VDD
Saturation”

2) Just to the right of point A:

o VOV = vGS − Vt is small, so iD
is small.
o vDS = VDD − RD iD is close to VDD
o Thus, vDS > VOV and NMOS is in
saturation.
F. Najmabadi, ECE102, Fall 2012 (5/26)
3) As vGS increases:
o VOV = vGS − Vt and iD become larger;
o vDS = VDD − RD iD becomes smaller.
o At point B, vDS = VOV
 Graphical analysis of
NMOS Transfer Function (1)

vi =

NMOS i-v Characterisitics : iD = f (vGS , vDS )

KVL : VDD = RD iD + vDS

 KVL equation is a plane in this space.

 Intersection of KVL plane with the iv
characteristics surface is a line.  If we look from the bottom (iD
axis out of the paper), we can see
 NMOS operating point is on this line
the transfer function.
(depending on the value of vGS.)

F. Najmabadi, ECE102, Fall 2012 (6/26)

 Graphical analysis of
NMOS Transfer Function (6)

Looking parallel to
vGS axis

Looking from
the bottom
 Every point on the load line
corresponds to a specific
vGS value.
 As vGS increases, NMOS
moves “up” the load line.

F. Najmabadi, ECE102, Fall 2012 (7/26)

 Foundation of Transistor Amplifiers (1)

 A voltage amplifier requires  MOS transfer function is NOT linear

vo/vi = const. (2 examples below)

 vo/vi can be negative (minus sign  In saturation, however, transfer

represents a 180o phase shift) function looks linear (but shifted)

F. Najmabadi, ECE102, Fall 2012 (8/26)

 Foundation of Transistor Amplifiers (2)
 In saturation, transfer function appear to be linear

Approximate the transfer function with a

tangent line at point Q (with a slope of − G):
vDS − VDS = − G (vGS − VGS )
vds = − G vgs (linear relationship)
for vds = vDS − VDS and vgs = vGS − VGS

F. Najmabadi, ECE102, Fall 2012 (9/26)

 Foundation of Transistor Amplifiers (3)

 Let us consider the response if NMOS remains in saturation at all times

and vGS is a combination of a constant value (VGS) and a signal (vgs).

vGS = VGS + v gs

F. Najmabadi, ECE102, Fall 2012 (10/26)

 The response to a combination of vGS = VGS + vgs
can be found from the transfer function

F. Najmabadi, ECE102, Fall 2012 (11/26)

 Response to the signal appears to be linear

 Response (vo = vDS ) is also made of

a constant part (VDS ) and a signal
response part (vds).
 Constant part of the response, VDS ,
is ONLY related to VGS , the constant
part of the input (Q point on the
transfer function of previous slide).
o i.e., if vgs = 0, then vds = 0
 The shape of the time varying portion
of the response (vds) is similar to vgs.
o i.e., vds is proportional to the input
signal, vgs

F. Najmabadi, ECE102, Fall 2012 (12/26)

 Although the overall response is non-linear, the
transfer function for the signal is linear!
Constant: Signal and vds
Bias response

vGS = VGS + vgs

vDS = VDS + vds

vgs
iD = ID + id

Approximately
Non-linear Linear
relationship among relationship among
these parameters these parameters

F. Najmabadi, ECE102, Fall 2012 (13/26)

 Important Points and Definitions!

 Signal: We want the response of the circuit to this input.

 Bias: State of the system when there is no signal.

o Bias is constant in time (may vary extremely slowly compared to signal)
o Purpose of the bias is to ensure that MOS is in saturation at all times.

 Response of the circuit (and its elements) to the signal is different

than its response to the Bias (or to Bias + signal):
o Signal iv characteristics of elements are different, i.e. relationships
among vgs , vds , id is different from relationships among vGS , vDS , iD .
o Signal transfer function of the circuit is different from the transfer
function for total input (Bias + signal).

F. Najmabadi, ECE102, Fall 2012 (14/26)

 Issues in developing a MOS amplifier:

1. Find the iv characteristics of the elements for the signal (which

can be different than their characteristics equation for bias).
o This will lead to different circuit configurations for bias versus
signal

2. Compute circuit response to the signal

o Focus on fundamental MOS amplifier configurations

3. How to establish a Bias point (bias is the state of the system

when there is no signal).
o Stable and robust bias point should be resilient to variations in
µnCox (W/L),Vt , … due to temperature and/or manufacturing
variability.
o Bias point details impact small signal response (e.g., gain of the
amplifier).

F. Najmabadi, ECE102, Fall 2012 (15/26)

 Signal Circuit

1) We will find signal iv characteristics of various elements.

2) In order to use circuit theory tools, we will use the signal iv
characteristics of various elements to assign a circuit symbol.
e.g.,
o We will see that the diode signal iv characteristics is linear so
for signals, diode can be modeled as a “circuit theory” resistor.
o In this manner, we will arrive at a signal circuit.
 Bias and Signal Circuits
Bias & Signal Bias Signal only
= (Bias + Signal) - Bias

+ ?
MOS : vGS , vDS , iD , MOS : VGS ,VDS , I D , MOS : vgs , vds , id ,
(vGS = VGS + vgs ,...)
RD : vR = VR + vr RD : VR , I R RD : vr , ir
iR = I R + ir ..... .....
.....

F. Najmabadi, ECE102, Fall 2012 (17/26)

 Finding signal circuit elements -- Resistor

Resistor Voltage Current iv Equation

Bias + Signal: vR iR vR = R iR
Bias: VR IR VR = R IR
Signal: vr = vR − VR ir = iR − IR ??

vr = vR − VR = RiR − RI R = R (iR − I R ) vr = Rir

 A resistor remains as a resistor in the signal circuit.

F. Najmabadi, ECE102, Fall 2012 (18/26)

 Finding signal circuit elements – IVS & ICS
Independent Voltage Current iv Equation
voltage source
Bias + Signal: vIVS iIVS vIVS = VDD = const
Bias: VIVS IIVS VIVS = VDD = const
Signal: vivs = vIVS − VIVS iivs = iIVS − IIVS ??

vivs = vIVS − VIVS = VDD − VDD = 0 vivs = 0, iivs ≠ 0

 An independent voltage source becomes a short circuit!

Similarly:
 An independent current source becomes an open circuit!

F. Najmabadi, ECE102, Fall 2012 (19/26) Exercise: Show that dependent sources remain as dependent sources
 Summary of signal circuit elements

 Resistors& capacitors: The Same

o Capacitor act as open circuit in the bias circuit.

 Independent voltage source (e.g., VDD) : Effectively grounded

 Independent current source: Effectively open circuit

o Careful about current mirrors as they are NOT “ideal” current sources (early
effect and/or channel-length modulation was ignored!)

 Dependent sources: The Same

 Non-linear Elements: Different!

o Diodes & transistors ?

F. Najmabadi, ECE102, Fall 2012 (20/26)

 Formal derivation of small signal model
 Signal + Bias for element A (iA, vA) : iA = f (vA)
 Bias for element A (IA, VA) : IA = f (VA)
 Signal for element A (ia, va) : ia = g (va)

i A = f (v A )
f ( 2 ) (VA )
= f (VA ) + f (VA ) ⋅ (v A − VA ) + ⋅ (v A − VA ) + ... (Taylor Series
(1) 2

2! Expansion)
f ( 2 ) (VA ) 2
= f (VA ) + f (VA ) ⋅ va +
(1)
⋅ va + ...
2!
≈ f (VA ) + f (1) (VA ) ⋅ va
i A = ia + I A = I A + f (1) (VA ) ⋅ va Small signal means:
f ( 2 ) (VA ) 2
f (1)
(VA ) ⋅ va >> ⋅ va
ia = g (va ) = f (1)
(VA ) ⋅ va 2!
f (1) (VA )
va << 2 ⋅ ( 2 )
f (VA )
F. Najmabadi, ECE102, Fall 2012 (21/26)
 Small signal model vs iv characteristics

Small signal model is equivalent

to approximating the non-liner
iv characteristics curve by
a line tangent to the iv curve at
the bias point
id = f (1) (VD ) × vd
1 nVT
rd = ≈
f (1) (VD ) I D

F. Najmabadi, ECE102, Fall 2012 (22/26)

 Derivation of MOS small signal model (1)
MOS iv equations: iD = f (vGS, vDS)
iG = 0

 Signal + Bias for MOS (iD, vGS , vDS) : iD = f (vGS, vDS), iG = 0

 Bias for MOS (ID, VGS , VDS) : ID = f (VGS, VDS), IG = 0
 Signal for MOS (id, vgs , vds) : id = g (vgs , vds), ig = 0

I D + id = iD = f (vGS , vDS ) (Taylor Series Expansion in 2 variables)

∂f ∂f
= f (VGS , VDS ) + ⋅ (vGS − VGS ) + ⋅ (vDS − VDS ) + ...
∂vGS VGS ,VDS
∂vDS VGS ,VDS

∂f ∂f
≈ ID + × v gs + × vds
∂vGS VGS ,VDS
∂vDS VGS ,VDS

∂f ∂f
id ≈ × v gs + × vds
∂vGS VGS ,VDS
∂vDS VGS ,VDS

F. Najmabadi, ECE102, Fall 2012 (23/26)

 Derivation of MOS small signal model (2)
W
iD = 0.5µ nCox (vGS − Vt ) 2 (1 + λvDS ) = f (vGS , vDS )
L
∂f ∂f
id = ⋅ v gs + ⋅ vds
∂vGS VGS ,VDS
∂vDS VGS ,VDS

∂f W
= 2 × 0.5µ nCox (vGS − Vt )(1 + λvDS )
∂vGS VGS ,VDS
L VGS ,VDS

W
0.5µ nCox (VGS − Vt ) 2 (1 + λVDS )
L 2I
= 2× = D ≡ gm
(VGS − Vt ) VOV
∂f W
= λ × 0.5µ nCox (vGS − Vt ) 2
∂vDS VGS ,VDS
L VGS ,VDS

W
0.5µ nCox (VGS − Vt ) 2 (1 + λVDS )
λI D 1
=λ× L = ≈ λI D ≡
(1 + λVDS ) (1 + λVDS ) ro
vds
id = g m ⋅ v gs + ig = 0
ro
F. Najmabadi, ECE102, Fall 2012 (24/26)
 MOS small signal “circuit” model
vds
ig = 0 and id = g m ⋅ v gs +
ro
Statement of KCL
Input open circuit Two elements in parallel

2⋅ ID 1 2 2V
gm = ro ≈ g m ro = = A >> 1
VOV λ ⋅ ID λVOV VOV

F. Najmabadi, ECE102, Fall 2012 (25/26)

 PMOS small signal model is identical to NMOS

PMOS* NMOS

=
 PMOS small-signal circuit model is identical to NMOS
o We will use NMOS circuit model for both!
o For both NMOS and PMOS, while iD ≥ 0 and ID ≥ 0, signal quantities: id,
vgs, and vds , can be negative!

F. Najmabadi, ECE102, Fall 2012 (26/26)