BENARD MULENGA

Main components of the digital logic layer

The digital logic devises are combined together to form computer processors, computer
memories and other major components of units used for I/O, such devises have to be
interconnected in an organized way to form a complete system. In the vast majority of
modern computers, buses provide interconnections, it is important to note that a bus
interconnects devises through a set of parallel lines and that the lines are classified as
data(Data bus) and address lines(address bus) and control lines(Control bus).

One of the simplest architectures is one based upon a single general purpose bus. This
arrangement tends to be used only on microprocessor and memory can be held up by slower
transfer involving I/O. Most architecture is based upon two buses and follows one of the two
basic alternatives. In both cases the bus used for data transfer between memory and
processor use a faster bus and are also not held up waiting for slower devices used for I/O.
The processor has direct connections to both buses. Data only passes between memory and
the I/O units via the processors. An alternative arrangement, more commonly found on
larger mini computers and mainframes is that which the processor only accesses data via
memory bus.