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Micro Electronics
Micro Electronics
Micro Electronics
Circuits
Common drain amplifier
C D AMPLIFIER---source follower
Small signal model
Active load
Rout---small
Gain by Thevenin equivalent
Full implementation
Bits, pilani
Gain from small signal model
Rs= ro here
Bits, pilani
Av variation
Bits, pilani
Level shifter
How much shift?
Bits, pilani
Ex1-level shifter
Pmos requires high Vg, Swing requirement
nmos requires low Vg
vin
vin
vin
Ex2-level shifter
Charac. Of source follower
Rin--high
Rout--low
Av ≈1
It reduces Vswing of previous stage
Non linearity due to gmb
Vmin at x node of successor
constraint
↓
Comparison of gain with CSA
=1
Level shifter
shifter--useful
useful
PMOS level shifter---shift up
Bits, pilani
C G AMPLIFIER
Small signal model
Bits, pilani
Input impedance Rin
Bits, pilani
Rin for ideal cs load---infinite
Bits, pilani
Rout
Bits, pilani
Transconductance Gm
Gm= gm+go+gmb
Bits, pilani
Voltage gain
No phase shift
Bits, pilani
Transconductance amplifier
Current amplifier
2 STAGE AMPLIFIER
Cascode amplifier
Bits, pilani
Cascode load
Bits, pilani
Small signal model
Bits, pilani
Cd-Cg cascade
Bits, pilani
Voltage swing
Bits, pilani
Ex– analysis using the equivalent
Bits, pilani
Bits, pilani
Trans impedance
Bits, pilani
Analysis in stages
Gain calculation in stages
Or
GM2 Rout2
X [ gm1 (ro1||Rd1)]
Vo1/vin
To compute overall gain using Norton
equivalent
i1
Rin2= 1/gm2
gm vin ↓ ro
Rout1
i1 ↑
Bits, pilani
=
v1
i1 ↑
Bits, pilani
Voltage gain using thevenin eq.
Bits, pilani
Analysis in stages
Bits, pilani
Thevenin equivalent
vo1
Bits, pilani
V1 signal computation
v1 ≠ vin eq
Signal loss takes place
= ro1
v1
Rin2
Bits, pilani
Circuit for Gm computation-2nd stage
This circuit can be used for Gm (= io/v1) calculation
Req will have no effect on Gm value
short
v1
v1
Bits, pilani
This circuit can not be used for Rout computation
v1
Bits, pilani
So Circuit for Rout
computation- 2nd stage
short
v1
1
Bits, pilani
Bits, pilani
Comparison of cascode and CSA
Bits, pilani
Applications
Bits, pilani
Shielding property
Negative feedback
Bits, pilani
Current source load
Bits, pilani
Double Cascode
Bits, pilani
CSA, CASCODE-- SAME GAIN
Differential amplifier
How ?
Differential input no cap. reqd.
Comparison with csa –same power
dissipation
Differential amplifier— extra benefit
Bits, pilani
Extra benefit ---input signal Noise
cancellation
Bits, pilani
CSA-CSA coupled at source
Bits, pilani
CSA with Rs
Bits, pilani
CD-CG cascade
Bits, pilani
Characteristics—diff mode
Bits, pilani
Characteristics—diff mode
Bits, pilani
Lecture-5
Bits, pilani
Transit Frequency
q y
Bits, pilani
MOS capacitances
Cgs
Cgd
Cgb
Csb
Cdb
Bits, pilani
Mosfet amplification at high
f
frequencies
i
Open circuit Voltage gain at high freq.
Short circuit current gain
Maximum oscillation frequency, fmax
MOS unity gain frequency wT
Bits, pilani
Transit frequency
Wt=
Wz
Wz Wt
Bits, pilani
MOS unity gain frequency wT
Limits for MOSFETs:
M t i –C.S
Metric C S short-circuit
h t i it currentt gain
i unit
it pt:
t
wT = (gm-SCgd)/[s(Cgs+Cgd)]
wT is approximately = gm/Cgs
= 3 un(VGS -VT)/2L2
Where gm = (W/L) unCox(VGS -VT) and
Cgs = (2/3)WLCox
so wT≈ 3 μn(VGS -VT)/2L2
Design lessons –
bias at large ID
minimize L (w in as L2) , λ (= 1/L)increases, ROUT dec.
Bits, pilani
use n-channel over p-channel , NOISE increases
UNITY GAIN FREQUENCY
Bits, pilani
BJT circuits
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