STi5202

Low-cost set-top box decoder for H.264 and Microsoft VC1

Data Brief

Features ■ Embedded interfaces

– USB 2.0 host controller/PHY interface
■ Single-chip, video decoder including – DVI/HDMI™ output
– Linux®, Windows® CE and OS21
– Digital audio and video auxiliary inputs
compatible ST40 CPU core: 266 MHz
– Low-cost modem
– Transport filtering and descrambling
– 100BT ethernet controller with integrated
– Video decoder: VC-1 (including WMV 9), MAC and MII/RMII interface for external
H.264 (MPEG-4 part 10) and MPEG-2 PHY
– SVP compliant
– Windows Media™ DRM support
Description
– ST40 32-bit superscaler RISC CPU
The STi5202 is a new generation, set-top
box/DVD decoder chip, and provides very high
performance for low-cost systems. STi5202
includes both VC1 and H.264 video decoders for
new, low bit rate applications.
.

5 x 2-ch
DDR PCM out S/PDIF
SDRAM AudioL Peripheral I/O
2-ch SD and external interrupts
PCM in AudioR video in

32 Audio
ST40 core 266 MHz DACs
2x I/F IR MAFE
UDI 16 K Icache PWM
Audio decoder SmCard Tx/Rx interface
and interfaces
Int. control
System USB 4x 3x
MMU ST231 Digital 6x GPIO ILC
32 K Dcache LMI core 2.0 UARTs SSCs
video input

STBus

CP CUR 3 x GDP DEI

2 x PDES Video decoder 2D gamma
FDMA VC-1 (inc WMV 9)
H264/MPEG-2 blitter Main video
Display display
PTI PTI ST231 compositor
Clock core Aux video EMI EMPI
generator display
and system
Ethernet, DVI-HDCP Output stage DENC
services
MII/RMII HDMI
TSmerger/router DACs DACs

MII/RMII for 100BT Main video Main video Aux video Digital Flash
Ethernet output (ED) output (ED) output (SD) video or companion chip
TSIN0 TSIN1 TS I/O YPbPr YC/CVBS output
NRSS-A

October 2007 Rev 1 1/9

For further information contact your local STMicroelectronics sales office. www.st.com 9
Typical applications STi5202

1 Typical applications

Figure 1. Low-cost satellite set-top box

IR Tx/Rx
2 x 128 Mbit
DDR1

Transport
QPSK Rx stream in
STi5202 RGB/YPbPr/
STv0299 HDMI
+STb6000

CVBS/YC

VCR
PTSN MAFE
Smart Flash
cards

Figure 2. Low-cost cable set-top box with return channel

CableCARD™
interface Flash
2 x 128 Mbit
DDR1

Tuner and
Broadcast
SAW filter
EMI
STv0498
+STv0130
IB data/ Tuner and
OOB SAW filter
Cable
front end
QAM/QPSK STi5202
transceiver
RGB/YPbPr/
Duplex HDMI
filter IR
Tx/Rx
PGA
Upstream
CVBS/YC
RS232
Smart
cards VCR

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STi5202 Typical applications

Figure 3. Low-cost dual satellite and terrestrial set-top box with HDD and DVD

IR
DVD 2 x 128 Mbit
Tx/Rx
optical DDR1
Flash HDD interface
chip

EMI USB

QPSK Rx

STV0299
+STB6000 STi5202

DVB-CI RGB/YPbPr/
8VSB Rx HDMI
Tuner STV0370
RS232

USB 2.0
Smart HDD
cards
(expansion)
PSTN
MAFE

Figure 4. Low-cost IP-TV set-top box with HDD

IR
Tx/Rx
Flash
DDR1
HDD

EMI USB

MII
Ethernet
PHY
STi5202
RJ45

RGB/YPbPr/
HDMI

RS232

USB 2.0
Smart HDD
cards
(expansion)

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Typical applications STi5202

1.1 Detailed features

The STi5202 is a single-chip,standard-definition video decoder including:
● Flexible audio decoder
● Windows Media™ DRM support
● Microsoft® VC-1, WMA9 and H.264 MPEG2 support
● Linux®, Windows® CE and OS21 compatible ST40 CPU core: 266 MHz
● Transport filtering and descrambling
● SVP compliant
● Graphics engine and dual display: standard and enhanced definition
The STi5202 also features the following embedded interfaces:
● USB 2.0 host controller/PHY interface
● DVI/HDMI™ output (optional)
● Low-cost modem
● 100BT ethernet controller with integrated MAC and MII/RMII interface for external PHY
The processor subsystem uses the ST40 32-bit superscaler RISC CPU and includes:
● 266 MHz, 2-way set associative 16-Kbyte ICache, 32-Kbyte DCache, MMU
● 5-stage pipeline, delayed branch support
● Floating point unit, matrix operation support
● Debug port, interrupt controller
The transport subsystem includes:
● TS merger/router
– Merging of 3 external transport streams (2 serial/parallel inputs, 1 bidirectional
interface)
– Transport streams from memory support
– NRSS-A module interface
● Programmable transport interfaces (PTIs)
– Two programmable transport interfaces
– Two transport stream demultiplexers: DVB, DIRECTV®, ATSC, ARIB, OpenCable,
DCII
– Integrated DES, AES, DVB and Multi2 descramblers
– NDS random access scrambled stream protocol (RASP) compliant
– NDS ICAM CA
– Support for VGS, Passage

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STi5202 Typical applications

The video/graphics subsystem includes:

● Microsoft WMV 9/VC-1 MP@ML and AP@L1/H.264(MPEG-4 part 10) main and high
profile level 3/MPEG-2 MP@ML video decoder
– Advanced error concealment and trick mode support
– Dual SD decoding
● SD digital video input
● Displays
– One ED display multi format capable (480p/576p, 480i/576i)
- analog ED output RGB or YPbPr
- HDMI encoded output
– One standard-definition display
- analog SD output: YPbPr or YC and CVBS
● Gamma 2D graphics processor
– Triple source 2D gamma blitter engine
– Alpha blending and logical operations
– Color space and format conversion
– Fast color fill
– Arbitrary resizing with high quality filters
– Acceleration of direct drawing by CPU
● Gamma compositor and video processor
– 7-channel mixer for enhanced definition output
– Independent 2-channel mixer for SD output
– 3 graphic display planes
– High-quality video scaler
– Motion and detail adaptive deinterlacer
– Linear resizing and format conversions
– Horizontal and vertical filtering
● Copy protection
– HDMI/HDCP copy protection hardware
– SVP compliant
– Macrovision® copy protection for 480i, 480i, 576i, 576p outputs
– DTCP-IP
– AWG-based DCS analog copy protection

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Typical applications STi5202

The audio subsystem includes:

● Digital audio decoder
– Support for all the most popular audio standards including WMA-9, WMA-9 Pro,
MPEG-1 layer I/II, MPEG-2 layer II, MPEG-2 AAC, MPEG-4 AAC LC 2-
channel/5.1 channel MPEG-4 AAC+SBR 2-channel/5.1 channel, Dolby® Digital
EX, Pro Logic® II, MLP™ and DTS®
– PCM mixing with internal or external source and sample rate conversion
– 6- to 2-channel downmixing
– PCM audio input
– Independent multichannel PCM output, S/PDIF output and analog output
● Stereo 24-bit audio DAC for analog output
● IEC958/IEC1937 digital audio output interface (S/PDIF)
● CSS/CPxM copy protection hardware
Available interfaces include:
● External memory interface (EMI)
– 16-bit interface supporting ROM, flash, SFlash, SRAM, peripherals
– Access in 5 banks
– High speed synchronous mode for interconnecting two STi5202 devices
● External microprocessor interface (EMPI)
– 32-bit MPX satellite, target-only interface
– Synchronous operation at MPX clock speed, capable of 100 MHz
● Local memory interface (LMI)
– Interface (1 x 32-bit) for DDR1 200-MHz (DDR400) memories, supports 128-,
256-, 512-Mbit, and 1-Gbit devices
● USB 2.0 host controller/PHY interface
● 100BT ethernet controller, MAC and MII/RMII
On-chip peripherals:
– 4 ASCs (UARTs) with Tx and Rx FIFOS, two of which can be used in smartcard
interfaces
– 2 smartcard interfaces and clock generators (improved to reduce external
circuitry)
– 3 SSCs for I²C/SPI master slaves interfaces
– Serial communications interface (SCIF)
– 2 PWM outputs
– Teletext serializer and DMA module
– 6 banks of general purpose I/O, 3.3 V tolerant
– SiLabs line-side (DAA) interface
– Modem analog front end (MAFE) interface
– Infrared transmitter/receiver supporting RC5, RC6 and RECS80 codes
– UHF remote receiver input interface
– Interrupt level controller and external interrupts, 3.3 V tolerant
– Low power/RTC/watchdog controller
– Integrated VCXO

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STi5202 Typical applications

– DiSEqC 2.0 interface

– PWM capture/compare functions
● Flexible multi-channel DMA
Services:
● JTAG/TAP interface, ST40 toolset support, ST231 toolset support
Package:
● 27 x 27 FPBGA, 620 balls.

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Revision history STi5202

2 Revision history

Table 1. Document revision history

Date Revision Changes

19-Oct-2007 1 Initial release.

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STi5202

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