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Generalized Signed-Digit Number Systems Unifying Framework For Redundant Number Representations
Generalized Signed-Digit Number Systems Unifying Framework For Redundant Number Representations
JANUARY 1990 89
Abstract-Signed-digit (SD) number representation systems Whenever long sequences of computations are to be
have been defined for any radix r L 3 with digit values ranging performed on particular pieces of data, the one-time conver-
over the set { -a, . . . , - 1, 0,1, . * a},where a is an arbitrary
a ,
integer in the range 112 r < a < r. Such number representation sion and reconversion effort to/from the OSD representation is
systems possess sufficient redundancy to allow for the annihila- more than compensated for by the gain in computation speed.
tion of carry or borrow chains and hence result in fast The crossover point is surpassed much more frequently in the
propagation-free addition and subtraction. In this paper, we refer case of maximally redundant OSD representations (for which
to the above as “ordinary” SD number systems and define a = r - l), since conventional radix-r numbers C ~ I !be
generalized SD number systems which contain them as a special
symmetric subclass. It is shown that the generalization not only interpreted as maximally redundant OSD numbers, with no
provides a unified view of all redundant number systems which need for the initial conversion [7]. However, maximally
have proven useful in practice (including stored-carry and redundant OSD number systems may consume more storage
stored-borrowed systems), but also leads to new number systems space than the corresponding minimally redundant or interme-
not examined before. Examples of such new number systems are diate OSD number systems.
stored-carry-or-borrow systems, stored-double-carry systems,
and certain redundant decimal representations. The original definition of SD arithmetic uses a symmetric
digit set and precludes the case of r = 2, since such a binary
Index Terms-Asymmetric signed-digit number systems, bi- signed-digit (BSD) number system possesses insufficient
nary signed-digit numbers, computer arithmetic, number repre- redundancy for the general carry-free addition algorithm to be
sentation, redundant number systems, signed-digit arithmetic, applicable. This is also the reason behind the requirement that
stored-borrow representation, stored-carry representation.
a be greater than 1/2 r, even though a = 1/2 r is a viable
selection for a redundant number system if r is even (see
I. INTRODUCTION below). However, BSD numbers possess interesting properties
OR any radix r 2 3, there are one or more signed-digit [20] and have been in practical use for representing intermedi-
F ( S D ) number representation systems [2]-[4]. These ate values in two’s complement and high-speed multiplication
ordinary SD (OSD) number systems correspond to different schemes ever since multiplier recoding was introduced by
values of a in the range 1/2 r < a < r, from the minimally Booth [6]. They have also been used in redundant quotient
redundant system (a = L1/2 rJ +
1) to the maximally representation for the S-R-T division algorithm which was
redundant one (a = r - l), where a determines the set { - a, proposed independently by Sweeney [ 141, Robertson [22], and
-
..., - 1, 0, 1, * a} of the 2 a + 1 digit values used. The
e ,
Tocher [24].
most important property of OSD number representation The generalization which is proposed here not only unifies
systems is the possibility of performing carry-free addition and the OSD and BSD number systems, but also covers as special
(by changing all the digit signs in the subtrahend) borrow-free cases all other useful redundant representations such as those
subtraction. offered by stored-carry and stored-borrow systems. It also
The carry-free addition property of OSD number systems is provides valuable insight into the relationships of various
best understood by a conceptual “recoding” process which redundant number representation systems and leads to some
replaces each f a value in the digit-by-digit position sum of new representation methods which are interesting in their own
two operands by f (a - r ) and an outgoing transfer digit of right. The stored-carry-or-borrow representation system is
f 1. The new digit value, which has a magnitude r - a in the probably the most important of these new methods and is thus
range 0 < r - a < 1/2 r < a,always absorbs an incoming explored in depth.
transfer digit of f 1, thus stopping its propagation. 11. GENERALIZED
SIGNED-DIGIT
NUMBER
SYSTEMS
We define a generalized signed-digit (GSD) number
system as a positional system with the digit set { - a, - a +
Manuscript received May 15, 1987; revised December 19, 1987. This work
was carried out while the author was a Visiting Professor at the University of
Waterloo and was supported in part by the Natural Sciences and Engineering 1, * , p - 1, p } with the conditions a 2 0, 0 L 0, and a +
Research Council of Canada under Grants G1140, A3055, and A5515. + 1 > r, where r is the number representation radix. The
excluded case of a + + 1 = r results in nonredundant
The author is with the Department of Electrical and Computer Engineering,
University of California, Santa Barbara, CA 93106.
IEEE Log Number 8930844. number representation systems which cover the conventional
pLX+p. (5)
Proof: The existence of an integer value for t i + l
satisfying (4) implies
(6)
r r
+ +
Letp, a - X = ryi Si, where Si (0 I6; 5 r - 1) is the
pi remainder of dividing p i + a - A by r. Then, (6) becomes
N\\Y
y i + 6;- ( a - h )--
/3 - p
5 Yi
r
Simplifying this inequality and noting that a + /3 = r +p -
1 yields
I
p?X+p-(r- 1 -Si). (7)
Fig. 2. The range of transfer digit values as a function of position sum for
carry-free addition. Inequality (7) must hold for all possible values of 6;. If we
show that Si = r - 1 for some p i in the range - 2a Ip i I
A
‘i+l +
20, the desired conclusion ( p I X p ) will be immediate.
Consider the case Si = r - 1 with y i = 0. We have in this
case
p i = S i - ( a - h ) = r - 1- ( a - A ) . (8)
Clearly, p i in (8) satisfies p i 2 - 2a. It satisfies p i I2/3 if we
have p 2 X - 0.This concludes the proof for the case p I X
- p. If p < X - 0,let 6; = r - 1 with yi = - 1. We have in
this case
t p i = - r + & - ( a - X ) = -1-(a-A). (9)
ta Pi
p12+
which is cleary satisfied for all the values of 6 in the assumed For 6= 1, inequality (18) is satisfied iff p 1 3. For 2 5 6 I
range. A similar argument shows that r - 1, inequality (18) is satisfied iff p 1 2 . The proof is
complete upon noting that 6 = 1 and p = 2 imply either (Y = 1
or a = r (0 = 1). a
Algorithm 2 (transfer digit selection for carry-free
which is satisfied by (1I). a addition): The transfer digit ti+ is selected to be k iff c k 5 p i
Corollary I: In a GSD number system, the set of possible < C k + ] , w h e ~ e C - ~-o3,CP+]
= = mandeachC,(-h<
j Ip ) is a known comparison constant to be specified later.
transfer digit values must have at least rp/(r - 1)1 + 2
members if the carry-free addition algorithm is to be applica- Clearly, the values of comparison constants in Algorithm 2
ble. directly affect the complexity of the GSD adder. In general,
Proof: The set of possible transfer digit values must have there may be several valid choices for each Cj and thus the one
at least A"" + +
pmin 1 members. We have from Lemma 2 which results in the simplest possible hardware realization can
be selected. The following theorem specifies the range of valid
choices for Cj.
Theorem 2: For carry-free addition of GSD numbers, the
comparison constants c k ( - h < k 5 p ) of Algorithm 2 must
satisfy the following constraints:
1 ' 1 I"[ 1 9 1
Amin + pmin =
r-1
+
r- 1 r- 1
. (15) So the boundary between choosing k - 1 and choosing k (i.e.,
Ck)mustliebetween kr - (a - X)and(k - 1)r + - p +
PARHAMI: SIGNED-DIGIT NUMBER SYSTEMS
IV. LIMITED-CARRY
ADDITION
OF GSD NUMBERS
(2B+a-l'),,
for D and F from Fig. 5 , we obtain
Fig. 5. Generating a binary range estimate e,+ for the transfer digit t,, I . pbmax( [z]
r- 1 r- 1 ) .
X ' + [L]
+p', (30)
Therefore, valid choices for E are in the range D < E 5 F. Inequality (30) and the conditions X' < X"'" and p' < p"'"
Substituting the expressions for D and F from Fig. 5, we dictate
obtain the desired result. 0
Algorithm 5 (transfer digit selection for limited-carry
addition): The transfer digit ti+ is selected to be k iff Ck(ei)
5 p i < Ck+l(ei), where C P x ( l )= C P x ( h ) = -03,
h.Imin( [z]
r - 1 -1, I"]
r- 1 ) p- (31a)
Consider the three cases a = 0, a = r, and 0 < a < r. For a presented here allows replacing the second condition by p, 2
= 0, the values A' = - 1 and p' = 1 satisfy the conditions 4 which is easier to test in hardware (only the sign bit and a
given by (33). For a = r, the values A' = 1 and p' = - 1 single value bit need to be examined).
satisfy the conditions given by (33). Finally, for 0 < a < r, Maximally redundant OSD number systems have a = r -
the values A' = p' = 0 satisfy the required conditions. This 1 . Let r > 4, since for r = 3 or r = 4, maximally redundant
concludes the proof for p = 1 . For the final case of p = 2 with and minimally redundant OSD systems are identical. For such
either a or /3 equal to 1 , we consider the two possibilities: a = systems, p = r - 1 L 3 and we find the following ranges for
1 and a = r. The required conditions in this case are the comparison constants:
A' + p ' 2 0 (344 -(r-22)1C05 - 1
A'rmin( 1'1 r- 1
- 1 , 2- 1-
r+l-a
)
r- 1
(34b)
2 s C l s r - 1.
P' S m i n ( I"'-"]
r-1 - 1, 2- 1
5
1) . implementation details. For example, consider the case of r =
(34C) 8. Ifp; is formed in sign-and-magnitude or one's complement
form, then CO= - 3 and C1 = 4 are the best choices, since
It is easily seen that in both cases of a = 1 and a = r, the the comparisons pi 1 - 3 and pi 2 4 involve the testing of the
A' = sign and a single value bit. If negative values are represented
= the conditions given by (34).
in two's complement form, then CO= - 4 and CI = 4 are the
V. ORDINARY SIGNED-DIGIT NUMBER SYSTEMS best choices. Note that both cases are different from Avi-
Ordinary signed-digit (OSD) number representation sys- zienis's original OSD proposal which specifies CO= - 6 and
= for =
tems have been defined for any radix r 1 3 with digit values
ranging over the set { - a , * * , - 1 , 0 , 1 ,- a } , where a is
e ,
Such
applied
changes to the original OSD proposal can also be
to intermediate OSD systems with 112 r + 1 < a < r
an arbitrary integer in the range 1/2 < < r. An OSD
number system has a redundancy index in the range 2 Ip < - 1 to obtain similar improvements.
r. The fact that 1 < 112 r < a < r implies that a # 1 mod (r VI. STORED-CARRY NUMBER SYSTEMS
- 1) and thus the cany-free addition algorithm is applicable
even when p = 2. We have for all OSD number systems Stored-carry number representation systems can be defined
for any radix r as having the digit set ( 0 , 1, 2, * * r}, e ,
pi,the choice E = 2 is more convenient since the condition p, 2) the (n, p ) encoding, consisting of “negative” and
L E of Algorithm 4 can be checked by examining the logical “positive” flags for each digit, whereby i, 0, and 1 are
OR of the two most significant bits of pi. It is possible to represented by (1, 0), ( 0 , 0), and (0, l ) , respectively.
generate the range estimate directly as a function of xi and yi If a digit d is represented as (ds, du)with the first and as
(four logic variables) rather than waiting for the computation ( d ” , dP) with the second encoding, then the following
of pi. This speeds up the addition process at the expense of a equalities hold:
somewhat more complex design. If the encoding (1, 0) is d = ( l -2ds)du=dp-d”.
disallowed for representing the BSC digit 1, then the choice E
It has been shown that the second encoding results in much
= 3 turns out to be more convenient and simplifies the overall
simpler implementations for most arithmetic circuits of inter-
design considerably. If the unary encoding is used, the absence
est [20]. Both encodings allow the implementation of normal-
of (1, 0) can be ensured by adding an initial pair of gates that
ized significant digit arithmetic [15] if the extra combination
convert each digit encoding ( a l ,a2) to ( a l a 2 ,al + 4.
(( 1 , O ) in the (s, U ) encoding and (1, 1) in the (n,p ) encoding)
VII. STORED-BORROW NUMBER SYSTEMS is used to denote nonsignificant zeros. On the other hand, the
extra combination ( 1, 0) of the (s, U ) encoding and the unused
Stored-borrow number representation systems can be de- (1, 1) ofthe (n,p) encoding can be used as DON’T
fined for any radix as having the digit set { i, O, * * ’
-
3 9
CARE conditions to obtain simpler designs. It is also possible to
11. In the special case of r = 2, we obtain the binary stored- use a l-out-of-3 encoding where a binary signed digit is
PSB) Or signed-digit (BSD) number system by the triple (n,0,p),with the middle flag denoting
with the digit set { i, 0, I}. In addition to having been used for the zero. Such an can provide complete
representing temporary values in high-speed multiplication unidirectional error detection capability with a relatively low
and division [61, [ 141 [221, [241, BSD numbers have been overhead in terms of add& hardware complexity.
3
proposed for application Over the entire range of data storage An important property of BSD numbers is that there exists a
and processing functions in special-purpose arithmetic engines propagation-free recoding algorithm which transforms any
1201. A BSD number can be added to a conventional binary BSD number = x k 1~x k - 2 . . . xo into an equivalent BSD
number, producing a BSD result, by a set of adder-like cells number = ZkZk- . . . zo, such that z,.z,-, + 1 (1 j
without carry or borrow propagation.
k). This recoding enables the use of a special carry-free
That two BSD numbers can be added by a limited-carry addition process instead of the limited-carry process and also
circuit is known r813 [23i. This property for SB leads to higher-speed serial or parallel multiplication. The
numbers in radices from Our 53 the details can be found in [20] and thus will not be discussed here.
circuit implied by our limited-carry addition procedure is As BSD numbers require the Same amount of storage as the
different from the previously proposed implementations. In stored-carry representation (2 bits per digit position), it is
adding two BSB Or BSD we have h”””= and pm’” natural to ask whether BSD numbers offer any advantage over
= 1 from (10) and (11). To design the needed circuit, we start the BSC system. The is positive for the following
by selecting appropriate values for h‘ and p ’ satisfying (28) reasons:
and (31) which for the BSB number system become
1) ease of multiplication, division, and other arithmetic
h’+p’10 operations,
2) ease of zero detection,
X‘rO
3) suitability for use with arithmetic error codes.
p’I0. These points have been dealt with elsewhere [20].
Clearly, the only possible choices are A‘ = p’ = 0. The VIII. STORED-CARRY-OR-BORROW
NUMBER
SYSTEMS
comparison constant E of Theorem 3 must satisfy The stored-carry and stored-borrow properties can be
-1<E~l. combined to obtain the SCB number representation systems
which in radix r use the digit set { 1, 0, 1, * * * , r } .
The most convenient value for E depends on the encoding used Unfortunately, despite the higher redundancy index ( p = 2)
to represent p,.In most cases, however, the choice E = 0 is compared to the SC and SB systems (p = l ) , carry-free
convenient since the condition p, 2 E of Algorithm 4 can addition is still not possible because we have CY = 1 (refer to
be checked by determining the sign of p,. It is also possible Theorem 1). Furthermore, other arithmetic algorithms (such
to generate the range estimate directly as a function of x, and y, as multiplication) can only become more difficult due to the
(four logic variables) rather thap waiting for the computation extra digit value. It is therefore quite surprising for SCB
of p,,as was the case for BSC numbers. number systems to find any application at all.
In two-valued logic, each binary signed digit can be One possible application area for SCB number Systems is in
represented by two bits, using several possible encociings. the design of systolic up/down counters. The binary SCB
Two natural encodings are (BSCB) number system was first used in the design of a
1) the (s, U ) encoding, consisting of “sign” and “value” systolic up/down counter in 1982 [9], apparently without any
bits for each digit, whereby 1, 0, and 1 are represented by (1, attention to its arithmetic properties. A later systolic binary
l ) , (0, 0), and ( 0 , l ) , respectively, counter design by the author [17] also used the BSCB number
PARHAMI: SIGNED-DIGIT NUMBER SYSTEMS 97
system in a different disguise. It was this application of the systems is the use of digits with larger magnitudes and thus the
BSCB number system that prompted the author to study the potential for more difficult multiplication and division. The
properties of GSD number systems. suitability of such new number systems must be evaluated in
In the systolic binary counter application, the magnitude of the context of particular application areas. However, one can
the count can be stored as a BSCB number, with the sign immediately conclude that SDC number systems are attractive
maintained separately. Assuming that the count value 0 is for applications where addlsubtract operations are dominant.
detectable without a need for signal propagation and that the Other potentially useful subclasses are decimal number
value 0 is always given the positive sign, then the various systems with higher redundancy indexes than the decimal SDC
counter operations can be performed as follows. system. For example, the hex-digit decimal (HDD) number
1) To count up from a nonnegative value, increment the system with the digit set ( 0 , 1, . . 15} implies no storage
0 ,
[81 C. Y. Chow and J. E. Robertson, “Logical design of a redundant [26] V . Zakharov, “Parallelism and array processing,” ZEEE Trans.
binary adder,” in Proc. Symp. Comput. Arithmetic, Santa Monica, Comput., vol. C-33, no. 1, pp. 45-78, Jan. 1984.
CA, Oct. 1978, pp. 109-115.
191 L. J. Guibas and F. M. Liang, “Systolic stacks, queues, and
counters,” in Proc. Conf. Advanced Res. VLSZ, MIT, 1982, pp.
155-164.
L. B. Jackson Digital Filters and Signal Processing. Boston, MA:
Kluwer, 1986.
R. W. Hockney and C. R. Jesshope, Parallel Computers. Bristol, Behrooz Parhami (S’70-M’73-SM’78) was born
England: Adam Hilger, 1981. on February 1, 1947 in Tehran, Iran. He received
D. E. Knuth, The Art of Computer Programming: Vol. 2 Seminu- B.S. and M.S. degrees in electrical engineering
merical Algorithms, 2nd ed. Reading MA: Addison-Wesley, 1981, from Tehran University and Oregon State Univer-
pp. 179-197. sity, in 1968 and 1970, respectively, and the Ph.D
S.-Y. Kung, R. E. Owen, and J. G. Nash, Eds., VLSI Signal degree in computer science from University of
Processing IZ. New York: IEEE Press, 1986. California at Los Angeles in 1973.
0 . L. MacSorley, “High-speed arithmetic in binary computers,” He was a Research Assistant/Engineer (1970-
Proc. IRE, vol. 49, pp. 67-91, Jan. 1961. 1973) and Acting Assistant Professor (1973-1974)
N. Metropolis and R. L. Ashenhurst, “Significant digit computer at UCLA before joining Sharif (then Arya-Mehr)
arithmetic,” IRE Trans. Electron. Comput., vol. EC-7, pp. 265- University of Technology (SHUT) in Tehran, Iran,
267, 1958. where he was Professor of Computer Science until 1988 During his tenure at
G . Metze and J. E. Robertson, “Elimination of carry propagation in SHUT, he was active in the areas of educational planning and curriculum
digital computers,” in Inform. Processing ’59 (Proc. UNESCO development and also taught a wide variety of courses This led to his
Conf., June 1959), 1960, pp. 389-396. involvement in the development of a standard nationwide computer science
1171 B. Parhami and A. Avizienis, “Detection of storage errors in mass and engineering program which has been in effect in all major Iranian
memories using low-cost arithmetic error codes,” ZEEE Trans. universities since 1983. Since 1972, he has acted as a consultant to various
Comput., vol. C-27, no. 4, pp. 302-308, Apr. 1978. organizations, been involved m standardization activities, participated in
B. Parhami, “Systolic upidown counters with zero and sign detection,” many conference organizing and program commttees, and served on the
in Proc. Symp. Comput. Arithmetic, Como, Italy, May 1987, pp. editorial and advisory boards of several technical publications (including a
174- 178. five-year term as Editor of Computer Report, a Farsi-language computing
-, “A general theory of cany-free and limited-carry computer periodical) In 1986-1988, he was on sabbatical leave as Visiting Professor at
arithmetic,” in Proc. Canadian Conf. VLSZ, Winnipeg, Canada, Oct. the University of Waterloo and Carleton University in Canada, before joining
1987, pp. 167-172. University of California at Santa Barbara as Professor of Computer
-, “ C a q - f r e e addition of recoded binary signed-digit numbers, ” Engineering in 1988 Dr Parhami has published more than 60 research papers
ZEEE Trans. Comput., pp. 1470-1476, Nov. 1988. in the areas of computer architecture, computer arithmetic, dependable
-, “On the practical implementation of arithmetic functions with computing, Farsi-language information processing, and informatics educa-
generalized signed-digit number representation, ” submitted for publi- tion He has also authored two Farsi-language texts entitled Computer
cation. Appreciation and Computer Organization, Vol. 1: Basics of Hardware
17-21 J. E. Robertson, “A new class of digital division methods,” ZEEE and has coauthored a 6000-term English-Farsi Glossary of Computers and
Trans. Comput., vol. C-7, pp. 218-222, Sept. 1958. Informatics. His current research interests are in the general areas of
1231 N. Takagi, H . Yasuura, and S. Yajima. “High-speed VLSI multiplica- computer hardware and organization, including high-performance systems
tion algorithm with a redundant binary addition tree,” ZEEE Trans. and dependability issues
Comput., vol. C-34, no. 9, pp. 789-796, Sept. 1985. Dr. Parhanu is a Distinguished Member of the Informatics Society of Iran
K. D. Tocher, ”Technique for multiplication and division for auto- (ISI), and a member of the Association for Computing Machinery, and the
matic binary computers,” Quarterly J. Mech. Appl. Math., vol. 11, British Computer Society. He was the founder of IS1 and served as its first
part 3, pp. 364-384, 1958. president from 1978 to 1983. He also served as Chairman of IEEE Iran
1251 C. S. Wallace, “A suggestion for a fast multiplier,” ZEEE Trans. Section from 1977 to 1986, following a one-year term as Vice-chairman and
Electron. Cornput., vol. EC-14, no. 1, pp. 14-17, Feb. 1964. received the IEEE Centennial Medal in 1984.