Analog Circuits and Systems Through SPICE Simulations

Assignment -3

Attempt all questions

1. For a very high impedance biopotential electrode for a relatively low frequency signal, the input impedance of the frontend amplifier should be
preferably _____________ and can be implemented through _____________ coupling.
(a) low, resistive (b) high, capacitive (c) low, capacitive (d) high, resistive

2. The maximum applicable gain in the frontend may be primarily limited by

(a) power dissipation limit (b) large base-line drift (c) signal frequency (d) noise of the amplifier

3. _________ is the primary concern for the frontend amplifier, while _________ may be a more serious issue for the VGA :
(a) linearity, noise (b) noise, linearity (c) gain, noise (d) noise, gain

4. Capacitive feedback satisfies the ____________ requirement but complicates ___________ biasing considerations.
(a) input impedance, biasing (b) power, bandwidth (c) biasing, gain (d) bandwidth, impedance

5. For a fully differential amplifier with active load, with perfectly matched transistor pairs, what can create large uncertainity in output DC points
for given fixed bias at the gate of load devices, input devices and the current source device?
(a) uncertainty of threshold voltages (b) uncertainty of lambda (c) none (d) both

6. A fully differential amplifier with perfectly matched devices would have ________ PSRR with if the output is taken differentially
(a) infinite (b) zero (c) very large (d) very small

7. Differential to common mode conversion can result from

(a) mismatch between the input devices (b) mismatch between the load devices (c) supply noise (d) variation in tail current

8. Extracting common mode signal using resistive divider would result in :

(a) reduction in bandwidth (b) increase in area (b) reduction in gain (c) increase in output noise

9. The common mode feedback voltage can be applied to

(a) load device (b) tail current course (c) load device and tail current source (d) load device or tail current source

10. For a 2-stage fully differential amplifier wit NMOS input device, the 1st stage CMFB amplifier should have ___ input and 2nd stage ____ input:
(a) PMOS , NMOS (b) NMOS, PMOS (c) NMOS, NMOS (d) PMOS, PMOS

11. The CMFB can be seen as a __________ feedback topology, while opening the loop between the output of the main amplifier and the error
amplifier
(a) shunt-shunt (b) shunt-series (c) series-shunt (d) series – series

12. The CMFB loop bandwidth must be equal to the main amplifier’s closed loop bandwidth:

(a) False (b) True