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Design of 16 Bit ALU Using Registers: Bachelor of Technology in
Design of 16 Bit ALU Using Registers: Bachelor of Technology in
Bachelor of Technology
In
M. Venkateshwar Rao
Asst. Prof.
CERTIFICATE
This is certify that this project report entitled “Design of 16 BIT ALU using scan
registers” is a bonafide work done by
In partial fulfillment of the requirement for the award of graduate degree in Bachelor
of Technology in Electronics and Communication Engineering under our supervision
and guidance for academic session 2018-2019.
Asst.prof Professor
External Examiner
A mini project report on
Bachelor of Technology
In
M. Venkateshwar Rao
Asst. Prof.
CERTIFICATE
This is certify that this project report entitled “Design of 16 BIT ALU using scan
registers” is a bonafide work done by
Asst.prof Professor
External Examiner
A mini project report on
Bachelor of Technology
In
M. Venkateshwar Rao
Asst. Prof.
CERTIFICATE
This is certify that this project report entitled “Design of 16 BIT ALU using scan
registers” is a bonafide work done by
In partial fulfillment of the requirement for the award of graduate degree in Bachelor
of Technology in Electronics and Communication Engineering under our supervision
and guidance for academic session 2018-2019.
Asst.prof Professor
External Examiner
A mini project report on
Bachelor of Technology
In
CERTIFICATE
This is certify that this project report entitled “Design of 16 BIT ALU using scan
registers” is a bonafide work done by
In partial fulfillment of the requirement for the award of graduate degree in Bachelor
of Technology in Electronics and Communication Engineering under our supervision
and guidance for academic session 2018-2019.
Asst.prof Professor
External Examiner
REFERENCES
[3] B. Raghu Kanth, B. Murali Krishna, G. Phani Kumar, J. Poornima, K. Siva Rama
Krishna, “ A comparitive study of reversible logic gates,” International Journal of
VLSI & Signal Processing Applications, vol. 2, no. 1, pp. 122-136, Feb. 2012.
[5] K. Zhijin Guan, O. Wenjuan Li, J. Weiping Ding, C. Yueqin Hang, and P. Lihui Ni,
“An
Arithmetic Logic Unit Design Based on Reversible Logic Gates,” IEEE Pacific Rim
Conference on Communications, Computers and Signal Processing (PacRim), 2011.
[6] H. Thapliyal and M.B. Srinivas, “Novel reversible TSG gate and its application
for
designing components of primitive reversible/qunatum ALU,” Fifth International
Conference on Information, Communication, And Signal Processing, 2006.
[7] H. Thapliyal and M.B Srinivas,”Novel design and reversible logic synthesis of
multiplexer based full adder and multipliers.” 48th Midwest Paper Presented at
Symposium on Circuits and Systems, 2005.
[8] K. Lal Kishore and V.S.V.Prabhakar, VLSI Design. New Delhi: I.K. International.