Acer Aspire5560 (Wistron Ag1 UMA-1-0309 PDF

A B C D E DC/DC
SYSTEM
AG1 Block Diagram

TPS51120 41
Project code: 91.4A901.001 INPUTS OUTPUTS
PCB P/N : 55.4A903.XXX
5V_S5
REVISION : 05225-1 DCBATOUT
Mobile CPU
3V_S5
CLK GEN. (Hannstar, GCE)

4 G792 PCB STACKUP 4
ICS954305D Yonah 478 19
SYSTEM DC/DC
(IDT CV155) TOP MAX8743EE 42
3
Celeron M 4, 5 VCC INPUTS OUTPUTS
TVO
14 S 1D05V_S0
HOST BUS 400/533/667MHz DCBATOUT
LVDS 14"WSXGA+ 1D8V_S3
DDR2 533/667MHz LCD 13
S
TPS51100 44
533/667 MHz RGB CRT
GND
11,12 CRT 1D8V_S3 DDR_VREF
Calistoga 14 BUTTOM
DDR2 533/667MHz
APL5332KAC 44
533/667 MHz 6,7,8,9,10 3D3V_S5 2D5V_S0
11,12 PCMCIA I/F

3 PCMCIA APL5912-U 44 3
DMI I/F 100MHz
TI SLOT
Support 3D3V_S5 1D5V_S0
Line In PCI 7412 PWR SW
29 TSP2220A TypeII
27
Codec AZALIA 27 MAXIM CHARGER
CARDBUS MAX8725+Max1773 43
29 ALC883 PCI BUS 1394
28
CardReader 1394 INPUTS OUTPUTS
CONN 26 MS/MS Pro/xD/
MIC In 24,25 BT+
MMC/SD/SDIO
6 in 1 18V 4.0A
26 DCBATOUT
Line Out UP+5V
(SPDIF)
OP AMP
ICH7-M Mini-PCI 5V 100mA
TV Tuner 30
29
G1421B LAN CPU DC/DC
29 ISL6262
10/100 TXFM RJ45 39,40
23 23
2INT.SPKR BCM4401-E 22 INPUTS OUTPUTS 2
PCIEx1 Mini Card*2
29 802.11A/B/G 26 VCC_CORE
DCBATOUT
Giga LAN 22 0~1.3V
BCM5798 48A
MODEM SPI I/F SPI
RJ11 MDC Card Flash
21
15,16,17,18
LPC BUS
PCI Express
SATA
PATA
SIO KBC LPC

New card30 USB NS HD64F2111BVC DEBUG
3 PORT CONN.
21 87392 32 31 34
21
PWR SW MINI USB FIR 32 Touch INT.
1 TPS223130 HDD 20 CDROM Blue-tooth Pad 33 KB 33
<Variant Name>
1
18
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
BLOCK DIAGRAM
Size Document Number Rev
A3
AG1 -1
Date: Monday, January 09, 2006 Sheet 1 of 45
A B C D E
ICH7M Integrated Pull-up 954305D 27Mhz/LCDCLK Spread Calistoga Strapping Signals and
and Pull-down Resistors ICH7-M EDS 17837 1.5V1
and Frequency Selection Table Configuration EDS 17050 0.71
page 7
SS3 SS2 SS1 SS0
Byte9 bit6 bit5 bit4 Spread Amount% page 3 Pin Name Strap Description Configuration
EE_DIN, EE_DOUT, GNT[3:0], GPIO[25], bit 7 CFG[2:0] FSB Frequency Select
GNT[4]#/GPIO48, GNT[5]#/GPO17, PME#, 0 0 0 0 -0.50 Down 001 = FSB533
ICH7 internal 20K pull-ups 011 = FSB667
LAD[3:0]#/FHW[3:0]#, LAN_RXD[2:0] 0 0 0 1 -1.00 Down others = Reserved
4 LDRQ[0], LDRQ[1]/GPIO[41], 0 0 1 0 -1.50 Down CFG[4:3] Reserved 4

PWRBTN#, TP[3] 0 0 1 1 -2.00 Down CFG5 DMI x2 Select 0 = DMI x2
1 = DMI x4 (Default)
0 1 0 0 -0.75 Down CFG6 Reserved
DD[7], DDREQ ICH7 internal 11.5K pull-downs
0 1 0 1 -1.25 Down CFG7 0 = Reserved
CPU Strap 1 =Mobile CPU(Default)
ACZ_BIT_CLK, ACZ_RST#, ACZ_SDIN[2:0], ICH7 internal 20K pull-downs 0 1 1 0 -1.75 Down
Reserved
ACZ_SDOUT, ACZ_SYNC, DPRSLPVR/GPIO16, 0 1 1 1 -2.25 Down CFG8
EE_CS,SPI_ARB, SPI_CLK, SPKR, 1 0 0 0 +-0.25 Center 0 = Reverse Lanes,15->0,14->1 ect..
CFG9 PCI Express Graphics 1= Normal operation(Default):Lane
1 0 0 1 +-0.5 Center Lane Reversal Numbered in order
USB[7:0][P,N] ICH7 internal 15K pull-downs
1 0 1 0 +-0.75 Center
CFG[11:10] Reserved
SATALED# ICH7 internal 15K pull-up 1 0 1 1 +-1.0 Center
XOR/ALL Z test 00 = Reserved
1 1 0 0 +-0.25 Center CFG[13:12] straps 01 = XOR mode enabled
LAN_CLK ICH7 internal 100K pull-down 10 = All Z mode enabled
1 1 0 1 +-0.5 Center 11 = Normal Operation
(Default)
1 1 1 0 +-0.75 Center
CFG[15:14] Reserved Reserved
ICH7M IDE Integrated Series 1 1 1 1 +-1.0 Center
CFG16 FSB Dynamic ODT 0 = Dynamic ODT Disabled
3 Termination Resistors Global R-comp Disable

1 = Dynamic ODT Enabled (Default)
0 = All R-comp Disable 3
CFG17 (All R-comps) 1 = Normal Operation (Default)
DD[15:0], DIOW#, DIOR#, DREQ,
approximately 33 ohm
PCI Routing page 16
CFG18 VCC Select 0 = 1.05V (Default)
DDACK#, IORDY, DA[2:0], DCS1#, 1 = 1.5V
DCS3#, IDEIRQ
IDSEL INT -> PIRQ REQ/GNT CFG19 DMI Lane Reversal 0 = Normal operation (Default):lane
A->G, B->B, Numbered in order
1 =Reverse Lane,4->0,3->1 ect...
7412 22 C->F, D->G 0
A/C -> E 0 = Only SDVO or PCIE x1 is
ICH7M Functional Strap Definitions page 16
MiniPCI 21 B/D -> E 1 CFG20 SDVO/PCIE
Concurrent
operational (Default)
1 =SDVO and PCIE x1 are operating
simultaneously via the PEG port
Signal Usage/When Sampled Comment LAN 23 A -> H 2 SDVOCRTL SDVO Present 0 = No SDVO Card present
ACZ_SDOUT XOR Chain Entrance/ Allows entrance to XOR Chain testing when TP3 _DATA (Default)
PCIE Port Config bit1, pulled low.When TP3 not pulled low at rising edge 1= SDVO Card present
Rising Edge of PWROK of PWROK,sets bit1 of RPC.PC(Config Registers: 1410 25 A->G, B->B, 0 NOTE: All strap signals are sampled with respect to the leading
offset 224h) edge of the Calistoga GMCH PWORK in signal.
ACZ_SYNC PCIE bit0, Sets bit0 of RPC.PC(Config Registers:Offset 224h)
Rising Edge of PWROK.
EE_CS Reserved This signal should not be pull high. History
EE_DOUT Reserved This signal should not be pull low.
6/6 drawing SA
2 GNT2# Reserved This signal should not be pull low. 2
7/11 Rename for placement
Top-Block Sampled low:Top-Block Swap mode(inverts A16 for
GNT3# Swap Override. all cycles targeting FWH BIOS space).
Rising Edge of PWROK. Note: Software will not be able to clear the
Top-Swap bit until the system is rebooted
without GNT3# being pulled down.
GNT5#/ Boot BIOS Destination Controllable via Boot BIOS Destination bit
GPIO17#, Selection. (Config Registers:Offset 3410h:bit 11:10).
GNT4#/ Rising Edge of PWROK. GNT5# is MSB, 01-SPI, 10-PCI, 11-LPC.
GPIO48
DPRSLPVR Reserved This signal should not be pull high.

GPIO25 Reserved.
Rising Edge of RSMRST#. This signal should not be pull low.
INTVRMEN Integrated VccSus1_05 Enables integrated VccSus1_05 VRM when
VRM Enable/Disable. sampled high
Always sampled.
LINKALERT# Reserved Requires an external pull-up resistor.
REQ[4:1]# XOR Chain Selection. <Variant Name>
Rising Edge of PWROK. TBD, Chapter 8.
1 1
SATALED# Reserved This signal should not be pull low.
Wistron Corporation
SPKR No Reboot. If sampled high, the system is strapped to the 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Rising Edge of PWROK. "No Reboot" mode(ICH7 will disable the TCO Timer Taipei Hsien 221, Taiwan, R.O.C.
system reboot feature). The status is readable
Title
via the NO REBOOT bit.
Reference
TP3 XOR Chain Entrance. This signal should not be pull low unless using Size Document Number Rev
A3
Rising Edge of PWROK. XOR Chain testing. AG1 -1
A B C D E
3D3V_S0
3D3V_S0 3D3V_S0
-1
R123
1 R74 2 3D3V_CLKPLL_S0 1 2 3D3V_48MPWR_S0 3D3V_CLKGEN_S0 1 R122 2
0R0603-PAD 5D1R3F-GP 0R0603-PAD
1
C137
SC2D2U10V3ZY-1GP
C147 C96 C139 C136 C114 C131 C115 C130 C88 C91
2 SCD1U16V2ZY-2GP SC4D7U10V5ZY-3GP SCD1U16V2ZY-2GP SC4D7U10V5ZY-3GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP
2
4 4
SRN33J-5-GP-U
3D3V_S0 D_REFSSCLK_1 RN30 4 1 D_REFSSCLK 7
D_REFSSCLK#_1 3 2 D_REFSSCLK# 7
U15
1
34 PCLK_FWH R661 2 1 22R2J-2-GP RN22 2 3 SRN33J-5-GP-U CLK_MCH_3GPLL 7

R457 1 4 CLK_MCH_3GPLL# 7
10KR2J-3-GP R449 1 2 33R2J-2-GP PCLKCLK0 56 17
31 PCLK_KBC PCI0 LVDS
-1 22 PCLK_LAN R448 1 2 33R2J-2-GP PCLKCLK1 3 18 RN27 2 3 SRN33J-5-GP-U CLK_PCIE_ICH 16
R456 2 PCI1 LVDS#
TIPCI 25 PCLK_PCM_TI 1 0R2J-2-GP 1 R699 2PCLKCLK2 4 1 4 CLK_PCIE_ICH# 16
2
R454 2 PCI2
No TIPCI35 PCLK_PCM_ENE 1 0R2J-2-GP 33R2J-2-GP 5 PCI3 SRC1 19 CLK_MCH_3GPLL_1
SS_SEL FIR 32 PCLK_SIO R453 2 1 22R2J-2-GP PCLKCLK3 20 CLK_MCH_3GPLL_1# RN24 2 3 SRN33J-5-GP-U CLK_PCIE_LAN 22
H/L: 100/96MHz 30 PCLK_MINI MINI R452 1 2 33R2J-2-GP SS_SEL 9
SRC1#
22 CLK_PCIE_ICH_1 1 GIGA 4 CLK_PCIE_LAN# 22
PCIF1/SEL100/96# SRC2
1
16 CLK_ICHPCI R459 1 2 33R2J-2-GP ITP_EN 8 23 CLK_PCIE_ICH_1#

R455 PCIF0/ITP_EN SRC2# CLK_PCIE_LAN_1 RN20
1 2 SRC3 24 2 3 SRN33J-5-GP-U CLK_PCIE_SATA 15
10KR2J-3-GP R460 10KR2J-3-GP 55 25 CLK_PCIE_LAN_1# 1 4
16 PM_STPPCI# PCI_STOP# SRC3# SATA CLK_PCIE_SATA# 15
DY H/L : CPU_ITP/SRC7 26 CLK_PCIE_SATA_1
SRC4 CLK_PCIE_SATA_1# RN21
27 1 4 SRN33J-5-GP-U CLK_PCIE_NEW 30
2
SRC4# CLK_PCIE_NEW_1
11,18 SMBC_ICH 46 SCL SRC5 31
CLK_PCIE_NEW_1#
2 NEW 3 CLK_PCIE_NEW# 30
11,18 SMBD_ICH 47 SDA SRC5# 30
33 CLK_PCIE_MINI1_1 RN23 1 4 SRN33J-5-GP-U CLK_PCIE_MINI1 26
SRC6 CLK_PCIE_MINI1_1#
SRC6# 32 2 3 CLK_PCIE_MINI1# 26
3
7 D_REFCLK 1 4 D_REFCLK_1 14 3
D_REFCLK#_1 DOT96
7 D_REFCLK# 2 3 15 DOT96# CPU2_ITP/SRC7 36 MINIC
SRN33J-5-GP-U RN34 35
C283 CPU2_ITP#/SRC7#
1 2 GEN_XTAL_IN 50 44 CLK_CPU_BCLK_1 RN33 3 2 SRN33J-5-GP-U CLK_CPU_BCLK 4
GEN_XTAL_OUT_R GEN_XTAL_OUT 49 XTAL_IN CPU0 CLK_CPU_BCLK_1#
1 2 XTAL_OUT CPU0# 43 4 1 CLK_CPU_BCLK# 4
1
SC20P50V2JN-1GP X3 R116 470R2J-2-GP 41

R439 1 CPU1
32 CLK14_SIO 2 22R2J-2-GP CPU1# 40 CLK_MCH_BCLK_1 RN37 3 2 SRN33J-5-GP-U CLK_MCH_BCLK 6
X-14D31818M-31GP16 CLK_ICH14 R445 1 2 22R2J-2-GP GEN_REF 52 CLK_MCH_BCLK_1# 4 1 CLK_MCH_BCLK# 6
C278 82.30005.831 475R2F-L1-GP 2 R86 1GEN_IREF 39 REF
54 PM_STPCPU# 16
2
IREF CPU_STOP# CPU_SEL2

1 2 FSC/TEST_SEL 53 CPU_SEL2 4,7
16 CPU_SEL1 CPU_SEL1 4,7
SC20P50V2JN-1GP 3D3V_S0 FSB/TEST_MODE CPU_SEL0_1 22R2J-2-GP 1 R435
10 VTT_PWRGD#/PD USB48/FSA 12 2 CLK48_ICH 16
22R2J-2-GP 1 R437 2 CLK48_CARDBUS 25
R6621 2 CPU_SEL0 4,7
1
2 34 3D3V_CLKGEN_S0 2K2R2J-2-GP
VSS_PCI VDD_SRC
6 VSS_PCI VDD_SRC 21
R101 DY
10KR2J-3-GP 51 7
VSS_REF VDD_PCI
45 1
2
VSS_CPU VDD_PCI
38 CLK_EN# 38 VSSA
13 VSS48 VDD_REF 48
29 VSS_SRC VDD_CPU 42
37 3D3V_CLKPLL_S0
VDDA 3D3V_48MPWR_S0
VDD48 11
VDD_SRC 28
IDTCV125PAG-GP 71.00125.A0W
2 2
EMI capacitor
PCLK_SIO 1 2 EC29 DY
RN31 SC10P50V3JN-GP
1D05V_S0 D_REFSSCLK# 1 4 CLK_ICH14 1 2 EC26 DY
D_REFSSCLK 2 3 SC10P50V3JN-GP
SRN49D9F-GP PCLK_MINI 1 2 EC28 DY
SC10P50V3JN-GP
1
CLK_PCIE_NEW 2 3
R447 R92 R438 RN83 CLK_PCIE_NEW# 1 NEW 4
DUMMY-R2 470R2J-2-GP CLK_PCIE_MINI1 SRN49D9F-GP
DUMMY-R2
2
DY CLK_PCIE_MINI1# 1 MINIC34 RN81
SRN49D9F-GP PCLK_KBC 1 2 EC27 DY
2
RN84 SRN49D9F-GP RN32 SC10P50V3JN-GP

2
CPU_SEL2 4,7 CLK_PCIE_LAN 2 3 CLK_CPU_BCLK 2 3 CLK_ICHPCI 1 2 EC32 DY

CLK_PCIE_LAN# 1 GIGA 4 CLK_CPU_BCLK# 1 4 SC10P50V3JN-GP
CPU_SEL1 4,7 SRN49D9F-GP CLK48_ICH 1 2 EC15 DY
RN80 SRN49D9F-GP RN36 SC10P50V3JN-GP
CLK_PCIE_SATA 2 CLK_MCH_BCLK
CPU_SEL0 4,7
CLK_PCIE_SATA# 1 SATA 34 CLK_MCH_BCLK#
2
1
3
4
1
SRN49D9F-GP <Variant Name>

1 1
470R2J-2-GP
R440 R433 SEL2 SEL1 SEL0 CPU FSB RN35

470R2J-2-GP DY R441 CLK_PCIE_ICH 2 3 D_REFCLK# 1 4
DY DUMMY-R2 0
0
0
0
0
1
266M
133M
X
533M
CLK_PCIE_ICH# 1 4 D_REFCLK 2
SRN49D9F-GP
3 Wistron Corporation
2
0 1 0 200M X SRN49D9F-GP RN86 Taipei Hsien 221, Taiwan, R.O.C.

2
0 1 1 166M 667M CLK_MCH_3GPLL 2 3

1 0 0 333M X CLK_MCH_3GPLL# 1 4 Title
1 0 1 100M X
1 1 0 400M X SRN49D9F-GP Clock Generator ICS954305D
1 1 1 Reserved X RN82 Size Document Number Rev
A3
AG1 -1
Date: Wednesday, January 18, 2006 Sheet 3 of 45
A B C D E
A B C D E
TP30 TPAD30
U59A 1D05V_S0
H_A#3 J4 H1 H_ADS# 6
6 H_A#[31..3] A[3]# ADS#
4 H_A#4 L4 E2 H_BNR# 6 4
H_A#5 A[4]# BNR#
M3 A[5]# BPRI# G5 H_BPRI# 6
1
H_A#6 K5 A[6]#
ADDR GROUP 0
H_A#7 M1 H5 H_DEFER# 6 R144
H_A#8 A[7]# DEFER# 56R2J-4-GP
N2 A[8]# DRDY# F21 H_DRDY# 6
H_A#9 J1 E1 H_DBSY# 6
H_A#10 A[9]# DBSY#
N3 H_DINV#[3..0] 6
2
H_A#11 A[10]# Place testpoint on
P5 A[11]# BR0# F1 H_BREQ#0 6 H_DSTBN#[3..0] 6
H_A#12 P2 H_IERR# with a GND
A[12]# H_DSTBP#[3..0] 6
CONTROL
H_A#13 L1 D20 H_IERR# 0.1" away
H_A#14 A[13]# IERR#
P4 A[14]# INIT# B3 H_INIT# 15
H_A#15 P1
H_A#16 A[15]#
R1 A[16]# LOCK# H4 H_LOCK# 6 H_D#[63..0] 6
L2 H_CPURST# 6 U59B
6 H_ADSTB#0 ADSTB[0]#
B1 H_RS#[2..0] 6 H_D#0 E22 AA23 H_D#32
6 H_REQ#[4..0] RESET# D[0]# D[32]#
H_REQ#0 K3 F3 H_RS#0 H_D#1 F24 AB24 H_D#33
H_REQ#1 H2 REQ[0]# RS[0]# H_RS#1 H_D#2 D[1]# D[33]# H_D#34
REQ[1]# RS[1]# F4 E26 D[2]# D[34]# V24
H_REQ#2 K2 G3 H_RS#2 H_D#3 H22 V26 H_D#35
H_REQ#3 J3 REQ[2]# RS[2]# H_D#4 D[3]# D[35]# H_D#36
REQ[3]# TRDY# G2 H_TRDY# 6 F23 D[4]# D[36]# W25
DATA GRP 0
H_REQ#4 L5 H_THERMDA H_D#5 H_D#37
DATA GRP 2
REQ[4]# G25 D[5]# D[37]# U23
G6 H_HIT# 6 H_D#6 E25 U25 H_D#38
HIT# D[6]# D[38]#
1
H_A#17 Y2 E4 H_HITM# 6 H_D#7 E23 U22 H_D#39
H_A#18 A[17]# HITM# C511 H_D#8 D[7]# D[39]# H_D#40
U5 A[18]# K24 D[8]# D[40]# AB25
H_A#19 R3 AD4 XDP_BPM#0 TP50 TPAD30 SC2200P50V2KX-2GP H_D#9 G24 W22 H_D#41
2
A[19]# BPM[0]# D[9]# D[41]#
ADDR GROUP 1
H_A#20 W6 AD3 XDP_BPM#1 TP51 TPAD30 H_THERMDC H_D#10 J24 Y23 H_D#42
H_A#21 A[20]# BPM[1]# XDP_BPM#2 TP91 TPAD30 H_D#11 D[10]# D[42]# H_D#43
U4 A[21]# BPM[2]# AD1 J23 D[11]# D[43]# AA26
H_A#22 Y5 AC4 XDP_BPM#3 TP47 TPAD30 H_D#12 H26 Y26 H_D#44
A[22]# BPM[3]# D[12]# D[44]#
XDP/ITP SIGNALS
H_A#23 U2 AC2 XDP_BPM#4 TP90 TPAD30 H_D#13 F26 Y22 H_D#45
H_A#24 A[23]# PRDY# XDP_BPM#5 TP89 TPAD30 1D05V_S0 H_D#14 D[13]# D[45]# H_D#46
R4 A[24]# PREQ# AC1 K22 D[14]# D[46]# AC26
3 H_A#25 T5 AC5 XDP_TCK TP52 TPAD30 H_D#15 H25 AA24 H_D#47 3
A[25]# TCK D[15]# D[47]#
2
H_A#26 T3 AA6 XDP_TDI TP43 TPAD30 H23 W24 H_DSTBN#2 6
A[26]# TDI 6 H_DSTBN#0 DSTBN[0]# DSTBN[2]#
H_A#27 W3 AB3 XDP_TDO TP48 TPAD30 R145 G22 Y25 H_DSTBP#2 6
A[27]# TDO 6 H_DSTBP#0 DSTBP[0]# DSTBP[2]#
H_A#28 W5 AB5 XDP_TMS TP46 TPAD30 56R2J-4-GP J26 V23 H_DINV#2 6
A[28]# TMS 6 H_DINV#0 DINV[0]# DINV[2]#
H_A#29 Y4 AB6 XDP_TRST# TP44 TPAD30
H_A#30 A[29]# TRST# XDP_DBRESET# TP14 TPAD30
W2 C20
1
H_A#31 A[30]# DBR# H_D#16 H_D#48
Y1 A[31]# N22 D[16]# D[48]# AC22
V4 D21 1 R143
2 CPU_PROCHOT# 38 H_D#17 K25 AC23 H_D#49
THERM
6 H_ADSTB#1 ADSTB[1]# PROCHOT# 0R2J-2-GP D[17]# D[49]#

A24 H_THERMDA 19 H_D#18 P26 AB22 H_D#50
THERMDA H_D#19 D[18]# D[50]# H_D#51
15 H_A20M# A6 A20M# THERMDC A25 H_THERMDC 19 DY H_D#20
R23 D[19]# D[51]# AA21
H_D#52
15 H_FERR# A5 FERR# PM_THRMTRIP-A# 7 L25 D[20]# D[52]# AB21
15 H_IGNNE# C4 C7 H_D#21 L22 AC25 H_D#53
DATA GRP 1
IGNNE# THERMTRIP# D[21]# D[53]#
DATA GRP 3
1 R138 2 PM_THRMTRIP-I# 36 H_D#22 L23 D[22]# D[54]# AD20 H_D#54
15 H_STPCLK# D5 0R0402-PAD H_D#23 M23 AE22 H_D#55
STPCLK# H_D#24 D[23]# D[55]# H_D#56
15 H_INTR C6 LINT0 P25 D[24]# D[56]# AF23
H CLK
B4 A22 PM_THRMTRIP# H_D#25 P22 AD24 H_D#57 Layout Note:

15 H_NMI LINT1 BCLK[0] CLK_CPU_BCLK 3 D[25]# D[57]#
A3 A21 should connect to H_D#26 P23 AE21 H_D#58 Comp0, 2 connect with Zo=27.4 ohm, make
15 H_SMI# SMI# BCLK[1] CLK_CPU_BCLK# 3 D[26]# D[58]#
ICH7 and Calistoga H_D#27 T24 AD21 H_D#59 trace length shorter than 0.5" .
TPAD30 TP87 without T-ing H_D#28 D[27]# D[59]# H_D#60 Comp1, 3 connect with Zo=55 ohm, make
AA1 RSVD[01] R24 D[28]# D[60]# AE25
AA4 T22 TP38 TPAD30 ( No stub) H_D#29 L26 AF25 H_D#61 trace length shorter than 0.5" .
TPAD30 TP88 RSVD[02] RSVD[12] 1D05V_S0 H_D#30 D[29]# D[61]# H_D#62
AB2 RSVD[03] T25 D[30]# D[62]# AF22
TPAD30 TP45 AA3 H_D#31 N24 AF26 H_D#63
RSVD[04] D[31]# D[63]#
1
TPAD30 TP33 TP24 TPAD30
RESERVED
M4 RSVD[05] RSVD[13] D2 6 H_DSTBN#1 M24 DSTBN[1]# DSTBN[3]# AD23 H_DSTBN#3 6

TPAD30 TP35 N5 F6 TP27 TPAD30 R498 N25 AE24 H_DSTBP#3 6
RSVD[06] RSVD[14] 1KR2F-3-GP 6 H_DSTBP#1 DSTBP[1]# DSTBP[3]#
TPAD30 TP39 T2 D3 TP20 TPAD30 M26 AC20 H_DINV#3 6
RSVD[07] RSVD[15] 6 H_DINV#1 DINV[1]# DINV[3]#
TPAD30 TP40 V3 C1 TP22 TPAD30
TPAD30 TP15 RSVD[08] RSVD[16] TP53 TPAD30 Layout Note: CPU_GTLREF0 COMP0 R4921 27D4R2F-L1-GP
B2 AF1 AD26 R26 2
1 2
RSVD[09] RSVD[17] GTLREF COMP[0]
1
TPAD30 TP21 C3 D22 TP19 TPAD30 0.5" max length. MISC U26 COMP1 R4961 2 54D9R2F-L1-GP
RSVD[10] RSVD[18] TP18 TPAD30 C678 R477 1KR2J-1-GP COMP[1] COMP2 R1651 27D4R2F-L1-GP
2 RSVD[19] C23 DYTEST1 COMP[2] U1 2
2
SC1KP16V2KX-GP
TPAD30 TP84 B25 C24 TP17 TPAD30 R500 2 1 C26 V1 COMP3 R1681 2 54D9R2F-L1-GP
2
RSVD[11] RSVD[20] 2KR2F-3-GP TEST1 COMP[3]
BGA479-SKT6-GPU1 1 2TEST2 D25 E5 H_DPRSLP# 15,38
R478 51R2F-2-GP TEST2 DPRSTP#
B5 H_DPSLP# 15
2
62.10079.001 DPSLP#
DPWR# D24 H_DPWR# 6
3,7 CPU_SEL0 B22 BSEL[0] PWRGOOD D6 H_PWRGD 15,36
2nd source: 62.10053.401 3,7 CPU_SEL1 B23 BSEL[1] SLP# D7 H_CPUSLP# 6,15
3,7 CPU_SEL2 C21 BSEL[2] PSI# AE6 PSI# 38
BGA479-SKT6-GPU1
1D05V_S0
XDP_TDI R174 1 2 150R2F-1-GP
XDP_TMS R172 1 2 39D2R3F-2-GP

XDP_TDO R175 1
DY
2 54D9R2F-L1-GP
H_CPURST# R139 1
DY
2 54D9R2F-L1-GP
3D3V_S0
XDP_DBRESET# R470 1
DY
1 2 150R2F-1-GP <Variant Name> 1
XDP_TCK R180 1 2 27D4R2F-L1-GP Wistron Corporation

XDP_TRST# R176 1 2 680R3F-GP Taipei Hsien 221, Taiwan, R.O.C.
All place within 2" to CPU Title
CPU (1 of 2)
A3
AG1 -1
A B C D E
A B C D E
VCC_CORE_S0 U59D
A4 VSS[001] VSS[082] P6
VCC_CORE_S0 A8 P21
VSS[002] VSS[083]
A11 VSS[003] VSS[084] P24
A14 VSS[004] VSS[085] R2
U59C A16 R5
VSS[005] VSS[086]
A7 VCC[001] VCC[068] AB20 A19 VSS[006] VSS[087] R22
A9 VCC[002] VCC[069] AB7 A23 VSS[007] VSS[088] R25
A10 VCC[003] VCC[070] AC7 A26 VSS[008] VSS[089] T1
A12 VCC[004] VCC[071] AC9 B6 VSS[009] VSS[090] T4
A17 VCC[007] VCC[074] AC15 B13 VSS[012] VSS[093] U3
4 A18 VCC[008] VCC[075] AC17 B16 VSS[013] VSS[094] U6 4
A20 VCC[009] VCC[076] AC18 B19 VSS[014] VSS[095] U21
B7 VCC[010] VCC[077] AD7 B21 VSS[015] VSS[096] U24
B9 VCC[011] VCC[078] AD9 B24 VSS[016] VSS[097] V2
B10 VCC[012] VCC[079] AD10 C5 VSS[017] VSS[098] V5
B15 VCC[015] VCC[082] AD15 C14 VSS[020] VSS[101] W1
B20 VCC[018] VCC[085] AE9 C2 VSS[023] VSS[104] W26
C9 VCC[019] VCC[086] AE10 C22 VSS[024] VSS[105] Y3
C10 VCC[020] VCC[087] AE12 C25 VSS[025] VSS[106] Y6
C12 VCC[021] VCC[088] AE13 D1 VSS[026] VSS[107] Y21
C13 VCC[022] VCC[089] AE15 D4 VSS[027] VSS[108] Y24
C15 VCC[023] VCC[090] AE17 D8 VSS[028] VSS[109] AA2
D9 VCC[026] VCC[093] AF9 D16 VSS[031] VSS[112] AA11
D15 VCC[030] VCC[097] AF15 E3 VSS[035] VSS[116] AA22
D17 AF17 Layout Note E6 AA25
VCC[031] VCC[098] VSS[036] VSS[117]
D18 VCC[032] VCC[099] AF18 E8 VSS[037] VSS[118] AB1
E7 AF20 1D05V_S0 E11 AB4
VCC[033] VCC[100] VSS[038] VSS[119]
E9 VCC[034] E14 VSS[039] VSS[120] AB8
E10 V6 CPU_V6 1 R164 2 E16 AB11
VCC[035] VCCP[01] 0R0402-PAD VSS[040] VSS[121]
E12 VCC[036] VCCP[02] G21 E19 VSS[041] VSS[122] AB13
3 E13 J6 E21 AB16 3
VCC[037] VCCP[03] VSS[042] VSS[123]
E15 VCC[038] VCCP[04] K6 E24 VSS[043] VSS[124] AB19
1
E17 VCC[039] VCCP[05] M6 F5 VSS[044] VSS[125] AB23

E18 J21 C194 F8 AB26
VCC[040] VCCP[06] SCD1U10V2KX-4GP VSS[045] VSS[126]
E20 K21 F11 AC3
2
VCC[041] VCCP[07] VSS[046] VSS[127]

F7 VCC[042] VCCP[08] M21 38 H_VID[0..6] F13 VSS[047] VSS[128] AC6
F9 VCC[043] VCCP[09] N21 F16 VSS[048] VSS[129] AC8
F10 VCC[044] VCCP[10] N6 F19 VSS[049] VSS[130] AC11
F12 VCC[045] VCCP[11] R21 F2 VSS[050] VSS[131] AC14
F14 VCC[046] VCCP[12] R6 F22 VSS[051] VSS[132] AC16
F15 VCC[047] VCCP[13] T21 F25 VSS[052] VSS[133] AC19
F17 VCC[048] VCCP[14] T6
1D5V_VCCA_S0
-1 1D5V_S0
G4 VSS[053] VSS[134] AC21
F18 VCC[049] VCCP[15] V21 G1 VSS[054] VSS[135] AC24
F20 W21 1D05V_S0 G23 AD2
VCC[050] VCCP[16] L14 VSS[055] VSS[136]
AA7 VCC[051] G26 VSS[056] VSS[137] AD5
AA9 VCC[052] VCCA B26 1 2 H3 VSS[057] VSS[138] AD8
AA10 HCB1608KF121T30-GP H6 AD11
VCC[053] VSS[058] VSS[139]
1
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
AA12 C158 68.00230.041 H21 AD13
VCC[054] C153 VSS[059] VSS[140]
AA13 VCC[055] VID[0] AD6 H_VID0 38 H24 VSS[060] VSS[141] AD16
1
AA15 AF5 SCD01U16V2KX-3GP SC4D7U10V5ZY-3GP J2 AD19
H_VID1 38
2
VCC[056] VID[1] VCC_CORE_S0 C191 C198 C189 C172 C178 C183 C542 C186 VSS[061] VSS[142]
AA17 VCC[057] VID[2] AE5 H_VID2 38 J5 VSS[062] VSS[143] AD22
AA18 AF4 SC4D7U10V5ZY-3GP J22 AD25
H_VID3 38
2
VCC[058] VID[3] VSS[063] VSS[144]
AA20 VCC[059] VID[4] AE3 H_VID4 38 J25 VSS[064] VSS[145] AE1
1
AB9 VCC[060] VID[5] AF2 H_VID5 38 K1 VSS[065] VSS[146] AE4

AC10 AE2 H_VID6 38 R178 K4 AE8
VCC[061] VID[6] 100R2F-L1-GP-U VSS[066] VSS[147]
AB10 VCC[062] K23 VSS[067] VSS[148] AE11
AB12 VCC[063] K26 VSS[068] VSS[149] AE14
AB14 AF7 VCC_SENSE 38 L3 AE16
2
VCC[064] VCCSENSE VSS[069] VSS[150]

AB15 VCC[065] L6 VSS[070] VSS[151] AE19
2 2
AB17 VCC[066] L21 VSS[071] VSS[152] AE23
AB18 VCC[067] VSSSENSE AE7 VSS_SENSE 38 L24 VSS[072] VSS[153] AE26
VCC_CORE_S0 M2 AF3
VSS[073] VSS[154]
1
BGA479-SKT6-GPU1 Layout Note: M5 AF6

R179 VSS[074] VSS[155]
M22 VSS[075] VSS[156] AF8
100R2F-L1-GP-U VCCSENSE and VSSSENSE lines M25 AF11
VSS[076] VSS[157]
1
1
should be of equal length. N1 AF13
C211 C215 C210 C209 C507 VSS[077] VSS[158]
N4 AF16
2
SC10U10V5ZY-1GP VSS[078] VSS[159]

N23 AF19
2
2
Layout Note: VSS[079] VSS[160]
N26 VSS[080] VSS[161] AF21
Provide a test point (with P3 AF24
no stub) to connect a SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP VSS[081] VSS[162]
differential probe BGA479-SKT6-GPU1
between VCCSENSE and
VSSSENSE at the location
where the two 54.9ohm
resistors terminate the
55 ohm transmission line.
VCC_CORE_S0
1
1
DY C539 C208 C171 C170 C169 C192 C528 C536 C534 C537 C529 C533 C222 C221 C538 C220
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
SC10U10V5ZY-1GPSC10U10V5ZY-1GP
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
2
2
1 <Variant Name> 1
DY DY DY
Wistron Corporation
Title
CPU (2 of 2)
A3
AG1 -1
A B C D E
A B C D E
H_XRCOMP
1
R511
24D9R2F-L-GP
4 H_D#[63..0] H_A#[31..3] 4
U58A
H_D#0 F1 H9 H_A#3
2
H_D#1 H_D#_0 H_A#_3 H_A#4
J1 H_D#_1 H_A#_4 C9
4 H_D#2 H1 E11 H_A#5 4
H_D#3 H_D#_2 H_A#_5 H_A#6
J6 H_D#_3 H_A#_6 G11
H_D#4 H3 F11 H_A#7
H_D#5 H_D#_4 H_A#_7 H_A#8
K2 H_D#_5 H_A#_8 G12
1D05V_S0 H_D#6 G1 F9 H_A#9
H_D#7 H_D#_6 H_A#_9 H_A#10
G2 H_D#_7 H_A#_10 H11
H_D#8 K9 J12 H_A#11
H_D#9 H_D#_8 H_A#_11 H_A#12
K1 H_D#_9 H_A#_12 G14
2
H_D#10 K7 D9 H_A#13
R510 H_D#11 H_D#_10 H_A#_13 H_A#14
J8 H_D#_11 H_A#_14 J14
54D9R2F-L1-GP H_D#12 H4 H13 H_A#15
H_D#13 H_D#_12 H_A#_15 H_A#16
J3 H_D#_13 H_A#_16 J15
H_D#14 K11 F14 H_A#17
1
H_D#15 H_D#_14 H_A#_17 H_A#18
G4 H_D#_15 H_A#_18 D12
H_XSCOMP H_D#16 T10 A11 H_A#19
H_D#17 H_D#_16 H_A#_19 H_A#20
W11 H_D#_17 H_A#_20 C11
H_D#18 T3 A12 H_A#21
H_D#19 H_D#_18 H_A#_21 H_A#22
U7 H_D#_19 H_A#_22 A13
1D05V_S0 H_D#20 U9 E13 H_A#23
H_D#21 H_D#_20 H_A#_23 H_A#24
U11 H_D#_21 H_A#_24 G13
H_D#22 T11 F12 H_A#25
H_D#_22 H_A#_25
1
H_D#23 W9 B12 H_A#26

R515 H_D#24 H_D#_23 H_A#_26 H_A#27 1D05V_S0
T1 H_D#_24 H_A#_27 B14
221R2F-2-GP H_D#25 T8 C12 H_A#28
H_D#26 H_D#_25 H_A#_28 H_A#29
T4 H_D#_26 H_A#_29 A14
1
H_D#27 W7 C14 H_A#30
2
H_XSWING H_D#28 H_D#_27 H_A#_30 H_A#31 R161

U5 H_D#_28 H_A#_31 D14
H_D#29 T9 100R2F-L1-GP-U
H_D#_29
1
H_D#30 W6 E8 H_ADS# 4
H_D#_30 H_ADS#
2
3 R513 H_D#31 T5 B9 H_ADSTB#0 4

3
2
100R2F-L1-GP-U C552 H_D#32 H_D#_31 H_ADSTB#_0
AB7 H_D#_32 H_ADSTB#_1 C13 H_ADSTB#1 4
SCD1U16V2ZY-2GP H_D#33 AA9 J13 H_VREF
1
H_D#34 H_D#_33 H_VREF_0

W4 C6 H_BNR# 4
2
H_D#_34 H_BNR#
1
HOST
H_D#35 W3 F6 H_BPRI# 4
H_D#_35 H_BPRI#
2
H_D#36 Y3 C7 H_BREQ#0 4 R157
H_D#37 H_D#_36 H_BREQ#0 C187 200R2F-L-GP
Y7 H_D#_37 H_CPURST# B7 H_CPURST# 4
H_D#38 W5 A7 SCD1U16V2ZY-2GP
H_DBSY# 4
1
H_D#39 H_D#_38 H_DBSY#
Y10 C3 H_DEFER# 4
2
H_D#40 H_D#_39 H_DEFER#
AB8 H_D#_40 H_DPWR# J9 H_DPWR# 4
H_D#41 W2 H8 H_DRDY# 4
H_YRCOMP H_D#42 H_D#_41 H_DRDY#
AA4 H_D#_42 H_VREF_1 K13
H_D#43 AA7 H_DINV#[3..0] 4
H_D#44 H_D#_43 H_DINV#0
AA2 H_D#_44 H_DINV#_0 J7
1
H_D#45 AA6 W8 H_DINV#1

R507 H_D#46 H_D#_45 H_DINV#_1 H_DINV#2
AA10 H_D#_46 H_DINV#_2 U3
24D9R2F-L-GP H_D#47 Y8 AB10 H_DINV#3
H_D#48 H_D#_47 H_DINV#_3
AA1 H_D#_48 H_DSTBN#[3..0] 4
H_D#49 AB4 K4 H_DSTBN#0
2
H_D#50 H_D#_49 H_DSTBN#_0 H_DSTBN#1

AC9 H_D#_50 H_DSTBN#_1 T7
H_D#51 AB11 Y5 H_DSTBN#2
H_D#52 H_D#_51 H_DSTBN#_2 H_DSTBN#3
AC11 H_D#_52 H_DSTBN#_3 AC4
H_D#53 AB3 H_DSTBP#[3..0] 4
H_D#54 H_D#_53 H_DSTBP#0
AC2 H_D#_54 H_DSTBP#_0 K3
1D05V_S0 H_D#55 AD1 T6 H_DSTBP#1
H_D#56 H_D#_55 H_DSTBP#_1 H_DSTBP#2
AD9 H_D#_56 H_DSTBP#_2 AA5
H_D#57 AC1 AC5 H_DSTBP#3
H_D#58 H_D#_57 H_DSTBP#_3
AD7 H_D#_58
2
H_D#59 AC6
2 R509 H_D#60 H_D#_59 2
AB5 H_D#_60 H_HIT# D3 H_HIT# 4
54D9R2F-L1-GP H_D#61 AD10 D4
H_D#_61 H_HITM# H_HITM# 4
H_D#62 AD4 B3 H_LOCK# 4
H_D#63 H_D#_62 H_LOCK#
AC8
1
H_D#_63
H_YSCOMP H_XRCOMP E1 H_REQ#[4..0] 4
H_XSCOMP H_XRCOMP H_REQ#0
E2 H_XSCOMP H_REQ#_0 D8
H_XSWING E4 G8 H_REQ#1
H_XSWING H_REQ#_1 H_REQ#2
H_REQ#_2 B8
1D05V_S0 H_YRCOMP Y1 F8 H_REQ#3
H_YSCOMP H_YRCOMP H_REQ#_3 H_REQ#4
U1 H_YSCOMP H_REQ#_4 A8
H_YSWING W1 H_RS#[2..0] 4
H_YSWING
1
B4 H_RS#0
R514 H_RS#_0 H_RS#1
3 CLK_MCH_BCLK AG2 H_CLKIN H_RS#_1 E6
221R2F-2-GP AG1 D6 H_RS#2
3 CLK_MCH_BCLK# H_CLKIN# H_RS#_2
E3 1 R512 2 H_CPUSLP# 4,15
2
H_YSWING H_SLPCPU# 0R0402-PAD

H_TRDY# E7 H_TRDY# 4
1
CALISTOGA
2
R508
100R2F-L1-GP-U C551
SCD1U16V2ZY-2GP
1
2
1 Place them near to the chip ( < 0.5") <Variant Name> 1
Wistron Corporation
Title
GMCH (1 of 5)
A3
AG1 -1
A B C D E
A B C D E
U58B
CLKREQ_MCH TP13 TPAD30
RSVD_0 H32 TP11 TPAD30
11 M_CLK_DDR0 AY35 SM_CK_0 RSVD_1 T32
AR1 TP12 TPAD30 1D5V_PCIE_S0
11 M_CLK_DDR1 SM_CK_1 RSVD_2 R32 TP49 TPAD30
11 M_CLK_DDR2 AW7 SM_CK_2 RSVD_3 F3
AW40 TP42 TPAD30 for calistoga configuration
11 M_CLK_DDR3 SM_CK_3 RSVD_4 F7
RSVD
TP36 TPAD30
RSVD_5 AG11 TP37 TPAD30 U58C
11 M_CLK_DDR#0 AW35 SM_CK#_0 RSVD_6 AF11 31 L_BKLTEN
AT1 TP41 TPAD30 R127
11 M_CLK_DDR#1 SM_CK#_1 RSVD_7 H7 TP31 TPAD30 L_BKLTEN
D32 L_BKLTCTL EXP_A_COMPI D40 2 1
24D9R2F-L-GP
11 M_CLK_DDR#2 AY7 SM_CK#_2 RSVD_8 J19 J30 L_BKLTEN EXP_A_COMPO D38
AY40 TP16 TPAD30 LCTLA_CLK
11 M_CLK_DDR#3 SM_CK#_3 RSVD_9 K30 TP23 TPAD30 LCTLB_DATA
H30 L_CLKCTLA
RSVD_10 J29 TP83 TPAD30 LDDC_CLK
H29 L_CLKCTLB EXP_A_RXN_0 F34
11,12 M_CKE0 AU20 SM_CKE_0 RSVD_11 A41 13 LDDC_CLK G26 L_DDC_CLK EXP_A_RXN_1 G38
AT20 TP10 TPAD30 LDDC_DATA
4 11,12 M_CKE1 SM_CKE_1 RSVD_12 A35 TP86 TPAD30
13 LDDC_DATA
TPAD30 TP85 LIBG
G25 L_DDC_DATA EXP_A_RXN_2 H34 4
11,12 M_CKE2 BA29 SM_CKE_2 RSVD_13 A34 B38 L_IBG EXP_A_RXN_3 J38
AY29 TP25 TPAD30 TPAD30 TP9 L_LVBG
11,12 M_CKE3 SM_CKE_3 RSVD_14 D28 TP26 TPAD30 GMCH_LCDVDD_ON
C35 L_VBG EXP_A_RXN_4 L34
RSVD_15 D27 F32 L_VDDEN EXP_A_RXN_5 M38
11,12 M_CS0# AW13 SM_CS#_0 13 GMCH_LCDVDD_ON C33 L_VREFH EXP_A_RXN_6 N34
11,12 M_CS1# AW12 SM_CS#_1 C32 L_VREFL EXP_A_RXN_7 P38
MUXING
11,12 M_CS2# AY21 SM_CS#_2 CFG_0 K16 CPU_SEL0 3,4 EXP_A_RXN_8 R34
11,12 M_CS3# AW21 SM_CS#_3 CFG_1 K18 CPU_SEL1 3,4 13 LA_CLK# A33 LA_CLK# EXP_A_RXN_9 T38
CFG_2 J18 CPU_SEL2 3,4 13 LA_CLK A32 LA_CLK EXP_A_RXN_10 V34
M_OCDCOMP0 AL20 F18 CFG3 13 LB_CLK# E27 W38
M_OCDCOMP1 SM_OCDCOMP_0 CFG_3 CFG4 LB_CLK# EXP_A_RXN_11
AF10 SM_OCDCOMP_1 CFG_4 E15 13 LB_CLK E26 LB_CLK EXP_A_RXN_12 Y34
1
F15 CFG5 AA38

CFG_5 EXP_A_RXN_13
LVDS
R152 R163 11,12 M_ODT0 BA13 E18 CFG6 13 LA_DATA#_0 C37 AB34
40D2R2F-GP 40D2R2F-GP SM_ODT_0 CFG_6 CFG7 LA_DATA#_0 EXP_A_RXN_14
11,12 M_ODT1 BA12 SM_ODT_1 CFG_7 D19 13 LA_DATA#_1 B35 LA_DATA#_1 EXP_A_RXN_15 AC38
DY DY 11,12 M_ODT2 AY20 D16 CFG8 13 LA_DATA#_2 A37
SM_ODT_2 CFG_8 LA_DATA#_2
CFG
11,12 M_ODT3 AU21 G16 CFG9 D34
2
SM_ODT_3 CFG_9 CFG10 EXP_A_RXP_0

E16 F38
DDR
CFG_10 EXP_A_RXP_1
GRAPHICS
M_RCOMPN AV9 D15 CFG11 G34
DDR_VREF_S3 M_RCOMPP SM_RCOMP# CFG_11 CFG12 EXP_A_RXP_2
AT9 SM_RCOMP CFG_12 G15 13 LA_DATA_0 B37 LA_DATA_0 EXP_A_RXP_3 H38
K15 CFG13 13 LA_DATA_1 B34 J34
CFG_13 CFG14 LA_DATA_1 EXP_A_RXP_4
AK1 SM_VREF_0 CFG_14 C15 13 LA_DATA_2 A36 LA_DATA_2 EXP_A_RXP_5 L38
AK41 H16 CFG15 M34
SM_VREF_1 CFG_15 CFG16 EXP_A_RXP_6
CFG_16 G18 EXP_A_RXP_7 N38
1
C501 H15 CFG17 13 LB_DATA#_0 G30 P34

CFG_17 CFG18 LB_DATA#_0 EXP_A_RXP_8
3 CLK_MCH_3GPLL# AF33 G_CLKIN# CFG_18 J25 13 LB_DATA#_1 D30 LB_DATA#_1 EXP_A_RXP_9 R38
SCD1U16V2ZY-2GP 3 CLK_MCH_3GPLL AG33 K27 CFG19 13 LB_DATA#_2 F29 T34
2
C548 G_CLKIN CFG_19 CFG20 LB_DATA#_2 EXP_A_RXP_10

3 D_REFCLK# A27 D_REFCLKIN# CFG_20 J26 EXP_A_RXP_11 V38
CLK
SCD1U16V2ZY-2GP 3 D_REFCLK A26 W34
D_REFCLKIN EXP_A_RXP_12
3 D_REFSSCLK# C40 D_REFSSCLKIN# PM_BMBUSY# G28 PM_BMBUSY# 16 EXP_A_RXP_13 Y38
3
3 D_REFSSCLK D41 D_REFSSCLKIN PM_EXTTS#_0 F25 PM_EXTTS#0 13 LB_DATA_0 F30 LB_DATA_0 EXP_A_RXP_14 AA34 3
PM
PM_EXTTS#_1 H26 PM_EXTTS#1 13 LB_DATA_1 D29 LB_DATA_1 EXP_A_RXP_15 AB38
PCI-EXPRESS
16 DMI_TXN[3..0] PM_THRMTRIP# G6 PM_THRMTRIP-A# 4 13 LB_DATA_2 F28 LB_DATA_2
DMI_TXN0 AE35 AH33 GMCH_PWROK F36
DMI_TXN1 DMI_RXN_0 PWROK R118 EXP_A_TXN_0
AF39 DMI_RXN_1 RSTIN# AH34 1 2 PLT_RST1# 16,20,22,26,30,31,32,34 EXP_A_TXN_1 G40
DMI_TXN2 AG35 100R2J-2-GP H36
DMI_TXN3 DMI_RXN_2 EXP_A_TXN_2
AH39 DMI_RXN_3 EXP_A_TXN_3 J40
MISC SDVO_CTRLCLK H28
H27
14 TV_DACA A16
C18
TV_DACA_OUT EXP_A_TXN_4 L36
M40
16 DMI_TXP[3..0] SDVO_CTRLDATA 14 TV_DACB TV_DACB_OUT EXP_A_TXN_5
DMI_TXP0 AC35 K28 MCH_ICH_SYNC# 16 14 TV_DACC A19 N36
DMI_RXP_0 LT_RESET# TV_DACC_OUT EXP_A_TXN_6
TV
DMI_TXP1 AE39 P40
DMI_TXP2 DMI_RXP_1 EXP_A_TXN_7
AF35 DMI_RXP_2 1R151 2 J20 TV_IREF EXP_A_TXN_8 R36
DMI_TXP3 AG39 D1 4K99R2F-L-GP B16 T40
DMI_RXP_3 NC0 TV_IRTNA EXP_A_TXN_9
NC1 C41 B18 TV_IRTNB EXP_A_TXN_10 V36
16 DMI_RXN[3..0] NC2 C1 B19 TV_IRTNC EXP_A_TXN_11 W40
DMI_RXN0 AE37 BA41 Y36
DMI_RXN1 DMI_TXN_0 NC3 EXP_A_TXN_12
AF41 DMI_TXN_1 NC4 BA40 EXP_A_TXN_13 AA40
NC
DMI_RXN2 AG37 BA39 AB36

DMI_RXN3 DMI_TXN_2 NC5 3D3V_S0 EXP_A_TXN_14
AH41 DMI_TXN_3 NC6 BA3 EXP_A_TXN_15 AC40
BA2
DMI
NC7
16 DMI_RXP[3..0] NC8 BA1 14 GMCH_BLUE E23 CRT_BLUE EXP_A_TXP_0 D36
DMI_RXP0 AC37 B41 D23 F40
DMI_TXP_0 NC9 CRT_BLUE# EXP_A_TXP_1
4
3
DMI_RXP1 AE41 B2 14 GMCH_GREEN C22 G36
DMI_TXP_1 NC10 CRT_GREEN EXP_A_TXP_2
VGA
DMI_RXP2 AF37 AY41 RN87 B22 H40
DMI_RXP3 DMI_TXP_2 NC11 CRT_GREEN# EXP_A_TXP_3
AG41 DMI_TXP_3 NC12 AY1 14 GMCH_RED A21 CRT_RED EXP_A_TXP_4 J36
AW41 SRN10KJ-5-GP B21 L40
3D3V_S0 NC13 CRT_RED# EXP_A_TXP_5
NC14 AW1 EXP_A_TXP_6 M36
A40 N40
1
2
NC15 GMCH_DDCCLK EXP_A_TXP_7
NC16 A4 14 GMCH_DDCCLK C26 CRT_DDC_CLK EXP_A_TXP_8 P36
2 GMCH_DDCDATA 2
NC17 A39 14 GMCH_DDCDATA C25 CRT_DDC_DATA EXP_A_TXP_9 R40
RN41 A3 14 GMCH_HSY G23 T36
PM_EXTTS#0 NC18 CRT_HSYNC EXP_A_TXP_10
1 4 1 R147 2 J22 CRT_IREF EXP_A_TXP_11 V40
2 3 PM_EXTTS#1 3D3V_S0 14 GMCH_VSY 255R2F-L-GP H23 W36
CALISTOGA CRT_VSYNC EXP_A_TXP_12
EXP_A_TXP_13 Y40
SRN10KJ-5-GP 1 R1422 CFG18 AA36
1D8V_S3 DUMMY-R2 EXP_A_TXP_14
EXP_A_TXP_15 AB40
1 R1402 CFG19
1
DUMMY-R2 CALISTOGA
R170 1 R1412 CFG20
80D6R2F-L-GP DUMMY-R2
1 R1532 CFG3
M_RCOMPN DUMMY-R2
2
R488 1 R1582 CFG4 When High 1K Ohm 3D3V_S0

TV_DACA 1 2 DUMMY-R2
M_RCOMPP 150R2F-1-GP 1 R4912 CFG5
1
R485 DUMMY-R2 RN108
4
3
4
3
R171 TV_DACB 1 2 1 R4862 CFG6 CFG6: L_BKLTEN 1 4
80D6R2F-L-GP 150R2F-1-GP DUMMY-R2 GMCH_LCDVDD_ON 2 3 RN39 RN40
1 R1502 CFG7 0=Moby Dick ,1=Calistoga (default) SRN10KJ-5-GP SRN10KJ-5-GP
TV_DACC 1 R483 2 DUMMY-R2 SRN100KJ-6-GP
2
150R2F-1-GP 1 R1542 CFG8 LIBG 1 R466 2

R148 DUMMY-R2 1K5R2F-2-GP
1
2
1
2
GMCH_BLUE 1 2 1 R4892 CFG9 LCTLA_CLK LDDC_CLK
150R2F-1-GP DUMMY-R2 When Low choice LCTLB_DATA LDDC_DATA
R146 1 R1562 CFG10 lower than 3.5K
GMCH_GREEN 1 2 DUMMY-R2
150R2F-1-GP
Ohm
1 R160 2 DY CFG11
<Variant Name>
1
R481 2K2R2J-2-GP 1
GMCH_RED 1 2 1 R1622 CFG12
150R2F-1-GP DUMMY-R2
1 R4952 CFG13
When PM replace to GM SEL2 SEL1 SEL0 CPU Wistron Corporation
DUMMY-R2 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
1 R1592 CFG14 0 0 0 266M Taipei Hsien 221, Taiwan, R.O.C.
DUMMY-R2 0 0 1 133M
1 R4902 CFG15 0 1 0 200M Title
DUMMY-R2 0 1 1 166M
R4842 CFG16
DY 1 0 0 333M GMCH (2 of 5)
1
DUMMY-R2 1 R120
2 1 0 1 100M Size Document Number Rev
VGATE_PWRGD 16,38
1 R4932 CFG17 GMCH_PWROK 0R2J-2-GP 1 1 0 400M A3
DUMMY-R2 1 R119
2 PWROK 16,19
1 1 1 Reserved AG1 -1
0R2J-2-GP Date: Wednesday, January 18, 2006 Sheet 7 of 45
A B C D E
A B C D E
4 4
U58E
11 M_B_DQ[63..0]
M_B_DQ0 AK39
M_B_DQ1 SB_DQ0
AJ37 SB_DQ1 SB_BS_0 AT24 M_B_BS#0 11,12
U58D M_B_DQ2 AP39 AV23 M_B_BS#1 11,12
11 M_A_DQ[63..0] SB_DQ2 SB_BS_1
M_A_DQ0 AJ35 AU12 M_A_BS#0 11,12 M_B_DQ3 AR41 AY28 M_B_BS#2 11,12
M_A_DQ1 SA_DQ0 SA_BS_0 M_B_DQ4 SB_DQ3 SB_BS_2
AJ34 SA_DQ1 SA_BS_1 AV14 M_A_BS#1 11,12 AJ38 SB_DQ4 M_B_CAS# 11,12
M_A_DQ2 AM31 BA20 M_A_BS#2 11,12 M_B_DQ5 AK38 AR24 M_B_DM[7..0] 11
M_A_DQ3 SA_DQ2 SA_BS_2 M_B_DQ6 SB_DQ5 SB_CAS# M_B_DM0
AM33 SA_DQ3 M_A_CAS# 11,12 AN41 SB_DQ6 SB_DM_0 AK36
M_A_DQ4 AJ36 AY13 M_A_DM[7..0] 11 M_B_DQ7 AP41 AR38 M_B_DM1
M_A_DQ5 SA_DQ4 SA_CAS# M_A_DM0 M_B_DQ8 SB_DQ7 SB_DM_1 M_B_DM2
AK35 SA_DQ5 SA_DM_0 AJ33 AT40 SB_DQ8 SB_DM_2 AT36
M_A_DQ6 AJ32 AM35 M_A_DM1 M_B_DQ9 AV41 BA31 M_B_DM3
M_A_DQ7 SA_DQ6 SA_DM_1 M_A_DM2 M_B_DQ10 SB_DQ9 SB_DM_3 M_B_DM4
AH31 SA_DQ7 SA_DM_2 AL26 AU38 SB_DQ10 SB_DM_4 AL17
M_A_DQ8 AN35 AN22 M_A_DM3 M_B_DQ11 AV38 AH8 M_B_DM5
M_A_DQ9 SA_DQ8 SA_DM_3 M_A_DM4 M_B_DQ12 SB_DQ11 SB_DM_5 M_B_DM6
AP33 SA_DQ9 SA_DM_4 AM14 AP38 SB_DQ12 SB_DM_6 BA5
M_A_DQ10 AR31 AL9 M_A_DM5 M_B_DQ13 AR40 AN4 M_B_DM7
M_A_DQ11 SA_DQ10 SA_DM_5 M_A_DM6 M_B_DQ14 SB_DQ13 SB_DM_7
AP31 SA_DQ11 SA_DM_6 AR3 AW38 SB_DQ14 M_B_DQS[7..0] 11
M_A_DQ12 AN38 AH4 M_A_DM7 M_B_DQ15 AY38 AM39 M_B_DQS0
B
M_A_DQ13 SA_DQ12 SA_DM_7 M_B_DQ16 SB_DQ15 SB_DQS_0 M_B_DQS1
AM36 SA_DQ13 M_A_DQS[7..0] 11 BA38 SB_DQ16 SB_DQS_1 AT39
M_A_DQ14 AM34 AK33 M_A_DQS0 M_B_DQ17 AV36 AU35 M_B_DQS2
A
M_A_DQ15 SA_DQ14 SA_DQS_0 M_A_DQS1 M_B_DQ18 SB_DQ17 SB_DQS_2 M_B_DQS3
AN33 SA_DQ15 SA_DQS_1 AT33 AR36 SB_DQ18 SB_DQS_3 AR29
M_A_DQ16 AK26 AN28 M_A_DQS2 M_B_DQ19 AP36 AR16 M_B_DQS4
M_A_DQ17 SA_DQ16 SA_DQS_2 M_A_DQS3 M_B_DQ20 SB_DQ19 SB_DQS_4 M_B_DQS5
AL27 AM22 BA36 AR10
MEMORY
3 M_A_DQ18 SA_DQ17 SA_DQS_3 M_A_DQS4 M_B_DQ21 SB_DQ20 SB_DQS_5 M_B_DQS6 3
AM26 SA_DQ18 SA_DQS_4 AN12 AU36 SB_DQ21 SB_DQS_6 AR7
M_A_DQ19 AN24 AN8 M_A_DQS5 M_B_DQ22 AP35 AN5 M_B_DQS7
SA_DQ19
MEMORY SA_DQS_5 SB_DQ22 SB_DQS_7 M_B_DQS#[7..0] 11
M_A_DQ20 AK28 AP3 M_A_DQS6 M_B_DQ23 AP34 AM40 M_B_DQS#0
M_A_DQ21 SA_DQ20 SA_DQS_6 M_A_DQS7 M_B_DQ24 SB_DQ23 SB_DQS#_0 M_B_DQS#1
AL28 SA_DQ21 SA_DQS_7 AG5 M_A_DQS#[7..0] 11 AY33 SB_DQ24 SB_DQS#_1 AU39
M_A_DQ22 AM24 AK32 M_A_DQS#0 M_B_DQ25 BA33 AT35 M_B_DQS#2
M_A_DQ23 SA_DQ22 SA_DQS#_0 M_A_DQS#1 M_B_DQ26 SB_DQ25 SB_DQS#_2 M_B_DQS#3
AP26 SA_DQ23 SA_DQS#_1 AU33 AT31 SB_DQ26 SB_DQS#_3 AP29
M_A_DQ24 AP23 AN27 M_A_DQS#2 M_B_DQ27 AU29 AP16 M_B_DQS#4
AL22 SA_DQ25 SA_DQS#_3 AM21 AU31 SB_DQ28 SB_DQS#_5 AT10
M_A_DQ26 AP21 AM12 M_A_DQS#4 M_B_DQ29 AW31 AT7 M_B_DQS#6
AN20 SA_DQ27 SA_DQS#_5 AL8 AV29 SB_DQ30 SB_DQS#_7 AP5
M_A_DQ28 AL23 AN3 M_A_DQS#6 M_B_DQ31 AW29 M_B_A[13..0] 11,12
M_A_DQ29 SA_DQ28 SA_DQS#_6 M_A_DQS#7 M_B_DQ32 SB_DQ31 M_B_A0
AP24 SA_DQ29 SA_DQS#_7 AH5 AM19 SB_DQ32 SB_MA_0 AY23
M_A_DQ30 M_B_DQ33 M_B_A1
SYSTEM
AP20 SA_DQ30 M_A_A[13..0] 11,12 AL19 SB_DQ33 SB_MA_1 AW24
M_A_DQ31 AT21 AY16 M_A_A0 M_B_DQ34 AP14 AY24 M_B_A2
M_A_DQ32 SA_DQ31 SA_MA_0 M_A_A1 M_B_DQ35 SB_DQ34 SB_MA_2 M_B_A3
SYSTEM
AR12 SA_DQ32 SA_MA_1 AU14 AN14 SB_DQ35 SB_MA_3 AR28

M_A_DQ33 AR14 AW16 M_A_A2 M_B_DQ36 AN17 AT27 M_B_A4
AP13 SA_DQ34 SA_MA_3 BA16 AM16 SB_DQ37 SB_MA_5 AT28
M_A_DQ35 AP12 BA17 M_A_A4 M_B_DQ38 AP15 AU27 M_B_A6
AT13 SA_DQ36 SA_MA_5 AU16 AL15 SB_DQ39 SB_MA_7 AV28
M_A_DQ37 AT12 AV17 M_A_A6 M_B_DQ40 AJ11 AV27 M_B_A8
AL14 SA_DQ38 SA_MA_7 AU17 AH10 SB_DQ41 SB_MA_9 AW27
M_A_DQ39 AL12 AW17 M_A_A8 M_B_DQ42 AJ9 AV24 M_B_A10
AK9 SA_DQ40 SA_MA_9 AT16 AN10 SB_DQ43 SB_MA_11 BA27
M_A_DQ41 AN7 AU13 M_A_A10 M_B_DQ44 AK13 AY27 M_B_A12
AK8 SA_DQ42 SA_MA_11 AT17 AH11 SB_DQ45 SB_MA_13 AR23
DDR
M_A_DQ43 AK7 AV20 M_A_A12 M_B_DQ46 AK10 M_B_RAS# 11,12
M_A_DQ44 SA_DQ43 SA_MA_12 M_A_A13 M_B_DQ47 SB_DQ46
AP9 SA_DQ44 SA_MA_13 AV12 AJ8 SB_DQ47 SB_RAS# AU23
DDR
M_A_DQ45 AN9 M_A_RAS# 11,12 M_B_DQ48 BA10 AK16 SB_RCVENIN# TP34 TPAD30
M_A_DQ46 SA_DQ45 M_B_DQ49 SB_DQ48 SB_RCVENIN# SB_RCVENOUT# TP32 TPAD30
AT5 SA_DQ46 SA_RAS# AW14 AW10 SB_DQ49 SB_RCVENOUT# AK18
2 M_A_DQ47 SA_RCVENIN# TP29 TPAD30 M_B_DQ50 2
AL5 SA_DQ47 SA_RCVENIN# AK23 BA4 SB_DQ50 SB_WE# AR27 M_B_WE# 11,12
M_A_DQ48 AY2 AK24 SA_RCVENOUT# TP28 TPAD30 M_B_DQ51 AW4
M_A_DQ49 SA_DQ48 SA_RCVENOUT# M_B_DQ52 SB_DQ51
AW2 SA_DQ49 SA_WE# AY14 M_A_WE# 11,12 AY10 SB_DQ52
M_A_DQ50 AP1 M_B_DQ53 AY9 Place Test PAD Near to Chip
M_A_DQ51 SA_DQ50 M_B_DQ54 SB_DQ53
AN2 SA_DQ51 AW5 SB_DQ54 ascould as possible
M_A_DQ52 AV2 Place Test PAD Near to Chip M_B_DQ55 AY5
AT3 SA_DQ53 as could as possible AV4 SB_DQ56
M_A_DQ54 AN1 M_B_DQ57 AR5
AL2 SA_DQ55 AK4 SB_DQ58
M_A_DQ56 AG7 M_B_DQ59 AK3
AF9 SA_DQ57 AT4 SB_DQ60
M_A_DQ58 AG4 M_B_DQ61 AK5
AF6 SA_DQ59 AJ5 SB_DQ62
M_A_DQ60 AG9 M_B_DQ63 AJ3
M_A_DQ61 SA_DQ60 SB_DQ63
AH6 SA_DQ61
M_A_DQ62 AF4 CALISTOGA
M_A_DQ63 SA_DQ62
AF8 SA_DQ63
CALISTOGA
1 <Variant Name> 1
Wistron Corporation
Title
GMCH (3 of 5)
A3
AG1 -1
A B C D E
A B C D E
2D5V_S0
U58H
H22 1D05V_S0
VCCSYNC
VTT_0 AC14
1
2D5V_3GBG_S0 2D5V_S0 2D5V_S0 C30 AB14
C167 VCC_TXLVDS0 VTT_1
B30 VCC_TXLVDS1 VTT_2 W14
1
SCD1U10V2KX-4GP A30 V14
2
1D5V_S0 1D5V_PCIE_S0 VCC_TXLVDS2 VTT_3
1 R461 2 VTT_4 T14 C193 C164 C557
0R0603-PAD AJ41 R14 SC2D2U6D3V3MX-1-GP SC4D7U10V5ZY-3GP
2
VCC3G0 VTT_5
1
1 R446 2 AB41 VCC3G1 VTT_6 P14
C502 0R0805-PAD Y41 N14
VCC3G2 VTT_7
1
SCD1U10V2KX-4GP
C499 C498 C497 C500
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
4 V41 M14 4
2
VCC3G3 VTT_8
R41 VCC3G4 VTT_9 L14
1D5V_S0 N41 AD13
2
1D5V_3GPLL_S0 VCC3G5 VTT_10
L41 VCC3G6 VTT_11 AC13
1 R114 2 AC33 VCCA_3GPLL VTT_12 AB13
0R0603-PAD 2D5V_3GBG_S0 G41 AA13
VCCA_3GBG VTT_13
1
SC4D7U6D3V3KX-GP
H41 VSSA_3GBG VTT_14 Y13
C127 C150 W13
VCCA_CRTDAC VTT_15
F21 V13
2
VCCA_CRTDAC0 VTT_16
E21 VCCA_CRTDAC1 VTT_17 U13
G21 VSSA_CRTDAC VTT_18 T13
VTT_19 R13
1D5V_DPLLA B26 N13
1D5V_DPLLB VCCA_DPLLA VTT_20
C39 VCCA_DPLLB VTT_21 M13
2D5V_S0 1D5V_HPLL_S0 AF1 L13
VCCA_HPLL VTT_22
VTT_23 AB12
A38 VCCA_LVDS VTT_24 AA12
B39 VSSA_LVDS VTT_25 Y12
1
VTT_26 W12
C148 1D5V_MPLL_S0 AF2 V12
1D5V_S0 SCD1U10V2KX-4GP VCCA_MPLL VTT_27
L13 U12
2
V_TVBG VTT_28
H20 VCCA_TVBG VTT_29 T12
1 2 1D5V_DPLLA G20 R12
HCB1608KF121T30-GP VSSA_TVBG VTT_30
VTT_31 P12
1
68.00230.041 N12
C151 C163 VTT_32
VTT_33 M12
SC10U10V5ZY-1GP SCD1U10V2KX-4GP V_DACA E19 L12
2
VCCA_TVDACA0 VTT_34
L12 F19 VCCA_TVDACA1 VTT_35 R11
V_DACB C20 P11
3 1D5V_DPLLB VCCA_TVDACB0 VTT_36 3
1 2 D20 VCCA_TVDACB1 VTT_37 N11
HCB1608KF121T30-GP V_DACC E20 M11
VCCA_TVDACC0
POWER VTT_38
1
68.00230.041 F20 R10

C128 C146 1D5V_S0 VCCA_TVDACC1 VTT_39
VTT_40 P10
SC10U10V5ZY-1GP SCD1U10V2KX-4GP AH1 N10
2
VCCD_HMPLL0 VTT_41
L31 AH2 VCCD_HMPLL1 VTT_42 M10
VTT_43 P9
1 2 1D5V_HPLL_S0 A28 N9
HCB1608KF121T30-GP VCCD_LVDS0 VTT_44
B28 VCCD_LVDS1 VTT_45 M9
1
68.00230.041 1D5V_S0 C28 R8

C224 C549 VCCD_LVDS2 VTT_46
VTT_47 P8
SC10U10V5ZY-1GP 1 R149 21D5V_TVDAC_S0 D21 N8
2
VCCD_TVDAC VTT_48
1
0R0603-PAD M8
L32 VTT_49
C166 A23 P7
SCD1U10V2KX-4GP
1D5V_MPLL_S0 VCC_HV0 VTT_50
1 2 B23 N7
2
HCB1608KF121T30-GP 3D3V_S0 VCC_HV1 VTT_51
B25 VCC_HV2 VTT_52 M7
1
68.00230.041 R6
C556 C550 VTT_53
1 R479 2 SCD1U10V2KX-4GP H19 VCCD_QTVDAC VTT_54 P6
SC10U10V5ZY-1GP 0R0603-PAD M6
2
VTT_55 VCCP_GMCH_CAP3
AK31 VCCAUX0 VTT_56 A6
1
AF31 VCCAUX1 VTT_57 R5
SCD1U10V2KX-4GP C524 C522 AE31 P5 C544
SC10U10V5ZY-1GP VCCAUX2 VTT_58
2 AC31 N5 SCD22U16V3ZY-GP
2
VCCAUX3 VTT_59
AL30 VCCAUX4 VTT_60 M5
1D5V_S0 AK30 P4
SCD1U10V2KX-4GP VCCAUX5 VTT_61
D9 AJ30 N4
VCCAUX6 VTT_62
1 AH30 VCCAUX7 VTT_63 M4
AG30 VCCAUX8 VTT_64 R3
3 1D5V_S0 AF30 P3
VCCAUX9 VTT_65
1
2 2
AE30 VCCAUX10 VTT_66 N3
2 R93 1 R155 21D5V_QTVDAC_S0 AD30 M3
VCCAUX11 VTT_67
1
10R2J-2-GP 0R0603-PAD AC30 R2
2D5V_CRTDAC VCCA_CRTDAC C177 VCCAUX12 VTT_68
BAT54-4-GP AG29 P2
VCCAUX13 VTT_69
AF29 M2
2
2
2D5V_S0 VCCAUX14 VTT_70 VCCP_GMCH_CAP2
L11 AE29 VCCAUX15 VTT_71 D2
AD29 AB1 VCCP_GMCH_CAP1
VCCAUX16 VTT_72
1
1 2 SCD1U10V2KX-4GP AC29 R1
HCB1608KF121T30-GP VCCAUX17 VTT_73 C553 C554
AG28 VCCAUX18 VTT_74 P1
68.00230.041 1 R113 2 AF28 N1 SCD47U10V3ZY-GP SCD47U10V3ZY-GP
2
0R0805-PAD VCCAUX19 VTT_75
AE28 VCCAUX20 VTT_76 M1
1
C118 AH22 VCCAUX21

AJ21 VCCAUX22
AH21
2
VCCAUX23
AJ20 VCCAUX24
AH20 VCCAUX25
SCD1U10V2KX-4GP 1D5V_S0 AH19 VCCAUX26
P19 VCCAUX27
1D5V_S0 1D5V_AUX P16 VCCAUX28
D8 AH15
3D3V_TVDAC VCCAUX29
1 1 R112 2 P15 VCCAUX30
0R0805-PAD AH14 VCCAUX31
3 AG14 VCCAUX32
1
1 R104 2 V_DACA C175 C156 C184 C185 AF14 VCCAUX33

2 R87 0R0603-PAD AE14
10R2J-2-GP VCCAUX34
1 R105 2 V_DACB Y14
2
VCCAUX35
1
BAT54-4-GP 0R0603-PAD AF13

C135 C134 VCCAUX36
AE13
2
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP VCCAUX37
1 L10 AF12 <Variant Name> 1
2
3D3V_S0 VCCAUX38
AE12 VCCAUX39
1 2 AD12 VCCAUX40
HCB1608KF121T30-GP 1 R103 2 V_DACC
SCD1U10V2KX-4GP SCD1U10V2KX-4GP
68.00230.041 0R0603-PAD Wistron Corporation
1
1 R102 2 V_TVBG CALISTOGA 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
1
C1170R0603-PAD Taipei Hsien 221, Taiwan, R.O.C.

SC10U10V5ZY-1GP C132 C133
2
Title
2
Divide by Trace (Layout Rule approve) GMCH (4 of 5)

SCD1U10V2KX-4GP SCD1U10V2KX-4GP Size Document Number Rev
A3
AG1 -1
A B C D E
A B C D E
U58G
1D05V_S0 AA33 U58I
VCC_0 1D05V_S0
W33 VCC_1 AC41 VSS_0 VSS_97 AK34
P33 VCC_2 AA41 VSS_1 VSS_98 AG34
N33 U58F W41 VSS_2 AF34
VCC_3 VSS_99 U58J
L33 VCC_4 VCC_SM_0 AU41 VCC_NCTF0 AD27 T41 VSS_3 VSS_100 AE34
J33 VCC_5 VCC_SM_1 AT41 VCC_NCTF1 AC27 VSS_NCTF0 AE27 P41 VSS_4 VSS_101 AC34 AT23 VSS_180 VSS_273 J11
AA32 VCC_6 VCC_SM_2 AM41 VCC_NCTF2 AB27 VSS_NCTF1 AE26 M41 VSS_5 VSS_102 C34 AN23 VSS_181 VSS_274 D11
Y32 VCC_7 VCC_SM_3 AU40 VCC_NCTF3 AA27 VSS_NCTF2 AE25 J41 VSS_6 VSS_103 AW33 AM23 VSS_182 VSS_275 B11
W32 VCC_8 VCC_SM_4 BA34 VCC_NCTF4 Y27 VSS_NCTF3 AE24 F41 VSS_7 VSS_104 AV33 AH23 VSS_183 VSS_276 AV10
V32 VCC_9 VCC_SM_5 AY34 VCC_NCTF5 W27 VSS_NCTF4 AE23 AV40 VSS_8 VSS_105 AR33 AC23 VSS_184 VSS_277 AP10
P32 VCC_10 VCC_SM_6 AW34 VCC_NCTF6 V27 VSS_NCTF5 AE22 AP40 VSS_9 VSS_106 AE33 W23 VSS_185 VSS_278 AL10
N32 VCC_11 VCC_SM_7 AV34 VCC_NCTF7 U27 VSS_NCTF6 AE21 AN40 VSS_10 VSS_107 AB33 K23 VSS_186 VSS_279 AJ10
M32 VCC_12 VCC_SM_8 AU34 VCC_NCTF8 T27 VSS_NCTF7 AE20 AK40 VSS_11 VSS_108 Y33 J23 VSS_187 VSS_280 AG10
4 L32 VCC_13 VCC_SM_9 AT34 VCC_NCTF9 R27 VSS_NCTF8 AE19 AJ40 VSS_12 VSS_109 V33 F23 VSS_188 VSS_281 AC10 4
J32 VCC_14 VCC_SM_10 AR34 VCC_NCTF10AD26 VSS_NCTF9 AE18 AH40 VSS_13 VSS_110 T33 C23 VSS_189 VSS_282 W10
AA31 VCC_15 VCC_SM_11 BA30 VCC_NCTF11AC26 VSS_NCTF10 AC17 AG40 VSS_14 VSS_111 R33 AA22 VSS_190 VSS_283 U10
W31 VCC_16 VCC_SM_12 AY30 VCC_NCTF12AB26 VSS_NCTF11 Y17 AF40 VSS_15 VSS_112 M33 K22 VSS_191 VSS_284 BA9
V31 VCC_17 VCC_SM_13 AW30 VCC_NCTF13AA26 VSS_NCTF12 U17 AE40 VSS_16 VSS_113 H33 G22 VSS_192 VSS_285 AW9
T31 VCC_18 VCC_SM_14 AV30 VCC_NCTF14 Y26 B40 VSS_17 VSS_114 G33 F22 VSS_193 VSS_286 AR9
R31 AU30 W26 1D5V_AUX AY39 F33 E22 AH9
VCC_19 VCC_SM_15 VCC_NCTF15 VSS_18 VSS_115 VSS_194 VSS_287
P31 VCC_20 VCC_SM_16 AT30 VCC_NCTF16 V26 AW39 VSS_19 VSS_116 D33 D22 VSS_195 VSS_288 AB9
N31 VCC_21 VCC_SM_17 AR30 VCC_NCTF17 U26 AV39 VSS_20 VSS_117 B33 A22 VSS_196 VSS_289 Y9
M31 VCC_22 VCC_SM_18 AP30 VCC_NCTF18 T26 AR39 VSS_21 VSS_118 AH32 BA21 VSS_197 VSS_290 R9
AA30 VCC_23 VCC_SM_19 AN30 VCC_NCTF19 R26 VCCAUX_NCTF0 AG27 AN39 VSS_22 VSS_119 AG32 AV21 VSS_198 VSS_291 G9
Y30 VCC_24 VCC_SM_20 AM30 VCC_NCTF20AD25 VCCAUX_NCTF1 AF27 AJ39 VSS_23 VSS_120 AF32 AR21 VSS_199 VSS_292 E9
W30 VCC_25 VCC_SM_21 AM29 VCC_NCTF21AC25 VCCAUX_NCTF2 AG26 AC39 VSS_24 VSS_121 AE32 AN21 VSS_200 VSS_293 A9
V30 VCC_26 VCC_SM_22 AL29 VCC_NCTF22AB25 VCCAUX_NCTF3 AF26 AB39 VSS_25 VSS_122 AC32 AL21 VSS_201 VSS_294 AG8
U30 VCC_27 VCC_SM_23 AK29 VCC_NCTF23AA25 VCCAUX_NCTF4 AG25 AA39 VSS_26 VSS_123 AB32 AB21 VSS_202 VSS_295 AD8
T30 VCC_28 VCC_SM_24 AJ29 VCC_NCTF24 Y25 VCCAUX_NCTF5 AF25 Y39 VSS_27 VSS_124 G32 Y21 VSS_203 VSS_296 AA8
R30 VCC_29 VCC_SM_25 AH29 VCC_NCTF25 W25 VCCAUX_NCTF6 AG24 W39 VSS_28 VSS_125 B32 P21 VSS_204 VSS_297 U8
P30 VCC_30 VCC_SM_26 AJ28 VCC_NCTF26 V25 VCCAUX_NCTF7 AF24 V39 VSS_29 VSS_126 AY31 K21 VSS_205 VSS_298 K8
N30 VCC_31 VCC_SM_27 AH28 VCC_NCTF27 U25 VCCAUX_NCTF8 AG23 T39 VSS_30 VSS_127 AV31 J21 VSS_206 VSS_299 C8
M30 VCC_32 VCC_SM_28 AJ27 VCC_NCTF28 T25 VCCAUX_NCTF9 AF23 R39 VSS_31 VSS_128 AN31 H21 VSS_207 VSS_300 BA7
L30 VCC_33 VCC_SM_29 AH27 VCC_NCTF29 R25 VCCAUX_NCTF10 AG22 P39 VSS_32 VSS_129 AJ31 C21 VSS_208 VSS_301 AV7
AA29 BA26 AD24 VCCAUX_NCTF11 AF22 N39 VSS_33 AG31 AW20 AP7
Y29
W29
VCC_34
VCC_35
VCC_36
VCC_SM_30
VCC_SM_31
VCC_SM_32
AY26
AW26
VCC_NCTF30
VCC_NCTF31
VCC_NCTF32
AC24
AB24
VCCAUX_NCTF12 AG21
VCCAUX_NCTF13 AF21
M39 VSS_34
L39 VSS_35
VSS VSS_130
VSS_131
VSS_132
AB31
Y31
AR20
AM20
VSS_209
VSS_210
VSS_211 VSS
VSS_302
VSS_303
VSS_304
AL7
AJ7
V29 VCC_37 VCC_SM_33 AV26 VCC_NCTF33AA24 VCCAUX_NCTF14 AG20 J39 VSS_36 VSS_133 AB30 AA20 VSS_212 VSS_305 AH7
U29 VCC_38 VCC_SM_34 AU26 VCC_NCTF34 Y24 VCCAUX_NCTF15 AF20 H39 VSS_37 VSS_134 E30 K20 VSS_213 VSS_306 AF7
R29 VCC_39 VCC_SM_35 AT26 VCC_NCTF35 W24 VCCAUX_NCTF16 AG19 G39 VSS_38 VSS_135 AT29 B20 VSS_214 VSS_307 AC7
P29 VCC_40 VCC_SM_36 AR26 VCC_NCTF36 V24 VCCAUX_NCTF17 AF19 F39 VSS_39 VSS_136 AN29 A20 VSS_215 VSS_308 R7
M29 VCC_41 VCC_SM_37 AJ26 VCC_NCTF37 U24 VCCAUX_NCTF18 R19 D39 VSS_40 VSS_137 AB29 AN19 VSS_216 VSS_309 G7
3 L29 AH26 T24 AG18 AT38 T29 AC19 D7 3
VCC_42 VCC_SM_38 VCC_NCTF38 VCCAUX_NCTF19 VSS_41 VSS_138 VSS_217 VSS_310
AB28 VCC_43 VCC_SM_39 AJ25 VCC_NCTF39 R24 VCCAUX_NCTF20 AF18 AM38 VSS_42 VSS_139 N29 W19 VSS_218 VSS_311 AG6
AA28 VCC_44 VCC_SM_40 AH25 VCC_NCTF40AD23 VCCAUX_NCTF21 R18 AH38 VSS_43 VSS_140 K29 K19 VSS_219 VSS_312 AD6
Y28 VCC_45 VCC_SM_41 AJ24 VCC_NCTF41 V23 VCCAUX_NCTF22 AG17 AG38 VSS_44 VSS_141 G29 G19 VSS_220 VSS_313 AB6
V28 VCC_46 VCC_SM_42 AH24 VCC_NCTF42 U23 VCCAUX_NCTF23 AF17 AF38 VSS_45 VSS_142 E29 C19 VSS_221 VSS_314 Y6
U28 VCC_47 VCC_SM_43 BA23 VCC_NCTF43 T23 VCCAUX_NCTF24 AE17 AE38 VSS_46 VSS_143 C29 AH18 VSS_222 VSS_315 U6
T28 VCC_48 VCC_SM_44 AJ23 VCC_NCTF44 R23 VCCAUX_NCTF25 AD17 C38 VSS_47 VSS_144 B29 P18 VSS_223 VSS_316 N6
R28 VCC_49 VCC_SM_45 BA22 VCC_NCTF45AD22 VCCAUX_NCTF26 AB17 AK37 VSS_48 VSS_145 A29 H18 VSS_224 VSS_317 K6
P28 VCC_50 VCC_SM_46 AY22 VCC_NCTF46 V22 VCCAUX_NCTF27 AA17 AH37 VSS_49 VSS_146 BA28 D18 VSS_225 VSS_318 H6
N28 VCC_51 VCC_SM_47 AW22 VCC_NCTF47 U22 VCCAUX_NCTF28 W17 AB37 VSS_50 VSS_147 AW28 A18 VSS_226 VSS_319 B6
M28 VCC_52 VCC_SM_48 AV22 VCC_NCTF48 T22 VCCAUX_NCTF29 V17 AA37 VSS_51 VSS_148 AU28 AY17 VSS_227 VSS_320 AV5
L28 VCC_53 VCC_SM_49 AU22 VCC_NCTF49 R22 VCCAUX_NCTF30 T17 Y37 VSS_52 VSS_149 AP28 AR17 VSS_228 VSS_321 AF5
P27 AT22 AD21 R17 W37 VSS_53 AM28 AP17 AD5
N27
M27
VCC_54
VCC_55
VCC_56
VCC_SM_50
VCC_SM_51
VCC_SM_52
AR22
AP22
VCC_NCTF50
VCC_NCTF51
VCC_NCTF52
V21
U21
VCCAUX_NCTF31
VCCAUX_NCTF32 AG16
VCCAUX_NCTF33 AF16
NCTF V37 VSS_54
T37 VSS_55
VSS_150
VSS_151
VSS_152
AD28
AC28
AM17
AK17
VSS_229
VSS_230
VSS_231
VSS_322
VSS_323
VSS_324
AY4
AR4
L27 VCC_57 VCC_SM_53 AK22 VCC_NCTF53 T21 VCCAUX_NCTF34 AE16 R37 VSS_56 VSS_153 W28 AV16 VSS_232 VSS_325 AP4
P26 VCC_58 VCC_SM_54 AJ22 VCC_NCTF54 R21 VCCAUX_NCTF35 AD16 P37 VSS_57 VSS_154 J28 AN16 VSS_233 VSS_326 AL4
N26 VCC_59 VCC_SM_55 AK21 VCC_NCTF55AD20 VCCAUX_NCTF36 AC16 N37 VSS_58 VSS_155 E28 AL16 VSS_234 VSS_327 AJ4
L26 VCC_60 VCC_SM_56 AK20 VCC_NCTF56 V20 VCCAUX_NCTF37 AB16 M37 VSS_59 VSS_156 AP27 J16 VSS_235 VSS_328 Y4
N25 VCC_61 VCC_SM_57 BA19 VCC_NCTF57 U20 VCCAUX_NCTF38 AA16 L37 VSS_60 VSS_157 AM27 F16 VSS_236 VSS_329 U4
M25 VCC_62 VCC_SM_58 AY19 VCC_NCTF58 T20 VCCAUX_NCTF39 Y16 J37 VSS_61 VSS_158 AK27 C16 VSS_237 VSS_330 R4
L25 VCC_63 VCC_SM_59 AW19 VCC_NCTF59 R20 VCCAUX_NCTF40 W16 H37 VSS_62 VSS_159 J27 AN15 VSS_238 VSS_331 J4
P24 VCC_64 VCC_SM_60 AV19 VCC_NCTF60AD19 VCCAUX_NCTF41 V16 G37 VSS_63 VSS_160 G27 AM15 VSS_239 VSS_332 F4
N24 VCC_65 VCC_SM_61 AU19 VCC_NCTF61 V19 VCCAUX_NCTF42 U16 F37 VSS_64 VSS_161 F27 AK15 VSS_240 VSS_333 C4
M24 VCC_66 VCC_SM_62 AT19 VCC_NCTF62 U19 VCCAUX_NCTF43 T16 D37 VSS_65 VSS_162 C27 N15 VSS_241 VSS_334 AY3
AB23 VCC_67 VCC_SM_63 AR19 VCC_NCTF63 T19 VCCAUX_NCTF44 R16 AY36 VSS_66 VSS_163 B27 M15 VSS_242 VSS_335 AW3
AA23 AP19 AD18 VCCAUX_NCTF45 AG15 AW36 VSS_67 AN26 L15 AV3
2
Y23
P23
VCC_68
VCC_69
VCC_70
VCC VCC_SM_64
VCC_SM_65
VCC_SM_66
AK19
AJ19
VCC_NCTF64
VCC_NCTF65
VCC_NCTF66
AC18
AB18
VCCAUX_NCTF46 AF15
VCCAUX_NCTF47 AE15
AN36 VSS_68
AH36 VSS_69
VSS_164
VSS_165
VSS_166
M26
K26
B15
A15
VSS_243
VSS_244
VSS_245
VSS_336
VSS_337
VSS_338
AL3
AH3
2
N23 VCC_71 VCC_SM_67 AJ18 VCC_NCTF67AA18 VCCAUX_NCTF48 AD15 AG36 VSS_70 VSS_167 F26 BA14 VSS_246 VSS_339 AG3
M23 VCC_72 VCC_SM_68 AJ17 VCC_NCTF68 Y18 VCCAUX_NCTF49 AC15 AF36 VSS_71 VSS_168 D26 AT14 VSS_247 VSS_340 AF3
L23 VCC_73 VCC_SM_69 AH17 VCC_NCTF69 W18 VCCAUX_NCTF50 AB15 AE36 VSS_72 VSS_169 AK25 AK14 VSS_248 VSS_341 AD3
AC22 VCC_74 VCC_SM_70 AJ16 VCC_NCTF70 V18 VCCAUX_NCTF51 AA15 AC36 VSS_73 VSS_170 P25 AD14 VSS_249 VSS_342 AC3
AB22 VCC_75 VCC_SM_71 AH16 VCC_NCTF71 U18 VCCAUX_NCTF52 Y15 C36 VSS_74 VSS_171 K25 AA14 VSS_250 VSS_343 AA3
Y22 VCC_76 VCC_SM_72 BA15 VCC_NCTF72 T18 VCCAUX_NCTF53 W15 B36 VSS_75 VSS_172 H25 U14 VSS_251 VSS_344 G3
W22 VCC_77 VCC_SM_73 AY15 VCCAUX_NCTF54 V15 BA35 VSS_76 VSS_173 E25 K14 VSS_252 VSS_345 AT2
P22 VCC_78 VCC_SM_74 AW15 VCCAUX_NCTF55 U15 AV35 VSS_77 VSS_174 D25 H14 VSS_253 VSS_346 AR2
N22 VCC_79 VCC_SM_75 AV15 VCCAUX_NCTF56 T15 AR35 VSS_78 VSS_175 A25 E14 VSS_254 VSS_347 AP2
M22 VCC_80 VCC_SM_76 AU15 VCCAUX_NCTF57 R15 AH35 VSS_79 VSS_176 BA24 AV13 VSS_255 VSS_348 AK2
L22 VCC_81 VCC_SM_77 AT15 AB35 VSS_80 VSS_177 AU24 AR13 VSS_256 VSS_349 AJ2
AC21 VCC_82 VCC_SM_78 AR15 CALISTOGA AA35 VSS_81 VSS_178 AL24 AN13 VSS_257 VSS_350 AD2
AA21 VCC_83 VCC_SM_79 AJ15 Y35 VSS_82 VSS_179 AW23 AM13 VSS_258 VSS_351 AB2
W21 VCC_84 VCC_SM_80 AJ14 W35 VSS_83 AL13 VSS_259 VSS_352 Y2
N21 AJ13 1D05V_S0 V35 VSS_84 AG13 U2
VCC_85 VCC_SM_81 VSS_260 VSS_353
M21 VCC_86 VCC_SM_82 AH13 T35 VSS_85 P13 VSS_261 VSS_354 T2
L21 VCC_87 VCC_SM_83 AK12 R35 VSS_86 F13 VSS_262 VSS_355 N2
AC20 VCC_88 VCC_SM_84 AJ12 P35 VSS_87 D13 VSS_263 VSS_356 J2
1
AB20 AH12 C160 N35 VSS_88 B13 H2

VCC_89 VCC_SM_85 C157 C154 C152 C176 C173 C155 TC15 VSS_264 VSS_357
Y20 VCC_90 VCC_SM_86 AG12 M35 VSS_89 AY12 VSS_265 VSS_358 F2
W20 AK11 SC10U10V5ZY-1GP ST100U4VBM-L1-GP
L35 VSS_90 AC12 C2
2
VCC_91 VCC_SM_87 SC10U10V5ZY-1GP VSS_266 VSS_359

P20 VCC_92 VCC_SM_88 BA8 J35 VSS_91 K12 VSS_267 VSS_360 AL1
N20 AY8 SCD1U10V2KX-4GP H35 VSS_92 H12
VCC_93 VCC_SM_89 SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP VSS_268
M20 VCC_94 VCC_SM_90 AW8 G35 VSS_93 E12 VSS_269
L20 VCC_95 VCC_SM_91 AV8 Place these Caps close VCC_0 ~ VCC_110 F35 VSS_94 AD11 VSS_270
AB19 VCC_96 VCC_SM_92 AT8 D35 VSS_95 AA11 VSS_271
AA19 VCC_97 VCC_SM_93 AR8 AN34 VSS_96 Y11 VSS_272
Y19 AP8 1D8V_S3
VCC_98 VCC_SM_94
1 N19 VCC_99 VCC_SM_95 BA6 <Variant Name> CALISTOGA 1
M19 AY6 CALISTOGA
VCC_100 VCC_SM_96
SC10U10V5ZY-1GP
L19 VCC_101 VCC_SM_97 AW6

ST220U2VBM-3GP
N18 AV6
VCC_102 VCC_SM_98 Wistron Corporation
1
1
M18 AT6 C543 C204 C168 C188 C226 C141 C535 C514 C162
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
VCC_103 VCC_SM_99
1
L18 AR6 TC16 DY C206 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
VCC_104 VCC_SM_100 Taipei Hsien 221, Taiwan, R.O.C.
P17 AP6 DY
2
2
VCC_105 VCC_SM_101
N17 AN6
2
VCC_106 VCC_SM_102 Title

M17 VCC_107 VCC_SM_103 AL6
N16 AK6 SCD1U10V2KX-4GP SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
M16
VCC_108
VCC_109
VCC_SM_104
VCC_SM_105 AJ6 SCD1U10V2KX-4GP GMCH (5 of 5)
L16 AV1 Size Document Number Rev
VCC_110 VCC_SM_106 A3
AJ1
VCC_SM_107 CALISTOGA AG1 -1
A B C D E
A B C D E
8,12 M_A_A[13..0] DM2

DM1 M_A_A0 102 108 M_A_RAS# 8,12
8,12 M_B_A[13..0] A0 /RAS
M_B_A0 102 108 M_B_RAS# 8,12 M_A_A1 101 109 M_A_WE# 8,12
M_B_A1 A0 /RAS M_A_A2 A1 /WE
101 A1 /WE 109 M_B_WE# 8,12 100 A2 /CAS 113 M_A_CAS# 8,12
M_B_A2 100 113 M_B_CAS# 8,12 M_A_A3 99
M_B_A3 A2 /CAS M_A_A4 A3
99 A3 98 A4 /CS0 110 M_CS0# 7,12
M_B_A4 98 110 M_CS2# 7,12 M_A_A5 97 115 M_CS1# 7,12
M_B_A5 A4 /CS0 M_A_A6 A5 /CS1
97 A5 /CS1 115 M_CS3# 7,12 94 A6
M_B_A6 94 M_A_A7 92 79 M_CKE0 7,12
M_B_A7 A6 M_A_A8 A7 CKE0
92 A7 CKE0 79 M_CKE2 7,12 93 A8 CKE1 80 M_CKE1 7,12
M_B_A8 93 80 M_CKE3 7,12 M_A_A9 91
4
M_B_A9 A8 CKE1 M_A_A10 A9 4
91 A9 105 A10/AP CK0 30 M_CLK_DDR0 7
M_B_A10 105 30 M_CLK_DDR3 7 M_A_A11 90 32 M_CLK_DDR#0 7
M_B_A11 A10/AP CK0 M_A_A12 A11 /CK0
90 A11 /CK0 32 M_CLK_DDR#3 7 89 A12
M_B_A12 89 M_A_A13 116 164 M_CLK_DDR1 7
M_B_A13 A12 A13 CK1
116 A13 CK1 164 M_CLK_DDR2 7 86 A14 /CK1 166 M_CLK_DDR#1 7
86 A14 /CK1 166 M_CLK_DDR#2 7 84 A15 M_A_DM[7..0] 8
84 M_B_DM[7..0] 8 8,12 M_A_BS#2 85 10 M_A_DM0
A15 M_B_DM0 A16/BA2 DM0 M_A_DM1
8,12 M_B_BS#2 85 A16/BA2 DM0 10 DM1 26
26 M_B_DM1 8,12 M_A_BS#0 107 52 M_A_DM2
DM1 M_B_DM2 BA0 DM2 M_A_DM3
8,12 M_B_BS#0 107 BA0 DM2 52 8,12 M_A_BS#1 106 BA1 DM3 67
8,12 M_B_BS#1 106 67 M_B_DM3 130 M_A_DM4
BA1 DM3 M_B_DM4 M_A_DQ0 DM4 M_A_DM5
DM4 130 5 DQ0 DM5 147
M_B_DQ0 5 147 M_B_DM5 M_A_DQ1 7 170 M_A_DM6
DQ0 DM5 8 M_A_DQ[63..0] DQ1 DM6
M_B_DQ1 7 170 M_B_DM6 M_A_DQ2 17 185 M_A_DM7
8 M_B_DQ[63..0] DQ1 DM6 DQ2 DM7
M_B_DQ2 17 185 M_B_DM7 M_A_DQ3 19
M_B_DQ3 DQ2 DM7 M_A_DQ4 DQ3 SMBD_ICH
19 DQ3 4 DQ4 SDA 195
M_B_DQ4 4 195 SMBD_ICH 3,18 M_A_DQ5 6 197 SMBC_ICH
M_B_DQ5 DQ4 SDA 3D3V_S0 M_A_DQ6 DQ5 SCL
6 DQ5 SCL 197 SMBC_ICH 3,18 14 DQ6
M_B_DQ6 14 M_A_DQ7 16 199
DQ6 DQ7 VDDSPD 3D3V_S0
M_B_DQ7 16 199 M_A_DQ8 23
DQ7 VDDSPD DQ8
1
M_B_DQ8 23 M_A_DQ9 25 198
M_B_DQ9 DQ8 M_A_DQ10 DQ9 SA0 BC6
25 DQ9 SA0 198 35 DQ10 SA1 200
M_B_DQ10 35 200 1 R211
2 M_A_DQ11 37 SCD1U16V2ZY-2GP
2
M_B_DQ11 DQ10 SA1 10KR2J-3-GP M_A_DQ12 DQ11
37 DQ11 20 DQ12 NC#50 50
1
M_B_DQ12 20 50 BC5 M_A_DQ13 22 69
M_B_DQ13 DQ12 NC#50 SCD1U16V2ZY-2GP M_A_DQ14 DQ13 NC#69
22 DQ13 NC#69 69 36 DQ14 NC#83 83
M_B_DQ14 36 83 M_A_DQ15 38 120
2
M_B_DQ15 DQ14 NC#83 M_A_DQ16 DQ15 NC#120
38 DQ15 NC#120 120 43 DQ16 NC#163/TEST 163
M_B_DQ16 43 163 M_A_DQ17 45
M_B_DQ17 DQ16 NC#163/TEST M_A_DQ18 DQ17
45 DQ17 55 DQ18
M_B_DQ18 55 M_A_DQ19 57 81
3 M_B_DQ19 DQ18 M_A_DQ20 DQ19 VDD 3
57 DQ19 VDD 81 44 DQ20 VDD 82
M_B_DQ20 44 82 M_A_DQ21 46 87
M_B_DQ21 DQ20 VDD M_A_DQ22 DQ21 VDD
46 87 56 88
NORMAL TYPE
NORMAL TYPE
56 DQ22 VDD 88 58 DQ23 VDD 95
M_B_DQ23 58 95 M_A_DQ24 61 96
61 DQ24 VDD 96 63 DQ25 VDD 103
M_B_DQ25 63 103 M_A_DQ26 73 104
73 DQ26 VDD 104 75 DQ27 VDD 111
M_B_DQ27 75 111 M_A_DQ28 62 112
62 DQ28 VDD 112 64 DQ29 VDD 117
M_B_DQ29 64 117 M_A_DQ30 74 118
DQ29 VDD DQ30 VDD 1D8V_S3
M_B_DQ30 74 118 M_A_DQ31 76
DQ30 VDD 1D8V_S3 DQ31
M_B_DQ31 76 M_A_DQ32 123 3
M_B_DQ32 DQ31 M_A_DQ33 DQ32 VSS
123 DQ32 VSS 3 125 DQ33 VSS 8
M_B_DQ33 125 8 M_A_DQ34 135 9
M_B_DQ34 DQ33 VSS M_A_DQ35 DQ34 VSS
135 DQ34 VSS 9 137 DQ35 VSS 12
M_B_DQ35 137 12 M_A_DQ36 124 15 Place near DM2
124 DQ36 VSS 15 126 DQ37 VSS 18
M_B_DQ37 126 18 M_A_DQ38 134 21
M_B_DQ38 DQ37 VSS M_A_DQ39 DQ38 VSS M_CLK_DDR0
M_B_DQ39
134 DQ38 VSS 21 Place near DM1 M_A_DQ40
136 DQ39 VSS 24
136 DQ39 VSS 24 141 DQ40 VSS 27
1
M_B_DQ40 141 27 M_A_DQ41 143 28 DY
M_B_DQ41 DQ40 VSS M_CLK_DDR3 M_A_DQ42 DQ41 VSS C165
143 DQ41 VSS 28 151 DQ42 VSS 33
M_B_DQ42 151 33 M_A_DQ43 153 34 SC10P50V2JN-4GP
2
DQ42 VSS DQ43 VSS
1
M_B_DQ43 153 34 M_A_DQ44 140 39 M_CLK_DDR#0
M_B_DQ44 DQ43 VSS C174 M_A_DQ45 DQ44 VSS
M_B_DQ45
140 DQ44 VSS 39 DY SC10P50V2JN-4GP M_A_DQ46
142 DQ45 VSS 40
M_CLK_DDR1
142 40 152 41
2
M_B_DQ46 DQ45 VSS M_CLK_DDR#3 M_A_DQ47 DQ46 VSS
152 DQ46 VSS 41 154 DQ47 VSS 42
1
M_B_DQ47 154 42 M_A_DQ48 157 47 DY
M_B_DQ48 DQ47 VSS M_CLK_DDR2 M_A_DQ49 DQ48 VSS C252
157 DQ48 VSS 47 159 DQ49 VSS 48
M_B_DQ49 159 48 M_A_DQ50 173 53 SC10P50V2JN-4GP
2
DQ49 VSS DQ50 VSS
1
M_B_DQ50 173 53 DY M_A_DQ51 175 54 M_CLK_DDR#1
2
M_B_DQ51 DQ50 VSS C251 M_A_DQ52 DQ51 VSS 2
175 DQ51 VSS 54 158 DQ52 VSS 59
M_B_DQ52 158 59 SC10P50V2JN-4GP M_A_DQ53 160 60
2
M_B_DQ53 DQ52 VSS M_CLK_DDR#2 M_A_DQ54 DQ53 VSS
160 DQ53 VSS 60 174 DQ54 VSS 65
M_B_DQ54 174 65 M_A_DQ55 176 66
176 DQ55 VSS 66 179 DQ56 VSS 71
M_B_DQ56 179 71 M_A_DQ57 181 72
181 DQ57 VSS 72 189 DQ58 VSS 77
M_B_DQ58 189 77 M_A_DQ59 191 78
191 DQ59 VSS 78 180 DQ60 VSS 121
M_B_DQ60 180 121 M_A_DQ61 182 122
182 DQ61 VSS 122 192 DQ62 VSS 127
M_B_DQ62 192 127 M_A_DQ63 194 128
M_B_DQ63 DQ62 VSS DQ63 VSS
194 DQ63 VSS 128 VSS 132
132 M_A_DQS#0 11 133
M_B_DQS#0 VSS M_A_DQS#1 /DQS0 VSS
11 /DQS0 VSS 133 8 M_A_DQS#[7..0] 29 /DQS1 VSS 138
M_B_DQS#1 29 138 M_A_DQS#2 49 139
8 M_B_DQS#[7..0] /DQS1 VSS /DQS2 VSS
M_B_DQS#2 49 139 M_A_DQS#3 68 144
M_B_DQS#3 /DQS2 VSS M_A_DQS#4 /DQS3 VSS
68 /DQS3 VSS 144 129 /DQS4 VSS 145
M_B_DQS#4 129 145 M_A_DQS#5 146 149
M_B_DQS#5 /DQS4 VSS M_A_DQS#6 /DQS5 VSS
146 /DQS5 VSS 149 167 /DQS6 VSS 150
M_B_DQS#6 167 150 M_A_DQS#7 186 155
M_B_DQS#7 /DQS6 VSS /DQS7 VSS
186 /DQS7 VSS 155 VSS 156
156 M_A_DQS0 13 161
M_B_DQS0 VSS M_A_DQS1 DQS0 VSS
13 DQS0 VSS 161 8 M_A_DQS[7..0] 31 DQS1 VSS 162
M_B_DQS1 31 162 M_A_DQS2 51 165
8 M_B_DQS[7..0] DQS1 VSS DQS2 VSS
M_B_DQS2 51 165 M_A_DQS3 70 168
M_B_DQS3 DQS2 VSS M_A_DQS4 DQS3 VSS
70 DQS3 VSS 168 131 DQS4 VSS 171
M_B_DQS4 131 171 M_A_DQS5 148 172
M_B_DQS5 DQS4 VSS M_A_DQS6 DQS5 VSS
148 DQS5 VSS 172 169 DQS6 VSS 177
M_B_DQS6 169 177 M_A_DQS7 188 178
M_B_DQS7 DQS6 VSS DQS7 VSS
188 DQS7 VSS 178 VSS 183
1 183 114 184 1
VSS 7,12 M_ODT0 ODT0 VSS
7,12 M_ODT2 114 ODT0 VSS 184 7,12 M_ODT1 119 ODT1 VSS 187 <Variant Name>
7,12 M_ODT3 119 ODT1 VSS 187 DDR_VREF_S3 VSS 190
190 DDR_VREF_S3 1 193
DDR_VREF_S3 VSS VREF VSS
1 193 2 196
VREF VSS VSS VSS Wistron Corporation
1
2 196 C512 BC10

SC2D2U10V3ZY-1GP
VSS VSS
1
C510 BC4 202 201 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
SC2D2U10V3ZY-1GP
SCD1U16V2ZY-2GP GND GND Taipei Hsien 221, Taiwan, R.O.C.

202 201 DY
2
SCD1U16V2ZY-2GP GND GND DDR2-200P-4-GP 62.10017.761

DY
2
DDR2-200P-5-GP 62.10017.771 Title

High 9.2mm
High 5.2mm 2nd source:62.10017.A61
DDR2 Socket
2nd source:62.10017.661 Custom
AG1 -1
A B C D E
A B C D E
PARALLEL TERMINATION Decoupling Capacitor

Put decap near power(0.9V) and pull-up resistor
DDR_VREF_S0
Put decap near power(0.9V)
RN44 DDR_VREF_S0
8 1 M_CKE2 7,11
and pull-up resistor
7 2 M_B_BS#2 8,11
4 6 3 M_B_A12 M_A_A[13..0] 8,11 4
5 4 M_B_A9
1
M_B_A[13..0] 8,11
SRN56J-2-GP C229 C231 C219 C246 C236 C214 C232 C240 C237 C245 C223
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
2
1 2
R186 2 56R2J-4-GP
M_ODT1 7,11 DY DY
1 M_ODT3 7,11
1 R187 2 56R2J-4-GP M_A_A9
1 R182 2 56R2J-4-GP M_B_A8
R184 56R2J-4-GP
1
RN47
8 1 M_B_A5 C216 C227 C233 C228 C239 C235 C244 C230 C241 C218 C213
7 2 M_B_A3 SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
2
6 3 M_B_A1 DY DY
5 4 M_B_A10
SRN56J-2-GP
RN53
8 1 M_B_A13
7 2 M_ODT2 7,11
6 3 M_CS2# 7,11
5 4 M_B_RAS# 8,11 1D8V_S3
SRN56J-2-GP Place these Caps near DM1
RN49
8 1 M_B_BS#1 8,11
1
7 2 M_B_A0
3 6 3 M_B_A2 C205 C200 C197 C201 C559 3
5 4 M_B_A4 SC2D2U6D3V3MX-1-GP SC2D2U6D3V3MX-1-GP SC2D2U6D3V3MX-1-GP SC2D2U6D3V3MX-1-GP SC2D2U6D3V3MX-1-GP
2
SRN56J-2-GP
RN45
8 1 M_B_A6
7 2 M_B_A7
1
6 3 M_B_A11
5 4 M_CKE3 7,11 C558 C212 C555 C546
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
2
SRN56J-2-GP DY DY DY
RN52
8 1 M_B_BS#0 8,11
7 2 M_B_WE# 8,11
6 3 M_CS3# 7,11
5 4 M_B_CAS# 8,11
SRN56J-2-GP 1D8V_S3
Place these Caps near DM2
RN54
8 1 M_A_A13
7 2 M_ODT0 7,11
1
6 3 M_CS0# 7,11
5 4 M_A_RAS# 8,11 C565 C203 C225 C217 C560
SC2D2U6D3V3MX-1-GP SC2D2U6D3V3MX-1-GP SC2D2U6D3V3MX-1-GP SC2D2U6D3V3MX-1-GP SC2D2U6D3V3MX-1-GP
2
SRN56J-2-GP
2 2
RN50
8 1 M_A_BS#1 8,11
7 2 M_A_A0
6 3 M_A_A2 1
1
5 4 M_A_A4
C207 C196 C247 C547
SRN56J-2-GP SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
2
2
DY DY DY
RN51
8 1 M_A_BS#0 8,11
7 2 M_A_WE# 8,11
6 3 M_A_CAS# 8,11
5 4 M_CS1# 7,11
SRN56J-2-GP
RN43
8 1 M_CKE0 7,11
7 2 M_A_BS#2 8,11
6 3 M_A_A12
5 4 M_A_A8
SRN56J-2-GP
RN46
8 1 M_A_A6
7 2 M_A_A7
6 3 M_A_A11
1 5 4 M_CKE1 7,11 <Variant Name> 1
SRN56J-2-GP
RN48 Wistron Corporation

8 1 M_A_A5 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
7 2 M_A_A3 Taipei Hsien 221, Taiwan, R.O.C.
6 3 M_A_A1
5 4 M_A_A10 Title
SRN56J-2-GP DDR2 Termination Resistor

A3
AG1 -1
A B C D E
3D3V_S0
LCD/INVERTER/CCD CONN
LAUNCH1
12
Launch
1
LAUNCH BD CONN CCD Pin
Pin Symbol LCD1 CCD_5V 5V_S0 3D3V_S0
EC5 SCD1U10V2KX-4GP
14
12 1 5V 43 41 1N4148W-7-F-GP 1 2
SCD01U16V2KX-3GP
11 INT_MICP 29 3D3V_AUX_S5 D43
10 1 2 2 USB- MH1 1 2 1
2
9 EC38 SCD01U16V2KX-3GP CCD_3V5V_S0 EC4
2
8 EMAIL_LED# 1 2 3 USB+ 2 2 R684 1 1 2 SCD01U16V2KX-3GP
7 EC11 SCD01U16V2KX-3GP R386 45 3 0R2J-2-GP EC6 EC3
1
6 MAIL# MAIL# 31 100KR2J-1-GP 4 GND 4 SCD1U10V2KX-4GP LDDC_CLK 7 LCDVDD_S0
5 INTERNET# INTERNET# 31 5 LDDC_DATA 7
4 EBUTTON# EBUTTON# 31 5 GND 6
1
3 PROGRAM# PROGRAM# 31 7
PWRBTN# 1 R387
SC10U10V5ZY-1GP
2 2 EC_PWRBTN# 31 8
1
470R2J-2-GP Inverter Pin 9 C15 C13
LA_CLK# 7
1
1 10 LA_CLK 7
13 C51 Pin Symbol 11 DY SCD1U25V3ZY-1GP
2
1
4
3
2
1
EC12 RC1 SCD1U16V2ZY-2GP 12
2
ACES-CON12-GP LA_DATA#_2 7
SRC100P50V-2-GP 1 Vin 13 LA_DATA_2 7
20.K0174.012 14
2
2 Vin 15 LA_DATA#_1 7
16
5
6
7
8
LCDVDD_S0 3D3V_S0 LA_DATA_1 7
2nd source: 20.K0185.012 3 PWM 17 EVEN CHANNEL
Q45 Layout 40 mil 18
GND 2 U2 LA_DATA#_0 7
4 BLON 19 LA_DATA_0 7
Layout 40 mil 20
3 OUT CAP_LED# 1 OUT IN 6 5 GND 21 LB_DATA#_0 7
R2 2 5 22
IN R1 GND GND LB_DATA_0 7
31 CAP_LED 1 7 GMCH_LCDVDD_ON 3 ON/OFF# IN 4 6 GND 23
84.00124.F1K 24 LB_DATA#_1 7
1
CHDTC124EU-1GP C19 C25 25
Q46 AAT4280IGU-3-T1GP C21 LB_DATA_1 7
GND 2
Launch BD 26
SC1U10V3KX-3GP SCD1U50V3KX-GP SC1U10V3KX-3GP 27 ODD CHANNEL
2
74.04280.B9P LB_DATA#_2 7
Pin Symbol 28 LB_DATA_2 7
3 OUT NUM_LED# 29
R2 1 3V_S0 30
IN R1 LB_CLK# 7
31 NUM_LED 1 31 LB_CLK 7
84.00124.F1K 2 PWRBTN# 32
CHDTC124EU-1GP 33 BRIGHTNESS BRIGHTNESS 31
Q10 3 PROGRAM# 34
GND 2 BLON_OUT 31
35
SCD01U16V2KX-3GP
4 EBUTTON# 36 0R3-0-U-GPR12
0R3-0-U-GP
1 R12 2 USB_PN5 16
2
SCD01U16V2KX-3GP
3 OUT EMAIL_LED# 37 0R3-0-U-GP
0R3-0-U-GPR11
1 R11 2 USB_PP5 16
2
R2 5 INTERNET# 46 38 EC7 EC8 R13
IN R1 SB DCBATOUT
31 EMAIL_LED 1 39 100KR2J-1-GP
84.00124.F1K 6 MAIL# MH2 40
1
CHDTC124EU-1GP Layout 60 mil
1
Q22 7 NC
SC1U50V5ZY-1-GP
44 42
1
GND 2 3D3V_S5 C373 C14
LED3 8 MAIL_LED# IPEX-CON40-2-GP
SCD1U25V3KX-GP
3 OUT STDBY_LED#1 R287 2 K A on Front Panel 20.F0763.040
TOP VIEW
2
1
R2 100R2F-L1-GP-U 83.00190.D7A C647 9 PWR_B_LED#

IN R1
31 STDBY_LED 1
84.00124.F1K SCD1U50V3KX-GP 10 NC
2
GND 2
CHDTC124EU-1GP
Q21
3 OUT PWRLED# 1 R208 2 2

LED4
1
3D3V_S0
on Front Panel
11
12
INT_MICP
INT_MICN
1
LCD 40
1
R2 100R2F-L1-GP-U LED-G-62-GP C648

IN R1 83.00190.Q70
1
31 PWRLED 84.00124.F1K SCD1U50V3KX-GP
LED BD CONN
2
CHDTC124EU-1GP
Q25
GND 2 3D3V_S5
on Front Panel Charger: 3D3V_S0
LED2
3 OUT CHRGER_LED#
1 R296 2 K A OFF : Battery or DC only
SCD1U10V2KX-4GP
R2 100R2F-L1-GP-U 83.00190.D7A
IN R1 Orange : Charging 5V_S0
1
31 CHRGER_LED Orange Blink : Battery low
1
84.00124.F1K EC34
CHDTC124EU-1GP on Front Panel
2
Q23 Power: LEDB1
2
GND 2 10 R465 3D3V_S0
LED1 Green : S0 1 4K7R2J-2-GP
3 OUT DC_BATFULL#
1 R292 2 2 1 Orange : S3 -1
1
R2 100R2F-L1-GP-U LED-G-62-GP 2 DY R473
1
IN 1
R1 83.00190.Q70 Orange Blinking : Enter S4 3 CAP_LED# D39
31 DC_BATFULL 84.00124.F1K NUM_LED# 10KR2J-3-GP
CHDTC124EU-1GP
on Front Panel 4
MEDIA_LED#
2 HDD_LED# 20
5 3
Q26 5V_S0 6
2
GND 2 7 1 2 R472
1
LED5 LED-B-27-U-GP 0R2J-2-GP SATA_LED# 15
8
3 OUT BT_LED# 1 R303 2 2 1 9 BAW56PT-U SATA
R2 330R2J-3-GP 83.00190.P70 83.00056.E11
IN R1 MLX-CON8-7-GP-U
31 BLUETOOTH_LED 1
84.00124.F1K on Front Panel CONNECTOR
CHDTC124EU-1GP 20.K0185.008
3D3V_S0 RC2
2nd source: 20.K0228.008 SRC100P50V-2-GP DY
LED6 CHRGER_LED# 1 8
26 WLAN_LED# 1 R299 2 K A DC_BATFULL# 2 7
100R2J-2-GP 83.00190.D7A 3D3V_S0 PWRLED# 3 6
RN66 8 STDBY_LED# 4 5
31 BT_BTN# 1 4 RC12
31 WIRELESS_BTN# 2 3 SRC100P50V-2-GP DY <Variant Name>
MEDIA_LED# 1 8
NUM_LED 2 7
SRN10KJ-5-GP CAP_LED
1 3 6
4 5 Wistron Corporation
BTBTN1 WLBTN1 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
4 1 1 4 EC17 DY Taipei Hsien 221, Taiwan, R.O.C.
Front panel 1 3 BT_LED# 1 2
2 2 SC100P25V2JN-1GP Title
LED V V V V 3 3 EC18 DY
5 5 WLAN_LED# 1 2 LCD / LAUNCH / LEDs
Button V V SC100P25V2JN-1GP Size Document Number Rev
SW-SLIDE47-GP SW-SLIDE47-GP Custom
BlutTooth Wireless Charger Power2 62.40018.251 62.40018.251 Edge Trigger AG1 -1
A B C D E
Layout Note:
Place these resistors
CRT I/F & CONNECTOR
close to the CRT-out
connector
Ferrite bead impedance: 10 ohm@100MHz 5V_S0
L18
7 GMCH_RED 1 2 CRT_R -1 5V_CRT_S0
1
FCB1608CF-GP
3D3V_S0 D1
L19 CH521S-30-GP-U
7 GMCH_GREEN 1 2 CRT_G
2
1
4 FCB1608CF-GP 4
R1 C5
10KR2J-3-GP SCD01U16V2KX-3GP
L20
4
3
7 GMCH_BLUE 1 2 CRT_B RN1
2
FCB1608CF-GP
SC3P50V2CN-1-GP
SC3P50V2CN-1-GP
SC3P50V2CN-1-GP
SRN10KJ-5-GP
1
C349 C353 C354 CRT1
R305 R308 R309 C350 C351 C352 17
150R2F-1-GP
150R2F-1-GP
150R2F-1-GP
SC6D8P50V2DN-GP
SC6D8P50V2DN-GP
SC6D8P50V2DN-GP
2
1
2
DY DY DY 6
CRT_R
31 CRT_IN# 11 1
2
7
DAT_DDC1_5 12 2 CRT_G
8
JVGA_HS 13 3 CRT_B
Layout Note: 9
JVGA_VS
* Must be a ground return path between this ground and the ground on 14 4
10 1 R646 2CRT_IN#
the VGA connector. CLK_DDC1_5 15 5 0R2J-2-GP
DY
2
Pi-filter & 150 Ohm pull-down resistors should be as close as to CRT 16
R647
CONN. RGB will hit 75 Ohm first, pi-filter, then CRT CONN.
1
VIDEO-15-42-GP-U 0R0402-PAD
1
C2 20.20378.015
SC100P50V2JN-3GP C3 C6
1
SC100P50V2JN-3GP SC18P50V2JN-1-GP
2
1
1
3 C1 C4 3
SC100P50V2JN-3GP SC18P50V2JN-1-GP
2
Hsync & Vsync level shift
5V_S0
3D3V_S0
1
C355
SCD1U16V2ZY-2GP
DDC_CLK & DATA level shift
2
U44A
14
4
3
7 GMCH_HSY 1 R321 2 HSYNC_4 2 3 CRT_HSYNC1 1 R312 2 JVGA_HS
47R2J-2-GP 0R0402-PAD RN67
TSAHCT125PW-GP SRN2K2J-1-GP
U44B
14
For System CRT

7
4
G
1
2
7 GMCH_VSY 1 R320 2 VSYNC_4 5 6 CRT_VSYNC1 1 R315 2 JVGA_VS
1
47R2J-2-GP 0R0402-PAD
TSAHCT125PW-GP Q1
DAT_DDC1_5
D
7 GMCH_DDCDATA 2 3
7
S
2 2N7002-8-GP 2
G
1
Q2
CLK_DDC1_5
D
7 GMCH_DDCCLK 2 3
S
2N7002-8-GP
DY
1 2 C525 TVOUT1
TV OUT CONN 1
L28
2
SC33P50V3JN-GP
CRMA_1
3
6
9
5V_S0 5V_S0
7 TV_DACC IND-1D2UH-5-GP 7
1
TVout 5 D10 2 D23 2

R482 C526 C523 2
150R2F-1-GP SC6P50V3DN-GP SC6P50V2CN-1GP LUMA_1 3 CRT_R 3
TVout 4 TVout
2
TVout TVout
-1 DY C517 1 1 1
2
1 2 8
SC33P50V3JN-GP BAV99PT-GP-U BAV99PT-GP-U
L25
MINDIN7-11-U2-GP
1 2 LUMA_1 22.10021.D81 TVout
7 TV_DACB IND-1D2UH-5-GP D12 D24
2 2
1
R475 C518
TVout C516 CRMA_1 3 CRT_G 3
<Variant Name>
1 Reverse type 1
150R2F-1-GP SC6P50V3DN-GP SC6P50V2CN-1GP
TVout
2
TVout TVout 1 1
Wistron Corporation
-1 DY C520
2
1 2 BAV99PT-GP-U BAV99PT-GP-U 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

SC33P50V3JN-GP Taipei Hsien 221, Taiwan, R.O.C.
L27 TVout
D11 2 D25 2
1 2 COMP_1 Title
7 TV_DACA IND-1D2UH-5-GP COMP_1 3 CRT_B 3
CRT/TV Connector
1
R480 C521
TVout C519 Size Document Number Rev
1 1
150R2F-1-GP SC6P50V3DN-GP SC6P50V2CN-1GP A3
TVout AG1 -1
2
TVout TVout BAV99PT-GP-U BAV99PT-GP-U

-1 Date: Friday, February 24, 2006 Sheet 14 of 45
TVout
2
A B C D E
A B C D E
1 2
1D05V_S0
C50 SC4D7P50V3DN-1GP
1
R419
4
56R2J-4-GP
1
X1 DY
3D3V_AUX_S5 RTC_AUX_S5 X-32D768KHZ-41GP R34
2
D32 82.30001.731 10MR3J-L1-GP H_DPSLP#
2 1
2
4 C394 4
CH751H-40PT SC1U10V3ZY-6GP
2
RTC circuitry 1 2
U12A LPC_LAD[0..3] 31
RCT_X1 AB1 AA6 LPC_LAD0
RTC1 1KR2J-1-GP C48 SC4D7P50V3DN-1GP RCT_X2AB2 RTXC1 LAD0 LPC_LAD1
R197 RTCX2 LAD1 AB5
4 D16 AC4 LPC_LAD2
LPC
RTC
LAD2
1 1 2BAT_D
2 1 1 2 RTC_RST# AA3 RTCRST# LAD3 Y6 LPC_LAD3
R368 20KR2J-L2-GP 3D3V_S0 Open R188 for Dothan A step
2 1 2 INTRUDER# Y5 AC3 Shunt for Dothan B step
CH751H-40PT INTRUDER# LDRQ0# LPC_LDRQ0# 32
3 R369 1MR2J-1-GP INTVRMEN W4 AA5 1 R389
2 & all Yonah
INTVRMEN LDRQ1#/GPIO23
2
1
5 10KR2J-3-GP
C256 C396 W1 AB3 LPC_LFRAME# 31
ACES-CON3-GP SC1U10V3ZY-6GP EE_CS LFRAME# 1D05V_S0
SCD1U16V2ZY-2GP Y1
1
2
20.F0714.003 EE_SHCLK
Y2 AE22 K_A20GATE 31
DY W3
EE_DOUT A20GATE
AH28 H_A20M# 4
EE_DIN A20M#
1
V3 AG27 H_CPUSLP#_2 1 R73
2 H_CPUSLP# 4,6 R422
LAN_CLK CPUSLP#
H_DPRSLP#_2
DY 0R2J-2-GP 56R2J-4-GP
U3 AF24 1 R70 2
LAN
CPU
LAN_RSTSYNC TP1/DPRSTP# H_DPRSLP# 4,38
2nd source: 20.D0198.103 AH25 H_DPSLP# 0R0402-PAD
4
2
TP2/DPSLP#
U5 LAN_RXD0
V4 LAN_RXD1 FERR# AG26 H_FERR# 4
T5 LAN_RXD2
GPIO49/CPUPWRGD AG24 H_PWRGD 4,36
R578 U7 1D05V_S0
AC97_BTCLK 2 LAN_TXD0
28 AC97_BTCLK 1 V6 LAN_TXD1
22R2J-2-GP V7 AG22 H_IGNNE# 4 H_PWRGD 1 R418 2
R35 LAN_TXD2 IGNNE# 200R2F-L-GP
INIT3_3V# AG21 FWH_INIT# 34
3
21 ACZ_BTCLK_MDC 2 22R2J-2-GP
1 ACZ_BIT_CLK U1 ACZ_BIT_CLK INIT# AF22 H_INIT# 4 DY 3
AC-97/AZALIA
21,28 ACZ_SYNC 1 2 ACZ_SYNC_R R6 AF25 H_INTR 4
R383 39R2J-L-GP ACZ_SYNC INTR 1D05V_S0
1 2 ACZ_RST#_R R5 AG23
Check !!
21,28 ACZ_RST# ACZ_RST# RCIN# H_RCIN# 31
R382 39R2J-L-GP
1
28 ACZ_SDATAIN0 T2 ACZ_SDIN0 NMI AH24 H_NMI 4
21 ACZ_SDATAIN1 T3 AF23 H_SMI# 4 R424
ACZ_SDIN1 SMI#
T1 ACZ_SDIN2 56R2J-4-GP
TPAD30 TP1 AH22 H_STPCLK# 4
ACZ_SDATAOUT_R T4 STPCLK#
21,28 ACZ_SDATAOUT 1 2
2
R381 39R2J-L-GP ACZ_SDOUT H_THERMTRIP_R
THERMTRIP# AF26
13 SATA_LED# AF18 SATALED#
AF3 AB15 Layout Note: R424 needs to placed
20 SATA_RXN0 SATA0RXN DD0 IDE_PDD0 20
AE3 AE14 within 2" of ICH7, R212 must be placed
20 SATA_RXP0 SATA0RXP DD1 IDE_PDD1 20
AG2 AG13 within 2" of R227 w/o stub.
20 SATA_TXN0 SATA0TXN DD2 IDE_PDD2 20
20 SATA_TXP0 AH2 SATA0TXP DD3 AF13 IDE_PDD3 20
DD4 AD14 IDE_PDD4 20
AF7 SATA2RXN DD5 AC13 IDE_PDD5 20
AE7 SATA2RXP DD6 AD12 IDE_PDD6 20
AG6 SATA2TXN DD7 AC12 IDE_PDD7 20
AH6 SATA2TXP DD8 AE12 IDE_PDD8 20
DD9 AF12 IDE_PDD9 20
AF1 AB13
SATA
3 CLK_PCIE_SATA# SATA_CLKN DD10 IDE_PDD10 20
3 CLK_PCIE_SATA AE1 SATA_CLKP DD11 AC14 IDE_PDD11 20
RTC_AUX_S5 Change to 24.9 1% ohm AF14
DD12 IDE_PDD12 20
when use SATA HD SATARBIAS AH10 AH13
SATARBIASN DD13 IDE_PDD13 20
1 2 AG10 SATARBIASP DD14 AH14 IDE_PDD14 20
1
R51 24D9R2F-L-GP AC15 IDE_PDD15 20

2 R370 DD15 2
300KR2J-GP
P.H. for internal VCCSUS1_05
20 IDE_PDIOR# AF15
AH15
DIOR# IDE DA0 AH17
AE17
IDE_PDA0 20
20 IDE_PDIOW# DIOW# DA1 IDE_PDA1 20
20 IDE_PDDACK# AF16 AF17 IDE_PDA2 20
2
DDACK# DA2
20 INT_IRQ14 AH16 IDEIRQ
INTVRMEN 20 IDE_PDIORDY AG16 AE16 IDE_PDCS1# 20
Place within 500 mils IORDY DCS1#
20 IDE_PDDREQ AE15 DDREQ DCS3# AD16 IDE_PDCS3# 20
of ICH7ball
1
ICH7-M-GP
DY R371
0R2J-2-GP INTVRMEN
2
Enable 1
Disable 0
Placement Note:
Diatance between the ICH-7 M and cap on the "P" signal
should be identical distance between the ICH-7 M and cap
on the "N" signal for same pair.
1 <Variant Name> 1
Wistron Corporation
Title
ICH7-M (1 of 4)
A3
AG1 -1
A B C D E
A B C D E
3D3V_S0
U12C RN17
24,25,30,35 PCI_AD[0..31]
U12B C22 AF19 SATA0_R0 SATA0_R2 1 8
18,22,26,30 SMB_CLK SMBCLK GPIO21/SATA0GP
PCI_AD0 E18 D7 PCI_REQ#0 B22 AH18 SATA0_R1 SATA0_R0 2 7
SMB
AD0 REQ0# PCI_REQ#0 25,35 18,22,26,30 SMB_DATA SMBDATA GPIO19/SATA1GP
SATA
PCI_AD1 SMB_LINK_ALERT# A26 SATA0_R2 SATA0_R3
GPIO
PCI_AD2
C18
A16
AD1 PCI GNT0# E7
C16 PCI_REQ#1
PCI_GNT#0 25,35
SMLINK0 B25
LINKALERT# GPIO36/SATA2GP AH19
AE19 SATA0_R3 SATA0_R1
3
4
6
5
AD2 REQ1# PCI_REQ#1 30 SMLINK0 GPIO37/SATA3GP
PCI_AD3 F18 D16 PCI_GNT#1 30 SMLINK1 A25 SRN10KJ-4-GP
PCI_AD4 AD3 GNT1# PCI_REQ#2 SMLINK1
E16 AD4 REQ2# C17 PCI_REQ#2 22 CLK14 AC1 CLK_ICH14 3
Clocks
PCI_AD5 A18 D17 PCI_GNT#2 22 PM_RI# A28 B2 CLK48_ICH 3
PCI_AD6 AD5 GNT2# PCI_REQ#3 RI# CLK48
E17 AD6 REQ3# E13
PCI_AD7 A17 F13 PCI_GNT#3 TP68 TPAD30 28 ACZ_SPKR A19 C20 PM_SUS_CLK 18
PCI_AD8 AD7 GNT3# PCI_REQ#4 SPKR SUSCLK
A15 AD8 REQ4#/GPIO22 A13 31,32 PM_SUS_STAT# A27 SUS_STAT#
4 PCI_AD9 C14 A14 PCI_GNT#4 TP5 TPAD30 DBRESET# A22 B24 PM_SLP_S3# 18,30,31,36,41,43 4
PCI_AD10 AD9 GNT4#/GPIO48 PCI_REQ#5 SYS_RST# SLP_S3#
E14 AD10 GPIO1/REQ5# C8 SLP_S4# D23 PM_SLP_S5# 31,41,43
PCI_AD11 D14 D8 PCI_GNT#5 TP64 TPAD30 7 PM_BMBUSY# AB18 F22
PCI_AD12 AD11 GPIO17/GNT5# GPIO0/BM_BUSY# SLP_S5#
B12 AD12
PCI_AD13 C13 B15 PCI_C/BE#0 22,24,30,35 SMB_ALERT# B23 AA4 PWROK 7,19
PCI_AD14 AD13 C/BE0# GPIO11/SMBALERT# PWROK
G15 C12 PCI_C/BE#1 22,24,30,35
Power MGT
PCI_AD15 AD14 C/BE1#
G13 AD15 C/BE2# D12 PCI_C/BE#2 22,24,30,35 3 PM_STPPCI# AC20 GPIO18/STPPCI# GPIO16/DPRSLPVR AC22 PM_DPRSLPVR_R 2 R412 1 100R2J-2-GP PM_DPRSLPVR 38
PCI_AD16 E12 C15 PCI_C/BE#3 22,24,30,35 3 PM_STPCPU# AF21 DY1100KR2J-1-GP
2
GPIO
PCI_AD17 AD16 C/BE3# GPIO20/STPCPU# PM_BATLOW#_R R411
C11 C21
SYS
PCI_AD18 AD17 TP0/BATLOW#
D11 A7 PCI_IRDY# 22,25,30,35 A21 D38
PCI_AD19 AD18 IRDY# GPIO26 PWRBTN#_ICH
A11 AD19 PAR E10 PCI_PAR 22,24,30,35 PWRBTN# C23 1 SB_PWRBTN# 31
PCI_AD20 A10 B18 R58 1 2 47R2J-2-GP PCIRST1# 22,25,27,30,35 TPAD30 TP8 ICH_GPIO27 B21 BAS16-1-GP
PCI_AD21 AD20 PCIRST# PSW_CLR# GPIO27
F11 AD21 DEVSEL# A12 PCI_DEVSEL# 22,25,30,35 33 PSW_CLR# E23 GPIO28 3
PCI_AD22 F10 C9 PCI_PERR# 22,25,30,35 C19 1 R409
2
PCI_AD23 AD22 PERR# LAN_RST# 10KR2J-3-GP
E9 AD23 PLOCK# E11 PCI_LOCK# 22,25,30,31,32,35 PM_CLKRUN# AG18 GPIO32/CLKRUN# 2
PCI_AD24 D9 B10 PCI_SERR# 22,25,30,35 Y4 SB_RSMRST# 31
PCI_AD25 AD24 SERR# TPAD30 TP75 RSMRST#
B9 AD25 STOP# F15 PCI_STOP# 22,25,30,35 AC19 GPIO33/AZ_DOCK_EN#
2
PCI_AD26 A8 F14 PCI_TRDY# 22,25,30,35 -1 TPAD30 TP57 U2 E20 ECSWI# 31
PCI_AD27 AD26 TRDY# GPIO34/AZ_DOCK_RST# GPIO9 TP6 TPAD30 R380
A6 AD27 FRAME# F16 PCI_FRAME# 22,25,30,35 GPIO10 A20
PCI_AD28 C7 22,30,31 PCIE_WAKE# PCIE_WAKE# F20 F19 ICH7_GPI12 100KR2J-1-GP
PCI_AD29 AD28 WAKE# GPIO12
B6 AD29 PLTRST# C26 1 R421 2 33R2J-2-GP PLT_RST1# 7,20,22,26,30,31,32,34 25,30,31,32,35 INT_SERIRQ AH21 SERIRQ GPIO13 E19
PCI_AD30 E6 A9 CLK_ICHPCI 3 19 THRM# AF20 R4
1
PCI_AD31 AD30 PCICLK THRM# GPIO14
D6 AD31 PME# B19 ICH_PME#_1
2 R61
1 ICH_PME# 22 GPIO15 E22 TP81 TPAD30 -1
0R2J-2-GP AD22 R3 TP58 TPAD30
7,38 VGATE_PWRGD VRMPWRGD GPIO24
INT_PIRQA# A3
Interrupt I/F G8 INT_PIRQE# AC21
GPIO25 D20
AD21
NEWCARD_RST#
TP79 TPAD30
30
PIRQA# GPIO2/PIRQE# INT_PIRQE# 30 34 SPI_WP# GPIO6 GPIO35
INT_PIRQB# INT_PIRQF# TP78 TPAD30
25,35 INT_PIRQB#
INT_PIRQC#
B4
C5
PIRQB# GPIO3/PIRQF# F7
F8 INT_PIRQG#
INT_PIRQF# 25 31 ECSCI# AC18
ECSMI# E21 GPIO7 GPIO GPIO38 AD20
AE20 TP77 TPAD30
PIRQC# GPIO4/PIRQG# INT_PIRQG# 25,35 GPIO8 GPIO39
INT_PIRQD# B5 G7 INT_PIRQH# INT_PIRQH# 22
3 PIRQD# GPIO5/PIRQH# ICH7-M-GP 3
AE5
MISC AE9 U12D
TPAD30 TP59 RSVD[1] RSVD[6] TP66 TPAD30
TPAD30 TP60
AD5 RSVD[2] RSVD[7] AG8
TP63 TPAD30
22 PCIE_RXN1 GIGA F26 PERn1 DMI0RXN V26 DMI_RXN0 7
AG4 RSVD[3] RSVD[8] AH8 22 PCIE_RXP1 F25 PERp1 DMI0RXP V25 DMI_RXP0 7
Direct Media Interface

TPAD30 TP4 AH4 F21 TP62 TPAD30 LAN SCD1U16V2KX-3GP
2 1 C478 E28 U28 Layout Note:
RSVD[4] RSVD[9] 22 PCIE_TXN1 PETn1 DMI0TXN DMI_TXN0 7
TPAD30 TP3 AD9 AH20 TP80 TPAD30 2 1 E27 U27 PCIE AC coupling caps
RSVD[5] MCH_SYNC# 22 PCIE_TXP1 PETp1 DMI0TXP DMI_TXP0 7
TPAD30 TP67 SCD1U16V2KX-3GP C475 need to be within 250 mils of the driver.
MCH_ICH_SYNC# 7
ICH7-M-GP 26 PCIE_RXN2 GIGA H26 Y26 DMI_RXN1 7
PERn2 DMI1RXN
26 PCIE_RXP2 MINIC
SCD1U16V2KX-3GP
H25 PERp2 DMI1RXP Y25 DMI_RXP1 7
MiniC 26 PCIE_TXN2 2 1 C487 G28 PETn2 DMI1TXN W28 DMI_TXN1 7
26 PCIE_TXP2 SCD1U16V2KX-3GP
2 1 C488 G27 W27 DMI_TXP1 7
PETp2 DMI1TXP
ICH7 Pullups MINIC 7 DMI_TXN[3..0]
PCI-Express
30 PCIE_RXN3 0R0402-PAD 1 R601 2 K26 AB26 DMI_RXN2 7 7 DMI_TXP[3..0]
0R0402-PAD 1 R600 PERn3 DMI2RXN
30 PCIE_RXP3 2 K25 PERp3 DMI2RXP AB25 DMI_RXP2 7 7 DMI_RXN[3..0]
NEW 30 PCIE_TXN3 SCD1U16V2KX-3GP
2 1 C649 NEW J28 AA28 DMI_TXN2 7 7 DMI_RXP[3..0]
SCD1U16V2KX-3GP PETn3 DMI2TXN
RP10 3D3V_S0 RP12 3D3V_S5 30 PCIE_TXP3 2 1 C650 NEW J27 PETp3 DMI2TXP AA27 DMI_TXP2 7
PCI_FRAME# 1 10 ICH7_GPI12 1 10
PCI_IRDY# 2 9 PCI_SERR# DBRESET# 2 9 PCIE_WAKE# M26 AD25 DMI_RXN3 7
PCI_TRDY# PCI_LOCK# PSW_CLR# PERn4 DMI3RXN 1D5V_S0
3 8 3 8 SMB_LINK_ALERT# M25 PERp4 DMI3RXP AD24 DMI_RXP3 7
PCI_STOP# 4 7 PCI_PERR# PM_BATLOW#_R 4 7 SMB_ALERT# L28 AC28 DMI_TXN3 7
PCI_DEVSEL# PETn4 DMI3TXN Place within 500 mils of ICH
3D3V_S0 5 6 3D3V_S5 5 6 PM_RI# L27 PETp4 DMI3TXP AC27 DMI_TXP3 7
1
SRN8K2J-2-GP SRN10KJ-L3-GP P26 AE28 CLK_PCIE_ICH# 3 R420
PERn5 DMI_CLKN 24D9R2F-L-GP
RP11 3D3V_S0 RP8 3D3V_S5 P25 AE27 CLK_PCIE_ICH 3
MCH_ICH_SYNC# USB_OC#2 PERp5 DMI_CLKP
1 10 1 10 N28 PETn5
PCI_REQ#4 2 9 PCI_REQ#3 USB_OC#1 2 9 USB_OC#5 N27 C25
2
INT_SERIRQ PCI_REQ#2 USB_OC#3 USB_OC#6 PETp5 DMI_ZCOMP DMI_IRCOMP_R
3 8 3 8 DMI_IRCOMP D25
PCI_REQ#5 4 7 PCI_REQ#1 USB_OC#0 4 7 USB_OC#4 T25
2 PCI_REQ#0 USB_OC#7 PERn6 2
3D3V_S0 5 6 3D3V_S5 5 6 T24 PERp6 USBP0N F1 USB_PN0 21
R28 PETn6 USBP0P F2 USB_PP0 21
SRN8K2J-2-GP SRN10KJ-L3-GP R27 G4 USB_PN1 21 USB
3D3V_S5 PETp6 USBP1N
RP9 3D3V_S0 G3 USB_PP1 21
INT_PIRQD# USBP1P
1 10 34 SPI_CLK 1 R277 2 SPI_CLK_1 R2 SPI_CLK USBP2N H1 USB_PN2 21 Pair Device
INT_PIRQA# 2 9 INT_PIRQH# RN78 SRN100KJ-6-GP 47R2J-2-GP SPI_CS# P6 H2 USB_PP2 21
INT_PIRQB# INT_PIRQE# ECSWI# TPAD30 TP2 SPI_ARB SPI_CS# USBP2P
3 8 3 2 P1 J4 0 BT
SPI
SPI_ARB USBP3N USB_PN3 30
INT_PIRQC# 4 7 INT_PIRQF# ECSMI# 4 1 J3 USB_PP3 30
INT_PIRQG# SPI_MOSI USBP3P
3D3V_S0 5 6 P5 SPI_MOSI USBP4N K1 USB_PN4 21 1 USB1
RN25 SPI_MISO P2 K2
USB
SPI_MISO USBP4P USB_PP4 21
SRN8K2J-2-GP SMLINK0 3 2 L4 USB_PN5 13 2 NEW C
3D3V_S0 SMLINK1 USB_OC#0 USBP5N
4 1 D3 OC0# USBP5P L5 USB_PP5 13
USB_OC#1 C4 M1 USB_PN6 26 3 USB2
PM_CLKRUN# SRN10KJ-5-GP USB_OC#2 OC1# USBP6N
1 2 21 USB_OC#2 D5 OC2# USBP6P M2 USB_PP6 26
R60 8K2R2J-3-GP USB_OC#3 D4 N4 4 CCD
ACZ_SPKR USB_OC#4 OC3# USBP7N
2 1 21 USB_OC#4 E5 OC4# USBP7P N3
DY R65 1KR2J-1-GP USB_OC#5 C3 5 USB3
ECSCI# USB_OC#6 OC5#/GPIO29
1 2 A2 OC6#/GPIO30 USBRBIAS# D2
R57 10KR2J-3-GP USB_OC#7 B3 D1 USB_RBIAS_PN 1 2 6 MINIC1
EXT_FWH# OC7#/GPIO31 USBRBIAS 22D6R2F-L1-GP
1 R663 2 R33
10KR2J-3-GP PCIE ICH7-M-GP 7 MINIC2
PCI_GNT#5
Q51 3D3V_S5 ICH7M-DH 6 EZ4
3
D
1 2 SPI_WP# 1 EXT_FWH# EXT_FWH# 34 ICH7M-B 4 TV Tuner
R410 1KR2J-1-GP
DY G
3
S 2N7002-8-GP
2
84.27002.L04 D13 3D3V_S5

1 2 R166 BAT54PT-GP
1
10KR2J-3-GP <Variant Name> 1
R392 1 R283
2
34 SPI_CS# 10KR2J-3-GP
Default:H 4K7R2J-2-GP
RN76
Wistron Corporation
1
1 2 PCI_GNT#4 GNT5# GNT4# T=22ms 34 SPI_MOSI 3 2

R52 1KR2J-1-GP 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
DY RSMRST#_TO_KBC 31 34 SPI_MISO 4 1
LPC H H
1
SRN10KJ-5-GP
1 R379
2 PWROK PCI H L R167 C190 Title
10KR2J-3-GP 100KR2J-1-GPSC4D7U10V5ZY-3GP
ICH7-M (2 of 4)
2
DY SPI L H
2
Boot from various source A3

AG1 -1
A B C D E
A B C D E
Layout Note:
Place near pin AA19 1D05V_S0
U12F
1
G10 V5REF[1] Vcc1_05[1] L11
L12 C426 C443 C428 C445 C444 C455
V5REF_S0 Vcc1_05[2] SC10U10V5ZY-1GP
AD17 L14
2
1D5V_S0 V5REF[2] Vcc1_05[3]
Vcc1_05[4] L16
V5REF_S5 F6 L17
V5REF_Sus Vcc1_05[5]
Vcc1_05[6] L18
1 L22 2 1D5V_ICH7 AA22 Vcc1_5_B[1] Vcc1_05[7] M11
0R0603-PAD AA23 M18
Vcc1_5_B[2] Vcc1_05[8]
1
CORE
4 AB22 Vcc1_5_B[3] Vcc1_05[9] P11 4
1
C463C472 C467 C468 C469 C473 C470 AB23 P18
Vcc1_5_B[4] Vcc1_05[10] C427 C438 C439
SC10U10V5ZY-1GP
AC23 T11
2
2
C462 Vcc1_5_B[5] Vcc1_05[11]
SC22U10V6ZY-2GP
AC24 T18
2
SC10U6D3V5MX-3GP Vcc1_5_B[6] Vcc1_05[12]
AC25 Vcc1_5_B[7] Vcc1_05[13] U11 DY
AC26 Vcc1_5_B[8] Vcc1_05[14] U18
AD26 Vcc1_5_B[9] Vcc1_05[15] V11
AD27 Vcc1_5_B[10] Vcc1_05[16] V12
AD28 Vcc1_5_B[11] Vcc1_05[17] V14
*Within a given well, 5VREF needs to be up before the D26 Vcc1_5_B[12] Vcc1_05[18] V16
corresponding 3.3V rail D27 Vcc1_5_B[13] Vcc1_05[19] V17
D28 V18 3D3V_S5
Vcc1_5_B[14] VCC PAUX Vcc1_05[20]
E24 Vcc1_5_B[15]
E25 Vcc1_5_B[16] VccSus3_3/VccLAN3_3[1] V5
E26 Vcc1_5_B[17] VccSus3_3/VccLAN3_3[2] V1
1
3D3V_S0 5V_S0 F23 W2
Vcc1_5_B[18] VccSus3_3/VccLAN3_3[3] 3D3V_S0 C413 C399
F24 Vcc1_5_B[19] VccSus3_3/VccLAN3_3[4] W7
G22
2
Vcc1_5_B[20]
2
G23 U6 3D3V_S5
D37 R396 Vcc1_5_B[21] Vcc3_3/VccHDA
H22 Vcc1_5_B[22]
CH751H-40PT 100R2J-2-GP H23 R7
Vcc1_5_B[23] VccSus3_3/VccSusHDA 1D05V_S0
J22 Vcc1_5_B[24]
J23 AE23
1
V5REF_S0 Vcc1_5_B[25] V_CPU_IO[1]

K22 Vcc1_5_B[26] V_CPU_IO[2] AE26
K23 AH26 3D3V_S0
VCCA3GP
Vcc1_5_B[27] V_CPU_IO[3]
1
1
L22 Vcc1_5_B[28]
C415 L23 AA7 C466 C471 C100
Vcc1_5_B[29] Vcc3_3[3]
1
SCD1U16V2ZY-2GP M22 AB12 SC4D7U10V5ZY-3GP
2
2
Vcc1_5_B[30] Vcc3_3[4] C441 C414
M23 Vcc1_5_B[31] Vcc3_3[5] AB20
3 N22 AC16 3
2
Vcc1_5_B[32] Vcc3_3[6]
N23 Vcc1_5_B[33] Vcc3_3[7] AD13
IDE
Layout Note: 3D3V_S5 5V_S5 P22 AD18
Place near ICH7 Vcc1_5_B[34] Vcc3_3[8]
P23 Vcc1_5_B[35] Vcc3_3[9] AG12
R22 AG15 Layout Note:
Vcc1_5_B[36] Vcc3_3[10]
2
R23 AG19 3D3V_S0 PCI decoupling

D36 R390 Vcc1_5_B[37] Vcc3_3[11]
R24 Vcc1_5_B[38]
CH751H-40PT 100R2J-2-GP R25 A5 3D3V_S0
Vcc1_5_B[39] Vcc3_3[12]
R26 Vcc1_5_B[40] Vcc3_3[13] B13
1
T22 B16
1
V5REF_S5 Vcc1_5_B[41] Vcc3_3[14] C403 C429 C423

T23 Vcc1_5_B[42] Vcc3_3[15] B7
T26 C10 C446
2
Vcc1_5_B[43] Vcc3_3[16]
1
PCI
C412
T27 Vcc1_5_B[44] Vcc3_3[17] D15 DY
T28 Vcc1_5_B[45] Vcc3_3[18] F9
SCD1U16V2ZY-2GP U22 G11
2
Vcc1_5_B[46] Vcc3_3[19]
U23 Vcc1_5_B[47] Vcc3_3[20] G12
3D3V_S0 V22 G16 RTC_AUX_S5 NO_STUFF
Vcc1_5_B[48] Vcc3_3[21]
V23 Vcc1_5_B[49]
W22 W5 Layout Note:
Vcc1_5_B[50] VccRTC
1
1D5V_GPLL_ICH_S0 W23 Place near AB3

L9 Vcc1_5_B[51]
1
1D5V_S0 C476 Y22 P7 V3D3A_VCCPSUS Layout Note:
Vcc1_5_B[52] VccSus3_3[1] R391 3D3V_S5 IDE decoupling
1 2 Y23
2
IND-1D2UH-5-GP Vcc1_5_B[53] C407

A24 2 1
2
VccSus3_3[2]
1
SC10U6D3V5MX-3GP
B27 Vcc3_3[1] VccSus3_3[3] C24
1
C105 C477 1D5V_S0 D19 0R3-0-U-GP 3D3V_S0
SC10U6D3V5MX-3GPSCD01U16V2KX-3GP VccSus3_3[4] C408
AG28 D22
2
VccDMIPLL VccSus3_3[5]
1
G19 3D3V_ICH_S5 3D3V_S5
2
VccSus3_3[6]
C424
C453
C435
AB7 Vcc1_5_A[1]
AC6 K3 1 R385 2
2
Vcc1_5_A[2] VccSus3_3[7]
1
2 C416 C418 0R0603-PAD 2

AC7 Vcc1_5_A[3] VccSus3_3[8] K4
1
1D5V_ICH_S0 AD6 K5
ARX
1D5V_S0 AE6 K6 C397 C405 C409

2
1 R388 2 DY AF5 L1
2
0R0603-PAD Vcc1_5_A[6] VccSus3_3[11]
AF6 Vcc1_5_A[7] VccSus3_3[12] L2 DY
1
USB
AG5 Vcc1_5_A[8] VccSus3_3[13] L3

C401 3D3V_S0 AH5 L6 NO_STUFF
L7
2
VccSus3_3[15]
AD2 VccSATAPLL VccSus3_3[16] M6
VccSus3_3[17] M7
1
1D5V_S0 AH11 N7
C420 Vcc3_3[2] VccSus3_3[18] 1D5V_S0
AB10 AB17
2
Vcc1_5_A[10] Vcc1_5_A[19]
1
AB9 Vcc1_5_A[11] Vcc1_5_A[20] AC17
1
NO_STUFF NO_STUFF AC10 C442 C422

C421 C411 Vcc1_5_A[12]
AD10 T7
2
Vcc1_5_A[13] Vcc1_5_A[21]
AE10 F17
2
Vcc1_5_A[14] Vcc1_5_A[22]
ATX
3D3V_ICH_S5 DY AF10 Vcc1_5_A[15] Vcc1_5_A[23] G17

AF9 Vcc1_5_A[16]
AG9 Vcc1_5_A[17] Vcc1_5_A[24] AB8
AH9 Vcc1_5_A[18] Vcc1_5_A[25] AC8
C398
1
1D5V_ICH_S0 E3 K7 TP61 TPAD30

VccSus3_3[19] VccSus1_05[1]
C1 C28 TP82 TPAD30
2
C49 VccUSBPLL VccSus1_05[2] TP76 TPAD30

VccSus1_05[3] G20
1
TPAD28 TP56 AA2 1D5V_S0

TPAD28 TP65 VccSus1_05/VccLAN1_05[1]
Y7 VccSus1_05/VccLAN1_05[2]Vcc1_5_A[26] A1 <Variant Name>
1
1D5V_S0 SCD01U16V2KX-3GP H6 1
2
Vcc1_5_A[27]
USB CORE
Vcc1_5_A[28] H7
1
NO_STUFF J6
C406 Vcc1_5_A[29]
Vcc1_5_A[30] J7 Wistron Corporation
2
DY ICH7-M-GP Taipei Hsien 221, Taiwan, R.O.C.
Title
ICH7-M (3 of 4)
A3
AG1 -1
A B C D E
A B C D E
U12E
A4 VSS[1] VSS[98] P28
A23 VSS[2] VSS[99] R1
B1 VSS[3] VSS[100] R11
B8 VSS[4] VSS[101] R12
B11 VSS[5] VSS[102] R13
B14 R14 32K suspend clock output 3D3V_S5
VSS[6] VSS[103]
B17 VSS[7] VSS[104] R15
B20 R16 U53
VSS[8] VSS[105]
B26 VSS[9] VSS[106] R17
B28 VSS[10] VSS[107] R18 16,30,31,36,41,43 PM_SLP_S3# 1 OE VCC 5
C2 VSS[11] VSS[108] T6 16 PM_SUS_CLK 2 A
C6 T12 3 4 32KHZ 1 2 G792_32K 19
VSS[12] VSS[109] GND Y R403 100R2J-2-GP
4 C27 VSS[13] VSS[110] T13 4
D10 VSS[14] VSS[111] T14
D13 T15 NC7SZ126P5X-GP
VSS[15] VSS[112]
D18 VSS[16] VSS[113] T16
1
D21 VSS[17] VSS[114] T17 73.7S126.AAH
D24 U4 R404
VSS[18] VSS[115] 240KR3-GP
E1 VSS[19] VSS[116] U12
E2 VSS[20] VSS[117] U13 63.24434.15L
E4 U14
2
VSS[21] VSS[118]
E8 VSS[22] VSS[119] U15
E15 VSS[23] VSS[120] U16
F3 VSS[24] VSS[121] U17
F4 VSS[25] VSS[122] U24
F5 VSS[26] VSS[123] U25
F12 VSS[27] VSS[124] U26
F27 V2
F28
VSS[28]
VSS[29]
VSS[125]
VSS[126] V13 SMBUS
G1 VSS[30] VSS[127] V15
G2 V24 3D3V_S0
VSS[31] VSS[128] 3D3V_S5 5V_S0
G5 VSS[32] VSS[129] V27
G6 VSS[33] VSS[130] V28
G9 VSS[34] VSS[131] W6
G14 VSS[35] VSS[132] W24
4
3
G18 VSS[36] VSS[133] W25
G21 W26 RN16
VSS[37] VSS[134]
4
3
G24 VSS[38] VSS[135] Y3 SRN4K7J-8-GP
G25 Y24 RN18
VSS[39] VSS[136]
G26 VSS[40] VSS[137] Y27 SRN4K7J-8-GP
H3 Y28
1
2
3 VSS[41] VSS[138] 3
H4 VSS[42] VSS[139] AA1
H5 AA24
1
2
VSS[43] VSS[140]
1
H24 AA25 Q13
G
VSS[44] VSS[141] 2N7002-8-GP
H27 VSS[45] VSS[142] AA26
H28 VSS[46] VSS[143] AB4 16,22,26,30 SMB_CLK 3 2 SMBC_ICH 3,11
1
J1 AB6
G
VSS[47] VSS[144]
S
J2 VSS[48] VSS[145] AB11
J5 VSS[49] VSS[146] AB14 16,22,26,30 SMB_DATA 3 2 SMBD_ICH 3,11
J24 VSS[50] VSS[147] AB16
Q13 & Q14 connect SMLINK and Q12
S
J25 VSS[51] VSS[148] AB19
J26 AB21 2N7002-8-GP
VSS[52] VSS[149] SMBUS in S) for SMBus 2.0
K24 VSS[53] VSS[150] AB24
K27 AB27 compliance
VSS[54] VSS[151] 84.27002.L04
K28 VSS[55] VSS[152] AB28
L13 VSS[56] VSS[153] AC2
L15 VSS[57] VSS[154] AC5
L24 VSS[58] VSS[155] AC9
L25 VSS[59] VSS[156] AC11
L26 VSS[60] VSS[157] AD1
M3 VSS[61] VSS[158] AD3
M4 VSS[62] VSS[159] AD4
M5 VSS[63] VSS[160] AD7
M12 VSS[64] VSS[161] AD8
M13 VSS[65] VSS[162] AD11
M14 VSS[66] VSS[163] AD15
M15 VSS[67] VSS[164] AD19
M16 VSS[68] VSS[165] AD23
M17 VSS[69] VSS[166] AE2
M24 VSS[70] VSS[167] AE4
2 2
M27 VSS[71] VSS[168] AE8
M28 VSS[72] VSS[169] AE11
N1 VSS[73] VSS[170] AE13
N2 VSS[74] VSS[171] AE18
N5 VSS[75] VSS[172] AE21
N6 VSS[76] VSS[173] AE24
N11 VSS[77] VSS[174] AE25
N12 VSS[78] VSS[175] AF2
N13 VSS[79] VSS[176] AF4
N14 VSS[80] VSS[177] AF8
N15 VSS[81] VSS[178] AF11
N16 VSS[82] VSS[179] AF27
N17 VSS[83] VSS[180] AF28
N18 VSS[84] VSS[181] AG1
N24 VSS[85] VSS[182] AG3
N25 VSS[86] VSS[183] AG7
N26 VSS[87] VSS[184] AG11
P3 VSS[88] VSS[185] AG14
P4 VSS[89] VSS[186] AG17
P12 VSS[90] VSS[187] AG20
P13 VSS[91] VSS[188] AG25
P14 VSS[92] VSS[189] AH1
P15 VSS[93] VSS[190] AH3
P16 VSS[94] VSS[191] AH7
P17 VSS[95] VSS[192] AH12
P24 VSS[96] VSS[193] AH23
P27 VSS[97] VSS[194] AH27
ICH7-M-GP
1 <Variant Name> 1
Wistron Corporation
Title
ICH7-M (4 of 4)/ODD
A3
AG1 -1
A B C D E
5V_S0
1
FAN1_VCC
R402
FAN1_VCC 10KR2J-3-GP
*Layout* 15 mil FAN1
2
5
FAN1_FG1 3
1
2
C447 C75 D7 C448
SCD1U16V2ZY-2GP SC4D7U10V5ZY-3GP BAS16-1-GP SC2200P50V2KX-2GP 1
2
DY C436 4
1
SC1KP16V2KX-GP *Layout* 15 mil
ACES-CON3-GP
2
20.F0714.003
2
2nd source: 20.D0198.103
3D3V_S0 5V_S0
5V_S0 U11
R64 *Layout* 30 mil
1 2 5V_G792_S0 6 1
10R3J-3-GP VCC FAN1
20 DVCC FG1 4
1
CLK 14 G792_32K 18
1
1
C74 16
SDA SMBD_KBC 31
1
SC1U10V3ZY-6GP R56 C64 C62 C63 7 18 System Sensor, Put between CPU and NB.
SMBC_KBC 31
2
4K99R2F-L-GP R41 SC4D7U10V5ZY-3GP SCD1U16V2ZY-2GP DXP1 SCL

9 19
2
10KR2J-3-GP DXP2 NC#19
SCD1U16V2ZY-2GP
DY 11 DXP3 G792_DXP2
2
3
5 G792_DXP3 Q15
2
DGND
3
16 THRM# 1 R42 2 ALERT# 15 ALERT# DGND 17 Q38 1 PMBS3904-1-GP
1
0R2J-2-GP T8_HW_SHUT# C515 PMBS3904-1-GP C202
DY V_DEGREE
13 THERM# C59
1
SC470P50V3JN-2GP
Setting T8 as 3 8
2
THERM_SET SGND1 G792_DXN2 C68
2 10
2
RESET# SGND2
1
100 Degree SGND3 12 G792_DXN3 SC2200P50V2KX-2GP

R62 SC470P50V3JN-2GP
49K9R2F-L-GP SC2200P50V2KX-2GP
2
V_DEGREE G792SFUF-GP 74.00792.A79 G39 G2 cpu Sensor, Put behind CPU
=(((Degree-72)*0.02)+0.34)*VCC
2
3D3V_AUX_S5
System改接第三組,
GAP-CLOSEGAP-CLOSE
M52/54: T[op]/105, Tj/125 degree.
1
2
R173
100KR2J-1-GP DXP1:108 Degree (CPU) H_THERMDA 4
1
DXP2:H/W Setting 100(System) Place near chip as close C67
1
31,36 PURE_HW_SHUTDOWN# 1 R169 2 T8_HW_SHUT# DXP3:105 Degree (VGA) as possible SC2200P50V2KX-2GP

H_THERMDC 4
2
0R0402-PAD
For CPU Sensor
7,16 PWROK 1 R55 2 G792_RESET#

4K7R2F-GP
1
R59
10KR2F-2-GP
2
Digital Output Data Bits

TEMP.
Sign MSB LSB EXT
+127.875 0 111 1111 111
+126.375 0 111 1110 011
+25.5 0 001 1001 100
+1.75 0 000 0001 110
+0.5 0 000 0000 100
+0.125 0 000 0000 001
-0.125 1 111 1111 111
-1.125 1 111 1110 111
<Variant Name>
-25.5 1 110 0110 100
-55.25 1 100 1000 110
Wistron Corporation
-65.000 1 011 1111 000 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Title
Thermal/Fan Controllor G792

Custom
AG1 -1
SATA Connector 5V_S0
CDROM Connector
1
R685
10KR2J-3-GP
5V_S0 HDD1
PATA
PATA
2
42 +5V_MOTOR KEY 20
41 28 HDD_CSEL 2 R546 1
+5V_LOGIC CSEL PDIAG 470R2J-2-GP CDROM1
PWR TRACE 100mil PDIAG# 34
1A 1 HDDDRV#_5 52
V33 RESET# HDD_LED#
2A V33 DASP# 39 HDD_LED# 13 49 50
5V_S0 3A 31 INT_IRQ14 47 48 3D3V_S0
V33 INTRQ IDE_PDIORDY 3D3V_S0 HDDDRV#_5
IORDY 27 15 IDE_PDD8 45 46
7A 25 IDE_PDIOR# 15 IDE_PDD9 43 44 IDE_PDD7 15
K
V5 DIOR# IDE_PDIOW#
8A V5 DIOW# 23 15 IDE_PDD10 41 42 IDE_PDD6 15
1
1
D17 C577 C581 9A 21 IDE_PDDREQ 15 IDE_PDD11 39 40 IDE_PDD5 15
V5 DMARQ
4
3
IDE_PDDACK# 1 R648
SC10U10V5ZY-1GP
SSM22LLPT-GP 29 2 37 38
SCD1U16V2ZY-2GP
DMACK# 15 IDE_PDD12 IDE_PDD4 15
13A 10KR2J-3-GP 15 IDE_PDD13 35 36 IDE_PDD3 15 RN15
2
2
V12
14A 44 15 IDE_PDD14 33 34 IDE_PDD2 15 SRN8K2J-3-GP
DY
A
V12 RESERVED#44
15A V12 RESERVED#32 32 15 IDE_PDD15 31 32 IDE_PDD1 15
RESERVED#11A 11A 15 IDE_PDDREQ 29 30 IDE_PDD0 15
15 IDE_PDIOR# 27 28
1
2
IDE_PDD15 18 25 26 IDE_PDIOW# 15
IDE_PDD14 DD15
16 DD14 B+ S6 1 2 SATA_RXP0 15 15 IDE_PDDACK# 23 24 IDE_PDIORDY 15
IDE_PDD13 14 S5 SC4700P50V2KX-1GP
1 2C55 21 22
IDE_PDD12 DD13 B- SC4700P50V2KX-1GP C56 SATA_RXN0 15 PDIAG INT_IRQ14 15
12 19 20 IDE_PDA1 15
1 SATA
IDE_PDD11 DD12
10 S3 2 15 IDE_PDA2 17 18 IDE_PDA0 15
1 SATA
IDE_PDD10 DD11 A- SC4700P50V2KX-1GP SATA_TXN0 15
8 DD10 A+ S2 2C52 SATA_TXP0 15 15 IDE_PDCS3# 15 16 IDE_PDCS1# 15
IDE_PDD9 6 SC4700P50V2KX-1GP C53 5V_S0 13 14 HDD_LED# 13 5V_S0
IDE_PDD8 4
DD9 SATA 11 12
IDE_PDD7 3
DD8
40 SATA 9 10
IDE_PDD6 DD7 GND
5 DD6 GND 30 7 8
1
IDE_PDD5 7 26 5 6
IDE_PDD4 DD5 GND C79 C81 CSEL
9 DD4 GND 24 3 4
IDE_PDD3 11 22 SC10U10V5ZY-1GP SCD1U16V2ZY-2GP 1 2
2
DD3 GND
1
IDE_PDD2 13 43 51
IDE_PDD1 DD2 GND R374
IDE_PDD0
15 DD1 GND 19
SPD-CONN50-4R-19GPU
SATA 0R2J-2-GP
17 DD0 GND 45
Close to Connector 20.80346.050
GND 46
2
1 49
2
IDE_PDA0 GND
IDE_PDA1
35
33
DA0 GND S1
S4
CDROM
IDE_PDA2 DA1 GND
36 DA2 GND S7
IDE_PDCS1#
IDE_PDCS3#
37
38
CS0# GND 4A
5A
2 50
CS1# GND
GND 6A
NP1 NP1 GND 10A
NP2 NP2 GND 12A
CON44+15P+S7-GP 20.F0794.066
PATA : 20.F0793.044
3D3V_S0 5V_S0
3V to 5V level shift for HDD
4
3
RN102
SRN10KJ-5-GP
PATA
1
2
G
1
Q44
32N7002-8-GP HDDDRV#_5
D
7,16,22,26,30,31,32,34 PLT_RST1# 2
S
PATA 84.27002.L04
<Variant Name>
Wistron Corporation
Title
SATA/PATA HDD ULi-M5285
A3
AG1 -1
5V_USB5_S5 5V_USB1_S5
100 mil 80 mil
C631
USB PORT
1
1
TC17 C574 C632 C622
SC1KP16V2KX-GP
SCD1U10V2KX-4GP
SC1KP16V2KX-GP
ST220U6D3VDM-LGP SCD1U10V2KX-4GP TC18
80.22715.L02 2 ST100U6D3VDM-5
2
80.10715.591
KEMET
AVX
5V_USB5_S5 22.10218.J11
SKT-USB-105-GP-U
7
5
1
16 USB_PN0
USB_0- 2
5V_USB5_S5 USB_0+ 3
16 USB_PP0 4
6
5V_USB1_S5 8
5V_S5 U68
USB1
1 8 1 R499
2
GND OC1# USB_OC#2 16 0R2J-2-GP
2 IN OUT1 7
3 6 1 R497
2
EN1/EN1# OUT2 0R2J-2-GP
31 USB_EN# 4 EN2/EN2# OC2# 5 USB_OC#4 16
1
G546A2P1UF-GP
1
R584 74.00546.A7D C630
100KR2J-1-GP
C636
2
22.10218.J11
2
5V_USB5_S5 SKT-USB-105-GP-U
7
5
1
16 USB_PN4
USB_4- 2
USB_4+ 3
BLUETOOTH MODULE CONNECTOR 16 USB_PP4 4
6
8
3D3V_S0
U69 USB2
1 R526
2
3D3V_BT_S0 1 5 0R2J-2-GP
OUT IN R527
2 GND 1 2
3 4 0R2J-2-GP
NC#3 ON/OFF# BLUETOOTH_EN 31
1
AAT4250IGV-T1-GP
C339
2
Place near BT1 74.04250.A3F

22.10218.J11
5V_USB1_S5 SKT-USB-105-GP-U
7
5
1
16 USB_PN2
BT1 USB_2- 2
6
USB_2+ 3
16 USB_PP2 4
4 1 R595 2 USB_PN1 16 6
3 10R0402-PAD
2 USB_PP1 16 8
2 R591 0R0402-PAD
USB3
1 3D3V_BT_S0 C338 1 2 SCD1U16V2ZY-2GP
1 R567
2
0R2J-2-GP
1 R568
2
5
ACES-CON4-1-GP 0R2J-2-GP
20.D0197.104
2nd source: 20.F0760.004
MDC 1.5 CONN

3D3V_LAN_S5
MDC1
13 15
1
MH1 14
1 2 C393
SC1U10V3KX-3GP
2
15,28 ACZ_SDATAOUT 3 4
5 6
15,28 ACZ_SYNC 7 8 <Variant Name>
15 ACZ_SDATAIN1 1 R29 2 AC_DIN1A_R 9 10
15,28 ACZ_RST# 39R2J-L-GP 11 12 ACZ_BTCLK_MDC 15
MH2
16
17
18 Wistron Corporation
1

1
AMP-CONN12A-GP Taipei Hsien 221, Taiwan, R.O.C.

C47 C395 R367
SC22P50V2JN-4GP 20.F0582.012 DUMMY-C2 100KR2J-1-GP Title
2
USB and MDC I/F

2

2nd source: 20.F0604.012 A3
AG1 -1
Date: Friday, February 24, 2006 Sheet 21 of 45
A B C D E
3D3V_LAN_S5 CLOSE TO GPHY PINS

3D3V_LAN_S0_1
5789 5789
MDI0+
MDI1+
MDI2+
MDI3+
MDI0-
MDI1-
MDI2-
MDI3-
5789
1
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
R444 R443 R442 C496 3D3V_2D5V_LAN_S5 5789 5789
1
4
3
4
3
4
3
4
3
1KR2J-1-GP 1KR2J-1-GP 1KR2J-1-GP
SCD1U10V2KX-4GP
C449 C432 C465 C430 C83
SRN49D9F-GP
SRN49D9F-GP
SRN49D9F-GP
SRN49D9F-GP
2
1
U56 L8
8 1 1 2XTALVDD No 5787 No 5787
2
2
LAN_EE_WP VCC A0 R416 0R3-0-U-GP
7 WP A1 2
1
LAN_EECLK 6 3 4K7R2J-2-GP C76
LAN_EEDATA SCL NC#3 3D3V_LAN_S5 RN70 RN72 RN73 RN71
5 4
1
2
1
2
1
2
1
2
SDA GND
GIGA
2
4 AT24C256N-10SU-GP C80 4
1
3D3V_S5 3D3V_LAN_S5 3D3V_2D5V_LAN_S5 U55 L5
1
1 2 BIASVDD C366 C369 C370 C367
1 8 R427 0R3-0-U-GP No 5787 No 5787
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
R395
2
CS VCC
1
1 R394 2 1 2 2 7 10KR2J-3-GP C494 C60
2
SK DC
1
0R0603-PAD 0R3-0-U-GP SPROMDOUT 3 6 SCD1U10V2KX-4GP
DI ORG
1
4401E SPROMDIN 4 5 -1
2
DO GND
J14 1D8V_1D2V_LAN_S5
4401E R425 5789 5789
2
0R2J-2-GP
3D3V_LAN_S5
AT93C46-10SU-1GP 3D3V_LAN_S0
3D3V_S0
3D3V_LAN_S5 4401E R393 GIGA
VAUXPRSNT
16,24,25,30,35 PCI_AD[0..31]
LOW_PWR2
AVDDL
1D8V_1D2V_LAN_S5 1 R399 4401E
PLLVDD
3D3V_LAN_S5 1 2 2
H14 XTALVDD
A14 BIASVDD
0R3-0-U-GP 0R3-0-U-GP 3D3V_LAN_S0_1
No R639
5787
1 2 R48 11K27R2F-L-GP
2
1
C417 C452 0R3-0-U-GP 1 2

R49 1K24R2F-GP R79 :1.27K 1% FOR BCM4401E -> 64.12715.L01
GIGA
G11
G14
D11
E10
K12
K14
A10
K13
2
F10
F12
F13
1.24K 1% FOR BCM5789 -> 64.12415.6DL
L14
8
7
6
5
J10
J12
G4
G1
G2
C5
U14
B8
E5
E6
E7
E8
E9
K4
K5
K6
K7
K8
B3
A7
E1
E4
K3
P2
P1
A1
F5
L4
L6
J4
J5
2
2
R614 R615
SRN0J-4-GP
3D3V_2D5V_LAN_S5
0R2J-2-GP 0R2J-2-GP RN104 3D3V_2D5V_LAN_S5
TEST_MODE
VDDIO_PCI
VDDIO_PCI
VDDIO_PCI
VDDIO_PCI
VDDIO_PCI
VDDIO_PCI
VDDIO_PCI
VDDIO_PCI
VDDIO_PCI
REG18OUT
VDDIO
VDDIO
VDDIO
VAUX_PRSNT
VREF
VESD1
VESD2
VESD3
REGSUP18
REGSUP18
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
EPHY_AVDD
EPHY_AVDD
PLLVDD
BIASVDD
XTALVDD
RDAC
2
Place PLLVDD/AVDDL 5787 5787 5787 -1
1
CKT as close to chip as R417 C464 L4
possible 0R0402-PAD 1 2AVDD_A13
1
1
1
2
3
4
SRN0J-4-GP RN105 0R3-0-U-GP
1
M7 PCI_AD01 8 A8 VDDP GIGA C61
1
1D8V_1D2V_LAN_S5 PCI_AD12 No AD0 DC#A8
N7
PCI_AD23
57877 AD1 DC#A9 A9
AVDD_A13
GIGA
P7 6 A13
2
L21 PCI_AD34 AD2 DC#A13
P5 5 AD3 DC#B9 B9 GIGA
Broadcom LAN
1 2 AVDDL No 5787 N5 C10 R640 5787 L6
AD4 DC#C10
SCD1U10V2KX-4GP
3 0R3-0-U-GP PCI_AD41 2 M5 C12 CS#1 2 1 2AVDD_F14 3

SCD47U10V3ZY-GP
AD5 DC#C12
1
PCI_AD51R617 0R2J-2-GP
2 PCI_AD6 P4 D5 VDDP 4K7R2J-2-GP 5789 3D3V_LAN_S0 0R3-0-U-GP
AD6 DC#D5
1
C65 R616 0R2J-2-GP PCI_AD7 N4 D8 LAN_PCIE_TEST 1 R397 24K7R2F-GP C70
C434 PCI_AD8 AD7 DC#D8
No 5787 P3 D9 LAN_SMB_DATA2 15787 SMB_DATA 16,18,26,30 GIGA
2
AD8 DC#D9
2
BCM4401E
-1 PCI_AD9 N3 D10 LAN_SMB_CLK 2 R618 0R2J-2-GP
1 SMB_CLK 16,18,26,30
2
L7 PCI_AD10 AD9 DC#D10
PLLVDD
No
PCI_AD11
5787 N2 AD10 DC#D13 D13 5787 R619 0R2J-2-GPMDI2+ 23 R405
1 2 1 2 UART_MODE M1 AD11 DC#D14 D14 MDI2- 23 4K7R2F-GP
SCD1U10V2KX-4GP
0R3-0-U-GP R624 0R2J-2-GPPCI_AD12 M2 E13 23 5789

SCD47U10V3ZY-GP
AD12 DC#E13 MDI3+

1
C72 No 5787 PCI_AD13 M3 E14 MDI3- 23
1
PCI_AD14 AD13 DC#E14
1 2 SERIAL_DO L1 F4 CLK_SEL 1 R406 2
C77 R6205787
No 0R2J-2-GP
PCI_AD15 L2
AD14
BCM5789 DC#F4
F11 SO 1 TPAD28 TP74 4K7R2F-GP
2
PCI_AD16 AD15 DC#F11

1 2 SERIAL_DI K1 AD16 DC#F14 F14 AVDD_F14 DY
L24 R621 0R2J-2-GPPCI_AD17 E3 G13 1 R63 2 3D3V_LAN_S5
AD17 DC#G13
1 2
0R3-0-U-GP
PCIE_PLLVDD PCI_AD18
PCI_AD19
D1 AD18 DC#H11 H11 578910KR2J-3-GP 3D3V_LAN_S5
D2 AD19 DC#J13 J13
BCM5787M
1
GIGA PCI_AD20 D3 K9 REGCTL12
E
C492 C491 PCI_AD21 AD20 DC#K9
GIGA GIGA
SCD47U10V3ZY-GP SCD47U10V3ZY-GP PCI_AD22
C1 AD21 DC#K10 K10
Q37
GIGA
B1 L5 5787 B
2
PCI_AD23 AD22 DC#L5 TEST# C679 C680 MMJT9435T1G-GPU

B2 L7 1 2
E
AD23 DC#L7
1
SCD1U10V2KX-4GP
L23 PCI_AD24 D4 L8 R6224K7R2J-2-GP 1D8V_1D2V_LAN_S5
SC4D7U10V5ZY-3GP
C
AD24 DC#L8
SC10U6D3V5MX-3GP
1 2 PCIE_SDSVDD PCI_AD25 A5 L11MMJT9435T1G-GPU
B
0R3-0-U-GP 3D3V_LAN_S0 PCI_AD26 AD25 DC#L11
B5 IDSEL:AD23 L12 5787 Q49 GIGA
2
AD26 DC#L12
1
GIGA PCI_AD27 B6 L13 REGCTL25 C460 GIGA
C
AD27 DC#L13
1
GIGA C489 GIGA C490 PCI_AD28 C6 INTA-->:INT_PIRQH# M6 PCIE_SDSVDD C461 C457 C456
SC4D7U10V5ZY-3GP
AD28 DC#M6
2
SCD47U10V3ZY-GP SCD47U10V3ZY-GP PCI_AD29 PCIE_PLLVDD

C7 M8 GIGA GIGA
2
AD29 DC#M8
R623 DY PCI_AD30 C8 GNT:PCI_GNT#2 M9 5787
2
1KR2J-1-GP PCI_AD31 AD30 DC#M9
3D3V_LAN_S5 3D3V_LAN_S0
C9 AD31 REQ:PCI_REQ#2 DC#M10 M10 2 1
R625 0R2J-2-GP
GIGA
DC#M11 M11 C82
16,24,30,35 PCI_C/BE#0 PCI_C/BE#0 M4 M12 GIGA GIGA
1
2 VMAINPRSNT CBE_0# DC#M12 2

16,24,30,35 PCI_C/BE#1 No 57871R626 0R2J-2-GP 2 L3 CBE_1# DC#M13 M13 1 2
1
16,24,30,35 PCI_C/BE#2 PCI_C/BE#2 F3 M14 3D3V_2D5V_LAN_S5

CBE_2# DC#M14
1
5787 16,24,30,35 PCI_C/BE#3 1 2LAN_GPIO3 C4 CBE_3# DC#N11 N11 LAN_N11 1 2

4K7R2J-2-GP R400 5789 R628 0R2J-2-GP
R627 4K7R2J-2-GP
No 5787 DC#N14 N14 GIGAC474 SC10U10V5ZY-1GP
16,25,30,35 PCI_FRAME# F2 FRAME# DC#P11 P11 1 2
16,25,30,35 PCI_IRDY# F1 P13 VDDP -1 C84 SCD1U10V2KX-4GP GIGA
2
IRDY# DC#P13
16,25,30,35 PCI_TRDY# G3 "GIGA" -- stuff when 5789 and 5787M. P14 2 1 5787
2
R68 PERR# TRDY# DC#P14 R629 0R2J-2-GP

16,25,30,35 PCI_PERR# 1 2
0R2J-2-GP
J2 PERR# GIGA 2 1 5787
5,30,35 PCI_SERR# 1 R398
2
0R2J-2-GP
4401E ATTN_BTTN# A2 SERR# "4401E" -- stuff when 4401E. NC#N6 N6 C89 1 2 R630 0R2J-2-GP
SCD1U10V2KX-4GP
PCIE_RXP1 16
16 PCI_REQ#2 C3 REQ NC#P6 P6 1 2 PCIE_RXN1 16
4401E 16 PCI_GNT#2 No R631
57870R2J-2-GP J3 GNT#
"5789" -- stuff when 5789. C90 SCD1U10V2KX-4GP
16,25,30,35 PCI_DEVSEL# 1 2 H3 N8 GIGA CLK_PCIE_LAN CLK_PCIE_LAN 3
PCI_AD23 R401 1 100R2F-L1-GP-U
2 LAN_IDSEL A4
DEVSEL#
IDSEL
"5787" -- stuff when 5787. RSVD#N8
RSVD#N10 N10 PCIE_TXN1 16
7,16,20,26,30,31,32,34 PLT_RST1# 1 R53 2 GIGA J1 P8 CLK_PCIE_LAN#
16,25,27,30,35 PCIRST1# 1 R54 0R2J-2-GP
2
16,24,30,35 PCI_PAR
LAN_PCI_RST# C2 PAR "no 5787" -- stuff when 4401E and 5789. RSVD#P8
P10
CLK_PCIE_LAN# 3
PCIE_TXP1 16
0R2J-2-GP R67 LAN_INTA# PCI_RST# RSVD#P10
16 INT_PIRQH# 4401E 1 2
0R2J-2-GP
H2 INTA#
3 PCLK_LAN 4401E R66
4401E A3 PCI_CLK
16,25,30,31,32,35 PM_CLKRUN# 1 2 H4 CLKRUN#
0R2J-2-GP SCLK TPAD28 TP73
16,25,30,35 PCI_STOP# 4401E H1 STOP# EEDATA_PXE E12 1
SPROM_DOUT
PME#_LAN 1 R46
2 A6 E11 SI 1 TPAD28 TP72
LINK_LED100
PME# EECLK_PXE
SPROM_CLK
SPROM_DIN
0R2J-2-GP
LINK_LED10
1 R47
2
SPROM_CS
16,30,31 PCIE_WAKE# 1D8V_1D2V_LAN_S5

0R2J-2-GP
EXT_POR
GIGA
COL_LED
ACT_LED
XTALO
TRD0+
TRD1+
TRST#
GPIO0
GPIO1
TRD0-
TRD1-
XTALI
TDO
TMS
TCK
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
TDI
BCM4401EKFBG-GP
1
C458 C459 C450 C451 C454 C440 C433 C431
D7
H12
D6
C11
D12
B13
B14
C13
C14
N13
J11
K11
L10
A11
B11
B10
A12
P12
N12
L9
G12
H13
B4
B7
B12
E2
F6
F7
F8
F9
G5
G6
G7
G8
G9
G10
H5
H6
H7
H8
H9
H10
J6
J7
J8
J9
K2
N1
N9
P9
3D3V_LAN_S5 1 2 71.04401.C0U
2
R43 0R2J-2-GP
1 <Variant Name> 1
4401E 1 R682 2
LAN_EEDATA
SPROMDOUT
Q11 GIGA
LAN_EECLK
1
SPROMDIN
PME#_LAN GND 2
DY 1KR2J-1-GP R50
LAN_EE_WP
Wistron Corporation
RN77 DY 1 R72 2
3 OUT 0R2J-2-GP 1R408 200R2J-L1-GP 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
R2 ICH_PME# 16 DY 2
10KR2J-3-GP Taipei Hsien 221, Taiwan, R.O.C.
SC27P50V2JN-2-GP
SC27P50V2JN-2-GP
3 2 X2
IN R1
1 DY 4 1 1 R414 2 3D3V_LAN_S5 1 2
2
4K7R2J-2-GP LAN_X0 Title
1
SRN4K7J-8-GP LAN_X1 XTAL-25MHZ-70GP C87
84.00124.F1K 23 MDI0+ 1G_LED# 23 82.30020.581 BCM4401E / BCM5789
CHDTC124EU-1GP 23 MDI0- LAN_ACT_LED# 23 C86 Size Document Number Rev
2
2
A3
23
23
MDI1+
MDI1-
100M_LED# 23
10M_LED# 23
AG1 -1
A B C D E
A B C D E
Voltage
4401E 5789 5787
LAN Connector
Rail
LED COLOR
RJ1
VDDIO_PCI 3D3V_LAN_S5 3D3V_S0 Don't Care CONN_PWR_2
9
B1
NP1 B2:YELLOW
VDDC 1D8V_LAN_S5 1D2V_LAN_S5 22 LAN_ACT_LED#
RJ45_1
B2
RJ45_1
RJ45_2
4 VDDIO 3D3V_LAN_S5 3D3V_LAN_S5 RJ45_3
RJ45_2
RJ45_3
4
MCT3 RJ45_4 RJ45_4

RJ45_5
VESD 3D3V_LAN_S5 3D3V_S0 Don't Care D6 RJ45_6
RJ45_5
RJ45_6
MCT4 RJ45_7 RJ45_7
RJ45_8
VDDP Don't Care 2D5V_S5 22 10M_LED# 1 6 RJ45_8
A1 A1:Amber
MCT2 CONN_PWR_1 A2
MCT1 LAN_LED# A3:GREEN
3D3V_2D5V_S5 3D3V_S5 2D5V_S5 22 100M_LED# 2 5 A3
RJ11_1
RJ11_2
8
7
6
5
1D8V_1D2V_S5 1D8V_LAN_S5 1D2V_S5 RN8 22 1G_LED# 3 4 NP2
10
SRN75J-1-GP
CH731UPT-GP RJ45-107-GP-U
22.10245.J01
1
2
3
4
EC2
LAN_TERMINAL 1 2
SC1KP2KV8KX-LGP
3D3V_2D5V_LAN_S5
For Modem Cable from MDC
2
R330 LAN Link: Green(A3), behavior is the
0R0402-PAD same for 10/100/1000 bits
3 TRING1 3
3 1 2 TIP
1
XF2 1 L3 HFB1608VF-102-GP LAN Data: Yellow(B2), when LAN is

2 1 2 RING transfering data.
1 12 RJ45_7 4 L2 HFB1608VF-102-GP
22 MDI3+ RD+ RX+ RJ45_8
22 MDI3- 2 RD- RX- 11
TCT1 3 10 MCT4 ACES-CON2-GP-U
RDCT RXCT MCT3 20.F0714.002
4 TDCT TXCT 9
C368 C365 5 8 RJ45_4
22 MDI2+ TD+ TX+
1
6 7 RJ45_5
22 MDI2- TD- TX-
GIGA 2nd source: 20.D0196.102
GIGA
2
XFORM-208-GP
68.68161.30A GIGA LAN_LED#
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
XF1
22 LAN_ACT_LED#
1 12 RJ45_3
22 MDI1+ RD+ RX+ RJ45_6
22 MDI1- 2 RD- RX- 11
3 10 MCT2 1 2 CONN_PWR_1
RDCT RXCT 3D3V_LAN_S5 470R2J-2-GP
4 9 MCT1 R10
TDCT TXCT RJ45_1
22 MDI0+ 5 TD+ TX+ 8
22 MDI0- 6 TD- TX- 7 RJ45_2 3D3V_LAN_S5 1 R317 2 CONN_PWR_2
470R2J-2-GP
1
2 C363 C362 C708 C709 2
1
C707 C710
SC100P50V2JN-3GP
1.route on bottom as differential pairs. XFORM-208-GP
SC100P50V2JN-3GP SC100P50V2JN-3GP
SC100P50V2JN-3GP
2
2
2.Tx+/Tx- are pairs. Rx+/Rx- are pairs.
2
3.No vias, No 90 degree bends.

4.pairs must be equal lengths.
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
5.6mil trace width,12mil separation.
6.36mil between pairs and any other trace.
7.Must not cross ground moat,except
RJ-45 moat.
RJ11 signal must leave the other signal

or power plane 100mil.
DOC_TIP,DOC_RING,TIP,RING:
W/S : 10/100 @ Surface layers
10/20 @ Inner layers
1 10/100 LAN Transformer RJ45 PIN <Variant Name> 1
TD+ --> TX+ RJ45-1 Wistron Corporation

TD- --> TX- RJ45-2 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
RD+ --> RX+ RJ45-3 Title
RD- --> RX- RJ45-6 LAN Connector

A3
AG1 -1
A B C D E
A B C D E
C431 should close Pin-P15

and Pin-R17.
1394_AGND 3D3V_PLL_S0
4 VCC_ASKT_S0 4
2 16,22,30,35
2 16,22,30,35
16,22,30,35
16,22,30,35
PCI_C/BE#3
PCI_C/BE#2
PCI_C/BE#1
PCI_C/BE#0
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
3D3V_S0
TIPCI C586 TIPCI
2
C566 1 2
SD_D[0..3] 26
C584 C259 SCD1U25V3ZY-1GP SCD1U16V2ZY-2GP
1
1
1
TIPCITIPCI U24A
W10
U19
U15
K19
P15
P14
P13
A15
P10
F14
F12
L14
J19
J14
W8
U5
1 OF 2
P2
V7
K2
K1
P1
P8
P6
F9
F6
L6
J6
VCCCB
VCCP
VCCP
VCCCB
VR_PORT
VR_PORT
C/BE3#
C/BE2#
C/BE1#
C/BE0#
VR_EN#
VDDPLL_33
VDDPLL_15
AVDD_33
AVDD_33
AVDD_33
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
CBB_D[0..15] 25,27,35
CBB_A[0..25] 25,27,35
16,22,25,30,35 PCI_AD[0..31]
PCI_AD0 R11 P19
AD0 CAD0/D3 CBB_D3 27,35
PCI_AD1 P11 N18 CBB_D4 27,35
PCI_AD2 AD1 CAD1/D4
U11 AD2 CAD2/D11 N17 CBB_D11 27,35
PCI_AD3 V11 M15 CBB_D5 27,35
PCI_AD4 AD3 CAD3/D5
W11 AD4 CAD4/D12 N19 CBB_D12 27,35
PCI_AD5 R10 M18 CBB_D6 27,35
PCI_AD6 AD5 CAD5/D6
U10 AD6 CAD6/D13 M17 CBB_D13 27,35
PCI_AD7 V10 L19 CBB_D7 27,35 * All 1394 signals must be routed on top side only
PCI_AD8 AD7 CAD7/D7 * Differential pairs of each ports should have equal trace length
R9 AD8 CAD8/D15 L18 CBB_D15 27,35
PCI_AD9 U9 L15 CBB_A10 27,35 * Stubs must be keep as short as possible
3 PCI_AD10 AD9 CAD9/A10 3
V9 AD10 CAD10/CE2# K18 CBB_CE2# 27,35
PCI_AD11 W9 K17 CBB_OE# 27,35
PCI_AD12 AD11 CAD11/OE#
V8 AD12 CAD12/A11 K15 CBB_A11 27,35
PCI_AD13 U8 J18 CBB_IORD# 27,35 Bypass/Decupoling Capacitors
PCI_AD14 AD13 CAD13/IORD#
R8 AD14 CAD14/A9 J15 CBB_A9 27,35
PCI_AD15 W7 J17 CBB_IOWR# 27,35 Should be places as close to
PCI_AD16 AD15 CAD15/IOWR#
W4 AD16 CAD16/A17 H19 CBB_A17 27,35
PCI_AD17 T2 F15 CBB_A24 27,35 PCI7412 as possible
PCI_AD18
PCI_AD19
PCI_AD20
T1
R3
P5
AD17
AD18
AD19
AD20
TI PCI7412 CAD17/A24
CAD18/A7
CAD19/A25
CAD20/A6
E17
D19
A16
CBB_A7 27,35
CBB_A25 27,35
CBB_A6 27,35
PCI_AD21 R2 E14 3D3V_S0
AD21 CAD21/A5 CBB_A5 27,35
PCI_AD22 R1 B15 CBB_A4 27,35
PCI_AD23 AD22 CAD22/A4
P3 AD23 CAD23/A3 B14 CBB_A3 27,35
PCI_AD24 N3 A14 CBB_A2 27,35
AD24 CAD24/A2
1
PCI_AD25 N2 C13 CBB_A1 27,35 C582 C576
PCI_AD26 AD25 CAD25/A1 C578 C587
N1 AD26 CAD26/A0 B13 CBB_A0 27,35
PCI_AD27 M5 C11 CBB_D0 27,35 SC1KP16V2KX-GP SC1KP16V2KX-GP
2
PCI_AD28 AD27 CAD27/D0
MC_PWR_CTRL_1/SM_R/B#
M6 AD28 CAD28/D8 E11 CBB_D8 27,35
PCI_AD29 M3 F11 CBB_D1 27,35
PCI_AD30 AD29 CAD29/D1
PCI_AD31
M2 AD30 CAD30/D9 A10 CBB_D9 27,35 TIPCI TIPCI TIPCI TIPCI
M1 AD31 CAD31/D10 C10 CBB_D10 27,35
3D3V_S0
MC_PWR_CTRL_0
SD_CMD/SM_ALE
SD_CLK/SM_RE#
SD_DAT3/SM_D7
SD_DAT2/SM_D6
SD_DAT1/SM_D5
SD_DAT0/SM_D4
SD_WP/SM_CE#
16,22,30,35 PCI_PAR U7 PAR CPAR/A13 H14 CBB_A13 27,35
CC/BE3#/REG#
CC/BE0#/CE1#
CC/BE2#/A12
CC/BE1#/A8
1
SD_CD#
VSSPLL
C573
AGND
AGND
AGND
SC1KP16V2KX-GP
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
2
2 2
TIPCI
U14
U13
R14
P9
P7
N6
M14
K14
K6
H6
G14
F13
F10
F7
R17
E6
B5
A5
C6
E7
C5
A4
F8
MC_PWR_CTRL1_0 C8
E9
E13
E18
H18
L17
71.07412.B0U PCI7412ZHK-GP
TIPCI
CBB_CE1# 27,35
CBB_A8 27,35
CBB_A12 27,35
26 SD_D3 CBB_REG# 27,35
26 SD_D2 SD_CD# 26
1394_AGND
26 SD_D1 3D3V_S0
26 SD_D0
26 SD_WP
26 SD_CMD
26 SD_CLK 4
26 SM_R# 3
TIPCI RN99
SRN10KJ-5-GP 3D3V_S0 3D3V_PLL_S0
SC1KP16V2KX-GP
1 2
R528 0R3-0-U-GP
1
2
1
MC_PWR_CTRL 26 C583 C572 C571
TIPCI
C
SC1U10V2ZY SC1U10V2ZY
2
B Q42
CHT2222APT-GP TIPCI
TIPCI TIPCI TIPCI
E
1 <Variant Name> 1
Wistron Corporation
Title
TI PCI7412 (1 of 2)
A3
AG1 -1
A B C D E
A B C D E
4 4
TP94 TP55
TPAD28 TP54 TPAD28
TPAD28 TP92
TPAD28
MS_D[1..3] 26
1
1
1
G11
W12
U12
V12
U24B
E5
1 2
PCI7412ZHK-GP
2 OF 2
GAP-CLOSE
NC#E5
PC2
PC1
PC0
1394_AGND
16,22,30,35 PCI_TRDY# W5 TRDY#

16,22,30,35 PCI_STOP# V6 STOP#
16,22,30,35 PCI_SERR# W6 SERR#
16,35 PCI_REQ#0 L3
16,22,30,35 PCI_PERR#
16,22,30,35 PCI_IRDY#
16,22,24,30,35 PCI_AD22 1 R530
2 7412_IDSEL
R7
V5
N5
REQ#
PERR#
IRDY#
IDSEL
TI PCI7412 CCLK/A16 F18
TIPCI
1 R205 2 CBB_A16 27,35
100R2F-L1-GP-U L2 A11 33R2J-2-GP
16,35 PCI_GNT#0 GNT# CCLKRUN#/WP/IOIS16# CBB_WP 27,35
3 3
16,22,30,35 PCI_FRAME# TIPCI R6 FRAME# CRST#/RESET C15 CBB_RESET 27,35
16,22,30,35 PCI_DEVSEL# U6 DEVSEL#
XD_CD#/SM_PHYS_WP# A3 XD_CD# 26
26 MS_D3 B6 MS_DATA3/SD_DAT3/SM_D3 SM_CLE B4 SM_CLE 26
26 MS_D2 A6 MS_DATA2/SD_DAT2/SM_D2 SM_CD# B8 SM_CD# 26
26 MS_D1 C7 MS_DATA1/SD_DAT1/SM_D1 3D3V_S0
26 MSCSDIO B7 MS_SDIO/DATA0/SD_DAT0/SM_D0 TIPCIR533
26 MS_CLK A7
A8
MS_CLK/SD_CLK/SM_EL_WP# IDSEL:AD22 SUSPEND# J5
H3
1 2
10KR2J-3-GP
26 MS_CD# MS_CD# SPKROUT PCI_SPKR 28,35
26 MSCBS E8 MS_BS/SD_CMD/SM_WE# INTA-->:INT_PIRQG# SDA G3 1 R541 2TIPCI
3D3V_PLL_S0
SCL G2
TIPCI INTB-->:INT_PIRQB# RI_OUT#/PME# L5 47KR2J-2-GP
1 2 1394_TPBIAS1 W17 P17 1 R532 2 4K7R2J-2-GP
C567
26 1394_TPBIAS0
SCD1U25V3ZY-1GP R13
TPBIAS1
TPBIAS0
INTC-->:INT_PIRQF# PHY_TEST_MA
TIPCI
V15
W15
TPB1P INTD-->:INT_PIRQG# J3
RN55
INTA#
PM_CLKRUN# 16,22,30,31,32,35 CARBUS 1 (INT_PIRQG#)
TPB1N MFUNC6
26 1394_TPB0P V13
W13
TPB0P GNT:PCI_GNT#0 MFUNC5 J2
J1 INTD#
3
4
2
1TIPCI
3D3V_S0 INTB# (WIFI) (INT_PIRQB#)
26 1394_TPB0N TPB0N MFUNC4 INTC# 1394 (INT_PIRQF#)
1394_AGND
V16 TPA1P REQ:PCI_REQ#0 MFUNC3 H1
SRN4K7J-8-GP
INT_SERIRQ 16,30,31,32,35
INTD# CardReader (INT_PIRQG#) share
W16 TPA1N MFUNC2 H2 INTC# INT_PIRQF# 16
26 1394_TPA0P V14 TPA0P MFUNC1 H5 INTB# INT_PIRQB# 16,35
26 1394_TPA0N W14 TPA0N MFUNC0 G1 INTA# INT_PIRQG# 16,35 MFUNC4: use bit 19-16 Register define.
CSTSCHG/BVD1/STSCHG#/RI#
1394_R1 T19 F1 CLK48_CARDBUS 3
R1 CLK_48
1 2 1394_R0T18 R0 A_USB_EN# E10
6K34R2F-GP R193 R12 H15
RSVD#C4/VD0/VCCD1#
CPS CBLOCK#/A19 CBB_A19 27,35

CAUDIO/BVD2/SPKR#
TIPCI P12
CLOCK/VD1/VCCD0#
CINT#/READY/IREQ#
C258 1394_XO TEST0

LATCH/VD3/VPPD0
R18 XO
DATA/VD2/VPPD1
2 1394_XI CREQ#/INPACK# MC_PWR_CTRL-1 TP93 TPAD30 2

R19 G5
RSVD#M19/D14
XI CSERR#/WAIT# RSVD#G5
2
CDEVSEL#/A21
RSVD#H17/A18
SC12P50V2JN-3GP
CFRAME#/A23
RSVD#B10/D2
CCD1#/CD1#
CCD2#/CD2#
CPERR#/A14
CTRDY#/A22
CSTOP#/A20
CGNT#/WE#
X5
CIRDY#/A15
CVS1/VS1#
CVS2/VS2#
TIPCI
RSVD#G6
RSVD#D1
RSVD#E1
RSVD#E2
RSVD#E3
X-24D576MHZ-46GP
RSVD#F2
RSVD#F3
RSVD#F5
82.30023.351
GRST#
PRST#
1
PCLK
C250
SC12P50V2JN-3GP TIPCI
TIPCI TIPCI
B10
C4
D1
E1
E2
E3
F2
F3
F5
G6
H17
M19
C9
A9
B9
B12
F19
E19
G17
E12
F17
G19
C14
C12
G18
A12
G15
A13
B16
N15
B11
K5
L1
K3
PCIRST1# 16,22,27,30,35
PCLK_PCM_TI 3
3D3V_S0
27,35 CBB_D2 CBB_CD2# 27,35
CBB_CD1# 27,35
1 R209 2 CBB_VS2# 27,35
43KR2J-GP CBB_VS1# 27,35
27,35 CBB_A18
TIPCI 27,35 CBB_D14 CBB_A22 27,35
27 CB_LATCH CBB_BVD1# 27,35
27 CB_CLOCK CBB_A20 27,35
27 CB_DATA CBB_WAIT# 27,35
27,35 CBB_BVD2# CBB_INPACK# 27,35
27,35 CBB_A21 CBB_A14 27,35
27,35 CBB_A23 CBB_A15 27,35
27,35 CBB_WE# CBB_RDY 27,35
1 <Variant Name> 1
Wistron Corporation
Title
TI PCI7412 (2 of 2)
A3
AG1 -1
A B C D E
A B C D E
Mini Card Connector

3D3V_S5 3D3V_S0 1D5V_S0
6
MINIC2
13
-1
1 R413
0R0402-PAD
2
1394 Connector
1.5V REFCLK+ CLK_PCIE_MINI1 3
REFCLK- 11 1 R415 2 CLK_PCIE_MINI1# 3
2 0R0402-PAD
3.3V
PERN0 23 PCIE_RXN2 16
28 +1.5V PERP0 25 PCIE_RXP2 16 1394
48 +1.5V
4 31 PCIE_TXN2 16 L35 69.10084.071 4
PETN0 FILTER-79-GP
52 +3.3V PETP0 33 PCIE_TXP2 16
4 3 CN1
25 1394_TPA0P
24 +3.3VAUX USB_D- 36 USB_PN6 16 6
38 USB_PP6 16 TPA0+ 4
USB_D+ TPA0-
25 1394_TPA0N 1 2 3
DY 0R2J-2-GP 4 3 TPB0+ 2
25 1394_TPB0P
3 RESERVED#3 30 1 R688 2
SMB_CLK SMB_CLK 16,18,22,30
5 RESERVED#5 SMB_DATA 32 1 R687 2 SMB_DATA 16,18,22,30
TPB0- 1
8 RESERVED#8 0R2J-2-GP 1 2 5
25 1394_TPB0N
10 RESERVED#10 DY 69.10084.071 1394
12 RESERVED#12 1 L37 FILTER-79-GP SKT-1394-4P-12GP
WAKE#
1
UIM 14 RESERVED#14 CLKREQ# 7 1394
1
56R2J-4-GP
16 RESERVED#16 22 PLT_RST1# 7,16,20,22,30,31,32,34 1394 R192 62.10027.451
PERST# R190 R189 R191
17 RESERVED#17
19 RESERVED#19 56R2J-4-GP 56R2J-4-GP 56R2J-4-GP
20 RESERVED#20 4 1394 1394 1394
2
30,31 RF_ON/OFF# GND
37 RESERVED#37 9
2
GND
1
39 15 25 1394_TPBIAS0
R649 41 RESERVED#39 GND
18
RESERVED#41 GND
1
10KR2J-3-GP C249
SC220P50V3JN-GP
DY 43 RESERVED#43 GND 21
1
45 RESERVED#45 GND 26
47 RESERVED#47 27 C248 1394 R188
2
GND SC1U10V3ZY-6GP 5K1R2-GP

49 RESERVED#49 29 1394
2
GND
51 RESERVED#51 34 1394
2
GND
GND 35 Close to TI7412(Device)
GND 40
42 LED_WWAN# GND 50
WLAN_LED# 44 53
3 13 WLAN_LED# LED_WLAN# GND 3
46 LED_WPAN# GND 54
NP1
NP2
3D3V_CR_S0
SKT-MINI52P-3-GP 62.10043.231
SD_D[0..3] 24
NP1
NP2
MINIC
3D3V_S0 1D5V_S0 3D3V_S5
CARDR MS_D[1..3] 25
1
CARDR C603 C605 C606 CARDR
CARD1
MINIC SC1U10V3ZY-6GP SCD1U16V2ZY-2GP
2
C358 37 SCD1U16V2ZY-2GP R642
1
C382 1
2
100KR2J-1-GP
C383 C360 C371 NP1 R643
SCD1U16V2ZY-2GP
SC1U10V2ZY SC1U10V2ZY SCD1U16V2ZY-2GP 2

SCD1U16V2ZY-2GP
2
SD_CD# 24
2
100KR2J-1-GP
3 R644
1
4 MS_CLK-R
1 R562
2 MS_CLK 25
1
0R2J-2-GP
100KR2J-1-GP
MINIC MINIC MINIC 5 MS_D3 CARDR R645
1
MINIC Place near MINIC2 6
MS_CD# 25
22KR2J-GP
7 MS_D2 MS/MS PRO
1
8 MSCSDIO
MSCSDIO 25
9 MS_D1 CARDR
2
10 MSCBS 25
11 MS_D2 CARDR
12 MS_D3
13 MSCBS CARDR
14
CARDR SD/SD IO/MMC
15 MS_CLK
2 3D3V_S0 MSCSDIO 2
16
17 MS_D1
18 SM_CD# SM_CD# 25
19 SM_R# 24
1
R284
MINI WLAN_LED#
20
SD_WP_R 1 R561
SD_CLK 24
21 2 SD_WP 24
100KR2J-1-GP 0R2J-2-GP
22 CARDR SM_CLE 25
84.27002.L04 23 SD_CMD 24
3
D 24 MSCBS DY
2
2N7002-8-GP R559
30 80211_ACTIVE 1 25 1 2 XD_CD# 25
Q24 26 MSCSDIO 1 0R2J-2-GP
R560
2 MS_CLK-R xD
G
1
S MS_D1 0R2J-2-GP
CARDR 27
2
R686 MINI 28 MS_D2

10KR2J-3-GP MS_D3 CARDR
DY 29
SD_D0
30
31 SD_D1
TOP VIEW
2
32 SD_D2
Q52 -1 33 SD_D3
3
D 34
RF_ON/OFF# 1 2N7002-8-GP
84.27002.L04
NP2 35 SD_WP_R 1 R558
2
0R2J-2-GP
SD_WP 1 36
G 36
S 38
CARDR Reader
2
MINI
TTN-CON36-GP-U
62.10024.661
Q27 2N7002-8-GP POWER SWITCH

3D3V_CR_S0 U64 3D3V_S0
S
1 <Variant Name> 1
2 3
1 OUT IN 5
84.27002.L04 2 GND Wistron Corporation
G
3 4 MC_PWR_CTRL 24
1
31 WLAN_TEST_LED C601 NC#3 ON/OFF# 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
1
SCD1U16V2ZY-2GP Taipei Hsien 221, Taiwan, R.O.C.

CARDR AAT4250IGV-T1-GP
1
CARDR CARDR Title
2
C596
74.04250.A3F 2
SC1U10V3ZY-6GP MINI CARD / 1394
A3
AG1 -1
Date: Wednesday, March 01, 2006 Sheet 26 of 45
A B C D E
5 4 3 2 1
PCMCIA Socket
Cardbus I/F
NP1
D D
PCMCIA1
CBB_D[0..15] 24,25,35
CBB_A[0..25] 24,25,35
69 CBB_IORD# 24,35
35
CBB_IOWR# 24,35
CBB_OE# 24,35
CBB_WE# 25,35
TI Power switch
CBB_REG# 24,35
CBB_D3 2
CBB_CD1# CBB_RDY 25,35
36 CBB_WP 25,35
CBB_D4 3 CBB_RESET 25,35
CBB_D11 37
CBB_D5 CBB_WAIT# 25,35
4 CBB_INPACK# 25,35
CBB_D12 38 U40 VCC_ASKT_S0
CBB_D6 5 C288
CBB_D13 39 CBB_CE1# 24,35 3 9
CBB_D7 25 CB_DATA DATA AVCC
6 CBB_CE2# 24,35 25 CB_CLOCK 4 CLOCK AVCC 10 1 2
CBB_D14 40 5 SCD1U16V2ZY-2GP
CBB_CE1# CBB_BVD1# 25,35 25 CB_LATCH LATCH
CBB_D15
7 CBB_BVD2# 25,35 16,22,25,30,35 PCIRST1# R261
12 RESET# TIPCI
41 CBB_CD1# 25,35 5V_S0 1 2 21 SHDN# AVPP 8 VPP_ASKT_S0
CBB_A10 8 10KR2J-3-GP
CBB_CD2# 25,35
1
CBB_CE2# 3D3V_S0
42 CBB_VS1# 25,35 TIPCI TIPCI
1
VCC_ASKT_S0 CBB_OE# 9 13 15 R263
CBB_VS2# 25,35 3.3V OC# 100KR2J-1-GP
CBB_VS1# 43 C325
CBB_A11 10 5V_S0 SCD1U16V2ZY-2GP
2
1
CBB_IORD# 44 C330 1 TIPCI
2
CBB_A9 SC4D7U10V5ZY-3GP 5V
11 2 5V NC#24 24
CBB_IOWR# 45 TIPCI 23
2
C CBB_A8 NC#23 C
12 NC#22 22
1
1
SC1KP16V2KX-GP
C290 C296 CBB_A17 46 C321 C318 7 19

C294 CBB_A13 12V NC#19
DY
SC1U10V3ZY-6GP
13 20 18
SCD1U16V2ZY-2GP
SC4D7U10V5ZY-3GP SCD1U25V3ZY-1GPCBB_A18 12V NC#18
47 TIPCI 17
2
2
CBB_A14 NC#17
14 NC#16 16
CBB_A19 48 PC1 11 14
CBB_WE# GND NC#14
15 1 4 25 GND NC#6 6
CBB_A20 49
CBB_RDY 16
CBB_A21 50 TPS2220APWPRG-GP TIPCI
17 2 3
VPP_ASKT_S0 51 74.02220.A7G
18 CARDBUS-SKT43-GP
52
CBB_A16 19
CBB_A22 53
ENE Power switch

1
C305 CBB_A15 20
C299 CBB_A23 54
SCD1U25V3ZY-1GP
SC4D7U10V5ZY-3GP CBB_A12 21
2
CBB_A24 55
CBB_A7 22
CBB_A25 56
CBB_A6 23 3D3V_S0
CBB_VS2# 57
CBB_A16 CBB_A5 24 3D3V_S0
CBB_RESET 58
CBB_A4 25
CBB_WAIT# 59
2
CBB_A3 5V_S0
B CBB_INPACK#
26
C681 C682
No TIPCI B
60
CBB_A2 SC1U10V3ZY-6GP SCD1U16V2ZY-2GP 4K7R2J-2-GP
27 No TIPCI
2
CBB_REG# 61 R650
Place close to pin 19. CBB_A1 28
1
U72
1
CBB_BVD2# 62 No TIPCI AG1-910-01
1
C304 CBB_A0 29 C683 C684
DUMMY-C2 CBB_BVD1# 63 SCD1U16V2ZY-2GP SC1U10V3ZY-6GP 3 16 2211_SHDN#
CBB_D0 3.3V SHDN#
30 4
2
CBB_D8 3.3V
CBB_D1
64 No TIPCI No TIPCI 5 5V AVCC 13 VCC_ASKT_S0
31 6 12
2
CBB_D9 5V AVCC
65 9 12V AVCC 11
CBB_D2 32 TP95TPAD28No TIPCI
CBB_D10 66 1 10
CBB_WP 35 VCCD0# VCCD0# AVPP VPP_ASKT_S0
33 2
Clock AC termination CBB_CD2# 67
35 VCCD1# VCCD1#
8
OC#
33MHz clock for 32-bit 34 35 VPPD0 15 VPPD0
68 35 VPPD1 14 VPPD1 GND 7
Cardbus card I/F 70
TPS2211AIDBR-1GP
No TIPCI
NP2
CARDBUS68P-15-GP
47K 62.10024.671
A <Variant Name> A
1
C287
SCD01U16V2KX-3GP
Wistron Corporation
2
DY 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

Title
PCMCIA
A3
AG1 -1
Date: Friday, February 24, 2006 Sheet 27 of 45
5 4 3 2 1
A B C D E
SCD47U10V3ZY-GP
R576 3D3V_S0 5VA_S0
25,35 PCI_SPKR C619 1 2 PCI_SPKR1 1 2 "VAUX" Pull high to enable standby mode
47KR2J-2-GP
SCD47U10V3ZY-GP
C644
R572 C623
16 ACZ_SPKR C616 1 2 ACZ_SPKR1 1 2 AUDIO_BEEP 1 2AUDIP_PC_BEEP C624 C625 C324
2
47KR2J-2-GP SC1U10V3KX-3GP
SCD47U10V3ZY-GP
1
4 R573 4
31 KBC_BEEP C617 1 2 KBC_BEEP1 1 2 R574 C618
1KR2J-1-GP SC100P50V3JN-2GP
2
47KR2J-2-GP ACZ_RST# 15,21
ACZ_SYNC 15,21
2
AC97_BTCLK AC97_BTCLK 15
2 R596
1
10KR2J-3-GP
25
38
12
11
10
33
44
43
34
13
U67
1
9
6 BIT-CLK
PCBEEP
VAUX
SENSE_B
SENSE_A
LFE-OUT
CEN-OUT
DVDD1
DVDD2
AVDD1
AVDD2
RESET#
SYNC
29 LINEIN_L SC1U10V3ZY-6GP
2 1C634 LINE1_L 23 5 ACZ_SDATAOUT 15,21
SC1U10V3ZY-6GP LINE1-L SDATA-OUT
29 LINEIN_R 2 1C635 LINE1_R 24 LINE1-R SDATA-IN 8 AC97_DATIN
1 R579 2 ACZ_SDATAIN0 15
14 39R2J-L-GP
LINE2-L
15 LINE2-R
SPDIFO 48 SPDIFO 29
29 LINE1-VREFO SPDIFI/EAPD 47 MUTEIN 29
31 LINE2-VREFO
1
45 R577
3
29 MIC_IN SC1U10V3ZY-6GP
1
SC1U10V3ZY-6GP
1
2 C633
2 C706
MIC1_L 21
22
16
MIC1-L
MIC1-R
ALC 883 SIDESURR-OUT-L
SIDESURR-OUT-R 46 4K7R2J-2-GP
3
2
MIC2-L
17 MIC2-R SURR-OUT-L 39
SURR-OUT-R 41
32 MIC1-VREFO-R
1 R594 2 MIC1V_L MIC1V_L 28 MIC1-VREFO-L
2K2R2J-2-GP 30 35 OUT_L 29
MIC2-VREFO FRONT-OUT-L
FRONT-OUT-R 36 OUT_R 29
PIN37_VREFO
SC4D7U10V5ZY-3GP
2
C645
CD-GND
DVSS1
DVSS2
JDREF
AVSS1
AVSS2
1
GPIO0
GPIO1
VREF
CD-R
CD-L
ALC883-1-GP 71.00883.A0G
26
42
4
7
27
40
37
2
3
18
20
19
2
1
C712
SC10U10V5ZY-1GP
C646 HP_JKIN 29
SCD47U10V3ZY-GP
2
DY
-1
2 2
1) When GPIO0 is assered, AMP should be muted. *Layout*

2) SPDIFO should be turned off when not used. POWER GENERATE 5VA_S0
20 mil
Configuation:
(3 External Jacks, 1 internal Mic, 1 stereo output Speaker Amp.
1
Pin Symbol Location Re-tasking 1 R248
C308 28K7R3F-GP
35/36 FRONT AMP,Jack1 AMP output, line input 5V_S0 U36 SC22P50V2JN-4GP
2
1 5
2
SHDN# SET
1 39/41 SURR X X 5VA_SETPIN 1 R255
2
10KR2F-2-GP <Variant Name> 1
2 GND
1
43/44 CEN/LEFT X SURR-VREFO-L/R C295

3 4
45/46 SIDESURR X SIDESURR-L is MIC2-VREFO-R, SIDESURR-R is LINE2-VREFO-R SC1U10V3KX-3GP IN OUT Wistron Corporation
2
G923-330T1UF-GP C713 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

1
1
SC10U10V5ZY-1GP
23/24 LINE1 Jack 2 Line input, line output 74.00923.A3F C307 C306
21/22 MIC1 Jack 3 Mic input, line output SC1U10V3KX-3GP SC2D2U10V3ZY-1GP Title
Azalia codec ALC883
2
14/15 LINE2 X X DY Size Document Number Rev

16/17 MIC2 Int. Mic Mic input -1 A3
AG1 -1
A B C D E
A B C D E
AUDIO OP AMPLIFIER Internal SPKR

DY C327 -1
SPKR1
5
SC220P50V2JN-3GP
DY DY SRC100P50V-2-GP
ERC2
SPKR_R+
C333 1
1 2 SOUND_L1 1 R272 2 HP_L 1 R265 2 1 8
28 OUT_L 10KR2J-3-GP 10KR2J-3-GP SPKR_R-
2 7 2
SC2D2U16V5ZY-2GP RI DY 3 6 SPKR_L+ 3
4 Gain(HP) = -(RF/RI) 4 5 SPKR_L- 4 4
C637
1 2
ACES-CON4-1-GP
6
SC220P50V2JN-3GP 5V_S0 20.D0197.104
5VA_S0
C334
1 2 SOUND_L2 1 R273 2 SOUND_L_OP1 1 R593 2 2nd source: 20.F0760.004
1
5V_S0 10KR2J-3-GP 10KR2J-3-GP
SC2D2U16V5ZY-2GP R683
4
3
U66 10KR2J-3-GP
DY RN101
1
4 3 SPKR_L+ SRN10KJ-5-GP
2
R592 LLINEIN LOUT+ SPKR_L-
10KR2J-3-GP
5 LHPIN LOUT- 10 -1
L_BYPASS 6 LBYPASS HP_JKIN 28
7 14
1
2
LVDD SE/BTL# HP_JKIN
16
2
HP/LINE#
8 11
C
31 AMP_SHUTDOWN SHUTDOWN MUTEIN MUTEIN 28
2
2 TJ MUTEOUT 9
17 1 R582 Q43 B HP_JKIN#
HP-IN GND/HS 100KR2J-1-GP
23 VOL GND/HS 12 CHT2222APT-GP
13
E
GND/HS
18 24
1
RVDD GND/HS
1
R_BYPASS 19 RBYPASS
1
C643 20 15 SPKR_R-
SC10U10V5ZY-1GP RHPIN ROUT- SPKR_R+ R580
21 22
GND
2
RLINEIN ROUT+ 1KR2J-1-GP

-1
1
G1421BF3UF-GP
25
2
1
3
I/P signal level C626 3
SC10U10V5ZY-1GP R583
2
need +5V level 0R2J-2-GP
5V_S0 5V_OP_S0
-1 DY
74.01421.B1G
2
1 R266 2
0R0603-PAD
Lin-In
1
C326 C639 C628 C312

SC10U10V5ZY-1GP SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2 SOUND_R2 1 R253 2 SOUND_R_OP1 1 R581 2
2
10KR2J-3-GP 10KR2J-3-GP
SC2D2U16V5ZY-2GP LIN1
C629 1
28 LINEIN_L R294 11KR2J-1-GP2 LINEIN_L_1 2
6
SC220P50V2JN-3GP 28 LINEIN_R 1 2 LINEIN_R_1 3
R289 1KR2J-1-GP 4
1
C337 C347 5
R288 R293
SC100P50V3JN-2GP
SC100P50V3JN-2GP
C319 NP1
1 2 SOUND_R1 1 R258 2 HP_R 1 R259 2 4K7R2J-2-GP 4K7R2J-2-GP NP2
2
28 OUT_R
DY SC2D2U16V5ZY-2GP DY 10KR2J-3-GP DY 10KR2J-3-GP
2
C316 PHONE-JK234-GP
22.10133.B11
DY SC220P50V2JN-3GP -1
2 R660 2 2
1
0R2J-2-GP
5VA_S0 SPDIF
5VA_S0 U71
MIC-In
1
Line-Out
5 1 SPDIF_PWR
R300 IN OUT
DY 1KR2J-1-GP HP_JKIN GND 2
4 ON/OFF# NC#3 3
SCD1U16V2ZY-2GP
1
C677 DY
2
MIC1 SPDIF AAT4250IGV-T1-GP

74.04250.A3F
2
2
DY C348 NP2 C642 SPDIF

1
NP1 1 2 LOUT1
DY R301 SC4D7U10V5ZY-3GP 5
1
2K2R2J-2-GP 4 R690 SC680P50V2KX-2GP 9

0R2J-2-GP GND
R285 3 8 VCC
13 INT_MICP 6 SPKR_L+ 1 DY 2 TC19 DY 1 R589
2 SPDIF_R 7 VIN
28 SPDIFO
2
1 R304 2 EXT_MIC_IN 1 2 MIC_L 2 1 2 0R2J-2-GP 16

MIC_IN
0R2J-2-GP 10R3J-3-GP R691
1 SPDIF 6
1
0R2J-2-GP ST33U8VCM HP_JKIN# 5

C340 PHONE-JK233-GP OUT_L 1 2 TC13 4
SC100P50V3JN-2GP 22.10133.B01 HP_OUT_L_2 1 2 HP_OUT_L 1 R590 2 HP_OUT_L_1 2
2
SC10U10V5ZY-1GP 22R2J-2-GP 3
R693 HP_OUT_R_2 1 2 HP_OUT_R 1 R587 2 HP_OUT_R_1 1
0R2J-2-GP SC10U10V5ZY-1GP 22R2J-2-GP
OUT_R 1 2 TC12
1
TC20 C638 C640 22.10271.061
SC680P50V2KX-2GP
SC680P50V2KX-2GP
R692 1 2 R585 R586
1 <Variant Name> 1
0R2J-2-GP 1KR2J-1-GP 1KR2J-1-GP
2
SPKR_R+ 1 DY 2 DY ST33U8VCM
Wistron Corporation
2
2
-1 -1
Title
Audio AMP G1421B / Jack
A3
AG1 -1
A B C D E
A B C D E
3D3V_S0
5V_S0
16,22,24,25,35 PCI_AD[0..31]
1
C111 C112 C108 C504 C503 C505
SC4D7U10V5ZY-3GP
MINI C493 MINI
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
2
2
SC4D7U10V5ZY-3GP NEW1
IDSEL:AD21
2
NP2
INTA-->:INT_PIRQE# MINI1
MINI1125 DY DY 26
MINI MINI MINI 16 PCIE_TXP3 25
GNT:PCI_GNT1# MH1 16 PCIE_TXN3 24
4 1 2 23 4
REQ:PCI_REQ1# 16 PCIE_RXP3 22
3 4 21
MINI 5 6
16 PCIE_RXN3
NEWR237 20
7 8 3 CLK_PCIE_NEW 1 2 19
9 10 PIN 3-16 : LAN RESERVE 1 0R2J-2-GP
R235
2 18
80211_ACTIVE 3 CLK_PCIE_NEW# CPPE#0R2J-2-GP
26 80211_ACTIVE 11 12 17
13 14 TP105 16
26,31 RF_ON/OFF#
15 16
NEW 15
3D3V_NEW_S0
1
INT_PIRQE# 17 18 14
5V_S0
R464 19 20 INT_PIRQE# 16 TPS2231_PERST# 13
10KR2J-3-GP 3D3V_S0
DY 21 22 DY 3D3V_NEW_LAN_S5
R226
12
23 24 16,22,31 PCIE_WAKE# 1 2 CONN_WAKE# 11
25 26 0R2J-2-GP 10
1D5V_NEW_S0
2
3 PCLK_MINI PCIRST1# 16,22,25,27,35

27 28 3D3V_S0 RN57 9
16 PCI_REQ#1 29 30 PCI_GNT#1 16 16,18,22,26 SMB_DATA 1 4 8
31 32 16,18,22,26 SMB_CLK 2 3 7
PCI_AD31 33 34 SRN33J-5-GP-U 6
PCI_AD29 35 36 NEW CPUTSB# 5
37 38 PCI_AD30 4
PCI_AD27 39 40 3
PCI_AD25 41 42 PCI_AD28 16 USB_PP3 2
43 44 PCI_AD26 16 USB_PN3
PCI_C/BE#3 45 46 PCI_AD24 R84 1
16,22,24,35 PCI_C/BE#3
PCI_AD23 47 48 MOD_IDSEL 1 2 PCI_AD21 NP1
49 50
PCI_AD21 51 52 PCI_AD22 100R2J-2-GP SKT1 FCI-CON26-5-GP
PCI_AD19 53 54 PCI_AD20
55 56 PCI_PAR 16,22,24,35 20.F0789.026
3 PCI_AD17 57 58 PCI_AD18 3
PCI_C/BE#2 59 60 PCI_AD16
16,22,24,35 PCI_C/BE#2
16,22,25,35 PCI_IRDY# 61 62 NEW
63 64 PCI_FRAME# 16,22,25,35 1 2
1 R462
2 MINI_CLKRUN# 65 66
10KR2J-3-GP PCI_TRDY# 16,22,25,35
67 68 CARDBUS-SKT73-GPU
16,22,25,35 PCI_SERR# PCI_STOP# 16,22,25,35
69 70
DY 71 72 21.H0114.001
16,22,25,35 PCI_PERR# PCI_DEVSEL# 16,22,25,35
PCI_C/BE#1 73 74 NEW
16,22,24,35 PCI_C/BE#1
77 78 PCI_AD13
PCI_AD10 81 82
83 84 PCI_AD9
PCI_AD8 85 86 PCI_C/BE#0
PCI_C/BE#0 16,22,24,35
1 R463
2 PCI_AD7 87 88
16,22,25,31,32,35 PM_CLKRUN# 0R2J-2-GP PCI_AD6
89 90
MINI
PCI_AD5 91
93
92
94
PCI_AD4
PCI_AD2 NEWCARD Connector
5V_S0 97 98 Reserve the symbol
PCI_AD1 99 100
101 102
INT_SERIRQ 16,25,31,32,35 for bottom side
103 104 connector
105 106
107 108
109 110 DYSRN100KJ-6-GP
111 112 CPUTSB# 2 3 3D3V_S5
113 114 TPS2231_PERST# CPPE# 1 4
2 2
115 116 31,36 S5_EN RN56 1 2 NEWCARD_RST# 16
117 118
119 120 R204 DUMMY-R2
20
10
121 122
NEWR203
8
9
6
123 124 U23 1 2 PLT_RST1# 7,16,20,22,26,31,32,34
MH2 0R2J-2-GP
SHDN#
PERST#
CPUSB#
CPPE#
SYSRST#
126
NEW
PCISLT124-2-GP
62.10034.151 16,18,31,36,41,43 PM_SLP_S3# 1 STBY# 3.3VIN 2 3D3V_S0

18 RCLKEN 3.3VOUT 3 3D3V_NEW_S0
2nd source: 62.10043.151 19 OC# 1.5VIN 12 1D5V_S0
21 THERMAL_PAD 1.5VOUT 11 1D5V_NEW_S0
AUXIN 17 3D3V_S5
AUXOUT 15 3D3V_NEW_LAN_S5
7 GND
NC#16
NC#14
NC#13
NC#5
NC#4
NEW
TPS2231RGP-GP
16
14
13
5
4
74.02231.073
3D3V_S0 3D3V_NEW_S0 1D5V_NEW_S0 3D3V_NEW_LAN_S5

1 <Variant Name> 1
C282
Wistron Corporation
1
1
C257 C276
C285 C273 C279 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
SCD1U16V2ZY-2GP
SC1U10V3ZY-6GP SCD1U16V2ZY-2GP Taipei Hsien 221, Taiwan, R.O.C.

SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
2
2
SC1U10V3ZY-6GP
Title
NEW
NEW
NEW MINI-PCI/NEW Card
Place them Near to Chip Place them Near to Connector Size Document Number Rev
NEW A3
NEW NEW AG1 -1
Date: Thursday, March 09, 2006 Sheet 30 of 45
A B C D E
A B C D E
For S/W Debug

Pin No. Pin No. 3D3V_AUX_S5 NAPA U/V ID
PLANARID0 33
1 3D3V_AUX_KBC MODE1 2
PLANARID1 33 1394/Carder reader : 0
PLANARID2 33
1
TP96
3 H8_RESET# TP97 MODE0 4
INTERNET# 13 non 1394/Carder reader: 1
TP98
No TIPCI
5 KBC_AC_IN# TP99 H8_TXD1 6 R516
TP100 10KR2J-3-GP KBC_3D3V_AUX
2
LID_CLOSE# TP101 H8_RXD1 BLUETOOTH_EN 21 NAPA_U_V
7 8 NUM_LED 13
TP102 CAP_LED 13
1
9 PM_SLP_S3# TP103 GND 10
5V_AUX_S5 KBC_5V_AUX R506 R183
4 STDBY_LED 13 TIPCI 10KR2J-3-GP 10KR2J-3-GP
4
PWRLED 13
1 R518 2 CHRGER_LED 13
1
0R0805-PAD
DC_BATFULL 13
2
C564 C562 EMAIL_LED 13
3D3V_AUX_S5 KBC_3D3V_AUX SC4D7U10V5ZY-3GP SCD1U16V2ZY-2GP H8_RESET# SRN10KJ-4-GP
2
H8_STBY# 5 4 KBC_3D3V_AUX
E
KBC_NMI 6 3
1
1 R487 2 MODE0 7 2 Q16 B PURE_HW_SHUTDOWN# 19,36
0R0805-PAD MODE1 8 1 C234 CH3906PT-GP
DY
1
KBC_XTAL SC10U10V5ZY-1GP
C
C238 C563 C532 C530 KBC_EXTAL RN94
SCD01U16V2KX-3GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SC10U10V5ZY-1GP
142
140
141
143
144
100R2J-2-GP 2 R185 1
86
77
76
36
13
50
49
48
47
46
45
44
43
58
57
56
55
54
53
52
51
12
10
1
9
U61 X4
2 1
VCCB
PF0/TMIA
PF1/TMIB
PF2/TMOA
PF3/TMOB
PF4/EXTMIX
PF5/EXTMIY
PF6/EXTMOX
PF7/TMOY
PG4/EXSDAA
PG5/EXSCLA
PG6/EXSDAB
PG7/EXSCLB
VCL
PG0
PG1
PG2
PG3
RES#
MD0
MD1
X1
X2
VCC
VCC
VCC
VCC
RESO#
STBY#
XTAL
EXTAL
1
15 LPC_LAD[0..3]
-1 3D3V_S5 C242 XTAL-10MHZ-3GP C243
SC10P50V2JN-4GP 82.30054.041
2
2
SC10P50V2JN-4GP
R694 42 CHG_I_PWM CHG_I_PWM 112 41
CHG_V_PWM P10/PW0 PA0/KIN8#
2K2R2J-2-GP 42 CHG_V_PWM 110 P11/PW1 PA1/KIN9# 40
16 RSMRST#_TO_KBC 1 R494 23D3V_S5_SENSE 109 P12/PW2 PA2/KIN10#/PS2AC 39 TCLK 33
0R0402-PAD 108 38 RN91 5V_S0
TDATA 33
1
SB_PWRBTN# P13/PW3 PA3/KIN11#/PS2AD

16 SB_PWRBTN# 107 P14/PW4 PA4/KIN12#/PS2BC 37 1 8
16 SB_RSMRST# 1 13 WIRELESS_BTN# 106 P15/PW5 PA5/KIN13#/PS2BD 35 2 7
1
D44 105 34 3 6
3
BAT54PT-GP 3SB_RSMRST#_KBC
13
30,36
BT_BTN#
S5_EN S5_EN 104
P16/PW6
P17/PW7
PA6/KIN14#/PS2CC
PA7/KIN15#/PS2CD 33 4 5 EC35
SCD1U16V2ZY-2GP
DY 3
2
2 AD_OFF 103 120 CRT_IN# 14 SRN10KJ-4-GP
44 AD_OFF P20 PB0/WUE0#/LSMI ECSCI#_KBC
102 P21 PB1/WUE1#/LSCI 119
101 P22 PB2/WUE2# 118
3D3V_AUX_S5 100 117 EC_PWRBTN#
P23 PB3/WUE3# EC_PWRBTN# 13
42 CHG_4D35V# 99 P24 PB4/WUE4# 116 PM_SLP_S5# 16,41,43
98 P25 PB5/WUE5# 115
2
97 P26 PB6/WUE6# 114 BATA_IN# 42,44

R606 USB_EN# 96 113 PCIE_WAKE# PCIE_WAKE# 16,22,30
21 USB_EN# P27 PB7/WUE7#
100KR2J-1-GP
1
LPC_LAD0 121 94 KCOL1 C541 050510:For
DY LPC_LAD1 122
P30/LAD0 PC0
93 KCOL2
RE 144B
1
1 R44 2 KBC_BB_EN# LPC_LAD2 123

P31/LAD1 PC1
92 KCOL3 SC100P50V2JN-3GP Battery switch
2
0R2J-2-GP LPC_LAD3 P32/LAD2 PC2 KCOL4
124 P33/LAD3 PC3 91 fail issue
LPC_LFRAME# 125 90 KCOL5
PLT_RST1# P34/LFRAME# PC4 KCOL6
7,16,20,22,26,30,32,34 PLT_RST1# 126 P35/LRESET# PC5 89
127 88 KCOL7 1 ECSCI# 16
3 PCLK_KBC P36/LCLK PC6 KCOL8 D40
16,25,30,32,35 INT_SERIRQ 128 P37/SERIRQ PC7 87
1
ECSCI#_KBC 3 BAT54PT-GP
29 AMP_SHUTDOWN 136 66 KCOL9
R501 KBC_BEEP P40/TMCI0 PD0 KCOL10
137 65 2
100R2J-2-GP DY 28 KBC_BEEP
KBC_SDA 138
P41/TMO0
P42/TMRI0/SDA1
PD1
PD2 64 KCOL11
PCLK_KBC_RC 26,30 RF_ON/OFF# RF_ON/OFF# 2 63 KCOL12 1 ECSWI# 16
1 2
BRIGHTNESS P43/TMCI1 PD3 KCOL13 D14

13 BRIGHTNESS 3 P44/TMO1 PD4 62
13 BLON_OUT BLON_OUT 4 61 KCOL14 ECSWI#_KBC 3 BAT54PT-GP
C545 BLON_IN P45/TMRI1 PD5 KCOL15
5 60
DY P46 PD6
1
SC10P50V2JN-4GP KBC_BB_EN# 6 59 KCOL16 2

2
R523 P47 PD7

2M2R3-GP DY KROW1 78 P60/FTCI/KIN0#/TMIX PE0 32
2 KROW2 2
79 P61/FTOA/KIN1# PE1 31
KROW3 80 30
2
KROW4 P62/FTIA/KIN2#/TMIY PE2

81 P63/FTIB/KIN3# PE3 29
P86/IRQ5#/SCK1/SCL1
KROW5 82 28 KBC_MATRIX0 KBC_3D3V_AUX
P64/FTIC/KIN4# PE4 KBC_MATRIX0 33
KROW6 83
P52/EXSCK1/SCL0
27 KBC_MATRIX1 KBC_MATRIX1 33 RN93
7 L_BKLTEN R522 BLON_IN KROW7 P65/FTID/KIN5# PE5 BATA_SDA
P85/IRQ4#/RXD1
2 1 84 26 1 4
P84/IRQ3#/TXD1
0R2J-2-GP KROW8 P66/FTOB/KIN6#/IRQ6# PE6 NAPA_U_V BATA_SCL
P82/CLKRUN#
85 P67/TMOX/KIN7#/IRQ7# PE7 25 2 3
P51/EXRXD1
P83/LPCPD#
P50/EXTXD1
3D3V_S0
P90/IRQ2#
P91/IRQ1#
P92/IRQ0#
P80/PME#
SRN10KJ-5-GP
P96/EXCL
P97/SDA0
RN90
P81/GA20
1 8 INTERNET#
2 7 KCOL[1..16] 33
VSS
VSS
VSS
VSS
VSS
VSS
NMI
P70
P71
P72
P73
P74
P75
P76
P77
P93
P94
P95
3 6 KBC_3D3V_AUX
KROW[1..8] 33
4 5
5V_S0 3D3V_S0 71.00144.B0G RE144B-GP KBC_AC_IN# 1 R520
2
68
69
70
71
72
73
74
75
16
15
14
129
130
131
132
133
134
135
24
23
22
21
20
19
18
17
11
7
42
67
95
111
139
SRN10KJ-4-GP 10KR2J-3-GP
KBC_3D3V_AUX RN92
KBC_MATRIX0 1 4
KBC_MATRIX1 2 3
4
3
4
3
13 MAIL# MAIL# SRN10KJ-5-GP 3D3V_S5

RN95 RN96 13 EBUTTON# EBUTTON# RN42 3D3V_S0
SRN10KJ-5-GP SRN10KJ-5-GP 13 PROGRAM# PROGRAM# KBC_NMI PCIE_WAKE# 1 4
K_A20GATE 2 3
BATA_SDA 44
BLUETOOTH_LED 13 SRN10KJ-5-GP
1
2
1
2
1
G
44 BATA_SCL WLAN_TEST_LED 26
Q39 ECSWI#_KBC H_RCIN# 15
1
KBC_SCL 3 2 2N7002-8-GP SMBC_KBC 19 15 K_A20GATE PM_SLP_S3# 16,18,30,36,41,43 <Variant Name> 1
LID_CLOSE# LID_CLOSE# 33
16,22,25,30,32,35 PM_CLKRUN#
1
-1
D
Q41 16,32 PM_SUS_STAT# H8_TXD1 D42

FIR 1
Wistron Corporation
KBC_SDA 3 2 2N7002-8-GP SMBD_KBC 19
H8_RXD1
SRN0J-4-GP RN109 KBC_SCL KBC_AC_IN# 3 AC_IN# 42 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
LPC_LAD0_1 LPC_LAD0 Taipei Hsien 221, Taiwan, R.O.C.
D
32,34 LPC_LAD0_1 1 8
32,34 LPC_LAD1_1 LPC_LAD1_1 2 7 LPC_LAD1 2
LPC_LAD[0..3] 15
32,34 LPC_LAD2_1 LPC_LAD2_1 3 6 LPC_LAD2 Title
LPC_LAD3_1 4 5 LPC_LAD3
32,34 LPC_LAD3_1 BAT54PT-GP KBC_H8S/RE144B
32,34 LPC_LFRAME#_1 LPC_LFRAME#_1 1 R698 2 LPC_LFRAME# LPC_LFRAME# 15 Size Document Number Rev
0R2J-2-GP A3
FIR AG1 -1
Date: Wednesday, March 08, 2006 Sheet 31 of 45
A B C D E
5 4 3 2 1
LPC_LAD0_1 LPC_LAD0_1 31,34

-1
LPC_LDRQ0# 15
PLT_RST1# 7,16,20,22,26,30,31,34
INT_SERIRQ 16,25,30,31,35
LPC_LFRAME#_1 31,34
3D3V_S0
CLK14_SIO 3 -1
D D
1
PCLK_SIO 3
C39 C54 C41
1
SC1U10V3ZY-6GP SCD1U16V2ZY-2GPSCD1U16V2ZY-2GP
2
R37 R38
24
35
32
36
38
40
16
27
28
30
43
25
8
U5 DUMMY-R2
FIR FIR FIR
LCLK
LAD0
LAD1
LAD2
LAD3
LDRQ#/XOR_OUT
LRESET#
SERIRQ
LFRAME#
VDD
VDD
VDD
CLKIN
DUMMY-R2 C57
2
PCLK_SIO_RC
2 1
1 42 C58
CTS1# NC#42
44 DCD1# NC#33 33
45 37 DUMMY-C2 CLK14_SIO_RC 2 1
DSR1# NC#37
3 RI1# NC#39 39
VCORF
46
10
BADRR_STRAP 2
SIN1
VCORF SIO PC87381 NC#41
NC#4
41
4 DUMMY-C2
IRRX2_IRSL0/GPIO17
DTR1#_BOUT1/BADDR NC#18 18
1
C686
RESERVED/GPO24
47 26
CLKRUN#/GPIO22
RTS1#/TRIS# NC#26
1
SCD1U16V2ZY-2GP 48 29
GPIO21/LPCPD#
R651 SOUT1/TEST# NC#29
31
2
10KR2J-3-GP NC#31
GPIO00
GPIO01
GPIO02
GPIO03
GPIO04
GPIO20
GPIO23
FIR
IRRX1
IRTX
VSS
VSS
VSS
FIR PC87381-VBH-GP
71.87381.A0G
11
12
13
14
15
17
21
19
22
20
5
7
6
9
23
34
Connecting a 10 K external pull-down resistor
C C
makes the base address sample low, setting the
Index-Data pair at 2Eh-2Fh.
IRRX1
IRSL0
IRTX
FIR
3D3V_S0 PM_CLKRUN# 16,22,25,30,31,35

R652
1 2 LPCPD# 1 2 PM_SUS_STAT# 16,31
R25 DUMMY-R2
10KR2J-3-GP
FIR
B B
VISHAY FIR/CIR Module Layout Guide:

(1) FIR_3D3V : 30 mils,
(2) C583, C581 close
Place C581 to U32
,C583 near Pin1
3D3V_S0 U65
and Pin6
SCD1U16V2ZY-2GP
1 VCC2/IRED_ANODE
SC10U10V5ZY-1GP
2
SCD1U16V2ZY-2GP
IRED_CATHODE
1
C342 C345 C344 IRTX 3

IRRX1 TXD
A 4 RXD <Variant Name> A
IRSL0 5
2
SD
6 VCC1
7
FIR FIR FIR 8
MODE
GND
Wistron Corporation
G33 FIR-TFDU6102-GP 56.15001.051
1 2 Title
IR_GND
GAP-CLOSE FIR SIO 87392 / FIR
IR_GND Size Document Number Rev
A3
AG1 -1
5 4 3 2 1
Internal KeyBoard Connector
31 KROW[1..8]
31 KCOL[1..16]
KB1
SW1 ON 26
PSW_CLR# NC#26 KROW1
16 PSW_CLR# 1 5 C01 1
2 6 2 KROW2
C02 KROW3
31 KBC_MATRIX0 3 7 C03 3
4 8 4 KCOL1
31 KBC_MATRIX1 R01 KCOL2
R02 5
SW-DIP-4-2-U2-GP 6 KCOL3
R03 KROW4
C04 7
8 KCOL4
R04 KCOL5
R05 9
10 KCOL6
R06 KCOL7
R07 11
12 KCOL8
R08 KCOL9
Keyboard matrix ( from vendor ) R09 13
14 KROW5
C05 KCOL10
R10 15
US Eur Jap Ohter 16 KROW6
C06 KROW7
C07 17
18 KCOL11
R11 KCOL12
R12 19
MATRIXID0# 1 0 1 0 20 KROW8
C08 KCOL13
R13 21
22 KCOL14
R14 KCOL15
MATRIXID1# 1 1 0 0 R15 23
24 KCOL16
R16
NC#25 25
NC#27 27
ACES-CON25-GP
20.K0197.025
Low Active
COVER SWITCH PSW_CLR# 1 - 5 ON
2nd source: 20.K0198.025
KBC_BB_EN# 2 - 6 ON
3D3V_AUX_S5
KBC_MATRIX1 3 - 7 ON
K/B
2
KBC_MATRIX2 4 - 8 ON
R5
100KR2J-1-GP 1 25
CVR1
1
R4
4 2 1 2 LID_CLOSE# 31 5V_S0
TOUCH PAD
1
3 1 100R2F-L1-GP-U
C7
SC1KP16V2KX-GP
2
PUSH-SW81-GP 5V_S0
2
1
62.40014.141
RN89
SRN10KJ-5-GP
1
EC33
C527
SC1U10V3KX-3GP TPAD1
3
4
2
14
12
RN88 11
31 TDATA 1 4 TP_DATA 10
31 TCLK 2 3 TP_CLK 9
SRN33J-5-GP-U 8
7
SCROLL KEY TP_SCROLL_RIGHT
TP_SCROLL_UP
TP_SCROLL_DOWN
6
5
4
TP_LEFT 3
TP_RIGHT 2
TP_SCROLL_UP
1 SCRL1 2 TP_SCROLL_LEFT 1
13
5
ACES-CON12-GP
3 4 20.K0174.012
SW-TACT-59-GP-U1 2nd source: 20.K0185.012
8
7
6
5
8
7
6
5
62.40009.431
ERC3 ERC4
TP_LEFT TP_SCROLL_LEFT TP_SCROLL_RIGHT TP_RIGHT 3D3V_AUX_S5 SRC100P50V-2-GP SRC100P50V-2-GP
1 LEFT1 2 1 SCRL2 2 1 SCRL3 2 1 RIGHT1 2 77.61012.02L
DY
1
2
3
4
1
2
3
4
5 5 5 5
2
2
R504
3 4
SW-TACT-59-GP-U1
3 4
SW-TACT-59-GP-U1
3 4
SW-TACT-59-GP-U1
3 4
SW-TACT-59-GP-U1 100KR2J-1-GP R503 R502
Planar
DY 100KR2J-1-GP 100KR2J-1-GP ID(2,1,0)
62.40009.431 62.40009.431 62.40009.431 62.40009.431 DY DY
1
TP_SCROLL_DOWN
SA: 0,0,0 <Variant Name>
1
1 SCRL4 2 31 PLANARID2
PLANARID2 1
PLANARID1
5
31 PLANARID1 PLANARID0
SB: 0,0,1
31 PLANARID0
SC: 0,1,0 Wistron Corporation
2
3 4 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

SW-TACT-59-GP-U1 R505 R181 R177 Taipei Hsien 221, Taiwan, R.O.C.
2nd source: 62.40009.341 100KR2J-1-GP 100KR2J-1-GP 100KR2J-1-GP
SD: 0,1,1
62.40009.431 Title
KEYBOARD/TOUCHPAD
1

A3
AG1 -1
A B C D E
4
GOLDEN FINGER FOR DEBUG BOARD 4
5V_S0 5V_S0
U75
A1 A1 B1 B1
PLT_RST1# A2 B2 PLT_RST1#
7,16,20,22,26,30,31,32 PLT_RST1# LPC_LFRAME#_1 A2 B2 LPC_LFRAME#_1
31,32 LPC_LFRAME#_1 A3 A3 B3 B3
A4 A4 B4 B4
PCLK_FWH A5 B5 PCLK_FWH
3 PCLK_FWH A5 B5
A6 A6 B6 B6
FWH_INIT# A7 B7 FWH_INIT#
15 FWH_INIT# A7 B7
A8 A8 B8 B8
31,32 LPC_LAD3_1 LPC_LAD3_1 A9 B9 LPC_LAD3_1
LPC_LAD2_1 A9 B9 LPC_LAD2_1
31,32 LPC_LAD2_1 A10 A10 B10 B10
31,32 LPC_LAD1_1 LPC_LAD1_1 A11 B11 LPC_LAD1_1
LPC_LAD0_1 A11 B11 LPC_LAD0_1
31,32 LPC_LAD0_1 A12 A12 B12 B12
EXT_FWH# A13 B13 EXT_FWH#
16 EXT_FWH# A13 B13
A14 A14 B14 B14
3D3V_S0 A15 B15
A15 B15 3D3V_S0
-1
FOX-GF30
ZZ.GF030.XXX
3 3
Boot Device must have ID[3:0] = 0000
Has internal pull-down resistors
All may be left floated
FPET7 Elec. P3-46
SPI FLASH ROM

8M Bits
3D3V_S0
2
R278 SPI
TOP VIEW
10KR2J-3-GP U41 3D3V_S5
SPI_CS# 1 8
16 SPI_CS#
1
SPI_MISO CE# VDD SPI_HOLD#

16 SPI_MISO 2 SO HOLD# 7 1 R282 2 3D3V_S5
SPI_WP# SPI_CLK 10KR2J-3-GP
2 16 SPI_WP# 3 WP# SCK 6
SPI_MOSI
SPI_CLK 16 A15 (B1) 2
4 VSS SI 5 SPI_MOSI 16
A14 (B2)
SST25LF080A-1GP
....
72.25080.E01
....
A2 (B14)
SOIC 200 Socket P/N: A1 (B15)
Wieson: 62.10076.001
SPI ROM:
SST25LF080A: 72.25080.E01 (BOTTOM VIEW)
SST25VF080B : 72.25080.G01
ST M25P80: 72.25P80.001
1 <Variant Name> 1
Wistron Corporation
Title
BIOS : SPI
A3
AG1 -1
A B C D E
5 4 3 2 1
3D3V_S0 3D3V_S0 CBB_D[0..15] 24,25,27

CBB_A[0..25] 24,25,27
1
1
1
R653
D C687
SC1000P50V3JN-GP
C688
SCD1U16V2ZY-2GP
C689
SCD1U16V2ZY-2GP
4K7R2J-2-GP
RN106
3D3V_S0 D
No TIPCI
2
2
CB_MFUNC5 1 8
2
CB1410_GBRST# CB_MFUNC4 2 7
No TIPCI
No TIPCI No TIPCI 3 6
1
CB_MFUNC2 4 5
3D3V_S0 C693
3D3V_S0 SCD1U16V2ZY-2GP
2
No TIPCI SRN10KJ-4-GP
VCC_ASKT_S0 No TIPCI
3D3V_S0
1
1
C690 C691 C692
SC1000P50V3JN-GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP
2
1
C694 C695
4
3
2
1
SC1000P50V3JN-GP SCD1U16V2ZY-2GP
No TIPCI
No TIPCI No TIPCI
2
No TIPCI No TIPCI
SRN47KJ-L1-GP
114
130
102
122
138
126
U73
18
30
44
50
22
42
58
78
94
14
66
86
63
90
6
RN107
16,22,24,25,30 PCI_AD[0..31]
PCI_AD31 3 125 CBB_REG#
PCI_VCC
PCI_VCC
PCI_VCC
PCI_VCC
GND
GND
GND
GND
GND
GND
GND
GND
GRST# CORE_VCC
CORE_VCC
CORE_VCC
CORE_VCC
CORE_VCC
CORE_VCC
AUX_VCC
SOCKET_VCC
SOCKET_VCC
CBB_REG# 24,27
5
6
7
8
PCI_AD30 AD31 REG#/CCBE3# CBB_A25
PCI_AD29
4 AD30 A25/CAD19 116
CBB_A24
CBB_A25 24,27
CBB_RESET
No TIPCI
5 AD29 A24/CAD17 113 CBB_A24 24,27
PCI_AD28 7 111 CBB_A23 CBB_A23 25,27 CBB_OE#
PCI_AD27 AD28 A23/CFRAME# CBB_A22 CBB_CE2#
8 AD27 A22/CTRDY# 109 CBB_A22 25,27
PCI_AD26 9 107 CBB_A21 CBB_A21 25,27 CBB_CE1#
PCI_AD25 AD26 A21/CDEVSEL# CBB_A20
10 AD25 A20/CSTOP# 105 CBB_A20 25,27
PCI_AD24 11 103 CBB_A19 CBB_A19 25,27
AD24 A19/CBLOCK#
C PCI_AD23
PCI_AD22
15
16
AD23 A18/RFU 100
98
CBB_A18
CBB_A17
CBB_A18 25,27
CBB_A17 24,27
C
PCI_AD21 AD22 A17/CAD16 A_CCLKXX
17 AD21 A16/CCLK# 108 1 2 33R2J-2-GP CBB_A16 25,27
PCI_AD20 19 110 CBB_A15 CBB_A15 25,27 R654
PCI_AD19 AD20 A15/CIRDY# CBB_A14
23 AD19 A14/CPERR# 104 No TIPCI
CBB_A14 25,27
PCI_AD18 24 101 CBB_A13 CBB_A13 24,27
PCI_AD17 AD18 A13/CPAR CBB_A12
25 AD17 A12/CCBE2# 112 CBB_A12 24,27
PCI_AD16 26 95 CBB_A11 CBB_A11 24,27
PCI_AD15 AD16 A11/CAD12 CBB_A10
38 AD15 A10/CAD9 89 CBB_A10 24,27
PCI_AD14 39 97 CBB_A9 CBB_A9 24,27
40 AD13 A8/CCBE1# 99 CBB_A8 24,27
PCI_AD12 41 115 CBB_A7 CBB_A7 24,27
43 AD11 A6/CAD20 118 CBB_A6 24,27
PCI_AD10 45 120 CBB_A5 CBB_A5 24,27
46 AD9 A4/CAD22 121 CBB_A4 24,27
PCI_AD8 47 124 CBB_A3 CBB_A3 24,27
49 AD7 A2/CAD24 127 CBB_A2 24,27
PCI_AD6 51 128 CBB_A1 CBB_A1 24,27
52 AD5 A0/CAD26 129 CBB_A0 24,27
PCI_AD4 53 87 CBB_D15 CBB_D15 24,27
PCI_AD3 AD4 D15/CAD8 CBB_D14
54 AD3 D14/RFU 84 CBB_D14 25,27
PCI_AD2 55 82 CBB_D13 CBB_D13 24,27
PCI_AD1 AD2 D13/CAD6 CBB_D12
56 AD1 D12/CAD4 80 CBB_D12 24,27
PCI_AD0 57 77 CBB_D11 CBB_D11 24,27
AD0 D11/CAD2 CBB_D10
D10/CAD31 144 CBB_D10 24,27
PCI_C/BE#3 12 142 CBB_D9 CBB_D9 24,27
16,22,24,30 PCI_C/BE#3 C_BE3# D9/CAD30
PCI_C/BE#2 27 140 CBB_D8 CBB_D8 24,27
16,22,24,30 PCI_C/BE#2 C_BE2# D8/CAD28
PCI_C/BE#1 37 85 CBB_D7 CBB_D7 24,27
16,22,24,30 PCI_C/BE#1 C_BE1# D7/CAD7
PCI_C/BE#0 48 83 CBB_D6 CBB_D6 24,27
16,22,24,30 PCI_C/BE#0 C_BE0# D6/CAD5
28 81 CBB_D5
B 16,22,25,30 PCI_FRAME#
16,22,25,30 PCI_IRDY# 29
FRAME#
IRDY#
D5/CAD3
D4/CAD1 79 CBB_D4
CBB_D5 24,27
VCC_ASKT_S0
CBB_D4 24,27
B
31 76 CBB_D3 CBB_D3 24,27
16,22,25,30 PCI_TRDY# TRDY# D3/CAD0
16,22,25,30 PCI_STOP# 33 STOP# D2/RFU 143 CBB_D2 25,27
1
PCI_AD25 1 R655 2 CARD_IDSEL 13 141 CBB_D1 CBB_D1 24,27
100R2F-L1-GP-U IDSEL D1/CAD29 CBB_D0 R656
16,22,25,30 PCI_DEVSEL# 32 DEVSEL# D0/CAD27 139 CBB_D0 24,27
34 92 CBB_OE# 10KR2J-3-GP
No16,22,25,30
TIPCI PCI_PERR# PERR# OE#/CAD11 CBB_OE# 24,27
16,22,25,30 PCI_SERR# 35 SERR# WE#/CGNT# 106 CBB_WE# 25,27
36 93 CBB_IORD# CBB_IORD# 24,27
16,22,24,30 PCI_PAR
2
PAR IORD#/CAD13 CBB_IOWR#
3 PCLK_PCM_ENE 21 PCI_CLK IOW#/CAD15 96 CBB_IOWR# 24,27
16,22,25,27,30 PCIRST1# 20 RST# WP/IOIS16/CCLKRUN# 136 CBB_WP 25,27
1
59 RI_OUT#/PME# INPACK#/CREQ# 123 CBB_INPACK# No

25,27TIPCI
R657 TP104
16,25 PCI_GNT#0 2 132 CBB_RDY 25,27
GNT# RDY_IREQ#/CINT#
VCCD0#/SMBDATA/SDATA
10R2J-2-GP 1 133
16,25 PCI_REQ#0 REQ# WAIT#/CSERR# CBB_WAIT# 25,27
VCCD1#/SMBCLK/SCLK
No TIPCI CD2/CCD2# 137 CBB_CD2# 25,27

No TIPCI 75 CBB_CD1# 25,27
CLK33_PCM12
CD1/CCD1# CBB_CE2#
CE2/CAD10 91 CBB_CE2# 24,27
1
88 CBB_CE1# CBB_CE1# 24,27

VPPD0/SLATCH
C696 CE1#/CCBE0#
RESET/CRST# 119 CBB_RESET 25,27
SPKR_OUT#
SC22P50V2JN-4GP 134 CBB_BVD2# 25,27

2
BVD2/SPKR/LED/AUDIO
SUSPEND
BVD1/STSCHG/RI/CSTSCHG 135 CBB_BVD1# 25,27

117
O2MF6
O2MF5
O2MF4
O2MF3
O2MF2
O2MF1
O2MF0
VPPD1
VS2/CVS2 CBB_VS2# 25,27

No TIPCI No TIPCI VS1/CVS1 131 CBB_VS1# 25,27
1
C697
SC10P50V2JN-4GP Y CB-1410-U -1M
2
74
73
72
71
CBUS_SUSPEND70
69
68
67
65
64
61
60
62
No TIPCI
Close to U73
PCI_SPKR 25,28 <Variant Name>
RC13 1 2 43KR3-GP
A 27
27
VCCD1#
VCCD0# DY INT_PIRQG# 16,25 A
1
27
27
VPPD1
VPPD0
CB_MFUNC2
INT_PIRQB# 16,25
R700 Wistron Corporation
1 2 47KR2J-2-GP 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
3D3V_S0 INT_SERIRQ 16,25,30,31,32
R658 10KR2J-3-GP CB_MFUNC4 Taipei Hsien 221, Taiwan, R.O.C.
CB_MFUNC5
No TIPCI
2
Title
CardBus_ENE CB1410
PM_CLKRUN# 16,22,25,30,31,32 Size Document Number Rev
A3
AG1 -1
Date: Thursday, January 19, 2006 Sheet 35 of 45
1D05V_S0
Aux Power
1
R609
3D3V_AUX_S5 56R2J-4-GP
2
1
PM_THRMTRIP-I# 4
R524
E
100KR2J-1-GP
1 R610 2 B CHT2222APT-GP
5V_AUX_S5 4,15 H_PWRGD 1KR2J-1-GP Q48
1
DCBATOUT
SCD1U10V2KX-4GP
100mA DY
C
1 2 C43 SHUTDOWN_S5 1 R525 2S5_EN_3 C652
SCD1U16V2ZY-2GP 1KR2J-1-GP
2
U6 DY Q40 B 1
1
1
1 8 CHT2222APT-GP D41
C45 C44 OUTPUT INPUT BAT54PT-GP 3
2 7 PURE_HW_SHUTDOWN# 19,31
E
SENSE FEEDBACK
1
SCD1U16V2ZY-2GP
SC10U10V6ZY-U AUX_SD 3 6
2
2
SHUTDOWN VO TAP C392
DY 4 GND 2
2
5 SC1U50V5ZY-1-GP
2
R32 ERROR# OUTPUT DY
0R2J-2-GP S5_EN_21 R519
2 S5_EN 30,31
74.02951.F31 10KR2J-3-GP
LP2951CDR2G-GP
1
*Layout*
1
C561
2
15 mil
T(soft)=1.736ms
TPS51120_EN1_5 TPS51120_EN1_5 40
1
C286
3D3V_AUX_S5 SC4700P50V2KX-1GP
2
3
D
1
5V_AUX_S5 I max = 120 mA SHUTDOWN_S5 1 Q18
1
R39 G 2N7002-8-GP
1
U10 BC2 36K5R3F-2-GP
R1 S
2
SC22P50V3JN-GP R238
2
1 5 1MR2J-1-GP
1 2
SHDN# SET
2 GND
3 4
2
IN OUT R40
22KR2J-GP R2
1
G913CF-GP
BC1 BC3 Vout = 1.25*(1+ R1/R2) T(soft)=1.736ms
2
SC1U10V3ZY-6GP SC1U10V3ZY-6GP
74.00913.A3F
2
TPS51120_EN2_3D3 TPS51120_EN2_3D3 40
3
D
1
1 Q6
G 2N7002-8-GP C289
S SC4700P50V2KX-1GP
2
Run Power
5V_S0 5V_S5
U37
DCBATOUT Q19 S D
1 8
TP0610K-T1-GP 2 S D 7
3 S D 6
R233 Z_12V RUN_PWR_CTLR G D
S
1 2 2 3 4 5
D
10KR2J-3-GP
1
AO4422-1-GP
84.00610.C31 C588 R241 D20 84.04422.B37
1
200KR3J-GP 3D3V_S0 3D3V_S5

SCD1U25V3ZY-1GP
RLZ12B-1-GP
G
U33
1
2 1 1 S D 8
2
R230 330KR3J-L-GP R659 2 S D 7

47KR2J-2-GP 3 S D 6
1
4 G D 5 <Variant Name>
R231
2
Q20 100KR2J-1-GP AO4422-1-GP

GND 2
Wistron Corporation
3
D
2
3 OUT 1 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

R2 Q50 Taipei Hsien 221, Taiwan, R.O.C.
R1 G
IN 1 S 2N7002-8-GP
2
16,18,30,31,41,43 PM_SLP_S3# 84.27002.L04 Title
84.00124.F1K RUN and AUX POWER

CHDTC124EU-1GP Size Document Number Rev
A3
AG1 -1
A B C D E
MAX8743
CPU_CORE 1D8V/1D05V
Intersil ISL6262
Input Power Output Power
5V_S5
VCC
VID Setting Output Signal 1D8V_S0 (7A)
4 H_VID0 1D8V (O) 4
VID0(I / 1.05V) 6262_PWRGOOD
H_VID1 PGOOD(OD / 3.3V) DCBATOUT_TPS51124
VID1(I / 1.05V) VIN
H_VID2 CLK_EN# 1D05V_S0 (7A)
VID2(I / 1.05V) CLK_EN#(O) 1D05V(O)
H_VID3
VID3(I / 1.05V)
H_VID4 Input Signal
VID4(I / 1.05V)
H_VID5 MAX8743_ON1
VID5(I / 1.05V) Output Power EN1
H_VID6
VID6(I / 1.05V) VCC_CORE_S0(Imax=48A) MAX8743_ON2
VCC_CORE_PWR(O) EN2
Input Signal
PSI#
PSI# (I / 3.3V) Output Signal
CPUCORE_ON CPUCORE_ON
PGD_IN (I / 3.3V) PGOOD1
PM_DPRSLPVR
DPRSLPVR (I / 3.3V)
H_DPRSTP#
DPRSTP# (I / 3.3V)
Voltage Sense
3 VCC_SENSE 3
VSEN(I / Vcore)
VSS_SENSE Charger Max8725
RTN(I / Vcore)
Input Signal Output Signal

Input Power
CHGON#/OFF BT+SENSE
DCBATOUT_6262 ICTL BATT
VCC(I)
BT_TH AC_IN
5V_S0 PKPRES ACOK
VCC(I)
3D3V_S0
VCC(I) Input Power Output Power
AD+ BT+
ACIN VOUT (O)
DCBATOUT
VOUT (O)
2 TPS51120 2
5V/3D3V
PGOOD1(OD / 5V) CPUCORE_ON
PGOOD2(OD / 5V) CPUCORE_ON

TPS51120_EN1_5
EN1
Output Power
TPS51120_EN2_3D3
EN2
Adapter
5V_DC_S5 (6A)
5V(O)
AD_OFF AD_IN
3D3V_DC_S5 (5A) (I) (O)
3D3V(O)
Input Power
1 <Variant Name> 1
Input Power Output Power
DCBATOUT_TPS51120
VIN AD_JK AD+
VCC(I) VCC(O) Wistron Corporation
5V_AUX_S5 Taipei Hsien 221, Taiwan, R.O.C.
VCC(I)
Title
Power Block Diagram
A3 -1
AG1
A B C D E
5 4 3 2 1
G47
DCBATOUT_6262 3D3V_S0 1 2
5V_S5 5V_S0
GAP-CLOSE-PWR
1
PGOOD G46
1
R97 1 2
Power good open-drain output.
1
R664 R111 10R3J-3-GP
10R3J-3-GP R88 Will be pulled up externally by GAP-CLOSE-PWR
0R3-0-U-GP 1K91R3F-GP G45
a 680. resistor to VCCP or 1.9k. to 3.3V.
2
1 2
2
1
6262_AGND
DY C119 GAP-CLOSE-PWR
SC 1 R432 2 G44
VGATE_PWRGD 7,16
SCD01U25V2KX-3GP 0R0402-PAD 1 2
DCBATOUT DCBATOUT_6262
2
D D
1
C124 GAP-CLOSE-PWR
PWRGD for NB and SB G48
22
20
48
1
SC1U10V3KX-3GP 1 2
3V3
VCC
VIN
PGOOD
GAP-CLOSE-PWR
G49
1 2
21 35 6262_UGATE1 39
GND UGATE1 GAP-CLOSE-PWR
49 GND_T BOOT1 36 6262_BOOT1 1 R133
2 G50
1
0R3-0-U-GP 1 2
C145
6262_AGND SCD22U25V3ZY-GP GAP-CLOSE-PWR
2
G51
34 6262_PHASE1 39 1 2
PHASE1
4 PSI# 1 R431 2 6262_PSI# 2 PSI#
0R0402-PAD 32 6262_LGATE1 39 GAP-CLOSE-PWR
CPUCORE_ON LGATE1
1 R430 2 6262_PGD_IN3
PGD_IN
R136 3K65R3F-GP
0R0402-PAD 33 6262_VSUM 1 2
6262_RBIAS 4 PGND1
Place close to phase 1 chocke 6262_AGND 1
R426
2
147KR2F-GP RBIAS
24 6262_ISEN1 1 2
ISEN1 6262_ISENP1 39
2
5 R137
4 CPU_PROCHOT# VR_TT#
1
8/24 5V_S5 R135 10KR3F-L-GP
R469 1 2 4K02R3F-GP 1 R468 6262_NTC R665 1 SCD22U10V3KX-2GP 0R2J-2-GP
C99
2
C98
6 NTC DY 2
0R3-0-U-GP
SC
5V_S0 C142 DY
2
6262_AGND 1 2 NTC-470K-1-GP 6262_AGND 1 2 6262_SOFT7 1 2 6262_ISENN1 39
1
SCD01U16V2KX-3GP SCD033U25V3KX-GP SOFT
8/15 470K /0402 size 31 1 2 R134 1R3F-GP
H_VID0 PVCC
C 1 R129 2 6262_VID0 37 VID0
C
0R0402-PAD C144 SC4D7U6D3V3KX-GP
H_VID1 1 R130 6262_VID1 6262_UGATE2 39
If NTC=330Kohm, R10=8.66K 2
0R0402-PAD
38 VID1 UGATE2 27
H_VID2 1 R124 2 6262_VID2 39 26 6262_BOOT2 1 R132

2
0R0402-PAD VID2 BOOT2 0R3-0-U-GP
5 H_VID[0..6]
1
H_VID3 1 R121 2 6262_VID3 40
0R0402-PAD VID3 C143
H_VID4 1 R110 2 6262_VID4 41 SCD22U25V3ZY-GP
2
0R0402-PAD VID4 6262_PHASE2 39
PHASE2 28
H_VID5 1 R109 2 6262_VID5 42 3K65R3F-GP
VID5 6262_LGATE2 39 R128
0R0402-PAD 30
H_VID6 LGATE2
1 R106 2 6262_VID6 43 VID6
6262_VSUM 1 2
0R0402-PAD 29
PGND2
40,41,43 CPUCORE_ON 1 R99 2 6262_CORE_ON 44 VR_ON
0R0402-PAD 23 6262_ISEN2 1 2
ISEN2 6262_ISENP2 39
16 PM_DPRSLPVR 1 R96 2 6262_DPRSLP 45 DPRSLPVR
2
0R0402-PAD R131 10KR3F-L-GP
1
4,15 H_DPRSLP# 1 R95 2 6262_DPRSTP# 46 DPRSTP#
C138 R126
0R0402-PAD 0R2J-2-GP
1 R89 2 6262_CLKEN# 47 SCD22U10V3KX-2GP DY
2
3 CLK_EN# 0R0402-PAD CLK_EN#
1 2 6262_ISENN2 39
1
25 6262_AGND C97 1 2 SC1000P50V3JN-GP
R76 1K82R3F-GP NC R125 1R3F-GP
1 2
OCSET 8 6262_OCSET 1 R78 2 OCP>=88A
1 2 1 2 6262_VDIFF 13
R79 1K4R3F-1-GP C107 SC470P50V2KX-3GP VDIFF 18K7R3F-1-GP
19 6262_VSUM
B VSUM B
R83
1
DY
SCD1U16V3KX-3GP
1 2 6262_FB212 R107
FB2 2K61R3F-GP
SCD1U16V3KX-3GP
1
2KR2-GP
1
6262_FB 11
1 2
FB C121 C122 R115
1 2 1 2 C94 11KR2F-L-GP
2
R71 61K9R2F-GP SCD033U16V3KX-GP R467
2
NTC-10K-9-GP
1 2 6262_COMP10 ISL6262CRZ-T-GPU 8/24
COMP
1 2 SB -1
2
C93 SC390P50V3JN-GP R81 3K57R3F-L-GP
VO 18 6262_VO
Switching Frequency=300KHz
DROOP
6262_VW 9
1 2 VW Place close to phase 1 chocke
1
VSEN
RTN
DFB
1
C103 SC5600P50V3KX-GP R94
1KR3F-GP C129
PL 74.06262.073 U17 SCD22U10V2KX-1GP
15
14
16
17
2
2
5 VSS_SENSE 1 R85 2 6262_RTN 6262_DFB

1
0R0402-PAD 6262_AGND
R91
C109
6262_DROOP
SCD01U50V3KX-4GP 1 2
2
5 VCC_SENSE 1 R80 2 6262_VSEN

0R0402-PAD 1K96R3F-2-GP G43
1
PH C113 C106
SB Not lead free 1 2
A <Variant Name> A
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
1 2 6262_VO GAP-CLOSE-PWR
2
6262_AGND
C116 SC180P-GP
-1 Wistron Corporation
6262_AGND 6262_AGND 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Title
CPU Vcore Power_1
A3 -1
8/15 AG1
Date: Tuesday, February 14, 2006 Sheet 38 of 45
5 4 3 2 1
5 4 3 2 1
DCBATOUT_6262
1
C181
C513 C161 C159
SCD1U25V3ZY-1GP
SC10U35V0ZY-1GP
SC10U35V0ZY-1GP
SC10U35V0ZY-1GP
D D
2
5
6
7
8
D
D
D
D
U18
IRF7807ZPBF-GP
G
S
S
S
SC
Panasonic ETQP4LR36WFC
4
3
2
1
10*11.5*4mm VCC_CORE_S0 Iomax=44A
0.34uH / 24A
38 6262_UGATE1 L26 DCR=1.1mohm
OCP>=88A
38 6262_PHASE1 1 2
38 6262_LGATE1 L-D36UH-1-GP
1
TC7 TC6 TC5 TC4 C506
SE330U2VDM-L2GP
SE330U2VDM-L2GP
SE330U2VDM-L2GP
SE330U2VDM-L2GP
SCD1U25V3ZY-1GP
2
5
6
7
8
5
6
7
8
2
DY
D
D
D
D
D
D
D
D
U19 U57 G53 G52
IRF7805ZPBF-GP IRF7805ZPBF-GP GAP-CLOSE-PWR GAP-CLOSE-PWR
1
G
S
S
S
G
S
S
S
C C
6262_ISENN1 38
4
3
2
1
4
3
2
1
6262_ISENP1 38
KEMET
SC 330uF / 3V / V size
ESR=9mohm / Iripple=3.7A
DCBATOUT_6262
1
C195 C149 C540 C180
SCD1U25V3ZY-1GP
SC10U35V0ZY-1GP
SC10U35V0ZY-1GP
SC10U35V0ZY-1GP
2
2
5
6
7
8
D
D
D
D
U21
IRF7807ZPBF-GP
G
S
S
S
Panasonic ETQP4LR36WFC
SC
4
3
2
1
10*11.5*4mm
B
0.34uH / 24A B
DCR=1.1mohm
38 6262_UGATE2 L29
38 6262_PHASE2 1 2
38 6262_LGATE2 L-D36UH-1-GP
1
TC3 TC2
SE330U2VDM-L2GP
SE330U2VDM-L2GP
2
2
5
6
7
8
5
6
7
8
2
D
D
D
D
D
D
D
D
U20 U60 G54 G55

IRF7805ZPBF-GP IRF7805ZPBF-GP 1 GAP-CLOSE-PWR GAP-CLOSE-PWR
1
G
S
S
S
G
S
S
S
4
3
2
1
4
3
2
1
SC When test without cpu,

R581 & R582 change to 0 ohms
8/15
38 6262_ISENP2
If VCC_SENSE and VSS_SENSE pins have pulled
A 38 6262_ISENN2 resistors to VCC_CORE_S0 <Variant Name> A
==> Remove R581/R582

Wistron Corporation
Title
CPU Vcore Power_2
A3 -1
AG1
5 4 3 2 1
A B C D E
G17
1 2 DCBATOUT_51120
GAP-CLOSE-PWR DCBATOUT_51120 G13
G21 1 2
1 2
SC10U35V0ZY-1GP
SC10U35V0ZY-1GP
GAP-CLOSE-PWR
GAP-CLOSE-PWR G32
1
G19 C620 1 2
5
6
7
8
1 2 C621 C291
D
D
D
D
U35 SCD1U25V3ZY-1GP GAP-CLOSE-PWR
2
GAP-CLOSE-PWR G14
G18 Iomax=11A 1 2
4 1 2 51120_V5FILT 4
Qg=9.8nC, GAP-CLOSE-PWR
G
S
S
S
GAP-CLOSE-PWR Rdson=20~25mohm AO4422-1-GP G12
G20 GS 10*10*4 4D7uH 1 2
R228
4
3
2
1
5V_PWR 5V_PWR 5V_S5
DCBATOUT 1 2 L40 DCR=25mohm, Isat=6A 5V Iomax=6A
51120_VREG5 1 2 51120_DRVH1 GAP-CLOSE-PWR
GAP-CLOSE-PWR 5D1R3F-GP 51120_LL1 1 2 OCP>12A G30
1
1 2
C281
IND-4D7UH-85-GP
5
6
7
8
SC1U10V3KX-3GP GAP-CLOSE-PWR
2
G31
D
D
D
D
1
U32 1 2
1
C274 51120_AGND DCBATOUT_51120 C590 R547
51120_LL2 1 2 51120_VBST2_11 R223 2 51120_VBST2 Iomax=11A AO4422-1-GP SC33P50V2JN-3GP 30KR2F-GP TC11 GAP-CLOSE-PWR
2
0R0603-PAD ST220U6D3VDM-15GP G15
DY DY
2
SCD1U50V3ZY-GP Qg=9.8nC, NEC 220uF ,V size 1 2
2
G
S
S
S
1
Rdson=19.6~24mohm
4
3
2
1
C275 C280 51120_VFB1 ESR=25mohm GAP-CLOSE-PWR
51120_LL1 1 251120_VBST1_11 R224 2 51120_VBST1 SCD1U50V3ZY-GP -1 Iripple=2.2A G16
1
0R0603-PAD 1 2
SCD1U50V3ZY-GP 51120_V5FILT 51120_DRVL1 R550
51120_VREG5 7K5R3F-GP GAP-CLOSE-PWR
SC10U10V5KX-2GP
DY
SC10U10V5KX-2GP
51120_VREG3 51120_COMP2 1 R548 2
2
1
1
0R0603-PAD
C602 C604 51120_COMP1 1 R549 2
0R0603-PAD 51120_AGND
2
3D3V_S0
19
21
28
13
20
22
7
2
3 U29 3
VREG3
VREG5
VBST1
VBST2
V5FILT
COMP2
COMP1
VIN
1
G28
R214 1 2
100KR2J-1-GP
36 TPS51120_EN1_5 1 R222 2 51120_EN1 29 EN1 LL2 15 51120_LL2 GAP-CLOSE-PWR
36 TPS51120_EN2_3D3 10R0402-PAD
2 51120_EN2 12 26 51120_LL1 G27
2
R218 0R0402-PAD EN2 LL1
10 EN3 1 2
9 EN5
30 51120_PGOOD1 1 R217 2 DCBATOUT_51120 GAP-CLOSE-PWR
PGOOD1 CPUCORE_ON 38,41,43
1 R543 2 51120_VFB2 6 VFB2 PGOOD2 11 51120_PGOOD2 10R0402-PAD
2 G29
51120_V5FILT 10R0603-PAD
2 51120_VFB1 3 VFB1
0R0402-PAD R216
3D3V_PWR 1 2 3D3V_S5
SC10U35V0ZY-1GP
R544 0R0603-PAD 25 51120_DRVL1
DRVL1
SC10U35V0ZY-1GP
5V_PWR 1 16 51120_DRVL2 GAP-CLOSE-PWR
VO1 DRVL2
1
3D3V_PWR 8 C614 G22
VO2
5
6
7
8
1
27 51120_DRVH1 U34 C613 1 2
DRVH1
D
D
D
D
51120_VREF2 4 14 51120_DRVH2 C292
2
VREF2 DRVH2 SCD1U25V3ZY-1GP GAP-CLOSE-PWR
SKIPSEL
2
TONSEL
G23
PGND1
PGND2
1
Iomax=11A 1 2
GND
GND
CS1
CS2
C591
SC1000P50V3JN-GP Qg=9.8nC,
G
S
S
S
AO4422-1-GP 3D3V Iomax=6A GAP-CLOSE-PWR
2
TPS51120RHBR-GPU1 74.51120.073 Rdson=20~25mohm G24

24
17
5
33
23
18
51120_SKIPSEL 32
31
4
3
2
1
3D3V_PWR OCP>12A 1 2
51120_AGND 51120_DRVH2 L39
51120_LL2 1 2 GAP-CLOSE-PWR
G25
51120_TONSEL 1 R215 2 51120_VREF2 IND-3D3UH-43-GP 1 2
5
6
7
8
51120_V5FILT 0R0402-PAD
2 51120_AGND GAP-CLOSE-PWR 2
D
D
D
D
1 R229 2 51120_CS1 U31
-1 G26
1
1 2
2
15KR3F-GP AO4422-1-GP C589 R545 TC10

1 2 51120_CS2 R213 Iomax=11A SC33P50V2JN-3GP 30K9R3F-GP ST220U6D3VDM-15GP GAP-CLOSE-PWR
2
0R2J-2-GP
DY DY
G
S
S
S
R227 20KR3F-GP SB Qg=9.8nC, NEC 220uF ,V size
4
3
2
1
2
Rdson=19.6~24mohm
1
51120_VFB2 ESR=25mohm
51120_DRVL2 Iripple=2.2A
-1
1
51120_AGND
R542
51120_COMP1 13K3R2F-L1-GP
DY
1
2
GND VREF2 FLOAT V5FILT R552
22KR2J-GP
1
DY 51120_AGND G81
AUTOSKIP C593 1 2
Vout=1V*(R1+R2)/R2
1 2
SKIPSEL AUTOSKIP /FAULTS PWM PWM SC390P50V3JN-GP

2
DY GAP-CLOSE-PWR
OFF C592 51120_AGND
SC1KP25V3MX-GP
2
CURRENT D-Cap
COMP N/A N/A
MODE MODE DY
For TPS51120,
51120_AGND
380k/CH1 290k/CH1 220k/CH1 180k/CH1 Vout=5V
TONSEL 590k/CH2 440k/CH2 330k/CH2 280k/CH2 51120_COMP2 1. If you use a 6.8uH inductor, the minimum ESR is 70m ohm.
1 <Variant Name> 1
2. If you use a 4.7uH inductor, the minimum ESR is 48m ohm.
1
5V
VFB1 N/A not use ADJ. R551 3. If you use a 3.3uH inductor, the minimum ESR is 34m ohm.
Fixed Output 22KR2J-GP
Vout=3.3V
Wistron Corporation
1
3.3V DY 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

VFB2 N/A not use ADJ. C595 1. If you use a 4.7uH inductor, the minimum ESR is 51m ohm. Taipei Hsien 221, Taiwan, R.O.C.
1 2
Fixed Output SC390P50V3JN-GP

2. If you use a 3.3uH inductor, the minimum ESR is 36m ohm.
2
DY Title
EN1,EN2 Switcher OFF not use Swithchr ON Switcher ON C594 3. If you use a 2.5uH inductor, the minimum ESR is 27m ohm. 5V_UP_S5/3D3V_S5/5V_S5
SC1KP25V3MX-GP
2
DY Size Document Number Rev

EN3,EN5 LDO OFF not use LDO ON VREG3 on A3 -1
AG1
51120_AGND Date: Wednesday, January 18, 2006 Sheet 40 of 45
A B C D E
DCBATOUT DCBATOUT_51124
G58 DCBATOUT_51124
1 2
GAP-CLOSE-PWR
5
6
7
8
1
G60 U26
D
D
D
D
1 2 C266 C254 C255
SCD1U25V3ZY-1GP
SC10U35V0ZY-1GP
SC10U35V0ZY-1GP
2
2
GAP-CLOSE-PWR
G61
1 2
G
S
S
S
AO4422-1-GP
GAP-CLOSE-PWR 1D8V_PWR
4
3
2
1
G56 Voutsetting=1.80V
1 2 51124_DRVH1 L36
51124_LL1 1 2 1D8V_S3 1D8V_PWR
GAP-CLOSE-PWR
G57 IND-3D3UH-55-GP
5
6
7
8
1 2 TC9 1D8V Iomax=7A G86 GAP-CLOSE-PWR
SC33P50V3JN-GP
U28
D
D
D
D
1 2
OCP>14A
1
GAP-CLOSE-PWR R666
SE220U2D5VDM-3GP
AO4422-1-GP
1
G59 DY 42K2R3F-GP C698 G89 GAP-CLOSE-PWR
1 2 D18 C265 1 2
SSM24PT-GP
-1 SCD1U50V3ZY-GP
2
GAP-CLOSE-PWR DY DY G88 GAP-CLOSE-PWR
2
G
S
S
S
51124_VFB1 1 2
A
4
3
2
1
1
30K1R3F-GP
51124_DRVL1 G87 GAP-CLOSE-PWR
R667 1 2
3D3V_S0 G84 GAP-CLOSE-PWR

1 2
2
Panasonic 220uF ESR=15mohm
1
DY G83 GAP-CLOSE-PWR
R668 Iripple=2.7A 1 2
5V_S5 100KR2J-1-GP 51124_GND
G85 GAP-CLOSE-PWR
1 2
2
G82 GAP-CLOSE-PWR
1
1 R670 2 1 2
R669 0R0402-PAD
51124_PGD1
51124_PGD2
SC4D7U10V5ZY-3GP
3D3R3J-L-GP 1D05V_PWR
C699
1D8V_PWR 1 R671 2 CPUCORE_ON 38,40,43

1
51124_VFB2 0R0402-PAD
2
51124_VFB1
2
1D05V_PWR 1D05V_S0
C700
24
U27
2
5
1
6
7
SC1U10V3ZY-6GP
2
G92
VFB1
VFB2
VO1
VO2
PGOOD1
PGOOD2
1 2
51124_GND
R672 DY GAP-CLOSE-PWR
51124_V5FILT 15 4 51124_TONSEL 1 2 51124_V5FILT G90
V5FILT TONSEL 10KR2J-3-GP
16 V5IN 1 2
1
21 51124_DRVH1
DRVH1 DCBATOUT_51124
16,31,43 PM_SLP_S5# 1 R673 2 51124_EN1_1 23 EN1 DRVH2 10 51124_DRVH2 R675 GAP-CLOSE-PWR
10R0402-PAD
2 51124_EN2_1 8 0R3-0-U-GP G96
16,18,30,31,36,43 PM_SLP_S3# EN2
0R0402-PAD 18 1 2
R674 51124_LL1 PGND1
20 13 1D05V Iomax=7A
2
LL1 PGND2
5
6
7
8
1
51124_LL2 11 25 U25 GAP-CLOSE-PWR
LL2 GND OCP>14A
D
D
D
D
3 C268 C267 C253 G97
GND
1
DY DY 51124_GND SCD1U25V3ZY-1GP
SC10U35V0ZY-1GP
SC10U35V0ZY-1GP
1 2
DRVL1
DRVL2
VBST1
VBST2
2
TRIP1
TRIP2
C701 C702
SCD01U16V3KX-GP
SCD01U16V3KX-GP
GAP-CLOSE-PWR
2
Voutsetting=1.051V G93
G
S
S
S
AO4422-1-GP 1 2
17
14
22
9
19
12
51124_GND 51124_GND TPS51124RGER-GPU1 51124_GND
4
3
2
1
51124_TRIP1 1D05V_PWR GAP-CLOSE-PWR
1
51124_TRIP2 51124_DRVL2 51124_DRVH2 G94

L34 1 2
1
20KR3F-GPR676
20KR3F-GP R676 51124_LL2 1 2
R677 51124_DRVL1 GAP-CLOSE-PWR
20KR3F-GP IND-3D3UH-55-GP G95
SB
2
5
6
7
8
1 2
U22 DY TC8
D
D
D
D
K
2
1
SC33P50V3JN-GP
30K1R3F-GP
51124_GND 51124_GND AO4422-1-GP DY GAP-CLOSE-PWR
1
SE220U2VDM-8GP
D15 C704 R679 G91
51124_LL1 1 R678 251124_LL1_1 1 2C703 51124_VBST1 SSM24PT-GP C269 1 2
0R0603-PAD -1 SCD1U50V3ZY-GP
2
SCD1U50V3ZY-GP GAP-CLOSE-PWR
2
G
S
S
S
51124_VFB2 DY
4
3
2
1
1
75KR3F-GP
51124_LL2 1 R680 251124_LL2_1 1 2 C705 51124_VBST2 51124_DRVL2 G98
0R0603-PAD 1 2
SCD1U50V3ZY-GP R681
GAP-CLOSE-PWR
2
Panasonic 220uF ESR=15mohm
Vout=0.75V*(R1+R2)/R251124_GND Iripple=2.7A
51124_GND
<Variant Name>
Vtrip(mV)=Rtrip(Kohm)*10(uA) Wistron Corporation

Iocp=(Vtrip/Rdson)+((1/(2*L*f))*((Vin-Vout)*Vout)/Vin)) 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
GND OPEN V5FILT
Title
TPS51124_1D8V_1D05V
TONSEL 230k/CH1 283k/CH1 346k/CH1 Size Document Number Rev
283k/CH2 346k/CH2 423k/CH2 A3
AG1 -1
5 4 3 2 1
MAX8725_PDS
AD+ DCBATOUT
U46
5 D G 4 U74
6 3 AD+_TO_SYS 1 R328 2 1 S D 8
D S S D BT+
7 2 2 7
1
D S S D
D 8 1 D01R3720F-2-GP 3 6 D
1
D S
R356 4 G D 5
100KR2F-L1-GP C361 AO4407-1-GP
1
SCD1U50V3KX-GP C38 AO4407-1-GP
1
SC1U50V5ZY-1-GP C381
2
SCD1U50V3KX-GP EC39
ID = 10A @
2
MAX8725_ACIN Near MAX1909
SCD1U50V3ZY-GP
DY
2
1 Pin 24 VGS = 10V
1
C31 R357
2
SC1U10V3ZY-6GP 13KR2F-GP
AC_IN Threshold 2.089V Max. G35
2
Near MAX1909 G34 GAP-CLOSE

2
AC_IN > 2.089V --> AC DETECT GAP-CLOSE

Pin 3
1
DCBATOUT
AD+ C36 AD+_TO_SYS
C37
MAX8725_CSSP
MAX8725_CSSN
1
1
SCD1U50V3KX-GP
SCD1U50V3KX-GP
1
D5
2
LDO :5.40V (< 5mA)
SET Vout MAX VCELL= 4.1998V/CELL CH521S-30-GP-U
C 2 C
VBAT=CELL*VCELL==>VCELL=VBAT/CELL MAX1909_LDO
1
=VREF+(VVCTL-1.8) /9.52 =4.1998V Near MAX1909
4
3
2
1
C35
Pin 2
1
2
C34 SCD1U50V3KX-GP U50 C17 C18
G
S
S
S
C32
2
SCD1U25V3ZY-1GP 1 2 SI4835BDY-T1-GP
MAX1909_LDO
SC10U35V0ZY-1GP
SC10U35V0ZY-1GP
2
1
SC1U10V3ZY-6GP
MAX8725_DHIV
Near MAX1909
MAX8725_REF
26
25
Pin 1
2
U3
D
D
D
D
R24
CSSP
CSSN
5
6
7
8
33R2J-2-GP
1
R20 MAX8725_PDS 27 22
1
R347 39KR2F-GP AD+_TO_SYS 24 PDS DHIV
SRC PDL 28
100KR2F-L1-GP MAX8725_DC_IN 1 2 BT+
DCIN LDO
1
L1
When V(ICTL)<0.8V or DCIN<7V C33
2
21 MAX8725_DLOV SC1U10V3ZY-6GP CHG_PWR-2 1 2CHG_PWR-3 1 R329 2
2
-->Charge Disable MAX8725_VCTL 11
DLOV
Near MAX1909
R17 1 MAX8725_ICTL VCTL D01R3720F-2-GP
31 CHG_I_PWM 2 10 ICTL Pin 21 IND-6D8UH-43-GP
100KR2J-1-GP MAX8725_MODE 7 MODE
1
V( MODE ) >=2.8V = 4 Cell 23 MAX8725_DHI

DHI
1
5
6
7
8
R16 C380
SC1U10V3ZY-6GP
V( MODE ) = 1.8V = 3 Cell MAX8725_ACIN
D
D
D
D
240KR2F-L-GP 3 ACIN
1
1
C9 C11 C10 C12 C16
2
SC10U25V0KX-3GP
SC10U25V0KX-3GP
SC10U25V0KX-3GP
SC10U25V0KX-3GP
SC10U25V0KX-3GP
R14 MAX8725_IINP 8
2
20KR2F-L-GP IINP MAX8725_DLO G36

20
2
DLO AO4422-1-GP
SC1U10V3ZY-6GP
MAX8725_CLS 9 G37 GAP-CLOSE

CLS
1
B U49 B
G
S
S
S
GAP-CLOSE
2
DY C23 R18
4
3
2
1
1
31 CHG_V_PWM 2 R345
1 10KR2F-2-GP MAX8725_ACOK 6 19 -1
2
100KR2J-1-GP ACOK PGND

SC1U10V3ZY-6GP
29
DY
2
PGND
1
C379
DY R350 18 8725_CSIP
CHARGE_ON1# CSIP
MAX1909_LDO 1 2 5
2
100KR2J-1-GP PKPRES
31,44 BATA_IN# 1 R23 2

1KR2J-1-GP
MAX8725_CCV 13 17 8725_CSIN
MAX8725_CCI CCV CSIN
12 CCI BATT 16
1
MAX8725_CCS 14 15
CCS GND
REF
5V_AUX_S5 R19
1
C22
1KR2J-1-GP
SCD01U50V3KX-4GP
R346
2
4
1
C26
78K7R3F-GP MAX8725ETI-GP-U V_REF :4.2235V (<500uA)

SCD01U50V3KX-4GP
R360 74.08725.A73 G1
100KR2J-1-GP 5V_AUX_S5 1 2
2
C20
GAP-CLOSE
MAX8725_REF
ISOURCE_MAX = (0.075/R328)*(VCLS/VREF)
2
D SCD1U25V3ZY-1GP
31 CHG_4D35V# 1 Q36 R348 =4.25A
G 2N7002-8-GP 15K4R2F-GP So,Constant Power=19V*4.25A=80.75W
S
2
MAX1909_LDO
2
R30 MAX8725_CLS
A
Pre-CHG_I = 305mA <Variant Name> A
SC1U10V3ZY-6GP
47KR2J-2-GP
1
DY C29 BATA_CHG_I = (0.075/R329)*(VICTL/3.6)

R611 -1 R349
=3.0A Wistron Corporation
2
100KR2J-1-GP 20KR2F-L-GP
2
AC_IN# 31 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

1st BTY Taipei Hsien 221, Taiwan, R.O.C.
84.27002.L04
2
2
3
D Current limit setting:

MAX8725_ACOK 2N7002-8-GP Title
1
Q8 SC 85W(85W/20V=4.25A)
G
S 1st BTY CHARGER_MAX8725
2

A3 -1
AG1
5 4 3 2 1
A B C D E
4
1D5V_S0 4
Iomax=4.0A
3D3V_S0 5V_S5 1D8V_S3 8/17 G3
2D5V 1 2
Iomax=1A GAP-CLOSE-PWR
1
G4
C125 C120 C126 1 2
1
SC1U10V3ZY-6GP SC10U10V5ZY-1GP SC10U10V5ZY-1GP
2
C495 DY GAP-CLOSE-PWR
SC10U10V5ZY-1GP G5
2
U54
1 2
8 1 2D5V_PWR 2D5V_S0 GAP-CLOSE-PWR

NC#8 VIN U16
6
G6
7
6
NC#7 BS 2
3 Vo (cal.)=2.568V G40 Vo(cal.)=1.512V 1 2
OCP=6A
VCNTL
GND FB
5 4 1 2 1 R108 2 7 5
GND
NC#5 VOUT 38,40,41 CPUCORE_ON POK VIN

0R0402-PAD 9 1D5V_LDO GAP-CLOSE-PWR 1D5V_S0
VIN
1
GAP-CLOSE-PWR G7
APL5332KAC-TRLGP 74.05332.B31 R428 G41 PM_SLP_S3# 1 R98 2 8 3 1 2
9
2K21R3F-L-GP 0R0402-PAD EN VOUT

1 2 VOUT 4
GAP-CLOSE-PWR
1
GAP-CLOSE-PWR C102
2
G42 2 5912_FB R77 TC1 C101
GND
FB
1
SCD01U16V2KX-3GP
1 2 1K78R3F-GP ST100U4VBM-L1-GP SC22U10V6ZY-2GP
2
1
3 TC14 DY 3
R429 ST100U4VBM-L1-GP GAP-CLOSE-PWR APL5912-KAC-GP
2
2
1KR2F-3-GP 74.05912.A71 SO-8-P
Rh/Rl=(Vout/0.8)-1 KEMET NTD:5.615 Trace Length=3cm
1
2
100uF, 4V, B2 Size R82 KEMET NTD:5.615 Trace Width=5mils

Iripple=1.1A, ESR=70mohm 2KR3F-L-GP Trace Resistance>80mohm
100uF, 4V, B2 Size
Iripple=1.1A, ESR=70mohm
2
Vo=0.8*(1+(R1/R2))
2 0D9V 2
8/22
5V_S5 Iomax=1A 1D8V_S3
0D9V_PWR DDR_VREF_S0
1
C569 G66
SC1U10V3ZY-6GP C568 1 2
2
SC10U10V5ZY-1GP
2
GAP-CLOSE-PWR
G62
U62
1 2
10 1 GAP-CLOSE-PWR
VIN VDDQSNS
16,31,41 PM_SLP_S5# 1 R529 2 9 S5 VLDOIN 2 G64
0R0402-PAD 8 3 1 2
GND VTT
1 R531 2 7 S3 PGND 4
16,18,30,31,36,41 PM_SLP_S3# 0R0402-PAD 6 5 GAP-CLOSE-PWR
VTTREF VTTSNS
GND
DDR_VREF_S3
1
C575 C579 TPS51100DGQR-GP

11
SC10U10V5ZY-1GP
1
SCD1U16V2ZY-2GP DY 74.51100.079
2
C580 C570
SC10U10V5ZY-1GP SC10U10V5ZY-1GP
2
1 <Variant Name> 1
Wistron Corporation
2nd source: 74.02997.079 Taipei Hsien 221, Taiwan, R.O.C.
G2997F6U Title
0D9V/1D5V/2D5V
A3 -1
AG1
A B C D E
5 4 3 2 1
ADAPTER IN CIRCUIT
DCIN1 AD+
4
U47
D 1 AD+_JK 1 S D 8 D
MMPZ5250BPT-GP
2 S D 7
1
S D
SCD47U50V5ZY
3 6
SCD1U50V3ZY-GP
1
2 D4 R319 C359 4 G D 5
C8 330KR2F-L-GP
SCD1U50V3ZY-GP AO4407-1-GP
2
3 DY
2
C653
1
1
5 AD+_G
6 C711
MH1 2 SCD1U50V3ZY-GP
1
DC-JACK116-GP R326
22.10037.C61 Q33 100KR2D-1-GP
R2
E
EMI Solution B
2
R1
C
C
31 AD_OFF B Q32 PDTA144EU-1GPU
CHT2222APT-GP
connect to KBC
E
C C
MAIN BATTERY CONNECTOR KBC_3D3V_AUX

1
D28 D29 D30 2

BAV99PT-GP-U BAV99PT-GP-U BAV99PT-GP-U
3
83.00099.K11 83.00099.K11 83.00099.K11

BAT1
8
1
RN13 2
1 4 BATA_CLK_1 3
31 BATA_SCL
31 BATA_SDA 2 3BATA_DAT_1 4
31,42 BATA_IN# 5
SRN33J-5-GP-U 6
BT+ 7
9
1
1
EC9 EC10 EC21

SC1KP25V3MX-GP
C390 C389 SYN-CON7-11-UGP

B SCD1U50V3ZY-GP DUMMY-C3 20.80577.007 B
2
DY DY DY
2
A <Variant Name> A
Wistron Corporation
Title
AD/BATT CONN
A3 -1
AG1
5 4 3 2 1
A B C D E
DCBATOUT DCBATOUT
5V_S0 5V_S0
1
C714 C715 C673 C674 C675
U44C U44D C716 C676
14
10
14
13
SCD1U50V3ZY-GP
SCD1U50V3ZY-GP
SCD1U50V3ZY-GP
SCD1U50V3ZY-GP
SCD1U50V3ZY-GP SCD1U50V3ZY-GP SCD1U50V3ZY-GP
2
9 8 12 11
10/06 EMI Solution
4 TSAHCT125PW-GP TSAHCT125PW-GP 4
7
01/07 EMI Solution
3D3V_S0
No New
1
C717 C719 C718
New Card CPU Thermal Module -1 -1
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
2
2
TOP SIDE:
H17 H29 H32 H31 K1 K6
HOLE HOLE HOLE HOLE 1 1
SPRING-U3
SPRING-29-GP
1
1
34.40U07.001 34.42T14.001
34.4A901.001 34.4A908.001
IO Bracket FOR MDC IO Bracket IO Bracket UMA FOR MINIC

3 3
BOTTOM SIDE:
H21 H22 H25 H27 H30 H34 H11 H7 H28 H26
K2 K3 K4 K5
1 1 1 1
MINIC SPRING-U3 SPRING-23-GP SPRING-23-GP SPRING-23-GP

1
1
34.40U07.001 34.39S07.001
34.4A902.001 34.4A903.001 34.4A904.001 34.4A905.001 34.4A906.001 MINIC 34.4A907.001
-1
H12 H15 H19 H2 H3 H35 H4 H10 H13 H8 H5 H18 H14

HOLE HOLE HOLE HOLE HOLE HOLE HOLE HOLE HOLE HOLE HOLE HOLE
1
1
2 2
H16 H1 H6 H9 H33 H20

HOLE HOLE HOLE HOLE HOLE HOLE
1
1 <Variant Name> 1
Wistron Corporation
Title
SPRING & BOSS

A3
AG1 -1
Date: Tuesday, January 24, 2006 Sheet 45 of 45
A B C D E

Acer Aspire5560 (Wistron Ag1 UMA-1-0309 PDF

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A B C D E DC/DC

AG1 Block Diagram

CLK GEN. (Hannstar, GCE)

11,12 PCMCIA I/F

SIO KBC LPC

4 LDRQ[0], LDRQ[1]/GPIO[41], 0 0 1 0 -1.50 Down CFG[4:3] Reserved 4

3 Termination Resistors Global R-comp Disable

DPRSLPVR Reserved This signal should not be pull high.

34 PCLK_FWH R661 2 1 22R2J-2-GP RN22 2 3 SRN33J-5-GP-U CLK_MCH_3GPLL 7

16 CLK_ICHPCI R459 1 2 33R2J-2-GP ITP_EN 8 23 CLK_PCIE_ICH_1#

SC20P50V2JN-1GP X3 R116 470R2J-2-GP 41

IREF CPU_STOP# CPU_SEL2

RN84 SRN49D9F-GP RN32 SC10P50V3JN-GP

CPU_SEL2 4,7 CLK_PCIE_LAN 2 3 CLK_CPU_BCLK 2 3 CLK_ICHPCI 1 2 EC32 DY

SRN49D9F-GP <Variant Name>

R440 R433 SEL2 SEL1 SEL0 CPU FSB RN35

0 1 0 200M X SRN49D9F-GP RN86 Taipei Hsien 221, Taiwan, R.O.C.

0 1 1 166M 667M CLK_MCH_3GPLL 2 3

6 H_ADSTB#1 ADSTB[1]# PROCHOT# 0R2J-2-GP D[17]# D[49]#

B4 A22 PM_THRMTRIP# H_D#25 P22 AD24 H_D#57 Layout Note:

M4 RSVD[05] RSVD[13] D2 6 H_DSTBN#1 M24 DSTBN[1]# DSTBN[3]# AD23 H_DSTBN#3 6

XDP_TDI R174 1 2 150R2F-1-GP

XDP_TMS R172 1 2 39D2R3F-2-GP

XDP_TCK R180 1 2 27D4R2F-L1-GP Wistron Corporation

All place within 2" to CPU Title

E17 VCC[039] VCCP[05] M6 F5 VSS[044] VSS[125] AB23

VCC[041] VCCP[07] VSS[046] VSS[127]

AB9 VCC[060] VID[5] AF2 H_VID5 38 K1 VSS[065] VSS[146] AE4

VCC[064] VCCSENSE VSS[069] VSS[150]

BGA479-SKT6-GPU1 Layout Note: M5 AF6

SC10U10V5ZY-1GP VSS[078] VSS[159]

H_D#23 W9 B12 H_A#26

H_XSWING H_D#28 H_D#_27 H_A#_30 H_A#31 R161

3 R513 H_D#31 T5 B9 H_ADSTB#0 4

H_D#34 H_D#_33 H_VREF_0

H_D#45 AA6 W8 H_DINV#1

H_D#50 H_D#_49 H_DSTBN#_0 H_DSTBN#1

H_YSWING H_SLPCPU# 0R0402-PAD

1 Place them near to the chip ( < 0.5") <Variant Name> 1

F15 CFG5 AA38

SM_ODT_3 CFG_9 CFG10 EXP_A_RXP_0

C501 H15 CFG17 13 LB_DATA#_0 G30 P34

C548 G_CLKIN CFG_19 CFG20 LB_DATA#_2 EXP_A_RXP_10

DMI_RXN2 AG37 BA39 AB36

R488 1 R1582 CFG4 When High 1K Ohm 3D3V_S0

R485 DUMMY-R2 RN108

150R2F-1-GP 1 R1542 CFG8 LIBG 1 R466 2

AR12 SA_DQ32 SA_MA_1 AU14 AN14 SB_DQ35 SB_MA_3 AR28

68.00230.041 F20 R10

68.00230.041 1D5V_S0 C28 R8

C118 AH22 VCCAUX21

1 R104 2 V_DACA C175 C156 C184 C185 AF14 VCCAUX33

BAT54-4-GP 0R0603-PAD AF13

C1170R0603-PAD Taipei Hsien 221, Taiwan, R.O.C.

Divide by Trace (Layout Rule approve) GMCH (4 of 5)

AB20 AH12 C160 N35 VSS_88 B13 H2

VCC_91 VCC_SM_87 SC10U10V5ZY-1GP VSS_266 VSS_359

L19 VCC_101 VCC_SM_97 AW6

VCC_106 VCC_SM_102 Title

8,12 M_A_A[13..0] DM2

2 196 C512 BC10

SCD1U16V2ZY-2GP GND GND Taipei Hsien 221, Taiwan, R.O.C.