Type PBLSB

Static Low Impedance Busbar Protection

Type PBLSB
Static Low Impedance
Busbar Protection

PBLSB scheme

Introduction
PBLSB is a modular, solid state, low
impedance, high speed, biased
differential protection system based
on the well proven circulating
current principle. This system
provides continuous supervision of
current transformer secondary
circuits, stability during external fault
conditions and high speed of
operation for internal faults.

Features
• Fully static design
• Full stability in the event of
throughfaults
• High speed operation
• Easily adaptable to different bus
configurations.
• Fully isolated dc auxiliary supply,
using dc/dc converter
• Current transformers of different
ratios can be accommodated
• Main current transformer
secondary circuits are not switched
• Phase segregated measurement
• Dual bias characteristic
• Built-in provision for LBB and
isolator repeat relays
• Logically designed modular
subrack design.
Application
The relay is suitable for the protection
of indoor or outdoor high voltage
substation busbars, with or without
equal ratio current transformers and
is particularly suitable for stations
where only a single CT core is
available on every circuit for busbar
protection.
By suitable selection of subracks,
schemes of protection can be
assembled to suit any busbar
configuration. Type PBLSB is supplied
factory assembled, prewired and
tested in cubicle form. It is based on
three standard subracks housed in a
19” subrack. These are assembled
together to produce the required
schemes of protection. The subracks
are interconnected via standard
multicore cables.
The subracks available are classified

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by function as follows:
– Power supply subrack
– Measuring subrack
– Feeder subrack
– Bus coupler (BC)/Bus section
(BS)/ Transfer bus coupler (TBC)
subrack.
The principle of operation
The relay design is based on the well
known merz-price circulating current
principle. The enhanced throughfoult
stability is achieved by the
combination of the following
– Bias characteristic with 80% slope
– Current transformer saturation
detector
– Transient bias
Differential busbar protection has
traditionally relied upon the low
impedance of saturated current
transformers to shunt current away
from the measuring circuit to ensure
stability under through-fault
condition. However this imposes a
limit on external burden upto which
stability can be maintained.
In PBLSB, the saturation level
detectors are built-in to disable
measurement in the event of CT
saturation and this avoids the value
of external burden having an
adverse effect on the stability of
protection for external faults.
Overcurrent check
function
The measuring subrack is provided
with overcurrent check feature. This
element has adjustable current
settings and can be set at 1.5 times
maximum load current. The final
trip from the busbar protection
will be issued only on operation of
both biased differential element
and overcurrent check element.
Refer Figure 8.
In the case of substation where only
a single CT core is available for
busbar protection, the provision of
overcurrent check feature will be of
immense help as it prevents final trip
of CT open circuit under normal
operating condition. This is because
the differential current under such
circumstances would not have
exceeded the overcurrent check
setting.
Biased differential
element
Separate measuring modules have
been provided for each phase and
they are interchangeable even at
site and easily configurable by
selection of jumpers provided in the
PCB. Each module receives the
respective bias, differential and
setting inputs and gives supervision,
trip outputs for each phase. The
bias voltage (Vb), differential voltage
(-Vd) and setting voltage (Vs) are fed
to the biased differential circuit as
shown in the differential circuit
Figure 5. If the instantaneous value
of Vd is less than (Vs+Vb), the relay
has a restraining tendency. If (-Vd) is
more than (Vs+ Vb), the relay has
operating tendency. The bias
characteristic has dual slope of 20%
upto rated current and 80% slope
beyond rated current and as shown
in Figure 7. The operating
characteristic for different
overcurrent check settings is shown
in Figure 8. For operation, the zone
should be enabled by choosing ‘IN’
facility from the front panel
Stability with saturated
current transformers
During an external fault, one of the
current transformers may saturate. A
differential current will be produced
by the unsaturated current
transformers. The principle used in
the PBLSB is to detect CT saturation
and block the measurement for that
portion of the cycle during which
saturation occurs and hence the
stability is achieved.
For the waveforms shown in Figure
3, I2 is distorted due to saturation.
The differential current id = i1-i2
(resultant current) flows in the
differential circuit only during the
period in which saturation occurs.
Since the current transformer is likely
to saturate after a small duration
from zero crossing, the differential
current will appear, only after the
appearance of bias signal(Ib) which
is equal to ½i1½ + ½i2½. Hence the CT
saturation detector constantly
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monitors the time gap between the
appearance of the bias current and
the differential current. If differential
current is delayed as compared to
bias current the biased differential
final output timer will be blocked.
This amounts to blocking the
measurement in effect. Hence the
timer will not issue tripping signal.
The blocking will be ensured for the
period during which CT is under
saturation. Hence this feature
enhances the throughfault stability.
Operation with saturated
current transformers
The relay has an internal/external
fault detector which gives the logic
output as to whether the fault is
internal or external. The principle is
again based on the instant of
appearance of the bias and
differential signal, the information of
which is being used in CT saturation
level detector. For internal fault, both
the bias and the differential signals
will appear at the same instant
whereas for external fault with CT
saturation, this will not be true and
there would be small time gap
between appearances of bias and
differential signal. Once the fault is
detected as internal, the logic
disables the CT saturation detector
circuit and transient bias and hence
high speed operation is ensured.
The above logic is explained in the
Figures 4 & 5.
Transient bias
The transient bias feature is
incorporated to enhance the bias
during external faults for increased
stability. The internal/external fault
detector circuit as already explained
provides the information the nature
of fault whether internal or external.
For external fault, the bias is raised
to a much higher level and falls
exponentially to the steady state
value.
The combination of steady state
bias, transient bias and saturation
detectors provides exceptionally high
throughfault stability without the
need for external stabilising resistor.
The elimination of stablilising
resistor ensures that the PBLSB
presents a low burden to the current
transformers. This reduces the
current transformer requirements.
CT secondary supervision
The element monitors the differential
circuit and produces output signal
during CT secondary wire faulty
conditions if the differential current
exceeds the supervision reference
setting. The output signal initiates
the timer with a fixed time delay of 3
seconds which ensures that nuisance
alarm will not be initiated for
primary system fault conditions. This
element energises the output relay
the contact of which can be
connected for alarm/trip logic.
Isolator repeat relays
The relay is provided with inbuilt
isolator repeat relays which switches
the secondary of transformer of the
relay. Hence the possibility of main
CT open circuiting can be avoided.
The isolator auxiliary contacts (NO/
NC) is wired to the isolator repeat
relays coil. The isolator repeat relays
are powered by a separate dc/dc
converter.
These are bistable relays and will
remain in the same status even in
the event of loss of dc power supply.
The isolator repeat relays are so
designed such that the continuous
drain on the battery will be
minimum. Refer Figure 6.
The isolator operation is indicated
through LEDs on the front panel of
feeder subrack. The isolators that
are operational for a particular bus
layout will be indicated by suitable
buttons on the front ponel.
Local breaker backup
scheme
The relay provides input terminals
for wiring the potential free contacts
of an external LBB relay. In case of
breaker failure conditons, the back
tripping is effected through PBLSB
for bus clearance. The LBB input is
through an opto isolator which
provides high isolation.
DC power supply
The scheme derives its power from
external dc/dc converter, of type
MSTZ03-Power Supply. A minimum
of two MSTZ03 power supplies are K = At least 30 (or)
required for a PBLSB scheme of 2 Maximum bus fault level
zones. One power supply is used to
2.0 x Reference CT ratio
power electronic circuit and the
other to power isolator repeat relays The magnetising current
and opto isolators. Additional power requirement will be less than 3% of
supplies are required for schemes relay rated current at Vk/4.
having more than two zones.
Auxiliary current
CT ratio matching transformer requirements
Interposing current transformers are The specification for magnetising
necessary if current transformers of characteristic of protection class
different CT ratios are allotted for (class PS) ICT is as given below.
busbar protection. The ICT ratios
can be selected to match with the Vk ³ 60 volts for 1A secondary
12 volts for 5A secondary
highest CT ratio and the ratio will be
1/(Ratio of CT for which ICT is Imag £ 30mA at Vk/4 for 1A
required/maximum CT raito) secondary.
150mA at Vk/4 for 5A
For example, if 800/1A and 400/1A secondary.
CTs are existing in different circuits,
ICTs can be connected in series with Technical data
400/1A and is of the ratio
400 Ratings
1/ = 1/0.5
800 AC current (In): 1A or 5A
The ICTs will be external to the relay Frequency: 50Hz
and mounted in the control panel.
Auxiliary DC supply (Vx)
Main current transformer
Voltage Operating Minimum
requirements rating range dc volts for
PBLSB requires at least a single core (V dc) (V dc) startup (± 5%)
on all outgoing/incoming circuits 24/27 16.8-35.6 19.2
and two cores on bus coupler/ 48/54 33.6-71.2 38.4
transfer bus coupler/bus section. 110/125 77 -165 88
The knee point voltage requirement 220/250 154-330 176
of protection class (class PS) CT on
individual circuit is as given below.
MRr Settings
Vk ³ K ICT (RCT + 2RL + B + Z) MR
C
Differential current setting:
where
0.2 to 0.7 (xIn) in steps of 0.1In
Vk = Knee point voltage
Overcurrent check unit setting:
ICT = Rated CT secondary 0.5 to 1.5 (xIn) in steps of 0.25 In
current
CT supervision current setting:
RCT = Resistance of CT secondary 0.1 to 0.3 (xIn) in steps of 0.05 In
winding
CT supervision time delay:
RL = Resistance of single lead 3 sec ± 10% (fixed)
from CT to relay
Stabilising factor:
B = ohmic burden of PBLSB Dual slope characteristic, 20% slope
upto rated current and 80% slope
MRr = CT ratio for reference
after rated current
circuit (ie. that circuit with
the highest ratio CTs) Operating time:
Typical 20m. sec
MRc = CT ratio for circuit under
Maximum 25m. sec
consideration
Through-fault stability:
Z = Ohmic burden of ICTs.
Generally in excess of 40 times the
highest circuit rating
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Contact ratings Fast transient burst susceptibility test:
IEC 801-4 std
Current Make and carry Make and carry Break
continuously for 0.2 second IEC 255-22-4

AC 5A 7500 VA with 1250 VA with Environmental specification

maxima of 30 A maxima of 5 A Temperature:
and 300 V and 300 V
Storage and transit –25°C to 70°C

DC 5A 7500 W with 50 W (resistive) Operating range –10°C to 55°C

maxima of 30 A 25 W (inductive) IEC 68-2-1:1990
and 300 V (L/R = 0.04 sec.) IEC 68-2-2:1974
with maxima of Humidity:
5 A and 300 V 56 days (at 93% RH and at +40°C)
IEC 68-2-3:1969
Thermal rating Insulation withstand Enclosure protection:
Continuous: 2 x In AC inputs:2 KV rms for 1 minute to IP 50 dust protected (individual
IEC 255-5:1977 all circuits and to subracks)
Short time: 20 In for 3 secs.
IS 3231:1986 case earth IEC 529:1989
Scheme burden Vibration:
Output contacts:
AC burden: 1 KV rms for 1 minute across open 0.5g between 10Hz and 300Hz
0.05VA at rated current contacts IEC 255-22-1:1988 class II

DC burden: Isolator repeat inputs: Outline arrangement:

1 KV rms for 1 minute between Refer Figures 9A, 9B, 9C & 9D.
Subrack Quiescent Operated
circuits and case
Measuring 40Walt 40 Watt Information required with
subrack LBB inputs:
2 KV RMS for 1 minute between order
Feeder Subrack - 20 Watt
circuits and case. 1. Single line diagram of the
Buscoupler/ busbar arrangement showing
High voltage impulse withstand:
Bussection/ - 20 Watt the position of current
5 KV peak, 1.2/50 µsecs, 0.5 joule
Transfer Bus transformers available for
IEC 255-5:1977
Coupler subrack busbar protection.
IS 8686:1977
Contact arrangement High frequency interference: 2. Current transformers Ratio, Vk,
Tripping/Alarm: 2.5 KV peak between independent RCT, Imag at RL
4 make self reset contact per circuit. circuits and between circuits and (Exclusive for busbar protection)
Additional hand reset trip relays can case earth, I KV peak across input
be connected externally for contact circuits. IEC 255-22-1:1988 class III
multiplication. IS 8686:1977
Operation indication:
Light emitting diodes for tripping
and also for isolator position in
feeder subracks.

SURFACE LAYOUT
12345678901
12345678901
PS PS PS 12345678901
12345678901
for for for 12345678901
12345678901
Feeder Z1&Z2 Z3&Z4 12345678901
12345678901
Z1 Z2

Z3 Z4

F1 F2 F3 F4

BS BC

BS BC

PS - POWER SUPPLY Z - MAIN ZONE

BS - BUS SECTION F - FEEDER
BC - BUS COUPLER

Figure 1A:
Typical connection diagram of PBLSB (without independent check
zone) Double Bus Arrangement

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 SURFACE LAYOUT

12345678901
1234567890
12345678901
1234567890
PS PS 12345678901
1234567890
12345678901
1234567890
12345678901
1234567890
for for 12345678901
1234567890
Feeder Z1&Z2 12345678901
1234567890
12345678901
1234567890
Z1 Z2

F1 F2 F3 F4

BS (Spare)

PS - POWER SUPPLY Z - MAIN ZONE

BS - BUS SECTION F - FEEDER

Figure 1B:
Typical connection diagram of PBLSB (without independent check
zone) Single Bus Arrangement

Figure 1C:
Output tTrip contact logic for busbar protection without
independent check features

PS PS PS PS
Z1 Z2

Z3 Z4

ZCHK

F1 F2 F3 F4

BS BC

BS BC

PS - POWER SUPPLY Z - MAIN ZONE

BS - BUS SECTION F - FEEDER
BC - BUS COUPLER
TBC - TRANSFER BUS COUPLER
ZCHK - CHECK ZONE

Figure 2A:
Typical connection diagram of PBLSB (with independent check zone)
Double Bus Arrangement

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 123456789
123456789
123456789
123456789
PS PS PS
21 22

ZCHK

F1 F2 F3 F4
BS BS/BC/TBC
(Spare)
BS BC

PS - POWER SUPPLY Z - MAIN ZONE

BS - BUS SECTION F - FEEDER
TBC - TRANSFER BUS COUPLER
ZCHK - CHECK ZONE

Figure. 2B:
Typical connection diagram of PBLSB (with independent check
zone) Single Bus Arrangement

Figure 2C:
Output trip contact logic for busbar protection with independent
check features

Figure 3:
Stability with saturated CTs

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 Internal
fault

id

i2

Bias

id

t=o=t Inhibit pulse

Trip level for timer

Timer

Figure 4:
Operation with saturated CTs

Figure 5:
Measuring circuit flock diagram (single phase)

8
 Figure 6:
Isolator repeat relay circuit

10
10

8
8

Operating region
Operating region
Differential current + I1 - I2

6
6
Differential current + I1 - I2

4
4

Restraining region
Restraining region
2 2
Overcurrent check

Overcurrent check
0 0
0 2 4 6 8 10 12 0 2 4 6 8 10 12
Bias current = êI1ê + êI2ê Bias current = êI1ê + êI2ê
Overcurrent check
Overcurrent check and Trip
and Bias differential
Trip Trip logic
Bias differential

Figure 7:
Figure 8:
Operating characteristics
Relay operating characteristics
(bias differential)

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 ALSTOM Limited Pallavaram Works: 19/1, GST Road, Pallavaram, Chennai-600 043. India.
Tel: 91-044-2368621 Fax: 91-044-2367276 Email: plw.applications@alstom.sprintrpg.eml.vsnl.net.in.
© 1998 ALSTOM Limited

Our policy is one of continuous development. Accordingly the design of our products may change at any time. Whilst every effort is made to produce up to date literature, this brochure should
only be regarded as a guide and is intended for information purposes only. Its contents do not constitute an offer for sale or advice on the application of any product referred to in it.
ALSTOM Limited cannot be held responsible for any reliance on any decision taken on its contents without specific advice.

PR:053:0799:A Printed in India.