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Schematic Asus K43S PDF
Schematic Asus K43S PDF
Schematic Asus K43S PDF
PCB STACK UP
6L Dis. & UMA SW9 (14") BLOCK DIAGRAM 01
27MHz
LAYER 1 : TOP
CPU HDMI CON
A
LAYER 2 : SGND A
14.318MHz
PAGE 25 CLOCK GEN Mini PCI-E Card x2
9LRS3197
Express Card x1
PCH PAGE 2
USB2.0 6,8,10
Ibex-M(Intel HM55) 0,1,2
UMA GPU CORE (RT8152A) SATA5 150MB 12 5 4
E-SATA
PAGE 31 USB2.0 Ports BlueTooth Webcam RTS5159
PAGE 26 PAGE 7~11 PAGE 21 PAGE 22 PAGE 19 PAGE 21
X2
SYSTEM POWER RT8206B
PAGE 32 PCI-E
X1 X1 X1
32.768KHz
VCCP +1.1VTT(RT8208A) AND PCH Mini PCI-E LAN Express
1.05V(RT8204) Card Atheros Card
PAGE 33 (Wireless LAN PCIE-LAN
C C
/ Robson) AR8131(M)
Keyboard PAGE 26 ENE KBC LPC PAGE 28
GagaLAN
SYSTEM CHARGER(ISL6251AHAZ-T)
PAGE 38 Analog
D ALC272 D
PAGE 22
AUDIO
PROJECT : SW9
microphone Audio Jacks Amplifier Jack to Quanta Computer Inc.
(Phone/ MIC) TPA6017A2 Speaker Size Document Number Rev
PAGE 22 Custom 1A
PAGE 22 PAGE 23 PAGE 23 Block Diagram
Date: W ednesday, December 02, 2009 Sheet 1 of 44
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
+1.05V +VDDIO_CLK
L28
1 2
HCB1608KF-181T15_6 C640
C644
C643
C642
.1U/10V_4
.1U/10V_4
10U/6.3V_6S
*10U/6.3V_6S
02
Place each 0.1uF cap as close as CLOCK GENERATOR +3V
+3V RTM875N-632-VB-GRT
B B
R297
1K/F_4
CK_PW RGD_R
Y3
XTAL_IN 1 2XTAL_OUT
3
Q28
2N7002E
14.318MHZ
1
1
R298
[34] VR_PW RGD_CLKEN# 2 100K/F_4 C388 C387
33P/50V_4 33P/50V_4
2
2
1
MDC Hole.
PAD and HOLE MINI CARD Hole. H40
H-C236D62P2
H39
H-C236D62P2
C
CPU bracket Hole. C
H31 H7 H17 H11 H12 H36
H19 H20 H35 H34 *h-s276d118p2 *H-C236D162P2 *h-c315d118p2 *h-c315d118p2 *h-c315d118p2 H-C236D63P2 H6 H8 H2 H1
*h-c256d165p2 *h-c256d165p2 *h-c256d165p2 *h-c256d165p2 *H-C236D162P2 *H-C236D162P2 *H-C236D63P2 *H-C236D63P2
1
EMI capacitive
1
1
1
1
H5 AGND
*O-SW 9-4 +VIN C336 .1U/25V_4
H24 H9 H10 H21 H22 C481 .1U/25V_4
*H-c98d98n *O-sw9-2 *O-sw9-3 *O-sw9-5 *O-sw9-5 10/12 C565 .1U/25V_4
C570 .1U/25V_4
C572 .1U/25V_4
1
C637 .1U/25V_4
C638 .1U/25V_4
1
C639 .1U/25V_4
1
D D
C133 *.1U/10V_4
H14 H15 H3 H4 C427 *.1U/10V_4
*h-c256d165p2 *h-c256d165p2 PAD4 PAD5 *h-o110x130d110x130n *h-o039x102d39x102n
1 1
H32 H18 H33
*o-sw9-7 *h-c315d118p2 *o-sw9-6
MDC_SPRING MDC_SPRING PROJECT : SW9
Quanta Computer Inc.
1
1
Size Document Number Rev
1
Custom 1A
[7,8,9,11,27,31,33,34,39] +1.05V CLOCK & Screw Holes
[3,7,8,9,10,11,12,13,19,20,21,22,23,24,25,26,27,28,29,30,34,37,39] +3V
Date: W ednesday, December 02, 2009 Sheet 2 of 44
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
DIS UMA
U22A
Ra
Rb
Rc
NA 0 ohm
0 ohm NA
0 ohm NA
03
PEG_ICOMPI B26 PEG_COMP R355 49.9/F_4
PEG_ICOMPO A26
[9] DMI_TXN0 A24 B27 U22B For ITP CLk
DMI_RX#[0] PEG_RCOMPO
[9] DMI_TXN1 C23 DMI_RX#[1] PEG_RBIAS A25 PEG_RBIAS R356 750/F_4 R77 20/F_4 H_COMP3 AT23
COMP3 BCLK A16 CLK_CPU_BCLK [10]
[9] DMI_TXN2 B22 PEG_RX#[0..15] [14] R76 20/F_4 H_COMP2 AT24 B16 CLK_CPU_BCLK# [10]
DMI_RX#[2] PEG_RX#0 R25 49.9/F_4 H_COMP1 G16 COMP2 BCLK#
A [9] DMI_TXN3 A21 DMI_RX#[3] PEG_RX#[0] K35 COMP1 MISC A
J34 PEG_RX#1 R79 49.9/F_4 H_COMP0 AT26 AR30
PEG_RX#[1] PEG_RX#2 COMP0 BCLK_ITP
[9] DMI_TXP0 B24 DMI_RX[0] PEG_RX#[2] J33 AH24 SKTOCC# BCLK_ITP# AT30 CLK_PCIE_3GPLL [8]
[9] DMI_TXP1 D23 G35 PEG_RX#3 CLK_PCIE_3GPLL# [8]
DMI_RX[1] PEG_RX#[3] PEG_RX#4
[9] DMI_TXP2 B23 DMI_RX[2] PEG_RX#[4] G32
PEG_RX#5 H_CATERR# AK14 CLOCKSPEG_CLK#
PEG_CLK E16 Rc
[9] DMI_TXP3 A22 F34 D16 R358 *0_4
DMI_RX[3] PEG_RX#[5] PEG_RX#6 CATERR#
PEG_RX#[6] F31
PEG_RX#7
[10] H_PECI AT15 PECI R357 3
Ra
D24 D35 AN26 THERMAL A18 4 0_4P2R
[9]
[9]
DMI_RXN0
DMI_RXN1 G24
F23
DMI_TX#[0]
DMI_TX#[1] DMI PEG_RX#[7]
PEG_RX#[8] E33
C33
PEG_RX#8
PEG_RX#9
[34] H_PROCHOT#
[10,27] PM_THRMTRIP# AK15
PROCHOT#
THERMTRIP#
DPLL_REF_SSCLK
DPLL_REF_SSCLK# A17
Rb
1 2
DREFSSCLK [8]
DREFSSCLK# [8]
[9] DMI_RXN2 DMI_TX#[2] PEG_RX#[9]
[9] DMI_RXN3 H23 D32 PEG_RX#10 R359 *0_4
DMI_TX#[3] PEG_RX#[10] PEG_RX#11 RESET_OBS#
PEG_RX#[11] B32 AP26 RESET_OBS# SM_DRAMRST# F6 DDR3_DRAMRST# [12]
[9] DMI_RXP0 D25 C31 PEG_RX#12 [9] PM_SYNC AL15
DMI_TX[0] PEG_RX#[12] PM_SYNC
[9] DMI_RXP1 F24 DMI_TX[1] PEG_RX#[13] B28 PEG_RX#13
PEG_RX#14 R363 0_4
AN14 VCCPWRGOOD_1 DDR3 SM_RCOMP[0] AL1 SM_RCOMP_0 R34 100/F_4
[9] DMI_RXP2 E23 DMI_TX[2] PEG_RX#[14] B30 [10] H_PW RGOOD AN27 VCCPWRGOOD_0 AM1 SM_RCOMP_1 R41 24.9/F_4
[9] DMI_RXP3 G23 DMI_TX[3] PEG_RX#[15] A31 PEG_RX#15 [9] PM_DRAM_PW RGD AK13 SM_DRAMPWROK MISC SM_RCOMP[1]
SM_RCOMP[2] AN1 SM_RCOMP_2 R35 130/F_4
1
PV R67 10K/F_4
PEG_RX[0..15] [14] +1.1V_VTT
J35 PEG_RX0 C426 H_PW RGD_XDP AM26 AN15 PM_EXT_TS#0 R69 0_4 PM_EXTTS#0 [12]
PEG_RX[0] T24 TAPPWRGOOD PM_EXT_TS#[0]
2.7GT/s data rate H34 PEG_RX1 33P/50V_4 AP15 PM_EXT_TS#1 R64 0_4 PM_EXTTS#1 [13]
2
PEG_RX[1] PEG_RX2 H_VTTPW RGD AM15 PM_EXT_TS#[1] R65 10K/F_4
[9] FDI_TXN[7:0] PEG_RX[2] H33 VTTPWRGOOD +1.1V_VTT
FDI_TXN0 E22 F35 PEG_RX3 [8,24,27,28,29] PLTRST# CPU_PLTRST# AL14
FDI_TXN1 FDI_TX#[0] PEG_RX[3] PEG_RX4 R51 1.5K/F_4 RSTIN#
D21 FDI_TX#[1] PEG_RX[4] G33 PRDY# AT28
FDI_TXN2 D19 E34 PEG_RX5 AP27 XDP_PREQ# T25
FDI_TXN3 FDI_TX#[2] PEG_RX[5] PEG_RX6 R60 750/F_4 PREQ# XDP_TCLK
FDI_TXN4
D18
G21
FDI_TX#[3] PEG_RX[6] F32
D34 PEG_RX7
PWR MANAGEMENT TCK AN28 T1
FDI_TXN5 FDI_TX#[4] PEG_RX[7] PEG_RX8 XDP_TMS
E19 F33 AP28
Intel(R) FDI
B [9] FDI_TXP[7:0]
FDI_TX#[7] PEG_RX[10]
PEG_RX[11]
PEG_RX[12]
A32
C30
PEG_RX11
PEG_RX12
AJ22
AK22
BPM#[0]
BPM#[1]
JTAG & BPM TRST#
T22 B
FDI_TXP0 D22 A28 PEG_RX13 AK24 AR27 XDP_TDO_R T19
FDI_TXP1 FDI_TX[0] PEG_RX[13] PEG_RX14 BPM#[2] TDO
C21 FDI_TX[1] PEG_RX[14] B29 AJ24 BPM#[3] TDI_M AR29 XDP_TDI_M T21
FDI_TXP2 D20 A30 PEG_RX15 AJ25 AP29 XDP_TDO_M T20
FDI_TXP3 FDI_TX[2] PEG_RX[15] BPM#[4] TDO_M
C18 FDI_TX[3] PEG_TX#[0..15] [14] AH22 BPM#[5]
FDI_TXP4 G22 L33 C_PEG_TX#0 C494 .1U/10V_4 PEG_TX#0 AK23
FDI_TXP5 FDI_TX[4] PEG_TX#[0] C_PEG_TX#1 C491 .1U/10V_4 PEG_TX#1 BPM#[6]
E20 FDI_TX[5] PEG_TX#[1] M35 AH23 BPM#[7] DBR# AN25 XDP_DBRESET# [9]
FDI_TXP6 F20 M33 C_PEG_TX#2 C483 .1U/10V_4 PEG_TX#2
FDI_TXP7 FDI_TX[6] PEG_TX#[2] C_PEG_TX#3 C471 .1U/10V_4 PEG_TX#3 IC,AUB_CFD_rPGA,R1P0
G19 FDI_TX[7] PEG_TX#[3] M30
L31 C_PEG_TX#4 C470 .1U/10V_4 PEG_TX#4
PEG_TX#[4] C_PEG_TX#5 C466 .1U/10V_4 PEG_TX#5
[9] FDI_FSYNC0 F17 FDI_FSYNC[0] PEG_TX#[5] K32
E17 M29 C_PEG_TX#6 C467 .1U/10V_4 PEG_TX#6
[9] FDI_FSYNC1 FDI_FSYNC[1] PEG_TX#[6]
J31 C_PEG_TX#7 C465 .1U/10V_4 PEG_TX#7
PEG_TX#[7] C_PEG_TX#8 C463 .1U/10V_4 PEG_TX#8
[9] FDI_INT C17 FDI_INT PEG_TX#[8] K29
H30 C_PEG_TX#9 C460 .1U/10V_4 PEG_TX#9
PEG_TX#[9] C_PEG_TX#10 C461 .1U/10V_4 PEG_TX#10
[9] FDI_LSYNC0 F18 FDI_LSYNC[0] PEG_TX#[10] H29
D17 F29 C_PEG_TX#11 C455 .1U/10V_4 PEG_TX#11
[9] FDI_LSYNC1 FDI_LSYNC[1] PEG_TX#[11] +1.1V_VTT
E28 C_PEG_TX#12 C457 .1U/10V_4 PEG_TX#12
PEG_TX#[12] C_PEG_TX#13 C451 .1U/10V_4 PEG_TX#13
PEG_TX#[13] D29
D27 C_PEG_TX#14 C456 .1U/10V_4 PEG_TX#14 RESET_OBS# R168 *68
PEG_TX#[14] C_PEG_TX#15 C448 .1U/10V_4 PEG_TX#15
PEG_TX#[15] C26
Discrete Only L34 C_PEG_TX0 C492 .1U/10V_4 PEG_TX0
PEG_TX[0..15] [14]
XDP_TDO_R R430 51_4
JTAG MAPPING
R24 FDI_INT PEG_TX[0] C_PEG_TX1 C489 .1U/10V_4 PEG_TX1 H_CATERR# R369 49.9/F_4
PEG_TX[1] M34
R23 *0_4 FDI_FSYNC0 M32 C_PEG_TX2 C480 .1U/10V_4 PEG_TX2 H_PROCHOT# R368 68_4
*1K/F_4 R26 *0_4 FDI_FSYNC1 PEG_TX[2] C_PEG_TX3 C478 .1U/10V_4 PEG_TX3 CPU_PLTRST# R46 *68 XDP_TDI_M
PEG_TX[3] L30
R20 *0_4 FDI_LSYNC0 M31 C_PEG_TX4 C477 .1U/10V_4 PEG_TX4 XDP_TMS R62 *51
FDI_LSYNC1 PEG_TX[4] C_PEG_TX5 C468 .1U/10V_4 PEG_TX5 XDP_TDI_R R445 *51 R433
PEG_TX[5] K31
M28 C_PEG_TX6 C469 .1U/10V_4 PEG_TX6 XDP_PREQ# R85 *51
R19 FDI_FSYNC can PEG_TX[6] C_PEG_TX7 C462 .1U/10V_4 PEG_TX7
C PEG_TX[7] H31 C
*1K/F_4 gang all these K28 C_PEG_TX8 C464 .1U/10V_4 PEG_TX8 XDP_TCLK R61 *51 *0_4
PEG_TX[8] C_PEG_TX9 C458 .1U/10V_4 PEG_TX9
4 signals PEG_TX[9] G30
G29 C_PEG_TX10 C459 .1U/10V_4 PEG_TX10 XDP_TDO_M
together and PEG_TX[10]
F28 C_PEG_TX11 C452 .1U/10V_4 PEG_TX11
tie them with PEG_TX[11] C_PEG_TX12 C454 .1U/10V_4 PEG_TX12
PEG_TX[12] E27
only one 1K D28 C_PEG_TX13 C450 .1U/10V_4 PEG_TX13
resistor to GND PEG_TX[13] C_PEG_TX14 C453 .1U/10V_4 PEG_TX14 +3V XDP_TRST# R82 51_4
PEG_TX[14] C27
( Check list C25 C_PEG_TX15 C449 .1U/10V_4 PEG_TX15
PEG_TX[15] U8
1.0 ).
5
IC,AUB_CFD_rPGA,R1P0
R127
MC74VHC1G08DFT2G 2 Scan Chain STUFF -> R97, R89, R90
4 H_VTTPW RGD (Default) NO STUFF -> R84, R512
[19,27,31,32,33,35,36] HW PG 1
2K/F_4 R128 CPU Only STUFF -> R97, R84
3
+3VS5 1K/F_4 NO STUFF -> R89, R512, R90
1K/F_4
+1.5VSUS_CPU DRAM_PW G1 2 Q74
MMBT3904-7-F +1.5VSUS_CPU
R237
1
1.33K/F_4
2
DRAM_PW G4 1.1V
D
R33 D
976/F_4
3
R233
+1.1V_VTT 1K/F_4 DRAM_PW G2 2 Q75 1 3 PM_DRAM_PW RGD
MMBT3904-7-F
Use a voltage divider with VDDQ
1
Q73
R50 DTC144EUA
R38
3K/F_4
(1.5V) rail (ON in S3) and
resistor combination of 4.75K (to
PROJECT : SW9
3K/F_4 VDDQ)/12K(to GND) to generate the Quanta Computer Inc.
required voltage.
Note: CRB uses a 3.3V (always ON) Size Document Number Rev
[5,10,11,31,34,35] +1.1V_VTT rail with 2K and 1K combination. Custom 1A
[5,12,13,36,37,39] +1.5VSUS PROCESSER 1/4(HOST&PEX)
[2,7,8,9,10,11,12,13,19,20,21,22,23,24,25,26,27,28,29,30,34,37,39] +3V
Date: W ednesday, December 02, 2009 Sheet 3 of 44
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
D D
PROJECT : SW9
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
PROCESSER 2/4(DDR)
Date: W ednesday, December 02, 2009 Sheet 4 of 44
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
+VCORE
3/25
C485
C513
C523
10U/6.3V_8
10U/6.3V_8
10U/6.3V_8
AG35
AG34
AG33
U22F
VCC1
VCC2
VCC3
VTT0_1
VTT0_2
VTT0_3
AH14
AH12
AH11 C522
C509
10U/6.3V_8
10U/6.3V_8
+1.1V_VTT
Rc
DIS
NA
UMA
4.7K
05
AG32 AH10
C503 10U/6.3V_8 AG31
VCC4 VTT0_4
J14 C482 10U/6.3V_8 Rd NA 0 ohm
C504 10U/6.3V_8 VCC5 VTT0_5 C39 10U/6.3V_8
AG30 J13
C502 10U/6.3V_8 AG29
VCC6 VTT0_6
H14 C33 10U/6.3V_8 U22G Re NA 0 ohm
C500 10U/6.3V_8 VCC7 VTT0_7 C446 10U/6.3V_8
AG28 H12
A C501 10U/6.3V_8 AG27
VCC8 VTT0_8
G14 C32 10U/6.3V_8 AT21
Rf NA NA A
C484 10U/6.3V_8 VCC9 VTT0_9 C967 22U VAXG1
SENSE
LINES
AG26 VCC10 VTT0_10 G13 AT19 VAXG2 VAXG_SENSE AR22 VCC_AXG_SENSE [31]
C487 10U/6.3V_8 AF35 G12 C38 22U AT18 AT22 VSS_AXG_SENSE [31]
C488 10U/6.3V_8 VCC11 VTT0_11 C443 22U Please note that +VCC_GFX_CORE VAXG3 VSSAXG_SENSE
AF34 VCC12 VTT0_12 G11 AT16 VAXG4
AF33 F14 C476 10U_NC should be 1.05V in Auburndale AR21
C519 .1U/10V_4 VCC13 VTT0_13 C486 10U_NC VAXG5
AF32 VCC14 VTT0_14 F13 AR19 VAXG6
C520 .1U/10V_4 AF31 F12 AR18
GRAPHICS VIDs
VCC15 VTT0_15 VAXG7
AF30 VCC16 VTT0_16 F11 AR16 VAXG8 GFX_VID[0] AM22 GFXVR_VID_0 [31]
AF29 VCC17 VTT0_17 E14 AP21 VAXG9 GFX_VID[1] AP22 GFXVR_VID_1 [31]
AF28 VCC18 VTT0_18 E12 AP19 VAXG10 GFX_VID[2] AN22 GFXVR_VID_2 [31]
AF27 VCC19 VTT0_19 D14 AP18 VAXG11 GFX_VID[3] AP23 GFXVR_VID_3 [31]
AF26 VCC20 VTT0_20 D13 AP16 VAXG12 GFX_VID[4] AM23 GFXVR_VID_4 [31]
AD35 VCC21 VTT0_21 D12 AN21 VAXG13 GFX_VID[5] AP24 GFXVR_VID_5 [31]
AD34 D11 AN19 AN24
GRAPHICS
AD33 C14 AN18 PV
VCC23 VTT0_23 VAXG15 GFXVR_EN
AD32 VCC24 VTT0_24 C13 AN16 VAXG16 Rc R94 470/F_4
AD31 VCC25 VTT0_25 C12 AM21 VAXG17 GFX_VR_EN AR25 GFXVR_EN [31]
AD30 C11 AM19 AT25 Rd R93 0_4 GFXVR_DPRSLPVR [31]
VCC26 VTT0_26 VAXG18 GFX_DPRSLPVR R92 0_4
AD29 VCC27 VTT0_27 B14 AM18 VAXG19 GFX_IMON AM24 Re R91
GFXVR_IMON [31]
AD28 VCC28 VTT0_28 B12 +VGACORE_UMA AM16 VAXG20 Rf
AD27 A14 C306 22U AL21 *1K/F_4
VCC29 VTT0_29 C123 22U VAXG21
AD26 VCC30 VTT0_30 A13 AL19 VAXG22
AC35 A12 C124 10U/6.3V_8 AL18
VCC31 VTT0_31 C125 10U/6.3V_8 VAXG23
AC34 VCC32 VTT0_32 A11 AL16 VAXG24
AC33 VCC33 AK21 VAXG25 VDDQ1 AJ1
- 1.5V RAILS
AC32 AK19 AF1 C52 1U/6.3V_4
VCC34 VAXG26 VDDQ2 C49 1U/6.3V_4
AC31 VCC35 AK18 VAXG27 VDDQ3 AE7
AC30 AF10 +1.1V_VTT AK16 AE4 C54 1U/6.3V_4
VCC36 VTT0_33 C445 22U VAXG28 VDDQ4 C45 1U/6.3V_4
POWER
AC29 VCC37 VTT0_34 AE10 AJ21 VAXG29 VDDQ5 AC1
AC28 AC10 C442 22U AJ19 AB7 C46 1U/6.3V_4 +1.5VSUS_CPU +1.5VSUS
B VCC38 VTT0_35 VAXG30 VDDQ6 B
CPU CORE SUPPLY
+
AA35 VCC41 VTT0_38 W10 AH21 VAXG33 VDDQ9 W7
AA34 VCC42 VTT0_39 U10 VTT Rail Values are Ra 0 ohm NA AH19 VAXG34 VDDQ10 W4
AA33 T10 AH18 U1
AA32
VCC43 VTT0_40
J12
Auburndal VTT=1.05V AH16
VAXG35 VDDQ11
T7
VCC44 VTT0_41 VAXG36 VDDQ12
D
Clarksfield VTT=1.1V
POWER
DDR3
VCC47 VTT0_44 VDDQ15
AA28 7/22 N4
G
VCC48 VDDQ16 C788
AA27 VCC49 VDDQ17 L1
FDI
AA26 AN33 H_PSI# [34] +1.1V_VTT J24 H1 10/05 .1U/25V_4
4
VCC50 PSI# C496 22U VTT1_45 VDDQ18 Q3
Y35 VCC51 J23 VTT1_46
Y34 C441 22U H25 [37] MAIND AON6426L
VCC52 VTT1_47
Y33 VCC53 VID[0] AK35 CPU_VID0 [34]
Y32 VCC54 VID[1] AK33 CPU_VID1 [34]
Y31 VCC55 VID[2] AK34 CPU_VID2 [34] VTT0_59 P10 +1.1V_VTT
Y30 AL35 CPU_VID3 [34] +1.1V_VTT K26 N10 C505 10U/6.3V_8
VCC56 VID[3] VTT1_48 VTT0_60
1.1V
VCC59 VID[6] C475 22U VTT1_51 VTT1_63
Y26 VCC60 PROC_DPRSLPVR AM34 DPRSLPVR [34] H27 VTT1_52 VTT1_64 J20
V35 VCC61 G28 VTT1_53 VTT1_65 J18
V34 VCC62 G27 VTT1_54 VTT1_66 H21
V33 VCC63 G26 VTT1_55 VTT1_67 H20
V32 VCC64 VTT_SELECT G15 H_VTTVID1 [35] F26 VTT1_56 VTT1_68 H19
V31 VCC65 E26 VTT1_57
V30 VCC66 H_VTTVID1=Low, 1.1V E25 VTT1_58
V29 L26 +1.8V
1.8V
C VCC67 H_VTTVID1=High, 1.05V VCCPLL1 C
V28 L27 C474 22U
VCC68 VCCPLL2 C495 4.7U/6.3V_6
V27 VCC69 VCCPLL3 M26
V26 C497 2.2U/6.3V_6 +1.5VSUS_CPU
VCC70 C472 1U/6.3V_4
U35 VCC71
U34 IC,AUB_CFD_rPGA,R1P0 C473 1U/6.3V_4
VCC72
U33 AN35
SENSE LINES
3
R34 VCC82
R33 R379 100/F_4
VCC83
R32 VCC84
R31 CPU_VID0 R399 1K/F_4 +1.1V_VTT [12,37] MAINON_G 2
VCC85 R382 *1K/F_4 Q31
R30 VCC86
R29 CPU_VID1 R400 1K/F_4 BSS138
VCC87 R383 *1K/F_4
R28 VCC88
R27 CPU_VID2 R406 1K/F_4
1
VCC89 R409 *1K/F_4
R26 VCC90
P35 CPU_VID3 R405 *1K/F_4
VCC91 R408 1K/F_4
P34 VCC92
P33 CPU_VID4 R412 *1K/F_4
VCC93 R416 1K/F_4
P32 VCC94
P31 CPU_VID5 R429 1K/F_4
VCC95 R425 *1K/F_4
D P30 VCC96 D
P29 CPU_VID6 R411 *1K/F_4
VCC97 R415 1K/F_4
P28 VCC98
P27 DPRSLPVR R420 1K/F_4
VCC99 R423 *1K/F_4
P26 VCC100 H_PSI# R417 *1K/F_4
IC,AUB_CFD_rPGA,R1P0 R419 1K/F_4
PROJECT : SW9
HFM_VID : Max 1.4V
Quanta Computer Inc.
LFM_VID : Min 0.65V [34] +VCORE
[3,10,11,31,34,35] +1.1V_VTT Size Document Number Rev
Custom 1A
[12,13,36,37,39] +1.5VSUS PROCESSER 3/4(POWER)
[10,11,33,37,39] +1.8V
Date: W ednesday, December 02, 2009 Sheet 5 of 44
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
RESERVED
VSS26 VSS106 VSS187 RSVD3 RSVD65
AM29 VSS27 VSS107 Y8 F30 VSS188 AL22 RSVD4 RSVD_TP_66 AA5
AM27 VSS28 VSS108 Y4 F27 VSS189 AJ33 RSVD5 RSVD_TP_67 AA4
AM25 VSS29 VSS109 Y2 F25 VSS190 AG9 RSVD6 RSVD_TP_68 R8
AM20 VSS30 VSS110 W35 F22 VSS191 M27 RSVD7 RSVD_TP_69 AD3
AM17 VSS31 VSS111 W34 F19 VSS192 L28 RSVD8 RSVD_TP_70 AD2
AM14 VSS32 VSS112 W33 F16 VSS193
B AM11 VSS33 VSS113 W32 E35 VSS194 G25 RSVD11 RSVD_TP_71 AA2 B
AM8 VSS34 VSS114 W31 E32 VSS195 G17 RSVD12 RSVD_TP_72 AA1
AM5 VSS35 VSS115 W30 E29 VSS196 E31 RSVD13 RSVD_TP_73 R9
AM2 VSS36 VSS116 W29 E24 VSS197 E30 RSVD14 RSVD_TP_74 AG7
AL34 W28 E21 B19 AE3
AL31
AL23
VSS37
VSS38
VSS39
VSS VSS117
VSS118
VSS119
W27
W26
E18
E13
VSS198
VSS199
VSS200
VSS R21 0_4 TP_RSVD17_R
A19
A20
RSVD15
RSVD16
RSVD17
RSVD_TP_75
RSVD_TP_76
RSVD_TP_77
V4
V5
AL20 W6 E11 R22 0_4 TP_RSVD18_R B20 N2
VSS40 VSS120 VSS201 RSVD18 RSVD_TP_78
AL17 VSS41 VSS121 V10 E8 VSS202 U9 RSVD19 RSVD_TP_79 AD5
AL12 VSS42 VSS122 U8 E5 VSS203 T9 RSVD20 RSVD_TP_80 AD7
AL9 VSS43 VSS123 U4 E2 VSS204
AL6 VSS44 VSS124 U2 D33 VSS205 AC9 RSVD21 RSVD_TP_81 W3
AL3 VSS45 VSS125 T35 D30 VSS206 AB9 RSVD22 RSVD_TP_82 W2
AK29 VSS46 VSS126 T34 D26 VSS207 C1 RSVD_NCTF_23 RSVD_TP_83 N3
AK27 VSS47 VSS127 T33 D9 VSS208 A3 RSVD_NCTF_24 RSVD_TP_84 AE5
AK25 VSS48 VSS128 T32 D6 VSS209 J29 RSVD26 RSVD_TP_85 AD9
AK20 VSS49 VSS129 T31 D3 VSS210 J28 RSVD27
AK17 VSS50 VSS130 T30 C34 VSS211 A34 RSVD_NCTF_28
AJ31 VSS51 VSS131 T29 C32 VSS212 A33 RSVD_NCTF_29
AJ23 VSS52 VSS132 T28 C29 VSS213 C35 RSVD_NCTF_30 VSS AP34
AJ20 VSS53 VSS133 T27 C28 VSS214
AJ17 VSS54 VSS134 T26 C24 VSS215 B35 RSVD_NCTF_31
AJ14 VSS55 VSS135 T6 C22 VSS216 AJ13 RSVD32
AJ11 VSS56 VSS136 R10 C20 VSS217 AJ12 RSVD33
AJ8 VSS57 VSS137 P8 C19 VSS218 AH25 RSVD34
AJ5 VSS58 VSS138 P4 C16 VSS219 AK26 RSVD35
AJ2 VSS59 VSS139 P2 B31 VSS220 AL26 RSVD36
AH35 VSS60 VSS140 N35 B25 VSS221 AR2 RSVD_NCTF_37
AH34 VSS61 VSS141 N34 B21 VSS222 AJ26 RSVD38
C AH33 VSS62 VSS142 N33 B18 VSS223 AJ27 RSVD39 C
AH32 VSS63 VSS143 N32 B17 VSS224 AP1 RSVD_NCTF_40
AH31 VSS64 VSS144 N31 B13 VSS225
AH30 N30 B11 IC,AUB_CFD_rPGA,R1P0
VSS65 VSS145 VSS226
AH29 VSS66 VSS146 N29 B8 VSS227
AH28 VSS67 VSS147 N28 B6 VSS228
AH27 VSS68 VSS148 N27 B4 VSS229
AH26 VSS69 VSS149 N26 A29 VSS230
AH20 VSS70 VSS150 N6 A27 VSS231
AH17 VSS71 VSS151 M10 A23 VSS232
AH13 VSS72 VSS152 L35 A9 VSS233
AH9 VSS73 VSS153 L32
AH6 VSS74 VSS154 L29 AT35 VSS_NCTF1
AH3 VSS75 VSS155 L8 AT1 VSS_NCTF2
AG10 L5 AR34
NCTF
1 0
CFG[ 1:0 ] - PCI_Epress Configuration Select
D CFG4 Enabled; An external Display port * 11= 1 x 16 PEG D
(Display Port Disabled; No Physical Display Port device is connected to the Embedded * 10= 2 x 8 PEG
Presence) attached to Embedded Diplay Port Display port
The Clarkfield processor's PCI Express interface may
not meet PCI Express 2.0 jitter specifications. Intel CFG0
recommends placing a 3.01K +/- 5% pull down resistor to (PCI-Epress Single PEG Bifurcation enabled
PROJECT : SW9
VSS on CFG[7] pin for both rPGA and BGA components.
This pull down resistor should be removed when this
Configuration Select) Quanta Computer Inc.
issue is fixed. CFG3
Normal Operation Lane Numbers Reversed Size Document Number Rev
(PCI-Epress Static Custom
PROCESSER 4/4(GND) 1A
Lane Reversal) 15 -> 0 , 14 -> 1
Date: W ednesday, December 02, 2009 Sheet 6 of 44
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
C582 18P/50V_4
UMA LVDS & CRT signals 07
2
IBEX PEAK-M (HDA,JTAG,SATA) IBEX PEAK-M (LVDS,DDI)
1
A Y6 R506 A
U29D
32.768KHZ 10M_4 U29A
DISPLAY PORT B
AT43 AU38 DPB_HPD_Q
ACZ_BCLK LVD_VREFH DDPB_HPD
A30 HDA_BCLK SATA1RXN AH6 SATA_RXN1_C [25] AT42 LVD_VREFL
ACZ_SYNC D29 AH5 SATA_RXP1_C [25] BD42 DPB_LANE0_N
HDA_SYNC SATA1RXP DDPB_0N DPB_LANE0_P
[10,22] SPKR P1 AH9 SATA_TXN1 [25] LVDS--A BC42
DISPLAY PORT C
SATA3TXP AF1 [19] LA_DATAP2 AY49 LVDSA_DATA2 DDPC_AUXN BE44
R234 51_4 PCH_JTAG_TCK_BUF M3 AV48 BD44
JTAG_TCK LVDSA_DATA3 DDPC_AUXP
SATA4RXN AD9 DDPC_HPD AV40
PCH_JTAG_TMS
TP18 K3 JTAG_TMS SATA4RXP AD8
AD6 AP48
LVDS--B BE40
SATA4TXN [19] LB_CLK# LVDSB_CLK# DDPC_0N
PCH_JTAG_TDI K1 AD5 AP47 BD40
TP17 JTAG_TDI JTAG SATA4TXP [19] LB_CLK LVDSB_CLK DDPC_0P
DDPC_1N BF41
PCH_JTAG_TDO J2 AD3 SATA_RXN5_C [26] [19] LB_DATAN0 AY53 BH41
TP11 JTAG_TDO SATA5RXN LVDSB_DATA#0 DDPC_1P
SATA5RXP AD1 SATA_RXP5_C [26] [19] LB_DATAN1 AT49 LVDSB_DATA#1 DDPC_2N BD38
PCH_JTAG_RST# J4 AB3 [19] LB_DATAN2 AU52 BC38
TP14 TRST# SATA5TXN SATA_TXN5 [26] LVDSB_DATA#2 DDPC_2P
SATA5TXP AB1 SATA_TXP5 [26] [19] LB_DATAP0 AT53 LVDSB_DATA#3 DDPC_3N BB36
[19] LB_DATAP1 DDPC_3P BA36
AY51
SPI_CLK_R BA2 AF16
E-SATA [19] LB_DATAP2
AT48
LVDSB_DATA0
U50
SPI_CLK SATAICOMPO LVDSB_DATA1 DDPD_CTRLCLK
AU50 LVDSB_DATA2 DDPD_CTRLDATA U52
SPI_CS0#_R AV3 AF15 SATA_COMP R157 37.4/F_4 +1.05V CRT_B_PCH R444 0_4 CRT_B_1 AT51
SPI_CS0# SATAICOMPI LVDSB_DATA3
DISPLAY PORT D
R454 150/F_4 BC46
SPI_CS1# SATA_LED# CRT_G_PCH R443 0_4 CRT_G_1 AA52 DDPD_AUXN
AY3 T3 BD46
TP13 SPI_CS1# SPI SATALED# SATA_LED# [23]
R453 150/F_4 AB53
CRT_BLUE
CRT_GREEN
DDPD_AUXP
DDPD_HPD AT38
CRT_R_PCH R451 0_4 CRT_R_1 AD53
SPI_SI_R R452 150/F_4 CRT_RED
AY1 SPI_MOSI CRT DDPD_0N BJ40
Y9 SATA_DET0# DDCCLK_PCH R448 0_4 DDCCLK_INT V51 BG40
SPI_SO (+3V) SATA0GP / GPIO21 SATA_DET1# DDCDATA_PCH R447 0_4 DDCDATA_INT V53 CRT_DDC_CLK DDPD_0P
AV1 SPI_MISO (+3V_S5) SATA1GP / GPIO19 V1 CRT_DDC_DATA DDPD_1N BJ38
DDPD_1P BG38
IbexPeak-M_Rev1_0 HSYNC_PCH R100 0_4 HSYNC Y53 BF37
VSYNC_PCH R98 0_4 VSYNC CRT_HSYNC DDPD_2N
Y51 CRT_VSYNC DDPD_2P BH37
DDPD_3N BE36
C
R105 1K/F_4 DAC_IREF AD48 BD36 C
DAC_IREF DDPD_3P
AB51 CRT_IRTN
+3V
UMA HDMI signals IbexPeak-M_Rev1_0
Q24 [16,20] CRT_B R49 0_4 CRT_B_PCH
2
For AUDIO 4M byte SPI ROM for ME 2M byte SPI ROM for ME
[22] ACZ_RST#_AUDIO
[22] ACZ_SDOUT_AUDIO
R480
R485
C571
33_4 ACZ_RST#
33_4 ACZ_SDOUT
*10P/50V_4
RTC +RTC_CELL
2M byte SPI ROM for ME MXIC AKE39FP0Z00 MXIC: AKE38FP0Z00
+3VPCU RB500V-40 CR2 C303 1U/6.3V_4 12/1 WINBOND: AKE38FP0N01
[22] ACZ_SYNC_AUDIO R495 33_4 ACZ_SYNC U32 AIT: AKE38ZN0800
C580 *10P/50V_4 +3VRTC_2 R190 20K/F_4 RTC_RST# +3V 8 1 SPI_CS0# R528 0_4 SPI_CS0#_R
RB500V-40 CR1 C304 1U/6.3V_4 VDD CE# SPI_CLK R550 0_4 SPI_CLK_R
SCK 6
D [22] BIT_CLK_AUDIO R145 33_4 ACZ_BCLK 1 2 5 SPI_SI R551 0_4 SPI_SI_R SPI ROM Socket D
C221 10P/50V_4 J1 *SHORT_ PAD1 SPI_HOLD# 7 SI SPI_SO_R R527 0_4 SPI_SO
HOLD# SO 2
R194 20K/F_4 SRTC_RST# R542 10K/F_4 DG008000031
C305 1U/6.3V_4 C594 .1U/10V_4 4 3 SPI_W P# R553 10K/F_4 +3V
R479 33_4 ACZ_RST# VSS WP#
[23] ACZ_RST#_MDC 1 2
For MDC [23] ACZ_SDOUT_MDC R489 33_4 ACZ_SDOUT J2 *SHORT_ PAD1
C573 *10P/50V_4 R186 1M_4 SM_INTRUDER# 2M SPI ROM
AKE39FP0Z00 PROJECT : SW9
[23] ACZ_SYNC_MDC R491
C576
33_4 ACZ_SYNC
*10P/50V_4 R205 1K/F_4 +3VRTC_1 1
CN13
2
X6179-10XXXX-8P-SOCKET Quanta Computer Inc.
R140 33_4 ACZ_BCLK 20 mil BAT_CONN [2,8,9,11,27,31,33,34,39] +1.05V Size Document Number Rev
[23] BIT_CLK_MDC Custom
C211 *10P/50V_4 [2,3,8,9,10,11,12,13,19,20,21,22,23,24,25,26,27,28,29,30,34,37,39] +3V PCH 1/5 (SATA,HDA,LPC) 1A
[19,21,23,26,27,28,31,32,33,35,37,38,39] +3VPCU
Date: W ednesday, December 02, 2009 Sheet 7 of 44
1 2 3 4 5 6 7 8
5 4 3 2 1
VSS[255] VSS[355]
H34 AK39 10K/F_4 100K/F_4 *100K/F_4
2
VSS[256] VSS[356]
H38 VSS[257] VSS[366] AV14
H42 +3V R247 0_4
VSS[258]
IbexPeak-M_Rev1_0 PROJECT : SW9
R210 Quanta Computer Inc.
2
10K/F_4
Q9 2N7002E [3,9,10,11,14,37] +3VS5
PCLK_SMB 3 1 [2,7,9,11,27,31,33,34,39] +1.05V Size Document Number Rev
CGCLK_SMB [2,12,13] Custom
[2,3,7,9,10,11,12,13,19,20,21,22,23,24,25,26,27,28,29,30,34,37,39] +3V PCH 2/5 (PCIE, SMBUS,CK) 1A
+3VS5
PROJECT : SW9
Quanta Computer Inc.
[2,7,8,11,27,31,33,34,39] +1.05V
[2,3,7,8,10,11,12,13,19,20,21,22,23,24,25,26,27,28,29,30,34,37,39] +3V Size Document Number Rev
Custom 1A
[3,8,10,11,14,37] +3VS5 PCH 3/5(PCI,ONFI,USB,DMI)
Date: W ednesday, December 02, 2009 Sheet 9 of 44
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
SIO_EXT_SMI#
Y3
U29F
BMBUSY# / GPIO0(+3V)
Ibex-M
6 OF 10 CLKOUT_PCIE6N
CLKOUT_PCIE6P
AH45
AH46
AB16
AA19
U29H
VSS[0]
VSS[1]
VSS[80]
VSS[81]
AK30
AK31 [9] GNT3# R470
10
*10K_NC
[27] SIO_EXT_SMI# C38 TACH1 / GPIO1 (+3V) AA20 VSS[2] VSS[82] AK32
AA22 VSS[3] VSS[83] AK34
SIO_EXT_SCI# D37 AM19 AK35 A16 swap override Strap/Top-Block
[27] SIO_EXT_SCI# TACH2 / GPIO6 (+3V) VSS[4] VSS[84]
CLKOUT_PCIE7N AF48 AA24 VSS[5] VSS[85] AK38 Swap Override jumper
J32 AF47 AA26 AK43
A
[25] BT_OFF# TACH3 / GPIO7 (+3V) GPIO CLKOUT_PCIE7P
AA28
VSS[6]
VSS[7]
VSS[86]
VSS[87] AK46 A
11/17 ACCLED_EN F10 AA30 AK49 Low = A16 swap
GPIO8(+3V_S5) MISC AA31
VSS[8]
VSS[9]
VSS[88]
VSS[89] AK5 override/Top-Block
LAN_DISABLE_R# K9 U2 GATEA20 [27] AA32 AK8 GNT3# Swap Override enabled
LAN_PHY_PWR_CTRL / GPIO12(+3V_S5) A20GATE VSS[10] VSS[90]
AB11 VSS[11] VSS[91] AL2 High = Default
[28] RF_OFF# R302 *0_4/S T7 AB15 AL52
short0402 GPIO15(+3V_S5) VSS[12] VSS[92]
AB23 VSS[13] VSS[93] AM11
SATA4GP AA2 AM3 CLK_CPU_BCLK# [3] AB30 BB44
SATA4GP / GPIO16(+3V) CLKOUT_BCLK0_N/CLKOUT_PCIE8N VSS[14] VSS[94]
AB31 VSS[15] VSS[95] AD24
[28] W AN_OFF# R133 *0_4/S PCH_GPIO17 F38 AM1 CLK_CPU_BCLK [3] AB32 AM20
short0402 TACH0 / GPIO17(+3V) CLKOUT_BCLK0_P/CLKOUT_PCIE8P VSS[16] VSS[96] SV_SET_UP R198 10K/F_4
AB39 VSS[17] VSS[97] AM22 +3V
BIOS_REC Y7 BG10 PCH_PECI_R R516 0_4 H_PECI [3] AB43 AM24
SCLOCK / GPIO22(+3V) PECI VSS[18] VSS[98]
GPIO27 left NC for AB47 VSS[19] VSS[99] AM26
internal VR. TP3 GPIO27 AB12 T1 RCIN# [27] AB5 AM28
GPIO27(+3V_S5) RCIN# VSS[20] VSS[100]
AB8 BA42
TP_PCH_GPIO28 V13 GPIO28 (+3V_S5)
CPU PROCPWRGD BE10 H_PW RGOOD [3] AC2
VSS[21]
VSS[22]
VSS[101]
VSS[102] AM30 SV_SET_UP 1-X High = Strong (Default)
AC52 VSS[23] VSS[103] AM31
[9] SATA2GP SATA2GP AB7 BD10 PCH_THRMTRIP#_R PM_THRMTRIP# [3,27] AD11 AM32
SATA2GP / GPIO36 (+3V) THRMTRIP# R169 56.2/F_4 AD12
VSS[24] VSS[104]
AM34
SATA3GP VSS[25] VSS[105]
[9] SATA3GP AB13 SATA3GP / GPIO37 TP1 BA22 +1.1V_VTT AD16 VSS[26] VSS[106] AM35
(+3V) AW22 R165 56.2/F_4 AD23 AM38
TP2 VSS[27] VSS[107] GNT0# R106 *1K/F_4
[19] LCD_BK P3 SDATAOUT0 / GPIO39(+3V) TP3 BB22 AD30 VSS[28] VSS[108] AM39 [9] GNT0#
AY45 AD31 AM42 [9] GNT1# GNT1# R107 *1K/F_4
TP4 VSS[29] VSS[109]
TP5 AY46 AD32 VSS[30] VSS[110] AU20
[12,13] PS_S3RSTGATE PS_S3RSTGATE F1 AV43 AD34 AM46
PCIECLKRQ7# / GPIO46(+3V_S5) TP6 VSS[31] VSS[111]
TP7 AV45 AU22 VSS[32] VSS[112] AV22
SV_SET_UP AB6 AF13 +3V AD42 AM49
SDATAOUT1 / GPIO48 (+3V) TP8 VSS[33] VSS[113]
TP9 M18 AD46 VSS[34] VSS[114] AM7 Boot BIOS Strap
[21] 5158_RST_R# R242 SATA5GP AA4 N18 AD49 AA50
*0_4 SATA5GP / GPIO49 (+3V) TP10 BIOS_REC R197 10K/F_4 VSS[35] VSS[115] PCI_GNT0# GNT#1 Boot BIOS Location
B RSVD TP11 AJ24
AK41 BIOS RECOVERY
AD7
AE2
VSS[36] VSS[116] BB10
AN32
B
TP12 VSS[37] VSS[117] LPC
TP13 AK42 HIGH : DISABLE AE4 VSS[38] VSS[118] AN50 0 0
TP14 M32 LOW : ENABLE AF12 VSS[39] VSS[119] AN52
BOARD_ID0 H10 N32 Y13 AP12 0 1 Reserved (NAND)
BOARD_ID1 GPIO24 (+3V_S5) TP15 VSS[40] VSS[120]
H3 PCIECLKRQ6# / GPIO45(+3V_S5) TP16 M30 AH49 VSS[41] VSS[121] AP42
BOARD_ID2 F8 N30 AU4 AP46 1 0 PCI
BOARD_ID3 GPIO57 (+3V_S5) TP17 VSS[42] VSS[122]
M11 STP_PCI# / GPIO34 TP18 H12 AF35 VSS[43] VSS[123] AP49
BOARD_ID4 V6 (+3V) AA23 AP13 AP5 1 1 SPI
BOARD_ID5 SATACLKREQ# / GPIO35(+3V) TP19 +3VS5 VSS[44] VSS[124]
V3 AB45 AN34 AP8
SLOAD / GPIO38 (+3V) NC_1
AB38 AF45
VSS[45] VSS[125]
AR2
NC_2 VSS[46] VSS[126]
NC_3 AB42 AF46 VSS[47] VSS[127] AR52
AB41 PS_S3RSTGATE R554 10K/F_4 AF49 AT11
+3VS5 NC_4 VSS[48] VSS[128]
NC_5 T39 AF5 VSS[49] VSS[129] BA12
INIT3_3V# P6 AF8 VSS[50] VSS[130] AH48 11/17
C10 +3V AG2 AT32 R521 *1K/F_4
TP24 VSS[51] VSS[131] [9] NV_ALE
R176 10K/F_4 TP_PCH_GPIO28 AG52 AT36 [9] NV_CLE R520 *1K/F_4 +1.8V
VSS[52] VSS[132]
A4 VSS_NCTF_1 VSS_NCTF_16 BH2 AH11 VSS[53] VSS[133] AT41
A49 VSS_NCTF_2 VSS_NCTF_17 BH52 AH15 VSS[54] VSS[134] AT47
A5 BH53 RCIN# R539 10K/F_4 AH16 AT7
VSS_NCTF_3 VSS_NCTF_18 GATEA20 R215 10K/F_4 VSS[55] VSS[135]
A50
A52
VSS_NCTF_4 NCTF VSS_NCTF_19 BJ1
BJ2 SATA2GP R206 10K/F_4
AH24
AH32
VSS[56] VSS[136] AV12
AV16 Danbury Technology Enabled
VSS_NCTF_5 VSS_NCTF_20 SATA3GP R163 10K/F_4 VSS[57] VSS[137]
A53 VSS_NCTF_6 VSS_NCTF_21 BJ4 AV18 VSS[58] VSS[138] AV20
B2 BJ49 SATA4GP R531 10K/F_4 AH43 AV24 High = Enable
VSS_NCTF_7 VSS_NCTF_22 SATA5GP R530 10K/F_4 VSS[59] VSS[139] NV_ALE
B4 VSS_NCTF_8 VSS_NCTF_23 BJ5 AH47 VSS[60] VSS[140] AV30
B52 BJ50 BMBUSY# R533 10K/F_4 AH7 AV34 Low = Disable
VSS_NCTF_9 VSS_NCTF_24 SIO_EXT_SMI# R130 10K/F_4 VSS[61] VSS[141]
B53 VSS_NCTF_10 VSS_NCTF_25 BJ52 AJ19 VSS[62] VSS[142] AV38
BE1 BJ53 SIO_EXT_SCI# R129 10K/F_4 AJ2 AV42
VSS_NCTF_11 VSS_NCTF_26 BT_OFF# R141 10K/F_4 VSS[63] VSS[143]
BE53 VSS_NCTF_12 VSS_NCTF_27 D1 AJ20 VSS[64] VSS[144] AV46
C BF1 D2 LCD_BK R540 10K/F_4 AJ22 AV49 DMI Termination Voltage C
VSS_NCTF_13 VSS_NCTF_28 VSS[65] VSS[145]
BF53 VSS_NCTF_14 VSS_NCTF_29 D53 AJ23 VSS[66] VSS[146] AV5
BH1 VSS_NCTF_15 VSS_NCTF_30 E1 AJ26 VSS[67] VSS[147] AV8
E53 PCH_GPIO17 R125 10K/F_4 AJ28 AW14 Set to Vcc when LOW
VSS_NCTF_31 1204 ( need to pull up to 3V VSS[68] VSS[148] NV_CLE
AJ32 VSS[69] VSS[149] AW18
IbexPeak-M_Rev1_0 from check list request ) AJ34 AW2 Set to Vcc/2 when HIGH
VSS[70] VSS[150]
AT5 VSS[71] VSS[151] BF9
Board ID ID0 ID1 ID2 ID3 ID4 ID5 ID6 AJ4 VSS[72] VSS[152] AW32
AK12 VSS[73] VSS[153] AW36
+3VS5
LG/CB 0=LG AM41
AN19
VSS[74] VSS[154] AW40
AW52
1=CB ACCLED_EN R173 10K/F_4 AK26
VSS[75] VSS[155]
AY11
RF_OFF# R195 1K/F_4 VSS[76] VSS[156]
UMA/Dis. 0=UMA AK22
AK23
VSS[77] VSS[157] AY43
AY47
No Reboot Strap
VSS[78] VSS[158]
1=Dis. AK28 VSS[79]
LAN_DISABLE_R# R181 10K/F_4
15.6"/ 14" 0=QL4/TW9 1204 ( need to pull up to 3V_S5 IbexPeak-M_Rev1_0
1=QL2/SW9 from check list request )
SPKR
[7,22] SPKR +3V
*1K/F_4 R541
MDC 0=YES
1=NO
R142 *100K/F_4
BOARD ID SETTING [7] PCH_GPIO33
TBD RD6 (0) RD5 (0) RD4 (0) RD3 (0) RD2 (0) RU1 (1) RD0 (0) R201 RU3 *10K/F_4 BOARD_ID3 R202 RD3 10K/F_4
+3V
TBD RD6 (0) RD5 (0) RD4 (0) RD3 (0) RD2 (0) RU1 (1) RU0 (1) R199 RU4 *10K/F_4 BOARD_ID4 R208 RD4 10K/F_4
TBD RD6 (0) RD5 (0) RD4 (0) RD3 (0) RU2 (1) RD1 (0) RD0 (0) R534 RU5 *10K/F_4 BOARD_ID5 R535 RD5 10K/F_4 PROJECT : SW9
TBD RD6 (0) RD5 (0) RD4 (0) RD3 (0) RU2 (1) RD1 (0) RU0 (1) R183 RU6 *10K/F_4 BOARD_ID6 R184 RD6 10K/F_4 Quanta Computer Inc.
+3VS5
TBD RD6 (0) RD5 (0) RD4 (0) RD3 (0) RU2 (1) RU1 (1) RD0 (0) [3,5,11,31,34,35] +1.1V_VTT
Size Document Number Rev
[9] BOARD_ID6 [5,11,33,37,39] +1.8V
Custom 1A
TBD RD6 (0) RD5 (0) RD4 (0) RD3 (0) RU2 (1) RU1 (1) RU0 (1) [2,3,7,8,9,11,12,13,19,20,21,22,23,24,25,26,27,28,29,30,34,37,39] +3V PCH 4/5 (GPIO & Strap)
[3,8,9,11,14,37] +3VS5
Date: W ednesday, December 02, 2009 Sheet 10of 44
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
R86 0_6
11
POWER
+3V
+3V_LDO U29J POWER
U29G Ibex-M
+1.05V 1.524A AB24 AE50 C132 10U/6.3V_8 DIS UMA TP5 VCCACLK AP51 10 OF 10VCCIO[5] V24 3.208A +1.05V
C222 1U/6.3V_4 VCCCORE[1] VCCADAC[1] C152 .1U/10V_4 VCCACLK[1]
A AB26 VCCCORE[2] Ibex-M Ra 0 ohm NA VCCIO[6] V26 A
C239 10U/6.3V_6S AB28 7 OF 10 AE52 C153 .01U/16V_4 AP53 Y24 C215 1U/6.3V_4
VCCCORE[3] VCCADAC[2] DCPSUSBYP VCCACLK[2] VCCIO[7]
AD26 Y20 Y26
AD28
VCCCORE[4] Rb NA 0 ohm C251 .1U/10V_4 DCPSUSBYP VCCIO[8]
AF26
VCCCORE[5] CRT VSSA_DAC[1] AF53 USB V28 0.163A
AF28
VCCCORE[6]
AF51
Rc 0 ohm NA VCCSUS3_3[1]
U28 C262 .1U/10V_4
+3VS5
VCCCORE[7] VSSA_DAC[2] VCCSUS3_3[2] C227 .1U/10V_4
AF30 U26
AF31
VCCCORE[8]
Ra R90 *0_6 Rd NA 0 ohm +1.05V AF23
VCCSUS3_3[3]
U24 C240 *.033U/10V_4
VCCCORE[9] VCCLAN[1] VCCSUS3_3[4]
AH26 VCCCORE[10] VCCALVDS AH38 Rb R95 0_6 +3V VCCSUS3_3[5] P28
AH28 VCCCORE[11] VSSA_LVDS AH39 AF24 VCCLAN[2] VCCSUS3_3[6] P26
AH30 VCCCORE[12] LVDS +1.8V_PCHLVDS
Rc R108 *0_6
VCCSUS3_3[7] N28
AH31 VCCCORE[13] VCCTX_LVDS[1] AP43
C170 10U/6.3V_8
Rd R113 0_6 +1.8V
C200 22U VCCSUS3_3[8] N26
AJ30 VCCCORE[14] VCCTX_LVDS[2] AP45 AD38 VCCME[1] VCCSUS3_3[9] M28
AJ31 AT46 C182 .1U/10V_4 M26
VCCCORE[15] VCCTX_LVDS[3] C163 .01U/16V_4 C197 22U VCCSUS3_3[10]
VCCTX_LVDS[4] AT45 AD39 VCCME[2] VCCSUS3_3[11] L28
VCC CORE C183 1U/6.3V_4 AD41
VCCSUS3_3[12] L26
J28
+1.05V 3.208A AK24 VCCIO[24] VCC3_3[2] AB34 0.357A +3V
C180 1U/6.3V_4 AF43
VCCME[3] VCCSUS3_3[13]
VCCSUS3_3[14] J26
H28
+V1.1LAN_VCCAPLL_EXP VCCME[4] VCCSUS3_3[15]
TP9 BJ24 VCCAPLLEXP VCC3_3[3] AB35 VCCSUS3_3[16] H26
C204 .1U/10V_4 C187 1U/6.3V_4
AN20
HVCMOS AD35
AF41 VCCME[5] VCCSUS3_3[17] G28
G26
+1.05V 3.208A AN22
VCCIO[25]
VCCIO[26]
VCC3_3[4]
AF42 VCCME[6]
VCCSUS3_3[18]
VCCSUS3_3[19] F28
+V1.1LAN_VCCAPLL_FDI BJ18
FDI V12 DCPSST
C TP10 VCCFDIPLL C
+V1.1LAN_INT_VCCSUS Y22
+1.05V 3.208A AM23 VCCIO[1]
C250 .1U/10V_4
1208 Intel recommend
DCPSUS
3.208A
PCI/GPIO/LPC VCCSATAPLL[1] AK3
IbexPeak-M_Rev1_0 P18 AK1 +V1.1LAN_VCCAPLL
+3VS5 0.163A U19
VCCSUS3_3[29]
VCCSUS3_3[30]
VCCSATAPLL[2] TP12
U20 VCCSUS3_3[31]
C229 .1U/10V_4 U22 AT20
UMA Only VCCSUS3_3[32] VCCVRM[4] +1.8V
+5V
U7
+3V_LDO V15 VCC3_3[5] VCCIO[9] AH22 0.035A +1.05V
V16 AH19
*G910T21U +3V 0.357A
C263 .1U/10V_4
Y16
VCC3_3[6]
VCC3_3[7]
VCCIO[10]
VCCIO[11] AD20 C220 1U/6.3V_4
3 Vin Vout 1 VCCIO[12] AF22
AD19
GND
+1.1V_VTT >1mA
C266 4.7U/6.3V_6
AT18
AU18
V_CPU_IO[1]
VCCIO[13]
VCCIO[14] AF20
D
IbexPeak-M_Rev1_0 D
[2,7,8,9,27,31,33,34,39] +1.05V
[3,5,10,31,34,35] +1.1V_VTT
PROJECT : SW9
[5,10,33,37,39] +1.8V Quanta Computer Inc.
[2,3,7,8,9,10,12,13,19,20,21,22,23,24,25,26,27,28,29,30,34,37,39] +3V
[3,8,9,10,14,37] +3VS5
[19,20,22,23,25,26,28,30,37] +5V Size Document Number Rev
Custom 1A
[37] +5VS5 PCH 5/5 (POWER)
Date: W ednesday, December 02, 2009 Sheet 11of 44
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
12
JDIM1A M_A_DQ[63:0] [4]
[4] M_A_A[15:0]
A M_A_A0 98 5 M_A_DQ0 A
M_A_A1 A0 DQ0 M_A_DQ1 +1.5VSUS +1.5VSUS +1.5VSUS_CPU
97 A1 DQ1 7
M_A_A2 96 15 M_A_DQ2
M_A_A3 A2 DQ2 M_A_DQ3
95 A3 DQ3 17
M_A_A4 92 4 M_A_DQ4
M_A_A5 A4 DQ4 M_A_DQ5 JDIM1B C514 .1U/10V_4
91 A5 DQ5 6
M_A_A6 90 16 M_A_DQ6 75 44
M_A_A7 A6 DQ6 M_A_DQ7 VDD1 VSS16 C530 .1U/10V_4
86 A7 DQ7 18 EMI +1.5VSUS
76 VDD2 VSS17 48
M_A_A8 89 21 M_A_DQ8 81 49
M_A_A9 A8 DQ8 M_A_DQ9 VDD3 VSS18 C541 .1U/10V_4
85 A9 DQ9 23 82 VDD4 VSS19 54
M_A_A10 107 33 M_A_DQ10 87 55
M_A_A11 A10/AP DQ10 M_A_DQ11 VDD5 VSS20 C542 .1U/10V_4
84 A11 DQ11 35 88 VDD6 VSS21 60
M_A_A12 83 22 M_A_DQ12 C342 C320 C321 93 61
SO-DIMMA SPD Address is 0XA0 M_A_A13 A12/BC# DQ12 M_A_DQ13 .22U/10V_4 .22U/10V_4 .22U/10V_4 VDD7 VSS22
119 A13 DQ13 24 94 VDD8 VSS23 65
SO-DIMMA TS Address is 0X30 M_A_A14 80 34 M_A_DQ14 99 66
M_A_A15 A14 DQ14 M_A_DQ15 VDD9 VSS24
78 A15 DQ15 36 100 VDD10 VSS25 71
39 M_A_DQ16 105 72
DQ16 VDD11 VSS26
3
R159 10K/F_4 DIMM0_SA0 197 70 M_A_DQ31 [3] PM_EXTTS#0 PM_EXTTS#0 198 167
R160 10K/F_4 DIMM0_SA1 SA0 DQ31 M_A_DQ32 C_DDR3_DRAMRST# EVENT# VSS41
201 SA1 DQ32 129 [13] C_DDR3_DRAMRST# 30 RESET# VSS42 168
[2,8,13] CGCLK_SMB 202 131 M_A_DQ33 172
SCL DQ33 M_A_DQ34 VSS43
[2,8,13] CGDAT_SMB 200 SDA DQ34 141 VSS44 173 [5,37] MAINON_G 2
143 M_A_DQ35 SMDDR_VREF_DQ0_M2 R28 0_4 SMDDR_VREF_DQ0 1 178 Q36
DQ35 M_A_DQ36 SMDDR_VREF_DIMM 126 VREF_DQ VSS45 BSS138
[4] M_A_ODT0 116 ODT0 DQ36 130 VREF_CA VSS46 179
[4] M_A_ODT1 120 132 M_A_DQ37 184
ODT1 DQ37 M_A_DQ38 VSS47
[4] M_A_DM[7:0] 140 185
1
M_A_DM0 DQ38 M_A_DQ39 VSS48
11 DM0 DQ39 142 2 VSS1 VSS49 189
M_A_DM1 28 147 M_A_DQ40 3 190
M_A_DM2 DM1 DQ40 M_A_DQ41 VSS2 VSS50
46 DM2 DQ41 149 SMDDR_VREF_DIMM [13] 8 VSS3 VSS51 195
M_A_DM3 M_A_DQ42
(204P)
63 157 9 196
(204P)
GND
GND
M_A_DQS6 DQS5 DQ53 M_A_DQ54 VSS15
171 DQS6 DQ54 174
[4] M_A_DQS#[7:0] M_A_DQS7 188 176 M_A_DQ55
M_A_DQS#0 DQS7 DQ55 M_A_DQ56 R235 DDR3-DIMM0
10 181 +1.5VSUS
205
206
M_A_DQS#1 DQS#0 DQ56 M_A_DQ57 1K/F_4
27 DQS#1 DQ57 183
C
M_A_DQS#2 45 191 M_A_DQ58 C
M_A_DQS#3 DQS#2 DQ58 M_A_DQ59
62 DQS#3 DQ59 193
M_A_DQS#4 135 180 M_A_DQ60
M_A_DQS#5 DQS#4 DQ60 M_A_DQ61
152 DQS#5 DQ61 182
M_A_DQS#6 169 192 M_A_DQ62
M_A_DQS#7 DQS#6 DQ62 M_A_DQ63
186 DQS#7 DQ63 194
DDR3-DIMM0
R44 *0_4
[3] DDR3_DRAMRST# 1 3
+1.5VSUS 10/9
+0.75V_DDR_VTT
C61 10U/6.3V_6S C103 470P/50V_4
C88 10U/6.3V_6S C292 1U/6.3V_4 SMDDR_VREF_DQ0_M2
C83 10U/6.3V_6S C592 1U/6.3V_4
C53 10U/6.3V_6S C294 1U/6.3V_4
C65 10U/6.3V_6S C293 1U/6.3V_4 R66 R71 +1.5VSUS
C98 10U/6.3V_6S C586 *10U/6.3V_8 1K/F_4 1K/F_4 [13,36] +0.75V_DDR_VTT
C73 1U C587 *10U/6.3V_8 [5,13,36,37,39] +1.5VSUS
D
C48 1U C590 10U/6.3V_6S [2,3,7,8,9,10,11,13,19,20,21,22,23,24,25,26,27,28,29,30,34,37,39] +3V D
C91 1U [7,19,21,23,26,27,28,31,32,33,35,37,38,39] +3VPCU
C60 1U R27 *0_4 SMDDR_VREF_DQ0 [27,31,32,33,34,35,36,37] +5VPCU
C68 1U SMDDR_VREF_DQ0
C178 .1U/10V_4 1 3
+3V [6] DDR_VREF_DQ0
C171 2.2U/6.3V_6 Q37
AO3402 PROJECT : SW9
C246 2.2U/6.3V_6 SMDDR_VREF_DIMM R58
Quanta Computer Inc.
2
13
JDIM2A M_B_DQ[63:0] [4]
[4] M_B_A[15:0] +1.5VSUS
M_B_A0 98 5 M_B_DQ0
M_B_A1 A0 DQ0 M_B_DQ1
A 97 A1 DQ1 7 A
M_B_A2 96 15 M_B_DQ2
M_B_A3 A2 DQ2 M_B_DQ3
95 A3 DQ3 17 JDIM2B
M_B_A4 92 4 M_B_DQ4
M_B_A5 A4 DQ4 M_B_DQ5
91 A5 DQ5 6 75 VDD1 VSS16 44
M_B_A6 90 16 M_B_DQ6 76 48
M_B_A7 A6 DQ6 M_B_DQ7 VDD2 VSS17
86 A7 DQ7 18 81 VDD3 VSS18 49
M_B_A8 89 21 M_B_DQ8 82 54
M_B_A9 A8 DQ8 M_B_DQ9 VDD4 VSS19
85 A9 DQ9 23 87 VDD5 VSS20 55
M_B_A10 107 33 M_B_DQ10 88 60
M_B_A11 A10/AP DQ10 M_B_DQ11 VDD6 VSS21
84 A11 DQ11 35 93 VDD7 VSS22 61
M_B_A12 83 22 M_B_DQ12 94 65
M_B_A13 A12/BC# DQ12 M_B_DQ13 VDD8 VSS23
119 A13 DQ13 24 99 VDD9 VSS24 66
M_B_A14 80 34 M_B_DQ14 100 71
M_B_A15 A14 DQ14 M_B_DQ15 VDD10 VSS25
78 A15 DQ15 36 105 VDD11 VSS26 72
39 M_B_DQ16 106 127
(204P)
SO-DIMMB TS Address is 0X34 46 DM2 DQ41 149 9 VSS4 VSS52 196
M_B_DM3 63 157 M_B_DQ42 C507 13
(204P)
GND
GND
M_B_DQS5 DQS4 DQ52 M_B_DQ53 VSS15
154 DQS5 DQ53 166
M_B_DQS6 171 174 M_B_DQ54
M_B_DQS7 DQS6 DQ54 M_B_DQ55 DDR3-DIMM1
[4] M_B_DQS#[7:0] 188 176
205
206
M_B_DQS#0 DQS7 DQ55 M_B_DQ56
10 DQS#0 DQ56 181
M_B_DQS#1 27 183 M_B_DQ57
M_B_DQS#2 DQS#1 DQ57 M_B_DQ58
45 DQS#2 DQ58 191
C
M_B_DQS#3 62 193 M_B_DQ59 C
M_B_DQS#4 DQS#3 DQ59 M_B_DQ60
135 DQS#4 DQ60 180
M_B_DQS#5 152 182 M_B_DQ61
M_B_DQS#6 DQS#5 DQ61 M_B_DQ62
169 DQS#6 DQ62 192
M_B_DQS#7 186 194 M_B_DQ63
DQS#7 DQ63
DDR3-DIMM1
C186 470P/50V_4
SMDDR_VREF_DQ1_M2 R138 0_4 SMDDR_VREF_DQ1
R134 R104
Place these Caps near So-Dimm1. 1K/F_4 1K/F_4
+1.5VSUS
+1.5VSUS +0.75V_DDR_VTT
+1.05V_GFX ~C134
500mA
*.1U/10V_4
AC9
U27A
PBGA533-NVIDIA-GEFORCE6250
N10M
PEX_IOVDD_01
1/13 PCI_EXPRESS
(NC) PEX_CLKREQ AE9 PEX_CLKREQ# R81
+3V_GFX
*10K/F_4
14
AD7 PEX_IOVDD_02 PEX_RST* AD9 VGA_RST# R80 *100/F_4
PEGX_RST# [29]
C155 *.1U/10V_4 AD8
C110
C149
C551
*1U/6.3V_4
*1U/6.3V_4
*4.7U/6.3V_6
AE7
AF7
PEX_IOVDD_03
PEX_IOVDD_04
PEX_IOVDD_05 PEX_REFCLK AB10 CLK_PCIE_VGA
CLK_PCIE_VGA#
CLK_PCIE_VGA [8]
power up sequence
AG7 PEX_IOVDD_06 PEX_REFCLK* AC10 CLK_PCIE_VGA# [8]
C556 *10U/6.3V_6S
D C81 *22U AD10 C_PEG_RX0 C99 *.1U/10V_4 D
PEX_TX0 PEG_RX15 [3]
AB13 AD11 C_PEG_RX#0C100 *.1U/10V_4
PEX_IOVDDQ_01 PEX_TX0* PEG_RX#15 [3]
AB16 AD12 C_PEG_RX1 C101 *.1U/10V_4
+1.05V_GFX 1600mA
C142 *.1U/10V_4
AB17
PEX_IOVDDQ_02
PEX_IOVDDQ_03
PEX_TX1
PEX_TX1* AC12 C_PEG_RX#1C105
C_PEG_RX2 C94
*.1U/10V_4
*.1U/10V_4
PEG_RX14 [3]
PEG_RX#14 [3]
AB7 PEX_IOVDDQ_04 PEX_TX2 AB11 PEG_RX13 [3] PXE 1.05VDD
C122 *.1U/10V_4 AB8 AB12 C_PEG_RX#2C97 *.1U/10V_4
PEX_IOVDDQ_05 PEX_TX2* PEG_RX#13 [3]
C87 *1U/6.3V_4 AB9 AD13 C_PEG_RX3 C106 *.1U/10V_4
PEX_IOVDDQ_06 PEX_TX3 PEG_RX12 [3]
C121 *1U/6.3V_4 AC13 AD14 C_PEG_RX#3C112 *.1U/10V_4
PEX_IOVDDQ_07 PEX_TX3* PEG_RX#12 [3]
C552 *4.7U/6.3V_6 AC7 AD15 C_PEG_RX4 C113 *.1U/10V_4
PEX_IOVDDQ_08 PEX_TX4 PEG_RX11 [3]
C559 *10U/6.3V_6S AD6 AC15 C_PEG_RX#4C119 *.1U/10V_4 I/O 3.3V
PEX_IOVDDQ_09 PEX_TX4* PEG_RX#11 [3]
C548 *22U AE6 AB14 C_PEG_RX5 C120 *.1U/10V_4
PEX_IOVDDQ_10 PEX_TX5 PEG_RX10 [3]
AF6 AB15 C_PEG_RX#5C129 *.1U/10V_4
PEX_IOVDDQ_11 PEX_TX5* PEG_RX#10 [3]
AG6 AC16 C_PEG_RX6 C130 *.1U/10V_4
PEX_IOVDDQ_12 PEX_TX6 PEG_RX9 [3]
AD16 C_PEG_RX#6C135 *.1U/10V_4
+VGACORE PEX_TX6* PEG_RX#9 [3]
AD17 C_PEG_RX7 C136 *.1U/10V_4 NVCORE
PEX_TX7 PEG_RX8 [3]
AD18 C_PEG_RX#7C140 *.1U/10V_4
PEX_TX7* PEG_RX#8 [3]
AC18 C_PEG_RX8 C143 *.1U/10V_4
PLACE UNDER BALLS
C138 *.01U/16V_4
10.87A J10 PEX_TX8
PEX_TX8* AB18
AB19
C_PEG_RX#8C147
C_PEG_RX9 C150
*.1U/10V_4
*.1U/10V_4
PEG_RX7 [3]
PEG_RX#7 [3]
VDD_01 PEX_TX9 PEG_RX6 [3]
C141 *.01U/16V_4 J12 AB20 C_PEG_RX#9C156 *.1U/10V_4 1.8VFBDDQ
VDD_02 PEX_TX9* PEG_RX#6 [3]
C128 *.01U/16V_4 J13 AD19 C_PEG_RX10C158 *.1U/10V_4
VDD_03 PEX_TX10 PEG_RX5 [3]
C162 *.01U/16V_4 J9 AD20 C_PEG_RX#10
C167 *.1U/10V_4
VDD_04 PEX_TX10* PEG_RX#5 [3]
C127 *.01U/16V_4 L9 AD21 C_PEG_RX11C168 *.1U/10V_4
VDD_05 PEX_TX11 PEG_RX4 [3]
C139 *.01U/16V_4 M11 AC21 C_PEG_RX#11
C176 *.1U/10V_4
VDD_06 PEX_TX11* PEG_RX#4 [3]
C165 *.047U/25V_4 M17 AB21 C_PEG_RX12C177 *.1U/10V_4
VDD_07 PEX_TX12 PEG_RX3 [3]
C169 *.047U/25V_4 M9 AB22 C_PEG_RX#12
C181 *.1U/10V_4 NB9M: VGACORE +0.90V (Normal) , +1.09V
VDD_08 PEX_TX12* PEG_RX#3 [3]
C166 *.047U/25V_4 N11 AC22 C_PEG_RX13C185 *.1U/10V_4
VDD_09 PEX_TX13 PEG_RX2 [3]
C126 *.1U/10V_4 N12 AD22 C_PEG_RX#13
C190 *.1U/10V_4
N13
VDD_10 PEX_TX13*
AD23 C_PEG_RX14C194 *.1U/10V_4
PEG_RX#2 [3]
PEG_RX1 [3]
NVVDD Maximum Settling Time
PLACE NEAR BALLS VDD_11 PEX_TX14 C_PEG_RX#14
C199 *.1U/10V_4
C N14 VDD_12 PEX_TX14* AD24 PEG_RX#1 [3] C
C174 *4.7U/6.3V_6 N15 AE25 C_PEG_RX15C203 *.1U/10V_4
VDD_13 PEX_TX15 PEG_RX0 [3]
N16 AE26 C_PEG_RX#15
C210 *.1U/10V_4
VDD_14 PEX_TX15* PEG_RX#0 [3]
N17 VDD_15
2 1 N19 VDD_16
+
N9 VDD_17
C144 7/22 P11 NVVDD
*330u_2.5V_3528 VDD_18
P12 VDD_19
P13 VDD_20
P14 VDD_21
P15 VDD_22
P16 AE12 PEG_TX15
VDD_23 PEX_RX0 PEG_TX15 [3]
P17 AF12 PEG_TX#15
VDD_24 PEX_RX0* PEG_TX#15 [3]
R11 AG12 PEG_TX14
VDD_25 PEX_RX1 PEG_TX14 [3]
R12 AG13 PEG_TX#14
VDD_26 PEX_RX1* PEG_TX#14 [3]
R13 AF13 PEG_TX13
VDD_27 PEX_RX2 PEG_TX13 [3]
R14 AE13 PEG_TX#13
VDD_28 PEX_RX2* PEG_TX#13 [3]
R15 AE15 PEG_TX12
VDD_29 PEX_RX3 PEG_TX12 [3]
R16 AF15 PEG_TX#12 GPIO
VDD_30 PEX_RX3* PEG_TX#12 [3]
R17 AG15 PEG_TX11
VDD_31 PEX_RX4 PEG_TX11 [3]
R9 AG16 PEG_TX#11
VDD_32 PEX_RX4* PEG_TX#11 [3]
T11 AF16 PEG_TX10
VDD_33 PEX_RX5 PEG_TX10 [3]
T17 AE16 PEG_TX#10
VDD_34 PEX_RX5* PEG_TX#10 [3]
T9 AE18 PEG_TX9
VDD_35 PEX_RX6 PEG_TX9 [3]
U19 AF18 PEG_TX#9 tsNVVDD<= 192us
VDD_36 PEX_RX6* PEG_TX#9 [3]
U9 AG18 PEG_TX8
VDD_37 PEX_RX7 PEG_TX8 [3]
W10 AG19 PEG_TX#8
VDD_38 PEX_RX7* PEG_TX#8 [3]
W12 AF19 PEG_TX7
VDD_39 PEX_RX8 PEG_TX7 [3]
W13 AE19 PEG_TX#7
VDD_40 PEX_RX8* PEG_TX#7 [3]
B W18 AE21 PEG_TX6 B
VDD_41 PEX_RX9 PEG_TX6 [3]
W19 AF21 PEG_TX#6
VDD_42 PEX_RX9* PEG_TX#6 [3]
W9 AG21 PEG_TX5
VDD_43 PEX_RX10 PEG_TX5 [3]
AG22 PEG_TX#5
PEX_RX10* PEG_TX#5 [3]
GPU_VDD_SENSE W15 AF22 PEG_TX4
[35] GPU_VDD_SENSE
W16
VDD_SENSE PEX_RX11
AE22 PEG_TX#4
PEG_TX4 [3] For Switchable only
E15
GND_SENSE PEX_RX11*
AE24 PEG_TX3
PEG_TX#4 [3]
PEG_TX3 [3]
PEX_RST timing
VDD_SENSE (NC) PEX_RX12 PEG_TX#3 +3V_GFX
E14 GND_SENSE (GND) PEX_RX12* AF24 PEG_TX#3 [3]
AG24 PEG_TX2
+3V_GFX 80mA
C160 *4.7U/6.3V_6
A12 VDD33_01
PEX_RX13
PEX_RX13* AF25 PEG_TX#2
PEG_TX1
PEG_TX2 [3]
PEG_TX#2 [3]
R633 *10K/F_4 +3VS5
B12 VDD33_02 PEX_RX14 AG25 PEG_TX1 [3]
+1.05V_GFX C137 *1U/6.3V_4 C12 AG26 PEG_TX#1 I/O 3.3V
VDD33_03 PEX_RX14* PEG_TX#1 [3]
C145 *.1U/10V_4 D12 AF27 PEG_TX0 R634
VDD33_04 PEX_RX15 PEG_TX0 [3] PEG_CLKREQ# [8]
C546 *4.7U/6.3V_6 C102 *.1U/10V_4 E12 AE27 PEG_TX#0 *10K/F_4
VDD33_05 PEX_RX15* PEG_TX#0 [3]
L24 C95 *.1U/10V_4 F12 PEX_RST
VDD33_06
3
*100nH_6
C553 *.01U/16V_4 Q32
C554 *.1U/10V_4
C555 *1U/6.3V_4
+PEX_PLLVDD 110mA AF9 PEX_PLLVDD
CLKRQ1 2 *DTC144EUA
12~16 mils
3
Trise >= 1uS Tfail <=500nS
R442 *200_4 AE10 Q34
1
PEX_TSTCLK_OUT*
+3V_GFX L25 *0_6 AF10 PEX_TSTCLK_OUT
PEX_CLKREQ# 2 *DTC144EUA
C557 *.01U/16V_4
C558 *.1U/10V_4 +PEX_SVDD_3V3 AG9 PEG_SVDD (NC)
1
A A
PROJECT : SW9
VGA Thermal Circuit ==> Del 6/16 Quanta Computer Inc.
Size Document Number Rev
Custom 1A
N10M-GE (PCIE I/F) 1/5
Date: W ednesday, December 02, 2009 Sheet 14 of 44
5 4 3 2 1
5 4 3 2 1
U27B
+1.5V_GFX
15
PBGA533-NVIDIA-GEFORCE6250
1.63A N10M
U27I
N10M
C172 *0.047U/16V_4 A13 2/13 FRAME_BUFFER PBGA533-NVIDIA-GEFORCE6250
C159 *0.047U/16V_4 FBVDDQ_01 VMA_DQ0
B13 FBVDDQ_02 (FBA_D8) FBA_D0 D22 13/13 GND_NC
C179 *0.047U/16V_4 C13 E24 VMA_DQ1 C15
C151 *.1U/10V_4 FBVDDQ_03 (FBA_D10) FBA_D1 VMA_DQ2 NC_01
D13 FBVDDQ_04 (FBA_D9) FBA_D2 E22 AC11 GND_01 NC_02 D15
C148 *.1U/10V_4 D14 D24 VMA_DQ3 AC14 J5
C164 *.1U/10V_4 FBVDDQ_05 (FBA_D11) FBA_D3 VMA_DQ4 GND_02 NC_03
E13 FBVDDQ_06 (FBA_D12) FBA_D4 D26 AC17 GND_03
C173 *4.7U/6.3V_6 F13 D27 VMA_DQ5 AC2
FBVDDQ_07 (FBA_D13) FBA_D5 [18] VMA_DQ[63..0] GND_04
F14 C27 VMA_DQ6 AC20
FBVDDQ_08 (FBA_D14) FBA_D6 VMA_DQ7 GND_05
F15 FBVDDQ_09 (FBA_D15) FBA_D7 B27 [18] VMA_DM[7..0] AC23 GND_06
F16 A21 VMA_DQ8 AC26
FBVDDQ_10 (FBA_D31) FBA_D8 VMA_DQ9 GND_07
D F17 FBVDDQ_11 (FBA_D30) FBA_D9 B21 [18] VMA_W DQS[7..0] AC5 GND_08 D
F19 C21 VMA_DQ10 AC8
FBVDDQ_12 (FBA_D29) FBA_D10 VMA_DQ11 GND_09
F22 FBVDDQ_13 (FBA_D28) FBA_D11 C19 [18] VMA_RDQS[7..0] AF11 GND_10
H23 C18 VMA_DQ12 AF14
FBVDDQ_14 (FBA_D26) FBA_D14 VMA_DQ13 GND_11
H26 FBVDDQ_15 (FBA_D27) FBA_D14 D18 AF17 GND_12
J15 B18 VMA_DQ14 AF2
FBVDDQ_16 (FBA_D25) FBA_D14 VMA_DQ15 GND_13
J16 FBVDDQ_17 (FBA_D24) FBA_D15 C16 AF20 GND_14
J18 E21 VMA_DQ16 AF23
FBVDDQ_18 (FBA_D22) FBA_D16 VMA_DQ17 GND_15
J19 FBVDDQ_19 (FBA_D23) FBA_D17 F21 AF26 GND_16
L19 D20 VMA_DQ18 AF5
FBVDDQ_20 (FBA_D20) FBA_D18 VMA_DQ19 GND_17
L23 FBVDDQ_21 (FBA_D21) FBA_D19 F20 AF8 GND_18
L26 D17 VMA_DQ20 B11
FBVDDQ_22 (FBA_D18) FBA_D20 VMA_DQ21 GND_19
M19 FBVDDQ_23 (FBA_D19) FBA_D21 F18 B14 GND_20
N22 D16 VMA_DQ22
FBVDDQ_24 (FBA_D16) FBA_D22 VMA_DQ23 FBA_CMD28 R547 *10K/F_4
U22 FBVDDQ_25 (FBA_D17) FBA_D23 E16 B17 GND_21
Y22 A22 VMA_DQ24 B2
FBVDDQ_26 (FBA_D3) FBA_D24 VMA_DQ25 FBA_CMD7 R226 *10K/F_4 GND_22
(FBA_D4) FBA_D25 C24 B20 GND_23
D21 VMA_DQ26 B23
(FBA_D0) FBA_D26 VMA_DQ27 FBA_CMD15 R546 *10K/F_4 GND_24
(FBA_D2) FBA_D27 B22 B26 GND_25
[18] FBA_CMD0 F26 C22 VMA_DQ28 B5
FBA_CMD0 (FBA_D1) FBA_D28 VMA_DQ29 FBA_CMD18 R223 *10K/F_4 GND_26
[18] FBA_CMD1 J24 FBA_CMD1 (FBA_D6) FBA_D29 A25 B8 GND_27
[18] FBA_CMD2 F25 B25 VMA_DQ30 E11
FBA_CMD2 (FBA_D5) FBA_D30 VMA_DQ31 FBA_CMD30 R222 *10K/F_4 GND_28
[18] FBA_CMD3 M23 FBA_CMD3 (FBA_D7) FBA_D31 A26
[18] FBA_CMD4 N27 U24 VMA_DQ32 E17
FBA_CMD4 (FBA_D37) FBA_D32 VMA_DQ33 GND_30
[18] FBA_CMD5 M27 FBA_CMD5 (FBA_D39) FBA_D33 V24 E2 GND_31
[18] FBA_CMD6 K26 V23 VMA_DQ34 E20
FBA_CMD6 (FBA_D38) FBA_D35 VMA_DQ35 GND_32
[18] FBA_CMD7 J25 FBA_CMD7 (FBA_D35) FBA_D35 R24 E23 GND_33
[18] FBA_CMD8 J27 T23 VMA_DQ36 E26
FBA_CMD8 (FBA_D36) FBA_D36 VMA_DQ37 GND_34
[18] FBA_CMD9 G23 FBA_CMD9 (FBA_D34) FBA_D37 R23 E5 GND_35
C [18] FBA_CMD10 G26 P24 VMA_DQ38 E8 C
FBA_CMD10 (FBA_D33) FBA_D38 VMA_DQ39 GND_36
[18] FBA_CMD11 J23 FBA_CMD11 (FBA_D32) FBA_D39 P22 H2 GND_37
[18] FBA_CMD12 M25 AC24 VMA_DQ40 H5
FBA_CMD12 (FBA_D55) FBA_D40 VMA_DQ41 GND_38
[18] FBA_CMD13 K27 FBA_CMD13 (FBA_D53) FBA_D41 AB23 J11 GND_39
[18] FBA_CMD14 G25 AB24 VMA_DQ42 J14
FBA_CMD14 (FBA_D54) FBA_D42 VMA_DQ43 GND_40
[18] FBA_CMD15 L24 FBA_CMD15 (FBA_D51) FBA_D43 W24
[18] FBA_CMD16 K23 AA22 VMA_DQ44 J17
FBA_CMD16 (FBA_D52) FBA_D44 VMA_DQ45 GND_41
[18] FBA_CMD17 K24 FBA_CMD17 (FBA_D50) FBA_D45 W23 K19 GND_42
[18] FBA_CMD18 G22 W22 VMA_DQ46 K9
FBA_CMD18 (FBA_D49) FBA_D46 VMA_DQ47 GND_43
[18] FBA_CMD19 K25 FBA_CMD19 (FBA_D48) FBA_D47 V22 L11 GND_44
[18] FBA_CMD20 H22 AA25 VMA_DQ48 L12
FBA_CMD20 (FBA_D59) FBA_D48 VMA_DQ49 GND_45
[18] FBA_CMD21 M26 FBA_CMD21 (FBA_D58) FBA_D49 W27 L13 GND_46
[18] FBA_CMD22 H24 W26 VMA_DQ50 L14
FBA_CMD22 (FBA_D57) FBA_D50 VMA_DQ51 GND_47
[18] FBA_CMD23 F27 FBA_CMD23 (FBA_D56) FBA_D51 W25 L15 GND_48
[18] FBA_CMD24 J26 AB25 VMA_DQ52 L16
FBA_CMD24 (FBA_D60) FBA_D52 VMA_DQ53 GND_49
[18] FBA_CMD25 G24 FBA_CMD25 (FBA_D61) FBA_D53 AB26 L17 GND_50
[18] FBA_CMD26 G27 AD26 VMA_DQ54 L2
FBA_CMD26 (FBA_D62) FBA_D54 VMA_DQ55 GND_51
[18] FBA_CMD27 M24 FBA_CMD27 (FBA_D63) FBA_D55 AD27 L5 GND_52
[18] FBA_CMD28 K22 V25 VMA_DQ56 M12
FBA_CMD28 (FBA_D46) FBA_D56 VMA_DQ57 GND_53
[18] FBA_CMD29 J22 FBA_CMD29 (FBA_D42) FBA_D57 R25 M13 GND_54
[18] FBA_CMD30 L22 V26 VMA_DQ58 M14
FBA_CMD30 (FBA_D45) FBA_D58 VMA_DQ59 GND_55
(FBA_D47) FBA_D59 V27 M15 GND_56
R26 VMA_DQ60 M16
(FBA_D43) FBA_D60 VMA_DQ61 GND_57
(FBA_D44) FBA_D61 T25 P19 GND_58
N25 VMA_DQ62 P2
VMA_CLK0 (FBA_D40) FBA_D62 VMA_DQ63 GND_59
[18] VMA_CLK0 F24 FBA_CLK0 (FBA_D41) FBA_D63 N26 P23 GND_60
VMA_CLK0# F23
[18] VMA_CLK0# FBA_CLK0*
VMA_CLK1 N24 P26
[18] VMA_CLK1 FBA_CLK1 GND_61
VMA_CLK1# N23 C26 VMA_DM0 P5
[18] VMA_CLK1# FBA_CLK1* (DQM1) FBA_DQM0 GND_62
B B19 VMA_DM1 P9 B
(DQM3) FBA_DQM1 VMA_DM2 GND_63
(DQM2) FBA_DQM2 D19 T12 GND_64
D23 VMA_DM3 T13
(DQM0) FBA_DQM3 VMA_DM4 GND_65
(DQM4) FBA_DQM4 T24 T14 GND_66
+1.5V_GFX R101 *40.2/F_4 FB_CAL_PD_VDDQ B15 AA23 VMA_DM5 T15
FB_CAL_PD_VDDQ (DQM6) FBA_DQM5 VMA_DM6 GND_67
(DQM7) FBA_DQM6 AB27 T16 GND_68
R99 *40.2/F_4 FB_CAL_PU_GND A15 T26 VMA_DM7 U11
FB_CAL_PU_GND (DQM5) FBA_DQM7 GND_69
U12 GND_70
R102 *60.4/F_4 FB_CAL_TERM_GND B16 U13
FB_CAL_TERM_GND VMA_W DQS0 GND_71
(WP1) FBA_DQS_WP0 C25 U14 GND_72
A19 VMA_W DQS1 U15
*60.4/F_4 R114 FBA_DEBUG (WP3) FBA_DQS_WP1 VMA_W DQS2 GND_73
+1.5V_GFX M22 FBA_DEBUG (WP2) FBA_DQS_WP2 E19 U16 GND_74
A24 VMA_W DQS3 U17
10mA (WP0) FBA_DQS_WP3 VMA_W DQS4 GND_75
For debug only (WP4) FBA_DQS_WP4 T22 U2 GND_76
AA24 VMA_W DQS5 U23
(WP6) FBA_DQS_WP5 VMA_W DQS6 GND_77
(WP7) FBA_DQS_WP5 AA26 U26 GND_78
+1.05V_GFX 15mils width 25mA T27 VMA_W DQS7 U5
(WP5) FBA_DQS_WP7 GND_79
V19 GND_80
L27 *PBY160808T-301Y-N_6 +FB_PLLAVDD R19 FB_PLLAVDD VMA_RDQS0
(RN1) FBA_DQS_RN0 D25 V9 GND_81
C574 *4.7U/6.3V_6 T19 A18 VMA_RDQS1 W11
C577 *1U/6.3V_4 FB_DLLAVDD (RN3) FBA_DQS_RN1 VMA_RDQS2 GND_82
(RN2) FBA_DQS_RN2 E18 W14 GND_83
C175 *.1U/10V_4 AC19 B24 VMA_RDQS3 W17
FB_PLLAVDD (NC) (RN0) FBA_DQS_RN3 VMA_RDQS4 GND_84
(RN4) FBA_DQS_RN4 R22 Y2 GND_85
Y24 VMA_RDQS5 Y23
(RN6) FBA_DQS_RN5 VMA_RDQS6 GND_86
(RN7) FBA_DQS_RN6 AA27 Y26 GND_87
R27 VMA_RDQS7 Y5
(RN5) FBA_DQS_RN7 GND_88
PROJECT : SW9
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
N10M-GE (MEMORY I/F) 2/5
Date: W ednesday, December 02, 2009 Sheet 15 of 44
5 4 3 2 1
5 4 3 2 1
U27F
U27G
N10M
16
PBGA533-NVIDIA-GEFORCE6250
N10M
PBGA533-NVIDIA-GEFORCE6250 U27D
6/13 IFPAB V4 8/13 IFPE
IFPA_TXD0* EXT_TXLOUT0- [19]
V5 DVI DP PBGA533-NVIDIA-GEFORCE6250
IFPA_TXD0 EXT_TXLOUT0+ [19] N10M
+IFPD_PLLVDD N6
IFPD_PLLVDD
T7 M6 IFPD_RSET
5/13 DACC
AA4 +DACB_VDD W5 U6
L8
200 mA
*FBMA-10-160808-300T_6 +IFPAB_PLLVDD
IFPA_TXD1*
IFPA_TXD1 AA5
EXT_TXLOUT1- [19]
EXT_TXLOUT1+ [19] R68 DACB_VDD DACB_HSYNC
DACB_VSYNC U4
+1.05V_GFX AD5 IFPAB_PLLVDD IFPD_AUX* D4 T6 R6 DACB_VREF
C93 *.1U/10V_4 AB6 A *10K/F_4 D3 R75
C92 *1U/6.3V_4 IFPAB_RSET IFPD_AUX
IFPA_TXD2* Y4 EXT_TXLOUT2- [19] T9 V6 DACB_RSET
C84 *4.7U/6.3V_6 W4 EXT_TXLOUT2+ [19] *10K/F_4 T5
IFPA_TXD2 DACB_RED
D IFPD_L3* B4 DACB_GREEN T4 D
TXC
D TXC IFPD_L3 B3 DACB_BLUE R4
R73 *1K/F_4 AB5
IFPA_TXD3*
IFPA_TXD3 AB4 IFPD_L2* C4
TXD0
TXD0 IFPD_L2 C3
DATA
IFPB_TXD4* V1 EXT_TXUOUT0- [19] TXD1 IFPD_L1* D5
W1 EXT_TXUOUT0+ [19] +IFPDE_IOVDD H6 TXD1 E4
IFPB_TXD4 IFPDE_IOVDD IFPD_L1
IFPD_L0* F4
R78 TXD2
IFPB_TXD5* W2 EXT_TXUOUT1- [19] IFPD_L0 F5
TXD2
IFPB_TXD5 W3 EXT_TXUOUT1+ [19]
*10K/F_4
L20
200 mA
*FBMA-10-160808-300T_6 +IFPAB_IOVDD V3
B
+1.8V_VGA IFPA_IOVDD IFPB_TXD6* AA3 EXT_TXUOUT2- [19]
C532 *.1U/10V_4 AA2 U27E
IFPB_TXD6 EXT_TXUOUT2+ [19] N10M
C533 *.1U/10V_4 V2 PBGA533-NVIDIA-GEFORCE6250
C539 *1U/6.3V_4 IFPB_IOVDD
C527 *4.7U/6.3V_6
IFPB_TXD7* AA1 8/13 IFPE Mount for Discrete Only
AB1 DVI DP
IFPB_TXD7 IFPE_PLLVDD D7 IFPE_PLLVDD(DACB_VDD)
F8 G6 CRT_R_DGPU R473 *0_4 CRT_R
T10 IFPD_RSET(DACB_RSET) IFPE_AUX* CRT_R [7,20]
AD4 EXT_TXLCLKOUT- [19] F7 CRT_G_DGPU R474 *0_4 CRT_G
IFPA_TXC* IFPE_AUX CRT_G [7,20]
A AC4 EXT_TXLCLKOUT+ [19] R70 CRT_B_DGPU R475 *0_4 CRT_B
IFPA_TXC CRT_B [7,20]
CLOCK CRT_HSYNC R476 *0_4 HSYNC_COM
HSYNC_COM [7,20]
*10K/F_4 CRT_VSYNC R477 *0_4 VSYNC_COM
VSYNC_COM [7,20]
IFPB_TXC* AB2 EXT_TXUCLKOUT- [19]
B IFPB_TXC AB3 EXT_TXUCLKOUT+ [19]
IFPE_L3* E7
E TXC E6
C IFPE_L3 C
U27H TXC
N10M
PBGA533-NVIDIA-GEFORCE6250 B7
TXD0 IFPE_L2*
7/13 IFPC
IFPE_L2 B6
TXD0
120 mA
*FBMA-10-160808-300T_6 +IFPC_PLLVDD
DVI DP
TXD1 IFPE_L1* A7 CRT_R_DGPU R54 *150/F_4
+3V_GFX L19 P6 IFPC_PLLVDD IFPE_L1 A6
R5 TXD1 CRT_G_DGPU R55 *150/F_4
IFPC_RSET
IFPE_L0* C6
C540 *1U/6.3V_4 TXD2 D6 CRT_B_DGPU R56 *150/F_4
C534 *.1U/10V_4 HDMI_SDA_DGPU TXD2 IFPE_L0
IFPC_AUX* G5 HDMI_SDA_DGPU [30]
C531 *.1U/10V_4 G4 HDMI_SCL_DGPU Close to GPU
IFPC_AUX HDMI_SCL_DGPU [30]
C528 *4.7U/6.3V_6
J4 H_TXC_HDMI-
TXC IFPC_L3* H_TXC_HDMI- [30]
R72 1K/F_4 H4 H_TXC_HDMI+ U27C
TXC IFPC_L3 H_TXC_HDMI+ [30]
C +3V_GFX
K4 H_TX0_HDMI-
TXD0 IFPC_L2* H_TX0_HDMI- [30] N10M
L4 H_TX0_HDMI+ PBGA533-NVIDIA-GEFORCE6250
TXD0 IFPC_L2 H_TX0_HDMI+ [30]
500
L23
mA (1.05V +/- 3% )
*MLB-201209-0030P-N1-RU_8+IFPC_IOVDD J6
TXD1 IFPC_L1* M4
M5
H_TX1_HDMI-
H_TX1_HDMI+
H_TX1_HDMI- [30]
L21 120 mA
*PBY160808T-301Y-N_6 +DACA_VDD AG2
3/13 DACA
AD2 CRT_HSYNC
+1.05V_GFX IFPC_IOVDD TXD1 IFPC_L1 H_TX1_HDMI+ [30] DACA_VDD DACA_HSYNC
C114 *.1U/10V_4 C511 *.1U/10V_4
DACA_VSYNC AD1 CRT_VSYNC
C115 *.1U/10V_4 N4 H_TX2_HDMI- C510 *.1U/10V_4 AF1
TXD2 IFPC_L0* H_TX2_HDMI- [30] DACA_VREF
C550 *1U/6.3V_4 P4 H_TX2_HDMI+ C515 *.1U/10V_4
TXD2 IFPC_L0 H_TX2_HDMI+ [30]
C549 *4.7U/6.3V_6 C516 *1U/6.3V_4 AE1
C526 *4.7U/6.3V_6 DACA_RSET CRT_R_DGPU
DACA_RED AE2
C525 *4700P/25V_4 AE3 CRT_G_DGPU
C524 *470P/50V_4 DACA_GREEN CRT_B_DGPU
DACA_BLUE AD3
B
C535 *.1U/10V_4 DACA_VREF B
R396 *124/F_4 DACA_RSET
65mA
+1.05V_GFX L10 *100nH_6 +NV_PLLVDD
U27J
50mA N10M
PBGA533-NVIDIA-GEFORCE6250
C117 *.1U/10V_4 12/13 XTAL_PLL
C116 *.1U/10V_4
C104 *1U/6.3V_4 K5
C111 *4.7U/6.3V_6 PLLVDD
K6 VID_PLLVDD
PROJECT : SW9
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
N10M-GE (DISPLAY) 3/5
Date: W ednesday, December 02, 2009 Sheet 16 of 44
5 4 3 2 1
5 4 3 2 1
17
CHIP PCI_DEVID: STRAP2
N11P-GE1 0x0A29 1001 PU 10K SEE Datasheet for details on N10P Straps!
N11M-GE1 0x0A75 1010 PD 30K
N10M
U27K
11/13 MISC
Logical Strap Bit Mapping PCI_DEVID[4]/SUBVENDOR +3V_GFX
B10 +3V_GFX
STRAP0 C7
ROM_CS* PU-VDD PD
STRAP1 STRAP0 ROM_SI
B9 STRAP1 ROM_SI A10
STRAP2 A9 C10 ROM_SO R422 R421
STRAP2 ROM_SO
C9 ROM_SCLK 5K 1000 0000 R468 R467 R460
ROM_SCLK *4.99K/F_4
D
10K 1001 0001 R459
D
I2CB_SCL R2 I2CB_SCL_G R390 *2.2K_4 +3V_GFX STRAP0 USER[3] USER[2] USER[1] USER[0] 1111
GFX_THMD- D8 R3 I2CB_SDA_G R392 *2.2K_4
T26 THERMDN I2CB_SDA
VRAM Configuration Table
GFX_THMD+ D9 A2 I2CC_SCL_G R410 *33_4 EDIDCLK
T27 THERMDP I2CC_SCL EDIDCLK [7,19]
B1 I2CC_SDA_G R404 *33_4 EDIDDATA EDIDDATA [7,19] RAMCFG
JTAG_TCK
JTAG_TMS
AF3
AF4
JTAG_TCK
I2CC_SDA
[3:0]
0000
DESCRIPTION Vendor
Reserved
Vendor P/N ROM_SI
(Ra)
JTAG_TDI JTAG_TMS
AG4 AKD58GGT^01 0001 DDR3 64Mx16x8, 128bit, 1GB,800MHz Qimonda IDGH1G-04A1F1C-16X PD 10K
T18
JTAG_TDO AE4
JTAG_TDI
JTAG_TDO
For Discrete Only AKD5LZGTW00 0010 DDR3 64Mx16x8, 128bit, 1GB,800MHz Hynix H5TQ1G63BFR-12C PD 15K
JTAG_TRST# AG3 AKD5LGGT502 0011 DDR3 64Mx16x8, 128bit, 1GB,800MHz Samsung K4W1G1646E-EC12 PD 20K
JTAG_TRST*
0101 Reserved
0110
GPIO0 N1 DGPU_PIN_N1 T3 XXXX DDR3 64Mx16x8, 128bit, 1GB,667MHz Hynix H5TQ1G63AFR-14C
GPIO1 G1 HDMI_DET [30] XXXX DDR3 64Mx16x8, 128bit, 1GB,667MHz Samsung K4W1G1646D-EC12
GPIO2 C1 DPST_PW M_DGPU R499 *0_4
DPST_PW M [7,19]
GPIO3 M2 DISP_ON_DGPU R583 *0_4
DISP_ON [7,19]
DGPU_I2CS_SCL T1 M3 LVDS_BLON_DGPU R584 *0_4
I2CS_SCL GPIO4 LVDS_BLON [7,19]
DGPU_I2CS_SDA T2 K3
I2CS_SDA GPIO5 V_PW RCNTL [35]
K2
T6
W6
RFU0 (NC)
GPIO6
GPIO7
GPIO8
J2 DGPU_PIN_J2
C2 DGPU_GPIO8 R591
M1 ALERT
*0_4 VGA_OVT#
T2
VGA_GPIO6 [35]
VGA_OVT# [27]
JTAG_TMS R376
+3V_GFX
*10K/F_4
GPIO ASSIGNMENTS
RFU1 (I2CE_SDA) GPIO9 T28
B Y6 RFU2 (I2CE_SCL) GPIO10 D2 B
JTAG_TDI R374 *10K/F_4
AA6
N3
RFU3 (NC) GPIO11 D1
J3
GPIO I/O ACTIVE USAGE
RFU4 (I2CD_SDA) GPIO12 VGA_OVT# R385 *10K/F_4
GPIO13 J1
GPIO14 K1
F3 ALERT R388 *10K/F_4
0 N/A N/A
GPIO15
GPIO16 G3
G2 JTAG_TCK R372 *10K/F_4
1 IN N/A Hot plug detect for IFP link C
GPIO17
GPIO18 F1
F2 JTAG_TRST# R397 *10K/F_4
2 OUT HIGH PANEL BACKLIGHT PWM
GPIO19
DPST_PW M_DGPU R384 *2K/F_4
3 OUT HIGH PANEL POWER ENABLE
4 OUT HIGH PANEL BACKLIGHT ENABLE
5 OUT N/A NVVDD VID0
R593 *0_4
6 OUT N/A NVVDD VID1
DGPU_I2CS_SCL 1 3
7 OUT N/A NVVDD VID2 11/13
MBCLK2 [8,27]
*2N7002E HDCP ROM 8 I/O LOW OVERT
R801 Q15
9 I/O LOW ALERT
2
*4.7K_4 +3V_GFX
U26
10 OUT N/A FBVREF SELECT
C560 *.1U/10V_4
+3V_GFX 1 A0 VCC 8 11 OUT N/A SLI SYNC0
R802
2 A1 WP 7 R428 *10K/F_4
12 IN N/A PWR_LEVEL11/13
A A
HDCP_SCL R424 *2.2K_4
*4.7K_4 3 A2 SCL 6 +3V_GFX 13 OUT N/A MEM_VID or power supply control
2
*2N7002E
Q30 HDCP_SDA R418 *2.2K_4
DGPU_I2CS_SDA 1 3
4 GND SDA 5 14 OUT N/A PS CONTROL
MBDATA2 [8,27]
*AT88SC0808C-SU
PROJECT : SW9
R594 *0_4 Quanta Computer Inc.
DHCP ROM
Low: Crypto ROM Size Document Number Rev
Mount Q15 , Q30 , R801 , R802 HDCP_SCL Custom
N10M-GE (GPIO&STRAPS) 4/5 1A
For Switchable only Hi: I2C ROM Date: W ednesday, December 02, 2009 Sheet 17 of 44
5 4 3 2 1
1 2 3 4 5 6 7 8
U11
[15] VMA_DQ[63..0]
[15] VMA_DM[7..0]
[15] VMA_W DQS[7..0]
[15] VMA_RDQS[7..0]
3/27 Swap
CHANNEL A: 256MB/512MB DDR3
U30 3/27 Swap U12 3/27 Swap U31
18 3/27 Swap
VREFC_VMA1 M8 E3 VMA_DQ20 VREFC_VMA1 M8 E3 VMA_DQ8 VREFC_VMA3 M8 E3 VMA_DQ45 VREFC_VMA3 M8 E3 VMA_DQ58
VREFD_VMA1 VREFCA DQL0 VMA_DQ18 VREFD_VMA1 VREFCA DQL0 VMA_DQ12 VREFD_VMA3 VREFCA DQL0 VMA_DQ41 VREFD_VMA3 VREFCA DQL0 VMA_DQ60
H1 VREFDQ DQL1 F7 H1 VREFDQ DQL1 F7 H1 VREFDQ DQL1 F7 H1 VREFDQ DQL1 F7
F2 VMA_DQ23 F2 VMA_DQ9 F2 VMA_DQ43 F2 VMA_DQ56
DQL2 VMA_DQ19 FBA_CMD19 DQL2 VMA_DQ15 FBA_CMD19 DQL2 VMA_DQ40 FBA_CMD19 DQL2 VMA_DQ57
[15] FBA_CMD19 N3 A0 DQL3 F8 N3 A0 DQL3 F8 N3 A0 DQL3 F8 N3 A0 DQL3 F8
P7 H3 VMA_DQ21 FBA_CMD25 P7 H3 VMA_DQ11 FBA_CMD25 P7 H3 VMA_DQ47 FBA_CMD25 P7 H3 VMA_DQ59
[15] FBA_CMD25 A1 DQL4 A1 DQL4 A1 DQL4 A1 DQL4
A P3 H8 VMA_DQ17 FBA_CMD22 P3 H8 VMA_DQ13 [15] FBA_CMD4 FBA_CMD4 P3 H8 VMA_DQ44 FBA_CMD4 P3 H8 VMA_DQ63 A
[15] FBA_CMD22 A2 DQL5 A2 DQL5 A2 DQL5 A2 DQL5
N2 G2 VMA_DQ22 FBA_CMD24 N2 G2 VMA_DQ10 [15] FBA_CMD6 FBA_CMD6 N2 G2 VMA_DQ46 FBA_CMD6 N2 G2 VMA_DQ61
[15] FBA_CMD24 A3 DQL6 A3 DQL6 A3 DQL6 A3 DQL6
P8 H7 VMA_DQ16 FBA_CMD0 P8 H7 VMA_DQ14 [15] FBA_CMD5 FBA_CMD5 P8 H7 VMA_DQ42 FBA_CMD5 P8 H7 VMA_DQ62
[15] FBA_CMD0 A4 DQL7 A4 DQL7 A4 DQL7 A4 DQL7
P2 FBA_CMD2 P2 [15] FBA_CMD13 FBA_CMD13 P2 FBA_CMD13 P2
[15] FBA_CMD2 A5 A5 A5 A5
R8 FBA_CMD21 R8 FBA_CMD21 R8 FBA_CMD21 R8
[15] FBA_CMD21 A6 A6 A6 A6
R2 D7 VMA_DQ6 FBA_CMD16 R2 D7 VMA_DQ28 FBA_CMD16 R2 D7 VMA_DQ37 FBA_CMD16 R2 D7 VMA_DQ51
[15] FBA_CMD16 A7 DQU0 A7 DQU0 A7 DQU0 A7 DQU0
T8 C3 VMA_DQ7 FBA_CMD23 T8 C3 VMA_DQ29 FBA_CMD23 T8 C3 VMA_DQ39 FBA_CMD23 T8 C3 VMA_DQ53
[15] FBA_CMD23 A8 DQU1 A8 DQU1 A8 DQU1 A8 DQU1
R3 C8 VMA_DQ2 FBA_CMD20 R3 C8 VMA_DQ26 FBA_CMD20 R3 C8 VMA_DQ32 FBA_CMD20 R3 C8 VMA_DQ49
[15] FBA_CMD20 A9 DQU2 A9 DQU2 A9 DQU2 A9 DQU2
L7 C2 VMA_DQ4 FBA_CMD17 L7 C2 VMA_DQ25 FBA_CMD17 L7 C2 VMA_DQ36 FBA_CMD17 L7 C2 VMA_DQ55
[15] FBA_CMD17 A10/AP DQU3 A10/AP DQU3 A10/AP DQU3 A10/AP DQU3
R7 A7 VMA_DQ1 FBA_CMD9 R7 A7 VMA_DQ27 FBA_CMD9 R7 A7 VMA_DQ33 FBA_CMD9 R7 A7 VMA_DQ48
[15] FBA_CMD9 A11 DQU4 A11 DQU4 A11 DQU4 A11 DQU4
N7 A2 VMA_DQ3 FBA_CMD14 N7 A2 VMA_DQ31 FBA_CMD14 N7 A2 VMA_DQ35 FBA_CMD14 N7 A2 VMA_DQ54
[15] FBA_CMD14 A12/BC DQU5 A12/BC DQU5 A12/BC DQU5 A12/BC DQU5
T3 B8 VMA_DQ0 FBA_CMD26 T3 B8 VMA_DQ24 FBA_CMD26 T3 B8 VMA_DQ34 FBA_CMD26 T3 B8 VMA_DQ50
[15] FBA_CMD26 A13 DQU6 A13 DQU6 A13 DQU6 A13 DQU6
T7 A3 VMA_DQ5 T7 A3 VMA_DQ30 T7 A3 VMA_DQ38 T7 A3 VMA_DQ52
A14 DQU7 A14 DQU7 A14 DQU7 A14 DQU7
M7 A15 M7 A15 M7 A15 M7 A15
+1.5V_GFX +1.5V_GFX +1.5V_GFX +1.5V_GFX
M2 B2 FBA_CMD12 M2 B2 FBA_CMD12 M2 B2 FBA_CMD12 M2 B2
[15] FBA_CMD12 BA0 VDD#B2 BA0 VDD#B2 BA0 VDD#B2 BA0 VDD#B2
N8 D9 FBA_CMD3 N8 D9 FBA_CMD3 N8 D9 FBA_CMD3 N8 D9
[15] FBA_CMD3 BA1 VDD#D9 BA1 VDD#D9 BA1 VDD#D9 BA1 VDD#D9
M3 G7 FBA_CMD27 M3 G7 FBA_CMD27 M3 G7 FBA_CMD27 M3 G7
[15] FBA_CMD27 BA2 VDD#G7 BA2 VDD#G7 BA2 VDD#G7 BA2 VDD#G7
VDD#K2 K2 VDD#K2 K2 VDD#K2 K2 VDD#K2 K2
VDD#K8 K8 VDD#K8 K8 VDD#K8 K8 VDD#K8 K8
VDD#N1 N1 VDD#N1 N1 VDD#N1 N1 VDD#N1 N1
J7 N9 VMA_CLK0 J7 N9 [15] VMA_CLK1 J7 N9 VMA_CLK1 J7 N9
[15] VMA_CLK0 CK VDD#N9 CK VDD#N9 CK VDD#N9 CK VDD#N9
K7 R1 VMA_CLK0# K7 R1 [15] VMA_CLK1# K7 R1 VMA_CLK1# K7 R1
[15] VMA_CLK0# CK VDD#R1 CK VDD#R1 CK VDD#R1 CK VDD#R1
K9 R9 FBA_CMD18 K9 R9 [15] FBA_CMD7 FBA_CMD7 K9 R9 FBA_CMD7 K9 R9
[15] FBA_CMD18 CKE VDD#R9 +1.5V_GFX CKE VDD#R9 +1.5V_GFX CKE VDD#R9 +1.5V_GFX CKE VDD#R9 +1.5V_GFX
D D
+1.5V_GFX +1.5V_GFX
[15,29,39] +1.5V_GFX
+1.5V_GFX C603 *.1U/10V_4 C599 *.1U/10V_4
C313 *.1U/10V_4 C605 *.1U/10V_4
+1.5V_GFX C318
C298
*10U/6.3V_6S
*.1U/10V_4
C609
C596
*.1U/10V_4
*.1U/10V_4
C597
C606
*.1U/10V_4
*.1U/10V_4
+1.5V_GFX
PROJECT : SW9
C604
C585
*1U/6.3V_4
*1U/6.3V_4
C610
C315
*.1U/10V_4
*.1U/10V_4
C598
C611
*.1U/10V_4
*.1U/10V_4
C612
C600
*.1U/10V_4
*.1U/10V_4
C311
C295
*.1U/10V_4
*.1U/10V_4
Quanta Computer Inc.
C584 *1U/6.3V_4 C316 *.1U/10V_4 C608 *.1U/10V_4 C308 *.1U/10V_4 C310 *.1U/10V_4
C601 *1U/6.3V_4 C314 *.1U/10V_4 C595 *.1U/10V_4 C613 *.1U/10V_4 C312 *.1U/10V_4 Size Document Number Rev
Custom 1A
N10M-GE VRAM-1(DDR3 BGA96
1211 for Nvidia request add transition cap
Date: W ednesday, December 02, 2009 Sheet 18 of 44
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
*47P/50V_4 C970
1. If LCD connector near GPU, then place these series Resistors near GPU
2. If LCD connector near N/B, then place these series Resistors near N/B
OPTION SIGNAL FROM NB FOR UMA VGA
+3VLCD_CON
2
2 1
1
*47P/50V_4 C971
LVDS_CONNECTOR
CN2
1
19
41
[7] LA_CLK RP8 1 2 4P2R-S-0 TXLCLKOUT+
TXLCLKOUT- C18 1000P/50V_4 2
[7] LA_CLK# 3 4 3
[7] LA_DATAP0 RP6 1 2 4P2R-S-0 TXLOUT0+ +3V
TXLOUT0- 4
[7] LA_DATAN0 3 4 +3.6V_CAM 5
[7] LA_DATAP1 RP5 1 2 4P2R-S-0 TXLOUT1+ [7,17] EDIDCLK
TXLOUT1- 6
A [7] LA_DATAN1 3 4 [7,17] EDIDDATA 7 A
[7] LA_DATAP2 RP7 1 2 4P2R-S-0 TXLOUT2+ TXLOUT0-
TXLOUT2- TXLOUT0+ 8
[7] LA_DATAN2 3 4 9
1
C969 C968
RP1 4P2R-S-0 TXUCLKOUT- TXLOUT1- 10
[7] LB_CLK# 1 2 11
[7] LB_CLK 3 4 TXUCLKOUT+ *68P/50V_4 *68P/50V_4 TXLOUT1+
2
RP4 4P2R-S-0 TXUOUT0+ 12
[7] LB_DATAP0 1 2 13
[7] LB_DATAN0 3 4 TXUOUT0- TXLOUT2-
RP2 4P2R-S-0 TXUOUT1+ TXLOUT2+ 14
[7] LB_DATAP1 1 2 15
[7] LB_DATAN1 3 4 TXUOUT1-
RP3 4P2R-S-0 TXUOUT2+ TXLCLKOUT- 16
[7] LB_DATAP2 1 2 17
[7] LB_DATAN2 3 4 TXUOUT2- TXLCLKOUT+
18
TXUOUT0- 19
OPTION SIGNAL FROM Nvidia to VGA 20
TXUOUT0+
*4P2R-S-0 4 RP16 TXLCLKOUT- 21
[16] EXT_TXLCLKOUT- 3 22
[16] EXT_TXLCLKOUT+ 2 1 TXLCLKOUT+ TXUOUT1-
*4P2R-S-0 2 RP14 TXLOUT0+ TXUOUT1+ 23
[16] EXT_TXLOUT0+ 1 24
[16] EXT_TXLOUT0- 4 3 TXLOUT0-
*4P2R-S-0 4 RP13 TXLOUT1- TXUOUT2- 25
[16] EXT_TXLOUT1-
2
3
1 TXLOUT1+
0820 add camera function TXUOUT2+ 26
[16] EXT_TXLOUT1+ 27
[16] EXT_TXLOUT2- *4P2R-S-0 4 3 RP15 TXLOUT2-
TXLOUT2+ TXUCLKOUT- 28
[16] EXT_TXLOUT2+ 2 1 29
L3 *W CM2012-90 TXUCLKOUT+
[16] EXT_TXUCLKOUT- *4P2R-S-0 2 1 RP9 TXUCLKOUT- CAMERA 30
31
[16] EXT_TXUCLKOUT+ 4 3 TXUCLKOUT+ 1 2 USBP5+
[9] USBP5+ 32
[16] EXT_TXUOUT0- *4P2R-S-0 4 3 RP12 TXUOUT0- 4 3 USBP5-
[9] USBP5- 33
[16] EXT_TXUOUT0+ 2 1 TXUOUT0+ [22] DIGITAL_D1 SBK160808T-301Y-N L2
*4P2R-S-0 2 TXUOUT1+ R2 LCDBL_PW M 34
[16] EXT_TXUOUT1+ 1 RP10 [7,17] DPST_PW M 0_4
35
4 3 TXUOUT1- R1 *0_4 BLON_CON
B [16] EXT_TXUOUT1- [27] PW M_VADJ 36 B
[16] EXT_TXUOUT2- *4P2R-S-0 4 3 RP11 TXUOUT2- [22] DIGITAL_CLK L4
TXUOUT2+ SBK160808T-301Y-N 37
[16] EXT_TXUOUT2+ 2 1 38
C9 *4.7U/6.3V_6
MIC +VIN_BLIGHT 39
42
C10 *.1U/10V_4
40
AO3404
2
LCDONG 2 L5
PBY201209T-4A/08
1
C20 *.01U/25V_4
3
22_8
2
0820 add camera function +VIN_BLIGHT
C C
2
1
Q6 C30 LCDDISCHG
2N7002E .22U/25V_6
2
DTC144EUA +5V
LCDON# 2 Q5 R5 0_6 +5V C2 C5 *10U/25V_12
2 2N7002E U1 .1U/50V_6 C3 .1U/50V_6
[7,17] DISP_ON
3 4 +3.6V_CAM C1 .01U/16V_4
VIN VOUT
1
C11
1 SHDN R1 R3
*1U/6.3V_4 *215K/F/04
C12 Close to Pin3
2 GND SET 5
4.7U/6.3V_6 +3.6V_CAM C6 .01U/16V_4
*IC(5P) G913C (SOT23-5)EP
R4 EMI C7 *4.7U/6.3V_6
R8 100K/F_4 R2 *100K/F/04
C22 22P/50V_4
SI-2 modified for fix DIGITAL_D1 C4 *100P/50V_4
PN_BLON BLON_CON
D2 RB500V-40 camera power fail DIGITAL_CLK C8 *100P/50V_4
Close to EC
R10 47K_4
D
+3VPCU
Vout=1.25(1+R1/R2) D
[7,17] LVDS_BLON R12 1K/F_4 2 1 LID_EC# [21,27]
D1 RB501V-40
2 1 HW PG [3,27,31,32,33,35,36]
D3 *RB501V-40
3
FUSE1A6V_POLY
+5V
40 mils
2
C479
F1
1
40 MIL
.1U/10V_4
16
+3V
6 D8 BAV99W
L9 BLM18BA470SN1D CRT_R1 1 11
[7,16] CRT_R 1
A 7 CRT_R A
L7 BLM18BA470SN1D CRT_G1 DDCDAT3 C50 *470P/50V_4 3
[7,16] CRT_G 2 12
8 2
L6 BLM18BA470SN1D CRT_B1 3 13 CRTHSYNC C518 *47P/50V_4
[7,16] CRT_B
+5VCRT 9
4 14 CRTVSYNC C56 *47P/50V_4 D7 BAV99W
R57 R43 R37 C86 C74 C67 10
C70 C79 C89 DDCCLK3 C506 *470P/50V_4 1 CRT_G
5 15 3
150/F_4 6.8P/50V_4 6.8P/50V_4 CRT CONN
150/F_4 6.8P/50V_4 6.8P/50V_4 CN19 2
17
150/F_4 6.8P/50V_4 6.8P/50V_4
D6 BAV99W
EMI 1 CRT_B
3
2
+5V
U2 D18 *BAV99W
M74VHC1GT125DF2G
1 DDCCLK2
PR_VSYNC R32 *0_4/S CRTVSYNC 3
[7,16] VSYNC_COM 2 4
short0402
2
+5V
C58
D19 *BAV99W
5 5
1 1
1 PR_VSYNC
3
B .1U/10V_4 B
2
+5VCRT 1
+3V 2 1+5VCRT2 3
DDCDAT2
D4 RB501V-40
2
R29 4.7K_4 R30 4.7K_4
2
C C
D D
PROJECT : SW9
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
[2,3,7,8,9,10,11,12,13,19,21,22,23,24,25,26,27,28,29,30,34,37,39] +3V CRT/HDMI Conn
[11,19,22,23,25,26,28,30,37] +5V
Date: W ednesday, December 02, 2009 Sheet 20 of 44
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
21
LED8
R14
USB CONNECTOR +3V 1 2
C382 .1U/10V_4 +3V
*150/F_4
C27 *LED_Blue
*.1U/10V_4
EMI +5VSUS 80 mils (Iout=2A)
+5VSUS U5
2 8 USB0PW R1 1. NBSWON1#
VIN1 OUT3
3 VIN2 OUT2 7
4 EN OUT1 6 2. GND
A 1 5 C208 C232 + C368 C206 + C369 SW 5 A
C345 C343 GND OC NBSW ON1# 3 1 3. GND
*.22U/10V_4 *.22U/10V_4 C216 G545A2PU8 *470P/50V/04 .1U/10V_4 100U/6.3V_3528 .1U/10V_4 100U/6.3V_3528 4 2
1U/6.3V_4 C385 6 5 G2 4. LID_EC#
2 1NBSW ON1#
*SHORT_ PAD1 5. +3V
1000P/50V_4 TMG-533-S-V-TR
6. +3VPCU
POWER BUTTON
40 mils
L11 CN11
USB0PW R1 Iout=1A 8
USBP0_1 1 GND
[9] USBP0+ 1 2 3 GND 7
4 3 USBP0_2 6
[9] USBP0- 2 GND
4 GND 5
LID_EC#
+3VPCU
W CM2012-90 020173MR004G552ZR
C376 C25
2
1000P/50V_4 *.01U/16V_4
1
+3VPCU
VDD
OUT
C371 .1U/10V_4
PQ Add ESD Protector
2
HE1
GND
N
S
C358 C244 EC2648-B3-F
*Clamp-Diode *Clamp-Diode
3
B B
+5VPCU_USBP0 40 mils
CN12
L31 +5VPCU_USBP0 Iout=1A 8
USBP1_1 1 GND
[9] USBP1+ 1 2 3 GND 7
4 3 USBP1_2 6
[9] USBP1- 2 GND [27] NBSW ON1#
4 GND 5 [19,27] LID_EC#
W CM2012-90 020173GR004S56AZL
+ C380
*100U/6.3V_3528
1
1
PQ Add ESD Protector
2
C366 2 C363
*Clamp-Diode *Clamp-Diode
TO M/B CON.
C PV Change CN2 footprint 88501-2001-24p-l-nb5 C
C370 .1U/10V_4
CN26
+3V 1
2
3
USBP4- 4
[9] USBP4- 5
[9] USBP4+ USBP4+
6
7
TP_L_CONN 8
[25] TP_L_CONN 9
[10] 5158_RST_R# 5158_RST_R#
10
11
12
13
14
15
16
17
18
19
20
21
CLK_48M_CR 22
D [8] CLK_48M_CR 23 D
24
AUDIO CONN
C373
*22p/50V_4 PROJECT : SW9
Quanta Computer Inc.
[7,19,23,26,27,28,31,32,33,35,37,38,39] +3VPCU
[2,3,7,8,9,10,11,12,13,19,20,22,23,24,25,26,27,28,29,30,34,37,39] +3V Size Document Number Rev
Custom 1A
RTS5159 &CR SOCKET
Date: W ednesday, December 02, 2009 Sheet 21 of 44
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
+4.75VAVDD
L29 +5V
AGND
2
C418
C683
2
C673
C684
1
*0_8
10U/6.3V_8
.1U/10V_4
1
4.7U/6.3V_6
1U/6.3V_4
5
2
U35
Vout
BYP
Vin 1
3
C669
C672
C670
C671
R563
10U/6.3V_8
.1U/10V_4
1U/6.3V_4
.047U/25V_4
10K_4
22
GND EN +5V
C411 C410 C400 Vset=1.242V
1U/6.3V_4 .1U/10V_4 10U/6.3V_8 TPS793475
+3V_DVDD
A Close to Pin9 AGND A
+4.75VAVDD
C409 .1U/10V_4
Close to Pin38
C431 10U/6.3V_8
C688 .1U/10V_4 AGND
+3V_DVDD
38
25
1
AVDD2
AVDD1
DVDD-I/O
DVDD
36 HP-R C407 1 2 .47U/10V_6
FRONT-R HP_R_C [23]
35 HP-L C434 1 2 .47U/10V_6
To Internal Speakers
FRONT-L HP_L_C [23]
[7] ACZ_SDOUT_AUDIO 5 SDATA-OUT
[7] BIT_CLK_AUDIO R271 *22_4 6 AGND SHIELD
ACZ_SDIN0_ADC 8 BIT-CLK EARPO_R R581 75/F_4 EARP_R
[7] ACZ_SDIN0 SDATA-IN HPOUT-R 32
[7] ACZ_SYNC_AUDIO R565 33_4 10 AGND SHIELD
SYNC EARPO_L R332 75/F_4 EARP_L
[7] ACZ_RST#_AUDIO 11 RESET# HPOUT-L 33
AGND SHIELD
[19] DIGITAL_D1 2 GPIO0-DMIC-12
[19] DIGITAL_CLK L30 BK1005HS601-T_4 46 DMIC-CLK
LINE1-R 24
LINE1-L 23
[23] EAPD# 47 20
B
EAPD
ALC272 LINE2-VREFO
MIC2-VREFO
LINE1-VREFO
MIC2-R
19
18
17
BIT_CLK_AUDIO
ACZ_SDIN0_ADC
C674 *27P/50V_4
C675 *27P/50V_4
B
37 MONO MIC2-L 16
39 SURR-L
41 15 FOR EMI
SURR-R LINE2-R
43 NC LINE2-L 14
+3V_DVDD 44 C691 2.2U/6.3V_6 D26 RB501V-40
DMIC-CLK3/4 MIC1_R1 EXT_MIC_R
45 SPDIFO2 MIC1-R 22 R577 1K/F_4 R579 2.2K_4 1 2 VREFOUT_B_L
1 2 48 21 MIC1_L1 R576 1K/F_4 EXT_MIC_L R575 2.2K_4 1 2
SPDIFO1 MIC1-L TO Audio Jack MIC
MIC1-VREFO-L
C412 0.047U/10V 3 C689 2.2U/6.3V_6 D25 RB501V-40
GPIO3/DMIC-34 SENSE_A R574 20K/F_4 SA_MIC#
Sense A 13
5
DVSS-I/O
Sense B R324 0_6
CPVEE
[7,10] SPKR 1
AVSS2
AVSS1
JDREF
DVSS
VREF
4 R328 C401 .1U/10V_4 12 30
100K_4 PCBEEP CBN C422 2.2U/6.3V_6 R322 0_6
2 29
[27] PC_BEEP_EC
C408 100P/50V_4 CBP TO AUDIO/B CON.
U20 R316 10K/F_4 C415 1 2 1000P/50V_4
3
4
7
31
40
42
26
27
28
NC7SZ86
R326 R321 C414 1 2 1000P/50V_4
10K_4 150K/F_4 VREFOUT_B_L C696 *1U/6.3V_4
VREF_FLT C430 *10U/6.3V_8 [19,21,25,26,37] +5VSUS
C697 .1U/10V_4 [11,19,20,23,25,26,28,30,37] +5V
AGND [2,3,7,8,9,10,11,12,13,19,20,21,23,24,25,26,27,28,29,30,34,37,39] +3V AGND
R573 20K/F_4
C699 2.2U/6.3V_6
SA_HP#
CN1 R336
1
1 7 D30 *10K_4 SA_HP#
3
EARP_L L34 0_6 EARP_L1 2
1
6 Q44
EARP_R L35 0_6 EARP_R1 3 DMN601K-7
4 SA_HP#_C 2
SA_HP#_C 5 8
2
1
*3301D-ESD
2
HP-JACK-GREEN
R266 R267 R265 R263 C15 C16
1
2
Normal close
22K/F_6 22K/F_6 *1K/F_4 *1K/F_4 100P/50V_4 100P/50V_4 C29 C26 headphone close to USB Port
Clamp-Diode Clamp-Diode
AGND AGND
3
C17 100P/50V_4 SA_MIC#
AGND Q43
D CN4 DMN601K-7 D
1
1 7 D31 SA_MIC#_C 2
EXT_MIC_L L32 0_6 MIC_IN_L 2
1
6
EXT_MIC_R L33 0_6 MIC_IN_R 3
4
1
SA_MIC#_C 5 8 PROJECT : SW9
2
MIC-JACK-PINK
AGND
Normal close
AGND Mic close to front side Size Document Number Rev
AGND Custom 1A
Azalia ALC272/BT CONN
Date: W ednesday, December 02, 2009 Sheet 22 of 44
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
AUDIO AMPLIFIER
+5VAMP
U21
R_SPK+4 R572 0_6 R_SPK+
23
R_SPK-3 R570 0_6 R_SPK- CN15
6 PVDD1 ROUT+ 18 4
15 14 C416
R353 *15K/F_4 PVDD2 ROUT- EMI requests C421 3
AGND 16 VDD *180P/50V_4 2
A 4 change footprint *180P/50V_4 A
HP_L_C R352 40.2K/F_4 C_SPKR_L LOUT+ 1
[22] HP_L_C 5 LIN- LOUT- 8
HP_R_C R318 40.2K/F_4 C_SPKR_R 17 INT SPEAKER CONN
[22] HP_R_C RIN-
C433 .47U/10V_6 19
R319 *15K/F_4 SHUTDOWN
AGND 1 2 9 LIN+
C687
C686
C690
C693
C432 .47U/10V_6 7 12 L_SPK+2 R578 0_6 L_SPK+
RIN+ NC
AGND 1 2 EPAD 21
2
10 1 L_SPK-1 R580 0_6 L_SPK-
C435 2 AMP_BYPASS BYPASS GND1
AGND 1 4.7U/10V_6 GND2 11
100P/50V_4
100P/50V_4
100P/50V_4
100P/50V_4
AUDIO_G0 2 13
1
AUDIO_G1 GAIN0 GND3 EMI requests
3 GAIN1 GND4 20
change footprint
TPA6017A2/FAN7031/LM4874 C423
*180P/50V_4
C424
*180P/50V_4
INT. SPEAKER
AGND
Close to IC
AGND
2 1
+5V +5VAMP +3V
R329 100K/F_4 6017A2 Gain Table
GAIN0 GAIN1 AV(INV)
R317 *0_6/S C429 1 2 .047U/25V_4 [27] VOLMUTE# 2 D16
short0603 C403 1 2 .1U/10V_4 BAT54A 0 0 6dB
C402 1 2 .1U/10V_4 3 EAPD#1
C695 1 2 10U/6.3V_8 AGND 0 1 10dB
[22] EAPD# 1
1 0 15.6dB
B 1 1 21.6dB B
AL001431K04
C404 1 2 1000P/50V_4 +5VAMP
AL6017A2K12
APA2031 ,AL002031K00 R331 1K/F_4
R314 0_6 R333 *100K/F_4 AUDIO_G0 2 1
R340 *1K/F_4
R323 0_6 R335 100K/F_4 AUDIO_G1 2 1
AGND
AGND
3
R597 Q40
C665 .1U/10V_4 10K/F_4 10/9
+3V_W LAN_P 1 3 2 2 C543 PW R_LED#
C
0_6 R562 +3V 680P/50V_4 C
1
+3V C579 MBATLED0#
Q41 680P/50V_4
CN25 C667 1000P/50V_4
[7] ACZ_SDOUT_MDC 3 2 C668 2.2U/6.3V_6
A_SDO REV C666 .1U/10V_4 C588 BATLOW #
[7] ACZ_SYNC_MDC 7 A_SYNC VCC 6 [27,28] RF_LINK# [25,27,28] BLUELED
[7] ACZ_SDIN1 AC_SDIN1_MDC 9 4 680P/50V_4
A_SDI REV
[7] ACZ_RST#_MDC R559 33_4 11 A_RST# A_BCLK 12 BIT_CLK_MDC [7] 朝朝 LED2 R338 51/F_6
1 8 C664 *10P/50V_4 4 2 MBAT_R_LED1 1 2
GND GND [27] BATLOW # Red +3VPCU
5 10 R345 51/F_6 C593 SATA_LED#
GND GND 680P/50V_4
[27] MBATLED0# 3 1 1 2
MDC CONN Green
C655
*10P/50V_4 C632 NUMLED#
680P/50V_4
LED3
朝朝 Orange_LED R354 150_6 C633 CAPSLED#
PW R_R_LED1 1 2 680P/50V_4
[27] PW R_LED# +3VPCU
LED4
朝朝 Orange_LED R343 150_6 C634 RF_LINK#
SATA_R_LED1 1 2 680P/50V_4
[7] SATA_LED# +3V
LED5
朝朝 Orange_LED R347 150_6
NUM_LED 1 2
[27] NUMLED# +3V
D
LED6 D
朝朝 Orange_LED R342 150_6
CAP_LED 1 2
[27] CAPSLED# +3V
PROJECT : SW9
Quanta Computer Inc.
[11,19,20,22,25,26,28,30,37] +5V
[7,19,21,26,27,28,31,32,33,35,37,38,39] +3VPCU Size Document Number Rev
Custom 1A
[2,3,7,8,9,10,11,12,13,19,20,21,22,24,25,26,27,28,29,30,34,37,39] +3V AMP_TPA6017/SPK/MDC/LED
Date: W ednesday, December 02, 2009 Sheet 23 of 44
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
+3VLANVCC
24
close to Pin2
A A
2
AVDDL R556 0_4 R555 *0_4 AVDDVCO1 AVDDL C627 0.1U/10V_4 R240 *10K/F_4 +3VLANVCC
AVDDVCO2 +3VLANVCC
[8] SMB_DATA_ME0 SMB_DATA_ME0 3 1 SMBDATA
C628 0.1U/10V_4 Q11 *2N7002E
close to Pin42 U15
42
11
16
22
36
39
8
2
R236 0_4
R264 *0_4
AVDDL
AVVDL
AVDDL
AVDDL
AVDDL
AVDD_REG
VDD11_REG
VDD 3V
[27] LAN_REST#
[3,8,27,28,29] PLTRST# R262 0_4 LAN_REST_R# 3 PERSTn +3V
[8] PCIE_RXP1_LAN C362 0.1U/10V_4 PCIE_RXP1_LAN_L 38 13 MDI0+ R257 49.9/F_4 C333 0.1U/10V_4
C357 0.1U/10V_4 PCIE_RXN1_LAN_L 37 TX_P TRXP0 MDI0- R256 49.9/F_4
[8] PCIE_RXN1_LAN TX_N TRXN0 14
2
[8] PCIE_TXP1_LAN 43 17 MDI1+ R254 49.9/F_4 C332 0.1U/10V_4 R246 *10K/F_4 +3VLANVCC
RX_P TRXP1 MDI1- R253 49.9/F_4
[8] PCIE_TXN1_LAN 44 RX_N TRXN1 18
20 MDI2+ R252 49.9/F_4 C331 0.1U/10V_4 [8] SMB_CLK_ME0 SMB_CLK_ME0 3 1 SMBCLK
TRXP2 MDI2- R251 49.9/F_4 Q12 *2N7002E
[8] CLK_PCIE_LAN 41 REFCLKP TRXN2 21
B [8] CLK_PCIE_LAN# 40 23 MDI3+ R250 49.9/F_4 C338 0.1U/10V_4 B
PCIE_CLK_REQ3# REFCLKN TRXP3 MDI3- R249 49.9/F_4 R243 0_4
[8] PCIE_CLK_REQ3# 27 CLKREQn TRXN3 24
AR8132(M) can remove
[9,28] PCIE_W AKE# PCIE_W AKE# 4 WAKEn
AR8131-AL1E-R
LED_ACTn 47 LED_LINK_ACT#
LAN_GLINK100#
Lan_RBIAS 12 LED_10_100n 48
26
close to Pin1
R255 2.37K_4 RBIAS LED_LINK1000n C355 0.1U/10V_4
7 SEL_25 MHz
R259 *4.7K_4 1 LX L16 C349 10U/6.3V_8
LX 4.7UH,+-20%,580MA_8
Ra 6 V_DAC C354 0.1U/10V_4
Clock Resource R261
SMBCLK 31
*4.7K_4SMBDATA 33 SMCLK
VDD17
close to Pin6
+3VLANVCC SMDATA
DVDD0_REG
DVDD1_REG
TW SI_SCL R258 *4.7K_4
For AR8131/M Input 25MHz: Remove Ra XTAL2 TWSI_CLK 29
TW SI_SDA R260 *4.7K_4
+3VLANVCC
VDD 25 V
9 XTLO TWSI_DATA 30
VDDHO
XTAL1
AVDDH
AVDDH
For AR8131/M Input 48MHz: Stuff Ra
DVDDL
DVDDL
10 XTLI
Y1 35
GND
NO CONN
1 2 TESTMODE 34
1
25MHZ
49
5
15
19
25
28
32
45
46
C344 C340
33P/50V_4 33P/50V_4
2
AVDDH
AVDDH
AVDDH
AVDDH
DVDDL
DVDDL
DVDDL
DVDDL
GIGABIT AL008131001
C630 1U/6.3V_4 10/100
C625 0.1U/10V_4 C623 0.1U/10V_4
AL008132002
[2,3,7,8,9,10,11,12,13,19,20,21,22,23,25,26,27,28,29,30,34,37,39] +3V
C619 1U/6.3V_4 [37] +3VLANVCC
C617 0.1U/10V_4 C621 0.1U/10V_4
AR8132(M) can remove C620 0.1U/10V_4 C629 0.1U/10V_4
C C
LAN_AGND
LAN_MX3+ 9 C82 *.01U/16V_4
Transformer for 10/100/1000 LAN_MX3- 10 MX3+
MX3- GND 17
SATA ODD
[7]
[7]
SATA_TXP1
SATA_TXN1
Close to connector.
C395
C393
.01U/16V_4
.01U/16V_4
SATA_TXP1_C
SATA_TXN1_C
2
3
CN24
TXP
TXN
S1
+5V
25
A 14 14
[7] SATA_RXN1_C C390 .01U/16V_4 SATA_RXN1 5
C386 .01U/16V_4 SATA_RXP1 6 RXN C372 10U/6.3V_6S
16
[7] SATA_RXP1_C
1
R281
2
1K/F_4
8
9
RXP
DP B
+5V
16
S7
120 mils
C379
C381
.1U/10V_4
.1U/10V_4 Bluetooth
A +5V 10 C377 .1U/10V_4 A
+5V P1 C375 .1U/10V_4
11 MD
1 GND1 17 17
4 GND2
7 GND3 15 15
12 GND
13 GND P6 CN3
SATA ODD
SATA-48325-1103-13P-R-H-QT6 6
[9] USBP12+ 5
[9] USBP12- 4
[10] BT_OFF# 3
+3V 2
C14 *1000P/50V_4
R268 0_8 .1U/10V_4 BLUE TOOTH CONN
87213-0600-6P-L
+3V_HDD1 +3V
CN17 DC Current rating: 0.5 A
C11806-12204-L
Main HDD R42 0_8
+5V: 2 A(3 Pin)
+5V
RSVD
GND3
GND2
GND1
GND
GND
GND
GND
RXN
RXP
3.3V
3.3V
3.3V
TXN
TXP
12V
12V
12V
C41 *10U/6.3V_8
5V
5V
5V
B C51 10U/6.3V_6S B
C55 4.7U/6.3V_6
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
C59 .1U/10V_4
+3V_HDD1
CN10
TOUCH PAD CONN
C406
.1U/10V_4
1
D D
SW 2
TP_R R308 1K/F_4 TP_R_CONN 3 1
4 2
2
C397
6 5 PROJECT : SW9
.1U/10V_4 Quanta Computer Inc.
1
TMG-533-S-V-TR
[2,3,7,8,9,10,11,12,13,19,20,21,22,23,24,26,27,28,29,30,34,37,39] +3V
[11,19,20,22,23,26,28,30,37] +5V Size Document Number Rev
Custom 1A
[19,21,26,37] +5VSUS ODD/HDD/NEW CARD/TP
Date: W ednesday, December 02, 2009 Sheet 25 of 44
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
MY8
MY9
C282
C279
C283
C284
C285
220P/50V_4
220P/50V_4
220P/50V_4
220P/50V_4
220P/50V_4
MY2
MY4
MY0
MX4
MX6
C276
C280
C270
C274
C277
220P/50V_4
220P/50V_4
220P/50V_4
220P/50V_4
220P/50V_4
MX0
MX5
MX1
MY12
MY13
C268
C275
C269
C288
C289
220P/50V_4
220P/50V_4
220P/50V_4
220P/50V_4
220P/50V_4
26
MY10 C286 220P/50V_4 MX3 C273 220P/50V_4 MY14 C290 220P/50V_4
MY11 C287 220P/50V_4 MX2 C272 220P/50V_4 MY15 C291 220P/50V_4
A A
CN9
+3VPCU
26
MY2
MY15 25
RP21
MY3 MY14 24
10 1 23
MY4 9 2 MY2 MY13
MY5 MY1 MY12 22
8 3 21
MY6 7 4 MY0 MY11
MY7 MY10 20
6 5 19
MY9
MY8 18
+3VPCU 10P8R-8.2K
MY7 17
MY6 16
RP22
MY11 MY5 15
10 1 14
MY12 9 2 MY10 MY4
CPU FAN MY13
MY14
8
7
3
4
MY9
MY8
MY3
MX7
13
12
11
MY15 6 5 +3VPCU MX6
MY2 10
MX5 9
10P8R-8.2K
C547 2.2U/6.3V_6 MX4 8
CN18 MX3 7
+5V_FAN MX2 6
1 1 5
C545 .1U/10V_4 2 1212 ADD fix MY[0..15] MY1
2 [27] MY[0..15] 4
[27] FAN1SIG 3 4 pin to GND MY0
3 4 MX1 3
B for lay out 2 B
R407 4.7K_4 FAN CONN MX[0..7] MX0
+3V concern [27] MX[0..7] 1
27
DFHD03MR008 6906-25
G991PV11
1 2 3 4
C C
E-SATA/USB COMBO
+5VSUS +5VPCU_USBP0 80 mils (Iout=2A)
U14
2 8 +5VPCU_USBP0 C329 100U/6.3V_3528
VIN1 OUT3 C334 .1U/10V_4
3 7
+
C352 G545A2P8U
1U/6.3V_4 PV change footprint
change to G545A2P8U 2A
+5VPCU_USBP0
CN23
W CM2012-90 C353 *Clamp-Diode USB & ESATA
1 2 +5VPCU_USBP0 1 USB Vcc
4 3 USBP2_2 2
[9] USBP2- D-
1 2 USBP2_1 3
[9] USBP2+ D+
D 4 GND D
L17
C356 *Clamp-Diode 5 14
1 2 C367 .01U/16V_4 SATA_TXP5_C 6 GND Shield
[7] SATA_TXP5 A+
[7] SATA_TXN5 C361 .01U/16V_4 SATA_TXN5_C 7 15
A- Shield
+3VPCU
[7]
[7,28]
[7,28]
SERIRQ
LFRAME#
LAD0
SERIRQ
LFRAME#
LAD0
3
4
10
U19
SERIRQ
LFRAME
LAD0
VCC1
VCC2
VCC3
9
22
33
C420
C399
C678
C438
.1U/10V_4
.1U/10V_4
.1U/10V_4
.1U/10V_4
+3VPCU_EC
U18
*GMT_G910T21U
+5VPCU
thermal shutdown circuit
3920_RST#
3
[7,28] LAD1 LAD1 8 96 C436 .1U/10V_4 +3VPCU L18 1 3 Q29
LAD2 LAD1 VCC4 Vout Vin
7 111 C425 .1U/10V_4 BLM18BA470SN1 2 OVT_DETC 2 1 ECPW ROK
GND
[7,28] LAD2 LAD2 VCC5
[7,28] LAD3 LAD3 5 125 C413 10U/6.3V_8 D24 RB501V-40
LAD3 VCC6 MMBT3904-7-F
[9] CLK_33M_KBC 12 67 +3VPCU_EC
1
PCICLK AVCC SYS_SHDN-1#
[3,8,24,28,29] PLTRST# 13 2 1 VGA_OVT# [17]
2
CLKRUN# PCIRST/GPIO5 C396 .1U/10V_4 C394 D23 RB501V-40
A [9] CLKRUN# 38 CLKRUN A
*.1U/10V_4
SCI1# 20 R561 *4.7K_4 +1.05V
GATEA20 SCI/GPIOE TEMP_MBAT
[10] GATEA20 1 GA20/GPIO0 AD0/GPI38 63 TEMP_MBAT [38]
2
[10] RCIN# RCIN# 2 64
3920_RST# KBRST/GPIO1 AD1/GPI39 AD_AIR
37 ECRST AD2/GPI3A 65 AD_AIR [38]
66 SYS_I 3 1 PM_THRMTRIP# [3,10]
AD3/GPI3B SYS_I [38]
[26] MX0 MX0 55 Q27 *MMBT3904-7-F
MX1 KSI0/GPIO30 CC-SET
[26] MX1 56 KSI1/GPIO31 DA0/GPO3C 68 CC-SET [38]
[26] MX2 MX2 57 70 CELL_SLT
KSI2/GPIO32 DA1/GPO3D CELL_SLT [38]
[26] MX3 MX3 58 71 VFAN
KSI3/GPIO33 DA2/GPO3E VFAN [26] D27
[26] MX4 MX4 59 72 D/C#
KSI4/GPIO34 DA3/GPO3F D/C# [38] +3VPCU
[26] MX5 MX5 60 DGPU_HOLD_RST# 1 2 OVT_DETC
MX6 KSI5/GPIO35 PW M_VADJ
[26] MX6 61 KSI6/GPIO36 PWM1/GPIOE 21 PW M_VADJ [19]
[26] MX7 MX7 62 23 PC_BEEP_EC
KSI7/GPIO37 PWM2/GPIO10 PC_BEEP_EC [22]
DV2 Add *RB501V-40
[26] MY0 MY0 39 26 R350
KSO0/GPIO20 FANPWM1/GPIO12 CV-SET [38]
MY1 40 27 EC_ACLIM 10K/F_4
[26]
[26]
MY1
MY2 MY2 41
KSO1/GPIO21
KSO2/GPIO22
FANPWM2/GPIO13
FANFB1/GPIO14 28 FAN1SIG
EC_ACLIM [38]
FAN1SIG [26]
For Switchable Only
MY3 CIR_IN
[26] MY3
MY4
42
43
KSO3/GPIO23 FANFB2/GPIO15 29 T15 Un-mount D24 LG
High:LG
[26] MY4 KSO4/GPIO24
[26] MY5 MY5
MY6
44
45
KSO5/GPIO25 SCL1/GPIO44 77
78
MBCLK
MBDATA
MBCLK [38] Low :CB
[26] MY6 KSO6/GPIO26 SDA1/GPIO45 MBDATA [38]
[26] MY7 MY7 46 79 MBCLK2
KSO7/GPIO27 SCL2/GPIO46 MBCLK2 [8,17]
[26] MY8 MY8 47 80 MBDATA2 R349
KSO8/GPIO28 SDA2/GPIO47 MBDATA2 [8,17]
[26] MY9 MY9 48 *10K/F_4
MY10 KSO9/GPIO29
[26] MY10 49 KSO10/GPIO2A
[26] MY11 MY11 50
MY12 KSO11/GPIO2B
[26] MY12 51 KSO12/GPIO2C
B [26] MY13 MY13 52 B
MY14 KSO13/GPIO2D SUSB#
53 6
[26]
[26]
MY14
MY15 MY15 54
KSO14/GPIO2E
KSO15/GPIO2F
GPIO4
HW PG
SUSB# [9]
SPI BIOS
81 KSO16/GPIO48 GPIO7 14 HW PG [3,19,31,32,33,35,36]
82 15 PM_BATLOW 1#
KSO17/GPIO49 GPIO8
SUSC#
512K byte SPI ROM for EC SPI ROM Socket
83 PSCLK1/GPIO4A GPIOA 16 SUSC# [9]
SLPBTN# 84 17 LAN_REST# MXIC: AKE3KZP0001 DG008000031
PSDAT1/GPIO4B GPIOB LAN_REST# [24]
EC_GPIO4C 85 18 SW I#1
PSCLK2/GPIO4C GPIOC T17 WINBOND: AKE37ZN0N00 +3VPCU
[38] ACIN ACIN 86 19 NBSW ON1#
PSDAT2/GPIO4D GPIOD NBSW ON1# [21]
[25] TPCLK TPCLK 87 25 BL/C# AIT: AKE3GZP0801
PSCLK3/GPIO4E GPIO11 T16
[25] TPDATA TPDATA 88 30 U36 C419 .1U/10V_4
PSDAT3/GPIO4F GPIO16 EC_DEBUG1 [28]
31 EC-GPIO17 BIOS_CS# 1 8
GPIO17 T14 CE# VDD
BIOS_RD# 119 32 KBSMI#1 EC_SPI_CLK R351 33_4 6
BIOS_W R# RD GPIO18 BIOS_W R# SCK
120 WR 5 SI
BIOS_CS# 128 34 VRON BIOS_RD# 2 7 SPI_7P
SELMEM/SPICS GPIO19 VRON [34] SO HOLD#
[9] PCI_SERR# 89 36 NUMLED# R330 10K/F_4
SELIO/GPIO50 GPIO1A NUMLED# [23]
76 +3VPCU SPI_3P 3 4
LG SELIO2/GPIO43 HDMI_DET1 R566 10K/F_4 WP# VSS
109 D0/GPXD0 HDMI_DET1 [30]
[9,29] DGPU_PW ROK R799 *0_4 EC_GPXD1 110
D1/GPXD1 AC_PRESENT [9]
[9] SUS_PW R_ACK 112 512K SPI ROM
D2/GPXD2 DG008000031
114 D3/GPXD3 CIR_RX/GPIO40 73 Rb 10K/F_4 Adapter table select
[23,28] RF_LINK# 115 74 R306 +3VPCU X6179-10XXXX-8P-SOCKET
D4/GPXD4 GPIO41 R307 *10K/F_4
116
117
D5/GPXD5 GPIO42 75
90 DNBSW ON#1
ID Ra Rb
D6/GPXD6 GPIO52 CAPSLED#
Ra
R348
118 D7/GPXD7 GPIO53 91
92 PW R_LED#
CAPSLED# [23] 120W 10K N/A
GPIO54 PW R_LED# [23]
*4.7K_4 BIOS_A0 ECPW ROK R571 *10K/F_4 HW PG
SUSON
97
98
A0/GPXA0 GPIO55 93
95 RSMRST#
ECPW ROK [9] 65W/90W N/A 10K +3V
[36,37] SUSON A1/GPXA1 GPIO56 RSMRST# [9]
C [33,35,36,37,38] MAINON MAINON 99 121 VOLMUTE# +3VPCU R569 10K/F_4 NBSW ON1# C
A2/GPXA2 GPIO57 VOLMUTE# [23]
[37] LAN_POW ER LAN_POW ER 100 126 EC_SPI_CLK
S5_ON A3/GPXA3 GPIO58 LID_EC# R325 10K/F_4 SLPBTN#
[37] S5_ON 101 A4/GPXA4 GPIO59 127 LID_EC# [19,21]
[9,29] DGPU_HOLD_RST# R796 *0_4 EC_GPXA5 102
R798 *0_4 EC_GPXA6 A5/GPXA5 C692 27P/50V_4 R310 4.7K_4 MBCLK
[9] DGPU_PW R_EN# 103 A6/GPXA6
[9,30] DGPU_SELECT# R797 *0_4 EC_GPXA7 104 123 CRY2 1 2 R309 4.7K_4 MBDATA
A7/GPXA7 XCLKO
[23] MBATLED0# 105 A8/GPXA8
4
GND1
GND2 24 1 2
For KB3926 B, C version 35 +3VPCU R311 47K_4 C398 .1U/10V_4
GND3 C694 27P/50V_4
124 V18R GND4 94
GND5 113
2
AGND 69
C437 C439
.1U/10V_4 4.7U/6.3V_6
DV1 Modify
1
KB3926QF D2
SCI1# D14 1 2 RB501V-40 SIO_EXT_SCI# [10]
PM_BATLOW 1# D15 1 2 RB501V-40 PM_BATLOW # [9]
RF_LINK#
DNBSW ON#1 D17 1 2 RB501V-40 DNBSW ON# [9]
3
D
Q17 D
DTC144EUA
1
PROJECT : SW9
[9] EDID_SELECT# R800 *0_4 EC_GPXA7 Quanta Computer Inc.
[2,3,7,8,9,10,11,12,13,19,20,21,22,23,24,25,26,28,29,30,34,37,39] +3V
[7,19,21,23,26,28,31,32,33,35,37,38,39] +3VPCU
[31,32,33,34,35,36,37] +5VPCU Size Document Number Rev
Custom 1A
KB3926/ROM/TP
Date: W ednesday, December 02, 2009 Sheet 27 of 44
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
C391 10U/6.3V_6S
+3V
R239 *0_8
+3V_W LAN_P
C392 10U/6.3V_6S
28
CN29 C661 .1U/10V_4 C662 .1U/10V_4
6 52 CLK_33M_DEBUG C677 *33P/50V_4 C659 .01U/16V_4 C658 .1U/10V_4
+1.5V +3.3V R567 *0_4 C679 .1U/10V_4
28 +1.5V +3.3V 2 1 3
48 24 R305 for EMI request
+1.5V +3.3Vaux 10K/F_4 R502
A 51 Reserved Reserved 41 A
49 39 4.7K_4 ME2303T1
2
Reserved Reserved RF_LINK#
47 Reserved LED_WLAN# 44 RF_LINK# [23,27]
45 46 R346 BLUELED [23,25,27] Q35 R737
Reserved LED_WPAN# *0_4 *100K/F_4
[9] CLK_33M_DEBUG 19 Reserved LED_WWAN# 42
PLTRST# 17 38 USBP10+ [9] INTEL WLAN
PCIE_TXP0 Reserved USB_D+
[8] PCIE_TXP0 33 PETp0 USB_D- 36 USBP10- [9] CARD PIN 20
[8] PCIE_TXN0 PCIE_TXN0 31 32 W_DISABLE#
PETn0 SMB_DATA
3
[8] PCIE_RXP0 PCIE_RXP0 25 30 2/26 SI for H/W change.
PERp0 SMB_CLK have
[8] PCIE_RXN0 PCIE_RXN0 23 22 W LANE_PLTRST#
CLK_PCIE_W LAN PERn0 PERST# internal RF_OFF# Q25
[8] CLK_PCIE_W LAN 13 REFCLK+ W_DISABLE# 20 RF_OFF# [10] 2
CLK_PCIE_W LAN# 11 16 LAD0 pull-up 110k DTC144EUA
[8] CLK_PCIE_W LAN# REFCLK- Reserved LAD0 [7,27] ohm
[8] PCIE_CLK_REQ1# 7 14 LAD1 LAD1 [7,27] R301 *10K/F_4 +3V
BT_COMBO_EN_R# CLKREQ# Reserved LAD2
[9] BT_COMBO_EN# 5 12 LAD2 [7,27]
1
R564 0_4 BT_CHCLK Reserved LAD3
3 BT_DATA Reserved 10 LAD3 [7,27]
MINICAR_PME# 1 8 LFRAME# LFRAME# [7,27]
WAKE# Reserved
43 Reserved GND 50
BT_DATA,BT_CHCLK,CLKREQ# 37 40 10/05
Reserved GND
internal pull-DOWN 100k 35 GND GND 34
29 26 +3V
ohm GND GND
27 GND GND 18
21 GND GND 4
15 9 +3VPCU R413 PLTRST#
GND GND
5
*0_4
MINI PCIE H=7.0 2 +3V_W LAN_P
MIPCIEXP-1775838-1-52P R313 *10K/F_4 W LANE_PLTRST# R398 100/F_4 W LAN_RST_OUT 4
1 PLTRST# PLTRST# [3,8,24,27,29]
3
B C785 U66 B
.1U/10V_4 MC74VHC1G08DFT2G
[9,24] PCIE_W AKE# 3 1 MINICAR_PME#
Q16 *DTC144EUA
+5V
+3V +1.5V
D D
C682 10U/6.3V_6S
C685 C681 .1U/10V_4 C657 10U/6.3V_6S
C656 .1U/10V_4 C660 .1U/10V_4
1000P/50V_4 C680 .1U/10V_4 C663 .01U/16V_4
PROJECT : SW9
Quanta Computer Inc.
[37] +1.5V
[2,3,7,8,9,10,11,12,13,19,20,21,22,23,24,25,26,27,29,30,34,37,39] +3V
[7,19,21,23,26,27,31,32,33,35,37,38,39] +3VPCU Size Document Number Rev
Custom 1A
[11,19,20,22,23,25,26,30,37] +5V MINI PCIE CONN X2
Date: W ednesday, December 02, 2009 Sheet 28of 44
1 2 3 4 5 6 7 8
5 4 3 2 1
29
D D
DEL Switch IC
DEL Switch IC
C C
SEL FUNCTION
LOW DGPU
HIGH IGPU
B +3V_GFX B
SELx Ay +3V
LOW B1 R747
HIGH B2 *4.7K_4
R744
DGPU_PWROK [9,27]
Discrete Only
*4.7K_4
+3V PLTRST# R472 0_4 PEGX_RST#
3
DGPU_PGOK-1 2
Q71
*DTC144EUA R736 U63 C948
3
5
*MMBT3904-7-F *1000P/50V_4 [3,8,24,27,28] PLTRST# PLTRST# 2
1
C963 4 PEGX_RST#
PEGX_RST# [14]
*1000P/50V_4 [9,27] DGPU_HOLD_RST# R219 DGPU_HRST_EN 1
*330/F_4
R733
3
3
R745
3
+1.8V_VGA *4.7K_4 DGPU_POK3 2 *100K/F_4
Q69 DGPU_PGOK-1 2
1
A *MMBT3904-7-F A
C961
*1000P/50V_4 Q72
1
*DTC144EUA
3
+1.5V_GFX
R742
*4.7K_4 DGPU_POK2 2 PROJECT : SW9
Q67
Quanta Computer Inc.
1
C960 *MMBT3904-7-F
*1000P/50V_4 Size Document Number Rev
Custom 1A
LVDS / CRT Switch
Date: Wednesday, December 02, 2009 Sheet 29 of 44
5 4 3 2 1
1 2 3 4 5 6 7 8
DGPU_HDMI +3V
30
48
41
35
19
13
[16] H_TX2_HDMI+
7
1
C233 *.1U/10V_4 DGPU_TX2_HDMI- U64 Only for NVIDIA
[16] H_TX2_HDMI-
C219 *.1U/10V_4 DGPU_TX1_HDMI+ HDMISwitch
VDD
VDD
VDD
VDD
VDD
VDD
VDD
[16] H_TX1_HDMI+
[16] H_TX1_HDMI- C209 *.1U/10V_4 DGPU_TX1_HDMI- DGPU_TXC_HDMI- 55
C243 *.1U/10V_4 DGPU_TX0_HDMI+ DGPU_TXC_HDMI+ CLK-A R146 *499/F_4 DGPU_TXC_HDMI-
[16] H_TX0_HDMI+ 56 CLK+A
[16] H_TX0_HDMI- C252 *.1U/10V_4 DGPU_TX0_HDMI- DGPU_TX0_HDMI- 2 R150 *499/F_4 DGPU_TXC_HDMI+
D0-A
3
DGPU_TX0_HDMI+ 3 47 HDMI_DET_S R144 *499/F_4 DGPU_TX0_HDMI-
DGPU_TX1_HDMI- D0+A HPD_SINK HDMI_SDATA Q26 R137 *499/F_4 DGPU_TX0_HDMI+
5 D1-A SDA_SINK 46
[16] H_TXC_HDMI+ C202 *.1U/10V_4 DGPU_TXC_HDMI+ DGPU_TX1_HDMI+ 6 45 HDMI_SCLK R151 *499/F_4 DGPU_TX1_HDMI-
C193 *.1U/10V_4 DGPU_TXC_HDMI- DGPU_TX2_HDMI- D1+A SCL_SINK R156 *499/F_4 DGPU_TX1_HDMI+
A [16] H_TXC_HDMI- 8 D2-A +3V_GFX 2 A
DGPU_TX2_HDMI+ 9 R136 *499/F_4 DGPU_TX2_HDMI-
D2+A C_TXC_HDMI- R124 *499/F_4 DGPU_TX2_HDMI+
CLK- 43
42 C_TXC_HDMI+ *2N7002E
HDMI_DET CLK+ C_TX0_HDMI-
[17] HDMI_DET 51 40
1
HPDA D0- C_TX0_HDMI+
[16] HDMI_SDA_DGPU 52 SDAA D0+ 39
[16] HDMI_SCL_DGPU 53 37 C_TX1_HDMI-
SCLA PI3HDMI201 D1- C_TX1_HDMI+
[7] HDMI_HPD_CON 23 HPDB D1+ 36
[7] SDVO_DATA 24 34 C_TX2_HDMI-
SDAB D2- C_TX2_HDMI+
[7] SDVO_CLK 25 SCLB D2+ 33
DGPU_TXC_HDMI- RP35 3 4 *0_4P2R C_TXC_HDMI-
57 DGPU_TXC_HDMI+ 1 2 C_TXC_HDMI+
PAD_GND
11 4
[7]
[7]
IN_CLK#
IN_CLK 12
CLK-B GND
10
To HDMI Conn. DGPU_TX0_HDMI- RP38 3 4 *0_4P2R C_TX0_HDMI-
+3V +3V CLK+B GND DGPU_TX0_HDMI+ C_TX0_HDMI+
[7] IN_D0# 14 D0-B GND 16 1 2
[7] IN_D0 15 D0+B GND 22
[7] IN_D1# 17 32 DGPU_TX1_HDMI- RP36 3 4 *0_4P2R C_TX1_HDMI-
D1-B GND DGPU_TX1_HDMI+ C_TX1_HDMI+
18 38 1 2
OC_S2
OC_S1
OC_S0
EQ_S1
EQ_S0
[7] IN_D1 D1+B GND
R486 2K/F_4 SDVO_DATA
SEL2
SEL1
[7] IN_D2# 20 D2-B GND 44
/OE
R500 2K/F_4 SDVO_CLK C955 C954 C945 C950 [7] IN_D2 21 54 DGPU_TX2_HDMI- RP37 3 4 *0_4P2R C_TX2_HDMI-
0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 D2+B GND DGPU_TX2_HDMI+ C_TX2_HDMI+
1 2
IGPU_HDMI
26
28
29
30
31
50
27
49
HSW_OCS2
HSW_OCS1
HSW_OCS0
HSW_EQS1
HSW_EQS0
HSW_SEL2
HSW_SEL1
HSW_ON#
HDMI_DET R469 *0_4 HDMI_DET_S
OC SETTING
*FDV301N
B S2 S1 S0 = 1 : 1 : 1 500mV 0dB Defualt OE# SEL2 SEL1 Ay +3V Q23 B
S2 S1 S0 = 1 : 1 : 0 750mV 0dB 0 X 1 A HDMI_SCL_DGPU 1 3 HDMI_SCLK
S2 S1 S0 = 1 : 0 : 1 1000mV 0dB
S2 S1 S0 = 1 : 0 : 0 600mV 0dB 0 1 0 B R458
SEL FUNCTION
2
S2 S1 S0 = 0 : 1 : 1 500mV 0dB R630 D21 *4.7K_4
S2 S1 S0 = 0 : 1 : 0 500mV 1.5dB *4.7K_4 LOW DGPU +3V_GFX 2 1 +3V
S2 S1 S0 = 0 : 0 : 1 500mV 3.5dB HSW _SEL1 *RB501V-40 *FDV301N
HIGH IGPU
2
S2 S1 S0 = 0 : 0 : 0 500mV 6dB Q33 *DTC144EUA Q22
3
HDMI_SDA_DGPU 1 3 HDMI_SDATA
R629 2 DGPU_SELECT# DGPU_SELECT# [9,27]
EQ SETTING 4.7K_4
HSW _EQS1 R628 *4.7K_4 R457
S1 S0 = 1 : 1 3dB Defualt HSW _EQS0 R627 *4.7K_4
1
D28 *4.7K_4
S1 S0 = 1 : 0 8dB HSW _OCS2 R626 *4.7K_4 R631 *0_4 HSW _SEL2 +3V_GFX 2 1
S1 S0 = 0 : 1 3dB HSW _OCS1 R625 *4.7K_4
S1 S0 = 0 : 0 15dB HSW _OCS0 R624 *4.7K_4 *RB501V-40 For Switchable Only
HSW _ON# R623 4.7K_4
R632
4.7K_4
Mount R629 / R632 for UMA only
HDMI PORT
+3V CN20
SHELL1 20
C_TX2_HDMI+ 1
C D2+ R806 *100/F_4 C
2 D2 Shield
C_TX2_HDMI- 3 C_TX2_HDMI+ 1 2 C_TX2_HDMI-
C_TX1_HDMI+ D2-
4 D1+
5 R807 *100/F_4
+5V_HDMIC 2 C_TX1_HDMI- D1 Shield C_TX1_HDMI+ C_TX1_HDMI-
1 6 D1- 1 2
D9 RB501V-40 C_TX0_HDMI+ 7 D0+ R808 *100/F_4
8 D0 Shield
+5V_HDMIC 2 1 C_TX0_HDMI- 9 C_TX0_HDMI+ 1 2 C_TX0_HDMI-
D29 RB501V-40 C_TXC_HDMI+ D0-
10 CK+
11 R809 *100/F_4
C_TXC_HDMI- CK Shield C_TXC_HDMI+ C_TXC_HDMI-
12 CK- 1 2
R112 2.2K/F_4 13
R109 2.2K/F_4 CE Remote
14 NC
HDMI_SCLK R111 0_4 HDMISCL 15
HDMI_SDATA R110 0_4 HDMISDA 16
DDC CLK Close to CN20
C567 *10P/50V_4 DDC DATA
17 GND
C566 *10P/50V_4 18 +5V +5V_HDMIC
19 HP DET
+5V F2 2 1 +5V_HDMIC 21
FUSE1A6V_POLY SHELL2
+3V 220P/50V_4
1
D 3 for EMI request D
R488
2
110K/F_4 BAV99W
PROJECT : SW9
Quanta Computer Inc.
Size Document Number Rev
A3 1A
HDMI Switch
Date: W ednesday, December 02, 2009 Sheet 30 of 44
1 2 3 4 5 6 7 8
5 4 3 2 1
31
D 7/22 +5VPCU D
PR250
PR217
8152VCC
+VIN
*0_6/S 10_6
+VIN
PC171 PC81
1U/6.3V_4 1U/6.3V_4
PR124
19
10_6 +1.1V_PCH Volt +/- 5%
7
PC182 PC185 PC179 PC180
Countinue current:10A
VCC
PVDD
PR125 +VGACORE_UMA
2200P/50V_4
8152TON
.1U/25V_4
4.7U/25V_8
4.7U/25V_8
TON 17
PQ51
.1U/25V_4
120K/F_4
FDMS7692 Peak current:12A
5
PR111 0_4 GFXVR_VID_0_R 31
{5} GFXVR_VID_0 VID0 PC82 D OCP minimum 15A
PR213 0_4 GFXVR_VID_1_R 30 G
{5} GFXVR_VID_1 VID1
23 8152UGATE 4
PR208 0_4 GFXVR_VID_2_R UGATE S +VGACORE_UMAA1
{5} GFXVR_VID_2 29 VID2 PR109 7/22
24 8152BOOT
1 2 PL11
1
2
3
PR100 0_4 GFXVR_VID_3_R BOOT 0.56U25A(PCMC104T-R56MN)
28
{5} GFXVR_VID_3 VID3
7/22
10_6
1 2
800 mils 8/20
PR103 0_4 GFXVR_VID_4_R 27 PC78
{5} GFXVR_VID_4 VID4
2
.1U/25V_4
4
PR106 0_4 GFXVR_VID_5_R 26 PU5 22 8152PHASE D PR221 + PC157 + PC159 + PC164
{5} GFXVR_VID_5 VID5 PHASE 2.2_8 PR197 PC172 PC170 PC168
330u_2.5V_7343
330u_2.5V_7343
*330u_2.5V_7343
G
PR210 0_4 GFXVR_VID_6_R RT8152C 8152LGATE 3.74K/F_4
.1U/10V_4
*10U/6.3V_8
*10U/6.3V_8
{5} GFXVR_VID_6 25 VID6 LGATE 20 4
S
1
PR119 PC158
1
2
3
C 7/22 PQ50 PC178 .1U/50V_6 C
*10K/F_4
1500P/50V_4
SI Modify 11/27 FDMS0310S
PR121 0_4 8152DPRSLPVR 3 8/20
{5} GFXVR_DPRSLPVR DPRSLPVR
8152VRON PR196
4 VRON 7/22
*6.65K/F_4 SI Modify 10/07
6 16 8152ISEN RDSon=5m ohm
PR122 10K/F_4 CLKEN ISEN 8152ISEN_N
+3VPCU ISEN_N 15
PC90
PR126 0_4 8152PGOOD 5
.1U/25V_4
{3,19,27,32,33,35,36} HWPG PGOOD
PR112
1
2 GFXVR_EN {5} PR130 PC87 PR114 PR216 PR214 PR101 PR102 PR107 PR212 PR247
PGND
*1K/F_4 86.6K/F_4 0.01U/25V_4 7/22 *1K *1K *1K *1K *1K *1K *1K *1K
GND
PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD
1
PQ9
1
*MMBT3904-7-F
2
VSS_AXG_SENSE GFXVR_VID_0_R
18
33
35
34
36
37
38
39
40
41
42
21
GFXVR_VID_1_R
GFXVR_VID_2_R
GFXVR_VID_3_R
PR108 0_4 GFXVR_VID_4_R
GFXVR_VID_5_R
GFXVR_VID_6_R
8152VRON
560P/50V_4
560P/50V_4
560P/50V_4
560P/50V_4
560P/50V_4
560P/50V_4
560P/50V_4
*1K
A A
SI Modify 10/07
PROJECT : SW9
Quanta Computer Inc.
Size Document Number Rev
Custom UMA GPU CORE (RT8152A) 1A
5 4 3 2 1
1 2 3 4 5 6 7 8
+VIN
Place these CAPs Place these CAPs
close to FETs close to FETs
PD11
PR139 PR226
1 2
1K/F_4 150K/F_4
2
PC77 PC79 PC80 UDZ5V6B-7-F PC118 PC114 PC113
+5V_VCC1
2200P/50V_4
2200P/50V_4
10U/25V_12
10U/25V_12
.1U/25V_4
.1U/25V_4
1
1
2
PC103
.1U/25V_4 3.3 Volt +/- 5%
1
Countinue current:5A
1
PC96
1U/6.3V_4
Peak current:6A
2
OCP minimum 7.5A
5 Volt +/- 5% +5VALW
Countinue current:5A
5
6
7
8
PC101 +3VPCU
Peak current:6A
*.1U/10V_4
B PC106 PC176 B
2
4.7U/6.3V_6 4
OCP minimum 7.5A
8
7
6
5 +5V_VCC1
+5VPCU .1U/10V_4
PQ56
8
7
6
5
4
3
2
1
1
4 AO4496
PR225 PL14
LDO
ONLDO
LDOREFIN
IN
N.C
VCC
TON
REF
0_4 2.5uH_7.5A
3
2
1
PQ49 1 2
AO4496
2
PR224
2
9 BYP REFIN2 32 249K/F_4
PL12 PR231 10 31 1 2
1
2
3
OUT1 ILIM2
5
6
7
8
2
2.5uH/7.5A 249K/F_4 5V_FB1 11 30 3V_FB2 PR143
FB1 PU9 OUT2 *2.2_8
1 2 1 2 12 ILIM1 SKIP 29
1
HW PG 13 RT8206B 28 PGOOD2 PR222
1
PGOOD1 PGOOD2
2
14 27 4 0_4 +
ON1 ON2
2
8
7
6
5
1
DH1 DH2
1
.1U/10V_4
16 25
330U/6.3V_6X5.8
2
+ *2.2_8 LX1 LX2
*1500P/50V_4
37 PAD
PC175 PC181 PR232 4 36
1
PAD
AGND
PGND
BST1
BST2
*0_4
.1U/10V_4
330U/6.3V_6X5.8
39
VDD
PAD
PAD
PAD
PAD
PAD
PAD
2
PAD
DL1
DL2
2
N.C
PQ48 40
3
2
1
PAD
2
PC163 AO4712 PQ54 PR223
2
38
35
34
33
17
18
19
20
21
22
23
24
42
41
PR233
.1U/25V_4
.1U/25V_4
1
1
0_4 Rds(on) 20m ohm
1
2
3
1
Rds(on) 20m ohm PR229 PR227
1
1 2 5V_BST1 3V_BST2
1 2
C 2_6 2_6 C
5V_DL 3V_DL
1 +5VALW
PC199
PD17 3 2 1
BAV99
1
+10VALW PR236 0_4 2 0.01U/25V_4
PR138
PC183 PGOOD2
PR237 *0_4
1U/6.3V_4
+15VALW 2 *0_6/S
2
2
1 PR123
PC195 PC200 *0_4/S
PD19 PD18
.1U/25V_4
3 1 2
1
1SS355 BAV99
1
1 2 2 0.01U/25V_4 HW PG HW PG {3,19,27,31,33,35,36}
PR230
+5VALW 1 2 +15VALW
100K/F_4
1
PC207 PC196
2.2U/6.3V_6 1U/25V_6
2
SI Modify 10/07
SYS_SHDN#
D D
PROJECT : SW9
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
+5V/+3V (RT8206B)
Date: W ednesday, December 02, 2009 Sheet 32 of 44
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
PR235
+5VPCU
2
PD12
1 RTBST
+VIN
+1.05V_PCH Volt +/- 5%
Countinue current:4A
33
RTVDD
10_6
RB501V-40 Peak current:7A
PC193 PC112
A
PC105 PC100 PC94 OCP minimum 9A A
1U/6.3V_4
13 1U/6.3V_4
+3VPCU +1.05V
2200P/50V_4
.1U/25V_4
4.7U/25V_8
RTBST_1 PR150
5
6
7
8
PC109
.1U/25V_4
4.7_6
2
PR151
1M_4 4
9
PR156 PU6 PR234
10K/F_4 12 RTDH *0_3720/S
VDD
VDDP
BST
RTTON DH PQ52
16 TON AO4496 +1.05V_VCCP
1
{3,19,27,31,32,35,36} HW PG HW PG PR155 0_4 RTPG 4 11 RTLX PL13 7/22
PGOOD LX 1.5UH/10A-SIL104R-1R5PF
RT8204C 600 mils
3
2
1
PR157 0_4 RTLPPG RTILIM PR154
5 LPGOOD ILIM 10
8.45K/F_4
5
6
7
8
1
{27,35,36,37,38} MAINON MAINON PR149 10_4 RTEN 15 8 RTDL 7/22
EN/DEM DL
VOUT
+
LDRI
LEN
LFB
17 3 PR228 PC189 PC184 PC188 PC192
PR146 PAD FB *2.2_8
.1U/10V_4
4
*10U/6.3V_8
*10U/6.3V_8
390U/2.5V_6X5.8ESR10
RTFB
2
*1M/F_4
14
1
7/22 PQ53
AO4712
PR152 PC187
10K/F_4
*1500P/50V_4
PR153
3
2
1
PR147 4.12K/F_4
MAINON RTLEN
10_4 PC111
B RDSon=20m ohm B
PR148 *100P/50V_4
*1M/F_4
Vo=0.75(R1+R2)/R2 +3VPCU
5
6
7
8
PC98 PC99 PC208 PC209
*10U/6.3V_8
.1U/10V_4
.1U/10V_4
.1U/10V_4
Peak current:2A
4 OCP minimum 3A
PR160
PC116
100/F_4
33P/50V_4
PC117
0.033U/10V_4
PR158
PC115 14K/F_4
*39P/50V_4 PC97 PC104 PC93
*10U/6.3V_8
10U/6.3V_8
.1U/10V_4
RTLFB
7/22
C Vo=0.75(R1+R2)/R2 PR159 C
10K/F_4
D D
PROJECT : SW9
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
PCH +1.05V (RT8204)
Date: W ednesday, December 02, 2009 Sheet 33 of 44
1 2 3 4 5 6 7 8
5 4 3 2 1
+VIN
34
1
PC8 PC9 +
+VIN PC216 PC6 PC7
10U/25V_12
10U/25V_12
*220U/25V L-F
PQ40
2200P/50V_4
.1U/25V_4
2
2
FDMS7692
5
PR96 D
1K/F_4 G
4
S
D D
1
2
3
+5VPCU +3V
PL6 +VCORE
0.36uH
1 2
PC61
1
3 4
1
PR22 *0_4/S PR177 +
+5VPCU PR86 PR28 D 2.2_8 PC13 PC18
1.91K/F_4
1000P/50V_4
.1U/25V_4
G
*330U_2.5V_7343
2
2
649K/F_4 4
1
S
PR25 PC128
1
2
3
10_6 PQ32
1500P/50V_4
FDMS0310S
PR11 PR14
37
16
39
38
2
*0_4/S 10/F_4
+1.1V_VTT PC34
PH0
PH1
VCC
PWRGD
RAMP
2.2U/6.3V_4
PR94 12 35 3212_DRVH1
*499/F_4 AGND DRVH1
PR29
49 AGND BST1 36 1 2
10_6
{3} H_PROCHOT#
PC37
PR23 0_4 PSI#_1 41 .22U/25V_6
{5} H_PSI# PSI#
3
2 10
VR_TT
1
PR82 31 3212_DRVL1
DRVL1 PC15 PC14 PC10 PC11
+5VPCU
1
2200P/50V_4
7/22
10U/25V_12
10U/25V_12
.1U/25V_4
PR178 7.32K/F_4
2
11 TTSNS
*220K_6 NTC +5VPCU
+5VPCU PR68 *0_4 8 PU2 PQ37
PC58 TRDET# PC44 FDMS7692
1 2 9 VARFR
5
Panasonic *.01U/16V_4 ADP3212 32 1 2
CPU_VID0 PVCC
{5} CPU_VID0 48 D
ERT-J0EV474J VID0 4.7U/6.3V_6 G
CPU_VID1 47 26 3212_DRVH2 4
{5} CPU_VID1 VID1 DRVH2 S +VCORE
PR67
CPU_VID2 46 25 1 2
{5} CPU_VID2
1
2
3
VID2 BOOT2
10_6
CPU_VID3 45
{5} CPU_VID3 VID3 PC51 PL7
CPU_VID4 44 .22U/25V_6 0.36uH
{5} CPU_VID4 VID4
27 3212_SW2 1 2 1 2
CPU_VID5 SW2
{5} CPU_VID5 43
VID5
2
3 4 + + PC66
CPU_VID6 42 D PR176 1000UF/2V/F25 case
{5} CPU_VID6 VID6
G 2.2_8
PR26 0_4 VR_ON 1 29 3212_DRVL2 4
{27} VRON EN DRVL2 S
1
2
3
PR24 499/F_4 DPRSLPVR_R 40 7/22
{5} DPRSLPVR
1
2
3
PR31 DPRSLPVR PQ29 PC127
30
100K/F_4 PR41 0_4 CLKEN# PGND FDMS0310S
1500P/50V_4
{2} VR_PWRGD_CLKEN# 4 CLK_EN#
PR42
+3V PR10 PR13
1
7/22
6 PR97
FB
1
680P/50V_4
1000P/50V_4
7/22
2
PC50
220K_6 NTC
73.2K/F_4
PR64 PR58
PC45 7 20
COMP CSCOMP
1.65K/F_4 39.2K/F_4
150P/50V_4 17 3212_CSCOMP
1000P/50V_4 LLINE
5
FBRTN Close to Phase 1 Inductor
21 PR81 1.69K/F_4
PR36 ILIM
3
CSREF
IMON
4.75K/F_4
IREF
RPM
OCP:
RT
PC38
1 2
60A --> PR81 = 1.91 Kohm
13
14
15
18
47.5K/F_4
1U/6.3V_4
PR32
*0_4
Operation
+1.05V OCP Setting PR30 PR42
Max current
A A
45W CPU (60A) 50A 1.91 Kohm 4.02 Kohm
VSSSENSE {5}
35W CPU (48A) 40A 1.54 Kohm 4.99 Kohm
VCCSENSE {5}
Avoid high dV/dt PROJECT : SW9
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
CPU Core ( ADP3212)
Date: Wednesday, December 02, 2009 Sheet 34 of 44
5 4 3 2 1
1 2 3 4 5 6 7 8
35
+5VPCU PD8
8208RTVDD1
*10_6
*1U/6.3V_4
+3VPCU *FDMS7692
*2200P/50V_4
*10U/25V_12
*10U/25V_12
Peak current:18A +VGACORE
*.1U/25V_4
PR54
5
8208BST1_1
1 2 PC49
1 : un-Mount PD9/PR48 for Switchable D OCP minimum 23A
*.1U/25V_4
*10_6
A
2 : un-Mount PR248 for Discrete G A
13
4
PU4
9
PR92 S
*10K/F_4 PR71 8208CS1 8208RTDH1
10 12
VDD
VDDP
BST
{39} 1.5V_ON
1
2
3
CS DH
*10.5K/F_4 Pre DB modify
PD9
2 1 PR89 *0_4 8208RTPG1 4 11 8208RTLX2 PL9
{3,19,27,31,32,33,36} HW PG PGOOD PHASE *0.56U25A(PCMC104T-R56MN)
*1SS355 PR48 *10K/F_4 8208RTEN1 15 16 8208TON1 PR57 800 mils
{27,33,36,37,38} MAINON EN/DEM TON
*232K/F_4 7/22
1
PR248 *10K/F_4 17 8 8208RTDL1
{39} DGPU_PR_EN PAD DL
5
VOUT
PC46 PR194 + +
8208RTD11 D *2.2_8 11/12 PC153 PC154 PC155 PC150 PC152 PC156 PC149 PC151
G0
FB
D0
14 5
*.22U/10V_4
G1 D1
*.1U/10V_4
*10U/6.3V_8
*10U/6.3V_8
*10U/6.3V_8
*10U/6.3V_8
*10U/6.3V_8
G
*390U/2.5V_6X5.8ESR10
*390U/2.5V_6X5.8ESR10
2
2
*RT8208A 4
1
PR72 S
PR78 *15K/F_4 PR61
1
2
3
PR174
8208VOUT1
8208RTD10 PQ44 PC148 *0_4
*FDMS0310S
*1500P/50V_4
*10K/F_4 *60.4K/F_4
8208RTFB1
PR218
*10K/F_4
4/1
VGA_GPIO6 V_PWRCNTL
N10M-GS
GPIO6 GPIO5
0 0 0.8V
0 1 0.85V +5VPCU +1.1V_PCH Volt +/- 5%
PD6 +VIN
1 0 1.0V
PR75
2 18208RTBST
Countinue current:12A
10_6 Peak current:15A
8208RTVDD
1 1 NA RB501V-40
1U/6.3V_4
FDMS7692
2200P/50V_4
10U/25V_12
.1U/25V_4
4.7U/25V_8
PR45
5
8208RTBST_1 PC39 +1.1V_VTT
D
.1U/25V_4
10_6
G
13
PU3 4
2
S
C PR38 C
8208CS 10 12 8208RTDH
VDD
VDDP
BST
1
2
3
CS DH
8.25K/F_4
HW PG PR65 0_4 8208RTPG 4 11 8208RTLX_1 PL5
PGOOD PHASE CV-10L0MZ01/DC-10F0M102
MAINON PR66 10K/F_4 8208RTEN 15 16 8208TON
PR70 800 mils
EN/DEM TON
232K/F_4
1
17 8 8208RTDL
PAD DL
5
VOUT
FB
D0
14 G1 D1 5
*1M/F_4
.1U/10V_4
*10U/6.3V_8
*10U/6.3V_8
G
390U/2.5V_6X5.8ESR10
390U/2.5V_6X5.8ESR10
0_4
2
RT8208A PR59 4
7
1
*10K/F_4 S
8208RTG0
PR52
1
2
3
8208RTD0 PQ35 PC130
FDMS0310S
1500P/50V_4
PR47 154K/F_4
+3VPCU 8208RTFB
10K/F_4 PR74 PR73
10K/F_4 24.9K/F_4
RDSon=5m ohm
PR37 PC55
3
10K/F_4 PQ6
{5} H_VTTVID1 2 MMBT3904-7-F PR76 0_6
PR43 *100P/50V_4
2
Vo=0.75(R1+R2)/R2
PROJECT : SW9
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
+1.1V_VTT/VGA Core RT820A
Date: W ednesday, December 02, 2009 Sheet 35 of 44
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
36
A A
+VIN
+5VPCU 1.5 Volt +/- 5%
+1.5VSUS
Countinue current:6A
25
Peak current:12A
2
( VTT/2A ) PU8
1 24 PD16 PQ46 PC72 PC75 PC74 PC73
OCP minimum 15A
GND
+0.75V_DDR_VTT VTTGND VTT PC167 *RB501V-40 FDMS7692
2200P/50V_4
.1U/25V_4
4.7U/25V_8
4.7U/25V_8
5
*10U/6.3V_8 +1.5VSUS
2 23 D
1
VTTSNS VLDOIN
G
1
PC169 4
PC165 PC161 1116VBST PR209 S
3 GND VBST 22 1 2
+1.5VSUS_1
10U/6.3V_8
10U/6.3V_8
4.7_6
2
1
2
3
7/22 .1U/25V_4 +1.5VSUS_1
PR202
2 1 4 21 1116DRVH
MODE DRVH PL10
*0_4/S
B ( 3mA ) CV-10L0MZ01/DC-10F0M102 B
{12} DDR_VTTREF 5 20 1116LL
VTTREF LL
1
1
PC162 6 19 1116DRVL PR204 + PC76
COMP DRVL
1
2.2_8 PC67 PC68 PC70
0.033U/10V_4
2
1
330u_2V_7343
D PR198
.1U/10V_4
*10U/6.3V_8
*10U/6.3V_8
2
2
7 18 G 10K/F_4 PC160
1
NC PGND
100P/50V_4
4
2
S
2
8 17 PC166
1
2
3
VDDQSNS CS_GND PQ47
1500P/50V_4
7/22
FDMS0310S 7/22
V5FILT PR203 1116VDDQSET 1116CS PR249
9 VDDQSET CS 16
*0_4 +5VPCU
7.5K/F_4
PC173
1
10 S3 V5IN 15 2 1
PR199
1U/6.3V_4 10K/F_4
PR246 DDR3_P_S5 V5FILT PR220
11 S5 V5FILT 14
{27,37} SUSON 0_4 10_6
2
1
PR219 1116TONSET PC174
+VIN 12 NC PGOOD 13 HW PG {3,19,27,31,32,33,35} PR201
1U/6.3V_4
619K/F_4
2
1116_S3ON
RT8207AGQW *0_6/S
7/22
C C
0_4
2
PD34
*1SS355
PC1278
*0.1U/10V_4
PR195
1
MAINON
10,36,41,42
SI modified 10/07
D D
PROJECT : SW9
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
DDR3 (RT8207)
Date: W ednesday, December 02, 2009 Sheet 36 of 44
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
MAIND {5}
37
+VIN +5V +3V +1.8V +15VALW +5VPCU
5
6
7
8
1M_4 PC85
.1U/10V_4
PR162 PR166 PR169 PR170 PR165 PR167 PR164
1M_4 22_8 22_8 *22_8 MAIND 4 1M_4 *22_8 1M_4
1
2
5
6
PC122
5.8A
.1U/10V_4
3
1
PQ21 PQ26 PQ27 PQ28 LAN_ON 3
2N7002K 2N7002K *2N7002K 2N7002K PC95 PQ12 +5V
AO4496 PQ22
2200P/50V_4
2
3
2 2 2 2 PQ25 PQ24 ME3424D
3
2
1
4
*2N7002K 2N7002K
0.67A
1
2 2
3
3
.1U/10V_4
2200P/50V_4
2
2 PR161
{27,33,35,36,38} MAINON 1M_4
{27} LAN_POW ER 2
1
MAINON_G +10VALW +3VPCU
PQ20 PR163 PC119
1
.1U/10V_4
1
DTC144EUA LAN_POW ER_G
5
6
7
8
PR172
MAINON_G {5,12}
1M_4 PC201
.1U/10V_4
MAIND10V 4
B B
3
PQ64 5.87A
1
2N7002K PC203
PQ55 +3V
2200P/50V_4
2 AO4496
3
2
1
+VIN +5VSUS +15VALW +5VPCU
1
PC194
PR128 PR129 PR145 .1U/10V_4
1M_4 *22_8 1M_4 PC86
1
2
5
6
+1.5VSUS
.1U/10V_4
2.49A
SUSD 3
+5VSUS
3
5
6
7
8
*2N7002K 2N7002K 4 ME3424D
1
PC71
3
PC108
.1U/10V_4
2 2
2200P/50V_4
4
2
2 PR133 PC83
{27,36} SUSON 1M_4
.1U/10V_4 1.65A
1
PQ14
1
3
2
1
C
+5VPCU C
+VIN +5VS5 +3VS5 +15VALW PC69
3
.1U/10V_4
PQ62
2 2N7002K
PR168
1M_4 (2mA)
PR241 PR242 PR238 +10VALW +5VS5
1M_4 *22_8 *22_8 1
S5_OND
+3VPCU
3
1
PQ63 PQ61 PQ58
*2N7002K *2N7002K 2N7002K PR239 PC202
1
1M_4
.1U/10V_4
2
2 2 2 PC121
1
2
5
6
2200P/50V_4
2
S5_OND10V 3
3
1M_4
+3VS5 {3,8,9,10,11,14}
S5_ONG 2 PC197
PQ57
2200P/50V_4
1
DTC144EUA
PC198
.1U/10V_4
1
D D
PROJECT : SW9
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
DISCHARGE/3VS5/5VS5/LAN
Date: W ednesday, December 02, 2009 Sheet 37 of 44
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
+VAD PC205
PC206
PQ34
4.7U/25V_8
.1U/25V_4
PC5
.1U/25V_4
+PRW SRC PL3
38
CN6 +VA FDMC4435BZ IRFR3709Z PQ33 5A_8
PQ30 7/22 4 3 1 8 PL4 CN16
2 7 BATT+
1 PC134 Power PR3063 P/N 5A_8 1 6
2 PL2 1 3 6 7
A 5 2 PC135 1U/25V_6 BATDIS_G 4 5 SMD A
BATDIS_G 1
3 PC131 5A/08 65W/90W CS+020AFR00 SMC 4 5
.1U/25V_4
4 3 3
1
PR185 ACOK_IN 7/22 FDS6679AZ
5 PC133 PD15 120W CS+015AFR01 2
.1U/50V_6
6 PL1 100/F_4
PC132 PR179 +VIN
Place this ZVS close to SUYIN_Batt
.1U/25V_4
PR184
4
+3VPCU
P4SMAJ20A
5A/08 RC2512-R020
.1U/25V_4
+VH28 Far-Far away +VIN
DC JACK 150K/F_4 1 2
2
SI Modify 10/08
1
PR186 PR5 PR4
B_TEMP_MBAT
+VA 100/F_4 PD14 330_4 330_4
PR180 PR181 Place these short pad
P4SMAJ20A
Place this ZVS close to *0_2/S *0_2/S PR2
close to RSENSE
2
10K/F_4
Diode away +VIN {27} MBDATA
2
CSIN
PR255
{27} MBCLK
1K_6 2 ACOK# CSIP
PQ31 +ISL6251_VDD PR3
PR254 PR256 TEMP_MBAT {27}
1
Q1
1
2N7002K PC42 Place these CAPs
UDZ5V6B-7-F
UDZ5V6B-7-F
220K_4 220K_4
6 5 PC3 PC123
close to FETs
0.01U/25V_4
0.01U/25V_4
3 4 +VAD PR30 PR33 1U/6.3V_4
Q2
2_6 20_6
2
2
UMT1N PR18 PC30 PC29 PC28
PC35 4.7_6
2200P/50V_4
.1U/25V_4
4.7U/25V_8
1
1
ISL6251_VDDP Place this cap
*100P/50V_4
*100P/50V_4
1 2
PR258 PR257 CSIN_1
close to EC
5
6
7
8
1M_4 1M_4 4.7U/6.3V_6
2
19
20
15
B B
2
1
SI Modify 10/08 PD5
PR35 RB501V-40 4
CSIN
VDD
CSIP
VDDP
20_6
+VAD CSOP CSOP_1 21 PR21 PC32
1
CSOP 6251B_2 6251B_1 PQ38
BOOT 16
AO4496 PR183 +BATCHG
2_6
3
3
2
1
PQ5 CSON CSON1 UGATE 6251LR 1
22 CSON 2
IMD2
5
6
7
8
18 ISL6251_PHASE
PHASE
1P
2P
PR187
4
14 ISL6251_LGATE 4 *2.2_8
ACOK# LGATE PC17 PC16 PC129
23 ACPRN
10U/25V_12
10U/25V_12
.1U/25V_4
{27,33,35,36,37} MAINON
2
PGND 13
PR50
+VA +VAD_1 DCIN 24 12 PC24 6251VREF PC143
PD10 DCIN GND *0.01U/50V_4 *1500P/50V_4
3
2
1
1
2
1SS355 PD7 10_8 2 1
2 1 +VAD_1 2 1 PC43 PR192 11 PR12 PR16 PQ41 CSOP
6251ACIN VADJ *21K/F_4 240K/F_4 AO4712
1U/25V_6
1 2 2
2
1
PR79 150K/F_4 Setting the Vin PR193 ACLIM VADJ
3 EN 2 1 CV-SET {27}
VCOMP
min to 12V 12.4K/F_4 6251EN
ICOMP
CELLS
240K/F_4
CHLIM
1
VRFE
For ACSET 1.26V ACLIM
ICM
C
PC126 Place this cap C
1
75K/F_4 0.01U/25V_4
close to EC
2
PC23 PR15
4
26251ICOMP 5
9
{27} AD_AIR PU1 *0.01U/50V_4 *11.8K/F_4
2
PR80 PR189 Setting the Vin min to 17V ISL6251A
6251VCOMP1
PR173
PC124 10K/F_4 For EN = 1.06V
.1U/10V_4 +ISL6251_VDD 6251VREF EC_ACLIM {27}
10K/F_4
VREF = 2.39V
1
12.4K/F_4 PC125
PR17
Place this cap PR60 2 1 .1U/10V_4 V ACLIM = VREF *
*100K/F_4 PC36 CC-SET {27} (Rl // 152K) / (Rhi // 152K + Rlow// 152K)
close to EC 100K/F_4
6800P/25V_4
2
(0.05/Vref * Vaclim + 0.05 ) / Rsense
2
+VAD_1
1
1
1
26251VCOMP2
3
10K/F_4 DDTA124EUA-7-F PR20 1 8 DTC144EUA
VIN Vout
1
PD4
SYS_I {27}
2
1
PC31 PC33 100/F_4 PC145 P2805MF A0 2 1 2 D/C# {27}
.1U/25V_4 6251ACIN PC142
*100P/50V_4
0.01U/25V_4
2 6
1
2
{27} ACIN PC27 GND PG *1SS355
CELL_SLT = 1 -- 3 S (Cells = GND 3S)
.1U/50V_6
2
CELL_SLT = 0 -- 4 S (Cells = VDD 4S) 3300P/50V_4 PC12
1
NC
PR8
CP
3 5
*10U/6.3V_8
15K/F_4 CN D_CAP
D D
1
6251ACIN Input Current monitor
4
V icm = 19.9 * (Vcsip - Vcsin) PC141
3
1U/25V_6
2
2 1
PR1 PC4 PC144 0.01U/25V_4
2 2 1 ACOK#
100K/F_4 PROJECT : SW9
1
1SS355
1
2
5
6
5
PQ18 PQ17 **.1U/10V_4 PC223
*2N7002K *2N7002K PQ70 D *.1U/10V_4
*2N7002E DGPU_PW R_EN_10V3 1.38A G
1
1.5V_ONG 2 2 4
3
PC107 PQ68 PQ69 PQ66 S
3
*0.01U/25V_4
2
1
2
3
1
+1.05V_GFX
{35} 1.5V_ON 2 PR142 2 2 2
1
*1M_4
2
PC225
PQ19 *.1U/10V_4 3.83A
1
*DTC144EUA PC226
1
*.1U/10V_4
SW ITCH_PEN PC224
Change PC119 to 0.01u/25v as Discrete power sequence *2200P/50V_4
3
2 PR251
{35} DGPU_PR_EN *1M_4
For Discrete For Switchable Only
Mount U23 ---> BIOS
1
B
or switchable Only Mount R592 ---> EC
B
PC229 R312
*.1U/10V_4
1.5V_OND 3 *0_8
PQ65
*ME3424D
4
0223 SI modify
+1.8V_VGA
Fo meet GPU power sequence
PC204
For Discrete Only
*.1U/10V_4
R792 *0_8
C
R51 co-lay PQ71 +3V +3V_GFX
C
R793 *0_8
R53/R54 co-lay PQ68 +1.05V +1.05V_GFX
R794 *0_8
+1.5VSUS
PQ71 PC221
5
*AON6426L
*.1U/10V_4
D
1.5V_OND 4
G For Hybrid DGPU Power Rails Sequence
S
1. +3V_GFX, +1.05V_GFX
9.59A
1
2
3
+1.5V_GFX
2. +VGA_CORE -> DGPU_PG
3. 1.5V_GFX, +1.8V_GFX
PC227
*.1U/10V_4
D D
PROJECT : SW9
Quanta Computer Inc.
Size Document Number Rev
A3 1A
Switchable Power
Date: W ednesday, December 02, 2009 Sheet 39 of 44
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
Power up sequence
40
A A
+3VPCU/+5VPCU +3VPCU/+5VPCU
+RTC_CELL +RTC_CELL
G3 to SX RTC_RST# G3 to SX RTC_RST#
S5_ON NBSWON1#
+XVS5(PCH's VCC_SUS)
S5_ON
RSMRST#(EC to PCH)
+XVS5(PCH's VCC_SUS)
RSMRST#(EC to PCH)
B NBSWON1# B
DNBSWON#(EC to PCH)
DNBSWON#(EC to PCH)
SUSC(PCH to EC)
SUSC(PCH to EC)
SUSB(PCH to EC)
SUSB(PCH to EC)
SUSON
SUSON
+XVSUS
+XVSUS
SX to S0 MAINON
SX to S0 MAINON
+XV
+XV
VR_ON(EC to VR)
VR_ON(EC to VR)
+VCORE
C C
+VCORE
HWPG(to EC)
HWPG(to EC)
VR_PWRGD_CLKEN#(VR to clock)
VR_PWRGD_CLKEN#(VR to clock)
CLK_BUF_BCLK_N(Clock to PCH)
CLK_BUF_BCLK_N(Clock to PCH)
CLK_OUT(PCH OUT)
CLK_OUT(PCH OUT)
ECPWROK(EC to PCH)
ECPWROK(EC to PCH)
PM_DRAM_PWRGD(PCH to CPU)
PM_DRAM_PWRGD(PCH to CPU)
H_PWRGOOD(PCH to CPU)
H_PWRGOOD(PCH to CPU)
PLTRST#(PCH to CPU...)
PLTRST#(PCH to CPU...)
D D
PROJECT : SW9
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
Power up sequence
Date: W ednesday, December 02, 2009 Sheet 40 of 44
1 2 3 4 5 6 7 8
5 4 3 2 1
41
(VGA Port)
DGPU-RGB/HVSYNC
CRT_Conn.
PI3V512 RGB 74CBT3257 RGB
dGPU VR Power Rails PCH-RGB/HVSYNC RGB
DGPU-HDMI
+3V_GFX/+1.05V_GFX/
+1.8V_GFX/+VGACORE/
+1.5V_GFX DGPU-RGB/HVSYNC
D
NVIDIA N10x DGPU_SELECT# D
dGPU DGPU-DDC
Port_Replicator
PEG_RST#
DGPU LVDS PWM/DPON/BKON
DGPU LVDS EDID IGPU-DDC
(VGA Port)
DGPU-DDC
74CBT3257 CRT_DDC
IGPU LVDS EDID
DGPU LVDS EDID
IGPU-HDMI
AND EDID_SELECT#
IGPU LVDS PWM/DPON/BKON
Intel PCH iGPU LVDS Dual Channel
C PLT_RST# C
PLT_RST#
B B
HDMI Conn
PCH_GPIO61 DGPU_HOLD_RST#
DGPU-HDMI
PCH_GPIO50 DGPU_PWR_EN# HDMI
IGPU-HDMI PI3HDMI201
PCH_GPIO64 DGPU_PWR_OK
PCH_GPIO54 EDID_ELECT#
A A
PCH_GPIO53 PWM_SELECT#
PROJECT : SW9
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
Switch Blockdiagram
Date: W ednesday, December 02, 2009 Sheet 41 of 44
5 4 3 2 1