Professional Documents
Culture Documents
Eurocircuits-EAGLE Dru Settings 130329
Eurocircuits-EAGLE Dru Settings 130329
TLP559
Digital Logic Ground Isolation Unit: mm
Line Receiver
Microprocessor System Interfaces
Switching Power Supply Feedback Control
Transistor Inverter
8 1 : N.C. ICC
1 VCC
2 : Anode IF
8
2 7 3 : Cathode 2 IO
4 : N.C. VF VO
3
3 6 5 : Emitter 6
6 : Collector GND
5
4 5 7 : N.C. Shield
Shield
8 : VCC
Note: Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the
significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even if
the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum
ratings.
Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook
(“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test
report and estimated failure rate, etc).
(Note 1) Derate 0.8mA above 70°C.
(Note 2) 50% duty cycle,1ms pulse width.Derate 1.6mA / °C above 70°C.
(Note 3) Pulse width ≤ 1μs, 300pps.
(Note 4) Derate 0.9mW / °C above 70°C.
(Note 5) Derate 2mW / °C above 70°C.
(Note 6) Soldering portion of lead: up to 2mm from body of the devise.
(Note 7) Device considered a two-terminal device: Pins 1, 2, 3 and 4 shorted together and pins 5, 6, 7 and 8 shorted
together.
2 2017-12-20
TLP559
Electrical Characteristics (Ta = 25°C)
temperature coefficient
Reverse current IR VR = 5V ― ― 10 μA
Capacitance between terminal CT VF = 0V, f = 1MHz ― 45 ― pF
IOH (1) IF = 0mA, VCC = VO = 5.5V ― 3 500 nA
IOH (2) IF = 0mA, VCC = VO = 15V ― ― 5
High level output current
IF = 0mA, VCC = 15V μA
Detector
IOH ― ― 50
VO = 15V, Ta = 70°C
High level supply voltage ICCH IF = 0mA, VCC = 15V ― 0.01 1 μA
Supply voltage VCC ICC = 0.01 mA 15 ― ― V
Output voltage VO IO = 0.5 mA 15 ― ― V
(Note 8) CML is the maximum rate of fall of the common mode voltage that can be sustained with the output voltage
in the logic low state (VO < 0.8V).
CMH is the maximum rate of rise of the common mode voltage that can be sustained with the output voltage
in the logic high state (VO > 2.0V).
3 2017-12-20
TLP559
Test Circuit 1: Switching Time Test Circuit
IF
IF VCC = 5V
Pulse input
1 8 0
PW=100μs 2 7 RL
Duty ratio=1 / 10 VO 5V
IF monitor 51Ω 3 6 VO
4 5 Output VO 5V
monitor (IF=0mA) 2V
VCM
0.8V
VO VOL
Pulse generator (IF=16mA)
ZO=50Ω
320(V) 320(V)
CMH = , CML =
t r (µs) t f (µs)
4 2017-12-20
TLP559
IF – V F ΔVF / ΔTa – IF
100 −2.6
Ta = 25°C
50
30
−2.4
10
5 −2.2
Forward current IF
1 −2.0
0.5
0.3
−1.8
0.1
0.05 −1.6
0.03
0.01 −1.4
1.0 1.2 1.4 1.6 1.8 2.0 0.1 0.3 0.5 1 3 5 10 30
50
1
30
IOH (μA)
0.5
0.3
10
5 0.1
3
0.05
0.03
1
0.6 0.01
0 40 80 120 160 0.1 0.3 0.5 1 3 5 10 30 50 100 300
30
Ta = –25°C
Normalized IO / IF
0.8
Current transfer ratio
IO / IF (%)
Normalized To :
5 0.4
IF = 16mA
3 VCC = 4.5V
0.2 VO = 0.4V
Ta = 25°C
1 0
0.3 0.5 1 3 5 10 30 50 −40 −20 0 20 40 60 80 100
5 2017-12-20
TLP559
IO – V O V O – IF
5
30mA VCC = 5V
VCC =5V
10 Ta = 25°C IF
25mA 4 RL
Output current IO (mA)
(V)
20mA VO
Output voltage VO
3
6 15mA
Ta=25°C
10mA 2 RL=2kΩ
4
3.9kΩ
10kΩ
IF=5mA 1
2
0 0
0 1 2 3 4 5 6 7 0 4 8 12 16 20 24
tpHL, tpLH – RL
5
IF = 16mA
VCC = 5V
3
Ta = 25°C
tpLH
Propagation delay time
tpLH, tpHL (μs)
0.5
0.3
tpHL
0.1
1 3 5 10 30 50 100
6 2017-12-20
TLP559
7 2017-12-20