Transistor Basics - MOSFETs

© Bob York
 Transistors, Conceptually

So far we have considered two-terminal devices that are described by a

current-voltage relationship I=f(V)
• Resistors: I V / R I(V)

• Capacitors: I  C dV
dt
• Inductors: I  1 Vdt
L  V

• Diodes: I  I s eV / nVT  1

Transistors add a third terminal to control the current flow through the device.
The two most common types of transistors are:
I(V, Vc) FETs
• Field-Effect Transistors (FETs): Control or
voltage-controlled current flow Terminal
I(V, Ic) BJTs
V
• Bipolar Junction Transistors (BJTs): Vc or Ic
current-controlled current flow

In ECE 2, we will not discuss the physics of device operation in depth.

The transistor is simply a black box with certain well-defined terminal properties.

© Bob York Back to TOC

 MOSFETs

There are many types of FETs but all share some NMOS Drain
common features and nomenclature.
Drain
Key points: Gate Vds
• Every FET has a gate, drain, and source Ids(Vgs,Vds)
Gate
• Current flows between the drain and source.
• The gate is the control terminal. Vgs
• The DC gate “leakage” current is negligible, Ig≈0 Source

Source
Start with n-channel enhancement MOS (NMOS)
(MOS=Metal-Oxide-Semiconductor).
Current-Voltage Characteristic for NMOS
If we take the source as the voltage reference
Id
(ground), the drain current will depend on the
gate voltage and drain voltage as shown :

Drain Current
Id
Ig ≈ 0 D
G
Vds
Vgs S Vgs
Vds
Ga
te ge
Vo V olta
l ta in
ge Dra
“Common-source” configuration

© Bob York Back to TOC

 Common-Source NMOS Characteristic

N-channel Enhancement MOS Id

Ig = 0 D
Id vs Vds for specific values of Vgs G Id vs Vgs in saturation:
Vds= Vgs-Vt Vds Vds  Vgs  Vtn
Ohmic or
ID Triode region Saturation region Vgs S
I d  K n (Vgs  Vtn ) 2
Vgs= Vtn + 2.0 ID

no current flows
Device is “off”
Increasing Vgs
Vgs= Vtn + 1.5

Vgs= Vtn + 1.0

Vgs ≤ Vtn (cutoff)
Vgs= Vtn + 0.5

Vt Vgs
Vds
I-V Curves are described analytically by: Important observations:

 K n  2(Vgs  Vtn )Vds  Vds2  Vds  Vgs  Vtn • No current flows for Vgs< Vtn. Vtn is called the
   “Threshold voltage”

Id   K n (Vgs  Vtn ) 2 Vds  Vgs  Vtn • Once the drain voltage exceeds Vgs-Vtn, a
 constant current flows that depends on Vgs
 0 Vgs  Vtn • For enhancement-mode NMOS the gate

threshold voltage is positive Vtn>0
© Bob York Back to TOC
 MOSFET Saturation Region

The saturation region is especially important.

The NMOS device is in saturation when the following conditions are satisfied:

Vds  Vgs  Vt Vgs  Vt

 
2
When the device is in saturation the drain current is given by: I d  K n Vgs  Vt

ID Kn and Vt are the important device parameters.

Device #1
Kn depends on some material constants and
the device size/geometry
It is difficult to control Kn and Vt precisely, so
Device #2 two different discrete devices may have
significant differences in these parameters
Later we will explore some circuit techniques
to deal with this issue
Vt1 Vt2 Vgs

 

Note: state-of-the-art devices may follow a different behavior: I d  K n Vgs  Vt
where α is closer to 1

© Bob York Back to TOC

 NMOS Saturation - Examples

In the following, the devices have parameters: Vt  1V K n  5mA/V 2

Consider:
Here we have: Vds  10 V Vgs  3V
+10 V

Vg=3V so Vds  Vgs  Vt and Vgs  Vt

Id
Thus device is in saturation and
Vds
Vgs  
I d  5mA/V 2  3V  1V   20 mA
2

+5 V
Here we have: Vds  Vgs  Vout
5 mA
so Vds  Vgs  Vt

  
2
Device is in saturation so I d  5mA= 5mA/V Vgs  1V
2
Vout
Vds
From this we find Vgs  2 V
Vgs

© Bob York Back to TOC

 Common-Source PMOS Characteristic

Vsd= Vsg+Vtp
P-channel Enhancement MOS Ohmic or
Similar characteristics to PMOS except ID Triode region Saturation region
currents and voltages are reversed Vsg= Vtp + 2.0

Increasing Vsg
Vsg S
Vsg= Vtp + 1.5
Vsd
G
Ig = 0 D Vsg= Vtp + 1.0
Id Vsg ≤ Vtp (cutoff)
Vsg= Vtp + 0.5

Vsd
By convention the threshold voltage for Id vs Vsg in saturation:
enhancement-mode PMOS is taken as negative
ID

no current flows
Device is “off”
 K p  2(Vsg  Vtp )Vsd  Vsd2  Vsd  Vsg  Vtp
  

Id   K p (Vsg  Vtp ) 2 Vsd  Vsg  Vtp I d  K p (Vsg  Vtp ) 2

 0 Vsg  Vtp


-Vtp Vsg
© Bob York Back to TOC
 PMOS Saturation - Examples

In the following, the devices have parameters: Vtp  1V K p  5mA/V 2

Consider:
Here we have: Vsd  10 V Vsg  4 V
+10 V

Vg=6V Id so Vsd  Vsg  Vtp and Vsg  Vtp

Vsg
Thus device is in saturation and
Vsd

 
I d  5mA/V 2  4 V  1V   45mA
2

+5 V
Here we have: Vsd  Vsg  Vout
Vsg
so Vsd  Vsg  Vtp
Vsd

  
2
Device is in saturation so I d  20 mA= 5mA/V Vsg  1V
2

Vout
20 mA From this we find Vsg  3V Vout  5V  3V  2 V

© Bob York Back to TOC

 Depletion-Mode FETs

Enhancement-mode devices are “normally off” devices, since no current flows when Vgs=0. A
certain applied gate voltage is required to “turn on” the device and get current flowing
Depletion-mode devices are “normally on”. They conduct current at Vgs=0, and an applied
gate voltage is required to stop the current flow and turn them “off”

N-channel Depletion-mode MOS P-channel Depletion-mode MOS

Id
Ig = 0 D S
Vsg
G
Vsd
Vds G
Vgs S Ig = 0 D
Id
symbol symbol

Id vs Vgs in saturation: ID Id vs Vsg in saturation: ID

I d  K n (Vgs  Vtn ) 2
Threshold I d  K p (Vsg  Vtp ) 2
voltage has the
opposite sign in I dss

no current flows
no current flows

I dss comparison to

Device is “off”
Device is “off”

enhancement
devices.
Otherwise the
characteristics
are similar.

Vtn Vgs -Vtp Vsg

© Bob York Back to TOC
 MOSFET Construction

Lg Gate oxide
Source Gate Drain Key parameters: Lg : gate length Wg : gate width
cox : oxide capacitance density
Wg  : carrier mobility in semiconductor
Saturation current parameter:
Semiconducting substrate N-channel P-channel
1 Wg 1 Wg 1 Wg 1 Wg
Kn  n cox  kn Kp   p cox  k p
“Body” connection 2 Lg 2 Lg 2 Lg 2 Lg

Engineers control whether a device is an enhancement or depletion device by adding

carefully-controlled amounts of impurities (‘dopants”) in the semiconductor

Enhancement Devices Depletion Devices

Vgs  0 Vgs  Vt Vgs  0 Vgs  Vt

No charge carriers exist
under the gate, so no
current flow is possible
© Bob York
An applied field allows
charge to accumulate
under the gate allowing
current to flow
Charge carriers
naturally accumulate
under the gate, allowing
current to flow
The applied field
depletes the charge in
the channel, cutting off
the flow of current
Back to TOC
 JFETs

Drain
N-ch JFET JFETs are another type of depletion-mode FET. They are
constructed differently but otherwise behave much like a
Drain depletion MOSFET, except that Vgs can never exceed zero
Gate Vds volts. The maximum current at Vgs=0 is Idss.
Gate Ids(Vgs,Vds) JFETs can be made in both n-channel and p-channel
versions. Some high-speed compound semiconductor
Vgs devices (GaAs MESFETs and HEMTs) behave like JFETs
Source

Source
Ohmic or
Triode region Saturation region
ID
N-ch JFET
Vgs= 0
Idss
Ig = 0 D Id

Increasing Vgs
Vgs= Vt + 1.5

G Vds
Vgs= Vt + 1.0
Vgs S
Vgs= Vt + 0.5

Vgs ≤ Vt (cutoff) Vds

© Bob York Back to TOC

 FET Family Tree

Field-Effect Transistors

JFET, MESFET MOSFET

Depletion-mode Enhancement-mode Depletion-mode

(normally on) (normally off) (normally on)

n-ch p-ch n-ch p-ch n-ch p-ch

© Bob York Back to TOC

 Discrete Device Example: 2N7000

This is a popular discrete NMOS device From the data sheet:

that we will use in the ECE 2 lab.

2N7000
ID
A
Drain
Gate
Vds
Vds
Vgs
Source

Measured
2N7000Data
120
Vt  2.35V Data
100
K n  220mA/V 2
Model The data sheet specifies that Vt is between
80 0.8V and 3V, with a typical value of 2.1V.
Id, mA

60 Such a wide range of expected Vt is typical

40 of many discrete devices.

20 Representative data for small currents is

shown at left
0
2.2 2.4 2.6 2.8 3.0 3.2
Vgs, Volts
© Bob York Back to TOC