8th Power Electronics, Drive Systems & Technologies Conference (PEDSTC 2017)
14-16 Feb. 2017, Ferdowsi University of Mashhad, Mashhad, Iran
Simple and Efficient Design and Control of the
Single Phase PWM Rectifier for UPS Applications
Mohammad Pichan
Electrical Converters & Power Systems Dept., IRIEE,
ACECR
Tehran, LR.Iran
m�ichan@yahoo.com
Ahmad Ale Ahmad
Department of Electrical and computer Engineering
Babol Noshirvani University of Technology
Babol, Iran
a.hmad@nit.ac.ir
Abstract- This paper deals with simple design and control of
single-phase PWM rectifier which plays an important task in new
commercial and low cost uninterruptible power supplies (UPSs).
Firstly, a simple and fast single-phase phase locked loop (PLL) is
proposed which is one of the main parts of control system.
Besides, an efficient design of passive elements of rectifier is
proposed to reduce size and cost of hardware system. In addition,
due to several benefits of digital signal processors (DSPs) such as
fast calculation capability, various peripherals and serial
communications, a DSP-based digital controller is adopted to
control the rectifier. Several simulation and experimental results
are provided to verify the effectiveness of the proposed design
manner and control system.
Keywords-passiv elements; single-phase rectifier; phase locked
loop (PLL)
L INTRODUCTION
Nowadays, pulse width modulation (PWM) rectifiers have
been utilized widely in DC power electronics applications and
power systems, because they can provide unity power factor
and also input current with low total harmonic distortion
(THD). The structure of the bridge-connected single phase
PWM rectifier is shown in Fig. 1 which can be used as a
battery charger or rectifier of output inverter of uninterruptible
power supply (UPS) [1].
Various control systems with different structure were proposed
to control a single phase PWM rectifiers [2-4]. Among these
methods are: hysteresis current controller [2], deadbeat
controller [3] and predictive controller [4]. Although hysteresis
current controller provides simplicity as well as high
robustness against external disturbances but, it suffers from
variable switching frequency. The predictive controllers
usually require accurate model of the plant as well as accurate
reference current prediction.
In this paper, firstly, input current reference is calculated
based on power balancing in DC-link which defines the
978-1-5090-5766-5/17/$31.00 ©2017 IEEE
Adib Abrishamifar
Department of Electrical Engineering
Iran University of Science and Technology
Tehran, Iran
Abrishamifar@iust.ac.ir
Mehdi Fazeli
Electrical Converters & Power Systems Dept., IRIEE,
ACECR
Tehran, I.R.lran
mfazeli@jdevs.com
Figure 1. The bridge-connected single phase PWM rectifiers.
amplitude of the reference current. Afterward, a single-phase
phase locked loop (PLL) is used to provide a unity power
factor. Finally, proportional-resonant (PR) controller is
employed to regulate input reference current. This method can
perfectly track reference current without any prediction and
also high gain value at main frequency [5-8].
To provide unity power factor, a high reliable PLL is
needed. As a result, different structures were proposed for
single phase applications [9-14]. In single phase applications,
orthogonal signal generation is the main problem which makes
these systems hard for digital implementation [9]. The earliest
orthogonal signal generator (OSG) is based on a transfer delay
block [10] but, it cannot show good performance under non
ideal grid voltage condition. The Hilbert transform [11] is
another OSG solution however, it imposes high computational
burden from digital implementation point of view [12].
Although
Kalman-filter-based OSG shows good performance under grid
voltage frequency variations [13] but, again, this method is
implemented with high computational burden [14]. In this
paper, a simple-structure PLL with low computational burden
is proposed in this paper. The OSG part is achieved simply via
index shift of a predefmed look-up table. To design the PWM
rectifier efficiently without any over design, the design
procedure of the passive elements is also proposed. Finally, the
proposed method is simulated using
383
 (3)
i; I� sine 8)
x
=

Bode Diagram
100

50
Figure 2. The generation of grid reference current.

Magnitude (dB)
0
MATLAB/S[MULINK software. [n addition, whole control
system is implemented via a digital signal processor
-50
(DSP)-based prototype board for a 4kw single phase PWM
rectifier.
-100
90

II. SYSTEM DESCRIPTION

45

Phase (deg)
A. Control System 0

A control system is consisted of DC-link voltage controller

and AC grid current controller which are connected in series -45

with each others. To bring zero steady state error with rapid
transient response, a common PI regulator is employed as the -90
1 2 3

DC-Link voltage regulator. The coefficients of the P[ regulator 10 10

Frequency (Hz)
10

are selected to guarantee fast transient response as well as zero

steady state error given in table I. The input current should be a
sinusoidal signal without any phase difference with grid
voltage not to absorb reactive power. According to Fig.2, the
output of DC-link voltage regulator defmes amplitude of grid
reference current. A fast and simple-structure PLL, which will
be illustrated in next section, is used to generate a grid voltage
phase so the grid reference current (t,) is defined as follow:
i ; =( sin(8)
Figure 3. The Bode plot an ideal PR controller with Kp=O and Kr=l.
where (lOa is a bandwidth of resonant controller around central
frequency. According to Fig. 4, which is a Bode plot of (3), the
gain value is fmite at this condition. As a result, by tuning a Kr,
the resonant controller can provide desired gain value to avoid
aforementioned problems.
(1)

The proportional-resonant (PR) controller is a well-known AC

Bode Diagram
controller which is utilized as current regulator. The transfer -20
function of an ideal PR is presented in (2).
-30

Ks
GpR (s)=Kp + 2 r 2 (2) -40
Magnitude (dB)

S + lOo
-50

The lOa is a central angular frequency of resonant -60

controller, Kr and Kp are the resonant and proportional

-70
controller gains, relatively. The frequency response (Bode plot)
of GPR(S) with Kp=O and Kr=l is shown in Fig. 3. At this -80
90
condition, only the second term in (2) is used which is a
generalized integrator in a stationary reference frame. [t is
evident that the transfer function has an infmite gain at lOa
45
Phas e (deg)

which guarantees precise steady state tracking at central 0

frequency.
-45
For practical application, some physical limitations are
existed such as quantizing effect, sampling delay and the -90
switching frequency limitation. Due to these limitations, an 10
1
10
2
10
3

ideal resonant controller with high gain value may result in Frequency (Hz)

inconsistency or reference current tracking error. Therefore, it

is beneficial to use non-ideal resonant controller. A transfer Figure 4. The Bode plot an nonideal PR controller with Kp=O, Kr=1 and
function of non-ideal resonant controller is given in (3).
Sma =
5;r .

384
B. Phase locked loop (PLL) pass filter. The complete parts of the proposed PLL are shown
To provide unity power factor, phase estimation of the grid in Fig. 5.
voltage is needed to be used in a current control loop.
Therefore, it is so important to have perfect phase estimation III. PASSIVE ELEMENTS SELECTION
especially under harmonic polluted grid voltage to guarantee
unity power factor. An implementation of a fast and high A. Ls selection
reliable PLL in DSP is proposed in this paper (Fig. 5). There are two main passive elements for rectifier: input
The most important parts of this PLL are orthogonal signal inductor between grid and converter (L,) and an output DC-link
generator and phase detector (PO) units. The most famous PO capacitor. Although high value of Ls results in smoother and
is a multiplier unit as depicted in Fig. 5. Assume low-THO grid current but, it deteriorates the dynamic response
and increases the voltage drop which decrease a maximum DC­
Y 1 =cos( O1t+�) and Y 2 =cos(Wi+rp 2 ) , the product of these
link voltage. The L, can be selected according to mathematical
two signals is given in (4): model of converter, maximum current ripple, switching
1 frequency and DC-link voltage but this method is so
Yl xy, ="2{ cos((� +w, )t+!p, +!P2 )+cos((� - W, )t+!Pl - !P2 )} (4) complicated [17]. A very simple method for practical
implementation is to assume a %10 of maximum grid voltage
If U1 '" 0)2 ' passing the Yl XY2 from a low pass filter result in for voltage drop across the Ls:
(5).
(6)
Yl XY2 =cos( rp.. -tpJ=cos(!ltp) (5)
This method is tested and resulted in low current ripple and
Due to usage of an integrator in PLL, stable point of PLL is good dynamic response.
achieved with zero output of PD. Consequently, employing a
multiplier as PO shows 90° phase shift between input and B. Cdc selection
output sinusoidal signals which is not applicable. It is worth to In single-phase power systems, the input power can be
be mentioned that the use of two orthogonal signals with two calculated as follow:
multipliers can set the output sinusoidal signal at 0° phase shift
with respect to reference or input signal. This idea is inspired V I V I - -
by three phase system in which using a abc to afJ reference i = � + � cos(2cot)=Pm+Pm
Pm=Vmm (7)
2 2
transformation generate two perpendicular signals [15-16].
Now, the problem is orthogonal signal generating. Based on (7), first term (�n ) is a constant value and
At steady state condition, the phase and frequency of input second term (�n ) is an alternating power at double grid
and output signals are the same. Therefore, a perpendicular frequency. To ensure constant and low ripple voltage in DC­
signal can be generated using PLL outputs. On the other hand, link, the alternating part should be dispelled by
the voltage controlled oscillator (VCO) can be implemented DC-link capacitance. Then, the energy balancing between
through look-up table and simple counter. As a result, to capacitor and grid can be defined as (8).

ft �os(20Jt)dt
achieve two orthogonal signals, just the pointer index must be
changed. To provide an orthogonal signal, the VCO index 1 2 2 V I
-C dc (Vdc _Vo )= (8)
pointer is shifted 90°. This simple approximation removes all 2 0 2
of calculation burden which imposed by other methods.
Solving (8) and applying a Taylor expansion and removing
PD
high order components, the time domain result of DC voltage
is given in (9).

Vml msin(20Jt) _ Pni sin(20Jt)

V (t)=V0 + (9)
� 4C de V0 2C de V0

cos(m,t)
where Vo is the nominal DC voltage.
sin(m,t)
, --- - ------------------
With respect to minimum and maximum of DC voltage
,
, (Vdc. min , Vdc. max) , the transferring energy M during charging
, process is calculated as follow:
,
,
, z·t ' 1
, 2 2 (10)
� J
M:=-Cdc(Vdc, max -Vdc, m ni )
__________________________

veo 2
Also for DC voltage, the (11) can be resulted as follow:
Figure 5. The structure of the proposed single phase PLL.

Finally, subtracting the product of perpendicular signals, the

high frequency parts will be omitted without any use of low TABLE I. THE PARAMETERS OF SIMULATED SYSTEM.

385
 Rated power 4 kW 54
Grid voltage (V,) 220 v (rms)
-
DC-Link voltage (Vo) 450 v 53
f---'�-+-
Filter Inductor (L,) 7. 6 mH
DC-Link capacitance (Cdo) 2200 IlF 52 It.. "'--- -
'II''r-'
Sampling frequency
Switching frequency
12 kHz
3 kHz /�
A
Kp 2
I
K, 50
Kp, 2
49
K, 5

48

- vde,max +V de,min
Vo '
AVdC=Vdc,max -Vdc,min (11) 47
2 0.2 0.25 0.3 0.35 0.4
Time(s)
Based on (9), (10) and (II), the maximum voltage ripple can
be calculated as (12). Figure 6. Variation of VCO input according to reference frequency step
change.
P
AVde =Vdc,max -V dc, nun. = ---
� (12)
de V 0

0.8
If AVde «a%) *Vo then, the minimum DC-link voltage is
0.61--1-+--1
calculated as follow:
0.4
> 100x�n 0.2
C de - 2
(13)
amVo ----
o

Based on (13), the capacitor will be selected with respect to -0.2

designer requirements. It is important to say that mostly, due to
-0.4
high alternating power (�n ),the required capacitance is large
-0.6
which will be increased with output power increase.
-0.8

IV, SIMULATION RESULTS -b.�2--�--�0�

. 2�5�--��OL .3--�--��
0 .3�
5 ��--�0.4
To validate the effectiveness of the control system and Time(s)
design manner, simulation and experimental results are
provided with a 4kW test bench, The parameters of the system Figure 7. VCO output according to reference frequency step change.
are given in Table. I. It is worth to be mentioned that a load
bank based on resistors is used as the rectifier load,
TABLE II. THE PERCENTAGE OF HARMONICS ADDED TO GRID VOLTAGE.
To achieve unity power factor, PLL plays a significant task
3,d harmonic.l. 5th harmonic% 7th harmonic% 9th harmonic%
in control system, Especially under harmonic polluted grid
voltage, PLL should keep its normal operation, Different 5.5 4.5 4 3.5
simulations are performed to validate the reliable and fast
performance of the proposed PLL. A reference frequency step Accordmg to Table. I, the rectIfier IS sImulated under
variation is done and the output and input of the VCO is steady state condition and the performance is shown in Fig. 9.
shown in Fig. 6 and Fig.7, relatively. The input of VCO is Accordingly, the input current is with the same phase with grid
gained by 50/4. Based on Fig.7, any mutation in output of voltage. In addition, the THD% value of the input current is
VCO is visible with respect to integrator characteristic. 3.87% which convinces international standards like IEEE
Furthermore, to consider the PLL performance under non­ 1547. Because of an inherent characteristic of single phase
ideal grid voltage, a harmonic polluted voltage is connected to systems, the double frequency power ripple is evident in the
the input of PLL and the percentage of each harmonic is given input power. To deliver constant power, this power ripple
in Table .11. According to Fig. 8, the PLL tracks the reference transfers to the DC-Link so, the DC-Link capacitance should
input accurately even at this severe condition, be increased to maintain a voltage ripple at desired value.
Furthermore, it increases the grid current THD. Hence, better
current controller and filter is needed.

386
 Fig. 10. Accordingly, the DC-Link voltage controller tracks the
1.5 desired value precisely. The PR current regulator tracks the
Reference signal
Output of PLL
reference current with THD value lower than 4.9% which is
1
acceptable from international standards point of view. Also, the
power factor is greater than 0.99 in which considerably low
reactive power is absorbed by rectifier.
0.5
To evaluate a transient response of control system, DC load
experienced a incremental step change and the results are
0
shown in Fig. I I. Evidently, the reference value is tracked as
fast as few periods. On the other hand, the voltage controller
-0.5 retrieves the voltage drop very fast which is not sensible.

-1

-1.5
0 0.01 0.02 0.03 0.04 0.05 0.06 0.07 0.08 0.09 0.1
Time(s)

Figure 8. The perfonnance of PLL under hannonic polluted grid voltage.

4000
P(W)

2000
(a)
0
0 0.05 0.1 0.15 0.2

400

200
Vgrid(v)

0
-200

-400
0 0.05 0.1 0.15 0.2

50
Igrid(A)

-50
0 0.05 0.1 0.15 0.2
(b)
600

500
Vdc(v)

400

300
0 0.05 0.1 0.15 0.2
Time(s)

Figure 9. The steady state performance of rectifier.

V. EXPERIMENTAL VALIDATION (c)

The power test bench similar to the Fig.1 is implemented to
provide experimental results under different conditions. A
development board based on a TMS320t28335 processor from
TI company is employed for practical implementation of
control system. The 150MHz clock frequency is chosen for
DSP and the input variables are sampled with 12kHz sampling
frequency. Also, a development board is used as IGBT driver
board. The steady state response of control system is shown in

387

Figure 10. Experimental results under steady state condition: (a) grid voltage
and current (b) THD% value of grid voltage and input current (c) input power
and power factor (d) DC-Link voltage.
(b)
Figure II. The transient response of control system: (a) input current
(lOA/div), (b) DC-Link voltage(lOOv/div).
VI. CONCLUSION
The experimental evaluation of single phase PWM rectifier
was presented in this paper. The control system is consisted of
DC-Link. voltage regulator and current regulator which are in
series with each other. A simple PLL system was proposed to
provide precise unity power factor. Besides, an efficient design
of passive elements was also proposed. According to the
numerous benefits of DSPs, the digital controller based on DSP
board is utilized. The practical implementation of each parts of
system control in DSP was considered in details. Different
simulations in MATLAB/SIMULINK software validate the
excellent performance of whole control system and elements
selection procedure. Besides, the power test bench was
provided where experimental results validate low ripple DC
388
voltage as well as low THO value of grid current and unity
power factor.
REFERENCES
[1] P. T. Krein, R. S. Balog, and M. Mirjafari, "Minimum Energy and
Capacitance Requirements for Single-Phase Inverters and Rectifiers
Using a Ripple Port", IEEE Trans. on Power Electron., vol. 27, no. 11,
pp. 4690-4698, Nov. 2012.
[2] S. Busom L. Malesani, and P. Mattavelli, "Comparison of current
control techniques for active power filters," IEEE Trans. on Industrial
Electronics, Vo1.45, 1998.
[3] F. Kamran and T.G. Habetler, "An improved deadbeat rectifier regulator
using a neural net predictor," IEEE Trans. on Power Electronics, Vol. I0,
pp. 504-510, July 1995.
[4] D.G. Holmes and D.A. Martin, "Implementation of a direct digital
predictive current controller for single and three phase voltage source
inverters," in Proc. IEEE lAS Annu. Meeting, 1996, pp.906-913.
[5] X. Yuan, W. Merk, H. Stemmler, and J. Allmeling, "Stationary- Frame
Generalized Integrators for Current Control of Active Power Filters with
Zero Steady-State Error for Current Harrnnics of Concern under
Unbalaned and Distorted Operating Conditions," /EEEU Trans.U01L
.7ndustryn Appizcatzons n VoI . 38, No.2, pp.523-532, March/April
,
2002.
[6] S. Fukuda, and T. Yoda, "A Novel Current-Tracking Method for Active
Filters Based on a Sinusoidal Internal Model," IEEE Trans. on Industry
Applications, Vol. 37, No. 3, pp.888-895, May/June 2001.
[7] Y. Sato, T. Ishizuka, K. Nezu, and T. Kataoka, "A New Control Strategy
for Voltage-Type PWM Rectifiers to Realize Zero Steady-State Control
Error in Input Current," IEEE Trans. on Industry Applications, Vol. 34,
No. 3, pp.480-486, May/June 1998.
[8] T. Kataoka, T. Ishizuka, K. Nezu, Y. Sato, and H. Yamaguchi, "Current
Control of Voltage-Type PWM Rectifier IntroducingResonance-based
Controller," lEE Power Electronics and Variable Speed Drives, pp.519-
522, 1996.
[9] F. Liccardo, P. Marino, and G. Raimondo, "Robust and fast three-phase
PLL tracking system," IEEE Trans. Ind. Electron., vol. 58, no. 1, pp.
221-231, Jan. 2011.
[10] R. Zhang, M. Cardinal, P. Szczesny, and M. Dame, "A grid simulator
with control of single-phase power converters in D-Q rotating frame," in
Proc.IEEE Power Electron. Spec. Conf., 2002, pp. 1431-1436.
[11] M. Saitou, T. Shimizu, "Generalized theory of instantaneous active and
reactive powers in single-phase circuits based on Hilbert transform,"
inProc. 33rd Annu. IEEE PESC, Jun. 2002, pp. 1419-1424.
[12] I. Carugati, P. Donato, S. Maestri, D. Carrica, and M. Benedetti,
"Frequency adaptive PLL for polluted single-phase grids," IEEE Trans.
PowerElectron., vol. 27, no. 5, pp. 2396-2404, May 2012.
[13] K. De Brabandere, T. Loix, K. Engelen, B. Bolsens, J. Van den
Keybus,J. Driesen, and R. Belmans, "Design and operation of a phase­
locked loop with Kalman estimator-based filter for single-phase
applications," in Proc. IEEE IECONIIECON, Nov. 2006, pp. 525-530.
[14] D. Dong, T. Thacker, R. Burgos, F. Wang, and D. Boroyevich, "On zero
steady-state error voltage control of single-phase PWM inverters with
different load types," IEEE Trans. Power Electron. , vol. 26, no. 11, pp.
3285-3297, Nov. 2011.
[15] A. A. Ahmad, M. Pichan, A. Abrishamifar, "A new simple structure
PLL for both single and three phase applications," !NT. J. ELEC
POWER. , vol. 74, pp. 118-125, Jan. 2016.
[16] M. Jamarani, M. Pichan, A. Abrishamifar, M. Fazeli, "Evaluation of
different positive sequence detection structures applied to grid­
connected converters," PEDSTC, pp. 126-130, Feb. 2014.
[17] M. Pichan, A. A. Ahmad, A. Abrishamifar, M. Jamarani, "A
Straightforward Procedure to Select Passive Elements in Single-phase
Pulse-width Modulation Rectifiers with Developed Resonant Current
Controller," Electr Pow Syst Res, vol. 44, no. 4, pp. 379-389, Feb. 2016.