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Fet DC Biasing
Fet DC Biasing
JFET Biasing
FET Biasing 1
ENGI 242/ELEC 222 January 2004
2
⎛ VGS ⎞
ID = IDSS ⎜ 1 - ⎟
⎝ VP ⎠
VGS = - VGG
FET Biasing 2
ENGI 242/ELEC 222 January 2004
2
⎛ VGS ⎞
ID = IDSS ⎜ 1 - ⎟
⎝ VP ⎠
Since VGS = - VGG
2
⎛ VGG ⎞
ID = IDSS ⎜ 1 - ⎟
⎝ VP ⎠
FET Biasing 3
ENGI 242/ELEC 222 January 2004
2
⎛ VGS ⎞
ID = IDSS ⎜ 1 - ⎟
⎝ VP ⎠
2
⎛ VGG ⎞
ID = IDSS ⎜ 1 - ⎟
⎝ VP ⎠
FET Biasing 4
ENGI 242/ELEC 222 January 2004
IG = 0
VRG = 0
Transconductance Curve
FET Biasing 5
ENGI 242/ELEC 222 January 2004
FET Biasing 6
ENGI 242/ELEC 222 January 2004
FET Biasing 7
ENGI 242/ELEC 222 January 2004
Self Bias
FET Biasing 8
ENGI 242/ELEC 222 January 2004
Input Output
⎛ R2 ⎞ -VG + VGS + IDRS = 0 VDS = VDD - ID (RD + RS)
VG = VDD ⎜ ⎟
⎝ R1 + R2 ⎠ VGS = VG - IDRS
January 2004 ENGI 242/ELEC 222 18
FET Biasing 9
ENGI 242/ELEC 222 January 2004
FET Biasing 10
ENGI 242/ELEC 222 January 2004
FET Biasing 11
ENGI 242/ELEC 222 January 2004
MOSFET Biasing
FET Biasing 12
ENGI 242/ELEC 222 January 2004
FET Biasing 13
ENGI 242/ELEC 222 January 2004
FET Biasing 14
ENGI 242/ELEC 222 January 2004
With an N Channel
D-MOSFET,
VGS may be positive
FET Biasing 15
ENGI 242/ELEC 222 January 2004
IG = 0
VGS = VDS
FET Biasing 16
ENGI 242/ELEC 222 January 2004
FET Biasing 17
ENGI 242/ELEC 222 January 2004
VGSTH = 4V
VGSon = 7.5V
IDon = 5mA
VDD = 22V
IDon
k=
(VGSon - VGSTH)2
ID = k(VGS - VGSTH)2
FET Biasing 18
ENGI 242/ELEC 222 January 2004
FET Biasing 19
ENGI 242/ELEC 222 January 2004
FET Biasing 20