Implementation of 16-Bit Hamming Code encoder and decoder for single bit error

detector and corrector

Dr.K.S.Srikanth, Dept of EEE, GMR IT, Gmr Nagar, Rajam
A.R.V.Siva Krishna, Dept of Systems Design, Andhra University, Visakhapatnam

Abstract : The search for correcting codes led to the Hamming code perfect 1-bit Error Correcting
Codes and then extended. Hamming code 1-bit Error Correcting and 2-bit Error Detecting Codes. In
mathematical terms, Hamming codes are a class of binary linear codes. For each integer p>2, there is a
code with ‘p’ parity bits and ((2^p)-p-1) data bits. The main aspect of this Hamming encoder and
decoder is to know how a code can be encoded and decoded using Hamming code. This project is
implemented for Hamming code single – bit error detection and single – bit error correction. For
Implementing this Single bit error detector and corrector Xilinx ISE 12.1i and the Micro wind Layout
Editor Tools was used. Hamming codes are widely used in computing, telecommunications and other
applications. It can only detect and correct the number of bits but cannot solve the problem.

Keword : Parity, Error Correction Codes (ECC), Error Detection Codes (EDC), Cross Talk, Soft Error,
Hamming Code.

I. INTRODUCTION

In the late 1940’s RICHARD HAMMING recognized that the future evolution of computers
required greater reliability, in particular the ability to not only to detect errors, but correct them. Thus
Hamming code is called error detecting and correcting code. The code uses a number of parity bits
located at certain positions in the code group.

The theory of error detecting and correcting codes is that branch of engineering and mathematics
which deals with the reliable transmission and storage of data. Imagine two individuals, call them the
sender and there receiver .The sender wishes to transmit a sequence of binary digits across a medium
called a channel to the receiver. If she sends a one, a one will probably be received, and if she sends a
zero, a zero will probably be received. The channel, however, is not totally reliable. Therefore,
occasionally, a transmitted one will be received as a zero, and a transmitted zero as a one. The sender is
unable to prevent the channel from making such errors. Can something be done to reduce their effects?

Hamming codes can detect and correct single-bit errors. In other words, the hamming distance
between the transmitted and received code-words must be zero or one for reliable communication.
Alternatively, it can detect (but not correct) up to two simultaneous bit errors.

In contrast, the simple parity code cannot correct errors, nor can it be used to detect more than
one error(such as where two bits are transposed).

Hamming Code work by formula[1]:-

2^p>=n+p+1
Where n = no. of bits entered, p=parity bits.

II. IMPLEMENTATION
A. Overview
Hamming algorithm is an error correction code that can be used to detect single and double-bit
errors and correct single-bit errors that can occur when binary data is transmitted from one device into

www.theinternationaljournal.org > RJSITM: Volume: 01, Number: 12, October-2012 Page 16

another. This project was implemented for single-bit error detection and single-bit error correction and
it presents design and development of (21-bit, 16-bit,1-bit ). Here, 21-bit corresponds to the total
number of Hamming code bits in a transmittable unit comprising data bits and parity bits , 16-bit is the
number of while 1-bit denotes the maximum number of error bits in the transmittable unit. This code
fits well into small field-programmable gate arrays (FPGAs), complex programmable logic devices
(CPLDs) and application-specific integrated circuits (ASICs) and is ideally suited to communication
applications that need error-control.

TRANSMITTER RECIVER

Fig: 1.Block diagram of hamming encoder and decoder[2]

B. Hamming Encoder (Transmitter)

Before transmitting the 16-bit data, parity is calculated for associated bits. In the example below,
the data bits have been copied into their proper positions in the output message and parity bits has been
calculated. Finally the parity bits can be added at the end of the data unit with the original data bits to
form the (21-bit, 16-bit, 1-bit) .

C. Number Of Parity Bits

If the number of information bits is designated as d, then the number of parity bits, p is
determined by the following relationship:[3]
(2^p) >= d+p+1
This code is implemented for 16-bit input data.
Hence, (2^p)>=16+p+1
(2^p)>=17+pLet p=5
(2^5)>=17+5, => 32>22
This value of ‘p’ satisfies the relationship.

D. Calculation of P(0)

The positions of all the data bits which are mentioned in decimal system are converted into binary
system. The binary location number of parity bit p0 has a 1 for its right-most digit. This parity bit
checks all bit locations, including itself, that have 1s in the same location in the binary location
numbers. Therefore, parity bit p0 checks bit locations 1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21 and assigns
p(0).

TABLE I

www.theinternationaljournal.org > RJSITM: Volume: 01, Number: 12, October-2012 Page 17

E. Calculation of P(1)
The binary location number of parity bit p1 has a 1 for its second right-most digit. This parity bit
checks all bit locations, including itself, that have 1s in the same location in the binary location
numbers. Therefore, parity bit p1 checks bit locations 2, 3, 6, 7, 10, 11, 14, 15, 18, 19 and assigns p(1).

TABLE II

F. Calculation of P (2)
The binary location number of parity bit p2 has a 1 for its third right-most digit. This parity bit
checks all bit locations, including itself, that have 1s in the same location in the binary location
numbers. Therefore, parity bit p2 checks bit locations 4, 5, 6, 7, 12, 13, 14, 15, 20, 21 and assigns p(2).

TABLE III

G. calculation of P (3)
The binary location number of parity bit p3 has a 1 for its second left-most digit. This parity bit
checks all bit locations, including itself, that have 1s in the same location in the binary location
numbers. Therefore, parity bit p3 checks bit locations 8, 9, 10,11, 12, 13, 14,15 and assigns p(3).
TABLE IV

H . Calculation of P(4)
The binary location number of parity bit p4 has a 1 for its left-most digit. This parity bit checks
all bit locations, including itself, that have 1s in the same location in the binary location numbers.
Therefore, parity bit p4 checks bit locations 16, 17, 18, 19, 20, 21 and assigns p(4).

TABLE V

I . Formulae

J . Hamming Decoder (Receiver)

The receiver takes the transmission and recalculates the new parity bits, using the same sets of
bits used by the sender. Plus, the relevant parity bits for each set. Then it assembles the new parity
values into a binary number in the descending order of parity position. Suppose if the bit has changed

www.theinternationaljournal.org > RJSITM: Volume: 01, Number: 12, October-2012 Page 18

from 1 to 0 then the error bit is identified and the receiver can complement its value and correct the
error.

Fig.2. Hamming encoder RTL schematic block

Fig. 3. Hamming decoder RTL schematic block

Fig.4. Single – bit error detection and correction RTL schematic

www.theinternationaljournal.org > RJSITM: Volume: 01, Number: 12, October-2012 Page 19

 Fig.5. Single – bit error detection and correction technology schematic block

Fig 6 Hamming encoder waveform

Input d 0000000011000001
Output p 00100
Output hc 0000000001100000100
where d is data bits, p is parity values, hc is encoded data

Fig.7. Hamming decoder waveform

Input h 000000000110000010100
Output syn 00000
Received rd 0000000011000001
data
Received rp 00100
parity
Generated gp 00100
parity

where syndrome(syn) is error position

www.theinternationaljournal.org > RJSITM: Volume: 01, Number: 12, October-2012 Page 20

 Fig. 8. Single – bit error detection and correction waveform

Input Data 0000000011000001

Output Error 0
Output Syn 0000
Output Parity 00100
hd 000000000110000010100

Error in 3rd bit 000000000110000010000

Output Error 1
Output Syn 00011

Error is corrected by complementing the 3rd position of hd: 000000000110000010100

TABLE IX

In Microwind Tool, at 0.060μm Fabrication Technology

Fig. 9. Single – bit error detection and correction layout with i/o pads

www.theinternationaljournal.org > RJSITM: Volume: 01, Number: 12, October-2012 Page 21

 Fig. 10 Single – bit error detection and correction waveform

III. CONCLUSION

The RTL schematic diagrams are show in the figure. Successful implementation of the Hamming Code
Single Bit Error Detection and Correction using the Xilinx ISE.12.3 version and output wave forms are
shown in figure:10.Successfully implemented using Microwind Layout Editor Tool output waveform
are shown in figure 10. This Hamming Encoder can be implemented for any Memory circuit and in
communication devices to prevent Data loss.

REFERENCES

[1] www.wikipedia.org
[2] www.google.com [fig .1]
[ 3] HAMMING R. W. “Error detection and error correcting codes” Bell system tech. jour., 29,
1950:147-160.
[4] Shu Lin and Daniel j. Costello, jr., error control coding (Englewood clifff, new jersey: Pretence
hall 1983).
[5] Modern digital Electronics, 3rd edition by R. P. Jain.

www.theinternationaljournal.org > RJSITM: Volume: 01, Number: 12, October-2012 Page 22