New Bridgeless Buck PFC Converter With

Improved Input Current and Power Factor

Abstract:- The bridgeless buck power factor correction (PFC) converters feature the merits of
low output voltage and high efficiency while their nature existing dead angles in the input
current deteriorate the input current harmonics and power factor (PF). Aiming to reduce the dead
angles, a new bridgeless buck PFC converter is proposed in this paper. Through integrating the
main buck circuit and the auxiliary fly back circuit with one magnetic core, the dead angles in
input current of the proposed bridgeless buck PFC converter is eliminated so that the power
factor and input current harmonics are improved. The proposed bridgeless buck PFC converter
is designed to operate in discontinuous conduction mode (DCM) with the merits of simple
controller and nature current shaping ability. A new logic control circuit is provided. The
detailed theoretical derivations and design consideration are presented. The experimental
comparison among the proposed bridgeless buck PFC converter, the conventional buck PFC
converter and the conventional bridgeless buck PFC converter is displayed to validate the
effectiveness of the new converter.

index Terms—Bridgeless buck converter, dead angles, discontinuous conduction mode (DCM),
power factor correction .

I. INTRODUCTION
The active power factor correction (PFC) converters are widely applied in power electronic
equipment to meet the rigorous international input current harmonics standard like IEC
61000-3-2 limits. Commonly, the boost converter is the most popular option as the PFC
front-end because of its simple topology, excellent current-shaping performance, easy control
and low cost [1]-[3]. Nevertheless, the boost PFC converter emerges two main drawbacks
[4]. One is that its efficiency
 exhibits an obvious drop around 1%-3% at low line compared to high line. Another is that its
high output voltage (380-400V) is detrimental to the switching losses of boost PFC front-end
and its down-stream DC-DC converter

In recent years, the conventional buck PFC converter as an alternative of boost PFC converter in
low power level applications has gotten much attentions by researchers and engineers, because it
can provide high efficiency at low line and low output voltage. Some theoretical analysis and
new topologies of the conventional buck PFC converter have been studied in [4]-[29]. However,
when the input voltage is lower than the output voltage, the generated nature dead angles shown
in Fig. 1 of the conventional buck PFC converter deteriorate the power factor (PF) and input
current harmonics seriously. Thus, it is not easy for the conventional buck PFC converter to
meet the input current harmonics standards.

In order to improve the power factor and input current harmonics of the conventional buck PFC
converter, some new control methods and new topologies were proposed , an improved peak
current control scheme was proposed to improve the input current harmonics and the efficiency
of the conventional buck PFC converter. In [19], a variable on-time (VOT) control method for
conventional buck PFC converter was proposed to improve input current harmonics and power
factor. In [20], a prediction of quadratic sinusoidal current modulation for conventional buck
PFC converter was proposed
to mitigate the dead angles. The above three control methods can alleviate the input current
harmonics, but the inherent dead angles still exist so that the input current harmonics are still
unsatisfied. In , a novel conventional buck PFC converter using one cycle control was proposed,
which can reduce the

dead angles. In [22]-[24], some new integrated conventional buck and flyback circuits were
proposed. When the input voltage is lower than the output voltage, the flyback circuit is active.
Through this way, the dead angles of the above conventional buck PFC converters can be
reduced. Also, a conventional buck PFC converter in series with an auxiliary flyback circuit was
proposed in [25]. This PFC converter has only one power switch and the dead angles are
reduced. Two conventional buck PFC converters combined with buck-boost circuit with reduced
dead angles were proposed respectively. A conventional buck PFC converter using an active
buffer with reduced dead angles was proposed in [28]. In [29], a family of single-phase hybrid
step-down PFC converters was introduced, which provide a systematical derivation
methodology to construct a hybrid conventional buck PFC converter to reduce dead angles. In
brief, all the above efforts are paid to improve the input current harmonics and power factor of
the conventional buck PFC converter. However, the semiconductor loss of the conventional
buck PFC converter is high, since there are always three semiconductors conducting in the
current flowing path. Compared to the conventional buck PFC converter, the bridgeless buck
PFC converter owns a further improved efficiency due to the reduced number of simultaneously
conducting semiconductor components. Up to now, some novel bridgeless buck PFC converters
were proposed in Nevertheless, the undesired dead angles are still generated in these bridgeless
buck PFC converters. Aiming to reduce the dead angles in the bridgeless buck PFC converter, a
new bridgeless buck PFC converter shown in Fig. 2 is proposed, analyzed and validated in this
paper. In this new bridgeless buck PFC converter, the contribution of eliminated dead angles is
achieved by using the auxiliary flyback circuit. Thus, higher power factor and lower input
current harmonics can be obtained.In the auxiliary flyback circuit of the proposed bridgeless
buck PFC converter, two power switches, two input rectifier diodes and two primary windings
are required. The increased

components in the auxiliary flyback circuit are not beneficial to the total cost and power density.
Since the discontinuous conduction mode (DCM) is applied to the proposed bridgeless buck
PFC converter, a simple control method, nature current shaping ability, zero-current turn on in
the power switches and zero-current turn off in the output diodes are obtained. Also, a new logic
control circuit is designed to further improve the driving loss. In addition, four extended new
bridgeless buck PFC converters with eliminated dead angles are proposed and introduced in the
appendix.
II. OPERATION PRINCIPLE
For the proposed bridgeless buck PFC converter, there are two operation modes within one half-
line cycle. When the input voltage Vinis lower than the boundary voltage Vb, this converter
operates in flyback mode. Otherwise, it operates in buck mode. Since the proposed bridgeless
buck PFC converter is designed to operate in DCM, each operation mode can be divided into
three operation stages. The operation modes in one positive half-line cycle are exhibited in Fig.
3 and the key waveforms in one positive half-line cycle are displayed in Fig. 4 including the
control signal VG1and VG3, the input current in, the primary inductor current iLP1 and the
secondary inductor current iLS1. Notably, VG1and VG3are the control signal of power switches
S1and S3, respectively. It is clear that the power switch S1is driven in positive half-line cycles
and the power switch S3is driven in the flyback mode of positive half-line cycles. The primary
inductor LP1only operates in the flyback mode and the secondary inductor LS1operates in the
whole positive half-line cycles. Similarly, the other symmetrical half buck-flyback part will be
active in the negative half-line cycles
A. Flyback Mode
When the input voltage is lower than the boundary voltage, the auxiliary flyback circuit is
active.
Stage I (Fig. 3 (a)): when the power switch S3is turned on, the input voltage Vin charges the
primary inductor LP1of the transformer T1. The output voltage Vois maintained by the output
capacitors. The primary inductor current meet

Stage II (Fig. 3 (b)): when the power switch S 3 is turned off, the secondary inductor LS1of
transformer T1 releases the energy to the load. The secondary inductor current satisfies

Stage III (Fig. 3 (c)): the output capacitors maintain the output voltage Vo when all of the power
switches are in off
state.

B. Buck Mode
When the input voltage is higher than the boundary voltage, the main buck circuit is active.
Stage I (Fig. 3 (d)): when the power switch S1is turned on, the input voltage charges the
secondary inductor LS1and the load. The inductor current
Stage II (Fig. 3 (e)): when the power switch S1is turned off, the secondary inductor LS1provides
energy to the load. The
inductor current meets

Stage III (Fig. 3 (f)): same to the stage III of flyback mode, only the output capacitors maintain
the output voltage
Vo when all of the power switches are in off state.

III. THEORETICAL ANALYSIS AND DESIGN CONSIDERATION

Before the detailed theoretical analysis, some assumptions are presented. Firstly, the switching
frequency fSis much igher
than the line frequency fLso that the input voltage can be considered to be constant during one
switching period.
Secondly, the output capacitors are large enough to maintain the output voltage constant.
Thirdly, the input voltage is idealized to be sinusoidal, which is given by
where Vm is the peak value of the input voltage and ω is the angular frequency. A. The Voltage
Conversion Ratio M The averaged input current ‹iin› during the positive half-line cycle is
expressed a

where
iLS1_peak is the peak value of the secondary inductor current iLS1, Dis the duty cycle, nis the
turn ratio of the transformer and θb is the boundary angle which is defined as

The peak current value is

where Tsis the switching period. Based on the balance between the average input power and
output power, the relationship between the voltage conversion ratio M(M=Vo/Vm) and the duty

cycle Dis derived as

The relationship between the voltage conversion ratio M and
duty cycle D under different parameter K is presented in Fig. 5. It is clear that the duty cycle D
increases with the increase of voltage conversion ratio Mand parameter K
B. The Operation Condition for DCM In order to ensure the buck and flyback circuit operating
in
DCM, the conditions must be satisfied as the following expressions

.
where d off_B is the switching-off duty cycle of buck mode while doff_F is the switching-off
duty cycle of flyback mode. It equals to the period of stage II divided by one switching period.
Applying voltage-second balance principle to the secondary inductor LS1 , the voltage
conversion ratio Mis
In order to make the circuit operate in DCM at peak line of buck mode and at boundary line of
flyback mode, the simplified conditions are
These operation conditions for DCM of buck and flyback mode are presented in Fig. 6 (a) and
(b), respectively. From these figures, the condition (20) is much larger than condition (19) at low
voltage conversion ratio
M. Thus, the condition (19) is the major DCM limit at low voltage conversion ratio M. At high
voltage conversion ratio M, both of the two conditions should be satisfied.
C. The Selection of Boundary Voltage Vb

The averaged input current in one positive half-line cycle can be obtained as

In order to achieving a smooth transition at boundary point between the flyback mode and the
buck mode, the averaged input current of the buck and flyback mode at the boundary point
should be equal to each other. Thus, the relationship should satisfy
Note that, since the output voltage Vo is usually constant in the PFC front-end and the turn ratio
nof transformer is fixed in practical application, the boundary voltage is not changing with the
input line. Thereby, it can be easily applied to a wide input line application. The averaged input
current with the optimized boundary voltage is displayed in Fig. 7. Obviously, the dead angles
are eliminated and an equal value at the transition point is achieved
leading to a smooth transition.

D. The Input Current Harmonics

We apply the Fourier decomposition to the averaged input current. As a result, the input current
odd-order harmonics with the increased turn ratio nversus the IEC 61000-3-2 class D limits are
acquired. These results are displayed in Fig. 8. For the main 3, 5th harmonics, their values
increase with the increase of turn ration n , and it can be figured out that the input current
harmonics under the optimized boundary voltage condition satisfy the IEC 61000-3-2 class D
limits completely with a wide range of turn ratio n. Hence, the proposed bridgeless buck PFC
converter with the optimized boundary voltage can be designed easily for practical applications

E. The Selection of Turn Ratio n

The boundary voltage V b should satisfy the following condition

Substituting (22) into (23) yields the boundary condition of

selecting turn ratio n221 and 2(1) /nMnn. (24) Its selection boundary between the turn ratio
n and voltage
conversion ratio M is presented in Fig. 9. The optional voltage conversion ratio M increases
with the increased turn ratio n while the voltage conversion ratio M must be less than 2 and the
turn ratio n must be larger than 1. Note that, we can choose a further optimized turn ratio n
according to the Fourier decomposition results shown in Fig. 8
for the purpose of obtaining a good input current harmonics.
F. The Power Factor
Since the input current is in phase with the input voltage, the displacement factor is considered
to be zero. Thus, the power factor can be expressed as

It should be noted that the input current harmonics can be obtained from the Fourier
decomposition to the averaged input
current.
G. The Selection of Auxiliary Power Switches
The voltage stresses of the auxiliary power switches S3 and S4 are

H. The Selection of Capacitors and Inductors Firstly, the output capacitors C1 and C 2 are
assumed equal to each other. Secondly, the output capacitors C1 and C 2 must be large enough
to ensure the output voltage ripple satisfies the output voltage ripple limits. Due to the output
voltage ripple frequency being twice the input frequency fL , the output capacitors can be
obtained by using the given voltage ripples

The inductance of the secondary inductor must satisfy the DCM limits derived in (19) and (20).

Notably, the maximum inductance can be calculated at the condition of the minimum input line

and the maximum output power

The Control Method

The proposed bridgeless buck PFC converter is designed to operate in DCM. Therefore, a
voltage control is qualified and applied in the control method. Here, a new logic circuit is
proposed to make the power switches of the proposed bridgeless buck PFC converter operate in
correct order. The whole proposed control diagram is exhibited in Fig.10. Note that, k1 is the
proportionality factor which is chosen according to the input voltage sensor, k2 is the
proportionality factor which is determined by the output voltage divider and VG1, VG2,
VG3and VG4 are the control signals for the power witches S1, S2, S3and S4 , respectively. The
logic circuit includes four comparators, two subtractors and four AND gates. The operation
order of power switches is that the power switches S 1 and S 2 are driven in complementary
conduction during positive and negative half-line cycles, the power switch S 3 is only driven in
the flyback mode of positive half-line cycles and the power switch S 4 is only driven in the
flyback mode of the negative half-line cycles. As a result, this operating order is beneficial to
IV. EXPERIMENTAL RESULTS
A lab prototype is built to verify the correctness of the proposed bridgeless buck PFC converter.
The key circuit parameters are: Vin =90~270Vrms , V o =130V, f L =50Hz and f S=50kHz.
The device types are presented in Table I. It should be noted that L r is the inductor of the input
LC-filter and C r is its capacitor. In this lab prototype, the PC40 magnetic material and the
magnetic core size of EI40 is used and the turn ratio n of the transformers T1 and T2 is chosen
as 2. The leakage inductance of the transformers is 0.02mH. A hall sensor LV 25-P is used with
the parameter K1 =0.0206, and the boundary voltage Vb is chosen as 87V. The power switches
IPW90R120C3 from Infineon company with Ron =0.12Ω are used. The optical coupler
TLP250H is used to drive the power switches. The IR2110 chip in series with the PWM
generator and the voltage followers using LF356N in series with the AND gates are used to
improve and enhance the control signal. The experimental comparison among the proposed
bridgeless buck PFC converter, the conventional buck PFC converter and the conventional
bridgeless buck PFC converter in [30] are presented. Note that, all the circuit parameters and
component devices in the conventional buck PFC converter and the conventional bridgeless
buck PFC converter are same with the proposed bridgeless buck PFC converter. Fig. 11 presents
the input current waveforms of the conventional buck PFC converter, the conventional
bridgeless buck PFC converter and the proposed bridgeless buck PFC converter. In Fig. 11 (a)-
(b), the dead angles are generated in the conventional buck PFC converter and the conventional
bridgeless buck PFC converter, while the dead angles in the proposed bridgeless buck PFC
converter are eliminated completely shown in Fig. 11 (c). The larger dead angles in the
conventional buck PFC converter deteriorate the power factor seriously. Its power factor is only
0.784, which is much lower than the conventional bridgeless buck PFC converter and the
proposed bridgeless buck PFC converter. It can be found that the power factor in the proposed
bridgeless buck PFC converter is improved obviously due to the eliminated dead angles. Fig. 12
exhibits the key waveforms of the proposed bridgeless buck PFC converter. In Fig. 12 (a), the
experimental waveforms are in agreement with the theoretical results and the inductor current
iLS1validates the DCM operation mode.

Fig. 11. The experimental input current waveforms after the input LC filter at V in =110V rms :
(a) conventional buck PFC conver ter, (b) conventional bridgeless buck PFC converter, (c)
proposed bridgeless buck PFC converter.closed view of the inductor current L S1 is shown in
Fig.12 (b), which gives a clear view on the different operation mode. Fig.12 (c) presents the
transition point of the buck and flyback mode under the switching cycles. Since the voltage
control is applied, it can be figured out that a constant duty cycle D control the inductor current
of the buck and flyback mode. Fig. 13 shows the measured power factor of the conventional
buck PFC converter, the conventional bridgeless buck PFC converter and the proposed
bridgeless buck PFC converter. In Fig. 13 (a), the measured power factor of the proposed
bridgeless buck PFC converter is improved compared to the
conventional buck PFC converter and the conventional bridgeless buck PFC converter under the
same operation parameters, especially at the low line. At the high line, the power factor of the
conventional bridgeless buck PFC converter is close to the proposed bridgeless buck PFC
converter. It is because the dead angles at the high line are short. Notably, the calculated power
factor of the proposed bridgeless buck PFC converter is higher than its measured power factor at

ig. 12. The experimental key waveforms of the proposed bridgeless buck PFC converter at V in
=110V rms (a) the control signal V G1 (blue line 5V/div), the control signal V G3 (green line
10V/div) and the inductor current I L S1 (yellow line 2A/div); (b) the closed view of inductor
current I L S1 (2A/div), and (c) the control signal (green line 10V/div) and the inductor current
I L S1 (yellow line 2A/div) under switching cycles. high line. The reason is that the calculated
input current is ideal, but the experimental input current at high line has the distortion which has
been validated and explained in [29],[30],[35]. In Fig. 13 (b), the measured power factor of the
proposed bridgeless buck PFC converter at the light load and the full load are presented. A high
power factor at the low line is achieved and the power factor at the full load is higher than the
light load. Fig. 14 presents the measured efficiency of the conventional buck PFC converter, the
conventional bridgeless buck PFC converter and the proposed bridgeless buck PFC converter. In
Fig. 14 (a), the measured efficiency of conventional bridgeless buck PFC converter is highest
while the efficiency of proposed bridgeless buck PFC converter is higher than the conventional
buck PFC converter. In Fig. 14 (b), the measured efficiency of the proposed bridgeless buck
PFC converter at the full load is higher than the light load.

Fig. 13. The power factor versus the input voltage being 90~270V rms : (a) under P o =50W, the
power factor of the proposed bridgeless buck PFC converter from theoretical calculations and
the power factor of the proposed bridgeless buck PFC converter, the conventional buck PFC
converter and the conventional bridgeless buck PFC converter from the experiments, (b) the
power factor of the proposed bridgeless buck PFC converter at light load P o=35W and the full
load P o =100W from the experiments. Fig. 15 presents the measured input current harmonics
versus the IEC 61000-3-2 class D limits. In Fig.15 (a), the input current harmonics of the
proposed bridgeless buck PFC converter are improved and satisfy the international harmonic
limits completely. In Fig. 15 (b), it can be figured out that the input current harmonics of the
proposed bridgeless buck PFC converter satisfy the IEC 61000-3-2 class D limits at the light
load and full load

3. MATLAB

3.1 Introduction:

Matlab is a high-performance language for technical computing. It integrates

computation, visualization, and programming in an easy-to-use environment where problems

and solutions are expressed in familiar mathematical notation. Typical uses include Math and

computation Algorithm development Data acquisition Modeling, simulation, and prototyping

Data analysis, exploration, and visualization Scientific and engineering graphics Application

development, including graphical user interface building. Matlab is an interactive system

whose basic data element is an array that does not require dimensioning. This allows you to

solve many technical computing problems, especially those with matrix and vector

formulations, in a fraction of the time it would take to write a program in a scalar no

interactive language such as C or Fortran.

The name matlab stands for matrix laboratory. Matlab was originally written to

provide easy access to matrix software developed by the linpack and eispack projects. Today,

matlab engines incorporate the lapack and blas libraries, embedding the state of the art in

software for matrix computation. Matlab has evolved over a period of years with input from

many users. In university environments, it is the standard instructional tool for introductory

and advanced courses in mathematics, engineering, and science.

In industry, matlab is the tool of choice for high-productivity research, development,

and analysis. Matlab features a family of add-on application-specific solutions called

toolboxes. Very important to most users of matlab, toolboxes allow you to learn and apply

specialized technology. Toolboxes are comprehensive collections of matlab functions (M-

files) that extend the matlab environment to solve particular classes of problems. Areas in

which toolboxes are available include signal processing, control systems, neural networks,

fuzzy logic, wavelets, simulation, and many others.

The matlab system consists of five main parts: Development Environment. This is

the set of tools and facilities that help you use matlab functions and files. Many of these tools

are graphical user interfaces. It includes the matlab desktop and Command Window, a

command history, an editor and debugger, and browsers for viewing help, the workspace,

files, and the search path.

The matlab Mathematical Function Library. This is a vast collection of computational

algorithms ranging from elementary functions, like sum, sine, cosine, and complex

arithmetic, to

more sophisticated functions like matrix inverse, matrix Eigen values, Bessel functions, and

fast Fourier transforms.

The matlab Language. This is a high-level matrix/array language with control flow

statements, functions, data structures, input/output, and object-oriented programming

features. It allows both "programming in the small" to rapidly create quick and dirty throw-

away programs, and "programming in the large" to create large and complex application

programs.

Matlab has extensive facilities for displaying vectors and matrices as graphs, as well

as annotating and printing these graphs. It includes high-level functions for two-dimensional

and three-dimensional data visualization, image processing, animation, and presentation

graphics. It also includes low-level functions that allow you to fully customize the
appearance of graphics as well as to build complete graphical user interfaces on your matlab

applications.

The matlab Application Program Interface (API). This is a library that allows you to

write C and Fortran programs that interact with matlab. It includes facilities for calling

routines from matlab (dynamic linking), calling matlab as a computational engine, and for

reading and writing MAT-files.

3.2 SIMULINK:

Simulink is a software add-on to matlab which is a mathematical tool developed by

The Math works,(http://www.mathworks.com) a company based in Natick. Matlab is

powered by extensive numerical analysis capability. Simulink is a tool used to visually

program a dynamic system (those governed by Differential equations) and look at results.

Any logic circuit, or control system for a dynamic system can be built by using standard

building blocks available in Simulink Libraries. Various toolboxes for different techniques,

such as Fuzzy Logic, Neural Networks, dsp, Statistics etc. are available with Simulink, which

enhance the processing power of the tool. The main advantage is the availability of templates

/ building blocks, which avoid the necessity of typing code for small mathematical processes.

3.3 Concept of signal and logic flow:

In Simulink, data/information from various blocks are sent to another block by lines

connecting the relevant blocks. Signals can be generated and fed into blocks dynamic /

static).Data can be fed into functions. Data can then be dumped into sinks, which could be

scopes, displays or could be saved to a file. Data can be connected from one block to another,

can be branched, multiplexed etc. In simulation, data is processed and transferred only at

discrete times, since all computers are discrete systems. Thus, a simulation time step
 (otherwise called an integration time step) is essential, and the selection of that step is

determined by the fastest dynamics in the simulated system.

Fig 3.1: Simulink library browser

3.4 Connecting blocks:

To connect blocks, left-click and drag the mouse from the output of one block to the

input of another block.

Fig 3.2: Connectung blocks

3.5 Sources and sinks:

The sources library contains the sources of data/signals that one would use in a

dynamic system simulation. One may want to use a constant input, a sinusoidal wave, a step,

a repeating sequence such as a pulse train, a ramp etc. One may want to test disturbance

effects, and can use the random signal generator to simulate noise. The clock may be used to

create a time index for plotting purposes. The ground could be used to connect to any unused

port, to avoid warning messages indicating unconnected ports.

The sinks are blocks where signals are terminated or ultimately used. In most cases,

we would want to store the resulting data in a file, or a matrix of variables. The data could be

displayed or even stored to a file. The stop block could be used to stop the simulation if the

input to that block (the signal being sunk) is non-zero. Figure 3 shows the available blocks in

the sources and sinks libraries. Unused signals must be terminated, to prevent warnings about
unconnected signals.

Fig 3.3:Sources and sinks

3.6 Continuous and discrete systems:

All dynamic systems can be analyzed as continuous or discrete time systems.

Simulink allows you to represent these systems using transfer functions, integration blocks,

delay blocks etc.

fig 3.4:continous and descrete systems

3.7 Non-linear operators:

A main advantage of using tools such as Simulink is the ability to simulate non-linear

systems and arrive at results without having to solve analytically. It is very difficult to arrive

at an analytical solution for a system having non-linearties such as saturation, signup

function, limited slew rates etc.

In Simulation, since systems are analyzed using iterations, non-linearities are not a

hindrance. One such could be a saturation block, to indicate a physical limitation on a

parameter, such as a voltage signal to a motor etc. Manual switches are useful when trying

simulations with different cases. Switches are the logical equivalent of if-then statements in

programming.

fig 3.5: simulink blocks

3.8 Mathematical operations:

Mathematical operators such as products, sum, logical operations such as and, or, etc.

can be programmed along with the signal flow. Matrix multiplication becomes easy with the
matrix gain block. Trigonometric functions such as sin or tan inverse (at an) are also

available. Relational operators such as ‘equal to’, ‘greater than’ etc. can also be used in logic

circuits.

Fig 3.6: Simulink math blocks

 Fig 3.7: signals and systems

3.9 SIGNALS & DATA TRANSFER:

In complicated block diagrams, there may arise the need to transfer data from one

portion to another portion of the block. They may be in different subsystems. That signal

could be dumped into a goto block, which is used to send signals from one subsystem to

another.

Multiplexing helps us remove clutter due to excessive connectors, and makes matrix

(column/row) visualization easier.

3.10 Making subsystems:

Drag a subsystem from the Simulink Library Browser and place it in the parent block

where you would like to hide the code. The type of subsystem depends on the purpose of the

block. In general one will use the standard subsystem but other subsystems can be chosen.

For instance, the subsystem can be a triggered block, which is enabled only when a trigger
signal is received.

Open (double click) the subsystem and create input / output PORTS, which transfer

signals into and out of the subsystem. The input and output ports are created by dragging

them from the Sources and Sinks directories respectively. When ports are created in the

subsystem, they automatically create ports on the external (parent) block. This allows for

connecting the appropriate signals from the parent block to the subsystem.

3.11 Setting simulation parameters:

Running a simulation in the computer always requires a numerical technique to solve

a differential equation. The system can be simulated as a continuous system or a discrete

system based on the blocks inside. The simulation start and stop time can be specified. In

case of variable step size, the smallest and largest step size can be specified. A Fixed step size

is recommended and it allows for indexing time to a precise number of points, thus

controlling the size of the data vector. Simulation step size must be decided based on the

dynamics of the system. A thermal process may warrant a step size of a few seconds, but a

DC motor in the system may be quite fast and may require a step size of a few milliseconds.
Fig 3.8: simulation parameters
CIRCUIT DIAGRAM:

INPUT AC VOLTAGE AND CURRENT(POWER FACTOR)

G1,G3,ILS1

OUTPUT VOLTAGE:
OUTPUT CURRENT:

POWER FACTOR:
V. CONCLUSION
A new bridgeless buck PFC converter with eliminated dead angles by using auxiliary flyback
circuit is proposed, analyzed and validated in this paper. Due to the no-dead-angle input current,
the power factor and input current harmonics are improved significantly. A simple controller
and nature input current-shaping ability are achieved in DCM. The experimental results verify
the theoretical derivation and show that the proposed bridgeless buck PFC converter has a
higher power factor compared to the conventional buck PFC converter and the conventional
bridgeless buck PFC converter, and its input current harmonics are improved and satisfy the
IEC61000-3-2 class D limits completely
Fig. 14. The experimental efficiency versus the input voltage being 90~270V rms : (a) the
efficiency of the proposed bridgeless buck PFC converter, the conventional buck PFC converter
and the conventional bridgeless buck PFC converter at P o =50W, (b) the efficiency of the
proposed bridgeless buck PFC converter at light load Po =35W and the full load P o =100W.
APPENDIX EXTENDED NEW BRIDGELESS BUCK PFC CONVERTERS WITH NO DEAD ANGLES

Four extended new bridgeless buck PFC converters shown in Fig. 16 are proposed. These
proposed extended bridgeless buck PFC converters are the variation of the converter shown in
Fig. 2 in this paper, and they are named Type I-IV, respectively. The main difference in these
proposed extended new bridgeless buck PFC converters is the number of magnetic component.
Type I uses one magnetic component with three windings. Type II uses one magnetic
component with four windings. Type III and IV utilize two magnetic components and each
magnetic component owns two windings. The less number of magnetic components is beneficial
to the power density and cost. However, a magnetic core with enough big window area should
be needed. The magnetic component in Type I locates between the input and output terminals,
which increases the common mode noise. Type III utilizes a bidirectional power switch which
is beneficial to the drive circuit because of a common source terminal. Since their stage I
operation principles in the buck mode and flyback mode of these proposed extended bridgeless
buck PFC converters are same to the proposed PFC converter shown in Fig. 2, their averaged.

ig. 15. The experimental input current harmonics at Vin =110V rms : (a) the harmonics of the
proposed bridgeless buck PFC converter and the conventional bridgeless buck PFC converter at
P o =50W, (b) the harmonics of the proposed bridgeless buck PFC converter at light load P o
=35W and the full load P o =100W. input currents are same under the same circuit parameters.
According to the power balance between the averaged input power and output power, we can
derive that the key relationship between the voltage conversion ratio Mand duty cycle D of these
extended bridgeless buck PFC converters is same to the proposed PFC converter in Fig. 2 in
DCM operation condition. This relationship has been derived as (9) in section III. It should be
noted that the designed logic control circuit is also suitable for these extended new bridgeless
buck PFC converters. A comprehensive comparison among the five bridgeless

Fig. 16. The extended proposed bridgeless buck PFC converters with no dead angles: (a) Type I,
(b) Type II, (c) Type III, (d) Type IV. buck PFC converters is presented in Table II. From this
table,one can see that all these five bridgeless buck PFC converters can eliminate the dead
angles in the input current. Also, they have the same transition boundary and the same logic
circuit. The voltage stresses of the power switch S1in the main buck mode and the power switch
S3in the auxiliary flyback mode are derived. Clearly, the type I, type II and the proposed
bridgeless buck PFC converter have the same voltage stress of the power switch S1 and the
same voltage stress of the power switch S 3 . The type III has a lower voltage stress of the power
switch S3 in flyback mode. The type IV has a higher voltage stress of the power switch S 1 and
S 3 . The lower voltage stress will be beneficial to decrease the cost of the power switches.

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