7th Power Electronics, Drive Systems & Technologies Conference (PEDSTC 2016)

16-18 Feb. 2016, Iran University of Science and Technology, Tehran, Iran

Ultra Step-Up DC-DC Converter Based On Three

Windings Coupled Inductor

S.M. Salehi, S.M. Dehghan, S. Hasanzadeh

Faculty of Electrical and Computer engineering
Qom University of Technology, Qom, Iran
dehghan@qut.ac.ir

Abstract—In this paper, an ultra-step-up DC-DC converter
using a three-winding coupled inductor and a voltage multiplier
cell are proposed to achieve high step-up voltage. The important
advantages of the proposed converter are as: Only one active
switch is required without extreme duty cycle that high voltage is
attained, The voltage stress on the active switch and diodes are
reduced by increasing the turns ratio of the secondary windings
of the coupled inductor, and the energy of the leakage inductance
of the coupled inductor is recycled by switched capacitor and
directly transfers to the load. The operation principle and steady
state analysis of continuous conduction mode are used to
determine voltage gain and switch voltage stress. Also the
extension of the proposed converter to attain more step-up
voltage gain are presented. The simulation results are used to
verify the performance and validity.
Keywords—DC-DC boost converter; ultra step-up; coupled
inductor; three windings
I. INTRODUCTION
Recently, because of global warming, environmental
contamination and the shortage of resources such as oil, coal
and natural gas which do not seem to suffice according to the
growing of the global energy demand. So more and more
researches focus on exploring renewable energy sources, such
as the photovoltaic (PV) sources, the wind energy, the fuel
cells (FC) and etc. These energy systems are sources low
voltage, so DC-DC converters with steep voltage ratio are
usually used to boost voltage to generate AC utility voltage
[1]-[3]. The conventional boost converters cannot provide a
high voltage gain, even using an extreme duty cycle. Also the
voltage stress of the switches in these converters is equal to
the output voltage. Thus high rating switches should be
selected. In recent years many topologies have been proposed
to achieve high steep voltage ratio. Recent researches on
converters for high voltage gain systems have included the
switched-inductor and switched-capacitor type [4]-[7], and the
voltage-lift type [8],[9]. Some converters, that are the
combination of conventional boost converter and any other
type of converters [10]-[14], are developed to achieve a high
step-up voltage ratio. Also many converters use the coupled-
inductor technique for a considerably high voltage gain and
reduce the serious reverse-recovery problem [15],[16].
Meanwhile, the influence of the leakage energy of the coupled
inductor will cause the high voltage spike on active switches
when the switches are turned off. A small resistor and
capacitor of the snubber can be used to dissipate this leakage
energy and suppress the voltage spike. In this way, the power
conversion will be decreased [16]. As an alternative solution,
using an active clamp technique for recycling the leakage
energy can achieve high efficiency [17]. This technique
increases the complexity of control and the part count of
circuit. Thus the power conversion efficiency and voltage gain
are restrained by the parasitic effect of the components. The
charging current of switched-capacitor reduces the inrush
current of the switching-capacitor using leakage inductance of
the coupled inductor, and the leakage inductor energy is
recycled and directly output to the load which increases the
power conversion efficiency [18].
The voltage multiplier cell (VMC) techniques can extend
the voltage conversion ratio. A high step-up converter with a
three-winding high-frequency coupled inductor and VMC
with recycling the leakage inductor energy have been
proposed in [19]-[22]. These converters have high step-up
voltage gain and because of leakage inductor energy recycling,
suitable rating switches can be selected. Thus the efficiency is
increased.
In this paper, a new dc-dc converter with an ultra step-up
voltage gain conversion and low semiconductor voltage stress
is proposed using a switched-coupled-inductor and a voltage
multiplier. Also using a hybrid switched-capacitor technique
for providing a higher step-up voltage gain is presented. The
circuit configuration of the proposed converter is shown in
Fig. 1. The reminder of this paper is organized as follows.
Section II presents operating principles of the proposed
converter. Section III described the steady state analysis,
calculating voltage gain and voltage stresses on switches. The
extension of the proposed converter to attain more step-up
voltage gain is presented in section IV.
Fig. 1. Circuit configuration of the porposed converter

978-1-5090-0375-4/16/$31.00 ©2016 IEEE 171

 II. OPERATING PRINCIPLE OF THE PORPOSED Mode 3 ሾ‫ݐ‬ଶ െ ‫ݐ‬ଷ ሿ: Active switch S and diodes ‫ܦ‬ଵ ǡ ‫ܦ‬ଶ and ‫ܦ‬ସ
CONVERTER are turned off, but diodes ‫ܦ‬ଶ and ‫ܦ‬ହ are conducted. During
The operation principles for the continuous conduction this mode, energy is being released through the series-
mode (CCM) are explained in this section. It is assumed that connected path including clamp capacitor ‫ܥ‬ଶ , blocking
all devices are ideal, the converter is at steady state and capacitors ‫ܥ‬ଷ and ‫ܥ‬ସ , secondary winding ܰଷ and diode ‫ܦ‬ହ to
inductor and capacitors are very large enough so that inductor charge capacitor ‫ܥ‬ை and load ܴ. The energy of secondary
current and capacitor voltages are constant during one winding ܰଷ is coupled from magnetizing inductor ‫ܮ‬௠ at the
switching cycle and the magnetizing inductance considered at primary side of the coupled inductor. This operating mode
primary side of coupled inductor. The converter consist of a ends when ‫ܫ‬௅௠ reaches to ሺͳΤܰଷଵ ሻ‫ܫ‬ଷ . The current-flow path
DC input voltage ܸ௜௡ , a active switch S, a coupled inductor, of this interval is illustrated in Fig. 3(c).
five capacitors and five diodes. The coupled inductor can be
modeled by an ideal transformer with primary winding, two
secondary windings and a magnetizing inductance ‫ܮ‬௠ . Ԣ • Ԣ
notates for the windings of coupled inductor. The primary of
coupled inductor has ܰଵ turns, its secondary windings have
ܰଶ and ܰଷ turns. Turns ratio ܰଶଵ and ܰଷଵ of the coupled
inductor are equal to ܰଶଵ ൌ ܰଶ Τܰଵ and ܰଷଵ ൌ ܰଷ Τܰଵ ,
respectively. The converter is divided to two stages. The first
stage of the converter is shown in Fig.1 included of two diodes
‫ܦ‬ଵ and ‫ܦ‬ଶ , switched capacitor ‫ܥ‬ଵ , clamp capacitor ‫ܥ‬ଶ and
coupled inductor. The second stage of the converter uses a
VMC; the VMC is made of two blocking capacitors ሺ‫ܥ‬ଷ ǡ ‫ܥ‬ସ ሻ
and two regenerative diodes ሺ‫ܦ‬ଷ ǡ ‫ܦ‬ସ ሻ. ‫ܦ‬ହ is output diode and
‫ܥ‬ை is the output capacitor.
The coupled inductor plays the role of energy storage and a
transfer device. The magnetizing inductor ‫ܮ‬௠ of the coupled
inductor is equivalent to the input inductor of a conventional
boost converter. Switching capacitor ‫ܥ‬ଵ obtains energy from
input source ܸ௜௡ and secondary winding ܰଶ and then releases it
to clamp capacitor ‫ܥ‬ଶ and VMC through output rectifier diode
‫ܦ‬ଶ . The typical waveforms of several keys components in the
CCM operation are shown in Fig. 2. Circuit topology in each
interval and the current paths are illustrated Fig. 3.
The four steady operating states are described as follows:
Mode 1 ሾ‫ݐ‬଴ െ ‫ݐ‬ଵ ሿ: At ‫ ݐ‬ൌ ‫ݐ‬଴ the active switch S is turned on.
In this time interval, the diodes ‫ܦ‬ଵ ǡ ‫ܦ‬ଶ and ‫ܦ‬ହ are in turn-off
state and the diodes ‫ܦ‬ଷ and ‫ܦ‬ସ are in turn-on state. During this
mode the energy is being stored in magnetizing inductor
‫ܮ‬௠ from the DC input voltage and energy stored in coupled
inductor by secondary winding ܰଷ is released into the
capacitors ‫ܥ‬ଷ and ‫ܥ‬ସ . The current path shown in Fig. 3(a). This
operating mode ends when ‫ܫ‬௅௠ reaches to source current.
Mode 2 ሾ‫ݐ‬ଵ െ ‫ݐ‬ଶ ሿ: At ‫ ݐ‬ൌ ‫ݐ‬ଵ , diode ‫ܦ‬ଵ is being conducted. The
diodes ‫ܦ‬ଶ and ‫ܦ‬ହ are in off state. The diodes ‫ܦ‬ଷ and ‫ܦ‬ସ are
conducted and capacitors ‫ܥ‬ଷ and ‫ܥ‬ସ are continually charging
in the same manner. The energy stored in ‫ܮ‬௠ from the DC
input voltage is continually charging in the same manner, too.
During this mode, switched capacitor ‫ܥ‬ଵ receives energy from
the input source and secondary winding ܰଶ . The charging
current from input source ܸ௜௡ flows to switched capacitor ‫ܥ‬ଵ
through diode ‫ܦ‬ଵ in series with the secondary winding ܰଶ of
coupled inductor. This operating mode ends when active
switch S is turned off at ‫ ݐ‬ൌ ‫ݐ‬ଶ . Fig. 3(b) shows the current
flow path of this mode operation.

Fig. 2. Characteristic waveform of the porposed converter

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Fig. 3. Operating modes of the porposed converter. (a) Mo1de 1. (b) Mode 2. (c) Mode 3. (d) Mode 4.

Mode 4 ሾ‫ݐ‬ଷ െ ‫ݐ‬ସ ሿ: At ‫ ݐ‬ൌ ‫ݐ‬ଷ the current through switched ܸ஼ଷ ൌ ܸ஼ସ ൌ ܰଷଵ ܸ௜௡ ሺ͸ሻ
capacitor ‫ܥ‬ଵ reverses its direction. The coupled inductor, DC
input power source and capacitors ‫ܥ‬ଵ ǡ ‫ܥ‬ଷ and ‫ܥ‬ସ are in series Using volt-second balance for primary winding ܰଵ of the
to transfer the energy to the output capacitor ‫ܥ‬ை and load. Also coupled inductor yields
the energy of clamp capacitor ‫ܥ‬ଶ released. This operating
mode ends when active switch is turned on at ‫ ݐ‬ൌ ‫ݐ‬ସ and ௗ் ௗ ᇲ ்ೄ
൏ ܸேଵ ൐ ்ೄ ൌ ݀ܶௌ ܰேଵ ೄ ൅ ݀ ᇱ ܶௌ ܸேଵ ൌͲ (7)
beginning of the next switching period. The circuit topology
and path of current are shown in Fig. 3(d). ௗ
ܸேଵ ൌ ܸ (8)
ଵିௗ ௜௡
III. STEADY STATE ANALYSIS OF THE PORPOSED CONVERTER
The steady state only takes the CCM operating into where ‫ܸۃ‬ேଵ ‫் ۄ‬ೄ denotes the average value of the primary
consideration, and for the simplicity of the analysis, leakage winding voltage and ݀ ᇱ denotes the ሺͳ െ ݀ሻ in one cycle
inductances of coupled inductor at the primary and secondary period.
sides are neglected. When the active switch S is turned off, using KVL in Fig. 2(c)
and Fig. 2(d) one can derive the voltage across clamp
A. Step-Up Gain
capacitor ‫ܥ‬ଶ and output capacitor ‫ܥ‬ை as
When the active switch S is turned on, the voltage across the
magnetizing inductor ‫ܮ‬௠ can be denoted via (1) as ܸ஼ଶ ൌ ܸ௜௡ ൅ ܸேଵ ൅ ܰ஼ଵ ൅ ܰଶଵ ܸேଵ (9)

ܸேଵ ൌ ܸ௜௡ (1) ܸை ൌ ܸ஼ଶ ൅ ܸ஼ଷ ൅ ܰଷଵ ܸேଵ ൅ ܸ஼ସ (10)

Moreover, the voltage across the secondary windings of Substituting ܸ஼ଵ and ܸேଵ from (5) and (8) into (9) yields the
coupled inductor ܸேଶ and ܸேଷ are ܰଶଵ and ܰଷଵ times of ܸ௅௠ , voltage clamp capacitor ‫ܥ‬ଶ as
respectively. It can be represented via (2) and (3) as
ଶାேమభ ିௗ
ܸ஼ଶ ൌ ܸ௜௡ (11)
ܸேଶ ൌ ܰଶଵ ܸேଵ (2) ଵିௗ

ܸேଷ ൌ ܰଷଵ ܸேଷ (3) From (2)-(11), the voltage gain of the proposed converter in
CCM operation is obtained as follows
Because the series voltages of ܸ௅௠ and ܸேଶ charge switched ௏ೀ ଶାேమభ ାଶேయభ ିௗேయభ ିௗ
capacitor ‫ܥ‬ଵ , the voltage across ‫ܥ‬ଵ can be described via (4) as ‫ܯ‬஼஼ெ ൌ ൌ (12)
௏೔೙ ଵିௗ

ܸ஼ଵ ൌ ܰଶଵ ܸ௜௡ ൅ ܸ௜௡ (5) The voltage transfer gain curve of the proposed converter by
substituting ܰଶଵ ൌ ܰଷଵ ൌ ʹ െ ͷ into (12) is depict in Fig. 4.
Also, the secondary winding ܰଷ is parallel with blocking Moreover Fig. 5 gives a comparison between voltage gains of
capacitors ‫ܥ‬ଷ and ‫ܥ‬ସ , i.e. the proposed converter and three other converters presented in
[18],[21] and [22].

173
 When the active switch S is turn-off, the diodes ‫ܦ‬ଷ and ‫ܦ‬ସ are
reverse biased. Therefore, the voltage stresses of diodes
‫ܦ‬ଷ and ‫ܦ‬ସ are as follows
ேయభ
ܸ஽ଷ ൌ ܸ஽ସ ൌ ܸ஽ହ ൌ ܸ (15)
ଶାேమభ ାଶேయభ ିௗேయభ ିௗ ை

Equations (13)-(15) can be illustrated to determine the

maximum voltage stress on each device. The voltage stress on
each switch is shown in Fig. 6.

Fig. 4. Voltage gain of the porposed converter

Fig. 6. Voltage stresses on avtive switch and diodes

Fig. 5. Voltage gain of the porposed converter and other converters [18], [21]
and [22] IV. EXTENSION OF THE PROPOSED CONVERTER
In this section an extension of the proposed converter using a
B. Voltage Stress Analysis
multiwindings coupled inductor, with each secondary winding
The voltage stress of the active switch is given by inserted into a switched capacitor voltage multiplier circuit is
added to the proposed converter, as shown in fig. 7. The
ଵ
ܸௌ ൌ ܸ (13) output voltage of extension of this generalized extension
ଶାேమభ ାଶேయభ ିௗேయభ ିௗ ை
topology is presented in (16)
It can be concluded that seen that voltage stress of the active
ሺଶାேమభ ିௗሻାσ಼
೔సభ ேయష೔ ሺଶିௗሻ
switch is determined by the turns ratio of the built-in ܸை ൌ ܸ௜௡ (16)
ଵିௗ
transformer, duty cycle and the output voltage. As the turns
ratio increases, the switch voltage stress decreases, which Also, the voltage gain is obtained as (17), where K is the
makes the low-voltage rated active switch with low resistance number of secondary windings ܰଷ of the coupled inductor,
available to reduce the conduction losses. and each secondary winding ܰଷ of the coupled inductor has a
The voltage stress of diodes ‫ܦ‬ଵ and ‫ܦ‬ଶ are as follows similar turn ratio.
ேమభ ାଵ
ܸ஽ଵ ൌ ܸ஽ଶ ൌ ܸ (14) ܸை ൌ
ሺଶାேమభ ିௗሻା௄ேయభ ሺଶିௗሻ
ܸ௜௡
ଶାேమభ ାଶேయభ ିௗேయభ ିௗ ை (17)
ଵିௗ

Fig. 7. Extension of the proposed converter using multiwinding coupled inductor and switched capacitor

174
 30
V. SIMULATION RESULTS
25

In this section, the performance and validity of the proposed 20

converter is verified by simulations. The specification of the 15

10
proposed converter is shown in Table I. considering (11) and 5
(12), the output voltage ܸை and clamp capacitor voltage ܸ஼ଶ 0
0.0249 0.0249 0.0249 0.025 0.025 0.025 0.025
should be 85V and 155V, respectively. Simulation results are Fig. 10. The voltage across active switch, ܸ௦ 
shown in Fig. 8 verify these values.
Fig. 9 shows the maximum reverse voltages across the diodes
as ܸ஽ଵ ൌ ܸ஽ଶ ൌ ͹ͷ and ܸ஽ଷ ൌ ܸ஽ସ ൌ ܸ஽ହ ൌ ͷͲ which are
equal to their expected values from (14) and (15). In regard to
(13) the voltage across active switch should be 25V that it can
be seen in Fig. 10. Current of magnetizing inductance of the
coupled inductor is shown in Fig. 11. According to Fig. 11,
operating mode of the converter should be CCM mode.

Fig. 11. The current of magnetizing inductor, ‫ܫ‬௅௠ 

TABLE I. SPECIFICATION OF THE PROPOSED CONVERTER
VI. CONCLUSION
Input voltage, ܸ௜௡ 10 V
Output voltage, ܸை 155 V This paper has developed an ultra step-up converter based on
Rated output power, ܲை 240 W three windings coupled inductor and VMC. Principles and
Switching frequency, ݂௦ 50 KHz steady state analysis of the proposed converter in CCM are
Load, R ͳͲͲȳ presented in order to calculate voltage gain and switches
Duty cycle, d 0.6 stress. The voltage gain of the proposed converter is compared
Coupled inductor turns ratio 1:2:2 with other similar converters. The voltage gain is increased
Magnetizing inductor, ‫ܮ‬௠ ʹ͵ߤ‫ܪ‬
without using an extreme duty cycle. The voltage across active
switch and diodes are decreased by turns ratio of coupled
‫ܥ‬ଵ ǡ ‫ܥ‬ଷ ǡ ‫ܥ‬ସ Ͷͺߤ‫ܨ‬ inductor increase, thus lower rating switches can be selected.
‫ܥ‬ଶ ͵Ͳߤ‫ܨ‬ Recycling the energy of the leakage inductance of the coupled
inductor and passing it directly to the load, causes voltage gain
‫ܥ‬ை ʹͲߤ‫ܨ‬
increase. Extended proposed converter and its analysis are also
mentioned. Computer simulation results validate the
theoretical analysis of the proposed converter.

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