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HCPL06XX — High Speed-10 MBit/s Logic Gate Optocouplers
August 2013
Package Dimensions
0.164 (4.16)
0.144 (3.66)
SEATING PLANE
Pin 1
0.202 (5.13)
0.182 (4.63)
0.019 (0.48)
0.244 (6.19)
0.008 (0.20)
0.224 (5.69)
0.021 (0.53) 0.003 (0.08)
0.011 (0.28) 0.050 (1.27)
TYP
V
F1
+ 2 7 VE _ 2 7 V01
V
F
_ _
3 6 VO 3 6 V02
VF2
*Dual channel devices or single channel devices with pin 7 not connected.
A 0.1µF bypass capacitor must be connected between pins 8 and 5. (See note 1)
*6.3mA is a guard banded value which allows for at least 20% CTR degradation. Initial input current threshold value is
5.0mA or less
Switching Characteristics (TA = -40°C to +85°C, VCC = 5 V, IF = 7.5 mA unless otherwise specified.)
Symbol AC Characteristics Test Conditions Device Min. Typ. Max. Unit
TPLH Propagation Delay Time RL = 350Ω, CL = 15pF(3) TA = 25°C All 20 75 ns
to Output High Level (Fig. 20) 100
TPHL Propagation Delay Time RL = 350Ω, CL = 15pF(4) TA = 25°C All 25 75 ns
to Output Low Level (Fig. 20) 100
|TPHL-TPLH| Pulse Width Distortion RL = 350Ω, CL = 15pF (Fig. 20) All 35 ns
tr Output Rise Time (10-90%) RL = 350Ω, CL = 15pF(5) (Fig. 20) Single Ch 50 ns
Dual Ch 17
tf Output Fall Time (90-10%) RL = 350Ω, CL = 15pF(6) (Fig. 20) Single Ch 12 ns
Dual Ch 5
tELH Enable Propagation Delay IF = 7.5mA, VEH = 3.5V, RL = 350Ω, HCPL0600 20 ns
Time to Output High Level CL = 15pF(7) (Fig. 21) HCPL0601
HCPL0611
tEHL Enable Propagation Delay IF = 7.5mA, VEH = 3.5V, RL = 350Ω, HCPL0600 20 ns
Time to Output Low Level CL = 15 pF(8) (Fig. 21) HCPL0601
HCPL0611
|CMH| Common Mode RL = 350Ω, TA =25°C, |VCM| = 10V HCPL0600 5,000 V/µs
Transient Immunity IF = 0mA, HCPL0637
(at Output High Level) VOH (Min.) = 2.0 V(9) |VCM| = 50V HCPL0601 10,000
(Fig. 22, 23) HCPL0638
|VCM| = 1,000V HCPL0611 15,000
HCPL0639 25,000
|CML| Common Mode RL = 350Ω, TA =25°C, |VCM| = 10V HCPL0600 5,000 V/µs
Transient Immunity IF = 7.5mA, HCPL0637
(at Output Low Level) VOL (Max.) = 0.8 V(10)
|VCM| = 50V HCPL0601 10,000
(Fig. 22, 23) HCPL0638
|VCM| = 1,000V HCPL0611 15,000
HCPL0639 25,000
Notes:
1. The VCC supply to each optoisolator must be bypassed by a 0.1µF capacitor or larger. This can be either a ceramic
or solid tantalum capacitor with good high frequency characteristic and should be connected as close as possible
to the package VCC and GND pins of each device.
2. Enable Input – No pull up resistor required as the device has an internal pull up resistor.
3. tPLH – Propagation delay is measured from the 3.75mA level on the HIGH to LOW transition of the input current
pulse to the 1.5V level on the LOW to HIGH transition of the output voltage pulse.
4. tPHL – Propagation delay is measured from the 3.75mA level on the LOW to HIGH transition of the input current
pulse to the 1.5V level on the HIGH to LOW transition of the output voltage pulse.
5. tr – Rise time is measured from the 90% to the 10% levels on the LOW to HIGH transition of the output pulse.
6. tf – Fall time is measured from the 10% to the 90% levels on the HIGH to LOW transition of the output pulse.
7. tELH – Enable input propagation delay is measured from the 1.5V level on the HIGH to LOW transition of the input
voltage pulse to the 1.5V level on the LOW to HIGH transition of the output voltage pulse.
8. tEHL – Enable input propagation delay is measured from the 1.5V level on the LOW to HIGH transition of the input
voltage pulse to the 1.5V level on the HIGH to LOW transition of the output voltage pulse.
9. CMH – The maximum tolerable rate of rise of the common mode voltage to ensure the output will remain in the high
state (i.e., VOUT > 2.0V). Measured in volts per microsecond (V/µs).
10. CML – The maximum tolerable rate of fall of the common mode voltage to ensure the output will remain in the low
output state (i.e., VOUT < 0.8V). Measured in volts per microsecond (V/µs).
11. Device considered a two-terminal device: Pins 1, 2, 3 and 4 shorted together, and Pins 5, 6, 7 and 8 shorted
together.
Fig. 1 Forward Current vs. Input Forward Voltage Fig. 2 Output Voltage vs. Forward Current
100 6
TA = 25°C
VCC = 5V
5
IF – FORWARD CURRENT (mA)
10
0.01
1
0.001 0
0.9 1.0 1.1 1.2 1.3 1.4 1.5 1.6 1.7 0 1 2 3 4 5
Fig. 3 Input Threshold Current vs. Temperature Fig. 4 High Level Output Current vs. Temperature
5 IOH – HIGH LEVEL OUTPUT CURRENT (μA) 16
ITH – INPUT THRESHOLD CURRENT (mA)
VCC = 5V
VO = 0.6V 14
4
12
10
3
RL = 350Ω 8
2 6
RL = 1KΩ
4
1
2 VO = VCC = 5.5V
VE = 2V
IF = 250μA
0
0
-40 -20 0 20 40 60 80 100
-40 -20 0 20 40 60 80 100
TA – TEMPERATURE (˚C) TA – TEMPERATURE (˚C)
Fig. 5 Low Level Output Voltage vs. Temperature Fig. 6 Low Level Output Current vs. Temperature
0.8 60
V = 5.5V V = 5V
VE = 2V VE = 2V
0.7 55
IF = 5mA VOL = 0.6V
0.6 50
IF = 10-15mA
0.5 45
IO = 12.8mA
0.4 IO = 16mA 40
IF = 5mA
0.3 35
IO = 6.4mA
0.2 30
IO = 9.6mA
0.1 25
0.0 20
-40 -20 0 20 40 60 80 100 -40 -20 0 20 40 60 80 100
Fig. 7 Propagation Delay vs. Temperature Fig. 8 Propagation Delay vs. Pulse Input Current
100 90
V = 5V V = 5V
CC CC
IF = 7.5mA TA = 25°C
90
80
TP – PROPAGATION DELAY (ns)
TP – PROPAGATION DELAY (ns)
80 tPLH
70
RL = 1kΩ
70 tPLH
RL = 1kΩ 60
tPLH
60
tPLH RL = 350Ω
50
RL = 350Ω
50
tPHL 40
40 tPHL
RL = 350Ω & 1kΩ
RL = 350Ω & 1kΩ
30 30
20 20
-40 -20 0 20 40 60 80 100 5 7 9 11 13 15
Fig. 9 Typical Enable Propagation Delay vs. Temparature Fig. 10 Typical Rise and Fall Time vs. Temperature
90 240
V = 5V V = 5V
CC CC
tE – ENABLE PROPAGATION DELAY (ns)
80 VEH = 3V IF = 7.5mA
VEL = 0V 200
70 IF = 7.5mA
tELH tr
RL = 1kΩ RL = 1kΩ
50
tELH 120
RL = 350Ω
40
30 80
tr
tEHL RL = 350Ω
20 RL = 350Ω & 1kΩ
40
tf
10
RL = 350Ω & 1kΩ
0 0
-40 -20 0 20 40 60 80 100 -40 -20 0 20 40 60 80 100
40
V = 5V
CC
PWD – PULSE WIDTH DISTORTION (ns)
IF = 7.5mA
35
30
25
RL = 1kΩ
20
15
10
RL = 350Ω
5
0
-40 -20 0 20 40 60 80 100
TA – TEMPERATURE (˚C)
10 2.0
TA = 100°C
RL = 350Ω
1 1.5
TA = 85°C TA = -40°C
0.1 1.0
RL = 1kΩ
TA = 0°C
TA = 25°C RL = 4kΩ
0.01 0.5
0.001 0.0
0.8 0.9 1.0 1.1 1.2 1.3 1.4 1.5 1.6 1.7 -40 -20 0 20 40 60 80 100
VF – FORWARD VOLTAGE (V) TA – AMBIENT TEMPERATURE (°C)
Fig. 14 High Level Output Current vs. Fig. 15 Low Level Output Current vs.
Ambient Temperature Ambient Temperature
20 40
VO = VCC = 5.5V IOL – LOW LEVEL OUTPUT CURRENT (mA)
V = 5.5V
IOH – HIGH LEVEL OUTPUT CURRENT (nA)
30
12
25
8
20
4
15
0 10
-40 -20 0 20 40 60 80 100 -40 -20 0 20 40 60 80 100
TA – AMBIENT TEMPERATURE (°C) TA – AMBIENT TEMPERATURE (°C)
Fig. 16 Low Level Output Voltage vs. Fig. 17 Pulse Width Distortion vs.
Ambient Temperature Ambient Temperature
0.6 70
V = 5V
V = 5.5V CC
PWD – PULSE WIDTH DISTORTION (ns)
VOL – LOW LEVEL OUTPUT VOLTAGE (V)
CC
IF = 7.5mA
VE = 2V (Single Channel Only) 60
0.5
IF = 5mA
50 RL = 4kΩ
0.4
IO = 12.8mA IO = 16mA
40
0.3
30
0.2
IO = 6.4mA IO = 9.6mA 20
RL = 1kΩ
0.1 RL = 350Ω
10
0.0 0
-40 -20 0 20 40 60 80 100 -40 -20 0 20 40 60 80 100
tr – RL = 4kΩ
250 5
0 0 0
-40 -20 0 20 40 60 80 100 -40 -20 0 20 40 60 80 100
tf tr
Fig. 20 Test Circuit and Waveforms for tPLH, tPHL, tr and tf.
Pulse
Generator Input
tr = 5ns Monitor
Z O = 50Ω (V E)
+5V
3.0 V
VCC Input
(VE ) 1.5 V
1 8
t EHL t ELH
7.5 mA
Output
2 7 .1μf
RL
(VO )
bypass 1.5 V
Output
3 6 (VO )
CL
4 5
GND
IF
A 2 7 0.1μf 350Ω
bypass
B
Output
VFF 3 6 (VO)
4 5
GND
VCM
Pulse Gen
Peak
VCM
0V
5V CM H
Switching Pos. (A), IF = 0
VO
VO (Min)
VO (Max)
Dual Channel
B
1 VCC 8 +3.3V
A
RL Output VO
2 7 Monitoring
VFF Node
0.1μF
3 6 Bypass
GND
4 5
VCM
+ –
Pulse
Generator
ZO = 50 Ω
Test Circuit for HCPL0637, HCPL0638 and HCPL0639
VCM
0V
Peak
3.3V CM H
Switching Pos. (A), IF = 0
VO
VO (Min)
VO (Max)
0.024 (0.61)
0.060 (1.52)
0.275 (6.99)
0.155 (3.94)
0.050 (1.27)
Marking Information
1
600 2
6
V X YY S
3 4 5
Definitions
1 Fairchild logo
2 Device number
3 VDE mark indicates IEC60747-5-2 approval
(Note: Only appears on parts ordered with VDE option –
See order entry table)
4 One digit year code, e.g., ‘3’
5 Two digit work week ranging from ‘01’ to ‘53’
6 Assembly package code
5.5 ± 0.05
Authorized Distributor
Fairchild Semiconductor:
HCPL0601 HCPL0601V HCPL0601R2 HCPL0601R2V