Computer Architecture 2

http://www.unhas.ac.id/amil/TE2015/arsikom2/

L #4
Amil A. Ilham
http://www.unhas.ac.id/amil
 Instruction Set
• Understanding the language of the hardware
is key to understanding the hardware/
software interface.
• A program (in say, C) is compiled into an
executable that is composed of machine
instructions – this executable must also run on
future machines – for example, each Intel
processor reads in the same x86 instructions

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 A Basic MIPS Instruction
• C code: a = b + c ;
• Assembly code: (human-friendly machine
instructions)
add a, b, c # a is the sum of b and c
• Machine code: (hardware-friendly machine
instructions)
00000010001100100100000000100000

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 A Basic MIPS Instruction
• Translate the following C code into assembly code:
a = b + c + d + e;

Assembly code:
add a, b, c
add a, a, d
add a, a, e

• Instructions are simple: fixed number of operands

(unlike C)
• A single line of C code is converted into multiple lines of
assembly code
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 Compiling Two C Assignment
Statements into MIPS
• C code:
a = b + c;
d = a – e;
• MIPS assembly language instructions:
add a, b, c
sub d, a, e

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 Compiling a Complex C Assignment
into MIPS
• A somewhat complex statement contains the five variables
f, g, h, i, and j
f = (g + h) – (i + j);
What might a C compiler produce?
add t0,g,h # temporary variable t0 contains g + h
add t1,i,j # temporary variable t1 contains i + j
sub f,t0,t1 # f gets t0 – t1, which is (g + h)–(i + j)

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 Operands of the Computer Hardware
• The operands of arithmetic instructions are
restricted; they must be from a limited number of
special locations built directly in hardware called
registers.
• MIPS has 32 registers. (x86 has 8 registers)
• MIPS convention is to use two-character names
following a dollar sign to represent a register.
– we will use $s0, $s1, . . . for registers that correspond
to variables in C and Java programs and $t0, $t1, . . .
for temporary registers needed to compile the
program into MIPS instructions.

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 Compiling a C Assignment Using
Registers
• A somewhat complex statement contains the five variables f, g, h, i,
and j:
f = (g + h) – (i + j);
What might a C compiler produce?
add t0,g,h # temporary variable t0 contains g + h
add t1,i,j # temporary variable t1 contains i + j
sub f,t0,t1 # f gets t0 – t1, which is (g + h)–(i + j)

The variables f, g, h, i, and j are assigned to the registers $s0, $s1, $s2,
$s3, and $s4, respectively.

add $t0,$s1,$s2 # register $t0 contains g + h

add $t1,$s3,$s4 # register $t1 contains i + j
sub $s0,$t0,$t1 # f gets $t0 – $t1, which is (g + h)–(i + j)

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 Memory Operands
• Values must be fetched from memory before (add
and sub) instructions can operate on them

• Load word Register Memory

lw $t0, memory_address

• Store word Register Memory

sw $t0, memory_address

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 Alignment Restriction
• In MIPS, words must start at addresses that
are multiples of 4.

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 Compiling an Assignment When an
Operand is in Memory
• Let’s assume that A is an array of 100 words and that the
compiler has associated the variables g and h with the
registers $s1 and $s2 as before. Let's also assume that the
starting address, or base address, of the array is in $s3.
Compile this C assignment statement: g = h + A[8];

lw $t0,32($s3) # Temporary reg $t0 gets A[8]

add $s1,$s2,$t0 # g = h + A[8]

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 Compiling Using Load and Store
• Assume variable h is associated with register $s2 and the base
address of the array A is in $s3. What is the MIPS assembly
code for the C assignment statement below?
A[12] = h + A[8];

lw $t0,32($s3) # Temporary reg $t0 gets A[8]

add $t0,$s2,$t0 # Temporary reg $t0 gets h + A[8]
sw $t0,48($s3) # Stores h + A[8] back into A[12]

Array A
C/Java A[0] A[1] 2 3 4 5 6 7 8
MIPS 0($s3) 4($s3) 8 12 16 20 24 28 32
($s3)
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 Constant or Immediate Operands
• Many times a program will use a constant in
an operation—for example, incrementing an
index to point to the next element of an array.
• Add instruction with one constant operand is
called add immediate or addi. To add 4 to
register $s3, we just write:
addi $s3,$s3,4 # $s3 = $s3 + 4

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 MIPS Fields
• R-type (for register) or R-format.

• op: Basic operation of the instruction, traditionally called the

opcode.
• rs: The first register source operand.
• rt: The second register source operand.
• rd: The register destination operand. It gets the result of the
operation.
• shamt: Shift amount. (hence the field contains zero.)
• funct: Function. This field selects the specific variant of the
operation in the op field and is sometimes called the
function code.
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 MIPS Fields
• I-type (for immediate) or I-format
• used by the immediate and data transfer instructions

• op: Basic operation of the instruction, traditionally called the

opcode.
• rs: The first register source operand.
• rt: The second register source operand.
o The rt field specifies the destination register, which receives the
result of the load.

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 MIPS instruction encoding
• R-type (for register) or R-format.

• I-type (for immediate) or I-format

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 Representing Instructions in the
Computer
In MIPS assembly language:
• registers $s0 to $s7 map • registers $t0 to $t7 map
onto registers 16 to 23, onto registers 8 to 15.
– $s0 means register 16 – $t0 means register 8
– $t1 means register 9
– $s1 means register 17
– $t2 means register 10
– $s2 means register 18
– $t3 means register 11
– $s3 means register 19
– $t4 means register 12
– $s4 means register 20 – $t5 means register 13
– $s5 means register 21 – $t6 means register 14
– $s6 means register 22 – $t7 means register 15
– $s7 means register 23
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 Representing Instructions in the
Computer
• Translate a MIPS Assembly Instruction into a Machine
Instruction: add $t0,$s1,$s2
decimal
0 17 18 8 0 32

Machine instruction
000000 10001 10010 01000 00000 100000

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 Representing Instructions in the
Computer
• Translate a MIPS Assembly Instruction into a Machine
Instruction: addi $s3,$s3,4
decimal
8 19 19 4

Machine instruction
001000 10011 10011 0000000000000100

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 Representing Instructions in the
Computer
• Translate a MIPS Assembly Instruction into a Machine
Instruction: lw $t0,32($s3)
decimal
35 19 8 32

Machine instruction
100011 10011 01000 0000000000100000

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