ZY9B Hannstar J MV 4 Hannstar-E89382

5 4 3 2 1
ZY9B SYSTEM BLOCK DIAGRAM GPU CORE PWR

ISL6264 P44
CHARGER
ISL88731 P38
GPU IO PWR 3/5V SYS PWR

ISL62827 P45 ISL6237 P39
D DISCHARGER CPU CORE PWR D

+3V,+ 5V,+1.5V,+1.05V,+1.1V_VTT
P47 ISL62882 P40
CLOCK GENERATOR Fan Driver
SELGO: SLG8SP585V
BCLK: 133MHz
PEG_CLK: 100MHz
DPLL_REF_SSCLK: 120MHz
intel (PWM Type) +1.0V/+1.5V CPU VTT
ARD: 1.05V
CFD: 1.1V
X'TAL
14.318MHz P3
<MCH Processor> P36 G93334 + Linear P47 UP61111AQDD P41
CPU VGFX_AXG VTT 1.05V
DDR SYSTEM MEMORY

CPU & PCH
Dual Channel Arrandale (SG)* ISL62881 P46 UP61111AQDD P42
DDR III Clarksfield (Discrete)
XDP Conn.
800/ 1066 MHz P16
SO-DIMM 0 THERMAL DDR3 PWR
SO-DIMM 1 800 MT/s 1066 MT/s PROTECTION P48 TPS5116 P43
P14, 15 rPGA 989
(37.5mm X 37.5mm)
PCI-E PCIE
X16
P4.5.6.7 AMD GPU DISPLAY PORT
FDI DMI 2.5GT/s HDMI DISPLAY PORTP26
Broadway-LP / Madison-Pro
1GB (64Mb x 32 IO x 8 pcs) CRT
LVDS
C
*[Arrandale Only] X4 DMI interface P17,18,19,20,21,22,23,24 HDMI P26
C
X'TAL
27.0MHz
Graphics Interfaces
FDI DMI LVDS_CRT_HDMI
INT_HDMI *[Arrandale Only]
CRT
HDD (SATA) *2
intel INT_CRT *[Arrandale Only]
Switch Grapgics P25
Note:
HM55 does not support USB 6 & 7
<PCH>
HM55 does not support SATA 2 & 3 P31 SATA0
INT_LVDS *[Arrandale Only] P25, 26 LVDS P25
SATA
SATA5 3.0 GT/s
Ibex Peak_M USB0
eSATA Conn. eSATA Buffer SATA1
P34 ODD (SATA)
USB 9
(Debug)
P34 PCI-Express PCIE-4 New Card
P31 PCI-E
2.5GT/s CLKOUT_PEG_4
SATA4 USB 0 P33
USB Port x 5
USB 1, 3, 11, 12 P34 USB 2.0 PCIE-1 & 2
B
(Debug)
USB mBGA 676
(27mm X 25mm) CLKOUT_PEG_1&3
Mini Card B
RTC WLAN / TV
X'TAL
P9
Bluetooth Azalia P8.9.10.11.12.13
32.768KHz
USB 10 & 13 P32
HDA PCIE-5 PCIE-6
USB 4 P36
CLKOUT_PCIE2 CLKOUT_PEG_B
SPI LPC USB10 & 13
CCD
USB 8 P29 X'TAL IEEE1394 & Broadcom
32.768KHz
Media Cardreader Giga-LAN
Audio CODEC SPI ROM EC (WPC775C)
FingerPrint 4MB x1 (Basic ME+Braidwood) JMB380-QGAZ0B BCM57780
ALC669X P29 P9 P27 X'TAL P28 X'TAL
USB 2 P29 P37 24.576MHz 25MHz
ONFi 2.0
Touch Screen
USB 5 P34 Braidwood IEEE1394a Card Reader Transformer P28
Dual Channel NAND Interface SPI ROM connector P26 Connector P26
P16 P37
A A
Front Stereo Amp Center Mono Amp Rear Audio Amp Sub-Amplifier
RJ45 ConnectorP28
(G1453L/ 2W+2W) (G1442/ 2W) & Head phone (MAX9737) Touch Pad MMB
P30 P29 AN12947A P30 P30 P36 P35
SSID: DISCRETE: 030A
SSID: SWITCH GFX: 0308 Quanta Computer Inc.
Front Speaker Center Speaker Speaker S/PDIF SUBWOOFER Line in MIC Jack Int. D-MIC PROJECT : ZY9B
K/B COON. CIR SVID: 1025 Size Document Number Rev
P30 P29 P30 P30 P30 P30 P30 P125 P30 P36 P37
1A
ZY9B Block Diagram
Date: Monday, September 21, 2009 Sheet 1 of 49
5 4 3 2 1
1 2 3 4 5 6 7 8
GPU PWR CTRL Option 1 (Default/ VDDR3 before VDDC)

+3.3V VIN VIN +1.5V +1.5V_SUS +1.8V +5V
VDDR3 +3V_D VDDC PG_GPUIO_EN VDDCI PG_1V_EN +1V (DP PLL PWR) PG_1.5V_EN VDDR1 PG_1.5V_EN VDDR4 PG_1.5V_EN BJT dGPU_PWROK MOS
dGPU_VRON dGPU_PWR_EN#
MOS (AO3413) ISL6264 ISL62872 G9334ADJ & MOS MOS (AO4710) MOS (AO6402) AO3413
P22 P44 P45 P47 P43 P43 P22 P22
A +3_D (0.5A) +VGPU_CORE (20A) +VGPU_IO (4.5A) +1V (3A) +1.5V_GPU (10A) +1.8V_GPU (3A) +5_GPU A
GPU PWR CTRL Option 2 (VDDR3 after VDDR1)

VIN VIN +1.5V +1.5V_SUS +3.3V +1.8V +5V
VDDC PG_GPUIO_EN VDDCI PG_1V_EN +1V (DP PLL PWR) PG_1.5V_EN VDDR1 +1.5V_GPU VDDR3 +3V_D VDDR4 PG_1.5V_EN BJT dGPU_PWROK MOS
dGPU_VRON dGPU_PWR_EN#
ISL6264 ISL62872 G9334ADJ & MOS MOS (AO4710) MOS (AO3413) MOS (AO6402) AO3413
P44 P45 P47 P43 P22 P43 P22 P22
+VGPU_CORE (20A) +VGPU_IO (4.5A) +1V (3A) +1.5V_GPU (10A) +3_D (0.5A) +1.8V_GPU (3A) +5_GPU
Thermal Follow Chart

Power States
CONTROL
POWER PLANE VOLTAGE DESCRIPTION ACTIVE IN
SIGNAL
B VIN +10V~+19V MAIN POWER ALWAYS ALWAYS B
+VCCRTC +3V~+3.3V RTC POWER ALWAYS ALWAYS NTC

Thermal
+3VPCU +3.3V EC POWER ALWAYS ALWAYS
Protection
+5VPCU +5V CHARGE POWER ALWAYS ALWAYS
+15V +15V CHARGE PUMP POWER ALWAYS ALWAYS
+3V_S5 +3.3V LAN/BT/CIR POWER S5_ON S0-S5 CPU 3V/5 V

H_ORICHOT# PM_THRMTRIP# SYS_SHDN#
CORE PWR
CPU WIRE-AND SYS PWR
+5V_S5 +5V USB POWER S5_ON S0-S5 H/W Throttling
+5V +5V HDD/ODD/Codec/TP/CRT/HDMI POWER MAINON S0
+3V +3.3V PCH/GPU/Peripheral component POWER MAINON S0

SML1ALERT#
+1.5VSUS +1.5V CPU/SODIMM CORE POWER SUSON S0-S3
PCH FAN Driver FAN
+0.75V_DDR_VTT +0.75V SODIMM Termination POWER MAINON S0
+VGFX_AXG variation Internal GPU POWER GFX_ON S0

SM-Bus
+1.8V +1.8V CPU/PCH/Braidwood POWER MAINON S0
C C
+1.5V +1.5V MINI CARD/NEW CARD POWER MAINON S0

EC
+1.1V_VTT +1.05V or +1.1V CPU VTT POWER MAINON S0 CPUFAN#
+1.05V +1.05V PCH CORE POWER MAINON S0
+VCC_CORE variation CPU CORE POWER VRON S0
LCDVCC +3.3V LCD POWER LVDS_VDDEN S0
+5V_GPU +5V SWITCHABLE PWM IC POWER dGPU_PWR_EN# Discrete enable
+GPU_CORE +0.9V~+1.1V GPU CORE POWER +3V_D Discrete enable
+GPU_IO +0.9V~+1.1V GPU I/O POWER PG_GPUIO_EN Discrete enable
+1.5V_GPU +1.5V VRAM CORE POWER PG_1.5V_EN Discrete enable
+1.8V_GPU +1.8V GPU_CRE/LVDS/PLL POWER +1.5V_GPU Discrete enable
+1V +1V DP/PEG POWER PG_1V_EN Discrete enable
D D
Quanta Computer Inc.

PROJECT : ZY9B
Size Document Number Rev
1A
PWR Status & GPU PWR CRL & THRM
Date: Wednesday, June 24, 2009 Sheet 2 of 49
1 2 3 4 5 6 7 8
5 4 3 2 1
+3V U26
180ohm/1.5A 150mA(20mil) L38 *BKP1608HS181T_6_1.5A +3V
L35 BKP1608HS181T_6_1.5A +3V_CLK 1 80mA(20mil)
VDD_DOT +VDDIO_CLK L36 BKP1608HS181T_6_1.5A
5 VDD_27 VDD_SRC_I/O 15 +1.05V
C459 C453 C458 C461 C452 C451 C466 17 18
VDD_SRC VDD_CPU_I/O C464 C467 C462 C465
D 24 VDD_CPU D
4.7u/10V_8 4.7u/10V_8 .1u/16V_4 .1u/16V_4.1u/16V_4.1u/16V_4 .1u/16V_4 29 3 C308 may be can save
VDD_REF DOT_96 CLK_BUF_DREFCLK (10)
4 .1u/16V_4 .1u/16V_4 10u/Y5V_8 10u/Y5V_8
DOT_96# CLK_BUF_DREFCLK# (10)
CLK_SDATA 31
CLK_SCLK SDA R757 0_4
32 SCL 27M 6 27M_CLK (18) Place each 0.1uF cap as close as
7 R758 *0_4 possible to each VDD IO pin. Place
27M_SS For ATI suggest
the 10uF caps on the VDD_IO plane.
R234 33_4 CPU_SEL 30 10
(10) CLK_ICH_14M REF_0/CPU_SEL SRC_1/SATA CLK_BUF_PCIE_3GPLL (10)
SRC_1#/SATA# 11 CLK_BUF_PCIE_3GPLL# (10)
C449 33p_4 13
SRC_2 CLK_BUF_DREFSSCLK (10)
SRC_2# 14 CLK_BUF_DREFSSCLK# (10)
1
XTAL_IN 28
Y3 XTAL_IN +3V
14.318MHZ XTAL_OUT 27 16 R242 10K_4
XTAL_OUT *CPU_STOP#
2
C450 33p_4 2 20
VSS_DOT CPU_1 TP7
8 VSS_27 CPU_1# 19 TP8
C 9 VSS_SATA CPU_0 23 CLK_BUF_BCLK (10) C
12 VSS_SRC CPU_0# 22 CLK_BUF_BCLK# (10)
21 VSS_CPU
26 25 CK_PWRGD_R
VSS_REF CKPWRGD/PD#
33 GND
SLG8SP585V
+3V +3V
CPU_CLK select SMBus
+1.05V
CLK Enable
R237
R235 1K/F_4
B B
2
R223 2.2K_4
*10K_4 CK_PWRGD_R
3 1 CLK_SDATA CLK_SDATA (14,15,32)
(10,16,33) ICH_SMBDATA
3
Q17
CPU_SEL Q18 2N7002K
2N7002K
(40) VR_PWRGD_CK505# 2 R236
R228 100K/F_4
10K_4 C430 +3V
*10p/50V/COG_4
1
R238
2
2.2K_4
0 1
A
(10,16,33) ICH_SMBCLK 3 1 CLK_SCLK CLK_SCLK (14,15,32) Quanta Computer Inc. A
CPU_SEL CPU0/1=133MHz CPU0/1=100MHz Q19

(default) 2N7002K PROJECT : ZY9B
1A
Clock Generator
Date: Thursday, September 17, 2009 Sheet 3 of 49
5 4 3 2 1
5 4 3 2 1
AUBURNDALE/CLARKSFIELD PROCESSOR (DMI,PEG,FDI) AUBURNDALE/CLARKSFIELD PROCESSOR (CLK,MISC,JTAG)
Processor Compensation Signals

U45A U45B
B26 R492 49.9/F_4 R549 20/F_4 H_COMP3 AT23
PEG_ICOMPI COMP3
PEG_ICOMPO A26 BCLK A16 CLK_CPU_BCLK (11)
MISC
A24 B27 R559 20/F_4 H_COMP2 AT24 B16 CLK_CPU_BCLK# (11)
(8) DMI_TXN0 DMI_RX#[0] PEG_RCOMPO COMP2 BCLK#
C23 A25 R493 750/F_4
(8) DMI_TXN1 DMI_RX#[1] PEG_RBIAS
CLOCKS
B22 PEG_RXN[0..15] (17) R122 49.9/F_4 H_COMP1 G16 AR30 BCLK_ITP_P (16)
(8) DMI_TXN2 DMI_RX#[2] COMP1 BCLK_ITP
A21 K35 PEG_RXN0 AT30 BCLK_ITP_N (16)
D (8) DMI_TXN3 DMI_RX#[3] PEG_RX#[0] BCLK_ITP# D
J34 PEG_RXN1 R548 49.9/F_4 H_COMP0 AT26
PEG_RX#[1] PEG_RXN2 COMP0
(8) DMI_TXP0 B24 DMI_RX[0] PEG_RX#[2] J33 PEG_CLK E16 CLK_PCIE_3GPLL (10)
D23 G35 PEG_RXN3 D16 CLK_PCIE_3GPLL# (10)
(8) DMI_TXP1 DMI_RX[1] PEG_RX#[3] PEG_CLK#
DMI
B23 G32 PEG_RXN4 R152 *1K_4 TP_SKT0CC# AH24
(8) DMI_TXP2 DMI_RX[2] PEG_RX#[4] SKTOCC#
A22 F34 PEG_RXN5 A18 R494 *A@0_4 DPLL_REF_SSCLK (10)
(8) DMI_TXP3 DMI_RX[3] PEG_RX#[5] DPLL_REF_SSCLK
F31 PEG_RXN6 A17 R490 *A@0_4 DPLL_REF_SSCLK# (10)
PEG_RX#[6] PEG_RXN7 H_CATERR# DPLL_REF_SSCLK# R495 EV@0_4
D24 D35 AK14
(8) DMI_RXN0 DMI_TX#[0] PEG_RX#[7] Use reverse type CATERR#
THERMAL
G24 E33 PEG_RXN8 R491 EV@0_4
(8) DMI_RXN1 DMI_TX#[1] PEG_RX#[8]
F23 C33 PEG_RXN9 Layout Note: Place
(8)
(8)
DMI_RXN2
DMI_RXN3 H23
DMI_TX#[2]
DMI_TX#[3]
PEG_RX#[9]
PEG_RX#[10] D32 PEG_RXN10
PEG_RXN11
(at GPU side) SM_DRAMRST# F6 CPU_DDR3_DRAMRST# (16) these resistors
PEG_RX#[11] B32 (11) H_PECI AT15 PECI
(8) DMI_RXP0 D25 DMI_TX[0] PEG_RX#[12] C31 PEG_RXN12
SM_RCOMP[0] AL1 SM_RCOMP_0 R556 100/F_4 near Processor
F24 B28 PEG_RXN13 AM1 SM_RCOMP_1 R555 24.9/F_4
(8) DMI_RXP1 DMI_TX[1] PEG_RX#[13] SM_RCOMP[1]
E23 B30 PEG_RXN14 AN1 SM_RCOMP_2 R554 130/F_4
(8) DMI_RXP2 DMI_TX[2] PEG_RX#[14] SM_RCOMP[2]
G23 A31 PEG_RXN15 (40) H_PROCHOT# H_PROCHOT# AN26
(8) DMI_RXP3 DMI_TX[3] PEG_RX#[15] PROCHOT#
PEG_RXP[0..15] (17) PM_EXT_TS#[0] AN15 PM_EXTTS#0 (14)
DDR3
MISC
J35 PEG_RXP0 AP15 R551 10K_4
PEG_RX[0] PEG_RXP1 PM_EXT_TS#[1] R552 10K_4
PEG_RX[1] H34 +1.1V_VTT
H33 PEG_RXP2 (11) PM_THRMTRIP# AK15 PM_EXTTS#1 (15)
PEG_RX[2] PEG_RXP3 THERMTRIP#
(8) FDI_TXN0 E22 FDI_TX#[0] PEG_RX[3] F35
D21 G33 PEG_RXP4
(8) FDI_TXN1 FDI_TX#[1] PEG_RX[4]
D19 E34 PEG_RXP5 AT28 XDP_PRDY# (16)
(8) FDI_TXN2 FDI_TX#[2] PEG_RX[5] PRDY#
D18 F32 PEG_RXP6 AP27 XDP_PREQ# XDP_PREQ# (16)
(8) FDI_TXN3 FDI_TX#[3] PEG_RX[6] PREQ#
G21 D34 PEG_RXP7
(8) FDI_TXN4 FDI_TX#[4] PEG_RX[7]
E19 F33 PEG_RXP8 AN28 XDP_TCLK
PCI EXPRESS -- GRAPHICS
(8) FDI_TXN5 FDI_TX#[5] PEG_RX[8] TCK XDP_TCLK (16)
F21 B33 PEG_RXP9 (16) H_CPURST# H_CPURST# AP26 AP28 XDP_TMS XDP_TMS (16)
(8) FDI_TXN6 FDI_TX#[6] PEG_RX[9] RESET_OBS# TMS
Intel(R) FDI
PWR MANAGEMENT
G18 D31 PEG_RXP10 AT27 XDP_TRST# XDP_TRST# (16)
(8) FDI_TXN7 FDI_TX#[7] PEG_RX[10] TRST#
JTAG & BPM

A32 PEG_RXP11
PEG_RX[11] PEG_RXP12 XDP_TDI_R
PEG_RX[12] C30 (8) PM_SYNC AL15 PM_SYNC TDI AT29
D22 A28 PEG_RXP13 AR27 XDP_TDO_R
(8) FDI_TXP0 FDI_TX[0] PEG_RX[13] TDO
C21 B29 PEG_RXP14 PEG_TXN[0..15] (17) AR29 XDP_TDI_M
(8) FDI_TXP1 FDI_TX[1] PEG_RX[14] TDI_M
D20 A30 PEG_RXP15 AN14 AP29 XDP_TDO_M
(8) FDI_TXP2 FDI_TX[2] PEG_RX[15] VCCPWRGOOD_1 TDO_M
(8) FDI_TXP3 C18 FDI_TX[3]
G22 L33 CPEG_TXN0 C725 .1u/X7R_4 PEG_TXN0 AN25 XDP_DBRST# (8,16)
C (8) FDI_TXP4 FDI_TX[4] PEG_TX#[0] DBR# C
E20 M35 CPEG_TXN1 C721 .1u/X7R_4 PEG_TXN1 (11,16) H_PWRGOOD AN27
(8) FDI_TXP5 FDI_TX[5] PEG_TX#[1] VCCPWRGOOD_0
F20 M33 CPEG_TXN2 C718 .1u/X7R_4 PEG_TXN2 XDP_OBS[0:7] (16)
(8) FDI_TXP6 FDI_TX[6] PEG_TX#[2]
G19 M30 CPEG_TXN3 C711 .1u/X7R_4 PEG_TXN3 AJ22 XDP_OBS0_R R191 *0_4XDP_OBS0
(8) FDI_TXP7 FDI_TX[7] PEG_TX#[3] BPM#[0]
L31 CPEG_TXN4 C709 .1u/X7R_4 PEG_TXN4 AK13 AK22 XDP_OBS1_R R185 *0_4XDP_OBS1
PEG_TX#[4] (8,16) PM_DRAM_PWRGD SM_DRAMPWROK BPM#[1]
FDI_FSYNC0_R F17 K32 CPEG_TXN5 C706 .1u/X7R_4 PEG_TXN5 AK24 XDP_OBS2_R R184 *0_4XDP_OBS2
FDI_FSYNC1_R FDI_FSYNC[0] PEG_TX#[5] CPEG_TXN6 C704 .1u/X7R_4 PEG_TXN6 BPM#[2] XDP_OBS3_R R182 *0_4XDP_OBS3
E17 FDI_FSYNC[1] PEG_TX#[6] M29 BPM#[3] AJ24
J31 CPEG_TXN7 C700 .1u/X7R_4 PEG_TXN7 H_VTTPWRGD AM15 AJ25 XDP_OBS4_R R181 *0_4XDP_OBS4
FDI_INT_R PEG_TX#[7] CPEG_TXN8 C698 .1u/X7R_4 PEG_TXN8 VTTPWRGOOD BPM#[4] XDP_OBS5_R R178 *0_4XDP_OBS5
C17 FDI_INT PEG_TX#[8] K29 BPM#[5] AH22
H30 CPEG_TXN9 C696 .1u/X7R_4 PEG_TXN9 AK23 XDP_OBS6_R R177 *0_4XDP_OBS6
FDI_LSYNC0_R PEG_TX#[9] CPEG_TXN10 C694 .1u/X7R_4 PEG_TXN10 BPM#[6] XDP_OBS7_R R174 *0_4XDP_OBS7
F18 FDI_LSYNC[0] PEG_TX#[10] H29 (16) H_PWRGD_XDP AM26 TAPPWRGOOD BPM#[7] AH23
FDI_LSYNC1_R D17 F29 CPEG_TXN11 C683 .1u/X7R_4 PEG_TXN11
FDI_LSYNC[1] PEG_TX#[11] CPEG_TXN12 C681 .1u/X7R_4 PEG_TXN12
PEG_TX#[12] E28
D29 CPEG_TXN13 C679 .1u/X7R_4 PEG_TXN13 R195 1.5K/F_4 CPU_PLTRST# AL14
PEG_TX#[13] CPEG_TXN14 C677 .1u/X7R_4 PEG_TXN14 (10,11,27,28,32,33,37) PLTRST# RSTIN#
PEG_TX#[14] D27 PEG_TXP[0..15] (17)
C26 CPEG_TXN15 C674 .1u/X7R_4 PEG_TXN15 R193
PEG_TX#[15] 750/F_4
L34 CPEG_TXP0 C723 .1u/X7R_4 PEG_TXP0 Clarksfield/Auburndale
PEG_TX[0] CPEG_TXP1 C720 .1u/X7R_4 PEG_TXP1
PEG_TX[1] M34 SI 2/5 Modified
M32 CPEG_TXP2 C712 .1u/X7R_4 PEG_TXP2
PEG_TX[3] L30
PEG_TX[5] K31
PEG_TX[6] CPEG_TXP7 C699 .1u/X7R_4 PEG_TXP7 R482 *A@0_4 FDI_FSYNC0_R
PEG_TX[7] H31 (8) FDI_FSYNC0
K28 CPEG_TXP8 C697 .1u/X7R_4 PEG_TXP8 R481 *A@0_4 FDI_FSYNC1_R
PEG_TX[8] (8) FDI_FSYNC1
G30 CPEG_TXP9 C695 .1u/X7R_4 PEG_TXP9
PEG_TX[9] CPEG_TXP10 C684 .1u/X7R_4 PEG_TXP10 R483 *A@0_4 FDI_INT_R
PEG_TX[10] G29 (8) FDI_INT
F28 CPEG_TXP11 C682 .1u/X7R_4 PEG_TXP11
PEG_TX[11] CPEG_TXP12 C680 .1u/X7R_4 PEG_TXP12 R484 *A@0_4 FDI_LSYNC0_R
PEG_TX[12] E27 (8) FDI_LSYNC0
D28 CPEG_TXP13 C678 .1u/X7R_4 PEG_TXP13 R480 *A@0_4 FDI_LSYNC1_R
PEG_TX[13] (8) FDI_LSYNC1
C27 CPEG_TXP14 C675 .1u/X7R_4 PEG_TXP14
PEG_TX[14] CPEG_TXP15 C673 .1u/X7R_4 PEG_TXP15 R489 EV@1K_4
PEG_TX[15] C25
R488 EV@1K_4
R486 EV@1K_4
B R485 EV@1K_4 B
Clarksfield/Auburndale R487 EV@1K_4
Processor pull-up JTAG MAPPING

Thermaltrip protect VTT PWR_Good XDP_TDI_R XDP_TDI (16)
+1.1V_VTT R150 *0_4
XDP_TDO_M XDP_TDO (16)
XDP_TDO R160 51/F_4 R161 *0_4
+1.1V_VTT H_CATERR# R153 49.9/F_4
H_PROCHOT# R558 68_4 R156
H_CPURST# R143 *68_4
3
XDP_TMS R146 *51_4 *0_4

XDP_TDI_R R151 *51_4
+3V XDP_PREQ# R192 *51_4 XDP_TDI_M
2 Q23 XDP_TCLK R171 *51_4 R155 *0_4
(8,40) DELAY_VR_PWRGOOD
XDP_TRST# R145 51/F_4 XDP_TDO_R
FDV301N R166 *0_4
C418
1
.1u/16V_4 4/9 REV:B MODIFY BY DG1.52

Scan Chain STUFF -> R469, R491, R507
5
R245 (Default) NO STUFF -> R489, R490

1K_4 (37) MPWROK 2 R202 +1.5V_CPUVDDQ
4 H_VTTPWRGD
1 CPU Only STUFF -> R490, R491
2K/F_4 NO STUFF -> R469, R489, R507
U22 R187
3
2
A R203 1.1K/F_4 A
Q22 TC7SH08FU 1K_4 GMCH Only STUFF -> R489, R507
(11) PM_THRMTRIP#
PM_THRMTRIP# 1 3 MMBT3904 SYS_SHDN# (39,48)
PM_DRAM_PWRGD NO STUFF -> R491, R490, R469
R188 Use a voltage divider with VDDQ
pull-up 56ohm close to PCH 3K/F_4 (1.5V) rail (ON in S3) and
resistor combination of 4.75K (to
VDDQ)/12K(to GND) to generate the
required voltage.
Note: CRB uses a 3.3V (always ON)
rail with 2K and 1K combination.
PROJECT : ZY9B
1A
AUBURNDA 1/4
5 4 3 2 1
5 4 3 2 1
AUBURNDALE/CLARKSFIELD PROCESSOR (DDR3) U45D
U45C
(15) M_B_DQ[63:0] SB_CK[0] W8 M_B_CLK0 (15)

SB_CK#[0] W9 M_B_CLK0# (15)
M_B_DQ0 B5 M3 M_B_CKE0 (15)
M_B_DQ1 SB_DQ[0] SB_CKE[0]
A5 SB_DQ[1]
AA6 M_A_CLK0 (14) M_B_DQ2 C3
SA_CK[0] M_B_DQ3 SB_DQ[2]
SA_CK#[0] AA7 M_A_CLK0# (14) B3 SB_DQ[3] SB_CK[1] V7 M_B_CLK1 (15)
P7 M_A_CKE0 (14) M_B_DQ4 E4 V6 M_B_CLK1# (15)
D (14) M_A_DQ[63:0] SA_CKE[0] SB_DQ[4] SB_CK#[1] D
M_A_DQ0 A10 M_B_DQ5 A6 M2 M_B_CKE1 (15)
M_A_DQ1 SA_DQ[0] M_B_DQ6 SB_DQ[5] SB_CKE[1]
C10 SA_DQ[1] A4 SB_DQ[6]
M_A_DQ2 C7 M_B_DQ7 C4
M_A_DQ3 SA_DQ[2] M_B_DQ8 SB_DQ[7]
A7 SA_DQ[3] SA_CK[1] Y6 M_A_CLK1 (14) D1 SB_DQ[8]
M_A_DQ4 B10 Y5 M_A_CLK1# (14) M_B_DQ9 D2
M_A_DQ5 SA_DQ[4] SA_CK#[1] M_B_DQ10 SB_DQ[9]
D10 SA_DQ[5] SA_CKE[1] P6 M_A_CKE1 (14) F2 SB_DQ[10] SB_CS#[0] AB8 M_B_CS#0 (15)
M_A_DQ6 E10 M_B_DQ11 F1 AD6 M_B_CS#1 (15)
M_A_DQ7 SA_DQ[6] M_B_DQ12 SB_DQ[11] SB_CS#[1]
A8 SA_DQ[7] C2 SB_DQ[12]
M_A_DQ8 D8 M_B_DQ13 F5
F10 SA_DQ[9] SA_CS#[0] AE2 M_A_CS#0 (14) F3 SB_DQ[14]
M_A_DQ10 E6 AE8 M_A_CS#1 (14) M_B_DQ15 G4 AC7 M_B_ODT0 (15)
M_A_DQ11 SA_DQ[10] SA_CS#[1] M_B_DQ16 SB_DQ[15] SB_ODT[0]
F7 SA_DQ[11] H6 SB_DQ[16] SB_ODT[1] AD1 M_B_ODT1 (15)
M_A_DQ12 E9 M_B_DQ17 G2
B7 SA_DQ[13] J6 SB_DQ[18]
M_A_DQ14 E7 AD8 M_A_ODT0 (14) M_B_DQ19 J3
M_A_DQ15 SA_DQ[14] SA_ODT[0] M_B_DQ20 SB_DQ[19]
C6 SA_DQ[15] SA_ODT[1] AF9 M_A_ODT1 (14) G1 SB_DQ[20] M_B_DM[7:0] (15)
M_A_DQ16 H10 M_B_DQ21 G5 D4 M_B_DM0
M_A_DQ17 SA_DQ[16] M_B_DQ22 SB_DQ[21] SB_DM[0] M_B_DM1
G8 SA_DQ[17] J2 SB_DQ[22] SB_DM[1] E1
M_A_DQ18 K7 M_B_DQ23 J1 H3 M_B_DM2
J8 SA_DQ[19] J5 SB_DQ[24] SB_DM[3] K1
M_A_DQ20 G7 M_B_DQ25 K2 AH1 M_B_DM4
G10 SA_DQ[21] M_A_DM[7:0] (14) L3 SB_DQ[26] SB_DM[5] AL2
M_A_DQ22 J7 B9 M_A_DM0 M_B_DQ27 M1 AR4 M_B_DM6
M_A_DQ23 SA_DQ[22] SA_DM[0] M_A_DM1 M_B_DQ28 SB_DQ[27] SB_DM[6] M_B_DM7
J10 SA_DQ[23] SA_DM[1] D7 K5 SB_DQ[28] SB_DM[7] AT8
M_A_DQ24 L7 H7 M_A_DM2 M_B_DQ29 K4
M_A_DQ25 SA_DQ[24] SA_DM[2] M_A_DM3 M_B_DQ30 SB_DQ[29]
M6 SA_DQ[25] SA_DM[3] M7 M4 SB_DQ[30]
M_A_DQ26 M8 AG6 M_A_DM4 M_B_DQ31 N5
M_A_DQ27 SA_DQ[26] SA_DM[4] M_A_DM5 M_B_DQ32 SB_DQ[31]
L9 SA_DQ[27] SA_DM[5] AM7 AF3 SB_DQ[32]
M_A_DQ28 L6 AN10 M_A_DM6 M_B_DQ33 AG1
SA_DQ[28] SA_DM[6] SB_DQ[33] M_B_DQS#[7:0] (15)
M_A_DQ29 K8 AN13 M_A_DM7 M_B_DQ34 AJ3 D5 M_B_DQS#0
M_A_DQ30 SA_DQ[29] SA_DM[7] M_B_DQ35 SB_DQ[34] SB_DQS#[0] M_B_DQS#1
N8 SA_DQ[30] AK1 SB_DQ[35] SB_DQS#[1] F4
M_A_DQ31 P9 M_B_DQ36 AG4 J4 M_B_DQS#2
C M_A_DQ32 SA_DQ[31] M_B_DQ37 SB_DQ[36] SB_DQS#[2] M_B_DQS#3 C
AH5 SA_DQ[32] AG3 SB_DQ[37] SB_DQS#[3] L4
M_A_DQ33 AF5 M_B_DQ38 AJ4 AH2 M_B_DQS#4
SA_DQ[33] M_A_DQS#[7:0] (14) SB_DQ[38] SB_DQS#[4]
DDR SYSTEM MEMORY - B

M_A_DQ34 AK6 C9 M_A_DQS#0 M_B_DQ39 AH4 AL4 M_B_DQS#5
DDR SYSTEM MEMORY A
M_A_DQ35 SA_DQ[34] SA_DQS#[0] M_A_DQS#1 M_B_DQ40 SB_DQ[39] SB_DQS#[5] M_B_DQS#6

AK7 SA_DQ[35] SA_DQS#[1] F8 AK3 SB_DQ[40] SB_DQS#[6] AR5
M_A_DQ36 AF6 J9 M_A_DQS#2 M_B_DQ41 AK4 AR8 M_B_DQS#7
M_A_DQ37 SA_DQ[36] SA_DQS#[2] M_A_DQS#3 M_B_DQ42 SB_DQ[41] SB_DQS#[7]
AG5 SA_DQ[37] SA_DQS#[3] N9 AM6 SB_DQ[42]
M_A_DQ38 AJ7 AH7 M_A_DQS#4 M_B_DQ43 AN2
M_A_DQ39 SA_DQ[38] SA_DQS#[4] M_A_DQS#5 M_B_DQ44 SB_DQ[43]
AJ6 SA_DQ[39] SA_DQS#[5] AK9 AK5 SB_DQ[44]
M_A_DQ40 AJ10 AP11 M_A_DQS#6 M_B_DQ45 AK2
M_A_DQ41 SA_DQ[40] SA_DQS#[6] M_A_DQS#7 M_B_DQ46 SB_DQ[45]
AJ9 SA_DQ[41] SA_DQS#[7] AT13 AM4 SB_DQ[46]
M_A_DQ42 AL10 M_B_DQ47 AM3
SA_DQ[42] SB_DQ[47] M_B_DQS[7:0] (15)
M_A_DQ43 AK12 M_B_DQ48 AP3 C5 M_B_DQS0
M_A_DQ44 SA_DQ[43] M_B_DQ49 SB_DQ[48] SB_DQS[0] M_B_DQS1
AK8 SA_DQ[44] AN5 SB_DQ[49] SB_DQS[1] E3
M_A_DQ45 AL7 M_B_DQ50 AT4 H4 M_B_DQS2
SA_DQ[45] M_A_DQS[7:0] (14) SB_DQ[50] SB_DQS[2]
M_A_DQ46 AK11 C8 M_A_DQS0 M_B_DQ51 AN6 M5 M_B_DQS3
M_A_DQ47 SA_DQ[46] SA_DQS[0] M_A_DQS1 M_B_DQ52 SB_DQ[51] SB_DQS[3] M_B_DQS4
AL8 SA_DQ[47] SA_DQS[1] F9 AN4 SB_DQ[52] SB_DQS[4] AG2
M_A_DQ48 AN8 H9 M_A_DQS2 M_B_DQ53 AN3 AL5 M_B_DQS5
M_A_DQ49 SA_DQ[48] SA_DQS[2] M_A_DQS3 M_B_DQ54 SB_DQ[53] SB_DQS[5] M_B_DQS6
AM10 SA_DQ[49] SA_DQS[3] M9 AT5 SB_DQ[54] SB_DQS[6] AP5
M_A_DQ50 AR11 AH8 M_A_DQS4 M_B_DQ55 AT6 AR7 M_B_DQS7
M_A_DQ51 SA_DQ[50] SA_DQS[4] M_A_DQS5 M_B_DQ56 SB_DQ[55] SB_DQS[7]
AL11 SA_DQ[51] SA_DQS[5] AK10 AN7 SB_DQ[56]
M_A_DQ52 AM9 AN11 M_A_DQS6 M_B_DQ57 AP6
M_A_DQ53 SA_DQ[52] SA_DQS[6] M_A_DQS7 M_B_DQ58 SB_DQ[57]
AN9 SA_DQ[53] SA_DQS[7] AR13 AP8 SB_DQ[58]
M_A_DQ54 AT11 M_B_DQ59 AT9
AP12 SA_DQ[55] AT7 SB_DQ[60]
M_A_DQ56 AM12 M_B_DQ61 AP9
AN12 SA_DQ[57] M_A_A[15:0] (14) AR10 SB_DQ[62] M_B_A[15:0] (15)
M_A_DQ58 AM13 Y3 M_A_A0 M_B_DQ63 AT10 U5 M_B_A0
M_A_DQ59 SA_DQ[58] SA_MA[0] M_A_A1 SB_DQ[63] SB_MA[0] M_B_A1
AT14 SA_DQ[59] SA_MA[1] W1 SB_MA[1] V2
M_A_DQ60 AT12 AA8 M_A_A2 T5 M_B_A2
M_A_DQ61 SA_DQ[60] SA_MA[2] M_A_A3 SB_MA[2] M_B_A3
AL13 SA_DQ[61] SA_MA[3] AA3 SB_MA[3] V3
M_A_DQ62 AR14 V1 M_A_A4 R1 M_B_A4
M_A_DQ63 SA_DQ[62] SA_MA[4] M_A_A5 SB_MA[4] M_B_A5
AP14 SA_DQ[63] SA_MA[5] AA9 (15) M_B_BS#0 AB1 SB_BS[0] SB_MA[5] T8
B M_A_A6 M_B_A6 B
SA_MA[6] V8 (15) M_B_BS#1 W5 SB_BS[1] SB_MA[6] R2
T1 M_A_A7 (15) M_B_BS#2 R7 R6 M_B_A7
SA_MA[7] M_A_A8 SB_BS[2] SB_MA[7] M_B_A8
SA_MA[8] Y9 SB_MA[8] R4
(14) M_A_BS#0 AC3 U6 M_A_A9 R5 M_B_A9
SA_BS[0] SA_MA[9] M_A_A10 SB_MA[9] M_B_A10
(14) M_A_BS#1 AB2 SA_BS[1] SA_MA[10] AD4 (15) M_B_CAS# AC5 SB_CAS# SB_MA[10] AB5
(14) M_A_BS#2 U7 T2 M_A_A11 (15) M_B_RAS# Y7 P3 M_B_A11
SA_BS[2] SA_MA[11] M_A_A12 SB_RAS# SB_MA[11] M_B_A12
SA_MA[12] U3 (15) M_B_WE# AC6 SB_WE# SB_MA[12] R3
AG8 M_A_A13 AF7 M_B_A13
SA_MA[13] M_A_A14 SB_MA[13] M_B_A14
SA_MA[14] T3 SB_MA[14] P5
(14) M_A_CAS# AE1 V9 M_A_A15 N1 M_B_A15
SA_CAS# SA_MA[15] SB_MA[15]
(14) M_A_RAS# AB3 SA_RAS#
(14) M_A_WE# AE9 SA_WE#
Clarksfield/Auburndale Clarksfield/Auburndale
Channel A DQ[15,32,48,54], DM[5] Channel B DQ[16,18,36,42,56,57,60,61,62]

Requires minimum 12mils spacing Requires minimum 12mils spacing
with all other signals, including data signals. with all other signals, including data signals.
A A

PROJECT : ZY9B
1A
AUBURNDA 2/4
5 4 3 2 1
5 4 3 2 1
CPU Core Power U45F
VTT Rail Values are AUBURNDALE/CLARKSFIELD PROCESSOR (GRAPHICS POWER)

Auburndal VTT=1.05V
ARD:48A +VCC_CORE Clarksfield VTT=1.1V
CFD:52A
18A U45G
AG35 VCC1 VTT0_1 AH14 +1.1V_VTT
AG34
AG33
VCC2 VTT0_2 AH12
AH11 +VGFX_AXG
22A AT21
+ C651 + C747 + C341 + C357 VCC3 VTT0_3 C360 C349 C722 + VAXG1
AG32 VCC4 VTT0_4 AH10 AT19 VAXG2 VAXG_SENSE AR22 VCC_AXG_SENSE (46)
D 22u_8 22u_8 22u_8 C671 D
SENSE
LINES
AG31 VCC5 VTT0_5 J14 AT18 VAXG3 VSSAXG_SENSE AT22 VSS_AXG_SENSE (46)
*330u/2V_7343 330u/2V_7343 *330u/2V_7343 330u/2V_7343 AG30 J13 *330u/2V_7343 + + AT16
VCC6 VTT0_6 C438 C439 VAXG4
AG29 VCC7 VTT0_7 H14 AR21 VAXG5
AG28 H12 *A@330u/2V_7343 *A@330u/2V_7343 AR19
VCC8 VTT0_8 VAXG6
AG27 VCC9 VTT0_9 G14 AR18 VAXG7
AG26 VCC10 VTT0_10 G13 AR16 VAXG8 GFX_VID[0] AM22 GFX_VID0 (46)
AF35 VCC11 VTT0_11 G12 AP21 VAXG9 GFX_VID[1] AP22 GFX_VID1 (46)
GRAPHICS VIDs
AF34 VCC12 VTT0_12 G11 AP19 VAXG10 GFX_VID[2] AN22 GFX_VID2 (46)
AF33 VCC13 VTT0_13 F14 AP18 VAXG11 GFX_VID[3] AP23 GFX_VID3 (46)
C730 C765 C759 C726 C322 C383 C729 C728 AF32 F13 C717 C751 C743 C769 AP16 AM23 GFX_VID4 (46)
22u_8 22u_8 22u_8 22u_8 22u_8 22u_8 22u_8 22u_8 VCC14 VTT0_14 10u_8 10u_8 10u_8 10u_8 VAXG12 GFX_VID[4]
AF31 VCC15 VTT0_15 F12 AN21 VAXG13 GFX_VID[5] AP24 GFX_VID5 (46)
GRAPHICS
AF30 VCC16 VTT0_16 F11 AN19 VAXG14 GFX_VID[6] AN24 GFX_VID6 (46)
AF29 E14 C409 C427 C401 AN18
VCC17 VTT0_17 *A@22u_8*A@22u_8*A@22u_8 VAXG15
AF28 VCC18 VTT0_18 E12 AN16 VAXG16
AF27 VCC19 VTT0_19 D14 AM21 VAXG17 GFX_VR_EN AR25 GFX_ON (46)
AF26 VCC20 VTT0_20 D13 AM19 VAXG18 GFX_DPRSLPVR AT25 GFX_DPRSLPVR (46)
1.1V RAIL POWER

AD35 VCC21 VTT0_21 D12 AM18 VAXG19 GFX_IMON AM24 GFX_IMON (46)
AD34 D11 AM16 add it for Intel suggestion at 6/1
VCC22 VTT0_22 C760 C716 C672 C535 and C1005 may be can save VAXG20 R167 EV@1K_4
AD33 VCC23 VTT0_23 C14 AL21 VAXG21
C727 C381 C764 C382 C371 C380 C767 C766 AD32 C13 10u_8 10u_8 10u_8 AL19 ARD:3A
22u_8 22u_8 22u_8 22u_8 22u_8 22u_8 22u_8 22u_8 VCC24 VTT0_24 VAXG22
AD31 VCC25 VTT0_25 C12 AL18 VAXG23
AD30 C11 AL16 CFD:6A
VCC26 VTT0_26 VAXG24
AD29 VCC27 VTT0_27 B14 AK21 VAXG25 VDDQ1 AJ1 +1.5V_CPUVDDQ
AD28 B12 C784 C785 C428 AK19 AF1
VCC28 VTT0_28 *A@10u_8*A@10u_8*A@10u_8 VAXG26 VDDQ2
- 1.5V RAILS
AD27 VCC29 VTT0_29 A14 AK18 VAXG27 VDDQ3 AE7
AD26 A13 AK16 AE4 C345 C354 C396 C392 C389
VCC30 VTT0_30 VAXG28 VDDQ4 1u/10V_4 1u/10V_4 1u/10V_4 1u/10V_4 1u/10V_4
AC35 VCC31 VTT0_31 A12 AJ21 VAXG29 VDDQ5 AC1
AC34 VCC32 VTT0_32 A11 AJ19 VAXG30 VDDQ6 AB7
AC33 VCC33 AJ18 VAXG31 VDDQ7 AB4
AC32 +1.1V_VTT add it for discrete only at 6/1 AJ16 Y1
C335 C385 C361 C336 C337 C339 C333 C338 VCC34 VAXG32 VDDQ8
AC31 VCC35 AH21 VAXG33 VDDQ9 W7
POWER
10u/6.3V_6 10u/6.3V_6 10u/6.3V_6 10u/6.3V_6 10u/6.3V_6 10u/6.3V_6 10u/6.3V_6 10u/6.3V_6 AC30 AF10 R207 EV@0_4 AH19 W4
C VCC36 VTT0_33 VAXG34 VDDQ10 C
AC29 VCC37 VTT0_34 AE10 AH18 VAXG35 VDDQ11 U1
AC28 VCC38 VTT0_35 AC10 AH16 VAXG36 VDDQ12 T7
CPU CORE SUPPLY

AC27 AB10 C372 C388 T4 +
VCC39 VTT0_36 22u_8 22u_8 VDDQ13 C363 C375 C328
AC26 VCC40 VTT0_37 Y10 VDDQ14 P1
AA35 W10 N7 22u_8 22u_8 330u/2V_7343
VCC41 VTT0_38 VDDQ15
AA34 VCC42 VTT0_39 U10 VDDQ16 N4
DDR3
AA33 VCC43 VTT0_40 T10 VDDQ17 L1
AA32 VCC44 VTT0_41 J12 +1.1V_VTT J24 VTT1_45 VDDQ18 H1
FDI
C771 C356 C739 C752 C745 C384 C734 C334 AA31 J11 J23
VCC45 VTT0_42 VTT1_46
10u/6.3V_6 10u/6.3V_6 10u/6.3V_6 10u/6.3V_6 10u/6.3V_6 10u/6.3V_6 10u/6.3V_6 10u/6.3V_6 AA30 VCC46 VTT0_43 J16 +VTT_43 R128 *SHORT_4 H25 VTT1_47
AA29 VCC47 VTT0_44 J15 +VTT_44 R123 *SHORT_4 C317 C713
AA28 22u_8 22u_8
AA27
VCC48
VCC49
(15mils) VTT0_59 P10 +1.1V_VTT
AA26 VCC50 VTT0_60 N10
Y35 C305 L10
VCC51 1u/10V_4 VTT0_61 C324 C307
Y34 VCC52 VTT0_62 K10
Y33 10u/6.3V_6 10u/6.3V_6
VCC53
Y32 VCC54
Y31 VCC55
Y30 VCC56
1.1V
Y29 VCC57 VTT1_63 J22
Y28 VCC58 +1.1V_VTT K26 VTT1_48 VTT1_64 J20
Y27 VCC59 J27 VTT1_49 VTT1_65 J18
PEG & DMI

Y26 J26 H21 C715 C714
VCC60 H_PSI# C731 C342 C319 C318 VTT1_50 VTT1_66 22u_8 22u_8
V35 VCC61 PSI# AN33 H_PSI# (40) J25 VTT1_51 VTT1_67 H20
V34 22u_8 22u_8 22u_8 22u_8 H27 H19
POWER
VCC62 VTT1_52 VTT1_68

V33 VCC63 G28 VTT1_53
V32 AK35 H_VID0 H_VID0 (40) G27
VCC64 VID[0] H_VID1 VTT1_54
V31 VCC65 VID[1] AK33
H_VID2
H_VID1 (40) G26 VTT1_55 0.6A
V30 VCC66 VID[2] AK34 H_VID2 (40) F26 VTT1_56
V29 AL35 H_VID3 H_VID3 (40) E26 L26 +1.8V
VCC67 VID[3] VTT1_57 VCCPLL1
CPU VIDS
1.8V
V28 AL33 H_VID4 H_VID4 (40) E25 L27
B VCC68 VID[4] H_VID5 VTT1_58 VCCPLL2 B
V27 VCC69 VID[5] AM33 H_VID5 (40) VCCPLL3 M26
V26 AM35 H_VID6 H_VID6 (40) C311 C312 C314 C315 C316
VCC70 VID[6] H_DPRSLPVR 1u/10V_4 1u/10V_4 2.2u_6 4.7u_6 22u_8
U35 VCC71 PROC_DPRSLPVR AM34 H_DPRSLPVR (40)
U34 VCC72
U33 VCC73
U32 VCC74
U31 G15 H_VTTVID1
VCC75 VTT_SELECT TP4
U30 VCC76
U29 H_VTTVID1=Low, 1.1V Clarksfield/Auburndale
VCC77
U28
U27
VCC78 H_VTTVID1=High, 1.05V
VCC79
U26 VCC80
R35 VCC81
R34 VCC82
R33 +1.1V_VTT
VCC83
R32 VCC84 ISENSE AN35 I_MON (40)
R31 VCC85
R30 VCC86
R29 R520 100_4 +VCC_CORE
VCC87
SENSE LINES
R28 VCC88 VCC_SENSE AJ34 VCCSENSE (40)

R27 AJ35 VSSSENSE (40) R527 R524 R529 R531 R533 R537 R535 R539 R541
VCC89 VSS_SENSE R522 100_4 1K_4 1K_4 1K_4 *1K_4 *1K_4 1K_4 *1K_4 1K_4 *1K_4
R26 VCC90
P35 VCC91
P34 B15 VTT_SENSE H_VID0
VCC92 VTT_SENSE TP43
P33 A15 VSS_SENSE_VTT H_VID1
VCC93 VSS_SENSE_VTT TP44
P32 H_VID2
VCC94 H_VID3
P31 VCC95
P30 H_VID4
VCC96 H_VID5
P29 VCC97
P28 H_VID6
VCC98 H_DPRSLPVR
P27 VCC99
P26 H_PSI#
A VCC100 A
R526 R523 R528 R530 R532 R536 R534 R538 R540

*1K_4 *1K_4 *1K_4 1K_4 1K_4 *1K_4 1K_4 *1K_4 1K_4
Clarksfield/Auburndale
Note:
For Validating IMVP VR R6451 should be STUFF
HFM_VID : Max 1.4V
and R2N1 NO_STUFF LFM_VID : Min 0.65V PROJECT : ZY9B
AUBURNDALE/CLARKSFIELD PROCESSOR (POWER) Size Document Number Rev
1A
AUBURNDA 3/4 (PWR)
Date: Tuesday, September 22, 2009 Sheet 6 of 49
5 4 3 2 1
5 4 3 2 1
AUBURNDALE/CLARKSFIELD PROCESSOR (GND) AUBURNDALE/CLARKSFIELD PROCESSOR( RESERVED, CFG)

U45H U45I U45E
AT20 VSS1 VSS81 AE34 RSVD32 AJ13

AT17 VSS2 VSS82 AE33 RSVD33 AJ12
AR31 VSS3 VSS83 AE32 K27 VSS161
AR28 VSS4 VSS84 AE31 K9 VSS162 AP25 RSVD1
AR26 VSS5 VSS85 AE30 K6 VSS163 AL25 RSVD2 RSVD34 AH25
AR24 VSS6 VSS86 AE29 K3 VSS164 AL24 RSVD3 RSVD35 AK26
AR23 VSS7 VSS87 AE28 J32 VSS165 AL22 RSVD4
AR20 VSS8 VSS88 AE27 J30 VSS166 AJ33 RSVD5 RSVD36 AL26
AR17 VSS9 VSS89 AE26 J21 VSS167 AG9 RSVD6 RSVD_NCTF_37 AR2
D AR15 AE6 J19 M27 D
VSS10 VSS90 VSS168 RSVD7
AR12 VSS11 VSS91 AD10 H35 VSS169 L28 RSVD8 RSVD38 AJ26
AR9 VSS12 VSS92 AC8 H32 VSS170 (14,16) VREF_DQ_DIMM0 J17 SA_DIMM_VREF RSVD39 AJ27
AR6 VSS13 VSS93 AC4 H28 VSS171 (15,16) VREF_DQ_DIMM1 H17 SB_DIMM_VREF
AR3 VSS14 VSS94 AC2 H26 VSS172 G25 RSVD11
AP20 VSS15 VSS95 AB35 H24 VSS173 G17 RSVD12
AP17 VSS16 VSS96 AB34 H22 VSS174 E31 RSVD13 RSVD_NCTF_40 AP1
AP13 VSS17 VSS97 AB33 H18 VSS175 E30 RSVD14 RSVD_NCTF_41 AT2
AP10 VSS18 VSS98 AB32 H15 VSS176
AP7 VSS19 VSS99 AB31 H13 VSS177 RSVD_NCTF_42 AT3
AP4 VSS20 VSS100 AB30 H11 VSS178 RSVD_NCTF_43 AR1
AP2 VSS21 VSS101 AB29 H8 VSS179
AN34 VSS22 VSS102 AB28 H5 VSS180
AN31 VSS23 VSS103 AB27 H2 VSS181
AN23 VSS24 VSS104 AB26 G34 VSS182 RSVD45 AL28
AN20 AB6 G31 CFG0 AM30 AL29
VSS25 VSS105 VSS183 CFG[0] RSVD46
AN17 VSS26 VSS106 AA10 G20 VSS184 AM28 CFG[1] RSVD47 AP30
AM29 VSS27 VSS107 Y8 G9 VSS185 AP31 CFG[2] RSVD48 AP32
AM27 Y4 G6 CFG3 AL32 AL27
VSS28 VSS108 VSS186 CFG4 CFG[3] RSVD49
AM25 VSS29 VSS109 Y2 G3 VSS187 AL30 CFG[4] RSVD50 AT31
AM20 VSS30 VSS110 W35 F30 VSS188 AM31 CFG[5] RSVD51 AT32
AM17 VSS31 VSS111 W34 F27 VSS189 AN29 CFG[6] RSVD52 AP33
AM14 W33 F25 CFG7 AM32 AR33
VSS32 VSS112 VSS190 CFG[7] RSVD53
AM11 VSS33 VSS113 W32 F22 VSS191 AK32 CFG[8] RSVD_NCTF_54 AT33
AM8 W31 F19 AK31 AT34
RESERVED
VSS34 VSS114 VSS192 CFG[9] RSVD_NCTF_55
AM5 VSS35 VSS115 W30 F16 VSS193 AK28 CFG[10] RSVD_NCTF_56 AP35
AM2 VSS36 VSS116 W29 E35 VSS194 AJ28 CFG[11] RSVD_NCTF_57 AR35
AL34 W28 E32 AN30 AR32
C AL31
AL23
VSS37
VSS38
VSS39
VSS VSS117
VSS118
VSS119
W27
W26
E29
E24
VSS195
VSS196
VSS197
VSS AN32
AJ32
CFG[12]
CFG[13]
CFG[14]
RSVD58
C
AL20 VSS40 VSS120 W6 E21 VSS198 AJ29 CFG[15] RSVD_TP_59 E15

AL17 VSS41 VSS121 V10 E18 VSS199 AJ30 CFG[16] RSVD_TP_60 F15
AL12 VSS42 VSS122 U8 E13 VSS200 AK30 CFG[17] KEY A2
AL9 VSS43 VSS123 U4 E11 VSS201 H16 RSVD_TP_86 RSVD62 D15
AL6 VSS44 VSS124 U2 E8 VSS202 RSVD63 C15
AL3 VSS45 VSS125 T35 E5 VSS203 RSVD64 AJ15 TP6
AK29 VSS46 VSS126 T34 E2 VSS204 VSS_NCTF1 AT35 RSVD65 AH15 TP5
AK27 VSS47 VSS127 T33 D33 VSS205 VSS_NCTF2 AT1
AK25 VSS48 VSS128 T32 D30 VSS206 VSS_NCTF3 AR34 TP47 B19 RSVD15
AK20 VSS49 VSS129 T31 D26 VSS207 VSS_NCTF4 B34 TP45 A19 RSVD16
AK17 T30 D9 B2 TP3
NCTF
VSS50 VSS130 VSS208 VSS_NCTF5
AJ31 VSS51 VSS131 T29 D6 VSS209 VSS_NCTF6 B1 TP2 A20 RSVD17
AJ23 VSS52 VSS132 T28 D3 VSS210 VSS_NCTF7 A35 TP1 B20 RSVD18
AJ20 VSS53 VSS133 T27 C34 VSS211 RSVD_TP_66 AA5
AJ17 VSS54 VSS134 T26 C32 VSS212 U9 RSVD19 RSVD_TP_67 AA4
AJ14 VSS55 VSS135 T6 C29 VSS213 T9 RSVD20 RSVD_TP_68 R8
AJ11 VSS56 VSS136 R10 C28 VSS214 RSVD_TP_69 AD3
AJ8 VSS57 VSS137 P8 C24 VSS215 AC9 RSVD21 RSVD_TP_70 AD2
AJ5 VSS58 VSS138 P4 C22 VSS216 AB9 RSVD22 RSVD_TP_71 AA2
AJ2 VSS59 VSS139 P2 C20 VSS217 RSVD_TP_72 AA1
AH35 VSS60 VSS140 N35 C19 VSS218 RSVD_TP_73 R9
AH34 VSS61 VSS141 N34 C16 VSS219 RSVD_TP_74 AG7
AH33 VSS62 VSS142 N33 B31 VSS220 C1 RSVD_NCTF_23 RSVD_TP_75 AE3
AH32 VSS63 VSS143 N32 B25 VSS221 A3 RSVD_NCTF_24
AH31 VSS64 VSS144 N31 B21 VSS222
AH30 VSS65 VSS145 N30 B18 VSS223 RSVD_TP_76 V4
B AH29 VSS66 VSS146 N29 B17 VSS224 RSVD_TP_77 V5 B
AH28 VSS67 VSS147 N28 B13 VSS225 RSVD_TP_78 N2
AH27 VSS68 VSS148 N27 B11 VSS226 J29 RSVD26 RSVD_TP_79 AD5
AH26 VSS69 VSS149 N26 B8 VSS227 J28 RSVD27 RSVD_TP_80 AD7
AH20 VSS70 VSS150 N6 B6 VSS228 RSVD_TP_81 W3
AH17 VSS71 VSS151 M10 B4 VSS229 A34 RSVD_NCTF_28 RSVD_TP_82 W2
AH13 VSS72 VSS152 L35 A29 VSS230 A33 RSVD_NCTF_29 RSVD_TP_83 N3
AH9 VSS73 VSS153 L32 A27 VSS231 RSVD_TP_84 AE5
AH6 VSS74 VSS154 L29 A23 VSS232 C35 RSVD_NCTF_30 RSVD_TP_85 AD9
AH3 VSS75 VSS155 L8 A9 VSS233 B35 RSVD_NCTF_31
AG10 VSS76 VSS156 L5
AF8 VSS77 VSS157 L2 VSS AP34 TP46
AF4 VSS78 VSS158 K34
AF2 K33 AP34 can be NC on CRB; EDS/DG suggestion to GND
VSS79 VSS159
AE35 VSS80 VSS160 K30
Clarksfield/Auburndale
Clarksfield/Auburndale Clarksfield/Auburndale
Processor Strapping +1.1V_VTT
1 0
R547 3.01K/F_4 CFG4 R557 *3.01K/F_4
CFG4 Enabled; An external Display port R546 3.01K/F_4 CFG0 R544 *3.01K/F_4
A (Display Port Disabled; No Physical Display Port device is connected to the Embedded A
Presence) attached to Embedded Diplay Port Display port Use reverse type R545 *3.01K/F_4 CFG3 R542 3.01K/F_4
CFG0 CFG[ 1:0 ] - PCI_Epress Configuration Select CFG7 R543 *3.01K/F_4
(PCI-Epress * 11= 1 x 16 PEG

Single PEG Bifurcation enabled
Configuration Select)
* 10= 2 x 8 PEG
The Clarkfield processor's PCI Express interface may not meet Quanta Computer Inc.
PCI Express 2.0 jitter specifications. Intel recommends
CFG3 placing a 3.01K +/- 5% pull down resistor to VSS on CFG[7] pin PROJECT : ZY9B
(PCI-Epress Static Normal Operation Lane Numbers Reversed
for both rPGA and BGA components. This pull down resistor Size Document Number Rev
Lane Reversal) 1A
should be removed when this issue is fixed.(ES1 only) AUBURNDA 4/4
5 4 3 2 1
5 4 3 2 1
IBEX PEAK-M (DMI,FDI,GPIO)
Arrandale only
IBEX PEAK-M (LVDS,DDI)
U53C
BA18 FDI_TXN0_R R610 *A@0_4
FDI_RXN0 FDI_TXN0 (4)
BC24 BH17 FDI_TXN1_R R623 *A@0_4 U53D
(4) DMI_RXN0 DMI0RXN FDI_RXN1 FDI_TXN1 (4)
BJ22 BD16 FDI_TXN2_R R609 *A@0_4 T48 BJ46
(4) DMI_RXN1 DMI1RXN FDI_RXN2 FDI_TXN2 (4) (25) INT_LVDS_BLON L_BKLTEN SDVO_TVCLKINN
D AW20 BJ16 FDI_TXN3_R R634 *A@0_4 T47 BG46 D
(4) DMI_RXN2 DMI2RXN FDI_RXN3 FDI_TXN3 (4) (25) INT_LVDS_DIGON L_VDD_EN SDVO_TVCLKINP
BJ20 BA16 FDI_TXN4_R R620 *A@0_4
(4) DMI_RXN3 DMI3RXN FDI_RXN4 FDI_TXN4 (4)
BE14 FDI_TXN5_R R616 *A@0_4 Y48 BJ48
FDI_RXN5 FDI_TXN5 (4) (25) INT_LVDS_BRIGHT L_BKLTCTL SDVO_STALLN
BD24 BA14 FDI_TXN6_R R624 *A@0_4 BG48
(4) DMI_RXP0 DMI0RXP FDI_RXN6 FDI_TXN6 (4) SDVO_STALLP
BG22 BC12 FDI_TXN7_R R632 *A@0_4 AB48
(4) DMI_RXP1 DMI1RXP FDI_RXN7 FDI_TXN7 (4) (25) INT_LVDS_EDIDCLK L_DDC_CLK
(4) DMI_RXP2 BA20 DMI2RXP (25) INT_LVDS_EDIDDATA Y45 L_DDC_DATA SDVO_INTN BF45
BG20 BB18 FDI_TXP0_R R613 *A@0_4 BH45
(4) DMI_RXP3 DMI3RXP FDI_RXP0 FDI_TXP0 (4) SDVO_INTP
BF17 FDI_TXP1_R R628 *A@0_4 +3V R258 *A@10K_4 AB46
FDI_RXP1 FDI_TXP1 (4) L_CTRL_CLK
BE22 BC16 FDI_TXP2_R R612 *A@0_4 R259 *A@10K_4 V48
(4) DMI_TXN0 DMI0TXN FDI_RXP2 FDI_TXP2 (4) L_CTRL_DATA
BF21 BG16 FDI_TXP3_R R637 *A@0_4
(4) DMI_TXN1 DMI1TXN FDI_RXP3 FDI_TXP3 (4)
BD20 AW16 FDI_TXP4_R R615 *A@0_4 R280 *A@2.37K/F_4 AP39 T51
(4) DMI_TXN2 DMI2TXN FDI_RXP4 FDI_TXP4 (4) LVD_IBG SDVO_CTRLCLK SDVO_CTRLCLK (26)
BE18 BD14 FDI_TXP5_R R621 *A@0_4 AP41 T53
(4) DMI_TXN3 DMI3TXN FDI_RXP5 FDI_TXP5 (4) LVD_VBG SDVO_CTRLDATA SDVO_CTRLDAT (26)
BB14 FDI_TXP6_R R631 *A@0_4
FDI_RXP6 FDI_TXP6 (4)
BD22 BD12 FDI_TXP7_R R630 *A@0_4 R274 *A@0_4 AT43
(4) DMI_TXP0 DMI0TXP FDI_RXP7 FDI_TXP7 (4) LVD_VREFH
BH21 R273 *A@0_4 AT42 BG44
(4) DMI_TXP1 DMI1TXP LVD_VREFL DDPB_AUXN
(4) DMI_TXP2 BC20 DMI2TXP DDPB_AUXP BJ44
(4) DMI_TXP3 BD18 DMI3TXP FDI_INT BJ14 FDI_INT (4) DDPB_HPD AU38 INT_HDMI_HPD (26)
LVDS
R643 EV@1K_4 (25) INT_TXLCLKOUT- INT_TXLCLKOUT- AV53
DMI
FDI
INT_TXLCLKOUT+ AV51 LVDSA_CLK# INT_HDMITX2N_R C474 *A@.1u_4
FDI_FSYNC0 BF13 FDI_FSYNC0 (4) (25) INT_TXLCLKOUT+ LVDSA_CLK DDPB_0N BD42 INT_HDMITX2N (26)
BH25 R657 EV@1K_4 BC42 INT_HDMITX2P_R C472 *A@.1u_4
DMI_ZCOMP DDPB_0P INT_HDMITX2P (26)
BH13 INT_TXLOUT0- BB47 BJ42 INT_HDMITX1N_R C837 *A@.1u_4
FDI_FSYNC1 FDI_FSYNC1 (4) (25) INT_TXLOUT0- LVDSA_DATA#0 DDPB_1N INT_HDMITX1N (26)
Digital Display Interface

+1.05V R638 49.9/F_4 BF25 R644 EV@1K_4 INT_TXLOUT1- BA52 BG42 INT_HDMITX1P_R C835 *A@.1u_4
DMI_IRCOMP (25) INT_TXLOUT1- LVDSA_DATA#1 DDPB_1P INT_HDMITX1P (26)
BJ12 INT_TXLOUT2- AY48 BB40 INT_HDMITX0N_R C478 *A@.1u_4
FDI_LSYNC0 FDI_LSYNC0 (4) (25) INT_TXLOUT2- LVDSA_DATA#2 DDPB_2N INT_HDMITX0N (26)
R642 EV@1K_4 AV47 BA40 INT_HDMITX0P_R C482 *A@.1u_4
LVDSA_DATA#3 DDPB_2P INT_HDMITX0P (26)
BG14 AW38 INT_HDMICLK-_R C475 *A@.1u_4
FDI_LSYNC1 FDI_LSYNC1 (4) DDPB_3N INT_HDMICLK- (26)
R641 EV@1K_4 (25) INT_TXLOUT0+ INT_TXLOUT0+ BB48 BA38 INT_HDMICLK+_R C476 *A@.1u_4
LVDSA_DATA0 DDPB_3P INT_HDMICLK+ (26)
(25) INT_TXLOUT1+ INT_TXLOUT1+ BA50
INT_TXLOUT2+ LVDSA_DATA1
C (25) INT_TXLOUT2+ AY49 LVDSA_DATA2 C
AV48 LVDSA_DATA3 DDPC_CTRLCLK Y49
DDPC_CTRLDATA AB49
INT_TXUCLKOUT- AP48
(25) INT_TXUCLKOUT- LVDSB_CLK#
XDP_DBRST# T6 J12 INT_TXUCLKOUT+AP47 BE44
(4,16) XDP_DBRST# SYS_RESET# WAKE# PCIE_WAKE# (28,32) (25) INT_TXUCLKOUT+ LVDSB_CLK DDPC_AUXN
DDPC_AUXP BD44
INT_TXUOUT0- AY53 AV40
(25) INT_TXUOUT0- LVDSB_DATA#0 DDPC_HPD
SYS_PWROK M6 Y1 INT_TXUOUT1- AT49
SYS_PWROK CLKRUN# / GPIO32 CLKRUN# (37) (25) INT_TXUOUT1- LVDSB_DATA#1
INT_TXUOUT2- AU52 BE40
(25) INT_TXUOUT2- LVDSB_DATA#2 DDPC_0N
AT53 BD40
System Power Management
LVDSB_DATA#3 DDPC_0P
B17 PWROK DDPC_1N BF41
INT_TXUOUT0+ AY51 BH41
(25) INT_TXUOUT0+ LVDSB_DATA0 DDPC_1P
INT_TXUOUT1+ AT48 BD38
(25) INT_TXUOUT1+ LVDSB_DATA1 DDPC_2N
K5 P8 SUS_STAT# TP35 INT_TXUOUT2+ AU50 BC38
MEPWROK SUS_STAT# / GPIO61 (25) INT_TXUOUT2+ LVDSB_DATA2 DDPC_2P
AT51 LVDSB_DATA3 DDPC_3N BB36
DDPC_3P BA36
RSV_ICH_LAN_RST# A10 F3
LAN_RST# SUSCLK / GPIO62 ICH_SUSCLK (37)
INT_CRT_BLU AA52 U50
(25) INT_CRT_BLU CRT_BLUE DDPD_CTRLCLK
D9 E4 SLP_S5#_R TP41 INT_CRT_GRN AB53 U52
(4,16) PM_DRAM_PWRGD DRAMPWROK SLP_S5# / GPIO63 (25) INT_CRT_GRN CRT_GREEN DDPD_CTRLDATA
INT_CRT_RED AD53
(25) INT_CRT_RED CRT_RED
(37) ICH_RSMRST# C16 RSMRST# SLP_S4# H7 SUSC# (37) DDPD_AUXN BC46

(25) INT_CRT_DDCCLK V51 CRT_DDC_CLK DDPD_AUXP BD46 R place close to PCH
(25) INT_CRT_DDCDAT V53 CRT_DDC_DATA DDPD_HPD AT38
SUS_PWR_ACK_R M1 P12 R589 *A@150_4INT_CRT_BLU
SUS_PWR_DN_ACK / GPIO30 SLP_S3# SUSB# (37)
B DDPD_0N BJ40 B
R590 *A@0_4 HSYNC_G Y53 BG40 R588 *A@150_4INT_CRT_GRN
(25) INT_HSYNC CRT_HSYNC DDPD_0P
P5 K8 SLP_M# R345 *0_4 R591 *A@0_4 VSYNC_G Y51 BJ38
(16,37) DNBSWON# PWRBTN# SLP_M# (25) INT_VSYNC CRT_VSYNC DDPD_1N
BG38 R587 *A@150_4INT_CRT_RED
DDPD_1P
CRT
DDPD_2N BF37
R332 *0_4 ACIN_R P7 N2 TP67 DAC_IREF AD48 BH37
(37) PCH_ACIN ACPRESENT / GPIO31 TP23 DAC_IREF DDPD_2P
AB51 CRT_IRTN DDPD_3N BE36
DDPD_3P BD36
PM_BATLOW# A6 BJ10 R269
BATLOW# / GPIO72 PMSYNCH PM_SYNC (4)
1K/F_4 IbexPeak-M_R1P0
PM_RI# F14 F6 PM_SLP_LAN# TP38

RI# SLP_LAN# / GPIO29
IbexPeak-M_R1P0
PCH Pull-high/low System PWR_OK

+3V_S5
+3V
PM_RI# R319 10K_4

CLKRUN# R713 8.2K_4 +3V_S5
PM_BATLOW# R683 8.2K_4 DELAY_VR_PWRGOOD need PU 2K to +3V.
XDP_DBRST# R355 1K_4 C569 *.1u_4
A
PCIE_WAKE# R321 1K_4
PU at power side A
5
ICH_RSMRST# R298 10K_4 PM_SLP_LAN# R313 *10K_4 1 DELAY_VR_PWRGOOD (4,40)
SYS_PWROK 4
RSV_ICH_LAN_RST# R674 10K_4 SUS_PWR_ACK_R R696 10K_4 2
U31
PWROK_EC (37)
3
SYS_PWROK R359 10K_4 ACIN_R R326 10K_4 R371 100K_4
TC7SH08FU
PROJECT : ZY9B
1A
IBEX PEAK-M 1/6
5 4 3 2 1
5 4 3 2 1
C878
RTC Circuitry 15p_4
IBEX PEAK-M (HDA,JTAG,SATA)
2
1
+VCCRTC
D32 Y7
R667
+3VPCU U53A
20mils R658 20K/F_4 RTC_RST# 32.768KHZ 10M_4
VCCRTC_1
C883
3
4
1
20MIL J1 RTC_X1 B13 D33
RTCX1 FWH0 / LAD0 LPC_LAD0 (32,37)
BAT54C C866 15p_4 RTC_X2 D13 B33
RTCX2 FWH1 / LAD1 LPC_LAD1 (32,37)
1u/10V_4 C32
FWH2 / LAD2 LPC_LAD2 (32,37)
30mils *SHORT_ PAD1 A32 LPC_LAD3 (32,37)
2
RTC_RST# FWH3 / LAD3
C14 RTCRST#
FWH4 / LFRAME# C34 LPC_LFRAME# (32,37)
SRTC_RST# D17
D
R666 20K/F_4 SRTC_RST# SRTCRST# PCH_DRQ#0 D
A34 TP65
RTC
LPC
R289 1M_4 SM_INTRUDER# A16 LDRQ0# PCH_DRQ#1
+VCCRTC INTRUDER# LDRQ1# / GPIO23 F34 TP23
1
R290 J2 R347 10K_4 +3V
1K_4 C523 C879 PCH_INVRMEN A14 AB9
INTVRMEN SERIRQ IRQ_SERIRQ (37)
1u/10V_4 1u/10V_4
*SHORT_ PAD1
2
HDA_SYNC (PCH strap pin) ACZ_BIT_CLK A30 HDA_BCLK
SATA0RXN AK7 SATA_RX0- (31)
20MIL Internal weak pull-down ACZ_SYNC D29 AK6
HDA_SYNC SATA0RXP SATA_RX0+ (31)
VCCVRM=>+1.8V (default) SATA0TXN AK11 SATA_TXN0_C C269 .01u/16V_4
SATA_TX0- (31) SATA HDD
VCCRTC_2 1 3 RTC_N01 R288 22K_6 external pull-up P1 AK9 SATA_TXP0_C C268 .01u/16V_4
+5V_S5 (29) SPKR SPKR SATA0TXP SATA_TX0+ (31)
Q27 R286 VCCVRM=>+1.5V ACZ_RST# CAP. Close connect side
C30 HDA_RST#
20MIL SATA1RXN AH6 SATA_RX1- (31)
1
MMBT3904 68.1K/F_4 AH5

SATA1RXP SATA_RX1+ (31)
CN30
(29) PCH_AZ_CODEC_SDIN0 G30 AH9 SATA_TXN1_C C395 .01u/16V_4
SATA_TX1- (31) SATA ODD
2
RTC_N03 HDA_SDIN0 SATA1TXN

RTC_ML2032 SATA1TXP AH8 SATA_TXP1_C C399 .01u/16V_4
SATA_TX1+ (31)
TP27 F30 HDA_SDIN1
SATA2RXN AF11
R296 E32 AF9
TP26
IHDA
HDA_SDIN2 SATA2RXP
AF7
2
150K/F_6 SATA2TXN
TP25 F32 HDA_SDIN3 SATA2TXP AF6 Note:
AH3 SATA port2/3 may not be available on all PCH sku
ACZ_SDOUT SATA3RXN
B29 HDA_SDO SATA3RXP AH1 (HM55 support 4port only)
SATA3TXN AF3
SATA3TXP AF1
HDA_DOCK_EN# H32
SATA
HDA_DOCK_EN# / GPIO33 SATA_RX2N_C C571 .01u/16V_4
SATA4RXN AD9 SATA_RX2- (34)
+3V_S5 R283 10K_4 PCH_GPIO13 J30 AD8 SATA_RX2P_C C570 .01u/16V_4
HDA_DOCK_RST# / GPIO13 SATA4RXP SATA_RX2+ (34)
AD6 SATA_TXN2_C C555 .01u/16V_4 E-SATA
SATA4TXN SATA_TX2- (34)
AD5 SATA_TXP2_C C556 .01u/16V_4
SATA4TXP SATA_TX2+ (34)
HDA Bus M3 JTAG_TCK SATA5RXN AD3 SATA_RX3- (31)
SATA5RXP AD1 SATA_RX3+ (31)
K3 JTAG_TMS SATA5TXN AB3 SATA_TXN3_C C540 .01u/16V_4
SATA_TX3- (31) 2ND SATA HDD
C R633 33_4 ACZ_SYNC AB1 SATA_TXP3_C C543 .01u/16V_4 C
(29) PCH_AZ_CODEC_SYNC SATA5TXP SATA_TX3+ (31)
K1 JTAG_TDI
JTAG
R617 33_4 ACZ_RST# J2 AF16
(29) PCH_AZ_CODEC_RST# JTAG_TDO SATAICOMPO
J4 AF15 R291 37.4/F_4 +1.05V
R636 33_4 ACZ_SDOUT TRST# SATAICOMPI
(29) PCH_AZ_CODEC_SDOUT
SPI_CLK_R BA2 SPI_CLK

R627 33_4 ACZ_BIT_CLK SPI_CS0#_R AV3
(29) PCH_AZ_CODEC_BITCLK SPI_CS0#
+3VPCU R699 *10K_4 SPI_CS1# AY3 T3

SPI_CS1# SATALED# SATA_ACT# (35)
C845
*27p_4
SPI_SI_R AY1 Y9 R329 10K/F_4 +3V
SPI_MOSI SATA0GP / GPIO21
SPI
SPI_SO_R AV1 V1 R716 10K/F_4 +3V
SPI_MISO SATA1GP / GPIO19
Place all series terms close to PCH except for SDIN input PCH Strap Table IbexPeak-M_R1P0
lines,which should be close to source.Placement of R773, R775,
R776 & R777 should equal distance to the T split trace point. Pin Name Strap description Sampled Configuration ZY9B note
Basically, keep the same distance from T for all series
termination resistors. 0 = Default (weak pull-down 20K)
SPKR No reboot mode setting PWROK +3V R702 *10K_4 SPKR
1 = Setting to No-Reboot mode
1 = Default (weak pull-up 20K)
INIT3_3V Reserved PWROK Should not be pull-down
PCH SPI
0 = "top-block swap" mode
GNT3# / GPIO55 Top-Block Swap Override PWROK R584 *10K_4
1 = Default (weak pull-up 20K) PCI_GNT3# (10)
+3V
B B
U30
SPI_CS0#_R 1 8 INTVRMEN Integrated 1.05V VRM enable ALWAYS Should be always pull-up +VCCRTC R662 330K_4 PCH_INVRMEN
SPI_CLK_R CE# VDD
6 SCK
SPI_SI_R 5
SPI_SO_R SI
2 SO HOLD# 7 R323 3.3K/F_4
GNT1# / GPIO51 Boot BIOS Selection 1 [bit-1] PWROK GNT1# GNT0# Boot Location Default weak pull-up on GNT0/1#
3 WP# VSS 4
C557 C553 [Need external pull-down for LPC BIOS]
*22p_4 W25Q32BVSSIG .1u/X7R_4 1 1 SPI +3V
R270 *1K_4
R256 *1K_4
1 0 PCI
+3V R364 3.3K/F_4 GNT0# Boot BIOS Selection 0 [bit-0] PWROK R272 1K_4
PCI_GNT0# (10)
R271 1K_4
PCI_GNT1# (10)
0 0 LPC
Should not be pull-down
GNT2# / GPIO53 ESI strap (Server only) PWROK (weak pull-up 20K) USE GPIO PIN
NV_ALE Intel Anti-Theft HDD protection PWROK 0 = Disable (Internal pull-down 32ohm) +1.8V R698 *1K_4 NV_ALE
NV_ALE (10,16)
NV_CLE DMI Termination voltage PWROK weak pull-down 32ohm +1.8V R697 *1K_4 NV_CLE
NV_CLE (10,16)
HDA_DOCK_EN#/GPIO33 Flash Descriptor Security PWROK 0 = Override R279 *1K_4

+3V R276 *10K_4 HDA_DOCK_EN#
1 = Default (weak pull-up 20K)
SPI_MOSI iTPM function Disable MEPWROK 0 = Default (weak pull-down 20K) +3V R352 *1K_4 SPI_SI_R
1 = Enable
Should not be pull-up
A HDA_SDO Reserved RSMRST# (weak pull-down 20K)
A
Should not be pull-down +3V_S5 R340 10K_4

RSV_GPIO8 (11)
GPIO8 Reserved RSMRST# (weak pull-up 20K)
GPIO27 On-die PLL Voltage Regulator RSMRST# 0 = Disable
1 = Enable (weak pull-up 20K)
HDA_SYNC
On-die PLL PWR supply select RSMRST# 0 = 1.8V supply (weak pull-down 20K) use defaul (0 = 1.8V supply)
1 = 1.5V supply
GPIO15 Reserved RSMRST# 0 = TLS no Confidentiality
PROJECT : ZY9B
+3V_S5 R330 1K_4 Size Document Number Rev
(weak pull-down 20K) CR_WAKE# (11,27)
1A
IBEX PEAK-M 2/6
1 = TLS Confidentiality
5 4 3 2 1
5 4 3 2 1
IBEX PEAK-M (PCI,USB,NVRAM) IBEX PEAK-M (PCI-E,SMBUS,CLK)

U53B
U53E
H40 AY9 BG30 B9 RSV_SMBALERT#
AD0 NV_CE#0 NV_CE#0 (16) (32) PCIE_RX1- PERN1 SMBALERT# / GPIO11
N34 AD1 NV_CE#1 BD1 NV_CE#1 (16) (32) PCIE_RX1+ BJ30 PERP1
C44 AP15 MiniWLAN C513 .1u_4 PCIE_TXN1_C BF29 H14 ICH_SMBCLK
AD2 NV_CE#2 NV_CE#2 (16) (32) PCIE_TX1- PETN1 SMBCLK ICH_SMBCLK (3,16,33)
A38 BD8 C511 .1u_4 PCIE_TXP1_C BH29
AD3 NV_CE#3 NV_CE#3 (16) (32) PCIE_TX1+ PETP1
C36 C8 ICH_SMBDATA
AD4 SMBDATA ICH_SMBDATA (3,16,33)
J34 AD5 NV_DQS0 AV9 NV_DQS0 (16) (32) PCIE_RX2- AW30 PERN2
A40 AD6 NV_DQS1 BG8 NV_DQS1 (16) (32) PCIE_RX2+ BA30 PERP2
D45 Mini TV C517 .1u_4 PCIE_TXN2_C BC30 J14 RSV_SML0ALERT#
D AD7 (32) PCIE_TX2- PETN2 SML0ALERT# / GPIO60 D
E36 AP7 C516 .1u_4 PCIE_TXP2_C BD30
AD8 NV_DQ0 / NV_IO0 NV_DQ0 (16) (32) PCIE_TX2+ PETP2
H48 AP6 C6 SMB_CLK_ME0
AD9 NV_DQ1 / NV_IO1 NV_DQ1 (16) SML0CLK
T40
E40 AT6 AU30
For LAN
SMBus
AD10 NV_DQ2 / NV_IO2 NV_DQ2 (16) PERN3
C40 AT9 T39 AT30 G8 SMB_DATA_ME0
AD11 NV_DQ3 / NV_IO3 NV_DQ3 (16) PERP3 SML0DATA
M48 BB1 T37 AU32
AD12 NV_DQ4 / NV_IO4 NV_DQ4 (16) PETN3
M45 AV6 T38 AV32
AD13 NV_DQ5 / NV_IO5 NV_DQ5 (16) PETP3
F53 BB3 M14 RSV_SML1ALERT# R324 *0_4
AD14 NV_DQ6 / NV_IO6 NV_DQ6 (16) SML1ALERT# / GPIO74 SML1ALERT# (11,36,37)
M40 AD15 NV_DQ7 / NV_IO7 BA4 NV_DQ7 (16) (33) PCIE_RX4- BA32 PERN4 SMB_CLK_ME1
NVRAM
M43 AD16 NV_DQ8 / NV_IO8 BE4 NV_DQ8 (16) Express Card (33) PCIE_RX4+ BB32 PERP4 SML1CLK / GPIO58 E10
C496 .1u_4 PCIE_TXN4_C
J36
K48
AD17 NV_DQ9 / NV_IO9 BB6
BD6
NV_DQ9 (16) (33) PCIE_TX4-
C497 .1u_4 PCIE_TXP4_C
BD32
BE32
PETN4
G12 SMB_DATA_ME1 For EC
AD18 NV_DQ10 / NV_IO10 NV_DQ10 (16) (33) PCIE_TX4+ PETP4 SML1DATA / GPIO75
F40 BB7
PCI-E*
AD19 NV_DQ11 / NV_IO11 NV_DQ11 (16)
C42 AD20 NV_DQ12 / NV_IO12 BC8 NV_DQ12 (16) (27) PCIE_RX8- BF33 PERN5
K46 BJ8 JMB380 BH33 T13 CL_CLK1
AD21 NV_DQ13 / NV_IO13 NV_DQ13 (16) (27) PCIE_RX8+ PERP5 CL_CLK1 CL_CLK1 (32)
Controller
M51 BJ6 C503 .1u_4 PCIE_TXN8_C BG32
AD22 NV_DQ14 / NV_IO14 NV_DQ14 (16) (27) PCIE_TX8- PETN5
J52 BG6 C505 .1u_4 PCIE_TXP8_C BJ32 T11 CL_DATA1
AD23 NV_DQ15 / NV_IO15 NV_DQ15 (16) (27) PCIE_TX8+ PETP5 CL_DATA1 CL_DATA1 (32)
K51
Link
AD24 NV_ALE CL_RST1#
L34 AD25 NV_ALE BD3 NV_ALE (9,16) (28) PCIE_RX6- BA34 PERN6 CL_RST1# T9 CL_RST1# (32)
F42 AY6 NV_CLE AW34
AD26 NV_CLE NV_CLE (9,16) (28) PCIE_RX6+ PERP6
J40 LAN C487 .1u_4 PCIE_TXN6_C BC34
AD27 (28) PCIE_TX6- PETN6
G46 C490 .1u_4 PCIE_TXP6_C BD34
AD28 (28) PCIE_TX6+ PETP6
F44 AU2 NV_RCOMP R316 *32.4/F_4 H1 PEG_CLKREQ#_RR694 *0_4
AD29 NV_RCOMP PEG_A_CLKRQ# / GPIO47 PEG_CLKREQ# (18)
M47 AD30 AT34 PERN7
PCI
H36 AV7 AU34 PEG_A_CLKRQ# PD for FreeRun, due GPU not support.
AD31 NV_RB# NV_R_B# (16) PERP7
AU36 PETN7 CLKOUT_PEG_A_N AD43 CLK_PCIE_VGA# (17)
J50 C/BE0# NV_WR#0_RE# AY8 NV_RE#_WR#0 (16) AV36 PETP7 CLKOUT_PEG_A_P AD45 CLK_PCIE_VGA (17)
G42 C/BE1# NV_WR#1_RE# AY5 NV_RE#_WR#1 (16) Note:
H47 BG34 AN4 CLK_PCIE_3GPLL# (4)
C/BE2# PCIE port7/8 may not be available on all PCH sku PERN8 CLKOUT_DMI_N
PEG
G34 C/BE3# NV_WE#_CK0 AV11 NV_WE#_CK0 (16) BJ34 PERP8 CLKOUT_DMI_P AN2 CLK_PCIE_3GPLL (4)
PCI_PIRQA# NV_WE#_CK1 BF5 NV_WE#_CK1 (16) (HM55 support 6port only) BG36 PETN8
TP24 G38 BJ36
PCI_PIRQB# PIRQA# PETP8 Correct DPLL_REF_SSCLK/
H51 PIRQB# Port1 and port9 can be used on debug mode CLKOUT_DP_N / CLKOUT_BCLK1_N AT1 DPLL_REF_SSCLK# (4)
PCI_PIRQC# B37 H18 AT3 DPLL_REF_SSCLK# at B-test
PIRQC# USBP0N USBP0- (33) CLKOUT_DP_P / CLKOUT_BCLK1_P DPLL_REF_SSCLK (4)
TP59 PCI_PIRQD# A44 J18 Express Card AK48
PIRQD# USBP0P USBP0+ (33) CLKOUT_PCIE0N
USBP1N A18 USBP1- (34) AK47 CLKOUT_PCIE0P
From CLK BUFFER

PCI_REQ0# F51 C18 M/B USB AW24
C REQ0# USBP1P USBP1+ (34) CLKIN_DMI_N CLK_BUF_PCIE_3GPLL# (3) C
TP58 PCI_REQ1# A46 N20 CLK_PCIE_REQ0# P9 BA24
REQ1# / GPIO50 USBP2N USBP2- (36) PCIECLKRQ0# / GPIO73 CLKIN_DMI_P CLK_BUF_PCIE_3GPLL (3)
dGPU_SELECT# B45 P20 Finger Printer
(25,26) dGPU_SELECT# REQ2# / GPIO52 USBP2P USBP2+ (36)
PCI_REQ3# M53 J20
REQ3# / GPIO54 USBP3N USBP3- (34)
USBP3P L20 USBP3+ (34) EXT-USB2 (32) CLK_PCH_SRC1# AM43 CLKOUT_PCIE1N CLKIN_BCLK_N AP3 CLK_BUF_BCLK# (3)
PCI_GNT0# F48 F20 EHCI1 Mini TV AM45 AP1
(9) PCI_GNT0# GNT0# USBP4N USBP4- (36) (32) CLK_PCH_SRC1 CLKOUT_PCIE1P CLKIN_BCLK_P CLK_BUF_BCLK (3)
PCI_GNT1# K45 G20 BLUETOOTH
(9) PCI_GNT1# GNT1# / GPIO51 USBP4P USBP4+ (36)
F36 A20 CLK_PCIE_REQ1#_R U4
(25) PWM_SELECT# GNT2# / GPIO53 USBP5N USBP5- (34) PCIECLKRQ1# / GPIO18
PCI_GNT3# H53 C20 Touch Screen F18
(9) PCI_GNT3# GNT3# / GPIO55 USBP5P USBP5+ (34) CLKIN_DOT_96N CLK_BUF_DREFCLK# (3)
M22 USBP6- TP32 E18
USBP6N CLKIN_DOT_96P CLK_BUF_DREFCLK (3)
TP61 PCI_PIRQE# B41 N22 USBP6+ TP33 USB port6/7 may not be available on all PCH sku AM47
PIRQE# / GPIO2 USBP6P (27) CLK_PCH_SRC2# CLKOUT_PCIE2N
PCI_PIRQF# K53 B21 USBP7- TP31 (HM55 support 12port only) JMB380 AM48
TP53 PIRQF# / GPIO3 USBP7N (27) CLK_PCH_SRC2 CLKOUT_PCIE2P
PCI_PIRQG# A36 D21 USBP7+ TP30 AH13
TP62 PIRQG# / GPIO4 USBP7P CLKIN_SATA_N / CKSSCD_N CLK_BUF_DREFSSCLK# (3)
PCI_PIRQH# A48 H22 CLK_PCIE_REQ2# N4 AH12
TP55 PIRQH# / GPIO5 USBP8N USBP8- (25) PCIECLKRQ2# / GPIO20 CLKIN_SATA_P / CKSSCD_P CLK_BUF_DREFSSCLK (3)
USBP8P J22 USBP8+ (25) Camera
USB
PCI_RST# K6 E22
(32) PCI_RST# PCIRST# USBP9N USBP9- (34)
USBP9P F22 USBP9+ (34) ESATA USB (32) CLK_PCH_SRC3# AH42 CLKOUT_PCIE3N REFCLK14IN P41 CLK_ICH_14M (3)
PCI_SERR# E44 A22 MiniWLAN AH41
TP18 SERR# USBP10N USBP10- (32) (32) CLK_PCH_SRC3 CLKOUT_PCIE3P
PCI_PERR# E50 C22 Mini Card (WWAN) C813 *18P_4
TP14 PERR# USBP10P USBP10+ (32)
G24 EHCI2 CLK_PCIE_REQ3# A8 J42 CLK_PCI_FB
USBP11N USBP11- (34) PCIECLKRQ3# / GPIO25 CLKIN_PCILOOPBACK
2
USBP11P H24 USBP11+ (34) EXT-USB1-1
PCI_IRDY# A42 L24 Y6
TP60 IRDY# USBP12N USBP12- (34)
PCI_PAR H44 M24 EXT-USB1-2 AM51 AH51 XTAL25_IN R592 *25MHz
TP20 PAR USBP12P USBP12+ (34) (33) CLK_PCH_SRC4# CLKOUT_PCIE4N XTAL25_IN
PCI_DEVSEL# F46 A24 Express Card AM53 AH53 XTAL25_OUT *1M_4
USBP13- (32) (33) CLK_PCH_SRC4
1
TP21 PCI_FRAME# DEVSEL# USBP13N CLKOUT_PCIE4P XTAL25_OUT
TP57 C46 FRAME# USBP13P C24 USBP13+ (32) Mini Card (WLAN)
CLK_PCIE_REQ4# M9 AF38 XCLK_RCOMP R275 90.9/F_4 +1.05V C812 *18P_4
(33) CLK_PCIE_REQ4# PCIECLKRQ4# / GPIO26 XCLK_RCOMP
PCI_PLOCK# D49
TP16 PLOCK# USB_BIAS
USBRBIAS# B25
PCI_STOP# D41 R664 AJ50 T45 CLK_FLEX0 T34
TP22 PCI_TRDY# STOP# 22.6/F_4 CLKOUT_PCIE5N CLKOUTFLEX0 / GPIO64
TP56 C48 TRDY# USBRBIAS D25 AJ52 CLKOUT_PCIE5P
No stuff XTAL25_IN and XTAL25_OUT circuitry
until integrated CG becomes PCH POR.
TP40 ICH_PME# M7 CLK_PCIE_REQ5# H6 P43 CLK_FLEX1 T35
Clock Flex
PME# USB_OC0# R379 0_4 OC0_10# PCIECLKRQ5# / GPIO44 CLKOUTFLEX1 / GPIO65
OC0# / GPIO59 N16 OC0_10# (34)
PCI_PLTRST# D5 J16
PLTRST# OC1# / GPIO40 OC6# (34)
F16 USB_OC2# AK53 T42 CLK_FLEX2 T36
OC2# / GPIO41 (28) CLK_PCIE_LOM# CLKOUT_PEG_B_N CLKOUTFLEX2 / GPIO66
R264 22_4 CLK_LPC_DEBUG_C N52 L16 USB_OC3# LAN AK51
(32) CLK_LPC_DEBUG CLKOUT_PCI0 OC3# / GPIO42 (28) CLK_PCIE_LOM CLKOUT_PEG_B_P
T58 CLK_PCI_PCCARD P53 E14 USB_OC4# R380 0_4
B R268 22_4 CLK_PCI_775_C CLKOUT_PCI1 OC4# / GPIO43 USB_OC5# R376 0_4 CLK_PCIE_LAN_REQ# P13 B
(37) CLK_PCI_775 P46 CLKOUT_PCI2 OC5# / GPIO9 G16 (28) CLK_PCIE_LAN_REQ# PEG_B_CLKRQ# / GPIO56 CLKOUTFLEX3 / GPIO67 N50 dGPU_EDIDSEL# (25,26)
CLK_PCI_FB R263 22_4 CLK_PCI_FB_C P51 F12 USB_OC6# R375 0_4
CLKOUT_PCI3 OC6# / GPIO10 OC11_12# (34)
P48 T15 USB_OC7#
CLKOUT_PCI4 OC7# / GPIO14 IbexPeak-M_R1P0 R582 10K_4 +3V
IbexPeak-M_R1P0
May be remove is OK
PEG_A_CLKRQ# PD for FreeRun, due GPU not support.

PLTRST# PCI/USBOC# Pull-up CLK_REQ/Strap Pin A16 swap override Strap/Top-Block SMBus/Pull-up +3V_S5
Swap Override jumper
+3V_S5
+3V_S5 Low = A16 swap
RP9 R333 10K_4 CLK_PCIE_REQ0# override/Top-Block
USB_OC7# 6 5 R677 10K_4 CLK_PCIE_REQ3# PCI_GNT3# R341
USB_OC6# USB_OC0# CLK_PCIE_REQ4#
Swap Override enabled
7 4 R366 10K_4
High = Default
2
USB_OC5# 8 3 OC6# R338 10K_4 CLK_PCIE_REQ5# 2N7002K Q29 2.2K_4
Add Buffers as needed for USB_OC4# 9 2 USB_OC2# R709 10K_4 CLK_PCIE_LAN_REQ#
+3V_S5 Loading and fanout concerns. 10 1 USB_OC3# R693 *10K_4 PEG_CLKREQ#_R +3V_S5 1 3 SMB_CLK_ME1
+3V_S5 (37) 2ND_MBCLK
Boot BIOS Strap
8.2K_10P8R +3V R673 10K_4 RSV_SMBALERT#
GNT0# GNT1# Boot BIOS Location R367 10K_4 RSV_SML0ALERT#
C560 R700 10K_4 CLK_PCIE_REQ1#_R R322 10K_4 RSV_SML1ALERT# +3V_S5 exchange pin1 and pin3
+3V 0 0 LPC R318 2.2K_4 ICH_SMBCLK of Q28/Q29 to fix leakage
.1u_4 RP8 +3V R678 2.2K_4 ICH_SMBDATA
PCI_REQ0# 6 5 0 1 Reserved (NAND) R687 2.2K_4 SMB_CLK_ME0
5
PCI_PIRQB# 7 4 PCI_PIRQH# R339 2.2K_4 SMB_DATA_ME0

PCI_PLTRST# 2 PCI_REQ3# 8 3 PCI_TRDY# 1 0 PCI R336
4 PCI_PIRQD# 9 2 PCI_FRAME# R604 10K_4 dGPU_SELECT#
PLTRST# (4,11,27,28,32,33,37)
2
1 +3V 10 1 PCI_REQ1# R605 8.2K_4 PCI_PIRQE# 1 1 SPI Q28 2.2K_4
A R583 8.2K_4 PCI_PIRQF# 2N7002K A
U29 R353 8.2K_10P8R R614 8.2K_4 PCI_PIRQG# 1 3 SMB_DATA_ME1
(37) 2ND_MBDATA
3
TC7SH08FU
100K_4 R342 10K_4 CLK_PCIE_REQ2# Danbury Technology Enabled
+3V R695 10K_4 PEG_CLKREQ#_R
RP2 High = Enable
PCI_PLOCK# 6 5 NV_ALE
PCI_SERR# 7 4 PCI_PERR# Low = Disable
PCI_DEVSEL# 8 3 PCI_PIRQC#
PCI_STOP# 9 2 PCI_IRDY#
+3V 10 1 PCI_PIRQA# Quanta Computer Inc.
DMI Termination Voltage
8.2K_10P8R
Set to Vcc when LOW PROJECT : ZY9B
NV_CLE Size Document Number Rev
Set to Vcc/2 when HIGH 1A
IBEX PEAK-M 3/6
5 4 3 2 1
5 4 3 2 1
GPU RST#
IBEX PEAK-M (GPIO,VSS_NCTF,RSVD)
U53F
BMBUSY# Y3 AH45 TP_PCH_PCIE6N TP19 +3V

BMBUSY# / GPIO0 CLKOUT_PCIE6N TP_PCH_PCIE6P TP17
CLKOUT_PCIE6P AH46
(37) SIO_EXT_SMI# SIO_EXT_SMI# C38 C565 *.1u_4
TACH1 / GPIO1
(37) SIO_EXT_SCI# SIO_EXT_SCI# D37 TACH2 / GPIO6
5
AF48 TP_PCH_PCIE7N TP13 1
CLKOUT_PCIE7N PLTRST# (4,10,27,28,32,33,37)
MISC
change board_id0 to GPIO7 at 6/1 BOARD_ID0 J32 AF47 TP_PCH_PCIE7P TP15 4
TACH3 / GPIO7 CLKOUT_PCIE7P (18) GPU_RST_OP#
2 dGPU_HOLD_RST#
D RSV_GPIO8 F10 D
(9) RSV_GPIO8
3
GPIO8 U32
TP42 LAN_DISABLE# K9 U2 TC7SH08FU R374
LAN_PHY_PWR_CTRL / GPIO12 A20GATE SIO_A20GATE (37)
100K_4
(9,27) CR_WAKE# CR_WAKE# T7 GPIO15
dGPU_HOLD_RST# AA2 AM3
SATA4GP / GPIO16 CLKOUT_BCLK0_N / CLKOUT_PCIE8N CLK_CPU_BCLK# (4)
(22) dGPU_PWROK F38 TACH0 / GPIO17 CLKOUT_BCLK0_P / CLKOUT_PCIE8P AM1 CLK_CPU_BCLK (4)
GPIO22 Y7 BG10
SCLOCK / GPIO22 PECI H_PECI (4)
GPIO
TP37 H10 GPIO24 RCIN# T1 SIO_RCIN# (37)
GPIO24 NC for Intel suggestion at 6/1
TP34 GPIO27 AB12 BE10
GPIO27 PROCPWRGD H_PWRGOOD (4,16)
CPU
TP_PCH_GPIO28 V13 BD10 PCH_THRMTRIP#_R R306 56/F_4
GPIO28 THRMTRIP# PM_THRMTRIP# (4)
STP_PCI# M11 R310 56/F_4 +1.1V_VTT
STP_PCI# / GPIO34
(22,44) dGPU_VRON V6 SATACLKREQ# / GPIO35

dGPU_PWR_EN# should be stable (39) dGPU_PWR_EN# dGPU_PWR_EN# AB7 BA22 TP1_PCH TP29
before dGPU_VRON enable SATA2GP / GPIO36 TP1
dGPU_PRSNT# TP2_PCH TP28
AB13 SATA3GP / GPIO37 TP2 AW22
GPIO Pull-up/Pull-down
GPIO38 V3 BB22
SLOAD / GPIO38 TP3
(34) SAVE_LED# SAVE_LED# P3 AY45 +3V_S5
SDATAOUT0 / GPIO39 TP4
C GPIO45 H3 AY46 C
PCIECLKRQ6# / GPIO45 TP5
(16) RST_GATE# F1 AV43 TP_PCH_GPIO28 R331 10K_4

PCIECLKRQ7# / GPIO46 TP6 GPIO45 R688 10K_4
SV_SET_UP AB6 AV45 RST_GATE# R686 10K_4
SDATAOUT1 / GPIO48 TP7 GPIO57 R337 *10K_4
(10,36,37) SML1ALERT# R710 0_4 SATA5GP AA4 AF13 LAN_DISABLE# R346 10K_4
SATA5GP / GPIO49 TP8
EC suggestion use GPIO49 for FAN control GPIO57 F8 M18 +3V
GPIO57 TP9
N18 SIO_EXT_SMI# R608 10K_4
TP10 SIO_EXT_SCI# R611 10K_4
A4 VSS_NCTF_1 TP11 AJ24
A49 dGPU_PWR_EN# R328 10K_4
NCTF
VSS_NCTF_2 RSVD
SATA5GP / GPIO49 / TEMP_ALERT# is used to A5 VSS_NCTF_3 TP12 AK41
A50 remove GPIO7 PU at 6/1
alert for EC when CPU or Graph/Memory A52
VSS_NCTF_4
AK42
controllers' temperature go out of limit. VSS_NCTF_5 TP13 +3V
A53 VSS_NCTF_6
So connecting GPIO49 to EC and avoid this B2 VSS_NCTF_7 TP14 M32
B4 SIO_RCIN# R701 10K_4
pin to be used for other purpose B52
VSS_NCTF_8
N32 SIO_A20GATE R704 10K_4
VSS_NCTF_9 TP15 dGPU_HOLD_RST# R712 *10K_4
B53 VSS_NCTF_10
BE1 M30 SATA5GP R711 10K_4
VSS_NCTF_11 TP16 GPIO22 R349 10K_4
BE53 VSS_NCTF_12
BF1 N30 dGPU_PRSNT# R327 *10K_4
VSS_NCTF_13 TP17 SAVE_LED# R356 10K_4
BF53 VSS_NCTF_14
BH1 H12 STP_PCI# R365 10K_4
VSS_NCTF_15 TP18
BH2 VSS_NCTF_16
BH52 AA23 GPIO38 R715 10K_4
VSS_NCTF_17 TP19
BH53 VSS_NCTF_18
BJ1 AB45 BMBUSY# R714 8.2K_4
B VSS_NCTF_19 NC_1 B
BJ2 VSS_NCTF_20
BJ4 AB38 SV_SET_UP R348 10K_4
VSS_NCTF_21 NC_2
BJ49 VSS_NCTF_22
BJ5 VSS_NCTF_23 NC_3 AB42
BJ50 VSS_NCTF_24
SV_SET_UP 1-X High = Strong (Default)
BJ52 VSS_NCTF_25 NC_4 AB41
BJ53 VSS_NCTF_26
D1 VSS_NCTF_27 NC_5 T39
D2 GPIO57 stuff PD and not stuff PU for Intel suggestion at 6/1
VSS_NCTF_28
D53 VSS_NCTF_29
E1 P6 TP_INT3_3V GPIO57 R314 10K_4
VSS_NCTF_30 INIT3_3V# TP39
E53 VSS_NCTF_31
TP24 C10
IbexPeak-M_R1P0
+3V_S5 R282 *10K_4 BOARD_ID0 R281 10K_4
dGPU_PRSNT# R325 10K_4
dGPU always exist
Integrated Clock Chip Enable

High = Discrete
BOARD_ID0
Low = SW
High = Disable
A A
RSV_GPIO8
Low = Enable

PROJECT : ZY9B
1A
IBEX PEAK-M 4/6
5 4 3 2 1
5 4 3 2 1
IBEX PEAK-M (POWER) U53G POWER VCCADAC= 69mA(15mils)

+1.05V R601 0_8 +1.05V_VCCCORE_ICH AB24 AE50 +VCCA_DAC_1_2 L37 +3V
R600 0_8 VCCCORE[1] VCCADAC[1] BKP1608HS181T_6_1.5A
AB26 VCCCORE[2]
AB28 VCCCORE[3] VCCADAC[2] AE52
VCCCORE(+1.05V) = 1.432A(80mils) C510 1u/10V_4 AD26 C470 C469 C473
VCCCORE[4]
CRT
AD28 AF53
C828 10u/6.3V_6 AF26
VCCCORE[5]
VCCCORE[6]
VSSA_DAC[1] .01u/16V_4 10u/6.3V_6 .1u/16V_4 U53J POWER
VCC CORE
AF28 VCCCORE[7] VSSA_DAC[2] AF51 VCCACLK= 52mA(15mils) VCCIO = 3.062A(150mils)
AF30 VCCALVDS= 1mA +1.05V L58 *10uh_8+V1.1LAN_VCCA_CLK AP51 V24 +1.05V
VCCCORE[8] R260 *A@0_4 C815 *10u/6.3V_6 VCCACLK[1] VCCIO[5]
AF31 VCCCORE[9] +3V VCCIO[6] V26
AH26 C817 *1u/6.3V_4 AP53 Y24 C514 1u/10V_4
VCCCORE[10] VCCACLK[2] VCCIO[7]
AH28 VCCCORE[11] VCCIO[8] Y26
AH30 R262 VCCLAN = 320mA(30mils) VCCSUS3_3 = 0.163A(20mils)
VCCCORE[12] C484 R284 0_6 +1.05V_VCCAUX +3V_S5_VCCPUSB R640 0_6
AH31 VCCCORE[13] VCCALVDS AH38 EV@0_4 +1.05V AF23 VCCLAN[1] VCCSUS3_3[1] V28 +3V_S5
D AJ30 *A@.1u/16V_4 U28 D
VCCCORE[14] VCCSUS3_3[2] C869 C512 C870
AJ31 VCCCORE[15] VSSA_LVDS AH39 AF24 VCCLAN[2] VCCSUS3_3[3] U26
C518 U24
VCCSUS3_3[4] .022u_4 .1u/16V_4 .1u/16V_4
VCCTX_LVDS= 59mA(15mils) VCCSUS3_3[5] P28
AP43 VCCTX_LVDS L30 +1.8V 1u/10V_4 TP_PCH_VCCDSW Y20 P26
VCCTX_LVDS[1] *A@.1uh_8 DCPSUSBYP VCCSUS3_3[6]
VCCTX_LVDS[2] AP45 VCCSUS3_3[7] N28
AT46 C483 C488 C485 C524 N26
LVDS
R285 0_6 +1.05V_PCH_VCCDPLL_EXP VCCTX_LVDS[3] R277 VCCSUS3_3[8]
+1.05V AK24 VCCIO[24] VCCTX_LVDS[4] AT45 AD38 VCCME[1] VCCSUS3_3[9] M28
*A@.1u/16V_4 EV@0_4 .1u/16V_4 M26
*A@.01u/16V_4 *A@10u/6.3V_6 VCCSUS3_3[10]
AD39 L28
USB
L39 *1uH_6 +V1.1LAN_VCCAPLL_EXP VCCME[2] VCCSUS3_3[11]
40mA(15mils) +1.05V BJ24 VCCAPLLEXP VCCSUS3_3[12] L26
VCC3_3[2] AB34 AD41 VCCME[3] VCCSUS3_3[13] J28
C520 *10u/6.3V_6 J26
VCCSUS3_3[14]
AN20 VCCIO[25] VCC3_3[3] AB35 VCC3_3 = 357mA(30mils) AF43 VCCME[4] VCCSUS3_3[15] H28
AN22 H26
HVCMOS
VCCIO[26] +3V_VCC_GIO R247 0_6 VCCSUS3_3[16]
AN23 VCCIO[27] VCC3_3[4] AD35 +3V VCCME(+1.05V) = 1.849A(100mils) AF41 VCCME[5] VCCSUS3_3[17] G28
AN24 VCCIO[28] VCCSUS3_3[18] G26
AN26 C501 +1.05V R241 0_8 +1.05V_VCCEPW AF42 F28
VCCIO[29] VCCME[6] VCCSUS3_3[19]
VCCIO = 3.062A(150mils) AN28 VCCIO[30] VCCSUS3_3[20] F26
+1.05V BJ26 .1u/16V_4 R240 0_8 C463 22u_8 V39 E28
Clock and Miscellaneous

BJ28 VCCIO[32] VCCSUS3_3[22] E26
AT26 C460 22u_8 V41 C28
AT28 VCCIO[34] VCCSUS3_3[24] C26
AU26 C498 1u/10V_4 V42 B27
C854 1u/10V_4 VCCIO[35] VCCME[9] VCCSUS3_3[25]
AU28 VCCIO[36]
VCCVRM= 196mA(15mils) VCCSUS3_3[26] A28
AV26 C504 1u/10V_4 Y39 A26
C508 1u/10V_4 VCCIO[37] +VCCVRM R287 0_6 VCCME[10] VCCSUS3_3[27]
AV28 VCCIO[38] VCCVRM[2] AT24 +V1.5S_1.8S
AW26 VCCIO[39] Y41 VCCME[11] VCCSUS3_3[28] U23
C507 1u/10V_4 AW28 VCCIO[40]
DMI
BA26 AT16 +VCCDM R311 0_4 +1.1V_VTT VCCDMI= 61mA(15mils) Y42 V23 +1.05V
C515 1u/10V_4 VCCIO[41] VCCDMI[1] VCCME[12] VCCIO[56]
BA28 VCCIO[42]
V5REF_SUS< 1mA
BB26 AU16 R312 *0_4 +1.05V F24 R257 100/F_4 +5V_S5
C C821 10u/6.3V_6 VCCIO[43] VCCDMI[2] V5REF_SUS C
BB28 VCCIO[44]
BC26 +VCCRTCEXT V9 C471 D21 RB500V-40 +3V_S5
VCCIO[45] DCPRTC
PCI E*
BC28 C536 C546 .1u/16V_4 1u/16V_6
VCCIO[46] 1u/10V_4
BD26 VCCIO[47]
V5REF< 1mA
BD28 K49 R255 100/F_4 +5V
VCCIO[48] V5REF
BE26 AM16 +V1.5S_1.8S AU24
PCI/GPIO/LPC
VCCIO[49] VCCPNAND[1] VCCVRM[3] D20 RB500V-40
BE28 VCCIO[50] VCCPNAND[2] AK16 VCCPNAND= 156mA(15mils) +3V
BG26 AK20 J38 C486
VCCIO[51] VCCPNAND[3] VCCPNAND R317 0_8 VCC3_3[8] 1u/16V_6
BG28 VCCIO[52] VCCPNAND[4] AK19 +1.8V BB51 VCCADPLLA[1]
BH27 AK15 68mA(15mils) +V1.1LAN_VCCA_A_DPL BB53 L38
VCCIO[53] VCCPNAND[5] C528 VCCADPLLA[2] VCC3_3[9]
VCCPNAND[6] AK13
AN30 AM12 M36 +3V_VCCPPCI R278 0_6 +3V
VCCIO[54] VCCPNAND[7] VCC3_3[10]
NAND / SPI
VRM enable by strap pin GPIO27 AN31 AM13 .1u/16V_4 69mA(15mils) +V1.1LAN_VCCA_B_DPL BD51
VCCIO[55] VCCPNAND[8] VCCADPLLB[1]
which supply clean 1.05V for VCCPNAND[9] AM15 BD53 VCCADPLLB[2] VCC3_3[11] N36 VCC3_3 = 0.357A(30mils)
[VCCACLK,VCCAPLLEXP,VCCFDIPLL,VCCSATAPLL] +3V AN35 +1.05V AH23 P36 C502
VCC3_3[1] VCCIO[21] VCC3_3[12] .1u/16V_4
AJ35 VCCIO[22]
VCCIO = 3.062A(150mils) AH35 VCCIO[23] VCC3_3[13] U35
37mA(15mils) +V1.5S_1.8S AT22 C500 1u/10V_4
VCCVRM[1] C506 1u/10V_4
VCCME3_3= 85mA(15mils) AF34 VCCIO[2]
+1.05V L40 *1uH_6 +V1.1LAN_VCCAPLL_FDI BJ18 AM8 C522 1u/10V_4 AD13 +3V
VCCFDIPLL VCCME3_3[1] +3V_VCCME_SPI R307 0_6 VCC3_3[14]
VCCME3_3[2] AM9 +3V AH34 VCCIO[3]
FDI
+1.05V AM23 AP11 C499

C533 VCCIO[1] VCCME3_3[3] C539 .1u/16V_4
VCCME3_3[4] AP9 AF32 VCCIO[4]
31mA(15mils)
*10u/6.3V_6 AK3
.1u/16V_4 C538 .1u/16V_4 +VCCSST VCCSATAPLL[1] +V1.1LAN_VCCAPLL L72 *10uh_8
V12 DCPSST VCCSATAPLL[2] AK1 +1.05V
IbexPeak-M_R1P0 C914 C915
*1u/6.3V_4 *10u/6.3V_6
+V1.1LAN_INT_VCCSUS Y22 VCCIO = 3.062A(150mils)
C521 .1u/16V_4 DCPSUS
VCCIO[9] AH22 +1.05V
B B
P18 AT20 +V1.5S_1.8S C526
VCCSUS3_3[29] VCCVRM[4] 1u/10V_4
VCCSUS3_3 = 163mA(20mils)
+3V_S5 R381 0_6 +3V_S5_VCCPSUS U19
SATA
VCCSUS3_3[30]
PCI/GPIO/LPC
VCCVRM=196mA(15mils) HDA_SYNC (PCH strap pin) VCCIO[10] AH19
C529 .1u/16V_4 U20
R297 0_6 VCCSUS3_3[31]
+1.8V +V1.5S_1.8S Internal weak pull-down VCCIO[11] AD20
VCCVRM=>+1.8V (default) U22 VCCSUS3_3[32]
external pull-up VCCIO[12] AF22
C519 C525
.1u/16V_4 .1u/16V_4 VCCVRM=>+1.5V VCC3_3 = 0.357A(30mils) VCCIO[13] AD19
+3V R382 0_6 +3V_VCCPCORE V15 AF20
VCC3_3[5] VCCIO[14]
VCCIO[15] AF19
C532 V16 AH20
VCC3_3[6] VCCIO[16]
.1u/16V_4 Y16 AB19
VCC3_3[7] VCCIO[17]
VCCIO[18] AB20
VCCIO[19] AB22
V_CPU_IO >1mA(15mils) VCCIO[20] AD22
+1.1V_VTT R305 0_6 +VTT_VCCPCPU AT18 VCCME = 1.849A(100mils)
L55 10uh_8 +V1.1LAN_VCCA_A_DPL V_CPU_IO[1] +1.05V_VCCEPW
AA34
CPU
+1.05V VCCME[13]
C545 4.7u/10V_8 Y34
C808 + C530 .1u/16V_4 VCCME[14]
AU18 V_CPU_IO[2] VCCME[15] Y35
220u_3528 C819 C544 .1u/16V_4 AA35
1u/10V_4 VCCME[16]
VCCRTC= 2mA(15mils)
RTC
L59 10uh_8 +V1.1LAN_VCCA_B_DPL +VCCRTC A12 L30 +V3.3A_1.5A_HDA_IO R266 0_4 +3V_S5
VCCRTC VCCSUSHDA
HDA
C811 + C886 C889 VCCSUSHDA= 6mA(15mils)
C818 IbexPeak-M_R1P0 C489
220u_3528 1u/10V_4 .1u/16V_4 .1u/16V_4 1u/10V_4
A A

PROJECT : ZY9B
1A
IBEX PEAK-M 5/6
5 4 3 2 1
5 4 3 2 1
U53I
AY7 H49
IBEX PEAK-M (GND) B11
B15
VSS[159]
VSS[160]
VSS[259]
VSS[260] H5
J24
VSS[161] VSS[261]
D B19 VSS[162] VSS[262] K11 D
B23 VSS[163] VSS[263] K43
B31 VSS[164] VSS[264] K47
B35 VSS[165] VSS[265] K7
B39 VSS[166] VSS[266] L14
B43 VSS[167] VSS[267] L18
B47 VSS[168] VSS[268] L2
B7 VSS[169] VSS[269] L22
BG12 VSS[170] VSS[270] L32
BB12 VSS[171] VSS[271] L36
U53H BB16 L40
VSS[172] VSS[272]
AB16 VSS[0] BB20 VSS[173] VSS[273] L52
BB24 VSS[174] VSS[274] M12
AA19 VSS[1] VSS[80] AK30 BB30 VSS[175] VSS[275] M16
AA22 VSS[3] VSS[82] AK32 BB38 VSS[177] VSS[277] N38
AM19 VSS[4] VSS[83] AK34 BB42 VSS[178] VSS[278] M34
AA28 VSS[7] VSS[86] AK43 BC10 VSS[181] VSS[281] M46
AB11 VSS[11] VSS[90] AK8 BC22 VSS[185] VSS[285] N24
AB15 VSS[12] VSS[91] AL2 BC32 VSS[186] VSS[286] P11
AB23 VSS[13] VSS[92] AL52 BC36 VSS[187] VSS[287] AD15
AB30 VSS[14] VSS[93] AM11 BC40 VSS[188] VSS[288] P22
AB31 VSS[15] VSS[94] BB44 BC44 VSS[189] VSS[289] P30
AB32 VSS[16] VSS[95] AD24 BC52 VSS[190] VSS[290] P32
AB39 VSS[17] VSS[96] AM20 BH9 VSS[191] VSS[291] P34
AB43 VSS[18] VSS[97] AM22 BD48 VSS[192] VSS[292] P42
C C
AB8 VSS[21] VSS[100] AM28 BE12 VSS[195] VSS[295] R2
AC2 VSS[22] VSS[101] BA42 BE16 VSS[196] VSS[296] R52
AC52 VSS[23] VSS[102] AM30 BE20 VSS[197] VSS[297] T12
AD11 VSS[24] VSS[103] AM31 BE24 VSS[198] VSS[298] T41
AD31 VSS[29] VSS[108] AM39 BE46 VSS[203] VSS[303] U30
AD32 VSS[30] VSS[109] AM42 BE48 VSS[204] VSS[304] U31
AD34 VSS[31] VSS[110] AU20 BE50 VSS[205] VSS[305] U32
AU22 VSS[32] VSS[111] AM46 BE6 VSS[206] VSS[306] U34
AD42 VSS[33] VSS[112] AV22 BE8 VSS[207] VSS[307] P38
AD46 VSS[34] VSS[113] AM49 BF3 VSS[208] VSS[308] V11
AD49 VSS[35] VSS[114] AM7 BF49 VSS[209] VSS[309] P16
AD7 VSS[36] VSS[115] AA50 BF51 VSS[210] VSS[310] V19
AE2 VSS[37] VSS[116] BB10 BG18 VSS[211] VSS[311] V20
AE4 VSS[38] VSS[117] AN32 BG24 VSS[212] VSS[312] V22
AF12 VSS[39] VSS[118] AN50 BG4 VSS[213] VSS[313] V30
Y13 VSS[40] VSS[119] AN52 BG50 VSS[214] VSS[314] V31
AH49 VSS[41] VSS[120] AP12 BH11 VSS[215] VSS[315] V32
AU4 VSS[42] VSS[121] AP42 BH15 VSS[216] VSS[316] V34
AF35 VSS[43] VSS[122] AP46 BH19 VSS[217] VSS[317] V35
AP13 VSS[44] VSS[123] AP49 BH23 VSS[218] VSS[318] V38
AN34 VSS[45] VSS[124] AP5 BH31 VSS[219] VSS[319] V43
AF45 VSS[46] VSS[125] AP8 BH35 VSS[220] VSS[320] V45
AF46 VSS[47] VSS[126] AR2 BH39 VSS[221] VSS[321] V46
AF49 VSS[48] VSS[127] AR52 BH43 VSS[222] VSS[322] V47
AF5 VSS[49] VSS[128] AT11 BH47 VSS[223] VSS[323] V49
AF8 VSS[50] VSS[129] BA12 BH7 VSS[224] VSS[324] V5
B AG2 AH48 C12 V7 B
VSS[51] VSS[130] VSS[225] VSS[325]
AG52 VSS[52] VSS[131] AT32 C50 VSS[226] VSS[326] V8
AH11 VSS[53] VSS[132] AT36 D51 VSS[227] VSS[327] W2
AH15 VSS[54] VSS[133] AT41 E12 VSS[228] VSS[328] W52
AH16 VSS[55] VSS[134] AT47 E16 VSS[229] VSS[329] Y11
AH24 VSS[56] VSS[135] AT7 E20 VSS[230] VSS[330] Y12
AH32 VSS[57] VSS[136] AV12 E24 VSS[231] VSS[331] Y15
AV18 VSS[58] VSS[137] AV16 E30 VSS[232] VSS[332] Y19
AJ19 VSS[62] VSS[141] AV34 E46 VSS[236] VSS[336] Y31
AJ23 VSS[66] VSS[145] AV49 F49 VSS[240] VSS[340] Y46
AJ26 VSS[67] VSS[146] AV5 F5 VSS[241] VSS[341] P49
AJ28 VSS[68] VSS[147] AV8 G10 VSS[242] VSS[342] Y5
AJ32 VSS[69] VSS[148] AW14 G14 VSS[243] VSS[343] Y6
AJ34 VSS[70] VSS[149] AW18 G18 VSS[244] VSS[344] Y8
AT5 VSS[71] VSS[150] AW2 G2 VSS[245] VSS[345] P24
AJ4 VSS[72] VSS[151] BF9 G22 VSS[246] VSS[346] T43
AK12 VSS[73] VSS[152] AW32 G32 VSS[247] VSS[347] AD51
AM41 VSS[74] VSS[153] AW36 G36 VSS[248] VSS[348] AT8
AN19 VSS[75] VSS[154] AW40 G40 VSS[249] VSS[349] AD47
AK26 VSS[76] VSS[155] AW52 G44 VSS[250] VSS[350] Y47
AK22 VSS[77] VSS[156] AY11 G52 VSS[251] VSS[351] AT12
AK23 VSS[78] VSS[157] AY43 AF39 VSS[252] VSS[352] AM6
AK28 VSS[79] VSS[158] AY47 H16 VSS[253] VSS[353] AT13
H20 VSS[254] VSS[354] AM5
IbexPeak-M_R1P0 H30 AK45
VSS[255] VSS[355]
A H34 VSS[256] VSS[356] AK39 A
H38 VSS[257] VSS[366] AV14
H42 VSS[258]
IbexPeak-M_R1P0
PROJECT : ZY9B
1A
IBEX PEAK-M 6/6
Date: Thursday, June 18, 2009 Sheet 13 of 49
5 4 3 2 1
5 4 3 2 1
+1.5V_SUS
JDIM1B
JDIM1A M_A_DQ[63:0] (5)
(5) M_A_A[15:0] 75 VDD1 VSS16 44
M_A_A0 98 5 M_A_DQ0 76 48
M_A_A1 A0 DQ0 M_A_DQ1 VDD2 VSS17
97 A1 DQ1 7 81 VDD3 VSS18 49
M_A_A2 96 15 M_A_DQ2 82 54
95 A3 DQ3 17 87 VDD5 VSS20 55
M_A_A4 92 4 M_A_DQ4 88 60
91 A5 DQ5 6 93 VDD7 VSS22 61
M_A_A6 M_A_DQ6
M_A_A7
90
86
A6 DQ6 16
18 M_A_DQ7
2.48A 94
99
VDD8 VSS23 65
66
D 89 A8 DQ8 21 100 VDD10 VSS25 71 D
M_A_A9 85 23 M_A_DQ9 105 72
PC2100 DDR3 SDRAM SO-DIMM

107 A10/AP DQ10 33 106 VDD12 VSS27 127
M_A_A11 84 35 M_A_DQ11 111 128
83 A12/BC# DQ12 22 112 VDD14 VSS29 133
M_A_A13 119 24 M_A_DQ13 117 134
80 A14 DQ14 34 118 VDD16 VSS31 138
M_A_A15 78 36 M_A_DQ15 123 139
A15 DQ15 VDD17 VSS32

39 M_A_DQ16 124 144
DQ16 M_A_DQ17 VDD18 VSS33
(5) M_A_BS#0 109 BA0 DQ17 41 VSS34 145
108 51 M_A_DQ18 199 150
(5) M_A_BS#1 BA1 DQ18 +3V VDDSPD VSS35
79 53 M_A_DQ19 151
(5) M_A_BS#2 BA2 DQ19 VSS36
114 40 M_A_DQ20 77 155
(5) M_A_CS#0 S0# DQ20 NC1 VSS37
121 42 M_A_DQ21 122 156
(5) M_A_CS#1 S1# DQ21 NC2 VSS38
101 50 M_A_DQ22 R221 *10K_4 125 161
(5) M_A_CLK0 CK0 DQ22 +3V NCTEST VSS39
103 52 M_A_DQ23 162
(5) M_A_CLK0# CK0# DQ23 VSS40
102 57 M_A_DQ24 198 167
(5) M_A_CLK1 CK1 DQ24 (4) PM_EXTTS#0 EVENT# VSS41
104 59 M_A_DQ25 30 168
(5) M_A_CLK1# CK1# DQ25 (15,16) DDR3_DRAMRST# RESET# VSS42
73 67 M_A_DQ26 172
(5) M_A_CKE0 CKE0 DQ26 VSS43
74 69 M_A_DQ27 173
(5) M_A_CKE1 CKE1 DQ27 VSS44
115 56 M_A_DQ28 +SMDDR_VREF_DQ0 1 178
(5) M_A_CAS# CAS# DQ28 VREF_DQ VSS45
110 58 M_A_DQ29 +SMDDR_VREF R91 M1@0_6 +SMDDR_VREF_DIMM126 179
(5) M_A_RAS# RAS# DQ29 VREF_CA VSS46
113 68 M_A_DQ30 R90 *M3@0_6 184
(5) M_A_WE# WE# DQ30 (7,16) VREF_DQ_DIMM0 VSS47
R216 10K_4 DIMM0_SA0 197 70 M_A_DQ31 185
SA0 DQ31 (16) +SMDDR_VREF_DQ0 VSS48
R206 10K_4 DIMM0_SA1 201 129 M_A_DQ32 2 189
CLK_SCLK SA1 DQ32 M_A_DQ33 VSS1 VSS49
202 SCL DQ33 131 3 VSS2 VSS50 190
(3,15,32) CLK_SCLK CLK_SDATA 200 141 M_A_DQ34 8 195
(204P)
(3,15,32) CLK_SDATA SDA DQ34 M_A_DQ35 VSS3 VSS51
C DQ35 143 9 VSS4 VSS52 196 C
116 130 M_A_DQ36 13
(5) M_A_ODT0 ODT0 DQ36 +1.5V_SUS VSS5
120 132 M_A_DQ37 14
(5) M_A_ODT1 ODT1 DQ37 VSS6
140 M_A_DQ38 19
(5) M_A_DM[7:0] DQ38 VSS7
M_A_DM0 11 142 M_A_DQ39 20
M_A_DM1 DM0 DQ39 M_A_DQ40 VSS8
28 DM1 DQ40 147 25 VSS9
M_A_DM2 46 149 M_A_DQ41 R158 26 203 +0.75V_DDR_VTT
M_A_DM3 63
DM2
DM3
(204P) DQ41
DQ42 157 M_A_DQ42 *10K_4 31
VSS10
VSS11
VTT1
VTT2 204
M_A_DM4 136 159 M_A_DQ43 32
M_A_DM5 DM4 DQ43 M_A_DQ44 VSS12
153 DM5 DQ44 146 37 VSS13 GND 205
M_A_DM6 170 148 M_A_DQ45 +SMDDR_VREF 0_6 R162 +SMDDR_VREF_DIMM 38 206
M_A_DM7 DM6 DQ45 M_A_DQ46 VSS14 GND
187 DM7 DQ46 158 43 VSS15
160 M_A_DQ47
(5) M_A_DQS[7:0] DQ47
M_A_DQS0 12 163 M_A_DQ48 R159 C397
M_A_DQS1 DQS0 DQ48 M_A_DQ49
29 DQS1 DQ49 165 *10K_4 470p/X7R_4 DDR3-DIMM0_H=5.2_Standard
M_A_DQS2 47 175 M_A_DQ50
64 DQS3 DQ51 177
M_A_DQS4 137 164 M_A_DQ52
154 DQS5 DQ53 166
M_A_DQS6 171 174 M_A_DQ54
(5) M_A_DQS#[7:0] 188 DQS7 DQ55 176
M_A_DQS#0 10 181 M_A_DQ56
M_A_DQS#1 DQS#0 DQ56 M_A_DQ57
27 DQS#1 DQ57 183
M_A_DQS#2 45 191 M_A_DQ58
62 DQS#3 DQ59 193
M_A_DQS#4 135 180 M_A_DQ60
152 DQS#5 DQ61 182
B M_A_DQS#6 169 192 M_A_DQ62 B
186 DQS#7 DQ63 194
DDR3-DIMM0_H=5.2_Standard
Place these Caps near So-Dimm0.
+1.5V_SUS
+SMDDR_VREF_DIMM +SMDDR_VREF_DQ0
C355 C294 C304 C370 C301
10u/6.3V_6 10u/6.3V_6 10u/6.3V_6 .1u/16V_4 .1u/16V_4
C364 + C325 C387 C393 C166 C177

330u/2V_7343
10u/6.3V_6 .1u/16V_4 .1u/16V_4
C290 C347 C362 C340 C313 2.2u/6.3V_6 2.2u/6.3V_6

10u/6.3V_6 10u/6.3V_6 .1u/16V_4 .1u/16V_4 .1u/16V_4
A A
+3V +0.75V_DDR_VTT
M_A_DM0 R99 EV@0_4 Close to SO-DIMM

C448 C446 C445 C447 C440 C433 C432 M_A_DM1 R98 EV@0_4
C426
2.2u/6.3V_6
C437
.1u/16V_4
1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4
10u/6.3V_6 10u/6.3V_6 10u/6.3V_6
M_A_DM2
M_A_DM3
R104
R117
EV@0_4
EV@0_4
M_A_DM4 R163 EV@0_4
M_A_DM5 R175 EV@0_4 PROJECT : ZY9B
M_A_DM6 R197 EV@0_4 Size Document Number Rev
maybe can save M_A_DM7 R214 EV@0_4 1A
DDRIII SO-DIMM-0
5 4 3 2 1
5 4 3 2 1
+1.5V_SUS
JDIM2A M_B_DQ[63:0] (5) JDIM2B
(5) M_B_A[15:0]
M_B_A0 98 5 M_B_DQ0 75 44
M_B_A1 A0 DQ0 M_B_DQ1 VDD1 VSS16
97 A1 DQ1 7 76 VDD2 VSS17 48
M_B_A2 96 15 M_B_DQ2 81 49
95 A3 DQ3 17 82 VDD4 VSS19 54
M_B_A4 92 4 M_B_DQ4 87 55
91 A5 DQ5 6 88 VDD6 VSS21 60
M_B_A6 90 16 M_B_DQ6 93 61
86 A7 DQ7 18 94 VDD8 VSS23 65
M_B_A8 M_B_DQ8
D
M_B_A9
89
85
A8 DQ8 21
23 M_B_DQ9
2.48A 99
100
VDD9 VSS24 66
71
D

107 33 105 72

M_B_A11 A10/AP DQ10 M_B_DQ11 VDD11 VSS26
84 A11 DQ11 35 106 VDD12 VSS27 127
M_B_A12 83 22 M_B_DQ12 111 128
M_B_A13 A12/BC# DQ12 M_B_DQ13 VDD13 VSS28
119 A13 DQ13 24 112 VDD14 VSS29 133
M_B_A14 80 34 M_B_DQ14 117 134
78 A15 DQ15 36 118 VDD16 VSS31 138

39 M_B_DQ16 123 139
DQ16 M_B_DQ17 VDD17 VSS32
(5) M_B_BS#0 109 BA0 DQ17 41 124 VDD18 VSS33 144
108 51 M_B_DQ18 145
(5) M_B_BS#1 BA1 DQ18 VSS34
79 53 M_B_DQ19 199 150
(5) M_B_BS#2 BA2 DQ19 +3V VDDSPD VSS35
114 40 M_B_DQ20 151
(5) M_B_CS#0 S0# DQ20 VSS36
121 42 M_B_DQ21 77 155
(5) M_B_CS#1 S1# DQ21 NC1 VSS37
101 50 M_B_DQ22 122 156
(5) M_B_CLK0 CK0 DQ22 NC2 VSS38
103 52 M_B_DQ23 125 161
(5) M_B_CLK0# CK0# DQ23 NCTEST VSS39
102 57 M_B_DQ24 R211 *10K_4 162
(5) M_B_CLK1 CK1 DQ24 +3V VSS40
104 59 M_B_DQ25 198 167
(5) M_B_CLK1# CK1# DQ25 (4) PM_EXTTS#1 EVENT# VSS41
73 67 M_B_DQ26 30 168
(5) M_B_CKE0 CKE0 DQ26 (14,16) DDR3_DRAMRST# RESET# VSS42
74 69 M_B_DQ27 172
(5) M_B_CKE1 CKE1 DQ27 VSS43
115 56 M_B_DQ28 173
(5) M_B_CAS# CAS# DQ28 VSS44
110 58 M_B_DQ29 +SMDDR_VREF_DQ1 1 178
(5) M_B_RAS# RAS# DQ29 (16) +SMDDR_VREF_DQ1 VREF_DQ VSS45
113 68 M_B_DQ30 R479 M1@0_6 126 179
(5) M_B_WE# WE# DQ30 +SMDDR_VREF_DIMM VREF_CA VSS46
R217 10K_4 DIMM1_SA0 197 70 M_B_DQ31 R478 *M3@0_6 184
SA0 DQ31 (7,16) VREF_DQ_DIMM1 VSS47
R231 10K_4 DIMM1_SA1 201 129 M_B_DQ32 185
+3V SA1 DQ32 +SMDDR_VREF_DIMM VSS48
202 131 M_B_DQ33 2 189
(3,14,32) CLK_SCLK SCL DQ33 M_B_DQ34 VSS1 VSS49
200 SDA DQ34 141 3 VSS2 VSS50 190
(3,14,32) CLK_SDATA 143 M_B_DQ35 8 195
(204P)
C DQ35 VSS3 VSS51 C
116 130 M_B_DQ36 9 196
(5) M_B_ODT0 ODT0 DQ36 VSS4 VSS52
120 132 M_B_DQ37 13
(5) M_B_ODT1 ODT1 DQ37 VSS5
140 M_B_DQ38 14
(5) M_B_DM[7:0] DQ38 VSS6
M_B_DM0 11 142 M_B_DQ39 19
M_B_DM1 DM0 DQ39 M_B_DQ40 VSS7
28 DM1 DQ40 147 20 VSS8
M_B_DM2 46 149 M_B_DQ41 25
M_B_DM3 63
DM2
DM3
(204P) DQ41
DQ42 157 M_B_DQ42 26
VSS9
VSS10 VTT1 203 +0.75V_DDR_VTT
M_B_DM4 136 159 M_B_DQ43 31 204
M_B_DM5 DM4 DQ43 M_B_DQ44 VSS11 VTT2
153 DM5 DQ44 146 32 VSS12
M_B_DM6 170 148 M_B_DQ45 37 205
M_B_DM7 DM6 DQ45 M_B_DQ46 VSS13 GND
187 DM7 DQ46 158 38 VSS14 GND 206
160 M_B_DQ47 43
(5) M_B_DQS[7:0] DQ47 VSS15
M_B_DQS0 12 163 M_B_DQ48
M_B_DQS1 DQS0 DQ48 M_B_DQ49
29 DQS1 DQ49 165
M_B_DQS2 47 175 M_B_DQ50 DDR3-DIMM1_H=9.2_Standard
64 DQS3 DQ51 177
M_B_DQS4 137 164 M_B_DQ52
154 DQS5 DQ53 166
M_B_DQS6 171 174 M_B_DQ54
(5) M_B_DQS#[7:0] 188 DQS7 DQ55 176
M_B_DQS#0 10 181 M_B_DQ56
M_B_DQS#1 DQS#0 DQ56 M_B_DQ57
27 DQS#1 DQ57 183
M_B_DQS#2 45 191 M_B_DQ58
62 DQS#3 DQ59 193
M_B_DQS#4 135 180 M_B_DQ60
152 DQS#5 DQ61 182
B M_B_DQS#6 169 192 M_B_DQ62 B
186 DQS#7 DQ63 194
DDR3-DIMM1_H=9.2_Standard
+1.5V_SUS Place these Caps near So-Dimm1.

+SMDDR_VREF_DIMM +SMDDR_VREF_DQ1
C329 C309 C350 C358 C376
10u/6.3V_6 10u/6.3V_6 10u/6.3V_6 .1u/16V_4 .1u/16V_4
C320 + C275 C391 C394 C653 C667

330u/2V_7343
10u/6.3V_6 .1u/16V_4 .1u/16V_4
C297 C326 C359 C323 C343 2.2u/6.3V_6 2.2u/6.3V_6

10u/6.3V_6 10u/6.3V_6 .1u/16V_4 .1u/16V_4 .1u/16V_4
+3V +0.75V_DDR_VTT
Close to SO-DIMM
A C444 C456 C443 C455 C431 C434 C435 A

C425 C436 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 M_B_DM0 R101 EV@0_4
2.2u/6.3V_6 .1u/16V_4 10u/6.3V_6 10u/6.3V_6 10u/6.3V_6 M_B_DM1 R100 EV@0_4
M_B_DM2 R105 EV@0_4
M_B_DM3 R115 EV@0_4
M_B_DM4 R168 EV@0_4
maybe can save

M_B_DM5
M_B_DM6
R180
R198
EV@0_4
EV@0_4
M_B_DM7 R205 EV@0_4
PROJECT : ZY9B
1A
DDRIII SO-DIMM-1
5 4 3 2 1
1 2 3 4 5 6 7 8
CPU XDP Connector Braidwood

CN32 +3V
(40mils)
6 1 +3.3V_NVRAM R603 *0_8
(10) NV_DQ0 DQ0 VCC_1
(10) NV_DQ1 7 DQ1 VCC_2 2
45 3 + C834
46 40 C495
+1.1V_VTT (10) NV_DQ3 DQ3 VCC_4
12 41 *1u_4 *100u/6.3V_3528
(10) NV_DQ5 13 DQ5 VCC_6 42
200mA 51
(10) NV_DQ6 DQ6
CN12 52
(10) NV_DQ7 DQ7
A (4) XDP_PREQ# 3 OBSFN_A0 VCC_OBS_CD 44 (10) NV_DQ8 28 DQ8 +V_NVRAM_VCCQ_C
(20mils) R635 *0_8
A
(4) XDP_PRDY# 5 OBSFN_A1 VCC_OBS_AB 43 (10) NV_DQ9 29 DQ9 VCCQ_1 38 +1.8V
(4) XDP_OBS0 9 OBSDATA_A0 OBSFN_B0 21 (10) NV_DQ10 67 DQ10 VCCQ_2 39
R626 *0_8
(4) XDP_OBS1 11
15
OBSDATA_A1 OBSFN_B1 23
4
(10) NV_DQ11 68
34
DQ11 NVRAM Connector VCCQ_3 78
C857 C843
+3V
(4) XDP_OBS2 OBSDATA_A2 OBSFN_C0 (10) NV_DQ12 DQ12
17 6 35 77 TP_NV_VREF TP54 *1u_4 *22u/6.3V_8
(4) XDP_OBS3 OBSDATA_A3 OBSFN_C1 (10) NV_DQ13 DQ13 VREF
(4) XDP_OBS4 27 OBSDATA_B0 OBSDATA_C0 10 (10) NV_DQ14 73 DQ14
(4) XDP_OBS5 29 OBSDATA_B1 OBSDATA_C1 12 (10) NV_DQ15 74 DQ15
(4) XDP_OBS6 33 OBSDATA_B2 OBSDATA_C2 16
(4) XDP_OBS7 35 OBSDATA_B3 OBSDATA_C3 18 (10) NV_DQS0 10 DQS_0
(8,37) DNBSWON# 41 22 TP12 TP_NV_DQS_0# 9 5
HOOK1 OBSFN_D0 DQS_0# VSS_1
(4) H_PWRGD_XDP 45 HOOK2 OBSFN_D1 24 VSS_2 8
(4) BCLK_ITP_P 40 ITPCLK/HOOK4 OBSDATA_D0 28 (10) NV_DQS1 32 DQS_1 VSS_3 11
(4) BCLK_ITP_N 42 30 TP63 TP_NV_DQS_1# 31 14
XDP_DBRST# ITPCLK#/HOOK5 OBSDATA_D1 DQS_1# VSS_4
(4,8) XDP_DBRST# 48 DBR#/HOOK7 OBSDATA_D2 34 VSS_5 17
(3,10,33) ICH_SMBDATA ICH_SMBDATA 51 36 18 20
SDA OBSDATA_D3 (9,10) NV_CLE CLE_0 VSS_6
ICH_SMBCLK 53 47 57 23
(3,10,33) ICH_SMBCLK SCL HOOK3 CLE_1 VSS_7
(4) XDP_TDO XDP_TDO 52 55 26
XDP_TRST# TDO TCK1 H_CPUPWRGD_XDP R149 *1K_4 VSS_8
(4) XDP_TRST# 54 TRSTN PWRGOOD/HOOK0 39 H_PWRGOOD (4,11) (9,10) NV_ALE 19 ALE_0 VSS_9 27
(4) XDP_TDI XDP_TDI 56 46 XDP_RST#_R R141 *1K_4 H_CPURST# (4) 58 30
XDP_TMS TDI RESET#/HOOK6 ALE_1 VSS_10
(4) XDP_TMS 58 TMS GND0 1 TP9 VSS_11 33
(4) XDP_TCLK XDP_TCLK 57 2 54 36
TCK0 GND1 (10) NV_R_B# R/B# VSS_12
60 7 TP49 TP_NV_WP0# 55 44
59
50
49
GND17
GND16
GND15
GND14
CPU XDP GND2
GND3
GND4
GND5
8
13
14
(10) NV_RE#_WR#0
(10) NV_RE#_WR#1
21
60
WP#
WR_0#/RE_0#
W/R_1#/RE_1#
VSS_13
VSS_14
VSS_15
VSS_16
47
50
53
38 GND13 GND6 19 (10) NV_WE#_CK0 49 CK_0/WE_0# VSS_17 56
37 GND12 GND7 20 (10) NV_WE#_CK1 71 CK_1/WE_1# VSS_18 59
32 GND11 GND8 25 VSS_19 62
31 GND10 GND9 26 (10) NV_CE#0 24 CE_0# VSS_20 65
25 CE_2# VSS_21 66
*Samtec BSH-030-01 69
VSS_22
B (10) NV_CE#1 22 CE_1# VSS_23 72 B
61 CE_3# VSS_24 75
(10) NV_CE#2 4 CE_4#

43 CE_6#
37 15 TP_NV_RFU_1 TP66
(10) NV_CE#3 CE_5# RFU_1
76 16 TP_NV_RFU_2 TP64
CE_7# RFU_2 TP_NV_RFU_3
RFU_3 63 TP50
64 TP_NV_RFU_4 TP51
TP_NV_CK_0# RFU_4
TP48 48 CK_0#
TP52 TP_NV_CK_1# 70 CK_1#
*AAA-NAN-003-K02
+3V_S5 +1.5V_SUS +1.5V_SUS

+3V_S5
R721 R722
*1K/F_4 *1K/F_4
R723
5
C *10K/F_4 U58 C
R724 2 R725
+SMDDR_VREF_DQ0 (14) +SMDDR_VREF_DQ1 (15)
*10K/F_4 4 PM_DRAM_PWRGD (4,8)
3
3
1
Q50 *1.5K/F_4 Q51 Q52
+1.5V_CPUVDDQ *2N7002E *TC7SH08FU R726 R727 R728
3
2 RST_GATE#_R 2 *1K/F_4 RST_GATE#_R 2 *1K/F_4

3
*750/F_4 *A03402 *A03402

2 Q53
1
1
*PDTC143TT
(7,14) VREF_DQ_DIMM0 (7,15) VREF_DQ_DIMM1
PWRGD_1.5VCPU (43)
1
+1.5V_SUS
+0.75V_DDR_VTT +1.5V_CPUVDDQ C920 *.1u_4

+1.5V_SUS
R730 C921 *.1u_4
+1.5V_SUS +1.5V_CPUVDDQ
PR295 PR296 *1K_4 C922 *.1u_4
22_8 220_8 DDR3_DRAMRST# (14,15)
PQ66 C923 *.1u_4
3
1
2
5
6
R731 R732 Q54

*AO6402A
3
D D
3 (11) RST_GATE# R733 *0_4 RST_GATE#_R 2
(39,43,47) MAIND
0_1206 0_1206 R735
0_4
(47) MAINON_DIS_G 2 (47) MAINON_DIS_G 2 *BSS138
4
1
PQ67 PQ65
+1.5V_CPUVDDQ
DMN601K-7 DMN601K-7
6A/maximum (4) CPU_DDR3_DRAMRST#

1
PROJECT : ZY9
1A
XDP/BRAIDWOOD
1 2 3 4 5 6 7 8
5 4 3 2 1
U41A
PEG_TXP[0..15] 0518 SWAP PCIE for VGA side

(4) PEG_TXP[0..15]
PEG_TXN[0..15] 0518 SWAP PCIE for VGA side
(4) PEG_TXN[0..15]
PEG_RXP[0..15] PEG_TXP15 AA38 Y33 CPEG_RXP15 C165 .1u/10V_4

(4) PEG_RXP[0..15] (4) PEG_TXP15 PCIE_RX0P PCIE_TX0P PEG_RXP15 (4)
PEG_TXN15 Y37 Y32 CPEG_RXN15 C154 .1u/10V_4
D PEG_RXN[0..15] (4) PEG_TXN15 PCIE_RX0N PCIE_TX0N PEG_RXN15 (4) D
(4) PEG_RXN[0..15]
PEG_TXP14 Y35 W33 CPEG_RXP14 C176 .1u/10V_4
(4) PEG_TXP14 PCIE_RX1P PCIE_TX1P PEG_RXP14 (4)
PEG_TXN14 W36 W32 CPEG_RXN14 C169 .1u/10V_4
(4) PEG_TXN14 PCIE_RX1N PCIE_TX1N PEG_RXN14 (4)
PEG_TXP13 W38 U33 CPEG_RXP13 C178 .1u/10V_4

PEG_TXN13 V37 U32 CPEG_RXN13 C186 .1u/10V_4
PEG_TXP12 V35 U30 CPEG_RXP12 C187 .1u/10V_4

PEG_TXN12 U36 U29 CPEG_RXN12 C192 .1u/10V_4
PEG_TXP11 U38 T33 CPEG_RXP11 C194 .1u/10V_4

PEG_TXN11 T37 T32 CPEG_RXN11 C201 .1u/10V_4
PCI EXPRESS INTERFACE

PEG_TXP10 T35 T30 CPEG_RXP10 C205 .1u/10V_4
PEG_TXN10 R36 T29 CPEG_RXN10 C209 .1u/10V_4
PEG_TXP9 R38 P33 CPEG_RXP9 C211 .1u/10V_4

PEG_TXN9 P37 P32 CPEG_RXN9 C219 .1u/10V_4
C (4) PEG_TXN9 PCIE_RX6N PCIE_TX6N PEG_RXN9 (4) C
PEG_TXP8 P35 P30 CPEG_RXP8 C220 .1u/10V_4

PEG_TXN8 N36 P29 CPEG_RXN8 C225 .1u/10V_4
PEG_TXP7 N38 N33 CPEG_RXP7 C231 .1u/10V_4

PEG_TXN7 M37 N32 CPEG_RXN7 C232 .1u/10V_4
PEG_TXP6 M35 N30 CPEG_RXP6 C234 .1u/10V_4

PEG_TXN6 L36 N29 CPEG_RXN6 C240 .1u/10V_4
PEG_TXP5 L38 L33 CPEG_RXP5 C241 .1u/10V_4

PEG_TXN5 K37 L32 CPEG_RXN5 C250 .1u/10V_4
PEG_TXP4 K35 L30 CPEG_RXP4 C254 .1u/10V_4

PEG_TXN4 J36 L29 CPEG_RXN4 C257 .1u/10V_4
PEG_TXP3 J38 K33 CPEG_RXP3 C262 .1u/10V_4

B PEG_TXN3 H37 K32 CPEG_RXN3 C259 .1u/10V_4 B
PEG_TXP2 H35 J33 CPEG_RXP2 C271 .1u/10V_4

PEG_TXN2 G36 J32 CPEG_RXN2 C267 .1u/10V_4
PEG_TXP1 G38 K30 CPEG_RXP1 C282 .1u/10V_4

PEG_TXN1 F37 K29 CPEG_RXN1 C276 .1u/10V_4
PEG_TXP0 F35 H33 CPEG_RXP0 C272 .1u/10V_4

PEG_TXN0 E37 H32 CPEG_RXN0 C274 .1u/10V_4
CLOCK
(10) CLK_PCIE_VGA AB35 PCIE_REFCLKP
(10) CLK_PCIE_VGA# AA36 PCIE_REFCLKN
For Broadway, Madison and Park CALIBRATION

the PWRGOOD ball must be conneccted to ground AJ21 Y30 R92 1.27K/F_4
NC#1 PCIE_CALRP
AK21 NC#2
A R78 10K_4 R97 2K/F_4 A
AH16 PWRGOOD PCIE_CALRN Y29 +1V +1.0V
(18) GPU_RST# AA30 PERSTB For M97, Broadway, Madison and Park PCIE_VDDC is 1.0V Quanta Computer Inc.
Madison/Broadway_M2 PROJECT : ZY9B
1A
Madison/Broadway-PCIE I/F
5 4 3 2 1
5 4 3 2 1
GPU Power-on sequence U41B U41G
1 => +3V_D
2 => +VGPU_CORE TXCAP_DPA3P AU24 EXT_HDMICLK+ (26)
LVDS CONTROL
VARY_BL AK27 EV_LVDS_BRIGHT (25)
TXCAM_DPA3N AV23 EXT_HDMICLK- (26) DIGON AJ27 EV_LVDS_VDDEN (25)
3 => +VGPU_IO AT25
TX0P_DPA2P EXT_HDMITX0P (26)
4 => +1V MUTI GFX
DPA TX0M_DPA2N AR24 EXT_HDMITX0N (26)
AU26 AK35
5 => +1.5V_GPU TX1P_DPA1P
TX1M_DPA1N AV25
EXT_HDMITX1P (26)
EXT_HDMITX1N (26)
TXCLK_UP_DPF3P
TXCLK_UN_DPF3N AL36
EV_TXUCLKOUT+ (25)
EV_TXUCLKOUT- (25)
6 => +1.8V_GPU AR8 DVPCNTL_MVP_0 TX2P_DPA0P AT27 EXT_HDMITX2P (26) TXOUT_U0P_DPF2P AJ38 EV_TXUOUT0+ (25)
AU8 DVPCNTL_MVP_1 TX2M_DPA0N AR26 EXT_HDMITX2N (26) TXOUT_U0N_DPF2N AK37 EV_TXUOUT0- (25)
D
7 => dGPU_PWROK AP8
AW8
DVPCNTL_0
AR30 AH35
D
DVPCNTL_1 TXCBP_DPB3P TXOUT_U1P_DPF1P EV_TXUOUT1+ (25)

AR3 AT29 T50 AJ36
DVPCNTL_2 TXCBM_DPB3N TXOUT_U1N_DPF1N EV_TXUOUT1- (25)
AR1 T41
DVPCLK
AU1 DVPDATA_0 TX3P_DPB2P AV31 TXOUT_U2P_DPF0P AG38 EV_TXUOUT2+ (25)
AU3 AU30 T55 AH37
DVPDATA_1 DPB TX3M_DPB2N TXOUT_U2N_DPF0N EV_TXUOUT2- (25)
AW3 T46
DVPDATA_2
AP6 DVPDATA_3 TX4P_DPB1P AR32 TXOUT_U3P AF35
AW5 AT31 T56 AG36
DVPDATA_4 TX4M_DPB1N T42 TXOUT_U3N
AU5 DVPDATA_5
AR6 DVPDATA_6 TX5P_DPB0P AT33
1.8V GPIO AW6 AU32 T5 LVTMDP
DVPDATA_7 TX5M_DPB0N T11
AU6 DVPDATA_8
AT7 DVPDATA_9 TXCCP_DPC3P AU14 EXT_DP_TX3P (26) TXCLK_LP_DPE3P AP34 EV_TXLCLKOUT+ (25)
AV7 DVPDATA_10 TXCCM_DPC3N AV13 EXT_DP_TX3N (26) TXCLK_LN_DPE3N AR34 EV_TXLCLKOUT- (25)
AN7 DVPDATA_11
AV9 DVPDATA_12 TX0P_DPC2P AT15 EXT_DP_TX2P (26) TXOUT_L0P_DPE2P AW37 EV_TXLOUT0+ (25)
AT9 DVPDATA_13 TX0M_DPC2N AR14 EXT_DP_TX2N (26) TXOUT_L0N_DPE2N AU35 EV_TXLOUT0- (25)
AR10 DVPDATA_14
AW10 DPC AU16 AR37
DVPDATA_15 TX1P_DPC1P EXT_DP_TX1P (26) TXOUT_L1P_DPE1P EV_TXLOUT1+ (25)
AU10 DVPDATA_16 TX1M_DPC1N AV15 EXT_DP_TX1N (26) TXOUT_L1N_DPE1N AU39 EV_TXLOUT1- (25)
AP10 DVPDATA_17
AV11 DVPDATA_18 TX2P_DPC0P AT17 EXT_DP_TX0P (26) TXOUT_L2P_DPE0P AP35 EV_TXLOUT2+ (25)
AT11 DVPDATA_19 TX2M_DPC0N AR16 EXT_DP_TX0N (26) TXOUT_L2N_DPE0N AR35 EV_TXLOUT2- (25)
(24) RAM_STRAP0 AR12 DVPDATA_20
(24) RAM_STRAP1 AW12 DVPDATA_21 TXCDP_DPD3P AU20 TXOUT_L3P AN36
AU12 AT19 T45 AP37
(24) RAM_STRAP2 DVPDATA_22 TXCDM_DPD3N TXOUT_L3N
AP12 T47
+3V_D T51 DVPDATA_23
TX3P_DPD2P AT21
AR20 T43
TX3M_DPD2N T49
DPD AU22
TX4P_DPD1P T44 Madison/Broadway_M2
TX4M_DPD1N AV21
R73 R75 T53
10K/F_4 10K/F_4 I2C AT23
TX5P_DPD0P T48
TX5M_DPD0N AR22
AK26 T52
SCL
C AJ26 SDA
C
R AD39 EXT_CRT_RED (25)

GENERAL PURPOSE I/O AD37
RB
(24) GPU_GPIO0 AH20 GPIO_0
(24) GPU_GPIO1 AH18 GPIO_1 G AE36 EXT_CRT_GRN (25)
(24) GPU_GPIO2 AN16 GPIO_2 GB AD35
(24) GPIO3_SMBDAT AH23 GPIO_3_SMBDATA
(24) GPIO4_SMBCLK AJ23 GPIO_4_SMBCLK B AF37 EXT_CRT_BLU (25)
(44) PWR_PSI# AH17 GPIO_5_AC_BATT BB AE38
AJ17 DAC1
(45) IO_VID0 GPIO_6
AK17 AC36 R463 R462 R465 +1.8V_GPU
(25) EV_LVDS_BLON GPIO_7_BLON HSYNC EXT_HSYNC (24,25)
(24) SOUT_GPIO8 AJ13 GPIO_8_ROMSO VSYNC AC38 EXT_VSYNC (24,25) 150/F_4 150/F_4 150/F_4 (1.8V@70mA AVDD)
AH15 120 ohm/300mA
(24) SIN_GPIO9 GPIO_9_ROMSI
AJ16 AVDD L49 BLM15BD121SN1_4
+3V_D (24) SCLK_GPIO10 GPIO_10_ROMSCK
AK16 AB34 R76 499/F_4
(24) GPU_GPIO11 GPIO_11 RSET
(24) GPU_GPIO12 AL16 GPIO_12
AM16 AD34 AVDD C630 C629 C628
(24) GPU_GPIO13 GPIO_13 AVDD
AM14 AE34 .1u/10V_4 1u/6.3V_4 10u/6.3V_6
(26) EXT_DP_HPD GPIO_14_HPD2 AVSSQ
3.3V GPIO R430 AM13
(44) GPU_VID2 GPIO_15_PWRCNTL_0
*10K_4 AK14 AC33 VDD1DI
(44) GPU_VID1 GPIO_16_SSIN VDD1DI
(24) ALT#_GPIO17 AG30 GPIO_17_THERMAL_INT VSS1DI AC34 (1.8V@100mA VDD1DI)
AN14 120 ohm/300mA
T54 GPIO_18_HPD3 VDD1DI L52 BLM15BD121SN1_4
AM17 GPIO_19_CTF
(44) GPU_VID3 AL13 GPIO_20_PWRCNTL_1 R2 AC30
+3V_D AJ14 AC31
R433 T7 GPIO_21_BB_EN R2B C172 C646 C636
(24) SCS#_GPIO22 AK13 GPIO_22_ROMCSB
10K/F_4 AN13 AD30 .1u/10V_4 1u/6.3V_4 10u/6.3V_6
R759 10K/F_4 GPIO24_TRSTB GPIO_23_CLKREQB G2
AM23 JTAG_TRSTB G2B AD31
R445 +3V_D R767 *10K/F_4 T2 AN23
*10K/F_4 27M_CLK JTAG_TDI
(3) 27M_CLK AK23 JTAG_TCK B2 AF30
+3V_D R760 10K/F_4 AL24 AF31
JTAG_TMS B2B
AM24 JTAG_TDO
T6 AJ19
(10) PEG_CLKREQ# GENERICA
AK19 AC32 +1.8V_GPU
GENERICB C
AJ20 GENERICC Y AD32 (1.8V@2mA A2VDDQ)
R451 AK20 AF32 120 ohm/300mA
*10K/F_4 GENERICD COMP A2VDDQ L50 BLM15BD121SN1_4
B
AJ24 GENERICE_HPD4 B
AH26 DAC2
GENERICF T20
(26) EXT_HDMI_HPD AH24 GENERICG H2SYNC AD29
AC29 C170 C650
V2SYNC V2SYNC (24)
.1u/10V_4 1u/6.3V_4
AK24 HPD1
+1.8V_GPU AG31 VDD1DI
VDD2DI
VSS2DI AG32
R31 AG33 +3V_D (3.3V@130mA A2VDD)

A2VDD
499/F_4
AD33 A2VDDQ
VREFG A2VDDQ C153
AH13 VREFG
AF33 .1u/10V_4 R763 *10K/F_4 27M_CLK
A2VSSQ
R32 C71 +3V_D_ZY9B
249/F_4 AA29 R89 715/F_4
.1u_4 R2SET C940 *.1u_4
+1.8V(75mA)
120 ohm/300mA
L21 BLM15BD121SN1_4 DPLL_PVDD DDC/AUX
14
+1.8V_GPU DDC1CLK AM26 EV_HDMI_DDCCK (26)
PLL/CLOCK AN26 U60
C117 C119 C139 DPLL_PVDD AM32
DDC1DATA EV_HDMI_DDCDAT (26)
HDMI
VDD
DPLL_PVDD GPIO24_TRSTB
AN32 DPLL_PVSS AUX1P AM27 3 OUT OUT 11 TESTEN (19)
10u_6 1u_4 .1u_4 Change C612/C613 from 18p to 27p at B-test AL27 T12 R762 *7.5K_4 5
AUX1N T9 C939 *100p/50V_6 IN
OUT 8
DPLL_VDDC AN31 AM19 13
C612 27p/50V_4 DPLL_VDDC DDC2CLK C941 *100p/50V_6 EN
AL19 10
+1.0V(125mA)
DDC2DATA Display Port R764 *7.5K_4 2 IN
GND
GND 7
2
120 ohm/300mA XTALI_27M AV33 AN20 4

EXT_DP_AUXDP (26)
OUT
L46 BLM15BD121SN1_4 DPLL_VDDC Y5 R446 XTALO_27M XTALIN AUX2P GND
+1V AU34 AM20 EXT_DP_AUXDN (26) 12 1
IN
XTALOUT AUX2N (11) GPU_RST_OP# IN GND
27MHZ 1M/F_4
C614 C615 C135 AL30 R765 *74AHC125PW
EV_CRTDCLK (25) CRT
1
9
DDCCLK_AUX3P
DDCDATA_AUX3N AM30 EV_CRTDDAT (25)
10u_6 1u_4 .1u_4 C613 27p/50V_4
AL29 0_4
(24) GPU_D+ AF29 DPLUS THERMAL
DDCCLK_AUX4P
DDCDATA_AUX4N AM29
EV_LVDS_DDCCLK
EV_LVDS_DDCDAT
(25)
(25)
LVDS (17) GPU_RST#
A AG29 R766 *7.5K_4 A
(24) GPU_D- DMINUS
+1.8V(5mA) DDCCLK_AUX5P AN21
120 ohm/300mA AM21 T14 C942
L25 BLM15BD121SN1_4 TS_VDD T13 DDCDATA_AUX5N T15
+1.8V_GPU AK32 TS_FDO
TS_VDD AJ32 AJ30 *100p/50V_6
C138 C137 TSVDD DDC6CLK T18
AJ33 TSVSS DDC6DATA AJ31
T4
10u_6 .1u_4 AK30
NC_DDCCLK_AUX7P T10
NC_DDCDATA_AUX7N AK29
T3

Madison/Broadway_M2
PROJECT : ZY9B
1A
Madison/Broadway-HOST I/F
5 4 3 2 1
5 4 3 2 1
VMA_DQ[63..0] VMB_DQ[63..0]
(20) VMA_DQ[63..0] (21) VMB_DQ[63..0]
VMA_DM[7..0] VMB_DM[7..0]
(20) VMA_DM[7..0] (21) VMB_DM[7..0]
U41C U41D
VMA_RDQS[7..0] DDR2 DDR2 VMB_RDQS[7..0] DDR2 DDR2
(20) VMA_RDQS[7..0] GDDR3/GDDR5 GDDR5/GDDR3 (21) VMB_RDQS[7..0] GDDR3/GDDR5 GDDR5/GDDR3
VMA_WDQS[7..0] DDR3 DDR3 VMB_WDQS[7..0] DDR3 DDR3
(20) VMA_WDQS[7..0] (21) VMB_WDQS[7..0]
VMA_DQ0 C37 G24 VMA_MA0 VMB_DQ0 C5 P8 VMB_MA0
VMA_DQ1 DQA0_0/DQA_0 MAA0_0/MAA_0 VMA_MA1 VMB_DQ1 DQB0_0/DQB_0 MAB0_0/MAB_0 VMB_MA1
C35 J23 C3 T9
MEMORY INTERFACE A
D
VMA_DQ2 DQA0_1/DQA_1 MAA0_1/MAA_1 VMA_MA2 VMB_MA[13..0] VMB_DQ2 DQB0_1/DQB_1 MAB0_1/MAB_1 VMB_MA2 D
A35 H24 E3 P9
MEMORY INTERFACE B
VMA_MA[13..0] DQA0_2/DQA_2 MAA0_2/MAA_2 (21) VMB_MA[13..0] DQB0_2/DQB_2 MAB0_2/MAB_2
VMA_DQ3 E34 J24 VMA_MA3 VMB_DQ3 E1 N7 VMB_MA3
(20) VMA_MA[13..0] DQA0_3/DQA_3 MAA0_3/MAA_3 DQB0_3/DQB_3 MAB0_3/MAB_3
VMA_DQ4 G32 H26 VMA_MA4 VMB_DQ4 F1 N8 VMB_MA4
VMA_DQ5 DQA0_4/DQA_4 MAA0_4/MAA_4 VMA_MA5 VMB_BA0 VMB_DQ5 DQB0_4/DQB_4 MAB0_4/MAB_4 VMB_MA5
D33 DQA0_5/DQA_5 MAA0_5/MAA_5 J26 (21) VMB_BA0 F3 DQB0_5/DQB_5 MAB0_5/MAB_5 N9
VMA_BA0 VMA_DQ6 F32 H21 VMA_MA6 VMB_BA1 VMB_DQ6 F5 U9 VMB_MA6
(20) VMA_BA0 DQA0_6/DQA_6 MAA0_6/MAA_6 (21) VMB_BA1 DQB0_6/DQB_6 MAB0_6/MAB_6
VMA_BA1 VMA_DQ7 E32 G21 VMA_MA7 VMB_BA2 VMB_DQ7 G4 U8 VMB_MA7
(20) VMA_BA1 DQA0_7/DQA_7 MAA0_7/MAA_7 (21) VMB_BA2 DQB0_7/DQB_7 MAB0_7/MAB_7
VMA_BA2 VMA_DQ8 D31 H19 VMA_MA8 VMB_DQ8 H5 Y9 VMB_MA8
(20) VMA_BA2 DQA0_8/DQA_8 MAA1_0/MAA_8 DQB0_8/DQB_8 MAB1_0/MAB_8
VMA_DQ9 F30 H20 VMA_MA9 VMB_DQ9 H6 W9 VMB_MA9
C30 DQA0_10/DQA_10 MAA1_2/MAA_10 L13 J4 DQB0_10/DQB_10 MAB1_2/MAB_10 AC8
VMA_DQ11 A30 G16 VMA_MA11 VMB_DQ11 K6 AC9 VMB_MA11
F28 DQA0_12/DQA_12 MAA1_4/MAA_12 J16 K5 DQB0_12/DQB_12 MAB1_4/MAB_12 AA7
VMA_DQ13 C28 H16 VMA_BA2 VMB_DQ13 L4 AA8 VMB_BA2
VMA_DQ14 DQA0_13/DQA_13 MAA1_5/MAA_13_BA2 VMA_BA0 VMB_DQ14 DQB0_13/DQB_13 MAB1_5/BA2 VMB_BA0
A28 DQA0_14/DQA_14 MAA1_6/MAA_14_BA0 J17 M6 DQB0_14/DQB_14 MAB1_6/BA0 Y8
VMA_DQ15 E28 H17 VMA_BA1 VMB_DQ15 M1 AA9 VMB_BA1
VMA_DQ16 DQA0_15/DQA_15 MAA1_7/MAA_A15_BA1 VMB_DQ16 DQB0_15/DQB_15 MAB1_7/BA1
D27 DQA0_16/DQA_16 M3 DQB0_16/DQB_16
VMA_DQ17 F26 A32 VMA_DM0 VMB_DQ17 M5 H3 VMB_DM0
VMA_DQ18 DQA0_17/DQA_17 WCKA0_0/DQMA_0 VMA_DM1 VMB_DQ18 DQB0_17/DQB_17 WCKB0_0/DQMB_0 VMB_DM1
C26 DQA0_18/DQA_18 WCKA0B_0/DQMA_1 C32 N4 DQB0_18/DQB_18 WCKB0B_0/DQMB_1 H1
VMA_DQ19 A26 D23 VMA_DM2 VMB_DQ19 P6 T3 VMB_DM2
F24 DQA0_20/DQA_20 WCKA0B_1/DQMA_3 E22 P5 DQB0_20/DQB_20 WCKB0B_1/DQMB_3 T5
VMA_DQ21 C24 C14 VMA_DM4 VMB_DQ21 R4 AE4 VMB_DM4
A24 DQA0_22/DQA_22 WCKA1B_0/DQMA_5 A14 T6 DQB0_22/DQB_22 WCKB1B_0/DQMB_5 AF5
VMA_DQ23 E24 E10 VMA_DM6 VMB_DQ23 T1 AK6 VMB_DM6
C22 DQA0_24/DQA_24 WCKA1B_1/DQMA_7 D9 U4 DQB0_24/DQB_24 WCKB1B_1/DQMB_7 AK5
VMA_DQ25 A22 VMB_DQ25 V6
VMA_DQ26 DQA0_25/DQA_25 GDDR5/DDR2/GDDR3 VMA_RDQS0 VMB_DQ26 DQB0_25/DQB_25 GDDR5/DDR2/GDDR3 VMB_RDQS0
F22 DQA0_26/DQA_26 EDCA0_0/QSA_0/RDQSA_0 C34 V1 DQB0_26/DQB_26 EDCB0_0/QSB_0/RDQSB_0 F6
VMA_DQ27 D21 D29 VMA_RDQS1 VMB_DQ27 V3 K3 VMB_RDQS1
VMA_DQ28 DQA0_27/DQA_27 EDCA0_1/QSA_1/RDQSA_1 VMA_RDQS2 VMB_DQ28 DQB0_27/DQB_27 EDCB0_1/QSB_1/RDQSB_1 VMB_RDQS2
A20 DQA0_28/DQA_28 EDCA0_2/QSA_2/RDQSA_2 D25 Y6 DQB0_28/DQB_28 EDCB0_2/QSB_2/RDQSB_2 P3
VMA_DQ29 F20 E20 VMA_RDQS3 QSA[7..0] VMB_DQ29 Y1 V5 VMB_RDQS3 QSB[7..0]
D19 DQA0_30/DQA_30 EDCA1_0/QSA_4/RDQSA_4 E16 Y3 DQB0_30/DQB_30 EDCB1_0/QSB_4/RDQSB_4 AB5
VMA_DQ31 E18 E12 VMA_RDQS5 VMB_DQ31 Y5 AH1 VMB_RDQS5
C18 DQA1_0/DQA_32 EDCA1_2/QSA_6/RDQSA_6 J10 AA4 DQB1_0/DQB_32 EDCB1_2/QSB_6/RDQSB_6 AJ9
VMA_DQ33 A18 D7 VMA_RDQS7 VMB_DQ33 AB6 AM5 VMB_RDQS7
VMA_DQ34 DQA1_1/DQA_33 EDCA1_3/QSA_7/RDQSA_7 VMB_DQ34 DQB1_1/DQB_33 EDCB1_3/QSB_7/RDQSB_7
F18 DQA1_2/DQA_34 AB1 DQB1_2/DQB_34
VMA_DQ35 D17 A34 VMA_WDQS0 VMB_DQ35 AB3 G7 VMB_WDQS0
VMA_DQ36 DQA1_3/DQA_35 DDBIA0_0/QSA_0B/WDQSA_0 VMA_WDQS1 VMB_DQ36 DQB1_3/DQB_35 DDBIB0_0/QSB_0B/WDQSB_0 VMB_WDQS1
A16 DQA1_4/DQA_36 DDBIA0_1/QSA_1B/WDQSA_1 E30 AD6 DQB1_4/DQB_36 DDBIB0_1/QSB_1B/WDQSB_1 K1
VMA_DQ37 F16 E26 VMA_WDQS2 VMB_DQ37 AD1 P1 VMB_WDQS2
D15 DQA1_6/DQA_38 DDBIA0_3/QSA_3B/WDQSA_3 C20 QSA#[7..0] AD3 DQB1_6/DQB_38 DDBIB0_3/QSB_3B/WDQSB_3 W4 QSB#[7..0]
C VMA_DQ39 E14 C16 VMA_WDQS4 VMB_DQ39 AD5 AC4 VMB_WDQS4 C
F14 DQA1_8/DQA_40 DDBIA1_1/QSA_5B/WDQSA_5 C12 AF1 DQB1_8/DQB_40 DDBIB1_1/QSB_5B/WDQSB_5 AH3
VMA_DQ41 D13 J11 VMA_WDQS6 VMB_DQ41 AF3 AJ8 VMB_WDQS6
F12 DQA1_10/DQA_42 DDBIA1_3/QSA_7B/WDQSA_7 F8 AF6 DQB1_10/DQB_42 DDBIB1_3/QSB_7B/WDQSB_7 AM3
VMA_DQ43 A12 VMB_DQ43 AG4
VMA_DQ44 DQA1_11/DQA_43 VMB_DQ44 DQB1_11/DQB_43
D11 DQA1_12/DQA_44 ADBIA0/ODTA0 J21 VMA_ODT0 (20) AH5 DQB1_12/DQB_44 ADBIB0/ODTB0 T7 VMB_ODT0 (21)
VMA_DQ45 F10 G19 VMB_DQ45 AH6 W7
DQA1_13/DQA_45 ADBIA1/ODTA1 VMA_ODT1 (20) DQB1_13/DQB_45 ADBIB1/ODTB1 VMB_ODT1 (21)
VMA_DQ46 A10 VMB_DQ46 AJ4
VMA_DQ47 DQA1_14/DQA_46 VMA_CLK0 VMB_DQ47 DQB1_14/DQB_46 VMB_CLK0
C10 DQA1_15/DQA_47 CLKA0 H27 VMA_CLK0 (20) AK3 DQB1_15/DQB_47 CLKB0 L9 VMB_CLK0 (21)
VMA_DQ48 G13 G27 VMA_CLK0# VMB_DQ48 AF8 L8 VMB_CLK0#
DQA1_16/DQA_48 CLKA0B VMA_CLK0# (20) DQB1_16/DQB_48 CLKB0B VMB_CLK0# (21)
VMA_DQ49 H13 VMB_DQ49 AF9
VMA_DQ50 DQA1_17/DQA_49 VMA_CLK1 VMB_DQ50 DQB1_17/DQB_49 VMB_CLK1
J13 DQA1_18/DQA_50 CLKA1 J14 VMA_CLK1 (20) AG8 DQB1_18/DQB_50 CLKB1 AD8 VMB_CLK1 (21)
VMA_DQ51 H11 H14 VMA_CLK1# VMB_DQ51 AG7 AD7 VMB_CLK1#
DQA1_19/DQA_51 CLKA1B VMA_CLK1# (20) DQB1_19/DQB_51 CLKB1B VMB_CLK1# (21)
VMA_DQ52 G10 VMB_DQ52 AK9
VMA_DQ53 DQA1_20/DQA_52 VMA_RAS0# VMB_DQ53 DQB1_20/DQB_52 VMB_RAS0#
G8 DQA1_21/DQA_53 RASA0B K23 VMA_RAS0# (20) AL7 DQB1_21/DQB_53 RASB0B T10 VMB_RAS0# (21)
VMA_DQ54 K9 K19 VMA_RAS1# VMB_DQ54 AM8 Y10 VMB_RAS1#
DQA1_22/DQA_54 RASA1B VMA_RAS1# (20) DQB1_22/DQB_54 RASB1B VMB_RAS1# (21)
VMA_DQ55 K10 VMB_DQ55 AM7
VMA_DQ56 DQA1_23/DQA_55 VMA_CAS0# VMB_DQ56 DQB1_23/DQB_55 VMB_CAS0#
G9 DQA1_24/DQA_56 CASA0B K20 VMA_CAS0# (20) AK1 DQB1_24/DQB_56 CASB0B W10 VMB_CAS0# (21)
+1.5V_GPU VMA_DQ57 A8 K17 VMA_CAS1# VMB_DQ57 AL4 AA10 VMB_CAS1#
DQA1_25/DQA_57 CASA1B VMA_CAS1# (20) DQB1_25/DQB_57 CASB1B VMB_CAS1# (21)
VMA_DQ58 C8 +1.5V_GPU VMB_DQ58 AM6
VMA_DQ59 DQA1_26/DQA_58 VMA_CS0# VMB_DQ59 DQB1_26/DQB_58 VMB_CS0#
E8 DQA1_27/DQA_59 CSA0B_0 K24 VMA_CS0# (20) AM1 DQB1_27/DQB_59 CSB0B_0 P10 VMB_CS0# (21)
VMA_DQ60 A6 K27 VMB_DQ60 AN4 L10
VMA_DQ61 DQA1_28/DQA_60 CSA0B_1 VMB_DQ61 DQB1_28/DQB_60 CSB0B_1
C6 DQA1_29/DQA_61 AP3 DQB1_29/DQB_61
R43 VMA_DQ62 E6 M13 VMA_CS1# VMB_DQ62 AP1 AD10 VMB_CS1#
DQA1_30/DQA_62 CSA1B_0 VMA_CS1# (20) DQB1_30/DQB_62 CSB1B_0 VMB_CS1# (21)
40.2/F_4 VMA_DQ63 A5 K16 R41 VMB_DQ63 AP5 AC10
DQA1_31/DQA_63 CSA1B_1 40.2/F_4 DQB1_31/DQB_63 CSB1B_1
MVREFDA L18 K21 VMA_CKE0 U10 VMB_CKE0
MVREFDA CKEA0 VMA_CKE0 (20) CKEB0 VMB_CKE0 (21)
MVREFSA L20 J20 VMA_CKE1 MVREFDB Y12 AA11 VMB_CKE1
MVREFSA CKEA1 VMA_CKE1 (20) MVREFDB CKEB1 VMB_CKE1 (21)
MVREFSB AA12
R106 243/F_4 VMA_WE0# MVREFSB VMB_WE0#
L27 MEM_CALRN0 WEA0B K26 VMA_WE0# (20) WEB0B N10 VMB_WE0# (21)
R45 C95 R103 243/F_4 N12 L15 VMA_WE1# AB11 VMB_WE1#
MEM_CALRN1 WEA1B VMA_WE1# (20) (18) TESTEN WEB1B VMB_WE1# (21)
100/F_4 .1u/10V_4 +1.5V_GPU R34 243/F_4 AG12 R46 C86
MEM_CALRN2 100/F_4 .1u/10V_4 R761 10K/F_4
+3V_D
R107 243/F_4 VMA_MA13 R86 *1K_4 VMB_MA13
GDDR5
M12 H23 AD28 T8
GDDR5
R102 243/F_4 MEM_CALRP1 MAA0_8 TESTEN MAB0_8 R439 *4.7K_4
M27 MEM_CALRP0 MAA1_8 J19 MAB1_8 W8 +1.5V_GPU
R82 243/F_4 AH12 AK10
MEM_CALRP2 CLKTESTA R755 680_4
AL10 CLKTESTB DRAM_RST AH11 MEM_RST# (20,21)
+1.5V_GPU
B B
+1.5V_GPU
AL31 R72 R33
RSVD *0_4 *0_4 R756
C616
R36 10K_4 68p/50V_4
40.2/F_4 Madison/Broadway_M2 R35 Madison/Broadway_M2
40.2/F_4
R38 C82
100/F_4 .1u/10V_4 R39 C78
100/F_4 .1u/10V_4
A A

PROJECT : ZY9B
1A
Madison/Broadway-MEM I/F
5 4 3 2 1
5 4 3 2 1
VMA_DQ[63..0]
(19) VMA_DQ[63..0]
(19) VMA_DM[7..0]
VMA_DM[7..0] CHANNEL A: 512MB DDR3 (64M*16*4pcs)
VMA_RDQS[7..0] QSA[7..0]
(19) VMA_RDQS[7..0]
VMA_WDQS[7..0] QSA#[7..0]
(19) VMA_WDQS[7..0]
U44 U19 U43 U18
VREFC_VMA1 M8 E3 VMA_DQ19 VREFC_VMA2 M8 E3 VMA_DQ28 VREFC_VMA3 M8 E3 VMA_DQ32 VREFC_VMA4 M8 E3 VMA_DQ54

VREFD_VMA1 VREFCA DQL0 VMA_DQ21 VREFD_VMA2 VREFCA DQL0 VMA_DQ24 VREFD_VMA3 VREFCA DQL0 VMA_DQ34 VREFD_VMA4 VREFCA DQL0 VMA_DQ52
H1 VREFDQ DQL1 F7 H1 VREFDQ DQL1 F7 H1 VREFDQ DQL1 F7 H1 VREFDQ DQL1 F7
F2 VMA_DQ17 F2 VMA_DQ30 F2 VMA_DQ37 F2 VMA_DQ55
VMA_MA0 DQL2 VMA_DQ23 VMA_MA0 DQL2 VMA_DQ26 VMA_MA0 DQL2 VMA_DQ38 VMA_MA0 DQL2 VMA_DQ48
(19) VMA_MA0 N3 A0 DQL3 F8 N3 A0 DQL3 F8 N3 A0 DQL3 F8 N3 A0 DQL3 F8
VMA_MA1 P7 H3 VMA_DQ16 VMA_MA1 P7 H3 VMA_DQ29 VMA_MA1 P7 H3 VMA_DQ36 VMA_MA1 P7 H3 VMA_DQ50
(19) VMA_MA1 A1 DQL4 A1 DQL4 A1 DQL4 A1 DQL4
VMA_MA3 N2 G2 VMA_DQ18 VMA_MA3 N2 G2 VMA_DQ31 VMA_MA3 N2 G2 VMA_DQ35 VMA_MA3 N2 G2 VMA_DQ53
D (19) VMA_MA3 A3 DQL6 A3 DQL6 A3 DQL6 A3 DQL6 D
VMA_MA5 P2 VMA_MA5 P2 VMA_MA5 P2 VMA_MA5 P2
(19) VMA_MA5 A5 A5 A5 A5
VMA_MA6 R8 VMA_MA6 R8 VMA_MA6 R8 VMA_MA6 R8
(19) VMA_MA6 A6 A6 A6 A6
VMA_MA7 R2 D7 VMA_DQ15 VMA_MA7 R2 D7 VMA_DQ1 VMA_MA7 R2 D7 VMA_DQ60 VMA_MA7 R2 D7 VMA_DQ44
(19) VMA_MA7 A7 DQU0 A7 DQU0 A7 DQU0 A7 DQU0
VMA_MA8 T8 C3 VMA_DQ11 VMA_MA8 T8 C3 VMA_DQ7 VMA_MA8 T8 C3 VMA_DQ59 VMA_MA8 T8 C3 VMA_DQ43
VMA_MA9 R3 C8 VMA_DQ12 VMA_MA9 R3 C8 VMA_DQ0 VMA_MA9 R3 C8 VMA_DQ62 VMA_MA9 R3 C8 VMA_DQ47
VMA_MA10 L7 C2 VMA_DQ9 VMA_MA10 L7 C2 VMA_DQ4 VMA_MA10 L7 C2 VMA_DQ56 VMA_MA10 L7 C2 VMA_DQ40
(19) VMA_MA10 A10/AP DQU3 A10/AP DQU3 A10/AP DQU3 A10/AP DQU3
VMA_MA11 R7 A7 VMA_DQ13 VMA_MA11 R7 A7 VMA_DQ2 VMA_MA11 R7 A7 VMA_DQ61 VMA_MA11 R7 A7 VMA_DQ45
VMA_MA12 N7 A2 VMA_DQ8 VMA_MA12 N7 A2 VMA_DQ6 VMA_MA12 N7 A2 VMA_DQ57 VMA_MA12 N7 A2 VMA_DQ42
(19) VMA_MA12 A12/BC DQU5 A12/BC DQU5 A12/BC DQU5 A12/BC DQU5
VMA_MA13 T3 B8 VMA_DQ14 VMA_MA13 T3 B8 VMA_DQ3 VMA_MA13 T3 B8 VMA_DQ63 VMA_MA13 T3 B8 VMA_DQ46
T7 A3 VMA_DQ10 T7 A3 VMA_DQ5 T7 A3 VMA_DQ58 T7 A3 VMA_DQ41
A14 DQU7 A14 DQU7 A14 DQU7 A14 DQU7
M7 A15 M7 A15 M7 A15 M7 A15
+1.5V_GPU +1.5V_GPU +1.5V_GPU +1.5V_GPU
VMA_BA0 M2 B2 VMA_BA0 M2 B2 VMA_BA0 M2 B2 VMA_BA0 M2 B2

(19) VMA_BA0 BA0 VDD#B2 BA0 VDD#B2 BA0 VDD#B2 BA0 VDD#B2
VMA_BA1 N8 D9 VMA_BA1 N8 D9 VMA_BA1 N8 D9 VMA_BA1 N8 D9
(19) VMA_BA1 BA1 VDD#D9 BA1 VDD#D9 BA1 VDD#D9 BA1 VDD#D9
VMA_BA2 M3 G7 VMA_BA2 M3 G7 VMA_BA2 M3 G7 VMA_BA2 M3 G7
(19) VMA_BA2 BA2 VDD#G7 BA2 VDD#G7 BA2 VDD#G7 BA2 VDD#G7
VDD#K2 K2 VDD#K2 K2 VDD#K2 K2 VDD#K2 K2
VDD#N1 N1 VDD#N1 N1 VDD#N1 N1 VDD#N1 N1
VMA_CLK0 J7 N9 VMA_CLK0 J7 N9 VMA_CLK1 J7 N9 VMA_CLK1 J7 N9
(19) VMA_CLK0 CK VDD#N9 CK VDD#N9 (19) VMA_CLK1 CK VDD#N9 CK VDD#N9
VMA_CLK0# K7 R1 VMA_CLK0# K7 R1 VMA_CLK1# K7 R1 VMA_CLK1# K7 R1
(19) VMA_CLK0# CK VDD#R1 CK VDD#R1 (19) VMA_CLK1# CK VDD#R1 CK VDD#R1
VMA_CKE0 K9 R9 VMA_CKE0 K9 R9 VMA_CKE1 K9 R9 VMA_CKE1 K9 R9
(19) VMA_CKE0 CKE VDD#R9 CKE VDD#R9 (19) VMA_CKE1 CKE VDD#R9 CKE VDD#R9
VMA_ODT0 K1 A1 VMA_ODT0 K1 A1 VMA_ODT1 K1 A1 VMA_ODT1 K1 A1

(19) VMA_ODT0 ODT VDDQ#A1 ODT VDDQ#A1 (19) VMA_ODT1 ODT VDDQ#A1 ODT VDDQ#A1
VMA_CS0# L2 A8 VMA_CS0# L2 A8 VMA_CS1# L2 A8 VMA_CS1# L2 A8
(19) VMA_CS0# CS VDDQ#A8 CS VDDQ#A8 (19) VMA_CS1# CS VDDQ#A8 CS VDDQ#A8
VMA_RAS0# J3 C1 VMA_RAS0# J3 C1 VMA_RAS1# J3 C1 VMA_RAS1# J3 C1
(19) VMA_RAS0# RAS VDDQ#C1 RAS VDDQ#C1 (19) VMA_RAS1# RAS VDDQ#C1 RAS VDDQ#C1
VMA_CAS0# K3 C9 VMA_CAS0# K3 C9 VMA_CAS1# K3 C9 VMA_CAS1# K3 C9
(19) VMA_CAS0# CAS VDDQ#C9 CAS VDDQ#C9 (19) VMA_CAS1# CAS VDDQ#C9 CAS VDDQ#C9
VMA_WE0# L3 D2 VMA_WE0# L3 D2 VMA_WE1# L3 D2 VMA_WE1# L3 D2
(19) VMA_WE0# WE VDDQ#D2 WE VDDQ#D2 (19) VMA_WE1# WE VDDQ#D2 WE VDDQ#D2
VDDQ#E9 E9 VDDQ#E9 E9 VDDQ#E9 E9 VDDQ#E9 E9
VDDQ#F1 F1 VDDQ#F1 F1 VDDQ#F1 F1 VDDQ#F1 F1
VMA_RDQS2 F3 H2 VMA_RDQS3 F3 H2 VMA_RDQS4 F3 H2 VMA_RDQS6 F3 H2
VMA_RDQS1 DQSL VDDQ#H2 VMA_RDQS0 DQSL VDDQ#H2 VMA_RDQS7 DQSL VDDQ#H2 VMA_RDQS5 DQSL VDDQ#H2
C7 DQSU VDDQ#H9 H9 C7 DQSU VDDQ#H9 H9 C7 DQSU VDDQ#H9 H9 C7 DQSU VDDQ#H9 H9
VMA_DM2 E7 A9 VMA_DM3 E7 A9 VMA_DM4 E7 A9 VMA_DM6 E7 A9

VMA_DM1 DML VSS#A9 VMA_DM0 DML VSS#A9 VMA_DM7 DML VSS#A9 VMA_DM5 DML VSS#A9
C D3 DMU VSS#B3 B3 D3 DMU VSS#B3 B3 D3 DMU VSS#B3 B3 D3 DMU VSS#B3 B3 C
VSS#E1 E1 VSS#E1 E1 VSS#E1 E1 VSS#E1 E1

VSS#G8 G8 VSS#G8 G8 VSS#G8 G8 VSS#G8 G8
VMA_WDQS2 G3 J2 VMA_WDQS3 G3 J2 VMA_WDQS4 G3 J2 VMA_WDQS6 G3 J2
VMA_WDQS1 DQSL VSS#J2 VMA_WDQS0 DQSL VSS#J2 VMA_WDQS7 DQSL VSS#J2 VMA_WDQS5 DQSL VSS#J2
B7 DQSU VSS#J8 J8 B7 DQSU VSS#J8 J8 B7 DQSU VSS#J8 J8 B7 DQSU VSS#J8 J8
VSS#M1 M1 VSS#M1 M1 VSS#M1 M1 VSS#M1 M1
VSS#P1 P1 VSS#P1 P1 VSS#P1 P1 VSS#P1 P1
MEM_RST# T2 P9 MEM_RST# T2 P9 MEM_RST# T2 P9 MEM_RST# T2 P9
(19,21) MEM_RST# RESET VSS#P9 RESET VSS#P9 RESET VSS#P9 RESET VSS#P9
VSS#T1 T1 VSS#T1 T1 VSS#T1 T1 VSS#T1 T1
VMA_ZQ1 L8 T9 VMA_ZQ2 L8 T9 VMA_ZQ3 L8 T9 VMA_ZQ4 L8 T9
ZQ VSS#T9 ZQ VSS#T9 ZQ VSS#T9 ZQ VSS#T9
VSSQ#B1 B1 VSSQ#B1 B1 VSSQ#B1 B1 VSSQ#B1 B1

R509 D1 R135 D1 R517 D1 R516 D1
VSSQ#D1 VSSQ#D1 VSSQ#D1 VSSQ#D1
243/F_4 VSSQ#D8 D8 243/F_4 VSSQ#D8 D8 243/F_4 VSSQ#D8 D8 243/F_4 VSSQ#D8 D8
VSSQ#E2 E2 VSSQ#E2 E2 VSSQ#E2 E2 VSSQ#E2 E2
J1 NC#J1 VSSQ#E8 E8 J1 NC#J1 VSSQ#E8 E8 J1 NC#J1 VSSQ#E8 E8 J1 NC#J1 VSSQ#E8 E8
L1 NC#L1 VSSQ#F9 F9 L1 NC#L1 VSSQ#F9 F9 L1 NC#L1 VSSQ#F9 F9 L1 NC#L1 VSSQ#F9 F9
J9 NC#J9 VSSQ#G1 G1 J9 NC#J9 VSSQ#G1 G1 J9 NC#J9 VSSQ#G1 G1 J9 NC#J9 VSSQ#G1 G1
L9 NC#L9 VSSQ#G9 G9 L9 NC#L9 VSSQ#G9 G9 L9 NC#L9 VSSQ#G9 G9 L9 NC#L9 VSSQ#G9 G9
100-BALL 100-BALL 100-BALL 100-BALL

SDRAM DDR3 SDRAM DDR3 SDRAM DDR3 SDRAM DDR3
VRAM _DDR3 VRAM _DDR3 VRAM _DDR3 VRAM _DDR3
TOP Left BOT Left BOT Right TOP Right

Group-A0 VREF Group-A1 VREF
+1.5V_GPU +1.5V_GPU +1.5V_GPU +1.5V_GPU +1.5V_GPU +1.5V_GPU +1.5V_GPU +1.5V_GPU
B B
R518 R508 R138 R502 R521 R500 R510 R501
4.99K/F_4 4.99K/F_4 4.99K/F_4 4.99K/F_4 4.99K/F_4 4.99K/F_4 4.99K/F_4 4.99K/F_4
VREFC_VMA1 VREFD_VMA1 VREFC_VMA2 VREFD_VMA2 VREFC_VMA3 VREFD_VMA3 VREFC_VMA4 VREFD_VMA4
R515 R512 R136 R507 R519 R503 R513 R504

4.99K/F_4 C748 4.99K/F_4 C749 4.99K/F_4 C353 4.99K/F_4 C733 4.99K/F_4 C770 4.99K/F_4 C736 4.99K/F_4 C755 4.99K/F_4 C732
.1u/10V_4 .1u/10V_4 .1u/10V_4 .1u/10V_4 .1u/10V_4 .1u/10V_4 .1u/10V_4 .1u/10V_4
Group-A0 decoupling CAP Group-A1 decoupling CAP MEM_A1 CLK

MEM_A0 CLK
+1.5V_GPU
+1.5V_GPU
VMA_CLK1
VMA_CLK0
VMA_CLK1#
VMA_CLK0# C773 C750 C753 C406 C761 C740 C775 C762
C779 C781 C744 C768 C738 C321 C756 C741 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4
1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 R514 R511
R506 R505 56.2/F_4 56.2/F_4
56.2/F_4 56.2/F_4
+1.5V_GPU
+1.5V_GPU
C757
C724 C367 C746 C379 C758 C398 C402 C404 C763 .01u/16V_4
.01u/16V_4 C719 C332 C351 C707 C772 C344 C403 C352 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4
A 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 A
+1.5V_GPU
+1.5V_GPU
C774 C405 C407 C400 C327

C410
10u/6.3V_6
C703
10u/6.3V_6
C777
10u/6.3V_6
C776
10u/6.3V_6
C702
10u/6.3V_6
10u/6.3V_6 10u/6.3V_6 10u/6.3V_6 10u/6.3V_6 10u/6.3V_6
PROJECT : ZY9B
1A
MEMORY 1 channel A
5 4 3 2 1
5 4 3 2 1
(19) VMB_DQ[63..0]
VMB_DQ[63..0] CHANNEL B: 512MB DDR3 (64M*16*4pcs)
VMB_DM[7..0]
(19) VMB_DM[7..0]
VMB_RDQS[7..0] QSA[7..0]
(19) VMB_RDQS[7..0]
VMB_WDQS[7..0] QSA#[7..0]
(19) VMB_WDQS[7..0]
U15 U42 U39 U10
VREFC_VMB1 M8 E3 VMB_DQ4 VREFC_VMB2 M8 E3 VMB_DQ27 VREFC_VMB3 M8 E3 VMB_DQ32 VREFC_VMB4 M8 E3 VMB_DQ54

VREFD_VMB1 VREFCA DQL0 VMB_DQ2 VREFD_VMB2 VREFCA DQL0 VMB_DQ29 VREFD_VMB3 VREFCA DQL0 VMB_DQ38 VREFD_VMB4 VREFCA DQL0 VMB_DQ51
H1 VREFDQ DQL1 F7 H1 VREFDQ DQL1 F7 H1 VREFDQ DQL1 F7 H1 VREFDQ DQL1 F7
F2 VMB_DQ7 F2 VMB_DQ25 F2 VMB_DQ39 F2 VMB_DQ52
VMB_MA0 DQL2 VMB_DQ0 VMB_MA0 DQL2 VMB_DQ31 VMB_MA0 DQL2 VMB_DQ33 VMB_MA0 DQL2 VMB_DQ48
(19) VMB_MA0 N3 A0 DQL3 F8 N3 A0 DQL3 F8 N3 A0 DQL3 F8 N3 A0 DQL3 F8
VMB_MA1 P7 H3 VMB_DQ3 VMB_MA1 P7 H3 VMB_DQ24 VMB_MA1 P7 H3 VMB_DQ35 VMB_MA1 P7 H3 VMB_DQ53
(19) VMB_MA1 A1 DQL4 A1 DQL4 A1 DQL4 A1 DQL4
VMB_MA3 N2 G2 VMB_DQ5 VMB_MA3 N2 G2 VMB_DQ26 VMB_MA3 N2 G2 VMB_DQ34 VMB_MA3 N2 G2 VMB_DQ55
D (19) VMB_MA3 A3 DQL6 A3 DQL6 A3 DQL6 A3 DQL6 D
VMB_MA5 P2 VMB_MA5 P2 VMB_MA5 P2 VMB_MA5 P2
(19) VMB_MA5 A5 A5 A5 A5
VMB_MA6 R8 VMB_MA6 R8 VMB_MA6 R8 VMB_MA6 R8
(19) VMB_MA6 A6 A6 A6 A6
VMB_MA7 R2 D7 VMB_DQ17 VMB_MA7 R2 D7 VMB_DQ11 VMB_MA7 R2 D7 VMB_DQ60 VMB_MA7 R2 D7 VMB_DQ42
(19) VMB_MA7 A7 DQU0 A7 DQU0 A7 DQU0 A7 DQU0
VMB_MA8 T8 C3 VMB_DQ21 VMB_MA8 T8 C3 VMB_DQ12 VMB_MA8 T8 C3 VMB_DQ59 VMB_MA8 T8 C3 VMB_DQ46
VMB_MA9 R3 C8 VMB_DQ16 VMB_MA9 R3 C8 VMB_DQ15 VMB_MA9 R3 C8 VMB_DQ63 VMB_MA9 R3 C8 VMB_DQ41
VMB_MA10 L7 C2 VMB_DQ18 VMB_MA10 L7 C2 VMB_DQ9 VMB_MA10 L7 C2 VMB_DQ56 VMB_MA10 L7 C2 VMB_DQ44
(19) VMB_MA10 A10/AP DQU3 A10/AP DQU3 A10/AP DQU3 A10/AP DQU3
VMB_MA11 R7 A7 VMB_DQ19 VMB_MA11 R7 A7 VMB_DQ13 VMB_MA11 R7 A7 VMB_DQ62 VMB_MA11 R7 A7 VMB_DQ43
VMB_MA12 N7 A2 VMB_DQ23 VMB_MA12 N7 A2 VMB_DQ8 VMB_MA12 N7 A2 VMB_DQ57 VMB_MA12 N7 A2 VMB_DQ45
(19) VMB_MA12 A12/BC DQU5 A12/BC DQU5 A12/BC DQU5 A12/BC DQU5
VMB_MA13 T3 B8 VMB_DQ20 VMB_MA13 T3 B8 VMB_DQ14 VMB_MA13 T3 B8 VMB_DQ61 VMB_MA13 T3 B8 VMB_DQ40
T7 A3 VMB_DQ22 T7 A3 VMB_DQ10 T7 A3 VMB_DQ58 T7 A3 VMB_DQ47
A14 DQU7 A14 DQU7 A14 DQU7 A14 DQU7
M7 A15 M7 A15 M7 A15 M7 A15
VMB_BA0 M2 B2 VMB_BA0 M2 B2 VMB_BA0 M2 B2 VMB_BA0 M2 B2

(19) VMB_BA0 BA0 VDD#B2 BA0 VDD#B2 BA0 VDD#B2 BA0 VDD#B2
VMB_BA1 N8 D9 VMB_BA1 N8 D9 VMB_BA1 N8 D9 VMB_BA1 N8 D9
(19) VMB_BA1 BA1 VDD#D9 BA1 VDD#D9 BA1 VDD#D9 BA1 VDD#D9
VMB_BA2 M3 G7 VMB_BA2 M3 G7 VMB_BA2 M3 G7 VMB_BA2 M3 G7
(19) VMB_BA2 BA2 VDD#G7 BA2 VDD#G7 BA2 VDD#G7 BA2 VDD#G7
VDD#N1 N1 VDD#N1 N1 VDD#N1 N1 VDD#N1 N1
VMB_CLK0 J7 N9 VMB_CLK0 J7 N9 VMB_CLK1 J7 N9 VMB_CLK1 J7 N9
(19) VMB_CLK0 CK VDD#N9 CK VDD#N9 (19) VMB_CLK1 CK VDD#N9 CK VDD#N9
VMB_CLK0# K7 R1 VMB_CLK0# K7 R1 VMB_CLK1# K7 R1 VMB_CLK1# K7 R1
(19) VMB_CLK0# CK VDD#R1 CK VDD#R1 (19) VMB_CLK1# CK VDD#R1 CK VDD#R1
VMB_CKE0 K9 R9 VMB_CKE0 K9 R9 VMB_CKE1 K9 R9 VMB_CKE1 K9 R9
(19) VMB_CKE0 CKE VDD#R9 CKE VDD#R9 (19) VMB_CKE1 CKE VDD#R9 CKE VDD#R9
VMB_ODT0 K1 A1 VMB_ODT0 K1 A1 VMB_ODT1 K1 A1 VMB_ODT1 K1 A1

(19) VMB_ODT0 ODT VDDQ#A1 ODT VDDQ#A1 (19) VMB_ODT1 ODT VDDQ#A1 ODT VDDQ#A1
VMB_CS0# L2 A8 VMB_CS0# L2 A8 VMB_CS1# L2 A8 VMB_CS1# L2 A8
(19) VMB_CS0# CS VDDQ#A8 CS VDDQ#A8 (19) VMB_CS1# CS VDDQ#A8 CS VDDQ#A8
VMB_RAS0# J3 C1 VMB_RAS0# J3 C1 VMB_RAS1# J3 C1 VMB_RAS1# J3 C1
(19) VMB_RAS0# RAS VDDQ#C1 RAS VDDQ#C1 (19) VMB_RAS1# RAS VDDQ#C1 RAS VDDQ#C1
VMB_CAS0# K3 C9 VMB_CAS0# K3 C9 VMB_CAS1# K3 C9 VMB_CAS1# K3 C9
(19) VMB_CAS0# CAS VDDQ#C9 CAS VDDQ#C9 (19) VMB_CAS1# CAS VDDQ#C9 CAS VDDQ#C9
VMB_WE0# L3 D2 VMB_WE0# L3 D2 VMB_WE1# L3 D2 VMB_WE1# L3 D2
(19) VMB_WE0# WE VDDQ#D2 WE VDDQ#D2 (19) VMB_WE1# WE VDDQ#D2 WE VDDQ#D2
VDDQ#E9 E9 VDDQ#E9 E9 VDDQ#E9 E9 VDDQ#E9 E9
VDDQ#F1 F1 VDDQ#F1 F1 VDDQ#F1 F1 VDDQ#F1 F1
VMB_RDQS0 F3 H2 VMB_RDQS3 F3 H2 VMB_RDQS4 F3 H2 VMB_RDQS6 F3 H2
VMB_RDQS2 DQSL VDDQ#H2 VMB_RDQS1 DQSL VDDQ#H2 VMB_RDQS7 DQSL VDDQ#H2 VMB_RDQS5 DQSL VDDQ#H2
C7 DQSU VDDQ#H9 H9 C7 DQSU VDDQ#H9 H9 C7 DQSU VDDQ#H9 H9 C7 DQSU VDDQ#H9 H9
VMB_DM0 E7 A9 VMB_DM3 E7 A9 VMB_DM4 E7 A9 VMB_DM6 E7 A9

VMB_DM2 DML VSS#A9 VMB_DM1 DML VSS#A9 VMB_DM7 DML VSS#A9 VMB_DM5 DML VSS#A9
C D3 DMU VSS#B3 B3 D3 DMU VSS#B3 B3 D3 DMU VSS#B3 B3 D3 DMU VSS#B3 B3 C
VSS#E1 E1 VSS#E1 E1 VSS#E1 E1 VSS#E1 E1

VSS#G8 G8 VSS#G8 G8 VSS#G8 G8 VSS#G8 G8
VMB_WDQS0 G3 J2 VMB_WDQS3 G3 J2 VMB_WDQS4 G3 J2 VMB_WDQS6 G3 J2
VMB_WDQS2 DQSL VSS#J2 VMB_WDQS1 DQSL VSS#J2 VMB_WDQS7 DQSL VSS#J2 VMB_WDQS5 DQSL VSS#J2
B7 DQSU VSS#J8 J8 B7 DQSU VSS#J8 J8 B7 DQSU VSS#J8 J8 B7 DQSU VSS#J8 J8
VSS#P1 P1 VSS#P1 P1 VSS#P1 P1 VSS#P1 P1
MEM_RST# T2 P9 MEM_RST# T2 P9 MEM_RST# T2 P9 MEM_RST# T2 P9
(19,20) MEM_RST# RESET VSS#P9 RESET VSS#P9 RESET VSS#P9 RESET VSS#P9
VSS#T1 T1 VSS#T1 T1 VSS#T1 T1 VSS#T1 T1
VMB_ZQ1 L8 T9 VMB_ZQ2 L8 T9 VMB_ZQ3 L8 T9 VMB_ZQ4 L8 T9
ZQ VSS#T9 ZQ VSS#T9 ZQ VSS#T9 ZQ VSS#T9

R114 D1 R474 D1 R438 D1 R468 D1
VSSQ#D1 VSSQ#D1 VSSQ#D1 VSSQ#D1
243/F_4 VSSQ#D8 D8 243/F_4 VSSQ#D8 D8 243/F_4 VSSQ#D8 D8 243/F_4 VSSQ#D8 D8
VSSQ#E2 E2 VSSQ#E2 E2 VSSQ#E2 E2 VSSQ#E2 E2
J1 NC#J1 VSSQ#E8 E8 J1 NC#J1 VSSQ#E8 E8 J1 NC#J1 VSSQ#E8 E8 J1 NC#J1 VSSQ#E8 E8
L1 NC#L1 VSSQ#F9 F9 L1 NC#L1 VSSQ#F9 F9 L1 NC#L1 VSSQ#F9 F9 L1 NC#L1 VSSQ#F9 F9
J9 NC#J9 VSSQ#G1 G1 J9 NC#J9 VSSQ#G1 G1 J9 NC#J9 VSSQ#G1 G1 J9 NC#J9 VSSQ#G1 G1
L9 NC#L9 VSSQ#G9 G9 L9 NC#L9 VSSQ#G9 G9 L9 NC#L9 VSSQ#G9 G9 L9 NC#L9 VSSQ#G9 G9
100-BALL 100-BALL 100-BALL 100-BALL

SDRAM DDR3 SDRAM DDR3 SDRAM DDR3 SDRAM DDR3
VRAM _DDR3 VRAM _DDR3 VRAM _DDR3 VRAM _DDR3
BOT Down TOP Down TOP Up BOT Up
Group-B0 VREF Group-B1 VREF

+1.5V_GPU +1.5V_GPU +1.5V_GPU +1.5V_GPU +1.5V_GPU +1.5V_GPU +1.5V_GPU +1.5V_GPU
B B
R112 R476 R473 R496 R437 R472 R470 R55

4.99K/F_4 4.99K/F_4 4.99K/F_4 4.99K/F_4 4.99K/F_4 4.99K/F_4 4.99K/F_4 4.99K/F_4
VREFC_VMB1 VREFD_VMB1 VREFC_VMB2 VREFD_VMB2 VREFC_VMB3 VREFD_VMB3 VREFC_VMB4 VREFD_VMB4
R113 R475 R477 R497 R436 R471 R469 R54

4.99K/F_4 C277 4.99K/F_4 C661 4.99K/F_4 C663 4.99K/F_4 C687 4.99K/F_4 C605 4.99K/F_4 C638 4.99K/F_4 C635 4.99K/F_4 C106
.1u/10V_4 .1u/10V_4 .1u/10V_4 .1u/10V_4 .1u/10V_4 .1u/10V_4 .1u/10V_4 .1u/10V_4
Group-B0 decoupling CAP Group-B1 decoupling CAP

MEM_B0 CLK MEM_B1 CLK
+1.5V_GPU +1.5V_GPU
VMB_CLK1
VMB_CLK0 VMB_CLK1#
C685 C665 C689 C692 C89 C686 C279 C641 C600 C639 C640 C643 C599 C90 C637
VMB_CLK0# 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4
R52 R53
56.2/F_4 56.2/F_4
R498 R499
56.2/F_4 56.2/F_4 +1.5V_GPU +1.5V_GPU
A C98 A
C278 C662 C601 C691 C664 C88 C634 C690 C103 C105 C670 C606 C642 C104 C607 .01u/16V_4
C688 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4
.01u/16V_4
+1.5V_GPU +1.5V_GPU

C280 C669 C656 C281 C655 C598 C92 C604 C647 C633 PROJECT : ZY9B
10u/6.3V_6 10u/6.3V_6 10u/6.3V_6 10u/6.3V_6 10u/6.3V_6 10u/6.3V_6 10u/6.3V_6 10u/6.3V_6 10u/6.3V_6 10u/6.3V_6 Size Document Number Rev
1A
MEMORY 2 channel B
5 4 3 2 1
5 4 3 2 1
U41F
U41E
For DDR3, MVDDQ = 1.5V (7.5A)
+1.5V_GPU MEM I/O +1.8V_GPU
PCIE (1.8V@400mA PCIE_VDDR) 180 ohm/1.5A AB39 A3
PCIE_VDDR L53 HCB1608KF-181T15_6 PCIE_VSS#1 GND#1
AC7 VDDR1#1 PCIE_VDDR#1 AA31 E39 PCIE_VSS#2 GND#2 A37
AD11 VDDR1#2 PCIE_VDDR#2 AA32 F34 PCIE_VSS#3 GND#3 AA16
AF7 VDDR1#3 PCIE_VDDR#3 AA33 F39 PCIE_VSS#4 GND#4 AA18
C780 C238 C693 C84 C778 AG10 AA34 C185 C660 C191 C196 C171 C659 C658 C654 G33 AA2
10u/6.3V_6 10u/6.3V_6 10u/6.3V_6 10u/6.3V_6 10u/6.3V_6 VDDR1#4 PCIE_VDDR#4 .1u/10V_4 .1u/10V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 10u/6.3V_6 PCIE_VSS#5 GND#5
AJ7 VDDR1#5 PCIE_VDDR#5 V28 G34 PCIE_VSS#6 GND#6 AA21
D
AK8 VDDR1#6 PCIE_VDDR#6 W29 H31 PCIE_VSS#7 GND#7 AA23 D
AL9 VDDR1#7 PCIE_VDDR#7 W30 H34 PCIE_VSS#8 GND#8 AA26
G11 VDDR1#8 PCIE_VDDR#8 Y31 H39 PCIE_VSS#9 GND#9 AA28
G14 VDDR1#9 J31 PCIE_VSS#10 GND#10 AA6
G17 VDDR1#10 J34 PCIE_VSS#11 GND#11 AB12
G20 G30 +1V K31 AB15
C244 C252 C236 C140 C148 C233 VDDR1#11 PCIE_VDDC#1 PCIE_VSS#12 GND#12
G23 VDDR1#12 PCIE_VDDC#2 G31 (1.0V@1.1A PCIE_VDDC) K34 PCIE_VSS#13 GND#13 AB17
1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 G26 H29 K39 AB20
VDDR1#13 PCIE_VDDC#3 PCIE_VSS#14 GND#14
G29 VDDR1#14 PCIE_VDDC#4 H30 L31 PCIE_VSS#15 GND#15 AB22
H10 VDDR1#15 PCIE_VDDC#5 J29 L34 PCIE_VSS#16 GND#16 AB24
J7 J30 C218 C609 C618 C611 C206 C237 C221 C116 M34 AB27
VDDR1#16 PCIE_VDDC#6 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 10u/6.3V_6 PCIE_VSS#17 GND#17
J9 VDDR1#17 PCIE_VDDC#7 L28 M39 PCIE_VSS#18 GND#18 AC11
K11 VDDR1#18 PCIE_VDDC#8 M28 N31 PCIE_VSS#19 GND#19 AC13
K13 VDDR1#19 PCIE_VDDC#9 N28 N34 PCIE_VSS#20 GND#20 AC16
K8 VDDR1#20 PCIE_VDDC#10 R28 P31 PCIE_VSS#21 GND#21 AC18
C255 C173 C195 C374 C235 C256 L12 T28 P34 AC2
1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 VDDR1#21 PCIE_VDDC#11 PCIE_VSS#22 GND#22
L16 VDDR1#22 PCIE_VDDC#12 U28 P39 PCIE_VSS#23 GND#23 AC21
L21 +VGPU_CORE R34 AC23
VDDR1#23 PCIE_VSS#24 GND#24
L23 VDDR1#24 (30A or more) T31 PCIE_VSS#25 GND#25 AC26
L26 VDDR1#25 VDDC#1 AA15 T34 PCIE_VSS#26 GND#26 AC28
L7 CORE AA17 T39 AC6
VDDR1#26 VDDC#2 PCIE_VSS#27 GND#27
M11 VDDR1#27 VDDC#3 AA20 U31 PCIE_VSS#28 GND#28 AD15
N11 AA22 C213 C210 C190 C188 C212 C157 C168 C215 C214 C179 U34 AD17
C217 C251 C87 C229 C249 VDDR1#28 VDDC#4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 PCIE_VSS#29 GND#29
P7 VDDR1#29 VDDC#5 AA24 V34 PCIE_VSS#30 GND#30 AD20
1u/6.3V_4 .1u/10V_4 .1u/10V_4 .1u/10V_4 .1u/10V_4 R11 AA27 V39 AD22
VDDR1#30 VDDC#6 PCIE_VSS#31 GND#31
U11 VDDR1#31 VDDC#7 AB16 W31 PCIE_VSS#32 GND#32 AD24
U7 VDDR1#32 VDDC#8 AB18 W34 PCIE_VSS#33 GND#33 AD27
Y11 VDDR1#33 VDDC#9 AB21 Y34 PCIE_VSS#34 GND#34 AD9
Y7 VDDR1#34 VDDC#10 AB23 Y39 PCIE_VSS#35 GND#35 AE2
VDDC#11 AB26 GND#36 AE6
VDDC#12 AB28 GND#37 AF10
AC17 C145 C144 C167 C184 C147 C152 C160 C202 C161 C151 AF16
VDDC#13 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 GND#38
VDDC#14 AC20 GND#39 AF18
LEVEL AC22 AF21
120 ohm/300mA (1.8V@110mA VDD_CT) TRANSLATION VDDC#15
VDDC#16 AC24 GND GND#40
GND#41 AG17
POWER
+1.8V_GPU L45 BLM15BD121SN1_4 VDDC_CT AF26 AC27 F15 AG2
VDD_CT#1 VDDC#17 GND#100 GND#42
AF27 VDD_CT#2 VDDC#18 AD18 F17 GND#101 GND#43 AG20
AG26 VDD_CT#3 VDDC#19 AD21 F19 GND#102 GND#44 AG22
C C617 C149 C156 AG27 AD23 F21 AG6 C
10u/6.3V_6 1u/6.3V_4 .1u/10V_4 VDD_CT#4 VDDC#20 GND#103 GND#45
VDDC#21 AD26 F23 GND#104 GND#46 AG9
AF17 C175 C155 C182 C146 C162 C200 C203 C180 C193 C207 F25 AH21
I/O VDDC#22 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 GND#105 GND#47
(3.3V@60mA)) VDDC#23 AF20 F27 GND#106 GND#48 AJ10
+3V_D AF23 VDDR3#1 VDDC#24 AF22 F29 GND#107 GND#49 AJ11
AF24 VDDR3#2 VDDC#25 AG16 F31 GND#108 GND#50 AJ2
AG23 VDDR3#3 VDDC#26 AG18 F33 GND#109 GND#51 AJ28
C58 C150 C134 C626 AG24 AG21 F7 AJ6
10u/6.3V_6 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 VDDR3#4 VDDC#27 GND#110 GND#52 PowerXpress control signal for Madsion and Park only
VDDC#28 AH22 F9 GND#111 GND#53 AK11
AH27 G2 AK31 If not used, can be disconnected. (AL21 pin)
VDDC#29 C181 C199 C183 C198 C224 C197 GND#112 GND#54
AF13 VDDR4#4 VDDC#30 AH28 G6 GND#113 GND#55 AK7
AF15 M26 10u/6.3V_6 10u/6.3V_6 10u/6.3V_6 10u/6.3V_6 10u/6.3V_6 10u/6.3V_6 H9 AL11 PX_EN = LOW, turn on
120 ohm/300mA VDDR4#5 VDDC#31 GND#114 GND#56
AG13 VDDR4#7 VDDC#32 N24 J2 GND#115 GND#57 AL14 PX_EN = HIGH, turn off
+1.8V_GPU L16 BLM15BD121SN1_4 VDDR4 AG15 N27 J27 AL17
VDDR4#8 VDDC#33 GND#116 GND#58
VDDC#34 R18 J6 GND#117 GND#59 AL2
VDDC#35 R21 BIF_VDDC should be connected to VDDC if BACO feature not used. J8 GND#118 GND#60 AL20
C94 C93 AD12 R23 K14 AL21
1u/6.3V_4 .1u/10V_4 VDDR4#1 VDDC#36 For BACO, refer to the databook GND#119 GND#61
AF11 VDDR4#2 VDDC#37 R26 K7 GND#120 GND#62 AL23
AF12 VDDR4#3 VDDC#38 T17 L11 GND#121 GND#63 AL26
AG11 T20 L17 AL32 R40
VDDR4#6 VDDC#39 GND#122 GND#64 B@0_4
VDDC#40 T22 L2 GND#123 GND#65 AL6
VDDC#41 T24 L22 GND#124 GND#66 AL8
T27 PIN different between Broadway and Madison L24 AM11
VDDC#42 GND#125 GND#67
VDDC#43 U16 L6 GND#126 GND#68 AM31
T23 M20 U18 Pin Broadway Madison M17 AM9
T24 NC_VDDRHA VDDC#44 GND#127 GND#69 Pin AL21 to Ground for Broadway
M21 NC_VSSRHA VDDC#45 U21 M22 GND#128 GND#70 AN11
U23 N27 VDDC BIF_VDDC M24 AN2
VDDC#47 U26 N16 GND#130 GND#72 AN30
T21 V12 V17 N18 AN6
T22 NC_VDDRHB VDDC#48 AL31 TS_A NC_TS_A GND#131 GND#73
U12 NC_VSSRHB VDDC#49 V20 N2 GND#132 GND#74 AN8
VDDC#50 V22 N21 GND#133 GND#75 AP11
VDDC#51 V24 N23 GND#134 GND#76 AP7
V27 AL21 GND PX_EN N26 AP9
VDDC#53 Y16 N6 GND#136 GND#78 AR5
120 ohm/300mA (1.8V@40mA PCIE_PVDD) PLL Y18 R15 AW34
L51 BLM15BD121SN1_4 PCIE_PVDD VDDC#54 GND#137 GND#79
+1.8V_GPU AB37 PCIE_PVDD VDDC#55 Y21 R17 GND#138 GND#80 B11
VDDC#56 Y23 R2 GND#139 GND#81 B13
MPV18 H7 Y26 R20 B15
B
C649 C644 C645 MPV18#1 VDDC#57 GND#140 GND#82 B
H8 MPV18#2 VDDC#58 Y28 R22 GND#141 GND#83 B17
10u/6.3V_6 1u/6.3V_4 .1u/10V_4 R24 B19
+VGPU_IO GND#142 GND#84
R27 GND#143 GND#85 B21
SPV18 AM10 (DDR3 1.12V@4A VDDCI) or more R6 B23
120 ohm/300mA SPV18 GND#144 GND#86
(1.8V@150mA MPV18) VDDCI#1 AA13 T11 GND#145 GND#87 B25
+1.8V_GPU L26 BLM15BD121SN1_4 SPV10 AN9 AB13 T13 B27
SPV10 VDDCI#2 GND#146 GND#88
VDDCI#3 AC12 T16 GND#147 GND#89 B29
AN10 AC15 C222 C189 C216 C228 C163 C223 C230 C208 C226 C227 T18 B31
C288 C289 C253 SPVSS VDDCI#4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 GND#148 GND#90
VDDCI#5 AD13 T21 GND#149 GND#91 B33
10u/6.3V_6 1u/6.3V_4 .1u/10V_4 AD16 T23 B7
VDDCI#6 GND#150 GND#92
VDDCI#7 M15 T26 GND#151 GND#93 B9
VDDCI#8 M16 U15 GND#153 GND#94 C1
VOLTAGE M18 U17 C39
120 ohm/300mA SENESE VDDCI#9 GND#154 GND#95
(1.8V@75mA SPV18) VDDCI#10 M23 U2 GND#155 GND#96 E35
+1.8V_GPU L15 BLM15BD121SN1_4 N13 U20 E5
VDDCI#11 GND#156 GND#97
AF28 FB_VDDC VDDCI#12 N15 U22 GND#157 GND#98 F11
N17 C158 C742 C735 U24 F13
C91 C118 VDDCI#13 10u/6.3V_6 10u/6.3V_6 10u/6.3V_6 +3V +3V GND#158 GND#99
VDDCI#14 N20 U27 GND#159
10u/6.3V_6 .1u/10V_4 T19 AG28 N22 U6
FB_VDDCI ISOLATED VDDCI#15 GND#160
R12 V11
CORE I/O VDDCI#16 R13
GND#161
VDDCI#17 GPU +3V power V16 GND#163
1
AH29 R16 R25 V18
120 ohm/300mA FB_GND VDDCI#18 GND#164
(1.0V@120mA SPV10) VDDCI#19 T12 4.7K_4 V21 GND#165
+1V L13 BLM15BD121SN1_4 T15 R26 V23
VDDCI#20 *0_6 GND#166
VDDCI#21 V15 Fine-tune Power-on sequence 2 V26 GND#167
VDDCI#22 Y13 W2 GND#168
C76 C80 W6
10u/6.3V_6 .1u/10V_4
3
AO3413 GND#169
(44) VGPU_CORE_SENSE
Madison/Broadway_M2 Q7
0.5A Y15 GND#170
(44) VSS_GPU_SENSE Y17
3
R24 *0_4 Q8 GND#171
+1.5V_GPU 2 +3V_D Y20 GND#172
VDDC_SENSE/VSS_SENSE and VDDCI_SENSE/VSS_SENSE route as differetial pair DTC144EUA Y22 A39
R23 0_4 C48 C51 C50 C49 GND#173 VSS_MECH#1
(11,44) dGPU_VRON Y24 GND#174 VSS_MECH#2 AW1
Y27 AW39
1
+3V *1u/10V_4 10u/6.3V_6 1u/10V_4 .1u/10V_4 GND#175 VSS_MECH#3

U13 GND#152
V13 GND#162
+3V
GPU all PWROK Madison/Broadway_M2
A R239 R343 A
10K_4
1
R243 *0_6
10K_4 R768
dGPU_PWROK (11)
3
2 *0_6
2 Q21 AO3413 0.5A

2N7002K Q55
3
3
Q25 C943 C944 C945

+3V_D_ZY9B
+1.8V_GPU 2
1
DTC144EUA
10u/6.3V_6 1u/10V_4 .1u/10V_4 PROJECT : ZY9B
1
1A
Madison/Broadway (PWR/GND)
5 4 3 2 1
5 4 3 2 1
+1.8V_GPU +1V
(1.8V@130mA DPA_VDD18) U41H (1.0V@110mA DPA_VDD10) 120 ohm/300mA
120 ohm/300mA DPA_VDD10 L47 BLM15BD121SN1_4
L20 BLM15BD121SN1_4 DPA_VDD18 DP C/D POWER DP A/B POWER
DPC_VDD18 AP20 AN24 DPA_VDD18 C619 C132 C620

C101 C109 C115 DPC_VDD18#1 DPA_VDD18#1 10u/6.3V_6 1u/6.3V_4 .1u/10V_4
AP21 DPC_VDD18#2 DPA_VDD18#2 AP24
10u/6.3V_6 1u/10V_6 .1u/10V_4
D D
DPC_VDD10 AP13 AP31 DPA_VDD10
DPC_VDD10#1 DPA_VDD10#1 120 ohm/300mA
AT13 DPC_VDD10#2 DPA_VDD10#2 AP32 (1.0V@110mA DPC_VDD10)
(1.8V@130mA DPC_VDD18) DPC_VDD10 L14 BLM15BD121SN1_4
120 ohm/300mA
L17 BLM15BD121SN1_4 DPC_VDD18 AN17 AN27
DPC_VSSR#1 DPA_VSSR#1 C96 C85 C83
AP16 DPC_VSSR#2 DPA_VSSR#2 AP27
AP17 AP28 10u/6.3V_6 1u/6.3V_4 .1u/10V_4
C97 C99 C110 DPC_VSSR#3 DPA_VSSR#3
AW14 DPC_VSSR#4 DPA_VSSR#4 AW24
10u/6.3V_6 1u/10V_6 .1u/10V_4 AW16 AW26
DPC_VSSR#5 DPA_VSSR#5
DPC_VDD18 AP22 AP25 DPA_VDD18

DPD_VDD18#1 DPB_VDD18#1
AP23 DPD_VDD18#2 DPB_VDD18#2 AP26
DPC_VDD10 AP14 AN33 DPA_VDD10

DPD_VDD10#1 DPB_VDD10#1
AP15 DPD_VDD10#2 DPB_VDD10#2 AP33
C AN19 DPD_VSSR#1 DPB_VSSR#1 AN29 C

AP18 DPD_VSSR#2 DPB_VSSR#2 AP29
AP19 DPD_VSSR#3 DPB_VSSR#3 AP30
AW20 DPD_VSSR#4 DPB_VSSR#4 AW30
AW22 DPD_VSSR#5 DPB_VSSR#5 AW32
R447 150/F_4 DPCD_CALR AW18 AW28 DPAB_CALR R444 150/F_4 +1.8V_GPU

DPCD_CALR DPAB_CALR 120 ohm/300mA
(1.8V@20mA DPA_PVDD)
DPA_PVDD L18 BLM15BD121SN1_4
DP E/F POWER DP PLL POWER
AH34 DPE_VDD18#1 DPA_PVDD AU28
DPE_VDD18 AJ34 AV27 C111 C108 C102
DPE_VDD18#2 DPA_PVSS 10u/6.3V_6 1u/6.3V_4 .1u/10V_4
+1.8V_GPU
AL33 AV29 DPB_PVDD (1.8V@20mA DPB_PVDD) 120 ohm/300mA
DPE_VDD10 DPE_VDD10#1 DPB_PVDD L19 BLM15BD121SN1_4
AM33 DPE_VDD10#2 DPB_PVSS AR28
+1.8V_GPU (1.8V@400mA DPE/F_VDD18)
180 ohm/1.5A
L24 HCB1608KF-181T15_6 DPE_VDD18 C112 C107 C100
AN34 AU18 10u/6.3V_6 1u/6.3V_4 .1u/10V_4
DPE_VSSR#1 DPC_PVDD
AP39 DPE_VSSR#2 DPC_PVSS AV17
B C141 C133 C131 AR39 +1.8V_GPU B
.1u/10V_4 1u/6.3V_4 10u/6.3V_6 DPE_VSSR#3 DPC_PVDD 120 ohm/300mA
AU37 DPE_VSSR#4 (1.8V@20mA DPC_PVDD)
AW35 L44 BLM15BD121SN1_4
DPE_VSSR#5
DPD_PVDD AV19
DPD_PVSS AR18
C608 C603 C602
AF34 10u/6.3V_6 1u/6.3V_4 .1u/10V_4
DPE_VDD18 DPF_VDD18#1
AG34 DPF_VDD18#2
+1V (1.0V@400mA DPE/F_VDD10) AM37 +1.8V_GPU
180 ohm/1.5A DPE_PVDD DPD_PVDD 120 ohm/300mA
DPE_PVSS AN38 (1.8V@20mA DPD_PVDD)
L22 HCB1608KF-181T15_6 DPE_VDD10 L12 BLM15BD121SN1_4
AK33 DPF_VDD10#1
DPE_VDD10 AK34
C124 C142 C127 DPF_VDD10#2 C67 C69 C68
NC_DPF_PVDD AL38
.1u/10V_4 1u/6.3V_4 10u/6.3V_6 AM35 10u/6.3V_6 1u/6.3V_4 .1u/10V_4
NC_DPF_PVSS
AF39 DPF_VSSR#1
AH39 +1.8V_GPU
DPF_VSSR#2 120 ohm/300mA
AK39 DPF_VSSR#3 (1.8V@40mA DPE/F_PVDD)
AL34 DPE_PVDD L48 BLM15BD121SN1_4
DPF_VSSR#4
AM34 DPF_VSSR#5
C625 C622 C623
10u/6.3V_6 1u/6.3V_4 .1u/10V_4
A R458 150/F_4 DPEF_CALR AM39 A
DPEF_CALR
Madison/Broadway_M2
PROJECT : ZY9B
1A
Madison/Broadway (DP_PWR/GND)
5 4 3 2 1
5 4 3 2 1
PIN STRAPS CONFIGURATION STRAPS

ALLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESE GPIOS ARE USED,
Memory Aperture size THEY MUST NOT CONFLICT DURING RESET
+3V_D
STRAPS PIN DESCRIPTION OF DEFAULT SETTINGS DEFAULT REMARK

(18) GPU_GPIO0
R69 *10K/F_4 GPIO[13:11] Size
R74 *10K/F_4 TX_PWRS_ENB GPIO0 0 = 50% TX OUTPUT SWING 0
(18) GPU_GPIO1
1 = FULL TX OUTPUT SWING
D 000 128MB D
TX_DEEMPH_EN GPIO1 PCIE TRANSMITTER DE-EMPHASIS ENABLED 0
001 256MB 0 = TX DE-EMPHASIS DISABLED
R81 *10K/F_4 1 = TX DE-EMPHASIS ENABLED
(18) GPIO3_SMBDAT
ENABLE EXTERNAL BIOS ROM
R80 *10K/F_4 010 64MB BIOS_ROM_EN GPIO_22_ROMCSB 0 = DISABLE 0
(18) GPIO4_SMBCLK
1 = ENABLE
SCS#_GPIO22 R27 *10K/F_4 011 32MB ROMIDCFG(2:0) GPIO[13:11] SERIAL ROM TYPE OR MEMORY APERTURE SIZE SELECT
000 See Memory Aperture size
R49 *10K/F_4
(18) GPU_GPIO13
BIF_GEN2_EN_A GPIO2 0 = PCIE DEVICE AS 2.5GT/S CAPABLE 0
R431 *10K/F_4 1 = PCIE DEVICE AS 5GT/S CAPABLE
(18) GPU_GPIO12
(18) GPU_GPIO11
R48 *10K/F_4 Audio Table GPIO_8_ROMSO GPIO8
H2SYNC H2SYNC Reserved Only 0
EXT_HSYNC EXT_VSYNC GPIO_21_BB_EN GPIO21
(18) GPU_GPIO2
R37 *10K/F_4 Discription
AUD[1:0]
AUD[1] HSYNC 00: NO AUDIO FUNCTION.
R466 10K/F_4 0 0 No Audio 01: AUDIO FOR DISPLAYPORT AND HDMI IF
(18,25) EXT_HSYNC
AUD[0] VSYNC ADAPTER IS DETECTED. 11 See Audio table
R467 10K/F_4
(18,25) EXT_VSYNC
0 1 Any one by dectec 10: AUDIO FOR DISPLAYPORT ONLY.
11: AUDIO FOR BOTH DISPLAYPORT AND HDMI.

SIN_GPIO9 R30 *10K/F_4
1 0 DP only
R432 *10K/F_4 GPIO_9_ROMSI GPIO9 0 = VGA controller capacity enable 0
(18) V2SYNC
C
1 1 Both DP & HDMI C
VIP_DEVICE_STRAP_ENA V2SYNC 0 = DRIVER would ignore the value sample on VHAD_0 during RESET. 0
DDR3 VRAM SIZE Strap

EEPROM
U4
SIN_GPIO9 5 2 SOUT_GPIO8
(18) SIN_GPIO9 D Q SOUT_GPIO8 (18)
(18) SCLK_GPIO10 6 C
DDR3 VRAM size
SCS#_GPIO22 1
(18) SCS#_GPIO22 S
RAM_STRAP2 RAM_STRAP1 RAM_STRAP0
+3V_D_ZY9B 7 HOLD Vendor Vendor P/N STN B/S P/N Size
DVPDATA_2 DVPDATA_1 DVPDATA_0
R28 *10K_4 3 W
8 4
R29 VCC VSS 512MB 1 1 0
*10K_4 C53 *M25P10-AVMN6P
*.1u/10V_4
Hynix H5TQ1G63BFR-12C AKD5LZGTW04
(64M*16) 1GB 1 0 0
B B
2GB
Thermal Sensor
512MB 0 1 0
+3V_D_ZY9B
K4W1G1646E-HC12 AKD5LGGT506
Samsung (64M*16) 1GB 0 0 0
R42 Vendor P/N
2
10K_4 WINDBOND AL83L771K01 K4W2G1646B-HC12 AKD5MGGT500 2GB 0 0 1

(35,37) MXM_SMCLK12 3 1 GMT AL000780000 USD0.16
+3V_D_ZY9B
Q10
2N7002K
+3V_D_ZY9B
+3V_D_ZY9B
R65 R58
10K_4 10K_4
R56 ADDRESS: 98H C121 .1u/10V_4 Samsung-1GB +1.8V_GPU
2
10K_4
U9
(35,37) MXM_SMDATA12 3 1 R441 *10K/F_4
(18) RAM_STRAP2
GPU_SMCLK
A Q11
8 SCLK VCC 1 GPU_D+ (18) R449 10K/F_4 RAM_STRAP2 SET DDR3 Vendor A
2N7002K GPU_SMDATA C128
7 SDA DXP 2
RAM_STRAP[1:0] SET SIZE.
6 3 2200p/50V_4
(18) ALT#_GPIO17 ALERT# DXN R442 *10K/F_4
GPU_D- (18) (18) RAM_STRAP1
(37) VGA_THERM# 4 OVERT# GND 5
R450 10K/F_4
G780P81U
ADDRESS: 98H R440 *10K/F_4
PROJECT : ZY9B
R448 10K/F_4 Size Document Number Rev
(18) RAM_STRAP0
1A
Strip/Thermal
5 4 3 2 1
1 2 3 4 5 6 7 8
CRT +5V
1A/30V C585 .22u_4

D25
C624
U40 CRTVDD5 CN18
16
+5V 2 1
.22u_4 16 8
VCC GND CRT
RSX101M-30
6
2 VGA_RED_SYS L10 BLM18BA470SN1_6 CRT_R1 1 11 CRT_11 T1
(18) EXT_CRT_RED IA0
5 4 VGA_RED_SYS 7
(18) EXT_CRT_GRN IB0 YA
11 VGA_GRN_SYS L7 BLM18BA470SN1_6 CRT_G1 2 12 DDCDAT_1
(18) EXT_CRT_BLU IC0
14 7 VGA_GRN_SYS 8
ID0 YB VGA_BLU_SYS L4 BLM18BA470SN1_6 CRT_B1 CRTHSYNC
3 13
3 9 VGA_BLU_SYS 9
(8) INT_CRT_RED IA1 YC
6 4 14 CRTVSYNC
(8) INT_CRT_GRN IB1
10 12 R22 R20 R14 C45 C41 C28 C31 C37 C42 10
A (8) INT_CRT_BLU IC1 YD A
13 5 15 DDCCLK_1
ID1 150/F_4 150/F_4 150/F_4 10p/50V_4 10p/50V_4 10p/50V_4 10p/50V_4 10p/50V_4 10p/50V_4
dGPU_SELECT# 1 15
17
S OE +5V
SN74CBT3257CPWR
S Yn +5V
C597 +3V D2 MTW355 CRT_SENSE# (37)
U37
0 EV
1
.22u_4 16 8
VCC GND +3V
C610 D3
U38 C592 R18 0_4 CRTVSYNC *VPORT_6
1 IV .22u_4 16 8 2 R21 0_4 CRTHSYNC
VCC GND (18) EV_CRTDDAT IA0 CRTDDAT R429 R428 .1u_4 U36
2
(18) EV_CRTDCLK 5 IB0 YA 4
11 CRTVDD5 1 16 CRT_VSYNC1 +3V
(18) EV_LVDS_DDCDAT IC0 VCC_SYNC SYNC_OUT2
2 14 7 CRTDCLK 2.2K_4 2.2K_4 14 CRT_HSYNC1
IA0 (18) EV_LVDS_DDCCLK ID0 YB SYNC_OUT1
5 IB0 YA 4 7 VCC_DDC
11 3 9 LCD_EDIDDATA C587 .22u/25V_6 CRT_BYP 8
(18,24) EXT_VSYNC IC0 (8) INT_CRT_DDCDAT IA1 YC BYP
14 7 6 15 VSYNC C590 *.1u_4 CRTVDD5
(18,24) EXT_HSYNC ID0 YB (8) INT_CRT_DDCCLK IB1 SYNC_IN2
10 12 LCD_EDIDCLK 2 13 HSYNC R416 R417 CRTVDD5
(8) INT_LVDS_EDIDDATA IC1 YD +3V VCC_VIDEO SYNC_IN1
3 9 VSYNC 13 2.7K_4 2.7K_4 C29 *10p/50V_4 CRTVSYNC
IA1 YC (8) INT_LVDS_EDIDCLK ID1
6 C588
IB1
(8) INT_VSYNC 10 IC1 YD 12 HSYNC CRT_R1 3 VIDEO_1 DDC_IN1 10 CRTDCLK R415 R418 C40 *10p/50V_4 CRTHSYNC
13 1 15 .1u_4 CRT_G1 4 11 CRTDDAT 2.7K_4 2.7K_4
(8) INT_HSYNC ID1 (10,26) dGPU_EDIDSEL# S OE VIDEO_2 DDC_IN2
CRT_B1 5 C586 10p/50V_4 DDCCLK_1
SN74CBT3257CPWR VIDEO_3 DDCCLK_1
DDC_OUT1 9
dGPU_SELECT# 1 15 6 12 DDCDAT_1 C591 10p/50V_4 DDCDAT_1
S OE GND DDC_OUT2
SN74CBT3257CPWR CM2009-02QR
+3V
LVDS S Yn
B LCD Power B
C113
0 EV
.22u_4
U8 1 IV
+3V
R64 0_4 5 6
(37) CONTRAST VCC S PWM_SELECT# (10)
R63 *0_4 3 4 LVDS_BRIGHT U1

(18) EV_LVDS_BRIGHT B0 YA C13
1u_4 6 1 LCDVCC
IN OUT
(8) INT_LVDS_BRIGHT 1 B1 GND 2
4 IN GND 2
C9 C5 C2 C10
74LVC1G3157GW LVDS_VDDEN 3 5
ON/OFF GND 1u_4 *.1u_4 .01u/25V_4 22u_8
+3V VIN
AAT4280-4
R7
+3V C4 C1 C6 C7 100K_4
U7
.1u/50V_6 1000p/50V_4 4.7u/25V_8 1000p/50V_4
(18) EV_TXLCLKOUT- 2 0B1 VDD 4
(18) EV_TXLCLKOUT+ 1 1B1 VDD 10
19 C62 C61 C63 C64 C65
VDD C59
(18) EV_TXLOUT0- 78 2B1 VDD 22
77 28 1000p/50V_4 1000p/50V_4 .22u_4 .1u_4 .1u_4 2.2u_6
(18) EV_TXLOUT0+ 3B1 VDD
VDD 37
(18) EV_TXLOUT1- 73 4B1 VDD 47
(18) EV_TXLOUT1+ 72 5B1 VDD 69
+3V VIN
(18) EV_TXLOUT2- 68 6B1 0.8A
67 CN2
(18) EV_TXLOUT2+ 7B1
5 TXLCLKOUT- R2 0_8SHORT
G_5
C A0 TXLCLKOUT+ R1 0_8SHORT INVCC0 C
64 8B1 A1 6 40
63 9B1
A2 8 TXLOUT0-
TXLOUT0+
LCDVCC 39
38
Backlight Control
(18) EV_TXUCLKOUT- 60 10B1 A3 9 37
(18) EV_TXUCLKOUT+ 59 11B1 36
11 TXLOUT1-
A4 TXLOUT1+ 35 +3V
(18) EV_TXUOUT0- 56 12B1 A5 12 34
55 LCD_EDIDDATA
(18) EV_TXUOUT0+ 13B1 33
14 TXLOUT2- LCD_EDIDCLK
A6 TXLOUT2+ LVDS_BRIGHT 32
(18) EV_TXUOUT1- 51 14B1 A7 15 31 G_4
50 BL_ON BL_ON
(18) EV_TXUOUT1+ 15B1 30
17 (29) DMIC_DAT R6
A8 29
(18) EV_TXUOUT2- 46 16B1 A9 18 (29) DMIC_CLK 28
45 10K_4
(18) EV_TXUOUT2+ 17B1 27
TXLCLKOUT+ D1 2 1 BAS316 LID591# (36,37)
dGPU_SELECT# TXLCLKOUT- 26 R8
(18) EV_LVDS_BLON 42 18B1 SEL1 16 dGPU_SELECT# (10,26) 25
(18) EV_LVDS_VDDEN 41 19B1 OE1# 7 24
TXLOUT0+ 10K_4
23
3
TXLOUT0-
22
21
3
80 dGPU_SELECT# Output TXLOUT1+
(8) INT_TXLCLKOUT- 0B2 20
79 23 TXUCLKOUT- TXLOUT1- BL# 2
(8) INT_TXLCLKOUT+ 1B2 A10 19
24 TXUCLKOUT+ 2
A11 18 EC_FPBACK# (37)
3
76 L EV_LVDS TXLOUT2+ Q2
(8) INT_TXLOUT0- 2B2 17
75 26 TXUOUT0- TXLOUT2- 2N7002K Q1
(8) INT_TXLOUT0+ 3B2 A12 16
27 TXUOUT0+ DTC144EUA
1
A13 TXUCLKOUT+ 15 LVDS_BLON
(8) INT_TXLOUT1- 71 4B2 H INT_LVDS 14 2
70 29 TXUOUT1- TXUCLKOUT-
(8) INT_TXLOUT1+ 5B2 A14 13
30 TXUOUT1+ Q3
A15 TXUOUT0+ 12 2N7002K
(8) INT_TXLOUT2- 66 6B2 11
65 32 TXUOUT2- TXUOUT0- R9
(8) INT_TXLOUT2+
1
7B2 A16 TXUOUT2+ 10 G_1
A17 33 9
62 TXUOUT1+ 100K_4
8B2 LVDS_BLON TXUOUT1- 8
61 9B2 A18 35 7
36 LVDS_VDDEN
A19 TXUOUT2+ 6
(8) INT_TXUCLKOUT- 58 10B2 5
57 TXUOUT2-
(8) INT_TXUCLKOUT+ 11B2 4
D 34 dGPU_SELECT# D
SEL2 3
(8) INT_TXUOUT0- 54 12B2 OE2# 25 (10) USBP8+ 2
(8) INT_TXUOUT0+ 53 13B2 (10) USBP8- 1
G_0
(8) INT_TXUOUT1- 49 14B2 GND 3

(8) INT_TXUOUT1+ 48 13 GS12401-1011-40P-R-NH
15B2 GND
GND 20
(8) INT_TXUOUT2- 44 16B2 GND 21
(8) INT_TXUOUT2+ 43 17B2 GND 31
GND 38
40 52
(8) INT_LVDS_BLON
(8) INT_LVDS_DIGON 39
18B2
19B2
GND
GND 74 Quanta Computer Inc.
PI3LVD1012 PROJECT : ZY9B
1A
CRT/LVDS/LID
1 2 3 4 5 6 7 8
5 4 3 2 1
HDMI Hot-PLUG to EC and GPU HDMI R61 4.7K_4

+3V
R62 4.7K_4
(18) EV_HDMI_DDCCK
(18) EV_HDMI_DDCDAT
+3V
+3V +3V
C632 .1u_4 EXT_HDMI_TX2N
(18) EXT_HDMITX2N
Input EQ setting C648 .1u_4 EXT_HDMI_TX2P DDCBUF
(18) EXT_HDMITX2P
R455
10K_4 R740 R741 (18) EXT_HDMI_HPD EXT_HDMI_HPD HDMI_MB_HP
INn_PEQ Output *4.7K_4 *4.7K_4
C652 .1u_4 EXT_HDMI_TX1N R742 1.5K_4 +5V
(18) EXT_HDMITX1N
C657 .1u_4 EXT_HDMI_TX1P
(37) HDMI_HPD_EC# (18) EXT_HDMITX1P
IN1_PEQ IN2_PEQ HDMI_DDCCLK
L Middle EQ
3
HDMI_DDCDATA
H High EQ R743 R744 R745 1.5K_4 +5V

D EXT_HDMI_HPD *4.7K_4 *4.7K_4 U14 D
49
48
47
46
45
44
43
42
41
40
39
38
37
2
M Low EQ
EPAD
IN1_D2p
IN1_D2n
IN1_HPD
IN1_D1p
IN1_D1n
GND
IN1_SDA
IN1_SCL
DDCBUF
OUT_HPD
OUT_SCL
OUT_SDA
Q41
2N7002K R453 internal pull down
1
*100K_4 +3V C666 .1u_4 EXT_HDMI_TX0N HDMI_TX2N

DDC Buffer setting (18) EXT_HDMITX0N 1 IN1_D3n OUT_D1n 36
C668 .1u_4 EXT_HDMI_TX0P 2 35 HDMI_TX2P
(18) EXT_HDMITX0P IN1_D3p OUT_D1p
+3V From EXT VGA IN1_PEQ 3 34 PRE_EMI
C627 .1u_4 EXT_HDMI_CLK- IN1_PEQ PRE_EMI HDMI_TX1N
DDC_BUF Output R746
(18) EXT_HDMICLK-
C631 .1u_4 EXT_HDMI_CLK+
4
5
IN1_D4n OUT_D2n 33
32 HDMI_TX1P
(18) EXT_HDMICLK+ IN1_D4p OUT_D2p
*4.7K_4 6 31
R454 L Passive DDC internal pull down AC coupling input R747 *4.7K_4 RTERM
+3V
7
VDD
RTERM
PS8271 VDD
OUT_D3n 30 HDMI_TX0N
+3V
10K_4 DDCBUF 8 29 HDMI_TX0P
(8) INT_HDMITX2N IN2_D1n OUT_D3p
9 28 CFG_HPD
(8) INT_HDMITX2P IN2_D1p CFG_HPD
INT_HDMI_HPD HDMI_CLK-
H Active Set-1 R748
(8) INT_HDMI_HPD 10 IN2_HPD OUT_D4n 27
HDMI_CLK+
*4.7K_4
From INT (8) INT_HDMITX1N 11 IN2_D2n OUT_D4p 26
R749 *4.7K_4
(8) INT_HDMITX1P 12 IN2_D2p PWDN_ASQ 25 +3V
3
M Active Set-2
SW_MAIN
SW_DDC
IN2_PEQ
IN2_SDA
IN2_SCL
IN2_D3n
IN2_D3p
IN2_D4n
IN2_D4p
Normal operation
CEXT
REXT
internal pull down
GND
2 INT_HDMI_HPD
+3V
Pre-emphasis and EMI setting PWDN_ASQ setting
13
14
15
16
17
18
19
20
21
22
23
24
Q42 R464
2N7002K
1
*100K_4 R750 Pin 25 Output

PRE_EMI Output *4.7K_4
(8) INT_HDMITX0N
(8) INT_HDMITX0P
IN2_PEQ C204 R95 Normal operation
PRE_EMI 2.2u_6 499/F_4
L
L No_PRE&EMI (defult)
(8) INT_HDMICLK-
(8) INT_HDMICLK+
H PRE enable R751
*4.7K_4 +3V R457 4.7K_4 H Shut down
R456 4.7K_4
M EMI control internal pull down
SW Yn Output (8) SDVO_CTRLCLK
(8) SDVO_CTRLDAT
C
DP Hot-PLUG to EC and GPU 0 dGPU Port-1 (10,25) dGPU_SELECT# C
+3V (10,25) dGPU_EDIDSEL#
Hot-plug detect 1 UMA Port-2

+3V R752
CFG_HPD Output 4.7K_4
R420
10K_4 +3V
L Follow SW_MAIN CFG_HPD HDMI connector
R753
EMI reserve for HDMI CN24
H Follow SW_DDC 4.7K_4 20
(18) EXT_DP_HPD SHELL1
R421 HDMI_TX2P HDMI_TX2P 1 D2+
3
10K_4 M SW or DDC 2
R83 HDMI_TX2N D2 Shield
3 D2-
*100/F_4 HDMI_TX1P 4
HDMI_TX2N D1+
2 DP_HPD_EC# (37) 5 D1 Shield
HDMI_TX1N 6 D1-
3
HDMI_TX1P HDMI_TX0P 7
Q31 D0+
8 D0 Shield
2N7002K R77 HDMI_TX0N 9 23
1
DP_HPD *100/F_4 HDMI_CLK+ D0- GND

2 10 CK+
HDMI_TX1N +5V 11 22
HDMI_CLK- CK Shield GND
12 CK-
Q32 HDMI_TX0P 13
2N7002K CE Remote
14
1
R71 R460 HDMI_DDCCLK NC

15 DDC CLK
*100/F_4 *10K_4 HDMI_DDCDATA 16
HDMI_TX0N DDC DATA
17 GND
+5V D27 2 1RSX101M-30+5V_HDMI 18 +5V
HDMI_CLK+ HDMI_MB_HPR459 0_4 19 HP DET
SHELL2 21
R66
*100/F_4 C917 R461 C621 HDMI
HDMI_CLK-
.1u_4 *100K_4 .22u_4
B B
Close CN24
add it at B-test
DisplayPort ESD Protect DP connector DFHS20FR029

+3V
+3V
1A/30V
2
CN20
close to DP connector SHIELD1 21 D26
R423 SHIELD3 23 RSX101M-30
C594 .1u_4 +5V +5V 30mil
100K_4 U5
1
C66 .1u_4 EXT_DPTX2N 1 10 EXT_DPTX2N PWR 20 +3V_DP
(18) EXT_DP_TX2N 1 10 20
(18) EXT_DP_AUXDN 3 1 1 3 DP_AUXN C60 .1u_4 EXT_DPTX2P 2 9 EXT_DPTX2P PWR_RET 19

(18) EXT_DP_TX2P 2 9 19
R419 3 DP_HPD 18 HPD 500mA (Max.)
C57 .1u_4 EXT_DPTX3P GND_3/8 EXT_DPTX3P
18
(18) EXT_DP_TX3P 4 4 7 7 17
Q34 Q33 10K_4 C52 .1u_4 EXT_DPTX3N 5 6 EXT_DPTX3N DP_AUXN 17 AUXN GND 16 C593
(18) EXT_DP_TX3N
2
2N7002K 2N7002K 5 6 DP_AUXP AUXP

16
15 15
R425 *RClamp0524P GND 14 .22u_4
14
13
MODE 13 DP_CAD
Q37 10K_4 EXT_DPTX3N 12 LANE_3N
12
3
2N7002K 2N7002K U6 EXT_DPTX3P 10 LANE_3P

11
GND 11
2
Q35 Q36 2N7002K C81 .1u_4 EXT_DPTX0N 1 10 EXT_DPTX0N

(18) EXT_DP_TX0N 1 10 10
C79 .1u_4 EXT_DPTX0P 2 9 EXT_DPTX0P EXT_DPTX2N 9 LANE_2N
(18) EXT_DP_TX0P 2 9 9
(18) EXT_DP_AUXDP 3 1 1 3 DP_AUXP 2 3 EXT_DPTX2P 7 LANE_2P GND 8

Q38 C73 .1u_4 EXT_DPTX1P GND_3/8 EXT_DPTX1P
8
(18) EXT_DP_TX1P 4 4 7 7 7
3
C72 .1u_4 EXT_DPTX1N 5 6 EXT_DPTX1N EXT_DPTX1N 6 LANE_1N

(18) EXT_DP_TX1N 5 6 6
C595 .1u_4 R424 2N7002K EXT_DPTX1P 4 LANE_1P
5 GND 5
C596 *RClamp0524P
1
4
100K_4 .1u_4 2 DP_CAD EXT_DPTX0N 3 LANE_0N
3
U3 EXT_DPTX0P 1 LANE_0P
2
GND 2
DP_AUXP 1 10 DP_AUXP
DP_AUXN 1 10 DP_AUXN
1
2 2 9 9
A R426 A
DP_CAD Behavior 3
1
DP_CAD GND_3/8 DP_CAD SHIELD2

4 4 7 7 22
1M_4 Low DP signal (AC couple) DP_HPD 5 6 DP_HPD SHIELD4 24
5 6
High TMDS signal (DC couple) *RClamp0524P DP_CONN
R422
100K_4

PROJECT : ZY9B
1A
HDMI/DP
5 4 3 2 1
A B C D E
XD_CLE R377 10K_4

Cardreader/1394 +3V JMB 380 pin Note:
XD_WP# R378 10K_4 +3V_CARD SD/MMC MS XD
SD_WP#(XDR/B#) R655 1K_4
please 1000PF is nearest to pin5, SD/XD/MS_CMD R654 10K_4 MDID0 SD_DAT0 XD_D0
MS_D0
one of 0.1uF and then 10UF MDID1 SD_DAT1 MS_D1
XD_D1
+1.8V_RUN_CARD +3V +3V XD_RE# R292 200K_4 MDID2 SD_DAT2 MS_D2
XD_D2
+1.8V_RUN_CARD C566 *10u/6.3V_6 MDID3 SD_DAT3 MS_D3
XD_D3
C554 .1u_4 XD_ALE R295 200K_4 MDID4 SD_CMD MS_BS
XD_WE#
C549 .1u_4 C537 .01u/16V_4 MDID5 SD_CLK MS_SCLK
XD_CE#
C559 .1u_4 C542 .01u/16V_4 MDID6 SD_WP XD_WP#
C541 .1u_4 C550 .01u/16V_4 MDID7 XD_CLE
20mil
20mil
C564 1000P/50V_4 C563 .01u/16V_4 D22 *BAS316 Reserve for D3E function, MDID8 SD_DAT4 XD_D4
1 PCH GPIO wake up 2ms Low 1
C534 10u/6.3V_8 (9,11) CR_WAKE# 1 2 SD_CD# MDID9 SD_DAT5 XD_D5
MDID10 SD_DAT6 XD_D6
MDID11 SD_DAT7 XD_D7
37
18
10
44
30
20
19
5
U27 MDID12 XD_RE#
BAS316 MDID13 XD_R/B#
DV18
DV18
APV18
DV33
TAV33
DV33
DV33
APVDD
D24 MS_INS# MDID14 XD_ALE
(10) CLK_PCH_SRC2# 3 34 TPA0P CR1_LEDN SD1_LED# MS1_LED# XD_LED#
APCLKN TPA1P TPA0N XD_CDSW# D23 SD_CD# CR1_PCTLN SD1_PCTL#MS1_PCTL#XD1_PCTL#
(10) CLK_PCH_SRC2 4 APCLKP TPA1N 33
(10) PCIE_TX8+ 8 32 TPB0P CR1_CD0 SD1_CD# XD_CV#
APRXP TPB1P TPB0N BAS316 CR1_CD1 MS1_CD# XD_CD#
(10) PCIE_TX8- 9 APRXN TPB1N 31
(10) PCIE_RX8- C548 .1u_4 PCIE_RX8-_C 11 35 TPBIAS0 C509
C547 .1u_4 PCIE_RX8+_C APTXN TPBIAS_1 270p/50V_4
(10) PCIE_RX8+ 12 APTXP
(4,10,11,28,32,33,37) PLTRST# 1 XRSTN
R303 4.7K_4
+3V R304 4.7K_4 JMB380-QGAZ0B 48 MDIO0
CR1_CD1N MDIO0 MDIO1
15 CR1_CD1N MDIO1 47
CR1_CD0N 16 46 MDIO2
CR1_CD0N MDIO2 MDIO3
45
30mils
MDIO3
MDIO4 43 MDIO4
MDIO5 R362 22_4 XD_CE#
5 IN 1 CARD READER
+3V_CARD 17 CR1_PCTLN MDIO5 42
41 MDIO6 As close as possible to
CR_CPPE# MDIO6 MDIO7
13 D3E_WAKEN MDIO7 40 CN35 Pin21 As close as possible to
TP36 14 29 MDIO8 CN35 Pin38
NC MDIO8 MDIO9 +3V_CARD
21 CR_LEDN MDIO9 28
7mil 1394_XI 38 27 MDIO10
TXIN MDIO10 MDIO11 +3V_CARD
MDIO11 26
R354 1M_4 1394_XO 39 25 MDIO12 C871
7mil TXOUT MDIO12 MDIO13
Close to JMB380 MDIO13 23
APREXT
MDIO14 .22u_4 C535
APGND
(<500mil) 22
TREXT
XTEST
MDIO14 +3V_CARD +3V_CARD
EPAD
TCPS
2 2
2 1 *10u/6.3V_6
CN36
C561 Y4 C562 21
49
2
6
24
36
22p_4 24.576MHz SD/XD/MS_DATA0 SD-VCC
12mil
27p/50V_4 31 SD-DAT0
SD/XD/MS_DATA1
12mil
34 SD-DAT1
SD/XD/MS_DATA2 9 38
SD/XD/MS_DATA3 SD-DAT2 XD-VCC
11 SD-DAT3
XD_CE# 25 2 XD_CDSW#
R320 R300 R351 SD/XD/MS_CMD SD-CLK XD-CD SD_WP#(XDR/B#)
15 SD-CMD XD-R/B 3
SD_CD# 39 4 XD_RE#
8.2K_4 10K_4 12K/F_4 XD_WP# SD-C/D XD-RE XD_CE#
41 SD-WP XD-CE 5
6 XD_CLE
XD-CLE XD_ALE
19 SD-VSS1 XD-ALE 7
29 8 SD/XD/MS_CMD
SD-VSS2 XD-WE XD_WP#
40 SD-GND XD-WP 13
12 23 SD/XD/MS_DATA0
SD/XD/MS_DATA0 MS-VCC XD-D0 SD/XD/MS_DATA1
22 MS-DATA0 XD-D1 27
SD/XD/MS_DATA1 24 30 SD/XD/MS_DATA2
SD/XD/MS_DATA2 MS-DATA1 XD-D2 SD/XD/MS_DATA3
20 MS-DATA2 XD-D3 32
SD/XD/MS_DATA3 16 33 XD/MMS_DATA4
XD_CE# MS-DATA3 XD-D4 XD/MMS_DATA5
14 MS-SCLK XD-D5 35
MS_INS# 18 36 XD/MMS_DATA6
SD/XD/MS_CMD MS-INS XD-D6 XD/MMS_DATA7
26 MS-BS XD-D7 37
10 MS-VSS1 XD-GND1 1
28 MS-VSS2 XD-GND2 17
42 GND1 GND2 43
3
As close as possible to 3
CN35 Pin12
CARD_READER-CM4R-115
IEEE-1394 +3V_CARD
TPBIAS0 10mil C558 .33u/16V_6

1394 Connector R302 C872
modify footprint at B-test
*100K_4 .1u_4
R335 R334
remove co-layout cholk at C-test
CN29
56.2/F_4 56.2/F_4 5
TPB0N 1
TPA0N 3
TPA0P 4
TPA0P TPB0P 2 6
TPA0N
EMI reserve
As close as possible to 1394 Conn
JMB380 MDIO0 R651 0_4 SD/XD/MS_DATA0
MDIO1 R648 0_4 SD/XD/MS_DATA1
TPB0N MDIO2 R652 0_4 SD/XD/MS_DATA2
TPB0P MDIO3 R650 0_4 SD/XD/MS_DATA3
MDIO4 R653 0_4 SD/XD/MS_CMD
MDIO6 R361 0_4 XD_WP#
MDIO7 R360 0_4 XD_CLE
R309 R315 MDIO8 R649 0_4 XD/MMS_DATA4
4 MDIO9 R647 0_4 XD/MMS_DATA5 4
56.2/F_4 56.2/F_4 D15 2 1 *1394@EGA TPB0N MDIO10 R646 0_4 XD/MMS_DATA6
MDIO11 R645 0_4 XD/MMS_DATA7
1394_COM 10mil D19 2 1 *1394@EGA TPA0N MDIO12 R299 0_4 XD_RE#
MDIO13 R656 0_4 SD_WP#(XDR/B#)
C551 D18 2 1 *1394@EGA TPA0P MDIO14 R301 0_4 XD_ALE
R308 CR1_CD1N R294 0_4 MS_INS#
4.99K/F_4
220p/50V_4 D17 2 1 *1394@EGA TPB0P CR1_CD0N R293 0_4 SD_CD# Quanta Computer Inc.
PROJECT : ZY9B
1A
JMB380 Card Reader & 1394
A B C D E
5 4 3 2 1
TRANSFORMER
Giga-LAN BCM57780
U34
1 TCT1 MCT1 24
TX0P 2 23 X-TX0P
+3V_S5 TX0N TD1+ MX1+ X-TX0N
3 TD1- MX1- 22
U2 C580 C577
.1u/16V_4 .1u/16V_4
15mil TX1P
4
5
TCT2 MCT2 21
20 X-TX1P
BIASVDD L3 BLM18AG601SN1_6 TX1N TD2+ MX2+ X-TX1N
+3V_S5 42 VDDO BIASVDDH 25 6 TD2- MX2- 19
C19 .1u_4
VAUX_12 6 VDDC 7 TCT3 MCT3 18
15 14 XTALVDD L5 BLM18AG601SN1_6 TX2P 8 17 X-TX2P
VDDC XTALVDDH C27 .1u_4 TX2N TD3+ MX3+ X-TX2N
D 41 VDDC 9 TD3- MX3- 16 D
L1 C578 C579
15mil AVDDL 27 30 AVDDH L2 BLM18AG601SN1_6 .1u/16V_4 .1u/16V_4 10 15
VAUX_12 AVDDL AVDDH TCT4 MCT4
C15 4.7u_6 33 TX3P 11 14 X-TX3P
BLM18AG601SN1_6 C18 .1u_4 39
AVDDL
AVDDL
BCM57780
7mm X 7mm AVDDH 36 C17 .1u_4 TX3N 12
TD4+
TD4-
MX4+
MX4- 13 X-TX3N
48-Pin QFN C16 .1u_4

L41 TRANSFORMER
15mil GPHY_PLLVDD 24 37 TX3N
C582 4.7u_6 GPHY_PLLVDDL TRD3_N TX3P R411 R410 R409 R408
TRD3_P 38
BLM18AG601SN1_6 C20 .1u_4 75/F_8 75/F_8 75/F_8 75/F_8
35 TX2N Delta LFE9276D-R (DB0ZY8LAN00)
L42 TRD2_N TX2P
15mil PCIE_PLLVDD 18
TRD2_P 34
PCIE_PLLVDDL TX1N
TRD1_N 31
BLM18AG601SN1_6 C584 4.7u_6 32 TX1P
C21 .1u_4 TRD1_P
21 PCIE_PLLVDDL
29 TX0N C575
TRD0_N TX0P
TRD0_P 28 1500p/3KV_1808
48 LAN_LINKLED#
LINKLED#
SPD100LED# 47 RJ45
SPD1000LED# 46 CN17
45 LAN_ACTLED# +3V_S5
C24 .1u_4 PCIE_RXP6_C TRAFFICLED# LAN_LINKLED#
(10) PCIE_RX6+ 17 PCIE_TXDP 11 GREEN_N
C25 .1u_4 PCIE_RXN6_C 16 R412 220_8 LAN_LNK_LED_PWR 12
(10) PCIE_RX6- PCIE_TXDN GREEN_P
(10) PCIE_TX6+ 22 PCIE_RXDP MODE 5
(10) PCIE_TX6- 23 PCIE_RXDN
4 X-TX0P 1
C (8,32) PCIE_WAKE# WAKE# 0+ C
2 X-TX0N 2
(4,10,11,27,32,33,37) PLTRST# PERST# X-TX1P 0-
(10) CLK_PCIE_LOM 20 PCIE_REFCLK_P 3 1+
19 X-TX2P 4 14
(10) CLK_PCIE_LOM# PCIE_REFCLK_N X-TX2N 2+ GND2
5 2-
44 BCM_EEC X-TX1N 6 13
EECLK X-TX3P 1- GND1
7 3+
43 BCM_EED X-TX3N 8
R11 1K/F_4 VMA_PRES EEDATA VAUX_12 3-
+3V 40 VMAIN_PRSNT
R16 4.7K_4 LOW_PWR 1 L43 need modify footprint at B test +3V_S5
LOW_PWR LAN_ACTLED# 9 YELLOW_N
11 L43 4.7uh R407 220_8 LAN_ACT_LED_PWR 10
SR_LX YELLOW_P
SR_VFB 8
LAN_ACTLED# RJ45
C36 33p_4 R15 200_4 XTALO 13
XTALI XTALO LAN_LINKLED#
12 XTALI SR_VDDP 10 +3V_S5
1
SR_VDD 9
1.2H Y1 R10 1.24K/F_4 RDAC 26 C23 C33 C32 C14
25MHz RDAC
4.7u_6 .1u_4 .1u_4 10u_6 C574 C576
2
C35 33p_4
R17 *4.7K_4 3 7 *.1u/X7R/50V_8 *.1u/X7R/50V_8
+3V_S5 CLK_REQ# NC
R19 0_4 BCM_CLKREQ#

(10) CLK_PCIE_LAN_REQ#
GND
BCM57780
49
B B
EEPROM
LAN POWER +3V_S5
+3V_S5 VAUX_12 20mil

R414 R13
*1K_4 1K_4
C589 4.7u_8 C581 4.7u_8 U35
BCM_EED 5 1
C34 .1u/16V_4 C30 .1u/16V_4 BCM_EEC SDA A0
6 SCL A1 2
A2 3
C26 .1u/16V_4 7
R12 R413 WP
C22 .1u/16V_4 1K_4 4 8 +3V_S5
*1K_4 GND VCC
*24LC02 C583
*.1u/16V_4
A A
EEPROM Strapping
EEPROM Type EECLK EEDATA
24LC02 1 1
Internal 1 0 PROJECT : ZY9B
1A
LAN (BCM57780)
5 4 3 2 1
5 4 3 2 1
CODEC(ALC669X)
CENTER MONO
+5V_ADO
(30) FRONT-R
(30) Ext_L C887 C795 C797

2.2u_6 C894 C891
(30) FRONT-L .1u_4 10u_6 4.7u_6 .1u_4
D D
ADOGND
(30) Ext_C
+5V_ADO
CODEC_VREF
ADOGND ADOGND
Change R594/R595 (from 21K
to 15.8Kohm) for center at C-test
6
R663 20K/F_6 C884 U50
(30) MIC1_JD
2.2u_6 C896 C859
VDD
LINE_JD R659 39.2K/F_6 .1u_4 10u_6 IntSPK_C C907 .47u/10V_6 CEN-1 R594 CEN-2
15.8K/F_6 4 5 INCEN+ INCEN+ (30)
(30) LINE_JD IN- VO1
C823 .47u/10V_6 R595 15.8K/F_6 INCEN-
36
35
34
33
32
31
30
29
28
27
26
25
3 8
THERMALPAD
ADOGND IN+ VO2 INCEN- (30)
U55
ADOGND C820 4.7u_6 2
MIC2-OUT-L
LINE2-OUT-L
MIC2-OUT-R
Sense B
LINE2-OUT-R
CPVEE
CBN
CBP
MIC1-VREFO
VREF
AVSS1
AVDD1
ADOGND BYPASS
EAPD# 1
GND
SHDN#
37 MONO-OUT LINE1-R 24 LINE1-R (30)
G1442
9
+5V_ADO 38 AVDD2 LINE1-L 23 LINE1-L (30)
(30) SURR-L 39 SURR-L MIC1-R 22 IntSPK_L (30)
ADOGND R639 20K/F_6 40 21 IntSPK_C

JDREF MIC1-L ADOGND
C C
(30) SURR-R 41 SURR-R LINE2-VREFO 20
ADOGND 42 AVSS2 MIC2-VREFO 19 MIC1-VREFO (30)
43 NC ALC669X LINE1-VREFO 18
44 DMIC-CLK3/4 MIC2-IN-R 17 MIC1-R (30)
45 SPDIF-OUT2 MIC2-IN-L 16 MIC1-L (30)

C864 20p_4
L63 BLM15HD601000 DMIC_CLK0 46 15
(25) DMIC_CLK
EAPD#
DMIC-CLK1/2 LINE2-IN-R CODEC/AMP Power
(30) EAPD# 47 14
GPIO0/DMIC-1/2
EAPD GPIO1/DMIC-3/4 LINE2-IN-L

L64 CX5BD121000_4 SENSEA R689 10K/F_6
SDATA-OUT
(30) SPDIF_OUT 48 SPDIFO Sense A 13 LINEIN_JD (30)
SDATA-IN
DVDD-IO
DVSS-IO
PCBEEP
RESET#
BIT-CLK
DVDD
SYNC
DVSS
C865
*33p_4
+5V +5V_ADO
1
10
11
12
+3V L61 TI321611U480
B B
PCBEEP C898 1u/16V_6 BEEP R680 10K_4 C831 C842 C856 C840 C895 C830 C825 C838
SPKR (9) C847 C855
BIT_CLK669
SDIN_669
C875 C897 R679 .1u_4 4.7u_6 .1u_4 .1u_4 *.1u_4 4.7u_6 1000p/50V_4 1000p/50V_4 4.7u_6 10p/50V_4
C892
10u_6 .1u_4 100p/50V_4 1K_4
ADOGND
PCH_AZ_CODEC_RST# (9)
PCH_AZ_CODEC_SYNC (9)
(25) DMIC_DAT L66 CX5BD121000_4 DMIC_DAT0 +3V
C880 *33p_4
C893 .1u_4
(30) W_SHD R672 22_4

PCH_AZ_CODEC_SDIN0 (9)
R670 0_4
PCH_AZ_CODEC_BITCLK (9)
R669
10K_4 C885 *22p/50V_4
A A
PCH_AZ_CODEC_SDOUT (9)

PROJECT : ZY9B
1A
REALTEK ALC889X/MONO-AMP
5 4 3 2 1
5 4 3 2 1
SPEAKER/HP AMP. LINE-OUT/SPDIFO change to ME2347 at B-test +3V_SPD
+3V 1 3
+5V_ADO
Q49 C910
AGC-ON-level setting C851 LINEOUT_JD: ME2347
2
+5V_ADO Pin 1 Pin 2 Po HP not insert->H .22u_4
(AGC_Lv1) (AGC_Lv2) (RL = 4 Ω) 1u/16V_6 HP insert->L
Low Low 2.0 W ADOGND CN35
Low High 1.8 W U51 LINEOUT_JD
18
19
34
38
31
33
37
25
26
5 10
R570 R569 High Low 1.5 W 4
*10K_4 *10K_4 High High 1.0 W 9
VCC_SPR
VCC_SPL
VCC
VCC_CP
NC
NC
NC
AGCIN_L
AGCOUT_L
42 C833 4.7u_6 ADOGND HPL R668 54.9_4 HPL-1 L67 BK1608LL121_6 HPL_SYS 3
AGC_Lv1 VSS_CP HPR R661 54.9_4 HPR-1 L65 BK1608LL121_6 HPR_SYS ADOGND
1 AGC_Lv1 2
43 C829 2.2u_6 ADOGND ADOGND 1
AGC_Lv2 VDD_HP R660 R665 C863 C882
2 AGC_Lv2
D 41 C836 1u/16V_6 7 D
C2 LED
C809 1u/16V_6 3 *1K_4 *1K_4 2200p/50V_4 2200p/50V_4(29) SPDIF_OUT 8 Drive
ADOGND AGC_Det IC
R580 R579 39 6
10K_4 10K_4 C804 2.2u_6 R578 100K/F_6 C1
4 NC
23 INSPKL- SPDIF_OUT
attack time is 2msec SP_OUTL-
5 ADOGND
recovery time is 1sec NC ADOGND
Change R576/R629 (from 15K SP_OUTL- 22 Normal OPEN Jack
7 NC
ADOGND to 27.4Kohm) for Main-SPK at C-test 21 INSPKL+
C850 1u/16V_6 FRONT-L-1 R625 34.8K/F_6 FRONT-L-2 29 SP_OUTL+ +5V_ADO LINEOUT_JD
(29) FRONT-L 3 1 SP_INL
C846 560p_6 20
Q46 R629 27.4K/F_6 PREOUT-L 28
PREOUT_L Panasonic SP_OUTL+ LINE_JD
LINE_JD (29)
1
SPK 2N7002K 17 INSPKR+ change to +5V_ADO at B-test
2
SP_OUTR+ R692 D33

27 Pre-charge_L
3
+5V_ADO Near CN25
(29) FRONT-R 3 1C805 1u/16V_6FRONT-R-1 R571 34.8K/F_6 FRONT-R-2 8 AN12947A SP_OUTR+ 16
10K_4 *VPORT_6
2
C814 560p_6 SP_INR INSPKR-
SP_OUTR- 15
Q44 R576 27.4K/F_6 PREOUT-R 9 LINE_JD# 2
2N7002K PREOUT_R R703 Q48
14
2
SP_OUTR-
3
LINEOUT_JD +5V_ADO 10 HPL ADOGND
Pre-charge_R R598 10K/F_6 22K_4 2N7002K
HP_OUTL 45
C810 1u/16V_6 11 C824
1
AGCOUT_R
2
C918 44 100p_6 HPINL R602 10K/F_6 HPIN-L C876 4.7u_6 FRONT-L LINEOUT_JD 2
HP_INL Q47
12 AGCIN_R
1u_4 48 HPINR R574 10K/F_6 HPIN-R C881 4.7u_6 FRONT-R
1
C849 1u/16V_6 HP_INR 2N7002K ADOGND

U59 ADOGND 30 VREFSP
5
EAPD# 1 ADOGND 47 C816 R596 10K/F_6

(29) EAPD#
1
MUTE_SPK# HP_OUTR 100p_6 HPR
4 35 SP_STBY
LINEOUT_JD 2 TC7SH08FU MUTE_HP# ADOGND
GND_SPR
36
GND_SPL
3
HP_STBY
GND_CP
+5V_ADO
GND
GND
GND
ADOGND
EP
SP standby ON/OFF Main SPK/Center/Subwoofer EMI
2
C844
add it for noise issue at B-test Pin voltage
32
46
13
24
40
49
1u_4 HP_STBY AN12947A
1
Pin 35 ON/OFF CN5

U52
5
1 ADOGND (SP_STBY) MONO_OL-

(37) AMP_MUTE# Low ON(Mute) 1
4 MONO_OL+
LINE_JD# High OFF INCEN- 2
2 (29) INCEN- 3
C TC7SH08FU INCEN+ C
(29) INCEN+
3
INSPKR- L6 EMI@BK1608LL680_6 INSPKR-N 4

add it for pop sound issue at C-test INSPKR+ L8 EMI@BK1608LL680_6 INSPKR+N 5
ADOGND HP standby ON/OFF ADOGND INSPKL- L9 EMI@BK1608LL680_6 INSPKL-N 6
Pin voltage INSPKL+ L11 EMI@BK1608LL680_6 INSPKL+N 7
HP_STBY +5V_ADO R597 0_6 8
Pin 36 ON/OFF R563 *0_6 C44 C43 C39 C38 MAIN-SPK
(HP_STBY) R708 *0_6
Low ON(Mute) R619 0_6 EMI@47p/50V_4 EMI@47p/50V_4 EMI@47p/50V_4 EMI@47p/50V_4
High OFF R599 *0_6
C848 C832 C827 C841 R707 0_6
1u/16V_6 1u/16V_6 1u/16V_6 1u/16V_6 R705 *0_6
R706 *0_6
ADOGND ADOGND
+5V_ADO
MIC
SURR-SPK Add it for ALC669X
C913 C888 C890 C911

D31 1N4148 R618 2.2K_4
(29) MIC1-VREFO
4.7u_6 4.7u_6 .1u/25V_4 .1u/25V_4
D29 1N4148 R607 2.2K_4 CN33 PINK
SUR_SPKL+ R676 47K_6 1 7
C909 4.7u_6 MIC1-L1 R606 1K_4 MIC1-L2 L60 BK1608LL121_6 MIC1-L3
11
13
(29) MIC1-L 2
2
SUR_SPKR+ R690 47K_6 U56 6

ADOGND C908 4.7u_6 MIC1-R1 R622 1K_4 MIC1-R2 L62 BK1608LL121_6 MIC1-R3 3
VCC
VCC
NC
NC
(29) MIC1-R
C860 1u_6 SURR-L1 R682 20K/F_6 SURR-L2 15 MIC1_JD 4
(29) SURR-L LIN- (29) MIC1_JD
8
C861 1u_6 SURR-R1 R684 20K/F_6 SURR-R2 7 5 C912 1u_4 ADOGND 5
(29) SURR-R RIN- BYPASS R572 75_4 C839 C826 MIC
(29) Ext_C
ADOGND C903 1u_6 SURR+L1 R685 20K/F_6 SURR+L2 16 12 SUR_SPKR+ 470p/50V_4 470p/50V_4
LIN+ RVO1 CN15 R575 75_4
C899 1u_6 SURR+R1 R681 20K/F_6 SURR+R2 SUR_SPKR- SUR_SPKR- L68 SUR_SPKR-N
0_6SHORT
(29) Ext_L Normal OPEN Jack
8 9
THERMALPAD
ADOGND RIN+ RVO2 1

SUR_SPKR+ L69 SUR_SPKR+N
0_6SHORT
SUR_SPKL- R691 47K_6 SUR_SPKL+ SUR_SPKL- L71 SUR_SPKL-N
0_6SHORT 2
LVO1 1 3
B SUR_SPKL+ L70 SUR_SPKL+N
0_6SHORT Add it for ALC669X B
SUR_SPKR- R675 47K_6 EAPD# SUR_SPKL- 4
14 4
VSS
VSS
SHDN# LVO2 C902 C904 C901 C900 SURR-SPK

Change R675/R676/R690/R691 ADOGND ADOGND
(from 20K to 47Kohm) for SURR at C-test G1453L *47p/50V_4 *47p/50V_4 *47p/50V_4 *47p/50V_4
17
10
MIC1_JD
1
D30
ADOGND *VPORT_6 Near CN28
2
ADOGND
SUBWOOFER LINE IN
CN31 BLUE
1 7
C906 10u/6.3V_6 LINE1-L1 R568 75_4 LINE1-L2 L56 BK1608LL121_6 LINE1-L3 2
(29) LINE1-L
6
C905 10u/6.3V_6 LINE1-R1 R581 75_4 LINE1-R2 L57 BK1608LL121_6 LINE1-R3 3
(29) LINE1-R
LINEIN_JD 4
(29) LINEIN_JD
8
C807 C798 5
U47
ADOGND C796 1u_6 14 23 470p/50V_4 470p/50V_4 LINE-IN
Vs OUT+ MONO_OUTL+ R561 EMI@FBMA-11-121_6 MONO_OL+
13 Vs OUT+ 24
6 19 MONO_OUTL- R560 EMI@FBMA-11-121_6 MONO_OL-
C802 1u_6 WIN R564 20K/F_6 W-IN PC OUT-
(29) IntSPK_L
R567
7
13.7K/F_6 8 IN OUT- 20
C787 C786
Normal OPEN Jack
Change R567 (from 10.7K FB LINEIN_JD
to 12.4Kohm) for Woofer at C-test 4 2 C793 1u/25V_6 EMI@47p/50V_4
EMI@47p/50V_4 ADOGND ADOGND
MUTE# CHOLD
1
(29) W_SHD 5 SHDN#
A D28 A
ADOGND C801 1u_6 9 Near CN32

C800 1u_6 COM VIN *VPORT_6
12 1
2
C794 .1u/16V_4 REG PVDD
15 C1N PVDD 17
16 18 L54 TI321611U480
C1P PVDD
2
3 AGND PGND 21
10 22 C791 C792 C790 C788 C789
AGND PGND .1u/25V_4 1u/25V_8 1u/25V_8 10u/25V_1206 10u/25V_1206 ADOGND
EP
11
1
AGND
MAX9737
25
ADOGND R562 0_8 Quanta Computer Inc.

PROJECT : ZY9B
ADOGND 1A
AMP/AUDIO JACK/WOOFER
5 4 3 2 1
1 2 3 4
2nd SATA HDD (edge of board) MAIN SATA HDD

CN34 CN25
GND23 23 GND23 23
GND1 1 GND1 1
A RXP 2 SATA_TX3+ (9) RXP 2 SATA_TX0+ (9) A
RXN 3 SATA_TX3- (9) RXN 3 SATA_TX0- (9)
GND2 4 GND2 4
5 SATA_RX3-_C C531 .01u/25V_4 5 SATA_RX0-_C C265 .01u/25V_4
TXN SATA_RX3- (9) TXN SATA_RX0- (9)
6 SATA_RX3+_C C527 .01u/25V_4 6 SATA_RX0+_C C266 .01u/25V_4
TXP SATA_RX3+ (9) TXP SATA_RX0+ (9)
GND3 7 GND3 7
3.3V 8 3.3V 8
3.3V 9 3.3V 9
3.3V 10 3.3V 10
GND 11 GND 11
GND 12 GND 12
GND 13 GND 13
5V 14 +5V 5V 14 +5V
5V 15 5V 15
5V 16 5V 16
GND 17 GND 17
RSVD 18 RSVD 18
GND 19 GND 19
12V 20 12V 20
12V 21 12V 21
B 1A (MAX.) B
12V 22 12V 22
1A (MAX.) +5V
GND24 24 +5V GND24 24
+
C246 C248 C239 C243 C242
+
2ND_SATA C477 C479 C480 C491 C492 MAIN_SATA C260

C493 100u_3528 10u/6.3V_6 .1u/16V_4 *.1u/16V_4 .01u/25V_4 .01u/25V_4
100u_3528 10u/6.3V_6 .1u/16V_4 *.1u/16V_4 .01u/25V_4 *.01u/25V_4
ODD (SATA)
EE RETURN-PATH CAPACITORS +5V_S5 C377 *.1u/16V_6 +3V
C C46 *.01u/50V_6 C378 *.01u/50V_6 C
CN27 C47 *.01u/50V_6 C283 *.01u/50V_6

GND14 14
1 C783 *.01u/50V_6 VIN VIN C441 *.01u/50V_6

GND
A+ 2 SATA_TX1+ (9)
3 SATA_TX1- (9) +3V C12 *.01u/50V_6
A-
GND 4
5 SATA_RX1-_C C390 .01u/25V_4 +5V_S5 C782 *.01u/50V_6 VIN
B- SATA_RX1- (9)
6 SATA_RX1+_C C386 .01u/25V_4
B+ SATA_RX1+ (9)
7 +3V C159 *.01u/50V_6 VIN C822 *.01u/50V_6 +1.05V
GND
1.8A (MAX.) +5V C245 *.1u_4
+5V_S5
8 SATA_DP R130 1K_4 +5V C295 *.01u/50V_6 +3V
DP C258 *.01u/25V_4
5V 9
5V 10
+
11 C298 C302 C306 C310 C291 +3V C292 *.1u_4 C468 *.1u/16V_6 +1.05V
MD C299
GND 12
13 .01u/25V_4 .01u/25V_4 *.1u/16V_4 *.1u/16V_4 *10u/6.3V_6 100u_3528 C293 *.01u/25V_4
GND
D 15 +1.05V C925 .1u_4 D
GND15
SATA_ODD NEER CLOSE PR166
C926 .1u_4
+5V_S5
NEER CLOSE PR293 PROJECT : ZY9B
C927 .1u_4 1A
+1.05V SATA-HDD/ODD
NEER CLOSE HOLE41 Date: Thursday, September 17, 2009 Sheet 31 of 49
1 2 3 4
1 2 3 4 5 6 7 8
Wireless +3V +3V
+3.3V: 1000mA C54 C55 C56 C75 C74 C77
+3.3Vaux:330mA +1.5V +3V 10u/6.3V_6 *4.7u_6 .1u/16V_4 *10u/6.3V_6 4.7u_6 .1u/16V_4

Fotprint : MIPCI-800055FB052GX-52P-LDV-NB4
+1.5V:500mA +3V
A +3V +3V A
2
CN23
51 Reserved +3.3V 52
R88 *0_4 CL_RST1#_WLAN 49 50 1 3
(10) CL_RST1# Reserved GND RF_LED# (35)
R85 *0_4 CL_DATA1_WLAN 47 48 Q12 C114 C143 C174 C125
(10) CL_DATA1 Reserved +1.5V
R84 *0_4 CL_CLK1_WLAN 45 46 *2N7002D
(10) CL_CLK1 Reserved LED_WPAN#
43 44 RFLED# R87 0_4 .1u/16V_4 .1u/16V_4 .1u/16V_4 .1u/16V_4
R79 *0_8 Reserved LED_WLAN#
+3V 41 NC LED_WWAN# 42
39 NC GND 40
37 Reserved USB_D+ 38 USBP10+ (10)
35 GND USB_D- 36 USBP10- (10)
33 34 +1.5V +1.5V
(10) PCIE_TX1+ PETp0 GND
31 32 CLK_SDATA
(10) PCIE_TX1- PETn0 SMB_DATA
29 30 CLK_SCLK
GND SMB_CLK
27 GND +1.5V 28
25 26 C120 C70 C130 C164
(10) PCIE_RX1+ PERp0 GND
(10) PCIE_RX1- 23 PERn0 +3.3Vaux 24
21 22 PLTRST# .1u/16V_4 10u/6.3V_6 .1u/16V_4 10u/6.3V_6
GND PERST# PLTRST# (4,10,11,27,28,33,37)
19 NC W_DISABLE# 20 RF_EN (37)
17 NC GND 18
15 GND NC 16
(10) CLK_PCH_SRC3 13
11
REFCLK+ NC 14
12
Close CN21 Close CN23
(10) CLK_PCH_SRC3# REFCLK- NC
B
9 GND NC 10 B
7 CLKREQ# NC 8
5 Reserved +1.5V 6
3 Reserved GND 4
PCIE_WAKE#_R 1 2
WAKE# +3.3V
88910-5204
H=4
TV and Debug
+1.5V +3V
C C
CN22
51 Reserved +3.3V 52
49 Reserved GND 50
(10) PCI_RST# R70 0_4 PCI_RST#_R 47 48
R68 0_4 PCLK_DEBUG_CARD Reserved +1.5V
(10) CLK_LPC_DEBUG 45 Reserved LED_WPAN# 46
43 44 +3V
L23 BKP1608HS181T_6_1.5A +3V_TV Reserved LED_WLAN#
+3V 41 NC LED_WWAN# 42
C126 C129 39 40
NC GND
TV use +3V 37 Reserved USB_D+ 38 USBP13+ (10)
2
CLK_LPC_DEBUG
350mA, 20mil 10u/6.3V_6 .1u/16V_4 35 GND USB_D- 36 USBP13- (10)
(10) PCIE_TX2+ 33 PETp0 GND 34
31 32 CLK_SDATA CLK_SDATA (3,14,15)
(10) PCIE_TX2- PETn0 SMB_DATA
29 30 CLK_SCLK CLK_SCLK (3,14,15)
GND SMB_CLK PCIE_WAKE#_R
27 GND +1.5V 28 (8,28) PCIE_WAKE# 3 1
R67 25 26 Q9
(10) PCIE_RX2+ PERp0 GND
23 24 *DTC144EUA
(10) PCIE_RX2- PERn0 +3.3Vaux
*22_4 21 22 PLTRST#
GND PERST#
19 NC W_DISABLE# 20
17 NC GND 18
C136 15 16 A_LFRAME#_R R57 0_4

GND NC LPC_LFRAME# (9,37)
*10p/50V_4 13 14 A_LAD3_R R51 0_4
(10) CLK_PCH_SRC1 REFCLK+ NC LPC_LAD3 (9,37)
11 12 A_LAD2_R R50 0_4
D (10) CLK_PCH_SRC1# REFCLK- NC LPC_LAD2 (9,37) D
9 10 A_LAD1_R R47 0_4
GND NC LPC_LAD1 (9,37)
7 8 A_LAD0_R R44 0_4
CLKREQ# NC LPC_LAD0 (9,37)
5 6
PCIE_WAKE#_R
3
Reserved
Reserved
+1.5V
GND 4 Quanta Computer Inc.
1 WAKE# +3.3V 2
88910-5204 PROJECT : ZY9B

1A
MINI PCI-E card/TV
H=9 Date: Thursday, September 17, 2009 Sheet 32 of 49
1 2 3 4 5 6 7 8
5 4 3 2 1
NEW CARD
CN13
29 GND5
D 26 GND1 D
(10) PCIE_TX4+ 25 PETp0 GND27 27
(10) PCIE_TX4- 24 PETn0 GND28 28
23
22
GND2 GND31 31
32
NEW CARD'S POWER SWITCH GMT: AL000577002
(10) PCIE_RX4+ PERp0 GND32
(10) PCIE_RX4- 21 PERn0 U54
TI: AL002231000
20 GND3
19 G577DSR91U
(10) CLK_PCH_SRC4 REFCLK+
(10) CLK_PCH_SRC4#
CPPE#
18 REFCLK- +3V 2 3.3VIN 3.3VOUT 3 +NEW_3V
1.3A
17 CPPE# 4 3.3VIN 3.3VOUT 5
(10) CLK_PCIE_REQ4# 16 CLKREQ#
+NEW_3V 15 +3.3V1 +3V_S5 17 AUXIN AUXOUT 15 +NEW_3VAUX
275mA
14 +3.3V2
PERST#
+NEW_3VAUX
13 PERST# +1.5V 12 1.5VIN 1.5VOUT 11 +NEW_1.5V
650mA
12 +3.3VAUX 14 1.5VIN 1.5VOUT 13
11 WAKE#
+NEW_1.5V 10 6 1
+1.5V1 (4,10,11,27,28,32,37) PLTRST# *SYSRST# *STBY# CPPE#
9 +1.5V2 20 *SHDN# *CPPE# 10
NEW_SMDATA 8 9 CPUSB#
NEW_SMCLK SMB_DATA *CPUSB#
7 SMB_CLK 18 *RCLKEN
6 16 8 PERST#
RESERVED1 NC PERST#
5 RESERVED2 7 GND OC# 19
C CPUSB# C
4 CPUSB# 21 GNDPAD
(10) USBP0+ 3 USB_D+
(10) USBP0- 2 USB_D-
1 GND4
30 GND6
NEW CARD
+NEW_3V
+3V_S5 +3V +1.5V
R249 R244
C877 C874 C862 C867 C858
.22u_4 10u/6.3V_6 *.1u_4 10u/6.3V_6 *.1u_4
Q26 10K_4 10K_4
2
2N7002K
B B
3 1 NEW_SMDATA
(3,10,16) ICH_SMBDATA
+NEW_3V +NEW_1.5V +NEW_3VAUX

+NEW_3V
C853 C494 C868 C852 C481 C873

Q24 10u/6.3V_6 .1u_4 *.1u_4 10u/6.3V_6 .1u_4 .1u_4
2
2N7002K
3 1 NEW_SMCLK
(3,10,16) ICH_SMBCLK
A A

PROJECT : ZY9B
1A
NEW CARD
5 4 3 2 1
5 4 3 2 1
+5V_S5
USB & ESATA
+3V
C754 U46
1u/16V_6 2 8 USBPWR1
IN1 OUT3
3 IN2 OUT2 7
OUT1 6
C263 C264 C296 USBON# 4 + C737
.1u_4 2.2u_6 (37) USBON# EN# C331
.01U/25V_4 1 GND
20
10
16
OC# 5 OC0_10# (10)
6
U17 330u/6.3V_6X5.7 1000p/50V_4
G547
VCC
VCC
VCC
VCC
CN28
1 15 eSATA_TXP2_R L73 1 8
(9) SATA_TX2+ RX_0P TX_0P 1 8
D (10) USBP1- 1 1 2 2 2 2 7 7 D
2 14 eSATA_TXN2_R 4 3 3 6
(9) SATA_TX2- RX_0N TX_0N (10) USBP1+ 4 3 3 6
4 4 5 5
1
4 12 eSATA_RXN2_R WCM2012F2SF
(9) SATA_RX2- TX_1N RX_1N RV6 RV5 USB_MB_Turbo
5 11 eSATA_RXP2_R Close to USB
(9) SATA_RX2+ TX_1P RX_1P *EGA-0402 *EGA-0402
2
7 9 A_PRE R108 *4.7K_4
GND_P
+3V ENGND D0 +3V
GND
GND
GND
GND
8 B_PRE R111 *4.7K_4 +3V AL008511001
D1
PS8511B EN A_PRE B_PRE dB
3
17
19
18
13
21
R109 R110 USBPWR1
0_4 0_4
AUTOPW_EN
0 X X Power down mode
12
14
C676
+ C261 CN26
A_EQ
B_EQ
Shield
Shield
1 0 0 Pre-emphasis disable USB/ESATA
330u/6.3V_6X5.7 1000p/50V_4
1 VCC GND 11
1 1 1 Pre-emphasis enable L74 10 eSATA_RXP2 C270 2 1 .01u/25V_4 eSATA_RXP2_R
B+ eSATA_RXN2 C273 2
(10) USBP9- 1 1 2 2 2 D- B- 9 1 .01u/25V_4 eSATA_RXN2_R
(10) USBP9+ 4 4 3 3 GND 8
+3V 3 7 eSATA_TXN2 C284 2 1 .01u/25V_4 eSATA_TXN2_R
D+ A-
1
ALLVC412000 WCM2012F2SF 6 eSATA_TXP2 C286 2 1 .01u/25V_4 eSATA_TXP2_R
AUTOPW_EN R124 *8511@0_4 RV4 RV3 A+
4 GND GND 5
A_EQ R126 *8511@0_4 EN D0 D1 CH-0 CH-1 Close to USB
Shield
Shield
B_EQ R125 *8511@0_4 *EGA-0402 *EGA-0402
2
0 X X Standby Standby
1 0 0 0dB 0dB
13
15
AUTOPW_EN R119 75LV@0_4
A_EQ R121 75LV@0_4 1 1 0 Pre-emphasis (5dB) 0dB
B_EQ R120 75LV@0_4
1 0 1 0dB Pre-emphasis (5dB)
C C
1 1 1 Pre-emphasis (5dB) Pre-emphasis (5dB)
USB_2PORT/B
HOLES +5V_S5
HOLE8 HOLE39 HOLE10 HOLE12 HOLE11 HOLE40 HOLE6 PAD6 PAD5
*HG-C315D118P2 *HG-C315D118P2 *HG-C315D118P2 *HG-C315D118P2 *HG-C315D118P2 *HG-C315D118P2 *H-C1772D1772NA1812 *pad-c236 *pad-c236
7 6 7 6 7 6 7 6 7 6 7 6
8 5 8 5 8 5 8 5 8 5 8 5
1
9 4 9 4 9 4 9 4 9 4 9 4 C552 U28 CN14
1u/16V_6 2 8 USBPWR2 1
IN1 OUT3
3 7 2
1
2
3
1
2
3
1
2
3
1
2
3
1
2
3
1
2
3
IN2 OUT2
OUT1 6 3
PAD3 PAD8 PAD2 PAD4 PAD1 USBON# 4 4
HOLE25 HOLE26 HOLE34 HOLE37 HOLE2 PAD7 *pad-c137 *PAD-C177 *pad-c137 *pad-c137 *pad-c137 EN#
1 GND 5
*HG-C315D118P2 *HG-C315D118P2 *HG-C315D118P2 *HG-C315D118P2 *HG-C315D118P2 *spad-re485x635np 5 L75 6
OC# OC11_12# (10)
7 6 7 6 7 6 7 6 7 6 (10) USBP11- 4 4 3 3 7
1
1
8 5 8 5 8 5 8 5 8 5 G547 1 2 8
(10) USBP11+ 1 2
1
9 4 9 4 9 4 9 4 9 4 L76 9
(10) USBP12- 4 4 3 3 WCM2012F2SF 10 13
(10) USBP12+ 1 2 11 14
1
2
3
1
2
3
1
2
3
1
2
3
1
2
3
1 2
12
WCM2012F2SF
HOLE1 HOLE9 HOLE22 HOLE33 HOLE38 USB_2PORT
*HG-C315D118P2 *O-ZY9-2 *HG-C315D118P2 *HG-C315D118P2 *HG-C315D118P2
7 6 7 6 7 6 7 6 7 6
8 5 8 5 8 5 8 5 8 5
9 4 9 4 9 4 9 4 9 4
1
2
3
1
2
3
1
2
3
1
2
3
1
2
3
B USB_SWITCH/B B
HOLE42 HOLE41 HOLE35 HOLE5 HOLE14 HOLE15

*HG-C315D110P2 *HG-C315D110P2 *HG-C276D110P2 *H-C276D146P2 *H-C197D63P2 *H-C197D63P2 +5V_S5
7 6 7 6 7 6
8 5 8 5 8 5
9 4 9 4 9 4
CN7
C247 U16 1
1
2
3
1
2
3
1
2
3
1u/16V_6 2 8 USBPWR3 2
IN1 OUT3
3 IN2 OUT2 7 3
6 L77 4
HOLE18 HOLE27 HOLE16 HOLE20 HOLE32 HOLE31 HOLE3 USBON# OUT1
4 EN# (10) USBP3- 4 4 3 3 5
*H-C236D146P2 *H-C236D146P2 *H-C197D63P2 *H-C197D63P2 *H-C236D146P2 *H-C236D146P2 *H-C236D146P2 HOLE13 1 1 2 6
GND (10) USBP3+ 1 2
*H-C236D146P2 5 7
OC# OC6# (10)
WCM2012F2SF 8
G547 9
10 13
(36,37) MX4 11 14
1
(36,37) MY0 12
1
USB_SWITCH
HOLE28 HOLE29 HOLE30 HOLE21 HOLE17 HOLE24 HOLE23
*H-C236D146P2 *H-C236D146P2 *H-C236D146P2 *H-C197D63P2 *H-C197D63P2 *H-C236D146P2 *H-C236D146P2 HOLE7 +3V 1 3 SAVE_LED
*H-C87D87N
Q13
2
BSS84
1
(11) SAVE_LED#
1
HOLE4
*O-ZY9-1 TP_Screen +5V
7 6
A 8 5 A
9 4
1
2
3
C919
Change TP_screen PN and Footprint at B-test
.1u_4
CN1
(10) USBP5-
1
2
(10) USBP5+ 3
4 6 PROJECT : ZY9B
5 7 Size Document Number Rev
TScreen_CONN 1A
USB/eSATA/TP_Screen
5 4 3 2 1
5 4 3 2 1
+3V
POWER BOARD +3V_S5 M/B LED
+3V
1
R398
Blue
5
10K/F_4 1
PWRLED# 2 4 SATA_LED#_R R401 330_4 LED1
(9) SATA_ACT# 2
U33 SATA_LED
3
+3VPCU Q4 *TC7SH08FU
D +3V_S5 BSS84 D
3
R402 0_4
1
PIPE LED will flash while
battery insert at C-test R754
Blue
1
R403 330_4 LED2
(37) NUMLED#
100K/F_6 SUSLED# 2
NUM_LED
Q6
(37) ACPRN 2
*BSS84 CN4 R404 330_4 LED3 Blue
(37) CAPSLED#
3
Q5 PWR_LED 1 CAPS_LED +3V_S5
BSS84 SUS_LED 2
3 PIPE_LED 3 Amber
D4 BAS316 4 LED4
(37) NBSWON#
5 7 R405 330_4 4 1
(37) SUSLED#
6 8
R406 330_4 3 2
(37) PWRLED#
POWER/B_CONN
LED_A/B
+3VPCU Blue
C C
+3VPCU
R396 R397
1M_4 1M_4
LED5
Amber
R399 330_4 4 1
(37) BATLED1#
R400 330_4 3 2
(37) BATLED0#
LED_A/B
Blue
+3VPCU
Left side MMB
+3V
2
CN9 C348 C346
1
(36) BT_LED 2 .1u_4
1
2
(32) RF_LED# 3 C365 C373
T28 4 *10u/6.3V_6
+3V 5 .1u_4 *10u/6.3V_6
1
B T27 6 B
+3V 7
T29 8
MMB2_ATTN# 9
MXM_SMDATA12 R116 22_4 10 13
(24,37) MXM_SMDATA12
(24,37) MXM_SMCLK12 MXM_SMCLK12 R118 22_4 11 14 Right Side MMB
12
+5V
BTWL-MMB CN11
MMB3_SMCLK R132 22_4 12

(37) MMB3_SMCLK
2
MMB3_SMDATAR133 22_4 11 C366
(37) MMB3_SMDATA
MXMCLK=MXM_SMCLK; MXMDATA=MXM_SMDATA12 MMB3_ATTN# 10
9 1u_4
MMB1 and MMB2 need add ISOLATE circuit where are on MXM page.
1
T25 8
7
MMB Status LCD BL_ON/OFF MMB & Backlight Logo LED +3V
+3VPCU 6
T26 5
DIGVOL_UP 4
(37) DIGVOL_UP
+3V +3V 3 13
DIGVOL_DN 2 14
CN3 (37) DIGVOL_DN
+3V +5V 1
R147 MXM_SMCLK12 R3 22_4 1

A 10K_4 MXM_SMDATA12 R4 22_4 2 Audio_MMB A
3
2
MMB1_ATTN# C3 C8
MMB1_ATTN# D13 BAS316 4
R5 BK1608HS241 5 .1u_4 *10u/6.3V_6
+5V
1
MMB2_ATTN# D12 BAS316 6

MMB_ATTN12# (37) 7 9
C11 8 10
MMB3_ATTN# D14 BAS316 EMI@120p_4 LCD&Logo PROJECT : ZY9B
MMB_ATTN# (37)
1A
POWER/MMB/LAUNCH/LED
5 4 3 2 1
5 4 3 2 1
INT K/B MY0

CN6 TOUCHPAD & Finger-Printer CONN. +5V
(34,37) MY0 1
7 8 MX3 MY1 2
(37) MY1 +5V
5 6 MX2 MY2 3
(37) MY2 +3VPCU
3 4 MX1 MY3 4 L27
(37) MY3
1 2 MX0 MY4 5
(37) MY4
CP6 *100p_8P4C MY5 6 BLM21P300S_8
(37) MY5
7 8 MX7 MY6 7 RP1 10K_10P8R
(37) MY6
5 6 MX6 MY7 8 10 1 MX3
(37) MY7
D 3 4 MX5 MY8 9 MX4 9 2 MX2 R127 R129 D
(37) MY8
1 2 MX4 MY9 10 MX5 8 3 MX1 10K_4 10K_4 C300 20mil
(37) MY9
CP5 *100p_8P4C MY10 11 MX6 7 4 MX0 .1u/16V_4 CN10
(37) MY10
7 8 MY0 MY11 12 MX7 6 5 +TPVDD 1
(37) MY11
5 6 MY1 MY12 13 L28 LZA10-2ACB104MT TPDATA_R 2 RV1 *EGA-0402
(37) MY12 (37) TPDATA
3 4 MY2 MY13 14 L29 LZA10-2ACB104MT TPCLK_R 3 USBP2- 1 2
(37) MY13 (37) TPCLK
1 2 MY3 MY14 15 4
(37) MY14
CP1 *100p_8P4C MY15 16 C308 C303 (10) USBP2- USBP2- 5 RV2 *EGA-0402
(37) MY15
7 8 MY4 MY16 17 *.01u/25V_4 (10) USBP2+ USBP2+ 6 USBP2+ 1 2
(37) MY16
5 6 MY5 MY17 18 *.01u/25V_4 7
(37) MY17
3 4 MY6 MX7 19 MX2 8
(37) MX7
1 2 MY7 MX6 20 MY0 9
(37) MX6
CP2 *100p_8P4C MX5 21 +3V 1 3 TP_LED 10 13
(37) MX5
7 8 MY8 MX4 22 (25,37) LID591# 11 14
(34,37) MX4
5 6 MY9 MX3 23 +3VPCU 12
(37) MX3
3 4 MY10 MX2 24 27 Q15
(37) MX2
2
1 2 MY11 MX1 25 28 BSS84 TP_FP_CONN
(37) MX1
CP3 *100p_8P4C MX0 26
(37) MX0 (37) TP_LED#
7 8 MY12
5 6 MY13 KB
3 4 MY14
1 2 MY15
CP4 *100p_8P4C
C C122 *100p_4 MY16 C
C123 *100p_4 MY17 BLUETOOTH CONNECTOR
30mil
CN16
+3V_S5 1 3 BT_POWER
1
Q30 2
+ C573 (10) USBP4+ 3
C568 R368 (10) USBP4-
2
.33u/10V_6 AO3413 C567 4
47K_4 2.2u_6
Keyboard LED control 1000p/50V_4
(35) BT_LED 5
BT_CONN
C572
*.01u/16V_4
R358 4.7K_4
(37) BT_POWERON#
+5V +5V
B B
20mil CN8
R134
1 3 KB_LED_PWR
3
CPU FAN
Q14 4
10K_4 1
AO3413 C285 C287 +3V +3V +5V +3V +5V
2
2
KB_LED# *10u/6.3V_6 .01u/25V_4 KB_LED
ON/OFF only
3
R434 R435 R427

R452
2 10K_4 10K_4 10K_4
(37) KB_LED R443 10K_4
Q16 *10K_4
DTC144EUA FAN_PWM_E
1
(37) FANSIG CN21

1
2
2
3
Q39 FAN_PWM_CN 3
(10,11,37) SML1ALERT# 2 1 3 4
MMBT3904
Q40 30mil FAN CONN
1
MMBT3904
A A
(37) CPUFAN#

PROJECT : ZY9B
1A
KB/FAN/TP+FP/BT
5 4 3 2 1
5 4 3 2 1
EC +3VPCU_EC L33 BK1608HS220_6_1A +A3VPCU

+3V
I/O ADDRESS SETTING
C424 C429 I/O Address
30mil
.1u/16V_4 4.7u_6 Near TP on TOP side BADDR1-0 Index Data
+3VPCU E775AGND 00 XOR TREE TEST MODE
D16 C417 C416 +3V
R232 2.2_6 +3VPCU_EC 0.03A(30mils) 01 CORE DEFINED
BAS316 4.7u_6 .1u/16V_4
C442 C414 C408 C421 C412 C368 10 2Eh 2Fh
115
102
U21
19
46
76
88
4
4.7u_6 .1u/16V_4 *.1u/16V_4 .1u/16V_4 *.1u/16V_4 .1u/16V_4 11 164Eh 164Fh
R218
VCC1
VCC2
VCC3
VCC4
VCC5
AVCC
VDD
E775AGND C938 *10u_8 ICMNT 47K_6 SHBM=0: Enable shared memory with host BIOS
D D
C924 .01u/16V_4
3 97 BADDR0 BADDR0_EC_R R227 10K_4
(9,32) LPC_LFRAME# LFRAME GPI90/AD0 TEMP_MBAT (38)
(9,32) LPC_LAD0 126 LAD0 GPI91/AD1 98 SML1ALERT# (10,11,36)
127 99 TPD_TRIP BADDR1 BADDR1_EC_R R220 *10K_4
(9,32) LPC_LAD1 LAD1 GPI92/AD2
128 A/D 100 ICMNT
(9,32) LPC_LAD2 LAD2 GPI93/AD3 ICMNT (38)
1 108 DIGVOL_UP SHBM SHBM_R R183 10K_4
(9,32) LPC_LAD3 LAD3 GPIO05/AD4 DIGVOL_UP (35)
CLK_PCI_775 CLK_PCI_775 2 96 DIGVOL_DN
(10) CLK_PCI_775 LCLK GPIO04/AD5 DIGVOL_DN (35)
RT1
8 THERMISTOR_100K/1%(NTC) 1/13 Comfirm by vendor mail :
(8) CLKRUN# GPIO11/CLKRUN
GPI94/DA0 101 S5_DIS (39) Disabled ('1') if using FWH device on LPC.
R199
(11) SIO_A20GATE 121 GA20 GPI95/DA1 105 KB_LED (36) t Enabled ('0') if using SPI flash for both system BIOS and EC firmware
*22_4
D/A GPI96/DA2 106 TP_LED# (36)
(11) SIO_RCIN# 122 KBRST GPI97/DA3 107 MAINON_DIS (47)
(11) SIO_EXT_SCI# 29 ECSCI/GPIO54 LPC +3VPCU
E775AGND
64
C415
(25) EC_FPBACK#
EC_FPBACK# 6 GPIO24/LDRQ
GPIO01/TB2
GPIO03/AD6 95
ACIN (38)
NBSWON# (35)
SM BUS PU MBCLK R154 4.7K_4
*10p/50V_4 GPIO06 93 LID591# (25,36)
NOCIR# 124 94 Change pull-up resistor (R148 MBDATA R148 4.7K_4
GPIO10/LPCPD GPIO07/AD7 SUSB# (8) /R154) from 10K to 4.7Kohm
119 MMB3_SMCLK MMB3_SMCLK R224 10K_4
GPIO23/SCL3 MMB3_SMCLK (35)
PLTRST# 7 109 MMB3_SMDATA R213 10K_4
(4,10,11,27,28,32,33) PLTRST# LREST GPIO30/CIRTX2 ACPRN (35)
120 MMB3_SMDATA
GPIO31/SDA3 MMB3_SMDATA (35)
USBON# 123 65 +3V
(34) USBON# GPIO67/PWUREQ GPIO32/D_PWM BATLED0# (35)
NOCIR# 66
GPIO33/H_PWM BATLED1# (35)
IRQ_SERIRQ 125 15 CRT_SENSE# R189 *10K_4
(9) IRQ_SERIRQ SERIRQ GPIO36/TB3 VRON (40)
R222 16 2ND_MBCLK R140 10K_4
GPIO40/F_PWM SUSLED# (35) add it for pop sound issue at C-test
9 17 2ND_MBDATA R144 10K_4
(11) SIO_EXT_SMI# GPIO65/SMI GPIO42/TCK
GPIO 20 MXM_SMCLK12 R169 2.2K_4
GPIO43/TMS AMP_MUTE# (30)
*10K_4 21 MXM_SMDATA12 R170 2.2K_4
MX0 GPIO44/TDI
(36) MX0 54 KBSIN0 GPIO45/E_PWM 22 CPUFAN# (36)
MX1 55 23
With CIR module – floating (36) MX1 KBSIN1 GPIO46/CIRRXM/TRST MMB_ATTN# (35)
MX2 56 24
Without CIR module – pull (36) MX2 KBSIN2 GPO47/SCL4 MXM_SMCLK12 (24,35)
MX3 57 25
C
down 10K (36) MX3 KBSIN3 GPIO50/TDO D/C# (38) C
MX4 58 26
(34,36) MX4 KBSIN4 GPIO51/TA3 S5_ON (39,48)
MX5 59 27 +3VPCU
(36)
(36)
MX5
MX6
MX6
MX7
60
KBSIN5
KBSIN6
GPIO52/CIRTX2/RDY
GPIO53/SDA4 28
HDMI_HPD_EC# (26)
MXM_SMDATA12 (24,35)
ACER ID
(36) MX7 61 KBSIN7 GPIO81 91 DNBSWON# (8,16)
CL_RST_OUT U20
GPO82/TRIS 110 T33
MY0 53 112 BADDR0_EC_R MMB3_SMCLK 6 1
(34,36) MY0 KBSOUT0/JENK GPO84/BADDR0 SCL A0
MY1 52 80 MMB3_SMDATA 5 2
(36) MY1 KBSOUT1/TCK GPIO41 DP_HPD_EC# (26) SDA A1
MY2 51 3
(36) MY2 KBSOUT2/TMS A2
MY3 50
(36) MY3 KBSOUT3/TDI
MY4 49 KB 31 7 8
(36) MY4 KBSOUT4/JEN0 GPIO56/TA1 MMB_ATTN12# (35) WP VCC
MY5 48 117 4
(36) MY5 KBSOUT5/TDO GPIO20/TA2 SUSON (43) GND
MY6 47 63 C330
(36) MY6 KBSOUT6/RDY GPIO14/TB1 FANSIG (36)
MY7 43 *24C02
(36) MY7 KBSOUT7
MY8 42 TIMER 32 *.1u/16V_4
(36) MY8 KBSOUT8 GPIO15/A_PWM CONTRAST (25)
MY9 41 118
(36) MY9 KBSOUT9 GPIO21/B_PWM NUMLED# (35)
MY10 40 62
(36) MY10 KBSOUT10 GPIO13/C_PWM PWRLED# (35)
MY11 39 81
(36) MY11 KBSOUT11 GPIO66/G_PWM CAPSLED# (35)
MY12 38
(36) MY12 KBSOUT12/GPIO64
MY13 37
(36) MY13
(36) MY14
MY14
MY15
36
KBSOUT13/GPIO63
KBSOUT14/GPIO62 GPIO77/SPI_DI 84 CRT_SENSE#
SHBM_R
CRT_SENSE# (25)
SPI FLASH +3VPCU
(36) MY15
MY16
35 KBSOUT15/GPIO61/XOR_OUT SPI GPO76/SPI_DO/SHBM 83
U24
(36) MY16 34 GPIO60/KBSOUT16 GPIO75/SPI_SCK 82 T31
MY17 33 SPI_SDI_uR R194 22_4 SPI_SDI_uR_R 2 8
(36) MY17 GPIO57/KBSOUT17 SO VDD
75 RSMRST#_uR R164 0_4 R739 100K_4 SPI_SDO_uR 5 7 C454
GPIO72/IRRX1/SIN2 ICH_RSMRST# (8) SI HOLD
MBCLK 70 73
(38) MBCLK GPIO17/SCL1 GPIO70/IRRX2_IRSL0 SUSC# (8)
MBDATA 69 74 PWROK_EC_uR R157 0_4 SPI_SDI_uR pull-down 100Kohm at B-test SPI_SCK_uR 6 3 .1u/16V_4
(38) MBDATA GPIO22/SDA1 GPIO71/IRTX/SOUT2 PWROK_EC (8) SCK WP
(10) 2ND_MBCLK 2ND_MBCLK 67 SMB IR 113
GPIO73/SCL2 GPIO87/CIRRXM/SIN_CR RF_EN (32)
(10) 2ND_MBDATA 2ND_MBDATA 68 14 CIRR_X2 +3VPCU R200 10K_4 SPI_CS0#_uR 1 4
GPIO74/SDA2 GPIO34/CIRRXL HWPG CE VSS
GPIO16/CIRTX 114
111 BADDR1_EC_R W25X16AVSSIG
TPCLK GPO83/SOUT_CR/BADDR1
(36) TPCLK 72 GPIO37/PSCLK1
TPDATA 71 1/13 Comfirm by vendor mail : At 11/24 add
(36) TPDATA GPIO35/PSDAT1
PCH_ACIN 10 86 SPI_SDI_uR Winbond W25X16AVSSIG AKE38ZP0N01
B (8) PCH_ACIN GPIO26/PSCLK2 F_SDI If the Southbridge enables 'Long Wait Abort' by B
11 PS/2 87 SPI_SDO_uR_R R196 22_4 SPI_SDO_uR MXIC MX25L1605AM2C-15G AKE37FP0Z13
(36) BT_POWERON# GPIO27PSDAT2 F_SDO default, the flash device should be 50MHz (or faster)
12 FIU 90 SPI_CS0#_uR EON EN25F16-100HIP AKE38ZA0Q00
(41,42,43,47) MAINON GPIO25/PSCLK3 F_CS0
(24) VGA_THERM# 13 92 SPI_SCK_uR_R R201 22_4 SPI_SCK_uR AMIC A25L016 AKE38ZN0800
GPIO12/PSDAT3 F_SCK
(8) ICH_SUSCLK R525 *781@0_6 E775_32KX1 77 30 ECDB_CLOCK T30
32KX1/32KCLKIN GPIO55/CLKOUT +3V
VCC_POR 85 VCC_POR# R190 47K/F_4 +3VPCU HWPG
VCORF
AGND
GND1
GND2
GND3
GND4
GND5
GND6
R176 20M_6 E775_32KX2 79 104 VREF_uR R212 0_4 +A3VPCU R139

32KX2 VREF
R179 WPCE775 10K_4

5
18
45
78
89
116
103
VCORF_uR 44
D7 BAS316 HWPG
Y2 33K/F_4 SM BUS ARRANGEMENT TABLE (47) HWPG_1.8V
1 4 D11 BAS316
(42) HWPG_1.05V
L34 SM Bus 1 Battery R131
D8 BAS316
(43) HWPG_VDDR
0_4
C411 32.768KHz C413 BK1608HS220_6_1A C369 SM Bus 2 PCH D10 BAS316
(39) SYS_HWPG
15p_4 15p_4
MPWROK (4)
1u_4 D9 *A@BAS316
(46) HWPG_GFX
E775AGND SM Bus 3 MMB3 and EEPROM
D6 BAS316
(41) HWPG_VTT
E775AGND SM Bus 4 HDMI Controller, MMB1, MMB2 and VGA Thermal
+3V POWER-ON Switch CIR +3VPCU +3V_S5 INTERNAL KEYBOARD STRIP SET
A VR Cap. C916 4.7u/10V_8 +3VPCU
A
SW1
MSK:NTCQ31-AB1G-A160T R719 MY0 R137 10K_4
R204 R219 U57
*10K_4 *10K_4 NBSWON# 1 2 *10K_4 2 VCC
3 4
2
DIGVOL_UP 5
D5 CIRR_X2
DIGVOL_DN Place two near EC *VPORT_6
6 1 OUT Quanta Computer Inc.
2
3 GND
C419 C422 D34
1
4 GND PROJECT : ZY9B

*VPORT_6
.1u/16V_4 .1u/16V_4 Size Document Number Rev
CIR@IRM-V538-TR1 1A
1
WPCE775C_0DG & FLASH

5 4 3 2 1
5 4 3 2 1
change PQ34,PQ39 from BAM44350070 change to BAM66850009 at B-test

VA PD14 PR198
PJ1
DCJK-2DC-G756-X06-5P-H
PL2
HI0805R800R-00_8
SBR1045SP5-13
1
0.01/F_7520 R1 PQ34
AP4435GH
VIN PQ39
AP4435GH
1 VDC 3 1 2 VA2 3 4 3 4 BAT-V
2 2
3
1
1
PC120 PC118 PC121 PC1 PR1 PC122 PC117 PR230
2200p/50V_6 PL3 0.1u/50V_6 0.1u/50V_6 PD15 0.1u/50V_6 220K/F_6 0.1u/50V_6 2200p/50V_6
5
4
HI0805R800R-00_8 P4SMAJ20A 33K_6
2
D PC116 PC119 D
SP@POWER_JACK 0.1u/50V_6 0.1u/50V_6 1 6 PR231
4/20 Rev:B Modify 10K_6
PD1 PR2 2 5
SW1010CPT footprint 220K/F_6
3 4
3
PQ1
IMD2AT108
CSIN_1 2
(37) D/C#
PQ38
CSIP_1 DMN601K-7
1
VIN
PC9
1u/16V_6
PR11 PR12
10/F_6 10/F_6
PR13
PC7 4.7_6 PC14
0.1u/50V_6 1u/16V_6
PC15 PC123
CSIP CSIN 0.1u/50V_6 10u/25V_12
PD2 PC124
33
32
31
30
28
27
26
21
C C
1
+3VPCU PC10 +3VPCU *RB500V-40 2200p/50V_6
5
6
7
8
0.1u/50V_6
NC
GND
GND
GND
GND
CSSP
CSSN
VCC
VDDP
PR14 PC11
2.7_6 0.1u/50V_8 4
PR15 (37) MBDATA 11 25
100K/F_6 VDDSMB BOOT PQ35
AO4468 0.01_3720
(37) MBCLK 9 24 PR204
SDA UGATE PL4
6.8uH /6.5A
3
2
1
10 23 1 2 BAT-V
(37) ACIN SCL PHASE
5
6
7
8
13 20 PR19
ACOK LGATE
PC12 4 2.2/F_6 PC130
PR6 0.1u/50V_6 19 0.01u/50V_6
49.9/F_16 PGND
DCIN 22 DCIN PR18 PQ36 PC16
PR7 10/F_6 AO4710 1000p/50V_6 PC131
82.5K/F_6 18 CSOP CSOP_1 2200p/50V_6
3
2
1
CSOP PC127 PC128
2 ACIN 10u/25V_12 10u/25V_12
PC144 PC13
PR8 3 0.1u/50V_6
VREF
B 2 1 0.1u/50V_6 22K/F_6
CSON 17 CSON BAT-V B
4 PR17 CSOP_1
PC152 ICOMP 10/F_6
NC 16
follow ZK2 footprint at B-test 100p/50V_6 PR16 *0_4_SHORT BAT-V
5 NC
HI0805R800R-00_8 15 PR237 100_4 BAT-V
CN19 PL5 VBF
6 VCOMP
MBAT+ BAT-V 29
1 GND
GND
2
ICM
NC
NC
3 PL6 PU1
8 4 PD3 HI0805R800R-00_8 ISL88731
7
14
12
9 5 RB500V-40
6 PR10
7 TEMP_MBAT 2.21K/F_6
TEMP_MBAT (37)
BATTERY PR63
PC31 PC30 *0_6
47p/50V_6 47p/50V_6 ICMNT (37)
PC3
+3VPCU
0.01u/50V_6
PR79
100K/F_6
2
PR65 PR62
100_4 100_4
PC6 PC5 PC4
1
MBCLK (37) *1u/16V_6 0.01u/50V_6*.01u/50V_6

+3VPCU
A A
MBDATA (37)
1
PC8
PD6 3300p/50V_4
1
3TEMP_MBAT

1
PD5 PD4 PR67 PC35 DA204U

2
*ZD5.6V *ZD5.6V *100K/F_6 *0.01u/50V_6

PROJECT : ZY9B
2

A:(9/7) Add ESD diode base on EC FAE suggestion 1A
CHARGER (ISL88731)
5 4 3 2 1
5 4 3 2 1
39K/F_4
PS4 0_4 2 1 VL
(4,48) SYS_SHDN#
VIN PR186
PS2 PS3
D VIN D
0_4 0_4
4/22 REV_B del JP VL
1
5V_EN
3V_EN
PD12 4/22 REV_B del JP
2
ZD5.6V
PC111
2
4.7U/10V_8
2
PC98 PC97 PC90
0.1u/50V_6 2200p/50V_6 10u/X6S_12 PR187 PR184
PC91 PR196 PC110 PC108 0_4 *0_4 PC105 PC216 PC218
PR185 2
*10u/25V_12 0.1u/50V_6 1u/16V_6 0.1u/50V_6 10u/X6S_12 10u/X6S_12
0.1u/50V_6
100K/F_4
0_4
PC107
PC112
AOL1718 Rds=3~4.3mOhm
1
2
5
6
7
8
PC109 2.2n/50V_4
1u_4
+5VPCU OCP:4A 400K
1
REF 4
L(ripple current) 3V_DH
5
PR181 *0_6
=(19-5)*5/(1.5u*400k*19) PR189 PQ61 8.5A
~6.14A 200K/F_4 AO4468
8
7
6
5
4
3
2
1
4 5V_DH +3VPCU
Iocp=14-(6.14/2)~10.93A PL16
13A
LDOREFIN
LDO
VIN
ONLDO
NC
VCC
TON
REF
3
2
1
2.2uH
3
2
1
Vth=10.93A*4.3mOhm=46.999mV PQ23 +3VPCU
R(Ilim)=(46.999mV*10)/5uA AOL1448 PR177 3V_LX
5
6
7
8
+5VPCU +5VPCU9 32 REFIN2 196K/F_6
=93.9~95.3K PL1 10
BYP REFIN2
31 1 2 PR286
1.5uH OUT1 ILIM2
C 11 FB1 OUT2 30 C
+5VPCU 5V_LX 1 2 12 PU7 29 SKIP 4 *2.2/F_6
95.3K /F_6 DDPWRGD_R 13 ILIM1 ISL6237 SKIP# DDPWRGD_R
PGOOD1 PGOOD2 28
2
PR168 5V_EN 14 27 3V_EN PR170 +

PR173 EN1 EN2 0_6
15 DH1 DH2 26
5
*0_6 PR163 16 25 PC223

+ + LX1 LX2 *1000p/50V_6
37 PAD
*2.2/F_6 36 PQ62
1
3
2
1
PAD
PGND
PVCC
PC102 PC100 PC104 5V_DL AO4710
BST1
BST2
4
GND
PAD
PAD
PAD
DL1
DL2
PC101 PC95 PC94
NC
2
220u/6.3V_105C PC96 PQ15 0.1u/50V_6 0.1u/50V_6

3
2
1
PR174 AOL1718 PR161 1 2
35
34
33
17
18
19
20
21
22
23
24
0_6 *1000p/50V_6 PR162 1/F_6 PR169 *0_4
1/F_6 1 2
1 2 3V_DL 1 2
1
PR172 0_4
10u/X6S_12 0.1u/50V_6 PC227 PC230
PR182 VL PR183 0.1u/50V_6 330u/6.3V_105C
220u/6.3V_105C *0_6 0_6
PC99 SKIP PR191 *0_6 REF PR179
2 0.1u/50V_6 PC93 *0_6
0616change 330uF to 22uF PD10 1u/16V_6
CHN217UPT 3 PR192 0_6
+5VPCU 1 3 +5V_GPU 1
PQ27 +3VPCU
PR176 AO3413
2
PC103 2
+5V 10K_4 0.1u/50V_6 PD11 PR178 0_6 PR167
CHN217UPT 3 *10K/F_6
B B
PC106
1 0.1u/50V_6
PR175
PR195
3
DDPWRGD_R PS1 0_4

SYS_HWPG (37)
10K_4 +15V_ALWP
+15V
dGPU_5V_EN 2
22_8 PC113
3
0.1u/50V_6
PQ28 +5VPCU +3VPCU +3VPCU
ME2N7002E
1
(11) dGPU_PWR_EN# 2
PQ29
ME2N7002E modify it at B-test
5
6
7
8
5
6
7
8
+5VPCU
1
1
2
5
6
VIN +15V
4 MAIND 4 S5D 3 PQ33

(16,43,47) MAIND
AO6402A
VIN +3V_S5 +5V_S5 PR150 PR152
1M/F_6 1M/F_6 PQ24 PQ32
4
5
6
7
8
AO4468 AO4468
+3V_S5
PR160 PR155 PR153
3
2
1
3
2
1
S5_ON_G S5D
1M/F_6 22_8 22_8 4
3A
3
1A PQ18
A S5_DIS_G 2 AO4468 A
(37,48) S5_ON +5V +3V
2
3
8A 5A
3
2
1
PQ14
1
2 PQ13 PR149 DMN601K-7

(37) S5_DIS
2 2 DTC144EUA 1M/F_6
1
PQ19 PQ16 Quanta Computer Inc.

1
PQ21 PR157 DMN601K-7 DMN601K-7 +5V_S5

DTC144EUA 1M/F_6
PROJECT : ZY9B
1
PR165 *0_4 4A Size Document Number Rev

S5_DIS_G 2 S5_ON_G 1A
1 SYSTEM 5V/3V (ISL6237)
5 4 3 2 1
5 4 3 2 1
[PWM]
VR_PWRGD_CK505# (3) VIN
VID 1.2875V
DELAY_VR_PWRGOOD (4,8)
1
+3VPCU PR238 *0_4 H_VID0
1
+
PC166 PC170 PC167 PC159
PR236 *0_4 H_VID1 0.1u/50V_6 10u/X6S_12 10u/X6S_12 100U/25V L-F
2
PQ43
5
AOL1448
PR235 *0_4 H_VID2
4
PR234 *0_4 H_VID3
D D
1
2
3
+VCC_CORE
PR233 *0_4 H_VID4 VIN +3V
+3VPCU
PL10 0.36uH
1 2
PR232 *0_4 H_VID5
PR87 PQ46 PQ51
4
5
5
0_6 AOL1718 AOL1718 PR241
PR228 *0_4 H_VID6 + PC179
PR78 PR225 2.2/F_6
+5V_S5 1.91K/F_4 1.91K/F_4 4 4 330u/2V
PC160
1
2
3
1
2
3
PR86 .22u/25V_6 5/12 Change pr144 from 10K to 1.91K PC171
10_6 1000p/50V_6
PR210 0_8
PR99 PR103
16
17
40
1
PU8 0_4 0_4
VDD
VIN
PGOOD
CLK_EN#
PC157
1U/6.3V_4
41 PAD
+3V
UGATE1 20
PR57 10K/F_4
BOOT1 19 1 2
PR217
*499/F_4 (6) H_PSI# PSI# PR223 10K/F_4 2 PR239 VSUM+ PR56 3.65K/F_4
PSI# 2.2_6 PC162
PR221 147K/F_6 3 .22u/25V_6
RBIAS VSUM- PR219 1/F_4
PHASE1 21
(4) H_PROCHOT# 4 VR_TT#
LGATE1a 23
PR245 PR50 PR212 10K/F_4
Close to Phase 1 Inductor *470K_4 NTC *4.02K/F_4
C VIN C
5 NTC
PC135
*0.01u/16V_4 24
LGATE1b
1
1 2
1
22 +
VSSP1 PC164 PC172 PC169 PC154
11 0.1u/50V_6 10u/X6S_12 10u/X6S_12 *100U/25V L-F modify correct PC154 footprint at B-test
2
H_VID0 ISEN1
(6) H_VID0 31 VID0 contact PC140 2nd pin
1
H_VID1 32 to VSUM- at B-test
(6) H_VID1 VID1 PC140 PQ44
5
H_VID2 33 0.22U/10V_4 AOL1448
(6) H_VID2
2
VID2 VSUM-
H_VID3 34
(6) H_VID3 VID3
4
H_VID4 35 25 PR91 *0_4_SHORT +5V_S5
(6) H_VID4 VID4 VCCP
ISL62882
1
2
3
H_VID5 36 PC165 1U/6.3V_4
(6) H_VID5 VID5 +VCC_CORE
1 2
H_VID6 37
(6) H_VID6 VID6 PC55 1U/6.3V_4 PL9 0.36uH
VR_ON 38 1 2 1 2
(37) VRON VR_ON PQ47 PQ52
5
DPRSLPVR 39 29 AOL1718 AOL1718
(6) H_DPRSLPVR
4
DPRSLPVR UGATE2
2
PR80 30 1 2 PR95
PR82 499/F_4 BOOT2 + PC178
4 4
100K/F_4 PR240 2.2/F_6
2.2_6 PC163 330u/2V
1
1
2
3
1
2
3
8 .22u/25V_6
FB
PHASE2 28
PR97 PR102
PR46 PC138 26
*10K/F_4 22P_4 LGATE2 PC65 0_4 0_4
9 27 1000p/50V_6
FB2 VSSP2
B B
PR60 10
412K/F_4 PC29 ISEN2
2 1
1
contact PC140 2nd pin

150P/50V_4 7 PC139 to VSUM- at B-test
COMP 0.22U/10V_4
2
VSUM-
PC137
10P/50V_4 PR211 6
8.06K/F_4 VW
IMON 18 I_MON (6)
PR54 10K/F_4
1
PR89 PC161
PC136 8.25K/F_4 0.22U/10V_4
1000P/50V_4 VSUM+ PR55 3.65K/F_4
2
5/12 Change pr24 rom 2.87K to 2.8K

ISUM+
ISUM-
VSEN
RTN
VSSSENSE (6)
PR52 VSUM- PR220 1/F_4
5/12 Change pc92 rom 0.33u_4 to 0.22u_6

12
13
14
15
2.8K/F_4 5/12 stuff pc26 0.068u_6 PR213 10K/F_4
PC153 PC43
PR51 PC27 0.22u/10V/X7R_6 0.068u/25V/X7R_6
562/F_4 390P/50V_4 VSUM+
1
+VCC_CORE 1 2 PR229 PR75

PR53 *27.4_4 82.5/F_4 2.61K/F_4
2
PC141
PC151 PR227
PR73 0_4 330P/50V_4 11K/F_4
(6) VCCSENSE
Parallel PC149 PC147 PR243
2700P/50V_4
2
A PR74 0_4 330P/50V_4 .01U/16V_4 10K _6_NTC Panasonic A

(6) VSSSENSE
PC142
PR76 ERT-J1VR103J
1
1 2 1000P/50V_4 0_4
PR218 *27.4_4
VSUM-
5/12 Change pr34 rom 1K to 1.24K
PR64
1.24K/F_4 PC41
.1u_4 Close to Phase 1 Inductor
PC145 PR224 Load Line setting to 2mV/A
*1000P/50V_4 *100/F_4 PROJECT : ZY9B
5/12 un-stuff PC76,PR140 1A
CPU Core ( ISL62882)
5 4 3 2 1
5 4 3 2 1
[PWM]
VIN
+5V_S5
PR100
10_6 PD7
D D
RB500V
5
1
PR96 add PR297 07/22 PC63
1M/F_6 4
PR297 4.7u/6.3V_6
2
2.2_6 PR93 PC158 PC155 PC148
1
2
3
PU4 0_6 PQ41 2.2n/50V_4 0.1u/50V_6 10u/X6S_12
UP6111AQDD AOL1448
PR94 *0_6SHORT PC62
(37,42,43,47) MAINON 15 EN/DEM BOOT 13 0.1u/50V_6 15A
+3V 16 12 UGATE-VTT
PC64 TON UGATE PL8
*0.1u/50V_6 1 11 PHASE-VTT
VOUT PHASE +1.1V_VTT
2 10 PR242 3.24K/F_6 1uH
VDD OC
5
PR101
*10K/F_6 3 9
FB VDDP PC173 *4.7u/6.3V_6 PR92 + PR244
C C
4 8 LGATE-VTT 4 *2.2/F_6
(37) HWPG_VTT PGOOD LGATE PC177 PC180 PC176
6 7 PQ42
R1 *33p/50V_6
1
2
3
GND PGND AOL1718 2C_4C@4.75K/F_6
5 NC TPAD 17
PC49
14 *1000p/50V_6
NC
1
PC68 PC66 PR246

560u/2.5V_105C 10u_8_H0.85 10K/F_6
R2
2
1u/16V_6 *1000p/50V_6
VTT_FB
VOUT=(1+R1/R2)*0.75
5/4
PR157 change to 4.75K
B B
AO1718 Rdson=3~4.3mOhm BOM change notice

Arrandale (1.05V) R1 = 4.02K (CS24023F928) +1.1V_VTT
Clarksfield(1.1V) R1 = 4.75K (CS24753F919)
L(ripple current)
=(19-1.05)*1.05/(1u*272k*19)
~3.64A
PC181
0.1u/50V_6
4.3m*15=RILIM*20uA
RILIM=3.24K(3.22K)
A A

PROJECT : ZY9B
1A
+VTT (UP6111A)
5 4 3 2 1
5 4 3 2 1
[PWM]
VIN
+5V_S5
PR293
5
6
7
8
10_6 PD13
D D
RB500V
1
PR290 add PR298 07/22 PC229
1M/F_6
PR298 4.7u/6.3V_6
2
2.2_6 PR289 PQ63 PC224 PC233 PC225
PU12 0_6 AO4468 2.2n/50V_4 0.1u/50V_6 10u/X6S_12
UP6111AQDD
5A
3
2
1
PR288 *0_6SHORT PC228
15 13 0.1u/50V_6
(37,41,43,47) MAINON EN/DEM BOOT
+3V 16 12 UGATE-1.05V
PC231 TON UGATE PL15
*0.1u/50V_6 1 11 PHASE-1.05V
VOUT PHASE +1.05V
2 10 PR287 4.99K/F_6 2.2uH
VDD OC
5
6
7
8
PR291
*10K/F_6 3 9 PC232 *4.7u/6.3V_6
FB VDDP PR197 +
C C
4 8 LGATE-1.05V 4 2.2/F_6
(37) HWPG_1.05V PGOOD LGATE PC226 PC217 PR294 PC236
6 7
R1 4.02K/F_6 *33p/50V_6
GND PGND
5 NC TPAD 17
PC115
14 PQ64 2200p/50V_6
3
2
1
NC
1
PC235 PC234 AO4710 10u_8_H0.85 PR292

560u/2.5V_105C 10K/F_6
R2
2
1u/16V_6 *1000p/50V_6
1.05V_FB
VOUT=(1+R1/R2)*0.75
B B
AO4710 Rdson=11.8~14.2mOhm +1.05V
OCP=7.2-0.8A
L(ripple current)
=(19-1.05)*1.05/(2.2u*272k*19)
~1.6577A PC213
0.1u/50V_6
14.2m*7=RILIM*20uA
RILIM=4.99K(4.97K)
A A

PROJECT : ZY9B
1A
+1.05V(UP6111AQDD)
5 4 3 2 1
5 4 3 2 1
[PWM]
D D
PC60 10u_8_H0.85
PR83 PC38
0_6 0.1u/50V_6
+0.75V_DDR_VTT
VIN
PC58 PC54
2A 10u_8_H0.85 10u_8_H0.85
5
4
25
24
23
22
21
20
19
PC150 PC146 PC133 PC143
1
2
3
PQ37 0.1u/50V_6 2200p/50V_6 10u/X6S_12 10u/X6S_12
15A
GND
VLDOIN
DRVH
LL
DRVL
VTT
VBST
AOL1448 PL7
0.56uH
1 18 +1.5V_SUS
VTTGND PGND
2 VTTSNS CS_GND 17
PR226 8.87K/F_6
5
3 TPS51116REGR 16
GND PU3 CS PR90
*2.2/F_6
+1.5V_SUS 4 15 4 +
C MODE V5IN +5V_S5 C
PR222 5.1/F_6 PQ40
1
2
3
5 14 AOL1718
+SMDDR_VREF VTTREF V5FILT
1
VDDQSNS
PC34 PC33 PC53

VDDQSET
6 13
0.003A +5V_S5 COMP PGOOD 1U/6.3V_4 1U/6.3V_4 *1000p/50V_6 PC174 PC175 PC47
2
560u/2.5V_105C 10u_8_H0.85 0.1u/50V_6
NC
NC
S3
S5
PC50 PR59 100K/F_6 +3VPCU

0.033u/50V_6
7
10
11
12
FOR DDR III

HWPG_VDDR (37)
PR66 For RT8207 400KHZ

VIN
620K/F_4
S5_1.8V PR77
0/F_6 SUSON (37)
S3_1.8V PR81
*0/F_6 PWRGD_1.5VCPU (16)
PR299
0/F_6 MAINON (37,41,42,47)
PC237 *.1u_4
PC48 PR88
*33P/50V_6 10K/F_4
Vout = (PR150/PR149) X 0.75 + 0.75
B B
AO1412 Rdson=3.8~4.6mOhm
OCP=12.21+0.5A
PR84
10K/F_4
L(ripple current)
=(19-1.5)*1.5/(2.2u*400k*19)
~1.57A +1.5V_SUS
4.6m*19=RILIM*10uA
RILIM=8.74K --- 8.87K
+1.5V_SUS
(10u*PR35)/Rdson+Delta_I/2=Iocp
1
2
5
6
VIN +15V 3 PQ7
(16,39,47) MAIND AO6402A
4
PR4 PQ57
5
1M/F_6 PR3 AOL1448

+1.5V
1M/F_6
4 3A
3
1
2
3
3
PR5 PQ57 change BOM to BAM14480000 and footprint to SO-8FL-5P-OA at 9/16

(47) PG_1.5V_EN 2 1M/F_6 2
A PC2 A
PQ3 *2.2n/50V_4
1
PQ2 DMN601K-7
1
PR9 DTC144EUA
1
*100K_4
+1.5V_GPU
2
10A Quanta Computer Inc.

PROJECT : ZY9B
1A
DDR 1.5V(TPS51116)
5 4 3 2 1
5 4 3 2 1
+3V
PR207 PR206 PR209 PR208 PR215 PR214 change P/N to CC64704MZ01

*10K_6 10K_6 *10K_6 10K_6 10K_6 *10K_6
VIN
GPU_VID5 GPU_VID4 GPU_VID3 GPU_VID2 GPU_VID1 GPU_VID0
1
PC45 + +
PR40 PR39 PR44 PR43 PR48 PR47 2200p/50V_6
2
1
10K_6 *10K_6 10K_6 *10K_6 *10K_6 10K_6
PG_GPUIO_EN (45)
5
D PR85 D
2.2_6 PC52 PC57 PC46 PC156 PC168
10u/25V_1206 10u/25V_1206 0.1u/50V_6 100u/25V_6X7.7
100u/25V_6X7.7
2
6264_UG1 4
Note: VID[5:0]=010110=1V +VGPU_CORE
PC44
1
2
3
VIN +3V_D_ZY9B PQ45 2200p/50V_6
AOL1414
PL12 0.36uH
6264_PH1 1 2
PR42 PR31
4
5
10/F_6 100K PC42 + +
+5V_GPU 1000p/50V_6
PR22 0_6 6264_LG1 4
1
PC26
1
2
3
PR216 0.1u/50V_6 PQ50
2
10/F_6 AOL1412 PC183 PC69
330u/2V_7343 330u/2V_7343
PR105 PR107
18
16
40
0_4 0_4
1
PC134
VCC
VIN
PGOOD
1u/25V_8
2 PR70 3.65K/F_6
VSUM
17 GND UGATE1 30
PR71 10K/F_6
41 GND_T
BOOT1 31 1 2
1
+3VPCU PR69 1/F_6
PR58 PC36
2.2_6 0.22u/25V_8
2
C 29 PR68 10K/F_6 C
PR24 1M/F_4 PHASE1 ISEN2
3 OFS
LGATE1 27
PR27 VIN
*0_4 PR25 147K/F_4 2 28
RBIAS PGND1
1
20 ISEN1 PC61
6264_SET ISEN1 2200p/50V_6
1
2
SET
1
+5V_GPU
+3V PR29 10K_4 PC32
5
PR34 *0_4 PSI_L 39 PC40 4.7u/25V_8 0.22u/25V_6 PR98
(18) PWR_PSI#
2
PR26 PSIL 2.2_6 PC56 PC51 PC59
PVCC 26 1 2
0_4 10u/25V_1206 10u/25V_1206 0.1u/50V_6
2
PR30 VSOFT 4 6264_UG2 4
SOFT
1
*0_4
PC125 PC67 +VGPU_CORE
1
2
3
47n/16V_6 PU2 22 PQ48 2200p/50V_6 20A
2
ISL6264 UGATE2 AOL1414

PL11 0.36uH
GPU_VID0 32 21 1 2 6264_PH2 1 2
VID0 BOOT2
1
GPU_VID1 33 PR72 PC39 PC37
(18) GPU_VID1
4
VID1
5
2.2_6 0.22u/25V_8 1000p/50V_6 + +
2
GPU_VID2 34 23
(18) GPU_VID2 VID2 PHASE2
GPU_VID3 35 25 6264_LG2 4
(18) GPU_VID3 VID3 LGATE2
GPU_VID4 36 24 PQ49
1
2
3
VID4 PGND2 AOL1412
GPU_VID5 37 19 ISEN2
VID5 ISEN2 PC70 PC182
1
PR104 PR106 330u/2V_7343 330u/2V_7343
PR35 *0_4 PC28 0_4 0_4
GPU_VRON 38 0.22u/25V_6
(11,22) dGPU_VRON
2
VR_ON
PR37 0_4 PR36 PC23 1000p/50V_4 Iocset*Roc=Iocp*Rdroop
B +3V_D_ZY9B 100K/F_6 2 1 B
R23=Roc=30A*1m Ohms/10uA ~ 3K
PR23 5.6K_4 Where :
5
PR28 9
OCSET Rdroop is AMD spec : -1 m Ohms
VDIFF
1K/F_4 0616change 10.7k to 3k Iocp is desire over current
1 2 15 VSUM
VSUM Iocset is recommendation 10uA from Rbias
PR20 PC19
255/F_4 1000p/50V_4
PR38
2.61K/F_4
1
8 PR41 3.65K/F_6
FB PR205 VSUM
PC132 PC129 11K/F_4
2
2 1 PR45 10K/F_6
0.22u/10V_6 47n/16V_6
PR21 PC20 7 PR108
97.6K/F_4 470p/50V_4 COMP 10K _6 NTC
2 1 PR49 1/F_6
VO 14
PC22 Panasonic
DROOP
220P/50V_4 6 PR61 10K/F_6

VW ERT-J1VR103J
VSEN
ISEN1
RTN
DFB
PR199
1
6.81K/F_4
1 2 PR32 PC25 Close to Phase 1 Inductor
11
10
12
13
1K/F_4 0.22u/10V_6
2
PC126 PR33
1000p/50V_4 PC21 2 1 1.15K/F_4 0616change 3.65kk to 1.15k
68n/10V_4
2 1 ISL6264_VO
PC24
1
180p/50V_4
A PC17 PC18 A
1000p/50V_4 1000p/50V_4
2
Parallel
PR203 0_4
VGPU_CORE_SENSE (22)
PR202 0_4 VSS_GPU_SENSE (22)
PR200
10/F_6
PR201
10/F_6
0616 mount PROJECT : ZY9B
1A
GPU CORE(ISL6264)
5 4 3 2 1
5 4 3 2 1
[PWM] PC86 +5V_GPU

10u_8_H0.85 PR125 0_6
2
VIN
PR122
2.2_6
D D
1
20
1
5
6
7
8
PC80
PC79 0.1u/50V_6
LGATE
PVCC2
10u_8_H0.85
PR137 4
0_6 2 19
PGND VCC
82872_AGND PC73 PC74 PC76 PC75
82872_AGND 3 GND BOOT 18 1 2 2.2n/50V_4 0.1u/50V_6 10u/X6S_12 10u/X6S_12 4.5A
PR131 0_4 PR116 2.2_6 PC81 .22u/25V_6 +VGPU_IO
3
2
1
4 17 PQ54
(44) PG_GPUIO_EN EN UGATE AO4468
PL13
C IO_VID1_R 5 PU5 16 C
VID1 ISL62872 PHASE
PR132 *0_4 2.2uH
IO_VID0_R 6 15
(18) IO_VID0 VID0 NC
5
6
7
8
1
7 SREF OCSET 14
PR247 +
4 *2.2_6
2
8 13 PR117 PR115
2
SET0 VO
1
PR130 0_4 0_4

PC87 15.8K/F_6
47n/16V_6 9 12 PC187
2
SET1 FB
PGOOD
*2200p/50V_6
1
PQ53
SET2
3
2
1
AO4710 PC186 PC185 PC184
2
560u/2.5V_105C 10u_8_H0.85 0.1u/50V_6

PR136
10
11
82872_AGND 26.7K/F_6
PC85 PR121
B B
2700P/50V_4 100/F_6
1
2 1 PR114
5K_6
2
2 1
PR128 PG_1V_EN
11.5K/F_6 PC83
.1u/25V_4 change to 0.1u at B-test
1
2 1 2 1 2 1
+3VPCU
PR124 PR118 PR120 PR119
249K/F_6 30.9K/F_6 20K/F_6 5K_6
82872_AGND 2 1
PR134 PR133 0616 change 3.09k to 30.9k 0616 change 2.49k to 24.9k
*10K/F_4 *10K/F_4
+3V_D_ZY9B
IO_VID0_R IO_VID1_R
A 0616 change PR114 6.98k to 4k; PC83 68p to 15n; PR119 6.98k to 4k A
PR135
10K/F_4
PR138 PR127
10K/F_6
stuff PR127 at B-test Quanta Computer Inc.
10K/F_4
PROJECT : ZY9B
PG_1V_EN Size Document Number Rev
(47) PG_1V_EN
1A
+VGPU_IO(ISL62872)
5 4 3 2 1
A B C D E F G H
Int_VGA [PWM]
(6) GFX_VID0
(6) GFX_VID1 +1.1V_VTT +1.1V_VTT

(6) GFX_VID2
(6) GFX_VID3
1 PR258 PR257 PR256 PR255 PR254 PR263 PR266 1

(6) GFX_VID4
*IV@0_6 *IV@0_6 *IV@0_6 *IV@0_6 *IV@0_6 *IV@0_6 *IV@0_6
(6) GFX_VID5
(6) GFX_VID6
GFX_VID6 GFX_VID5 GFX_VID4 GFX_VID3 GFX_VID2 GFX_VID1 GFX_VID0
PC196
*IV@0.01U/25V_4
62881_GND 2 1
PR259 *IV@0_4
(6) GFX_ON
PR260 *IV@0_4
(6) GFX_DPRSLPVR
PR158 short VIN
62881_GND
62881DPRSLPVR
62881_GND
62881VR_ON
1
GFX_VID6
GFX_VID5
GFX_VID4
GFX_VID3
GFX_VID2
PC221 PC220 PC219
*IV@10U/25V_1206*IV@10U/25V_1206 PC222
2
+3V *IV@0.1U/50V_6 *IV@2.2n/50V_4
30
31
29
28
27
26
25
24
23
22
5
PR262
GFX_VID1
GFX_VID0
GND
GND
GND
DPRSLPVR
VR_ON
VID6
VID5
VID4
VID3
VID2
*IV@1.91K/F_4
1 CLK_EN#
2 4 2
PR261 *IV@0_4 62881PGOOD 2 21 +5V_S5
(37) HWPG_GFX PGOOD VID1
1
2
3
PQ60
PR264 *IV@47K/F_4 62881RBIAS 3 20 *IV@AOL1448
62881_GND RBIAS VID0
PR265
*IV@150K/F_4 PC202 0616 change to 0.56uH
PR268 *IV@8.06K/F_4 62881VW 4 19 1 2
62881_GND VW VCCP
PU11
PC199 *IV@4.7U/6.3V/X5R_6
18 62881LGATE
22A
62881COMP 5
*IV@ISL62881HRZ-T LGATE +VGFX_AXG
*IV@1000P/50V/X7R_4 PL14
COMP *IV@0.56uH
PR267 PC203 0616 change to 22pF 17
*IV@825K/F_4 *IV@22P/50V_4 VSSP
62881FB 6 FB
PHASE 16 62881PHASE
PC204 0616 change to 8.87k
*IV@100P/50V/X7R_4 PR272
5
*IV@8.87K/F_4
UGATE 15 62881UGATE
62881VSEN 7 PR164 PR285 + +
VSEN *IV@2.2/F_4 *IV@3.65K/F_4
ISUM+
ISUM-
BOOT
IMON
4 4
VDD
RTN
VIN
PR273 PC206
PR283 PR269
1
2
3
1
2
3
PQ59 PQ58 *IV@2.61K/F_4 *IV@10K/NTC_6
8
62881ISUM+ 10
62881VDD 11
12
13
14
*IV@17.8K/F_4 *IV@150P/50V/X7R_4 PC201 PR274 PC205 *IV@AOL1718 *IV@AOL1718 PC92
PC200 *IV@330P/50V_4 62881BOOT 1 2
62881ISUM-
62881VIN
0616 change to 150pF *IV@330P/50V_4 *IV@1_6 *IV@2.2n/50V_4 PC197 PC194 PC195

62881RTN *IV@0.22U/25V_6 PR284 *IV@560u/2.5V_105C *IV@560u/2.5V_105C *IV@10U/6.3V_8
GFX_IMON
GFX_IMON (6)
PC198 *IV@11K/F_4
2
62881_GND PR278
*IV@1000P/50V/X7R_4 *IV@10K/F_4 PC210
*IV@0.22U/10V_4
1
PC214 PC207
3 *IV@0.15U/10V/X5R_4 *IV@0.1U/10V_4 3
VSS_AXG_SENSE (6)
62881_GND
*IV@0_4 PR277 VIN
PC215 62881_GND
PC209 *IV@0.1U/10V_4
*IV@0.22U/25V_6
62881_GND
+5V_S5 0616 change to 2.49k
PR282 PC212
*IV@180P/50V/NPO_4
PR280
PC208 *IV@10_6 *IV@2.49K/F_4
*IV@1U/6.3V_4
PR281
*IV@100/F_4
62881_GND
PR279 PC211
2 1 0616 un-mount
*IV@82.5/F_4 *IV@0.01U/25V_4
Parallel
PR275 *IV@10/F_4
PR270 *IV@0_4
VSS_AXG_SENSE (6)
4 4
PR276 *IV@10/F_4
PR271 *IV@0_4
VCC_AXG_SENSE (6)

PROJECT : ZY9B
1A
1.Level 1 Environment-related Substances Should NEVER be Used. +VGFX_AXG (ISL62881)
2.Purchase ink, paint, wire rods, and Molding resins only from the business Partners that Sony approves as Green Partners. Date: Tuesday, September 22, 2009 Sheet 46 of 49
A B C D E F G H
5 4 3 2 1
[PWM]
+1.8V
VIN +15V
PR112
1M/F_6 PR111 +3V_S5
1
2
5
6
1M/F_6
3 PQ4 8/31 change to AO1414
2
D AO6402A PC84 +3V_S5 D
3
+1.5V_GPU PR109 0_4 0.1u/25V_6
PQ56
3
PC82
1
PR113 +1.8V AOL1414 10u/10V_8
+3V_D_ZY9B PR110 *0_4 2 PQ5 1M/F_6 2 +1.8V_GPU
PDTC143TT PC71
3A 3 PR253
PQ6 *2.2n/50V_4 100K_4
PC72 DMN601K-7 3A 2
1
5 PU10
1
G9334 ADJ
1
1u/10V_4 5 4
DRV PGD HWPG_1.8V (37)
PR126
4
1
260/F_4 Rg
PC192 1 MAINON
22u/10V_1206 EN
3
2
FB +5VPCU
GND
VCC 6
PR252
2
VIN +15V PR129 140_6
100/F_4
Rh PC193
PC190 0.1u/25V_6
1
PR194 33n/50V_6
1M/F_6 PR193
1M/F_6 Vout1 = (1+Rg/Rh)*0.5
MAINON_G MAIND
MAIND (16,39,43)
3
3
PR188
MAINON 2 1M/F_6 2
C (37,41,42,43) MAINON PC114 C
PQ30 *2.2n/50V_4
1
PQ31 DMN601K-7
1
PR190 DTC144EUA
1
*100K_4
+1.5V
2
8/31 change to AO1414

PR180 *0_4
2
MAINON_DIS_G 2 1 MAINON_G PC78
0.1u/25V_6 +3V_S5
PQ55 PC77
1
+1V AOL1414 10u/10V_8
PR248
3A 3
2 5 100K_4
PU9
1
G9334 ADJ
5 DRV PGD 4 PG_1.5V_EN (43)
4
1
PR250 Rg
PC191 100/F_4 1
22u/10V_1206 EN PG_1V_EN (45)
3
2
FB +5VPCU
GND
VCC 6
PR251
2
PR249 Rh 140_6
100/F_4 PC188
PC189 0.1u/25V_6
1
B 33n/50V_6 B
VIN +3V +5V +1.5V +1.05V +1.1V_VTT Vout1 = (1+Rg/Rh)*0.5

add it for S3 leakage circuit
PR147 PR154 PR171 PR159 PR166 PR156
(16) MAINON_DIS_G 1M/F_6 22_8 22_8 22_8 22_8 22_8
MAINON_DIS_G
3
3
3
PR148
2 1M/F_6 2 2 2 2 2
(37) MAINON_DIS
PQ17 PQ26 PQ22 PQ25 PQ20
1
PQ12 DMN601K-7 DMN601K-7 DMN601K-7 DMN601K-7 DMN601K-7

1
PR151 DTC144EUA
1
*100K_4
2
A A

PROJECT : ZY9B
1A
Discharge/1V/1.8V)
5 4 3 2 1
1 2 3 4 5
VIN
A A
PD9
SW1010CPT
PR145
1M_16
1
S5_ON PQ8
(37,39) S5_ON
AO3409
TH_ON 2
3
thermal protection
3
S5_ON 2
PQ11
1
VL VL DTC144EUA
B B
SYS_SHDN# (4,39)
PR142 PR143
? 1K_4 200K/F_4 PR141
200K/_6
PC88
0.1u/50V_6
3
8
PR146
10K _6_NTC 2.469V 3 +
1 2
2 - PQ9
PU6A DMN601K-7
4
LM393 PC89
1
0.1u/50V_6
PR144
C 200K/F_4 C
+3VPCU
3
VL
S5_ON 2
PR123
PQ10 100K/F_6
DMN601K-7
PR140
1
10K/F_6
PD8
5 +
7 NC_TEMP T32
4.95V 6 -
PU6B RB500V-40
LM393
For EC control thermal protection (output 3.3V)
PR139
1M/F_6
D D

PROJECT : ZY9B
1A
Thermal Protection
1 2 3 4 5
5 4 3 2 1
MODEL
ZY9B
Model REV CHANGE LIST FROM To
X 1A
1A FIRST RELEASED: E20080?-???? (PCB: DA0ZY9MB8A0) X 1A
ZY9B MB Page4 :
1A 2A
1A 2A
1A 2A
1A 2A
1A 2A
1A 2A
D
1A 2A D
1A 2A
1A 2A
1A 2A
1A 2A
1A 2A
2A 1A 2A
1A 2A
1A 2A
1A 2A
1A 2A
1A 2A
1A 2A
1A 2A
1A 2A
1A 2A
1A 2A
1A 2A
1A 2A
2A 3A
2A 3A
2A 3A
2A 3A
2A 3A
2A 3A
C
2A 3A C
2A 3A
2A 3A
2A 3A
2A 3A
2A 3A
2A 3A
2A 3A
3A 2A 3A
2A 3A
2A 3A
2A 3A
2A 3A
2A 3A
2A 3A
2A 3A
2A 3A
2A 3A
2A 3A
2A 3A
2A 3A
2A 3A
2A 3A
2A 3A
2A 3A
B
2A 3A B
3A 3B
3A 3B
3A 3B
3A 3B
3A 3B
3A 3B
3A 3B
3A 3B
3A 3B
3A 3B
3A 3B
3A 3B
3A 3B
3A 3B
3A 3B
3A 3B
3A 3B
3A 3B
3A 3B
3A 3B
3A 3B
3A 3B
3A 3B
3A 3B
A
3A 3B A
3A 3B
3A 3B
3A 3B
3A 3B
3C

PROJECT : ZY9B DOC NO. PROJECT MODEL : ZY9B APPROVED BY: DATE: 2009/05/??
1A
Change list PART NUMBER: DRAWING BY: REVISON: 1A
Date: Thursday, June 04, 2009 Sheet 49 of 49
5 4 3 2 1

ZY9B Hannstar J MV 4 Hannstar-E89382

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ZY9B Hannstar J MV 4 Hannstar-E89382

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ZY9B Hannstar J MV 4 Hannstar-E89382

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5 4 3 2 1

ZY9B SYSTEM BLOCK DIAGRAM GPU CORE PWR

GPU IO PWR 3/5V SYS PWR

D DISCHARGER CPU CORE PWR D

CPU VGFX_AXG VTT 1.05V

DDR SYSTEM MEMORY

GPU PWR CTRL Option 1 (Default/ VDDR3 before VDDC)

GPU PWR CTRL Option 2 (VDDR3 after VDDR1)

Thermal Follow Chart

+VCCRTC +3V~+3.3V RTC POWER ALWAYS ALWAYS NTC

+15V +15V CHARGE PUMP POWER ALWAYS ALWAYS

+3V_S5 +3.3V LAN/BT/CIR POWER S5_ON S0-S5 CPU 3V/5 V

+5V +5V HDD/ODD/Codec/TP/CRT/HDMI POWER MAINON S0

+3V +3.3V PCH/GPU/Peripheral component POWER MAINON S0

+VGFX_AXG variation Internal GPU POWER GFX_ON S0

+1.5V +1.5V MINI CARD/NEW CARD POWER MAINON S0

+1.05V +1.05V PCH CORE POWER MAINON S0

+VCC_CORE variation CPU CORE POWER VRON S0

LCDVCC +3.3V LCD POWER LVDS_VDDEN S0

+5V_GPU +5V SWITCHABLE PWM IC POWER dGPU_PWR_EN# Discrete enable

+GPU_CORE +0.9V~+1.1V GPU CORE POWER +3V_D Discrete enable

+GPU_IO +0.9V~+1.1V GPU I/O POWER PG_GPUIO_EN Discrete enable

+1.5V_GPU +1.5V VRAM CORE POWER PG_1.5V_EN Discrete enable

+1.8V_GPU +1.8V GPU_CRE/LVDS/PLL POWER +1.5V_GPU Discrete enable

+1V +1V DP/PEG POWER PG_1V_EN Discrete enable

Quanta Computer Inc.

CPU_SEL CPU0/1=133MHz CPU0/1=100MHz Q19

AUBURNDALE/CLARKSFIELD PROCESSOR (DMI,PEG,FDI) AUBURNDALE/CLARKSFIELD PROCESSOR (CLK,MISC,JTAG)

Processor Compensation Signals

JTAG & BPM

Processor pull-up JTAG MAPPING

XDP_TMS R146 *51_4 *0_4

.1u/16V_4 4/9 REV:B MODIFY BY DG1.52

R245 (Default) NO STUFF -> R489, R490

AUBURNDALE/CLARKSFIELD PROCESSOR (DDR3) U45D

(15) M_B_DQ[63:0] SB_CK[0] W8 M_B_CLK0 (15)

DDR SYSTEM MEMORY - B

M_A_DQ35 SA_DQ[34] SA_DQS#[0] M_A_DQS#1 M_B_DQ40 SB_DQ[39] SB_DQS#[5] M_B_DQS#6

Channel A DQ[15,32,48,54], DM[5] Channel B DQ[16,18,36,42,56,57,60,61,62]

Quanta Computer Inc.

CPU Core Power U45F

VTT Rail Values are AUBURNDALE/CLARKSFIELD PROCESSOR (GRAPHICS POWER)

1.1V RAIL POWER

CPU CORE SUPPLY

PEG & DMI

VCC62 VTT1_52 VTT1_68

R28 VCC88 VCC_SENSE AJ34 VCCSENSE (40)

R526 R523 R528 R530 R532 R536 R534 R538 R540

AUBURNDALE/CLARKSFIELD PROCESSOR (GND) AUBURNDALE/CLARKSFIELD PROCESSOR( RESERVED, CFG)

AT20 VSS1 VSS81 AE34 RSVD32 AJ13

AL20 VSS40 VSS120 W6 E21 VSS198 AJ29 CFG[15] RSVD_TP_59 E15

Processor Strapping +1.1V_VTT

CFG0 CFG[ 1:0 ] - PCI_Epress Configuration Select CFG7 R543 *3.01K/F_4

(PCI-Epress * 11= 1 x 16 PEG

IBEX PEAK-M (DMI,FDI,GPIO)

Digital Display Interface

(37) ICH_RSMRST# C16 RSMRST# SLP_S4# H7 SUSC# (37) DDPD_AUXN BC46

PM_RI# F14 F6 PM_SLP_LAN# TP38

XDP_TMS R146 51_4 0_4

2 RST_GATE#_R 2 1K/F_4 RST_GATE#_R 2 1K/F_4

750/F_4 A03402 *A03402