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  • Daily Lab Report (Erc)

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    Syed Ali Syed Ali
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    The daily lab report from the Circuit Analysis Lab dated May 31, 2019 shows that Ibrahim Syed was the lab engineer from 8:00 AM to 10:05 AM for the first half of the time slot. No other lab engineers or faculty members were listed as being present during the other time slots that day.

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    31-05-2019 Friday.xlsx

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    The daily lab report from the Circuit Analysis Lab dated May 31, 2019 shows that Ibrahim Syed was the lab engineer from 8:00 AM to 10:05 AM for the first half of the time slot. No other lab engineers or faculty members were listed as being present during the other time slots that day.

    Copyright:

    © All Rights Reserved
    Download as XLSX, PDF, TXT or read online from Scribd
    Flag for inappropriate content
    Download as xlsx, pdf, or txt
    4 views4 pages

    Daily Lab Report (Erc)

    Uploaded by

    Syed Ali Syed Ali
    The daily lab report from the Circuit Analysis Lab dated May 31, 2019 shows that Ibrahim Syed was the lab engineer from 8:00 AM to 10:05 AM for the first half of the time slot. No other lab engineers or faculty members were listed as being present during the other time slots that day.

    Copyright:

    © All Rights Reserved
    Download as XLSX, PDF, TXT or read online from Scribd
    Flag for inappropriate content
    Download as xlsx, pdf, or txt
    of 4

    DAILY LAB REPORT (ERC)

    Friday Dated: 31-05-2019


    Lab Name Circuit Analysis Lab
    Time Slot Lab. Engineer Faculty
    Ibrahim Syed (MS Student) Rabia Sajjad
    Time Time
    8:00AM-10:05AM Lab 1st half Lab 2nd half Lab 1st half Lab 2nd half
    IN OUT IN OUT IN OUT IN
    8:00 - - 10:05 8:00 - -

    Time Slot Lab. Engineer Faculty


    - -
    Time Time
    10:10AM- 11:10AM Lab 1st half Lab 2nd half Lab 1st half Lab 2nd half
    IN OUT IN OUT IN OUT IN
    - - - - - - -

    Time Slot Lab. Engineer Faculty


    - -
    Time Time
    11:15PM - 02:15PM Lab 1st half Lab 2nd half Lab 1st half Lab 2nd half
    IN OUT IN OUT IN OUT IN
    - - - - - - -

    Time Slot Lab. Engineer Faculty


    - -
    Time Time
    02:20PM - 04:05PM Lab 1st half Lab 2nd half Lab 1st half Lab 2nd half
    IN OUT IN OUT IN OUT IN
    - - - - - - -
    ed: 31-05-2019

    ulty
    Sajjad
    me
    Lab 2nd half
    OUT
    9:45

    ulty
    -
    me
    Lab 2nd half
    OUT
    -

    ulty
    -
    me
    Lab 2nd half
    OUT
    -

    ulty
    -
    me
    Lab 2nd half
    OUT
    -

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