Design Recipes for FPGAs: Book review

Jack Ganssle - May 11, 2016

Peter Wilson’s brand new book Design Recipes for FPGAs is an interesting addition to the writing
about FPGAs. At 369 pages it might seem to be the One Real Reference, but in fact it’s more a surf
through design examples.

The examples are given in both VHDL and Verilog, the two most common Hardware Description
Languages (HDLs) used in this industry. The book starts with a chapter about the basics of each;
VHDL is treated in 16 pages; Verilog in 6. Those amount to about the fastest getting-started guides
for any language I’ve seen. And the material is pretty good. It’s far from complete, of course, but will
give the novice a grounding in the basics.

But one warning: HDLs look a lot like a programming language. The last thing you want to think of
when working with an HDL is programming. In C and other computer languages statements execute
one after another. There’s a flow. That’s mostly absent with an HDL. It’s hardware; everything is
happening at the same time (with exceptions). In fact, in general (again, there are exceptions) it
doesn’t matter what order you write the HDL “instructions” in. At the latest ESC Charles Fulks gave
some talks about FPGA work; we had a beer the night before and he said he prefers VHDL over
Verilog because it looks less C-like than the latter, making it less likely the unwary will fall into the
sequential-execution trap. Design Recipes for FPGAs doesn’t talk about this, probably since it’s
aimed at people building hardware. Be warned; HDLs are very different from programming
languages.

FPGA design has a number of steps – the testbench, compilation, synthesis, routing, etc. and Mr.
Wilson does take the reader through the design flow. But this is at a very high level. You’ll need
additional information to actually create a working FPGA. I recommend both Xilinx’s and Altera’s
web sites as references. Xilinx’s Vivado has a free version with limited, but enough for learning,
functionality.

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