PD - 91349C

IRL530NS/L
HEXFET® Power MOSFET
l Advanced Process Technology D
l Surface Mount (IRL530NS) VDSS =100V
l Low-profile through-hole (IRL530NL)
l 175°C Operating Temperature RDS(on) = 0.10Ω
l Fast Switching G11
l Fully Avalanche Rated ID = 17A
S
Description
Fifth Generation HEXFETs from International Rectifier
utilize advanced processing techniques to achieve
extremely low on-resistance per silicon area. This
benefit, combined with the fast switching speed and
ruggedized device design that HEXFET Power MOSFETs
are well known for, provides the designer with an extremely
efficient and reliable device for use in a wide variety of
applications.
The D2Pak is a surface mount power package capable of
accommodating die sizes up to HEX-4. It provides the
highest power capability and the lowest possible on-
D 2 P ak T O -26 2
resistance in any existing surface mount package. The
D2Pak is suitable for high current applications because of
its low internal connection resistance and can dissipate
up to 2.0W in a typical surface mount application.
The through-hole version (IRL530NL) is available for low-
profile applications.
Absolute Maximum Ratings
Parameter Max. Units
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V… 17
ID @ TC = 100°C Continuous Drain Current, VGS @ 10V… 12 A
IDM Pulsed Drain Current … 60
PD @TA = 25°C Power Dissipation 3.8 W
PD @TC = 25°C Power Dissipation 79 W
Linear Derating Factor 0.53 W/°C
VGS Gate-to-Source Voltage ± 20 V
EAS Single Pulse Avalanche Energy‚… 150 mJ
IAR Avalanche Current 9.0 A
EAR Repetitive Avalanche Energy 7.9 mJ
dv/dt Peak Diode Recovery dv/dt ƒ… 5.0 V/ns
TJ Operating Junction and -55 to + 175
TSTG Storage Temperature Range °C
Soldering Temperature, for 10 seconds 300 (1.6mm from case )
Thermal Resistance
Parameter Typ. Max. Units
RθJC Junction-to-Case ––– 1.9
°C/W
RθJA Junction-to-Ambient ( PCB Mounted,steady-state)** ––– 40

1/09/04
IRL530NS/L
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter Min. Typ.Max. Units Conditions
V(BR)DSS Drain-to-Source Breakdown Voltage 100 ––– ––– V VGS = 0V, ID = 250µA
∆V(BR)DSS/∆TJ Breakdown Voltage Temp. Coefficient ––– 0.122––– V/°C Reference to 25°C, ID = 1mA…
––– –––0.100 VGS = 10V, ID = 9.0A „
RDS(on) Static Drain-to-Source On-Resistance ––– –––0.120 Ω VGS = 5.0V, ID = 9.0A „
––– –––0.150 VGS = 4.0V, ID = 8.0A „
VGS(th) Gate Threshold Voltage 1.0 ––– 2.0 V VDS = VGS, ID = 250µA
gfs Forward Transconductance 7.7 ––– ––– S VDS = 50V, ID = 9.0A…
––– ––– 25 VDS = 100V, VGS = 0V
IDSS Drain-to-Source Leakage Current A
––– ––– 250 VDS = 80V, VGS = 0V, TJ = 150°C
Gate-to-Source Forward Leakage ––– ––– 100 VGS = 16V
IGSS nA
Gate-to-Source Reverse Leakage ––– –––-100 VGS = -16V
Qg Total Gate Charge ––– ––– 34 ID = 9.0A
Qgs Gate-to-Source Charge ––– ––– 4.8 nC VDS = 80V
Qgd Gate-to-Drain ("Miller") Charge ––– ––– 20 VGS = 5.0V, See Fig. 6 and 13 „…
td(on) Turn-On Delay Time ––– 7.2 ––– VDD = 50V
tr Rise Time ––– 53 ––– ns ID = 9.0A
td(off) Turn-Off Delay Time ––– 30 ––– RG = 6.0Ω, VGS = 5.0V
tf Fall Time ––– 26 ––– RD = 5.5Ω, See Fig. 10 „…
Between lead,
LS Internal Source Inductance ––– 7.5 –––
nH and center of die contact
Ciss Input Capacitance ––– 800 ––– VGS = 0V
Coss Output Capacitance ––– 160 ––– pF VDS = 25V
Crss Reverse Transfer Capacitance ––– 90 ––– ƒ = 1.0MHz, See Fig. 5…

Source-Drain Ratings and Characteristics

Parameter Min. Typ. Max. Units Conditions
D
IS Continuous Source Current MOSFET symbol
––– ––– 17
(Body Diode) showing the
A
ISM Pulsed Source Current integral reverse G

––– ––– 60
(Body Diode) … p-n junction diode. S

VSD Diode Forward Voltage ––– ––– 1.3 V TJ = 25°C, IS = 9.0A, VGS = 0V „
trr Reverse Recovery Time ––– 140 210 ns TJ = 25°C, IF = 9.0A
Qrr Reverse Recovery Charge ––– 740 1100 nC di/dt = 100A/µs „…
ton Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
 Repetitive rating; pulse width limited by „ Pulse width ≤ 300µs; duty cycle ≤ 2%.
max. junction temperature. ( See fig. 11 )
‚ Starting TJ = 25°C, L = 3.7mH … Uses IRL530N data and test conditions
RG = 25Ω, IAS = 9.0A. (See Figure 12)
ƒ ISD ≤ 9.0A, di/dt ≤ 540A/µs, VDD ≤ V(BR)DSS,
TJ ≤ 175°C
** When mounted on 1" square PCB ( FR-4 or G-10 Material ).
For recommended soldering techniques refer to application note #AN-994.
 IRL530NS/L

100 VGS
100 VGS
TOP 15V TOP 15V
12V 12V
10V 10V
8.0V 8.0V
ID , Drain-to-Source Current (A )

ID , Drain-to-Source Current (A )
6.0V 6.0V
4.0V 4.0V
3.0V 3.0V
BOTTOM 2.5V BOTTOM 2.5V
10 10

2.5 V
1 1

2 .5V

2 0µ s P U LS E W ID TH 2 0µ s P U LS E W ID TH
T J = 2 5°C T J = 1 75 °C
0.1 A 0.1 A
0.1 1 10 100 0.1 1 10 100
V D S , D rain-to-S ource V oltage (V ) V D S , D rain-to-S ource V oltage (V )

Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics

100 3.0
I D = 15 A
R D S (on) , D ra in-to -S o urc e O n R e s is ta nc e

T J = 2 5 °C
I D , D ra in -to-S ourc e C urrent (A)

2.5

T J = 1 7 5°C

10 2.0
(N o rm alize d)

1.5

1 1.0

0.5

V DS = 5 0V
2 0µ s P U L S E W ID TH V G S = 1 0V
0.1 0.0 A
A -60 -40 -20 0 20 40 60 80 100 120 140 160 180
2 3 4 5 6 7 8 9 10

V G S , G ate-to -So urce Voltag e (V) T J , J unc tion T em perature (°C )

Fig 3. Typical Transfer Characteristics Fig 4. Normalized On-Resistance

Vs. Temperature
IRL530NS/L

1400 15
V GS = 0V , f = 1MHz I D = 9.0 A
C iss = C g s + C g d , C d s S H O R TE D V D S = 8 0V

V G S , G ate-to-S ource V oltage (V )

1200 C rs s = C gd V D S = 5 0V
C o ss = C ds + C g d 12 V D S = 2 0V
C iss
C , Capacitance (pF)

1000

9
800

600
6
C oss
400
C rss 3
200
FO R TE S T C IR C U IT
S E E FIG U R E 1 3
0 A 0 A
1 10 100 0 10 20 30 40 50
V D S , D rain-to-S ourc e V oltage (V ) Q G , T otal G ate C harge (nC )

Fig 5. Typical Capacitance Vs. Fig 6. Typical Gate Charge Vs.

Drain-to-Source Voltage Gate-to-Source Voltage

100 1000
O P E R A T IO N IN T H IS A R E A LIM IT E D
B Y R D S (o n )
I S D , R everse Drain C urrent (A )

I D , D rain Current (A )

T J = 17 5°C
100

10µ s
10
T J = 2 5°C

10 10 0µs

T C = 25 °C 1m s
T J = 17 5°C
V G S = 0V S ing le P u lse 10m s
1 A 1 A
0.4 0.6 0.8 1.0 1.2 1.4 1 10 100 1000
V S D , S ourc e-to-D rain V oltage (V ) V D S , D rain-to-S ource V oltage (V )

Fig 7. Typical Source-Drain Diode Fig 8. Maximum Safe Operating Area

Forward Voltage
 IRL530NS/L

20 RD
VDS

VGS
D.U.T.
15 RG
I D , Drain Current (A)

+
- VDD

5.0V
10 Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %

Fig 10a. Switching Time Test Circuit

5

VDS
90%
0
25 50 75 100 125 150 175
TC , Case Temperature ( ° C)
10%
VGS
Fig 9. Maximum Drain Current Vs. td(on) tr t d(off) tf
Case Temperature
Fig 10b. Switching Time Waveforms

10
Thermal Response (Z thJC )

1 D = 0.50

0.20

0.10
0.05 P DM
0.1 0.02 SINGLE PULSE t1
0.01 (THERMAL RESPONSE)
t2

Notes:
1. Duty factor D = t 1 / t 2
2. Peak T J = P DM x Z thJC + TC
0.01
0.00001 0.0001 0.001 0.01 0.1 1
t1 , Rectangular Pulse Duration (sec)

Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case

IRL530NS/L
350
L ID

E A S , S ingle Pulse Avalanc he E nergy (m J)

VDS TO P 3 .7A
300 6 .4A
D.U.T.
BOTTOM 9.0 A
RG +
V 250
- DD

5.0 V IAS 200

tp
0.01Ω
150

Fig 12a. Unclamped Inductive Test Circuit

100

50

V D D = 25 V
0 A
V(BR)DSS 25 50 75 100 125 150 175

tp S tarting T J , J unc tion T em perature (°C )

VDD
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
VDS

IAS

Fig 12b. Unclamped Inductive Waveforms

Current Regulator
Same Type as D.U.T.

50KΩ

12V .2µF
QG .3µF

5.0 V +
V
D.U.T. - DS
QGS QGD
VGS
VG
3mA

IG ID
Charge Current Sampling Resistors

Fig 13a. Basic Gate Charge Waveform Fig 13b. Gate Charge Test Circuit
 IRL530NS/L

Peak Diode Recovery dv/dt Test Circuit

+ Circuit Layout Considerations

D.U.T
• Low Stray Inductance
• Ground Plane
ƒ
• Low Leakage Inductance
Current Transformer
-

+
‚
„
- +
-


RG • dv/dt controlled by RG +
• Driver same type as D.U.T. VDD
-
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test

Driver Gate Drive

P.W.
Period D=
P.W. Period

VGS=10V *

D.U.T. ISD Waveform

Reverse
Recovery Body Diode Forward
Current Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
VDD

Re-Applied
Voltage Body Diode Forward Drop
Inductor Curent

Ripple ≤ 5% ISD

* VGS = 5V for Logic Level Devices

Fig 14. For N-Channel HEXFETS
 IRL530NS/L
D2Pak Package Outline

D2Pak Part Marking Information

7+,6,6$1,5)6:,7+ 3$57180%(5
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For GB Production
7+,6,6$1,5)6:,7+ 3$57180%(5
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 IRL530NS/L

D2Pak Tape & Reel Information

Dimensions are shown in millimeters (inches)
TRR

1.60 (.063)
1.50 (.059)
1.60 (.063)
4.10 (.161) 1.50 (.059)
3.90 (.153) 0.368 (.0145)
0.342 (.0135)

FEED DIRECTION 1.85 (.073) 11.60 (.457)

1.65 (.065) 11.40 (.449) 24.30 (.957)
15.42 (.609)
23.90 (.941)
15.22 (.601)
TRL
1.75 (.069)
10.90 (.429) 1.25 (.049)
10.70 (.421) 4.72 (.136)
16.10 (.634) 4.52 (.178)
15.90 (.626)

FEED DIRECTION

13.50 (.532) 27.40 (1.079)

12.80 (.504) 23.90 (.941)

330.00 60.00 (2.362)

(14.173) MIN.
MAX.

30.40 (1.197)
NOTES : MAX.
1. COMFORMS TO EIA-418. 26.40 (1.039) 4
2. CONTROLLING DIMENSION: MILLIMETER. 24.40 (.961)
3. DIMENSION MEASURED @ HUB.
3
4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.

Data and specifications subject to change without notice.

IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information. 01/04
Note: For the most current drawings please refer to the IR website at:
http://www.irf.com/package/