Course: B.Sc.

Applied Physical Science (Computer Science)

Year & Sem.: IInd Year, Sem - IIIrd
Subject: Computer Science
Paper No.: IX
Paper Title: Computer System Architecture
Lecture No.: 17
Lecture Title: Encoders, Multiplexers & De-multiplexers

Script

Hello friends in the previous lecture we learnt that the basic function of a comparator is to
compare the magnitudes of two binary quantities to determine the relationship of those
quantities. Then we learnt that a decoder is a digital circuit that detects the presence of a
specified combination of bits on its inputs and indicates the presence of that code by a
specified output level. In today’s discussion we shall be talking about encoders, multiplexers
and de-multiplexers. An encoder is a combinational logic circuit that essentially performs a
"reverse" decoder function. An encoder accepts an active level on one of its inputs
representing a digit, such as a decimal or octal digit, and converts it to a coded output, such as
BCD or binary. Encoders can also be devised to encode various symbols and alphabetic
characters. The process of converting from familiar symbols or numbers to a coded format is
called encoding.

The Decimal-to-BCD Encoder

This type of encoder has ten inputs--one for each decimal digit-and four outputs
corresponding to the BCD code, as shown. This is a basic 10-line-to-4-line encoder. The
BCD (8421) code is listed in this Table.

BCD CODE
DECIMAL DIGIT
A3 A2 A1 A0

0 0 0 0 0

1 0 0 0 1

2 0 0 1 0

3 0 0 1 1

4 0 1 0 0

5 0 1 0 1

6 0 1 1 0

7 0 1 1 1

8 1 0 0 0

9 1 0 0 1

From this table you can determine the relationship between each BCD bit and the decimal
digits in order to analyze the logic. For instance, the most significant bit of the BCD code 
is always a 1 for decimal digit 8 or 9. An OR expression for bit   in terms of the decimal
digits can therefore be written as

  8 9

Bit   is always a 1 for decimal digit 4, 5, 6, or 7 and can be expressed as an OR function as

  4 5 6 7

Bit   is always a 1 for decimal digit 2, 3, 6, or 7 and can be expressed as

  2 3 6 7

Finally,   is always a 1 for decimal digit 1, 3, 5, 7, or 9. The expression for   is

   1 3 5 7 9

Now let's implement the logic circuitry required for encoding each decimal digit to a BCD
code by using the logic expressions just developed. It is simply a matter of ORing the
appropriate decimal digit input lines to form each BCD output. The basic encoder logic
resulting from these expressions is shown in Figure.

When a HIGH appears on one of the decimal digit input lines, the appropriate levels occur on
the four BCD output lines. For instance, if input line 9 is HIGH, assuming all other input
lines are LOW, this condition will produce a HIGH on outputs   , and   and LOWs on
outputs   and   , which is the BCD code, 1001 for decimal 9.

The Decimal -to-BCD Priority Encoder

This type of encoder performs the same basic encoding function as previously discussed. A
priority encoder also offers additional flexibility in that it can be used in applications that
require priority detection. The priority function means that the encoder will produce a BCD
output corresponding to the highest order decimal digit input that is active and will ignore
any other lower-order active inputs. For instance, if the 6 and the 3 inputs are both active, the
BCD output is 0110 (which represents decimal 6).
As shown in Figure the 74LS148 is a priority encoder that has eight active-LOW inputs and
three active-LOW binary outputs. This device can be used for converting octal inputs to a 3-
bit binary code. To enable the device, the EI called the enable input must be LOW. It also has
the EO or the enable output and GS output for expansion purposes. The EO is LOW when the
EI is LOW and none of the inputs, 0 through 7, is active. GS is LOW when EI is LOW and
any of the inputs is active.
As shown in Figure, the 74LS 148 can be expanded to a 16-line-to-4-line encoder by
connecting the EO of the higher-order encoder to the EI of the lower-order encoder and
negative-ORing the corresponding binary outputs. The EO is used as the fourth and most
significant bit. This particular configuration produces active-HIGH outputs for the 4-bit
binary number.

An Application
A classic application example is a keyboard encoder. The ten decimal digits on the keyboard
of a computer, for example, must be encoded for processing by the logic circuitry. When one
of the keys is pressed, the decimal digit is encoded to the corresponding BCD code.

This Figure here shows a simple keyboard encoder arrangement using a 74HC147 priority
encoder. They keys are represented by ten push-button switches, each with a pull-up resistor
to  . The pull-up resistor ensures that the line is HIGH when a key is not depressed. When
a key is depressed, the line is connected to ground, and a LOW is applied to the
corresponding encoder input. The zero key is not connected because the BCD output
represents zero when none of the other keys is depressed.

The BCD complement output of the encoder goes into a storage device, and each successive
BCD code is stored until the entire number has been entered. Methods of storing BCD
numbers and binary data are covered in later lectures.

MULTIPLEXERS (DATA SELECTORS)

A multiplexer (MUX) is a device that allows digital information from several sources to be
routed onto a single line for transmission over that line to a common destination. The basic
multiplexer has several data-input lines and a single output line. It also has data-select inputs,
which permit digital data on any one of the inputs to be switched to the output line.
Multiplexers are also known as data selectors.

A logic symbol for a 4-input multiplexer (MUX) is shown in Figure. Notice that there are two
data-select lines because with two select bits, any one of the four data-input lines can be
selected. A 2-bit code on the data-select (S) inputs will allow the data on the selected data
input to pass through to the data output. If a binary 0, i.e. S1 = 0 and S0 = 0, is applied to the
data-select lines, the data on input D0 appear on the data-output line. If a binary 1, i.e. S1 = 0
and S0 = 1, is applied to the data-select lines, the data on input D1 appear on the data output.
If a binary 2 i.e. S1 = 1 and S0 = 0, is applied, the data on D2 appear on the output. If a binary
3 i.e. S1 = 1 and S0 = 1, is applied, the data on D3 are switched to the output line. A summary
of this operation is given in Table.

DATA-SELECT INPUTS
INPUT SELECTED
S1 S0

0 0 D0
 0 1 D1

1 0 D2

1 1 D3

The logic circuitry required to perform this multiplexing operation is as shown here. The data
output is equal to the state of the selected data input. You can therefore, derive a logic
expression for the output in terms of the data input and the select inputs.

The data output is equal to D0 only if S1 = 0 and S0 = 0: & Y =   .

The data output is equal to D1 only if S1 = 0 and S0 = 1: & Y =  .
The data output is equal to D2 only if S1 = 1 and S0 = 0: & Y =  .
The data output is equal to D3 only if S1 = 1 and S0 = 1: & Y =  .

When these terms are ORed, the total expression for the data output comes out to be like this

Y =    +  +  + 

The implementation of this equation requires four 3-input AND gates, a 4-input OR gate, and
two inverters to generate the complements of S1 and S0. Because data can be selected from
any one of the input lines, this circuit is also referred to as a data selector.

THE 74HC157 QUAD 2-INPUT MULTIPLEXER

The pinn diagram annd logic sym mbol for thee 74HC157 is shown heere. It consiists of four separate
2-input multiplexerrs. Each of the four muultiplexers shares
s a com
mmon data-select line anda a
commoon Enable. Because
B therre are only two
t inputs to
t be selecteed in each m
multiplexer,, a
single data-select
d input is suffficient.

A LOW W on the Enaable input allows

a the seelected inpu
ut data to paass through to the outpu ut.
A HIGH H on the Ennable input prevents
p datta from goin
ng through to the outpuut; that is, itt
disabless the multipplexers.

Notice that
t the fouur multiplexers are indiccated by thee partitionedd outline annd that the in
nputs
commoon to all fourr multiplexeers are indiccated as inp
puts to the notched blocck at the topp, which
is calledd the comm mon control block.
b All labels withinn the upper MUX blockk apply to the t other
blocks below
b it.

t 1 and 1 labels in thhe multiplexxer blocks and the G1 laabel in the ccommon con
Notice the ntrol
block. These
T labelss are an exaample of thee dependenccy notation system speccified in thee IEEE
Standarrds. In this case
c G1 indiicates an AN ND relation
nship betweeen the data--select inputt and
the dataa inputs withh 1 or 1 labbels. In otheer words, when the dataa select inpuut is HIGH,, the B
inputs of
o the multipplexers are selected; annd when thee data selectt input is LOOW, the A inputs
i
are seleected. A "G"" is always used
u to dennote AND deependency.
Appliccations - A 7 Segm
ment Displlay Multip
plexer

Figure shows
s a sim
mplified metthod of mulltiplexing BCD
B numberrs to a 7-seggment displlay. In
this exaample, 2-diggit numbers are displayyed on the 7-segment
7 reeadout by thhe use of a single
s
BCD-too-7-segmentt decoder. This T basic method
m of diisplay multiiplexing cann be extendeed to
displayss with any number
n of digits.
d The basic operaation involvees the application of twwo BCD
digits too the multipplexer inputs. A square wave is app plied to the data-selectt line, and when
w it
is LOW W, the A bitss are passedd through to the inputs of
o the 74LS S47 BCD-too-7-segmentt
decoderr. The LOW W on the datta-select alsoo puts a LO
OW on the input of tthe 74LS 1339 2-
line-to-4-line decoder, thus acctivating its 0 output an
nd enabling the A-digit display by
effectivvely connectting its commmon terminnal to groun nd. The A diigit is now oon and the B digit
is off.

When thhe data-seleect line goess HIGH, thee B bits are passed throough to the iinputs of thhe BCD-
to-7-seggment decoder. Also, thhe 74LS 139 decoder'ss 1 output iss activated, tthus enablin ng the
B-digit display. Thhe B digit iss now on and the A digiit is off. The cycle repeeats at the
frequenncy of the daata-select sqquare wave.. This frequuency must beb high enoough (about 30 Hz)
to preveent visual fllicker as thee digit displays are mulltiplexed.
DEMU
ULTIPLE
EXERS

multiplexer basically
A de-m b revverses the multiplexing
m g function. ItI takes digittal informattion
from onne line and distributes
d i to a givenn number off output linees. For this rreason, the de-
it d
multipleexer is also known as a data distribbutor and you
y will learrn that decoders can alsso be
used as de-multipleexers.

Figure here
h shows a 1-line-to--4-line de-m multiplexer circuit.
c The data-input line goes too all of
the ANDD gates. Thhe two data--select lines enable only y one gate at
a a time, annd the data
appearinng on the data-input linne will passs through th
he selected gate
g to the aassociated data-
d
output line.
l
We havve already discussed
d thee 74HC 1544 decoder in n its applicaation as a 4-line-to- 16--line
decoderr in previouus lecture. This
T device and a other deecoders cann also be useed in de-
multipleexing
applicattions. The logic symbool for this deevice, whenn used as a de-multiplex
d xer is shown n in
here. Inn de-multipllexer applications, the input
i lines are
a used as the t data-sellect lines.
One of the chip sellect inputs is
i used as thhe data-inpu
ut line, with the other chhip select innput
held LO OW to enable the internnal negativee-AND gatee (PIN 18 199 “edit referrence”). Thiis
device may
m be available in othher CMOS or o TTL fammilies.

So friennds that brinngs us to thee end of ourr discussion

n in this lectture and therefore we su
um up:

In this lecture
l we learnt that ann encoder accepts
a an active
a level on
o one of itts inputs
represennting a digit, such as a decimal or octal digit, and converrts it to a cooded output,, such as
BCD orr binary. Enncoders can also be devvised to enco ode variouss symbols annd alphabettic
characteers. The proocess of connverting from
m familiar symbols or numbers too a coded fo ormat is
called encoding.
e

A multiiplexer is a device that allows digiital information from seeveral sourcces to be rouuted
onto a single
s line for
f transmission over thhat line to a common destination. T The basic
multipleexer has sevveral data-innput lines and
a a single output line. It also has data-selectt inputs,
which permit
p digitaal data on any
a one of thhe inputs to
o be switcheed to the outtput line.
Multipllexers are allso known asa data selecctors.
A de-multiplexer basically reverses the multiplexing function. It takes digital information
from one line and distributes it to a given number of output lines. So that is it for today see
you in the next lecture with more on logic circuits. Thank you very much.