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Compal La-4821p Kft00-Rev 1.0 WM PDF
Compal La-4821p Kft00-Rev 1.0 WM PDF
1
02/24 Change LA-4821P from mount to DA2@ 1
ZZZ5
MDC Cable
45@
Compal Confidential
2
KFT00 Schematics Document 2
2009-03-10
REV:1.0
3 3
4 4
Compal Confidential
Thermal Sensor Clock Generator
Model Name : KFT00 Fan Control Intel Penryn Processor
page 4 ICS9LPRS600C+
page 4
File Name : LA-4821P uPGA-478 Package ICS9P935
page 14,15
1
page 4,5,6 1
FSB
H_A#(3..35) 1066MHz H_D#(0..63)
CRT
page 17
Memory BUS(DDRII) 200pin DDRII-SO-DIMM X2
SiS M672FX
Single Channel BANK 0, 1, 2, 3 page 12,13
PCI-Express
LCD Conn. SiS 307ELV TEBGA-847 1.8V DDRII 533/667
page 16 page 18
page 7,8,9,10,11
RTC CKT.
page 20 ENE KB926D2
page 31
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Block Diagrams
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
KFT00 M/B LA-4821P Schematic
Date: Tuesday, February 10, 2009 Sheet 2 of 47
A B C D E
A B C D E
Voltage Rails
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.
Power Plane Description S1 S3 S5
External PCI Devices
1
VIN Adapter power supply (19V) N/A N/A N/A DEVICE IDSEL # REQ/GNT # PIRQ 1
PROJECT ID Table
3 3
PROJECT_ID1 PROJECT_ID0
GPIO5 GPIO0
KFT00 0 0
KSW01 1 0
KSW91 1 1
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Notes List
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
KFT00 M/B LA-4821P Schematic
Date: Tuesday, March 10, 2009 Sheet 3 of 47
A B C D E
5 4 3 2 1
H_A#[3..35]
<7> H_A#[3..35] Trace length must short Place close to CPU within 500mil
H_REQ#[0..4]
<7> H_REQ#[0..4]
H_RS#[0..2] JCPU1A
<7> H_RS#[0..2] +1.05VS
H_A#3 J4 H1
A[3]# ADS# H_ADS# <7>
ADDR GROUP 0
H_A#4 L5 E2
H_A#5 A[4]# BNR# H_BNR# <7>
L4 A[5]# BPRI# G5 H_BPRI# <7>
H_A#6 K5 Intel :Pull-up 56ohm (Un-Mount) SiS : Pull-up 56ohm (Mount) H_PREQ# R85 1 2 @ 56_0402_5%
H_A#7 A[6]#
M3 A[7]# DEFER# H5 H_DEFER# <7>
H_A#8 N2 F21 H_IERR# R115 1 2 56_0402_5%
H_A#9 A[8]# DRDY# H_DRDY# <7>
D J1 A[9]# DBSY# E1 H_DBSY# <7> D
H_A#10 N3 Intel :Pull-up 56ohm (Mount) SiS : Pull-up 54.9ohm (Mount) ITP_TMS R84 1 2 56_0402_5%
H_A#11 A[10]#
P5 A[11]# BR0# F1 H_BR0# <7>
H_A#12 P2 ITP_TDI R83 1 2 150_0402_1%
A[12]#
CONTROL
H_A#13 L2 D20 H_IERR#
H_A#14 A[13]# IERR# H_INIT# H_PROCHOT# R113 1 56_0402_5%
H_A#15
P4 A[14]# INIT# B3 H_INIT# <20> Intel :Pull-up 56ohm (Mount) SiS : Pull-up 75ohm (Mount) 2
P1 A[15]#
H_A#16 R1 H4 ITP_TCK R69 1 2 27.4_0402_1%
A[16]# LOCK# H_LOCK# <7>
<7> H_ADSTB#0 M1 ADSTB[0]#
C1 H_RESET# ITP_TRST# R61 1 2 680_0402_5%
RESET# H_RESET# <7>
H_REQ#0 K3 F3 H_RS#0
H_REQ#1 REQ[0]# RS[0]# H_RS#1
H2 REQ[1]# RS[1]# F4
H_REQ#2 K2 G3 H_RS#2
H_REQ#3 REQ[2]# RS[2]#
H_REQ#4
J3 REQ[3]# TRDY# G2 H_TRDY# <7> Checklist recommend 39 Ohm CRB pull 75 Ohm
L1 REQ[4]#
HIT# G6 H_HIT# <7>
H_A#17 Y2 E4
H_A#18 A[17]# HITM# H_HITM# <7>
U5 A[18]#
H_A#19 R3 AD4 Add Michael 2008/5/30
A[19]# BPM[0]# 1/29 change to EMC1402 pn
ADDR GROUP 1
H_A#20 W6 AD3
H_A#21 U4
A[20]# BPM[1]#
AD1 EMC1402 U1
for second source
XDP/ITP SIGNALS
H_A#22 A[21]# BPM[2]# +3VS
Y5 A[22]# BPM[3]# AC4
H_A#23 U1 AC2 C1
H_A#24 A[23]# PRDY# H_PREQ# 0.1U_0402_16V4Z
H_A#25
R4 A[24]# PREQ# AC1
ITP_TCK
Connect SB SYS_RESET# or just left NC
T5 A[25]# TCK AC5 1 2
H_A#26 T3 AA6 ITP_TDI
H_A#27 A[26]# TDI LM95245CIMMX NOPB MSOP 8P
W2 A[27]# TDO AB3
H_A#28 W5 AB5 ITP_TMS NS@
H_A#29 A[28]# TMS ITP_TRST#
Y4 A[29]# TRST# AB6
C H_A#30 U2 C20 ITP_DBRESET# 1 U1 C
A[30]# DBR# ITP_DBRESET#
H_A#31 V4 C2 1 8
A[31]# VDD SCLK EC_SMB_CK2 <31>
H_A#32 W3 H_PROCHOT#
A[32]# H_PROCHOT# <20>
H_A#33 AA4 THERMAL 2200P_0402_50V7K THERMDA 2 7
H_A#34 A[33]# 2 D+ SDATA EC_SMB_DA2 <31>
AB2 A[34]#
H_A#35 AA3 D21 THERMDC 3 6 2 1 +3VS
A[35]# PROCHOT# THERMDA_R 1 THERMDA D- ALERT/THERM2 R706 10K_0402_5%
<7> H_ADSTB#1 V1 ADSTB[1]# THERMDA A24 2
B25 THERMDC_R R19
1 20_0402_5% THERMDC +3VS 1 2 4 5 PENRYN@
H_A20M# THERMDC R20 0_0402_5% R18 10K_0402_5% THERM GND
<20> H_A20M# A6 A20M#
ICH
H_FERR# A5 C7 H_THERMTRIP#
<20> H_FERR# FERR# THERMTRIP# H_THERMTRIP# <20> EMC1402-1-ACZL-TR
H_IGNNE# C4 C114 1 2 0.1U_0402_16V4Z
<20> H_IGNNE# IGNNE#
Address:100_1100 SMSC@
H_STPCLK# D5
<20> H_STPCLK# STPCLK#
H_INTR C6 H CLK
<20> H_INTR LINT0
H_NMI B4 A22
<20> H_NMI LINT1 BCLK[0] H_CLK_DP0 <14>
H_SMI# A3 A21
<20> H_SMI# SMI# BCLK[1] H_CLK_DN0 <14>
M4 RSVD[01]
N5
T2
V3
RSVD[02]
RSVD[03]
FAN1 Conn
RSVD[04]
B2
RESERVED
RSVD[05]
C3 RSVD[06]
D2 RSVD[07]
D22 RSVD[08]
D3 RSVD[09] H_THERMDA, H_THERMDC routing together, +5VS
F6 RSVD[10] Trace width / Spacing = 10 / 10 mil C3 10U_0805_10V4Z +5VS
1 2
B B
1
Merom Ball-out Rev 1a
CONN@ U2 D1
1 VEN GND 8 BAS16_SOT23-3
U1 2 7
+VCC_FAN1 VIN GND
3 6
2
VO GND
<31> EN_FAN1 1 R815 2 EN_FAN1_R 4 VSET GND 5 D2
1 2
1
330_0402_5% C769 G990P11U_SOP8
BAS16_SOT23-3
ADM1032ARMZ_MSOP8 0.047U_0402_16V7K
2
+1.05VS MEROM@ C4 10U_0805_10V4Z
CPU to SB interface 1 2
R120 1 2 56_0402_5% H_STPCLK# +3VS C5
Intel :Don't Pull-up SiS : Pull-up 56ohm (Mount) 1000P_0402_50V7K
R141 1 2 56_0402_5% H_INIT# Intel :Don't Pull-up SiS : Pull-up 56ohm (Mount) 1 2
1
R128 1 2 56_0402_5% H_IGNNE# Intel :Don't Pull-up SiS : Pull-up 56ohm (Mount) R21
10K_0402_5%
R144 1 2 56_0402_5% H_SMI# Intel :Don't Pull-up SiS : Pull-up 56ohm (Mount) 40mil JFAN1
2
R148 1 2 56_0402_5% H_A20M# Intel :Don't Pull-up SiS : Pull-up 56ohm (Mount) +VCC_FAN1 1 1
<31> FAN_SPEED1 2 2
R137 1 2 56_0402_5% H_NMI Intel :Don't Pull-up SiS : Pull-up 56ohm (Mount) 3 3
1
R140 1 2 56_0402_5% H_INTR Intel :Don't Pull-up SiS : Pull-up 56ohm (Mount) C6 4
1000P_0402_50V7K GND
5 GND
R127 1 2 56_0402_5% H_THERMTRIP# Intel : Pull-up 56ohm (Mount) SiS : Pull-up 56ohm (Mount)
A 2 A
R208 1 2 56_0402_5% H_FERR# Intel : Pull-up 56ohm (Mount) SiS : Pull-up 56ohm (Mount) ACES_85205-03001
+1.05VS
CONN@
R114 1 2 51_0402_1% H_BR0# Intel :Don't Pull-up SiS : Pull-up 56ohm (Mount)
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2008/10/18 Deciphered Date 2009/10/18 Title
R136 1 @ 2 56_0402_5% H_RESET# Intel :Don't Pull-up SiS : Pull-up 56ohm (Un-Mount)
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Merom (1/3)
R112 1 2 150_0402_1% ITP_DBRESET# Intel :Don't Pull-up SiS : Pull-up 150ohm (Mount) AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
KFT00 M/B LA-4821P Schematic
Date: Tuesday, March 10, 2009 Sheet 4 of 47
5 4 3 2 1
5 4 3 2 1
GTL_REF
1 1 H_D#[0..63]
H_D#[0..63] <7>
C368 C814
JCPU1C
1U_0603_10V4Z 220P_0402_50V7K A7 AB20
2 2 JCPU1B +CPU_CORE VCC[001] VCC[068] +CPU_CORE
A9 VCC[002] VCC[069] AB7
H_D#0 E22 Y22 H_D#32 A10 AC7
H_D#1 D[0]# D[32]# H_D#33 VCC[003] VCC[070]
D F24 D[1]# D[33]# AB24 A12 VCC[004] VCC[071] AC9 D
H_D#2 E26 V24 H_D#34 A13 AC12
H_D#3 D[2]# D[34]# H_D#35 VCC[005] VCC[072]
G22 D[3]# D[35]# V26 A15 VCC[006] VCC[073] AC13
DATA GRP 0
H_D#4 F23 V23 H_D#36 A17 AC15
H_D#5 D[4]# D[36]# H_D#37 VCC[007] VCC[074]
SiS Recommend H_D#6
G25 D[5]# D[37]# T22
H_D#38
A18 VCC[008] VCC[075] AC17
E25 D[6]# D[38]# U25 A20 VCC[009] VCC[076] AC18
H_D#7 E23 U23 H_D#39 B7 AD7
H_D#8 D[7]# D[39]# H_D#40 VCC[010] VCC[077]
K24 Y25 B9 AD9
DATA GRP 2
H_D#9 D[8]# D[40]# H_D#41 VCC[011] VCC[078]
G24 D[9]# D[41]# W22 B10 VCC[012] VCC[079] AD10
H_D#10 J24 Y23 H_D#42 B12 AD12
H_D#11 D[10]# D[42]# H_D#43 VCC[013] VCC[080]
J23 D[11]# D[43]# W24 B14 VCC[014] VCC[081] AD14
H_D#12 H22 W25 H_D#44 B15 AD15
H_D#13 D[12]# D[44]# H_D#45 VCC[015] VCC[082]
F26 D[13]# D[45]# AA23 B17 VCC[016] VCC[083] AD17
H_D#14 K22 AA24 H_D#46 B18 AD18
H_D#15 D[14]# D[46]# H_D#47 VCC[017] VCC[084]
H23 D[15]# D[47]# AB25 B20 VCC[018] VCC[085] AE9
<7> H_DSTBN#0 J26 DSTBN[0]# DSTBN[2]# Y26 H_DSTBN#2 <7> C9 VCC[019] VCC[086] AE10
<7> H_DSTBP#0 H26 DSTBP[0]# DSTBP[2]# AA26 H_DSTBP#2 <7> C10 VCC[020] VCC[087] AE12
<7> H_DINV#0 H25 DINV[0]# DINV[2]# U22 H_DINV#2 <7> C12 VCC[021] VCC[088] AE13
C13 VCC[022] VCC[089] AE15
C15 VCC[023] VCC[090] AE17
H_D#16 N22 AE24 H_D#48 C17 AE18
H_D#17 D[16]# D[48]# H_D#49 VCC[024] VCC[091]
K25 D[17]# D[49]# AD24 C18 VCC[025] VCC[092] AE20
H_D#18 H_D#50
Close to CPU pin AD26 H_D#19
P26
R23
D[18]# D[50]# AA21
AB22 H_D#51
D9
D10
VCC[026] VCC[093] AF9
AF10
D[19]# D[51]# VCC[027] VCC[094]
within 500mils. H_D#20 L23 D[20]# D[52]# AB21 H_D#52 D12 VCC[028] VCC[095] AF12
DATA GRP 1
H_D#21 M24 AC26 H_D#53 D14 AF14
H_D#22 D[21]# D[53]# H_D#54 VCC[029] VCC[096]
L22 D[22]# D[54]# AD20 D15 VCC[030] VCC[097] AF15
H_D#23 M23 AE22 H_D#55 D17 AF17 Place this cap more close to
H_D#24 D[23]# D[55]# H_D#56 VCC[031] VCC[098]
P25 D[24]# D[56]# AF23 D18 VCC[032] VCC[099] AF18
C H_D#25 P23 AC25 H_D#57 E7 AF20 B26/C26 rather than 10UF C
+1.05VS H_D#26 D[25]# D[57]# H_D#58 VCC[033] VCC[100]
P22 AE21 E9
DATA GRP 3
H_D#27 D[26]# D[58]# H_D#59 VCC[034]
T24 D[27]# D[59]# AD21 E10 VCC[035] VCCP[01] G21 +1.05VS
H_D#28 R24 AC22 H_D#60 E12 V6
H_D#29 D[28]# D[60]# H_D#61 VCC[036] VCCP[02]
L25 D[29]# D[61]# AD23 E13 VCC[037] VCCP[03] J6 1
2
R131
166 0 1 1
10_0402_5%
200 0 1 0
Length match within 25 mils.
The trace width/space/other is
20/7/25.
+1.05VS
R133 1 @ 2 56_0402_5% H_PWRGOOD Intel :Don't Pull-up (Connecte to ICH) SiS : Pull-up 56ohm (Un-Mount)
R119 1 @ 2 56_0402_5% H_DPWR# Intel :Don't Pull-up SiS : Pull-up 56ohm (Un-Mount)
Security Classification Compal Secret Data Compal Electronics, Inc.
C650 1 2 @ 0.1U_0402_16V4Z H_PWRGOOD Intel :Don't Pull-down SiS :Pull-down Cap (Un-Mount) 2008/10/18 2009/10/18 Title
Issued Date Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Merom (2/3)
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
KFT00 M/B LA-4821P Schematic
Date: Tuesday, March 10, 2009 Sheet 5 of 47
5 4 3 2 1
5 4 3 2 1
+CPU_CORE +CPU_CORE
2 x 330uF(9mOhm/2) 2 x 330uF(9mOhm/2)
JCPU1D 1 1 1 1
A4 VSS[001] VSS[082] P6
A8 P21 C47 + C350 + C347 + C169 +
VSS[002] VSS[083] @
A11 VSS[003] VSS[084] P24
A14 R2 330U_D2E_2.5VM_R9 330U_D2E_2.5VM_R9
VSS[004] VSS[085] 2 2
330U_D2E_2.5VM_R9 2 2
330U_D2E_2.5VM_R9
A16 VSS[005] VSS[086] R5
A19 VSS[006] VSS[087] R22
D A23 VSS[007] VSS[088] R25 D
AF2 VSS[008] VSS[089] T1 South Side Secondary North Side Secondary
B6 VSS[009] VSS[090] T4
B8 VSS[010] VSS[091] T23
B11 T26 +CPU_CORE
VSS[011] VSS[092]
B13 VSS[012] VSS[093] U3
B16 VSS[013] VSS[094] U6
B19 VSS[014] VSS[095] U21
B21 VSS[015] VSS[096] U24 1 1 1 1 1 1 1 1
B24 V2 C394 C383 C408 C409 C410 C411 C412 C392
VSS[016] VSS[097]
C5 VSS[017] VSS[098] V5
C8 V22 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M
VSS[018] VSS[099] 2 2 2 2 2 2 2 2
C11 VSS[019] VSS[100] V25
C14 W1 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M
VSS[020] VSS[101]
C16 VSS[021] VSS[102] W4
C19 VSS[022] VSS[103] W23 (Place these capacitors on South side,Secondary Layer)
C2 VSS[023] VSS[104] W26
C22 VSS[024] VSS[105] Y3
C25 Y6 +CPU_CORE
VSS[025] VSS[106]
D1 VSS[026] VSS[107] Y21
D4 VSS[027] VSS[108] Y24
D8 VSS[028] VSS[109] AA2
D11 VSS[029] VSS[110] AA5 1 1 1 1 1 1 1 1
D13 AA8 C379 C378 C377 C376 C375 C385 C393 C384
VSS[030] VSS[111]
D16 VSS[031] VSS[112] AA11
D19 AA14 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M
VSS[032] VSS[113] 2 2 2 2 2 2 2 2
D23 VSS[033] VSS[114] AA16
D26 AA19 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M
VSS[034] VSS[115]
E3 VSS[035] VSS[116] AA22
C E6 AA25 (Place these capacitors on North side,Secondary Layer) C
VSS[036] VSS[117]
E8 VSS[037] VSS[118] AB1
E11 VSS[038] VSS[119] AB4
E14 AB8 +CPU_CORE
VSS[039] VSS[120]
E16 VSS[040] VSS[121] AB11
E19 VSS[041] VSS[122] AB13
E21 VSS[042] VSS[123] AB16
E24 VSS[043] VSS[124] AB19 1 1 1 1 1 1 1 1
F5 AB23 C107 C106 C105 C104 C103 C89 C46 C90
VSS[044] VSS[125]
F8 VSS[045] VSS[126] AB26
F11 AC3 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M
VSS[046] VSS[127] 2 2 2 2 2 2 2 2
F13 VSS[047] VSS[128] AC6
F16 AC8 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M
VSS[048] VSS[129]
F19 VSS[049] VSS[130] AC11
F2 VSS[050] VSS[131] AC14 (Place these capacitors on South side,Primary Layer)
F22 VSS[051] VSS[132] AC16
F25 VSS[052] VSS[133] AC19
G4 AC21 +CPU_CORE
VSS[053] VSS[134]
G1 VSS[054] VSS[135] AC24
G23 VSS[055] VSS[136] AD2
G26 VSS[056] VSS[137] AD5
H3 VSS[057] VSS[138] AD8 1 1 1 1 1 1 1 1
H6 AD11 C77 C76 C75 C74 C84 C78 C88 C85
VSS[058] VSS[139]
H21 VSS[059] VSS[140] AD13
H24 AD16 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M
VSS[060] VSS[141] 2 2 2 2 2 2 2 2
J2 VSS[061] VSS[142] AD19
J5 AD22 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M 10U_0805_6.3V6M
VSS[062] VSS[143]
J22 VSS[063] VSS[144] AD25
B
J25 VSS[064] VSS[145] AE1 (Place these capacitors on North side,Primary Layer) B
K1 VSS[065] VSS[146] AE4
K4 VSS[066] VSS[147] AE8
K23 VSS[067] VSS[148] AE11
K26 VSS[068] VSS[149] AE14 +CPU-CORE C,uF ESR, mohm ESL,nH
L3 AE16
L6
VSS[069] VSS[150]
AE19 Decoupling
VSS[070] VSS[151]
L21 VSS[071] VSS[152] AE23 SPCAP,Polymer 6X330uF 9m ohm/6 1.8nH/6
L24 VSS[072] VSS[153] AE26
M2 VSS[073] VSS[154] A2 32X22uF 3m ohm/32 0.6nH/32
M5 VSS[074] VSS[155] AF6 MLCC 0805 X5R
M22 VSS[075] VSS[156] AF8 32X10uF 3m ohm/32 0.6nH/32
M25 VSS[076] VSS[157] AF11
N1 VSS[077] VSS[158] AF13
N4 VSS[078] VSS[159] AF16
N23 VSS[079] VSS[160] AF19
N26 VSS[080] VSS[161] AF21
P3 A25 +1.05VS
VSS[081] VSS[162]
VSS[163] AF25
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Merom (3/3)
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
KFT00 M/B LA-4821P Schematic
Date: Tuesday, February 10, 2009 Sheet 6 of 47
5 4 3 2 1
5 4 3 2 1
+1.05VS
+1.2VS V_AVDD_PCIE_1.2V
U30C
H_D#[0..63] <5>
C1XAVDD B16 N29 H_D#0 L22 PCIEAVDD:77mA
C1XAVDD HD0#
1
U30B
DDRA_SDQ[0..63] DDRA_SDQ0 AD31
<12,13> DDRA_SDQ[0..63] MD0A
DDRA_SDQ1 AD30
DDRA_SDM[0..7] DDRA_SDQ2 MD1A D1XAVDD +1.8VS
<12,13> DDRA_SDM[0..7] AG34 MD2A D1XAVDD A15
DDRA_SDQ3 AE29 B15 D1XAVSS D1XAVDD:7mA
DDRA_SMA[0..14] DDRA_SDQ4 MD3A D1XAVSS L41
<12,13> DDRA_SMA[0..14] AE32 MD4A
DDRA_SDQ5 AF34 AP11 D4XAVDD 1 2 D1XAVDD
DDRA_SDQ6 MD5A D4XAVDD D4XAVSS MBK1608121YZF_0603
AF31 MD6A D4XAVSS AP10
DDRA_SDQ7 AE30 1 1 1
DDRA_SDM0 MD7A C456 C480 C471
AD28 DQM0A
<12,13> DDRA_SDQS0 DDRA_SDQS0 AF32
DDRA_SDQS0# DQS0A 10U_0805_10V4Z 0.1U_0402_16V4Z 0.01U_0402_16V7K
D <12,13> DDRA_SDQS0# AF33 DQS0A# D
2 2 2
DDRA_SDQ8 AF28 AH24 DDRA_SMA0 1 2 D1XAVSS
DDRA_SDQ9 MD8A MA0A DDRA_SMA1 R409 0_0402_5%
AJ34 MD9A MA1A AP25
DDRA_SDQ10 AH31 AM25 DDRA_SMA2
DDRA_SDQ11 MD10A MA2A DDRA_SMA3
AG30 MD11A MA3A AL25
DDRA_SDQ12 AF30 AP26 DDRA_SMA4
DDRA_SDQ13 MD12A MA4A DDRA_SMA5
AG32 MD13A MA5A AM26
DDRA_SDQ14 AJ32 AN26 DDRA_SMA6
DDRA_SDQ15 MD14A MA6A DDRA_SMA7 +1.8VS
AJ31 MD15A MA7A AK25
DDRA_SDM1 AH34 AP27 DDRA_SMA8 D4XAVDD:10mA
DDRA_SDQS1 DQM1A MA8A DDRA_SMA9 L52
<12,13> DDRA_SDQS1 AH32 DQS1A MA9A AP28
<12,13> DDRA_SDQS1# DDRA_SDQS1# AH33 AK24 DDRA_SMA10 1 2 D4XAVDD
DQS1A# MA10A DDRA_SBS0 MBK1608121YZF_0603
MA11A AN24 DDRA_SBS0 <12,13>
DDRA_SDQ16 AK34 AP24 DDRA_SBS1 1 1 1
MD16A MA12A DDRA_SBS1 <12,13>
DDRA_SDQ17 AH30 AM28 DDRA_SBS2 C583 C579 C578
MD17A DRAM MA13A DDRA_SBS2 <12,13>
DDRA_SDQ18 AL32 AM27 DDRA_SMA11
DDRA_SDQ19 MD18A MA14A DDRA_SMA12 10U_0805_10V4Z 0.1U_0402_16V4Z 0.01U_0402_16V7K
AM33 MD19A MA15A AN28
DDRA_SDQ20 DDRA_SMA13 2 2 2
AK32 MD20A MA16A AP21
DDRA_SDQ21 AG29 AP29 DDRA_SMA14 1 2 D4XAVSS
DDRA_SDQ22 MD21A MA17A R473 0_0402_5%
AM34 MD22A
DDRA_SDQ23 AL31 AM23 DDRA_SRAS#
MD23A RASA# DDRA_SRAS# <12,13>
DDRA_SDM2 AJ30 AP22 DDRA_SCAS#
DQM2A CASA# DDRA_SCAS# <12,13>
<12,13> DDRA_SDQS2 DDRA_SDQS2 AK33 AJ23 DDRA_SWE#
DQS2A WEA# DDRA_SWE# <12,13>
<12,13> DDRA_SDQS2# DDRA_SDQS2# AL34 DQS2A#
DDRA_SDQ24 AM32 AK12 CLK_INT
MD24A FWDSDCLKOA CLK_INT <15>
DDRA_SDQ25 AP32 AH12 CLK_INC
MD25A FWDSDCLKOA# CLK_INC <15>
DDRA_SDQ26 AP31
C DDRA_SDQ27 MD26A C
AM29 MD27A
DDRA_SDQ28 AK30
DDRA_SDQ29 MD28A DDRA_SCS0#
AK29 MD29A CS0A# AP23 DDRA_SCS0# <12>
DDRA_SDQ30 AJ27 AH22 DDRA_SCS1#
MD30A CS1A# DDRA_SCS1# <12>
DDRA_SDQ31 AK28 AM22 DDRA_SCS2#
MD31A CS2A# DDRA_SCS2# <13>
DDRA_SDM3 AN32 AM21 DDRA_SCS3#
DQM3A CS3A# DDRA_SCS3# <13>
<12,13> DDRA_SDQS3 DDRA_SDQS3 AM30
DDRA_SDQS3# DQS3A
<12,13> DDRA_SDQS3# AM31 DQS3A#
AK22 DDRA_ODT0
ODT0A DDRA_ODT0 <12>
DDRA_SDQ32 AK20 AP20 DDRA_ODT1
MD32A ODT1A DDRA_ODT1 <12>
DDRA_SDQ33 AM20 AN22 DDRA_ODT2
MD33A ODT2A DDRA_ODT2 <13>
DDRA_SDQ34 AM19 AL21 DDRA_ODT3
MD34A ODT3A DDRA_ODT3 <13>
DDRA_SDQ35 AJ19
DDRA_SDQ36 MD35A
AN20 MD36A
DDRA_SDQ37 AJ21 AN30 DDRA_CKE0
MD37A CKEA0 DDRA_CKE0 <12>
DDRA_SDQ38 AP19 AP30 DDRA_CKE1
MD38A CKEA1 DDRA_CKE1 <12>
DDRA_SDQ39 AH20 AH26 DDRA_CKE2
MD39A CKEA2 DDRA_CKE2 <13> +1.8V
DDRA_SDM4 AK21 AK27 DDRA_CKE3
DQM4A CKEA3 DDRA_CKE3 <13>
<12,13> DDRA_SDQS4 DDRA_SDQS4 AK19
DDRA_SDQS4# DQS4A
<12,13> DDRA_SDQS4# AL19 DQS4A#
1
DDRA_SDQ40 AK18 1
DDRA_SDQ41 MD40A R276 C251
AJ17 MD41A
DDRA_SDQ42 AK17
DDRA_SDQ43 MD42A DDRVREF 1K_0402_1% 0.1U_0402_16V4Z
AP16 MD43A DDRVREF0 AD18
DDRA_SDQ44 2
AH18 AD23
2
DDRA_SDQ45 MD44A DDRVREF1 DDRVREF
AP18 MD45A
DDRA_SDQ46 AN18 MD46A
1
DDRA_SDQ47 AP17 1 1
B DDRA_SDM5 MD47A R501 C238 C233 B
DDRA_SDQS5
AM18
AL17
DQM5A
AJ25 DDRCOMP R226 36_0402_1%
Place C233
<12,13> DDRA_SDQS5 DQS5A DDRCOMP
<12,13> DDRA_SDQS5# DDRA_SDQS5# AM17 DQS5A# DDRCOMN AK26 DDRCOMN R227 36_0402_1% +1.8V 1K_0402_1%
2 2
1U_0603_10V4Z under M672MX
solder side.
2
DDRA_SDQ48 AN16
DDRA_SDQ49 MD48A 0.1U_0402_16V4Z
AK16 MD49A
DDRA_SDQ50 AN14 AH28 OCDVREFP
DDRA_SDQ51 MD50A OCDVREFP OCDVREFN
AJ15 MD51A OCDVREFN AJ29
DDRA_SDQ52 AP15
DDRA_SDQ53 MD52A
AM16 MD53A
DDRA_SDQ54 AK15
DDRA_SDQ55 MD54A +1.8V +1.8V
AP14 MD55A
DDRA_SDM6 AH16
DDRA_SDQS6 DQM6A
<12,13> DDRA_SDQS6 AL15 DQS6A
1
<12,13> DDRA_SDQS6# DDRA_SDQS6# AM15 B6 S3AUXSW#
DQS6A# S3AUXSW# S3AUXSW# <31>
R277 R511
DDRA_SDQ56 AL13
DDRA_SDQ57 MD56A 40.2_0402_1% 36_0402_1%
AM13 MD57A
DDRA_SDQ58 AM12
2
DDRA_SDQ59 MD58A OCDVREFP OCDVREFN
AJ13 MD59A
DDRA_SDQ60 AM14 MD60A
1
DDRA_SDQ61 AK14
DDRA_SDQ62 MD61A R224 R228
AN12 MD62A
DDRA_SDQ63 AH14
DDRA_SDM7 MD63A 36_0402_1% 40.2_0402_1%
AK13 DQM7A
<12,13> DDRA_SDQS7 DDRA_SDQS7 AP12
2
DDRA_SDQS7# DQS7A
<12,13> DDRA_SDQS7# AP13 DQS7A#
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
M672MX (2/5)-DDR
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
KFT00 M/B LA-4821P Schematic
Date: Tuesday, March 10, 2009 Sheet 8 of 47
5 4 3 2 1
5 4 3 2 1
+1.8VS Z4XAVDD:10mA
L24
1 2 Z4XAVDD
MBK1608121YZF_0603
1 1 1 U30A
C252 C250 C248 Z_CLK0 AH10 F15 NB_ENTEST R1931 2 4.7K_0402_5%
<14> Z_CLK0 ZCLK ENTEST
10U_0805_10V4Z 0.1U_0402_16V4Z 0.01U_0402_16V7K <19> ZDREQ ZDREQ AP8 D16
2 2 2 ZUREQ ZDREQ TESTMODE0
<19> ZUREQ AN8 ZUREQ TESTMODE1 E16
D 1 2 Z4XAVSS F16 D
R231 0_0402_5% ZSTB_DP0 TESTMODE2
<19> ZSTB_DP0 AM7 ZSTB0 TRAP0 D17
<19> ZSTB_DN0 ZSTB_DN0 AL7 E17
ZSTB_DP1 ZSTB0# TRAP1
<19> ZSTB_DP1 AP4 ZSTB1 TRAP2 F17
<19> ZSTB_DN1 ZSTB_DN1 AP5 ZSTB1#
+1.8VS ZAD0 AK10 AC32
ZAD1 ZAD0 TRAP3
AM6 ZAD1 TRAP4 AD34
ZAD2 AK11 AB28
ZAD3 ZAD2 TRAP5
AJ11 ZAD3 TRAP6 AD32
1
1 ZAD11 AK8
R229 C249 ZAD12 ZAD11 AUX_PWRGD
AN4 ZAD12 AUXOK A5 AUX_PWRGD <20,31>
ZAD13 AK7 C6 SB_PWRGD
ZAD13 PWROK SB_PWRGD <20,31>
49.9_0402_1% 0.1U_0402_16V4Z ZAD14 AL5 A7 NB_RST#
2 ZAD14 PCIRST# NB_RST# <18,19>
ZAD15 AM5
2
1
Z4XAVDD AM10 D8 VBVSYNC
Z4XAVDD VBVSYNC VBVSYNC <18>
R178 Z4XAVSS AN10 F7 VBHSYNC
Z4XAVSS VBHSYNC VBHSYNC <18>
390_0402_5% E7 VBHCLK
VBHCLK VBHCLK <18>
1
2
R179 VGA_CRT_R D13 C8 VBCLK
<17> VGA_CRT_R ROUT VBCLK VBCLK <18>
VGA_CRT_G C12 E9 VBCAD
<17> VGA_CRT_G GOUT VBCAD VBCAD <18>
390_0402_5% VGA_CRT_B C13
<17> VGA_CRT_B BOUT
D9 H_VACLK R559 1 2 33_0402_5% VACLK
VACLK <18>
2
VGA_CRT_HSYNC R184 1 VACLK
<17> VGA_CRT_HSYNC 2 0_0402_5% A_HSYNC F12 HSYNC
VGA_CRT_VSYNC R185 1 2 0_0402_5% A_VSYNC
<17> VGA_CRT_VSYNC G12 VSYNC For SiS VB 307 use only
GMCH_CRT_CLK R183 1 2 0_0402_5% A_DDC1CLK D11
<17> GMCH_CRT_CLK VGPIO0
GMCH_CRT_DATA R182 1 2 0_0402_5% A_DDC1DAT E12 AH2
<17> GMCH_CRT_DATA VGPIO1 NC0
NC1 AG3
VCOMP D15
VVBWN VCOMP
C15 VVBWN
VRSET C14 VRSET
R196 1 2 0_0402_5% INTA# F13
<7,19> INT_N_A INTA#
R195 1 2 0_0402_5% VOSCI F11
<14> REF_CLK0 VOSCI
+1.8VS DCLKAVDD:5mA DACAVDD1 A12
L65 DACAVSS1 DACAVDD1
B12 DACAVSS1
1 2 DCLKAVDD
MBK1608121YZF_0603 DACAVDD2 A13
DACAVSS2 DACAVDD2
1 1 1 B13 DACAVSS2
B C467 C468 C469 B
5/20 reserved by Ivan DCLKAVDD B10 DCLKAVDD
10U_0805_10V4Z 0.1U_0402_16V4Z 0.01U_0402_16V7K DCLKAVSS A11 +3VS
2 2 2 @ DCLKAVSS
1 2 DCLKAVSS 1 2 VCOMP AGPBUSY# R258 1 2 4.7K_0402_5%
R396 0_0402_5% C166 0.1U_0402_16V4Z ECLKAVDD A9
VVBWN ECLKAVSS ECLKAVDD AUX_PWRGD C180 1
1 2 B8 ECLKAVSS 2 0.1U_0402_16V4Z
C167 0.1U_0402_16V4Z
@ SB_PWRGD C181 1 2 0.1U_0402_16V4Z
+1.8VS S IC SISM672FXA1 TEBGA 847P
+1.8VS ECLKAVDD:5mA
L45 R177 DACAVDD2:73mA
1 2 ECLKAVDD 1 2 DACAVDD2
MBK1608121YZF_0603 0_0402_5%
1 1 1 1 1 1
C491 C484 C485 C174 C490 C483
1 2 VRSET
1 2 VCOMP R174 130_0402_5%
C178 0.1U_0402_16V4Z
+1.8VS 1 2 VVBWN
C177 0.1U_0402_16V4Z
R395
DACAVDD1 DACAVDD1:73mA
A A
3.3_0402_5%
1 1 1
C453 C461 C463 DACAVDD1 Spec.
@ @ @
10U_0805_10V4Z 1U_0603_10V4Z 0.1U_0402_16V4Z Voltage : 1.5V +/- 5%
2 2 2
Current : 100mA
Security Classification Compal Secret Data Compal Electronics, Inc.
1 2 DACAVSS1 2008/10/18 2009/10/18 Title
R383 0_0402_5%
Issued Date Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
M672MX (3/5)-ASL
7/30 modified to @ AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
KFT00 M/B LA-4821P Schematic
Date: Tuesday, March 10, 2009 Sheet 9 of 47
5 4 3 2 1
5 4 3 2 1
U30E
D D
AG31
AG33
AC31
AC33
AD29
AH29
AN11
AN13
AN15
AN17
AA16
AA17
AA18
AA19
AA20
AA21
AA31
AA33
AB29
AE31
AE33
AK31
AF29
AL10
AL12
AL14
AL16
AL18
AL20
AL28
AL30
AL33
AJ10
AJ12
AJ14
AJ16
AJ18
AJ20
AJ26
AJ28
AJ33
AG2
AC2
AC3
AD2
AD3
AD4
AD5
AD7
AH1
AB3
AB4
AB5
AB7
AE3
AF2
AF3
AF4
AF5
AL6
AL8
AJ8
U30F
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
A3 VSS
B2 VSS VSS T29
B3 VSS VSS U2
B4 VSS VSS U3
VSS U4
B21 VSS VSS U5
B23 VSS VSS U6
B25 VSS VSS U14
B27 VSS VSS U15
B29 VSS VSS U16
B31 VSS VSS U17
C1 VSS VSS U18
C2 VSS VSS U19
C3 VSS VSS U20
C4 VSS VSS U31
VSS U33
VSS V2
C9 VSS VSS V3
C10 VSS VSS V4
C11 VSS VSS V5
C16 VSS VSS V14
C18 VSS VSS V15
C32 VSS VSS V16
C C33 V17 C
VSS VSS
D1 VSS VSS V18
D2 VSS VSS V19
D3 VSS VSS V20
D4 VSS VSS V29
D5 VSS VSS AN33
D10 GND AN31
VSS VSS
D12 VSS VSS AN19
D21 VSS VSS W3
D23 VSS VSS W14
D25 VSS VSS W15
D27 VSS VSS W16
D29 VSS VSS W17
E1 VSS VSS W18
E2 VSS VSS W19
E3 VSS VSS W20
E6 VSS VSS W21
E11 VSS VSS W31
E13 VSS VSS W33
E14 VSS VSS Y2
E18 VSS VSS Y3
E29 VSS VSS Y4
E30 VSS VSS Y5
E33 VSS VSS Y7
F2 VSS VSS Y14
F3 VSS VSS Y15
F4 VSS VSS Y16
F5 VSS VSS Y17
F6 VSS VSS Y18
B B
F14 VSS VSS Y19
F22 VSS VSS Y20
F24 VSS VSS Y21
F26 VSS VSS Y29
F28 VSS VSS AA2
G2 VSS VSS AA3
G3 VSS VSS AA14
G7 VSS VSS AA15
G10 VSS VSS AB17
P21 VSS VSS AB19
T21 VSS VSS AB21
V21 VSS VSS P19
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
S IC SISM672FXA1 TEBGA 847P
G31
G33
H4
H5
H29
J2
J3
J7
J31
J33
K3
K4
K5
K29
L2
L3
L4
L5
L7
L31
L33
M2
M3
M29
N3
N4
N5
N6
N7
N14
N15
N31
N33
P2
P3
P14
P15
P16
P17
P18
P29
R2
R3
R4
R5
R14
R15
R16
R17
R18
R19
R20
R31
R33
T3
T6
T14
T15
T16
T17
T18
T19
T20
A A
+1.8V +1.8V
1
9 10 DDRA_SDM0 1
DDRA_SDQS0# VSS DM0 R236 C770 + C303 + C304
<8,13> DDRA_SDQS0# 11 DQS0# VSS 12 1
<8,13> DDRA_SDQS0 DDRA_SDQS0 13 14 DDRA_SDQ6 C771 C277 @ @
DQS0 DQ6 DDRA_SDQ7 1K_0402_1% 0.1U_0402_16V4Z 330U_D2E_2.5VM 330U_D2E_2.5VM
15 VSS DQ7 16
DDRA_SDQ2 0.1U_0402_16V4Z 2.2U_0603_6.3V6K 2 2 2
17 18
2
DDRA_SDQ3 DQ2 VSS DDRA_SDQ12 2
19 DQ3 DQ12 20 +DIMM_VREF
D DDRA_SDQ13 D
21 VSS DQ13 22
1
DDRA_SDQ8 23 24 1 1
DDRA_SDQ9 DQ8 VSS DDRA_SDM1 R235 C772 C773
25 DQ9 DM1 26
27 VSS VSS 28
<8,13> DDRA_SDQS1# DDRA_SDQS1# 29 30 DDR_CLK0 1K_0402_1% 0.1U_0402_16V4Z 220P_0402_50V7K
DQS1# CK0 DDR_CLK0 <15> 2 2 @
<8,13> DDRA_SDQS1 DDRA_SDQS1 31 32 DDR_CLK0#
DDR_CLK0# <15>
2
DQS1 CK0#
33 VSS VSS 34
DDRA_SDQ10 35 36 DDRA_SDQ14
DDRA_SDQ11 DQ10 DQ14 DDRA_SDQ15
37 DQ11 DQ15 38
39 VSS VSS 40
DDRA_SMA[0..14]
<8,13> DDRA_SMA[0..14]
41 VSS VSS 42
DDRA_SDQ16 43 44 DDRA_SDQ20 DDRA_SDQ[0..63]
DDRA_SDQ17 DQ16 DQ20 DDRA_SDQ21 <8,13> DDRA_SDQ[0..63]
45 DQ17 DQ21 46
47 48 DDRA_SDM[0..7]
VSS VSS <8,13> DDRA_SDM[0..7]
<8,13> DDRA_SDQS2# DDRA_SDQS2# 49 50
DDRA_SDQS2 DQS2# NC DDRA_SDM2
<8,13> DDRA_SDQS2 51 DQS2 DM2 52 Layout Note:
53 VSS VSS 54
DDRA_SDQ18 55 56 DDRA_SDQ22 Place near JP35
DDRA_SDQ19 DQ18 DQ22 DDRA_SDQ23
57 DQ19 DQ23 58
59 60 +1.8V
DDRA_SDQ24 VSS VSS DDRA_SDQ28
61 DQ24 DQ28 62
DDRA_SDQ25 63 64 DDRA_SDQ29
DQ25 DQ29
65 VSS VSS 66
DDRA_SDM3 67 68 DDRA_SDQS3#
DM3 DQS3# DDRA_SDQS3# <8,13>
EC_TX_P80_DATA 69 70 DDRA_SDQS3 C296 C774 C775 C776 C777
<13,29,31> EC_TX_P80_DATA NC DQS3 DDRA_SDQS3 <8,13>
71 VSS VSS 72
DDRA_SDQ26 73 74 DDRA_SDQ30 2.2U_0603_6.3V6K 2.2U_0603_6.3V6K 2.2U_0603_6.3V6K 2.2U_0603_6.3V6K 2.2U_0603_6.3V6K
DDRA_SDQ27 DQ26 DQ30 DDRA_SDQ31
75 DQ27 DQ31 76 Swap RP11,RP12 Pin 1 & 2 +0.9VS
77 VSS VSS 78
DDRA_CKE0 79 80 DDRA_CKE1
C <8> DDRA_CKE0 CKE0 NC/CKE1 DDRA_CKE1 <8> C
81 82 DDRA_SBS2 1 4
EC_RX_P80_CLK VDD VDD DDRA_CKE0
<13,29,31> EC_RX_P80_CLK 83 NC NC/A15 84 2 3
DDRA_SBS2 85 86 DDRA_SMA14 RP11 56_0404_4P2R_5%
<8,13> DDRA_SBS2 BA2 NC/A14 +1.8V
87 VDD VDD 88
DDRA_SMA12 89 90 DDRA_SMA11 DDRA_SMA9 1 4
DDRA_SMA9 A12 A11 DDRA_SMA7 DDRA_SMA12
91 A9 A7 92 2 3
DDRA_SMA8 93 94 DDRA_SMA6 RP12 56_0404_4P2R_5%
A8 A6
95 VDD VDD 96 1 1 1 1
DDRA_SMA5 97 98 DDRA_SMA4 DDRA_SMA8 1 4 C778 C297 C779 C295
DDRA_SMA3 A5 A4 DDRA_SMA2 DDRA_SMA5
DDRA_SMA1
99 A3 A2 100
DDRA_SMA0
Swap RP6 Pin2 & RP7 Pin 1 2 3
101 102 RP6 56_0404_4P2R_5% 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
A1 A0 2 2 2 2
103 VDD VDD 104
DDRA_SMA10 105 106 DDRA_SBS1 DDRA_SMA3 1 4
A10/AP BA1 DDRA_SBS1 <8,13>
DDRA_SBS0 107 108 DDRA_SRAS# DDRA_SMA1 2 3
<8,13> DDRA_SBS0 BA0 RAS# DDRA_SRAS# <8,13>
DDRA_SWE# 109 110 DDRA_SCS0# RP7 56_0404_4P2R_5%
<8,13> DDRA_SWE# WE# S0# DDRA_SCS0# <8>
111 VDD VDD 112
DDRA_SCAS# 113 114 DDRA_ODT0 DDRA_SMA10 1 4
<8,13> DDRA_SCAS# CAS# ODT0 DDRA_ODT0 <8>
DDRA_SCS1# 115 116 DDRA_SMA13 DDRA_SBS0 2 3
<8> DDRA_SCS1# NC/S1# NC/A13
117 118 RP8 56_0404_4P2R_5%
DDRA_ODT1 VDD VDD +0.9VS
<8> DDRA_ODT1 119 NC/ODT1 NC 120
121 122 DDRA_SWE# 1 4
DDRA_SDQ32 VSS VSS DDRA_SDQ36 DDRA_SCAS#
123 DQ32 DQ36 124 2 3
DDRA_SDQ33 125 126 DDRA_SDQ37 RP9 56_0404_4P2R_5%
DQ33 DQ37
127 VSS VSS 128 1 1 1 1 1
<8,13> DDRA_SDQS4# DDRA_SDQS4# 129 130 DDRA_SDM4 DDRA_SCS1# 1 4 C780 C781 C782 C744 C783
DDRA_SDQS4 DQS4# DM4 DDRA_ODT1
<8,13> DDRA_SDQS4 131 DQS4 VSS 132 2 3
133 134 DDRA_SDQ38 RP10 56_0404_4P2R_5% 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
DDRA_SDQ34 VSS DQ38 DDRA_SDQ39 2 2 2 2 2
135 DQ34 DQ39 136
DDRA_SDQ35 137 138
DQ35 VSS DDRA_SDQ44
139 VSS DQ44 140
DDRA_SDQ40 141 142 DDRA_SDQ45 DDRA_SMA11 1 4
DDRA_SDQ41 DQ40 DQ45 DDRA_SMA14
143 DQ41 VSS 144 2 3
B
145 146 DDRA_SDQS5# RP13 56_0404_4P2R_5% +0.9VS B
VSS DQS5# DDRA_SDQS5# <8,13>
DDRA_SDM5 147 148 DDRA_SDQS5
DM5 DQS5 DDRA_SDQS5 <8,13>
149 150 DDRA_SMA6 1 4
DDRA_SDQ42 VSS VSS DDRA_SDQ46 DDRA_SMA7
151 DQ42 DQ46 152 2 3
DDRA_SDQ43 153 154 DDRA_SDQ47 RP14 56_0404_4P2R_5% 1 1 1 1 1
DQ43 DQ47 C784 C785 C299 C308 C307
155 VSS VSS 156
DDRA_SDQ48 157 158 DDRA_SDQ52 DDRA_SMA2 1 4
DDRA_SDQ49 DQ48 DQ52 DDRA_SDQ53 DDRA_SMA4 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
159 DQ49 DQ53 160 2 3
EC_RX_P80_CLK R237 1 2 2 2 2 2
2 0_0402_5% 161 VSS VSS 162 RP15 56_0404_4P2R_5%
EC_RX_P80_CLK_R 163 164 DDR_CLK1
<13> EC_RX_P80_CLK_R NC,TEST CK1 DDR_CLK1 <15>
165 166 DDR_CLK1# DDRA_SBS1 1 4
VSS CK1# DDR_CLK1# <15>
<8,13> DDRA_SDQS6# DDRA_SDQS6# 167 168 DDRA_SMA0 2 3
DDRA_SDQS6 DQS6# VSS DDRA_SDM6 RP16 56_0404_4P2R_5%
<8,13> DDRA_SDQS6 169 DQS6 DM6 170
171 172 +0.9VS
DDRA_SDQ50 VSS VSS DDRA_SDQ54 DDRA_SCS0#
173 DQ50 DQ54 174 1 4
DDRA_SDQ51 175 176 DDRA_SDQ55 DDRA_SRAS# 2 3
DQ51 DQ55 RP17 56_0404_4P2R_5%
177 VSS VSS 178
DDRA_SDQ56 179 180 DDRA_SDQ60 1 1 1
DDRA_SDQ57 DQ56 DQ60 DDRA_SDQ61 DDRA_SMA13 C306 C305 C298
181 DQ57 DQ61 182 1 4
183 184 DDRA_ODT0 2 3
DDRA_SDM7 VSS VSS DDRA_SDQS7# RP18 56_0404_4P2R_5% 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
185 DM7 DQS7# 186 DDRA_SDQS7# <8,13>
DDRA_SDQS7 2 2 2
187 VSS DQS7 188 DDRA_SDQS7 <8,13>
DDRA_SDQ58 189 190
DDRA_SDQ59 DQ58 VSS DDRA_SDQ62
191 DQ59 DQ62 192
193 194 DDRA_SDQ63
SDATA VSS DQ63 DDRA_CKE1
<13,14,15,20> SDATA 195 SDA VSS 196 1 2
<13,14,15,20> SCLK SCLK 197 198 R238 1 2 10K_0402_5% R241 56_0402_5%
SCL SA0 R239 1
+3VS 199 VDDSPD SA1 200 2 10K_0402_5%
203 GND Layout Note:
FOX_ASOA426-M2RN-7F Layout Note: Place one cap close to every 2 pullup
A +3VS
CONN@ Place these resistor resistors terminated to +0.9VS A
Add GND Pin For EMI Recommend
closely JP35,all
trace length Max=1.5"
1
DIMM0 STD H:5.2mm (BOT)
C786 C787
0.1U_0402_16V4Z
2.2U_0603_6.3V6K 2
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2008/10/18 Deciphered Date 2009/10/18 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DDRII-SODIMM0
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. KFT00 M/B LA-4821P Schematic
Date: Tuesday, March 10, 2009 Sheet 12 of 47
5 4 3 2 1
A B C D E
+1.8V +1.8V
JDIMM2
+DIMM_VREF 1 VREF VSS 2
3 4 DDRA_SDQ4
DDRA_SDQ0 VSS DQ4 DDRA_SDQ5
5 DQ0 DQ5 6
DDRA_SDQ1 7 8
DQ1 VSS DDRA_SDM0 +DIMM_VREF
9 VSS DM0 10
<8,12> DDRA_SDQS0# DDRA_SDQS0# 11 12 20mils
DDRA_SDQS0 DQS0# VSS DDRA_SDQ6
<8,12> DDRA_SDQS0 13 DQS0 DQ6 14
15 16 DDRA_SDQ7
DDRA_SDQ2 VSS DQ7
17 DQ2 VSS 18 1
DDRA_SDQ3 19 20 DDRA_SDQ12 C258 C255
1 DQ3 DQ12 DDRA_SDQ13 1
21 VSS DQ13 22
DDRA_SDQ8 23 24 0.1U_0402_16V4Z 2.2U_0603_6.3V6K
DDRA_SDQ9 DQ8 VSS DDRA_SDM1 2
25 DQ9 DM1 26
27 VSS VSS 28
<8,12> DDRA_SDQS1# DDRA_SDQS1# 29 30 DDR_CLK2 Layout Note:
DQS1# CK0 DDR_CLK2 <15>
<8,12> DDRA_SDQS1 DDRA_SDQS1 31 32 DDR_CLK2#
DQS1 CK0# DDR_CLK2# <15> Place near JP34
33 VSS VSS 34
DDRA_SDQ10 35 36 DDRA_SDQ14
DDRA_SDQ11 DQ10 DQ14 DDRA_SDQ15 +1.8V
37 DQ11 DQ15 38
39 VSS VSS 40
41 VSS VSS 42
DDRA_SDQ16 43 44 DDRA_SDQ20 C253 C256 C254 C264 C263
DDRA_SDQ17 DQ16 DQ20 DDRA_SDQ21 DDRA_SMA[0..14]
45 DQ17 DQ21 46 <8,12> DDRA_SMA[0..14]
47 48 2.2U_0603_6.3V6K 2.2U_0603_6.3V6K 2.2U_0603_6.3V6K 2.2U_0603_6.3V6K 2.2U_0603_6.3V6K
DDRA_SDQS2# VSS VSS DDRA_SDQ[0..63]
<8,12> DDRA_SDQS2# 49 DQS2# NC 50 <8,12> DDRA_SDQ[0..63]
<8,12> DDRA_SDQS2 DDRA_SDQS2 51 52 DDRA_SDM2
DQS2 DM2 DDRA_SDM[0..7]
53 VSS VSS 54 <8,12> DDRA_SDM[0..7]
DDRA_SDQ18 55 56 DDRA_SDQ22
DDRA_SDQ19 DQ18 DQ22 DDRA_SDQ23
57 DQ19 DQ23 58
59 VSS VSS 60
DDRA_SDQ24 61 62 DDRA_SDQ28 +1.8V
DDRA_SDQ25 DQ24 DQ28 DDRA_SDQ29
63 DQ25 DQ29 64
65 VSS VSS 66
DDRA_SDM3 67 68 DDRA_SDQS3#
DM3 DQS3# DDRA_SDQS3# <8,12>
EC_TX_P80_DATA 69 70 DDRA_SDQS3 1 1 1 1
<12,29,31> EC_TX_P80_DATA NC DQS3 DDRA_SDQS3 <8,12>
71 72 C266 C267 C265 C257
DDRA_SDQ26 VSS VSS DDRA_SDQ30
73 DQ26 DQ30 74
DDRA_SDQ27 75 76 DDRA_SDQ31 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
DQ27 DQ31 +0.9VS 2 2 2 2
77 VSS VSS 78
DDRA_CKE2 79 80 DDRA_CKE3
2 <8> DDRA_CKE2 CKE0 NC/CKE1 DDRA_CKE3 <8> 2
81 82 DDRA_SCS3# 1 4
EC_RX_P80_CLK VDD VDD DDRA_ODT3
<12,29,31> EC_RX_P80_CLK 83 NC NC/A15 84 2 3
DDRA_SBS2 85 86 DDRA_SMA14 RP3 56_0404_4P2R_5%
<8,12> DDRA_SBS2 BA2 NC/A14
87 VDD VDD 88
DDRA_SMA12 89 90 DDRA_SMA11 DDRA_CKE3 1 4
DDRA_SMA9 A12 A11 DDRA_SMA7 DDRA_CKE2
91 A9 A7 92 2 3
DDRA_SMA8 93 94 DDRA_SMA6 RP5 56_0404_4P2R_5% +0.9VS
A8 A6
95 VDD VDD 96
DDRA_SMA5 97 98 DDRA_SMA4 DDRA_SCS2# 1 4
DDRA_SMA3 A5 A4 DDRA_SMA2 DDRA_ODT2
99 A3 A2 100 2 3
DDRA_SMA1 101 102 DDRA_SMA0 RP4 56_0404_4P2R_5% 1 1
A1 A0 C262 C261
103 VDD VDD 104
DDRA_SMA10 105 106 DDRA_SBS1
A10/AP BA1 DDRA_SBS1 <8,12>
DDRA_SBS0 107 108 DDRA_SRAS# 4.7U_0805_10V4Z 4.7U_0805_10V4Z
<8,12> DDRA_SBS0 BA0 RAS# DDRA_SRAS# <8,12> 2 2
DDRA_SWE# 109 110 DDRA_SCS2#
<8,12> DDRA_SWE# WE# S0# DDRA_SCS2# <8>
111 VDD VDD 112
DDRA_SCAS# 113 114 DDRA_ODT2
<8,12> DDRA_SCAS# CAS# ODT0 DDRA_ODT2 <8>
DDRA_SCS3# 115 116 DDRA_SMA13
<8> DDRA_SCS3# NC/S1# NC/A13
117 VDD VDD 118
DDRA_ODT3 119 120
<8> DDRA_ODT3 NC/ODT1 NC
121 VSS VSS 122
DDRA_SDQ32 DDRA_SDQ36
DDRA_SDQ33
123
125
DQ32 DQ36 124
126 DDRA_SDQ37 EMI Recommend
DQ33 DQ37
127 VSS VSS 128
DDRA_SDQS4# 129 130 DDRA_SDM4 +1.8V
<8,12> DDRA_SDQS4# DQS4# DM4
<8,12> DDRA_SDQS4 DDRA_SDQS4 131 132
DQS4 VSS DDRA_SDQ38
133 VSS DQ38 134
DDRA_SDQ34 135 136 DDRA_SDQ39
DDRA_SDQ35 DQ34 DQ39
137 DQ35 VSS 138 1 1 1 1
139 140 DDRA_SDQ44 C847 C848 C849 C850
DDRA_SDQ40 VSS DQ44 DDRA_SDQ45 <EMI> <EMI> <EMI> <EMI>
141 DQ40 DQ45 142
DDRA_SDQ41 143 144 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
3 DQ41 VSS DDRA_SDQS5# 2 2 2 2 3
145 VSS DQS5# 146 DDRA_SDQS5# <8,12>
DDRA_SDM5 147 148 DDRA_SDQS5
DM5 DQS5 DDRA_SDQS5 <8,12>
149 VSS VSS 150
DDRA_SDQ42 151 152 DDRA_SDQ46
DDRA_SDQ43 DQ42 DQ46 DDRA_SDQ47
153 DQ43 DQ47 154
155 VSS VSS 156
DDRA_SDQ48 157 158 DDRA_SDQ52
DDRA_SDQ49 DQ48 DQ52 DDRA_SDQ53
159 DQ49 DQ53 160
161 162
EC_RX_P80_CLK_R 163
VSS VSS
164 DDR_CLK3 01/06 Add C855,C856,C857,C858 (0.1uF) for EMI Recommend
<12> EC_RX_P80_CLK_R NC,TEST CK1 DDR_CLK3 <15>
165 166 DDR_CLK3#
VSS CK1# DDR_CLK3# <15> +0.9VS
<8,12> DDRA_SDQS6# DDRA_SDQS6# 167 168
DDRA_SDQS6 DQS6# VSS DDRA_SDM6
<8,12> DDRA_SDQS6 169 DQS6 DM6 170
171 VSS VSS 172
DDRA_SDQ50 173 174 DDRA_SDQ54
DDRA_SDQ51 DQ50 DQ54 DDRA_SDQ55
175 DQ51 DQ55 176 1 1 1 1
177 178 C856 C855 C857 C858
DDRA_SDQ56 VSS VSS DDRA_SDQ60 <EMI> <EMI> <EMI> <EMI>
179 DQ56 DQ60 180
DDRA_SDQ57 181 182 DDRA_SDQ61 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
DQ57 DQ61 2 2 2 2
183 VSS VSS 184
DDRA_SDM7 185 186 DDRA_SDQS7#
DM7 DQS7# DDRA_SDQS7# <8,12>
187 188 DDRA_SDQS7
VSS DQS7 DDRA_SDQS7 <8,12>
DDRA_SDQ58 189 190
DDRA_SDQ59 DQ58 VSS DDRA_SDQ62
191 DQ59 DQ62 192
193 194 DDRA_SDQ63
SDATA VSS DQ63
<12,14,15,20> SDATA 195 SDA VSS 196
<12,14,15,20> SCLK SCLK 197 198 R233 1 2 10K_0402_5% +3VS
SCL SAO R234 1
+3VS 199 VDDSPD SA1 200 2 10K_0402_5%
201 GND GND 202 Layout Note:
P-TWO_A5692B-A0G16-P Layout Note: Place one cap close to every 2 pullup
4 +3VS
CONN@ Place these resistor resistors terminated to +0.9VS 4
Add GND Pin For EMI Recommend
closely JP34,all
trace length Max=1.5"
C259
1
C260
DIMM1 STD H:9.2mm (BOT)
2.2U_0603_6.3V6K 0.1U_0402_16V4Z
2 Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2008/10/18 Deciphered Date 2009/10/18 Title
DDRII-SODIMM1
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
KFT00 M/B LA-4821P Schematic
Date: Tuesday, March 10, 2009 Sheet 13 of 47
A B C D E
5 4 3 2 1
1
1 2 CLKGEN_VDD R32 R58 R57
FSL4 FSL3 FSL2 FSL1 FSL0 CPU PCIE PCI ZCLK
KC FBM-L11-201209-221LMAT_0805 1
@
10K_0402_5%
@
10K_0402_5%
@
10K_0402_5%
MHz MHz MHz MHz
1 1 1 1 1 1 1 1 1
C100 C664 C69 C70 C71 C72 C98 C79 C99 C405
2
VTTPWRGD 0 1 0 0 1 133 100 33.3 133
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
10U_0805_10V4Z 10U_0805_10V4Z
1
2 2 2 2 2 2 2 2 2 2 C
2 Q9 0 1 0 1 1 166 100 33.3 133
B MMBT3904_SOT23
1
D C E @ D
3
2 Q10 0 1 0 1 0 200 100 33.3 133
B MMBT3904_SOT23
E @
3
+3VS
RP39
Use SB03904008L & SB000006A00 FootPrint
5 4 MODE
6 3 CLK_RESET#
7 2 STOP# CLKGEN_VDD
8 1 48M
10K_1206_8P4R_5% +3VS
14
19
23
24
56
39
29
L30
2
Remove R43 R66 R529 R527 and use PR39 U4
Michael 2008/5/30 1 2 KC FBM-L11-201209-221LMAT_0805
VDDREF
VDDZ
VDDPCI_0
VDDPCI_1
VDD48
VDDPCIEX_0
VDDPCIEX_1
VDDCPU
1 1 1
+3VS C420 C403 C404
@ VDDA 50 55 CPUT_L0 R95 1 2 33_0402_5% H_CLK_DP0
VDDA CPUT_L0 H_CLK_DP0 <4>
10U_0805_10V4Z 0.1U_0402_16V4Z 10U_0805_10V4Z
R80 @ 2.7K_0402_5% 2 2 2 CPUC_L0 R102 1
47 GNDA CPUC_L0 54 2 33_0402_5% H_CLK_DN0
H_CLK_DN0 <4>
FSL0
R55 @ 2.7K_0402_5% 52 CPUT_L1 R94 1 2 33_0402_5% H_CLK_DP1
CPUT_L1 H_CLK_DP1 <7>
R78 @ 2.7K_0402_5% XTAL_IN CPUC_L1 R101 1 2 33_0402_5% H_CLK_DN1
FSL1 Reference schematic use 1206
5 X1 ICS9LPR600 CPUC_L1 51 H_CLK_DN1 <7>
R54 @ 2.7K_0402_5% XTAL_OUT 6
C
X2 C
R76 @ 2.7K_0402_5% 44 PCIET_L0 R91 1 2 33_0402_5% PCIE_CLK_NB
PCIET_L0 PCIE_CLK_NB <7>
FSL2 PCIEC_L0 R90 2 33_0402_5% PCIE_CLK_NB#
PCIEC_L0 43 1 PCIE_CLK_NB# <7> NB
R53 @ 2.7K_0402_5% REF_CLK0 R79 1 2 33_0402_5% FSL0 3
<9> REF_CLK0 *FSL0/REF0_2x
REF_CLK1 R77 1 2 22_0402_5% FSL1 4 41
<20> REF_CLK1 **FSL1/REF1_2x PCIET_L1
R52 2.7K_0402_5% VBRCLK R818 1 2 22_0402_5% 40
<18> VBRCLK PCIEC_L1
FSL3
R74 @ 2.7K_0402_5% SB CLK_PCI_SB R75 1 2 33_0402_5% FSL2 9 38 PCIET_L2 R89 1 2 33_0402_5% PCIE_CLK_SB
<19> CLK_PCI_SB **FSL2/PCICLK0_2x PCIET_L2 PCIE_CLK_SB <20>
PCIEC_L2 R88 2 33_0402_5% PCIE_CLK_SB#
PCIEC_L2 37 1 PCIE_CLK_SB# <20>SB
R73 @ 2.7K_0402_5% FSL3 10
FSL4 **FS3/PCICLK1_2x PCIET_L3 R106 1
PCIET_L3 36 2 33_0402_5% PCIE_CLK_307
PCIE_CLK_307 <18>
R56 2.7K_0402_5% EC CLK_PCI_EC R72 1 2 33_0402_5% FSL4 11 35 PCIEC_L3 R105 1 2 33_0402_5% PCIE_CLK_307# 307LV
<31> CLK_PCI_EC **FS4/PCICLK2 PCIEC_L3 PCIE_CLK_307# <18>
<12,13,15,20> SDATA SDATA R338 1 2 0_0402_5% SMDATA 45 25 12M R68 1 2 33_0402_5% USB_CLK_12M
SDATA 12MHz USB_CLK_12M <21>
Y1
GNDPCIEX_0
GNDPCIEX_1
14.31818MHZ_16PF_DSX840GA <12,13,15,20> SCLK SCLK R337 1 2 0_0402_5% SMCLK 46 SCLK
GNDPCI_0
GNDPCI_1
GNDCPU
GNDREF
2
GND48
GNDZ
C86 18P_0402_50V8J
for saving power & good EMI
ICS9LPR600BGLF-T_TSSOP56
7
8
13
20
27
53
42
32
+3VALW +3VS
A A
2
+3VS
5
DCLK 3 4 SCLK
<29,30> DCLK Security Classification Compal Secret Data
Q3B Title
2N7002DW-T/R7_SOT363-6
Issued Date 2008/10/18 Deciphered Date 2009/10/18
Clock Generator ICS9LPR600C
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Replace Package from SOT23 to SOT363-6 AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 1.0
Michael 2008/5/30 DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
KFT00 M/B LA-4821P Schematic
Date: Tuesday, March 10, 2009 Sheet 14 of 47
5 4 3 2 1
5 4 3 2 1
+1.8V
L25
1 2 KC FBM-L11-201209-221LMAT_0805 0.1U_0402_16V4Z 0.1U_0402_16V4Z CLKBUF_VDD
1 1 1 1 1 1 1
1 1 1 C274 C665 C301 C273 C302 C788 C275
D C852 C853 C854 D
<EMI> <EMI> <EMI> 10U_0805_10V4Z 10U_0805_10V4Z
0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 2 2 2 2 2 2 2
2 2 2
+1.8V
L26
1 2 KC FBM-L11-201209-221LMAT_0805 CLKBUF_AVDD
1 1 1
C789 C790 C276
C C
Reference schematic use 1206 U12
01/10 Change C789 from @ to mount for EMI Recommend CLKBUF_VDD 3 7 CLKBUF_AVDD
VDD1.8_0 VDDA1.8
11 VDD1.8_1
25 VDD1.8_2
21 VDD1.8_3
1 DDRC0 R819 1 2 0_0402_5% DDR_CLK0#
DDRC0 DDR_CLK0# <12>
2 DDRT0 R820 1 2 0_0402_5% DDR_CLK0
DDRT0 DDR_CLK0 <12>
CLK_INC 10
<8> CLK_INC CLK_INC
CLK_INT 9 5 DDRC1 R821 1 2 0_0402_5% DDR_CLK2#
<8> CLK_INT CLK_INT DDRC1 DDR_CLK2# <13>
4 DDRT1 R822 1 2 0_0402_5% DDR_CLK2
DDRT1 DDR_CLK2 <13>
SDATA R245 2 1 0_0402_5% 20 13 DDRC2 R823 1 2 0_0402_5% DDR_CLK1#
<12,13,14,20> SDATA SDATA DDRC2 DDR_CLK1# <12>
SCLK R244 2 1 0_0402_5% 19 12 DDRT2 R824 1 2 0_0402_5% DDR_CLK1
<12,13,14,20> SCLK SCLK DDRT2 DDR_CLK1 <12>
FB_OUTA R243 2 1 0_0402_5% FB_INA 18 15 DDRC3 R825 1 2 0_0402_5% DDR_CLK3#
FB_IN DDRC3 DDR_CLK3# <13>
R242 2 1 22_0402_5% FB_OUTA_R 17 16 DDRT3 R826 1 2 0_0402_5% DDR_CLK3
FB_OUT DDRT3 DDR_CLK3 <13>
DDRC4 23
8 GND_0 DDRT4 22
6 GND_1
28 GND_2 DDRC5 27
24 GND_3 DDRT5 26
14 GND_4
1 ICS9P935AFLF-T_SSOP28
C300
B B
10P_0402_50V8J
2
C300 close to R242
A A
1
1
1
R16 2 C36
300_0603_5% R17 C35 @
100K_0402_5% 4.7U_0805_10V4Z
+3VALW +3VS 0.1U_0402_16V4Z 2
1 2
1
3
D S
G
Q8 2 2 1 2 Q5
1
SSM3K7002FU_SC70-3 G R15 10K_0402_5% SI2301BDS_SOT23
R827 R828 S
3
Level Shift Circuit 10K_0402_5% 15K_0402_5%
D
1
1
D +LCDVDD
2
GMCH_ENVDD_Q 2 Q7 W=60mils
G SSM3K7002FU_SC70-3
1
C S
3
2 Q38
B MMBT3904_SOT23 1 1
E C29 C32
3
1
R829 C @
<18> GMCH_ENVDD 1 2 2 Q37 4.7U_0805_10V4Z 0.1U_0402_16V4Z
B 2 2
MMBT3904_SOT23
47K_0402_5% E Change Q7 Q8 package from SOT23 to SC70-3
3
1 R22
Michael 2008/5/30
100K_0402_5%
2
C C
31 GND1
32 GND2
B ACES_88242-3001 B
CONN@ +3VS
1
R28
4.7K_0402_5%
2
BKOFF# D11 1 2 RB751V_SOD323 DISPOFF#
<31> BKOFF#
+INVPWR_B+
L12 2 1 B+
KC FBM-L11-201209-221LMAT_0805
L11 2 1
KC FBM-L11-201209-221LMAT_0805
1
C49 C43
0.1U_0603_50V4Z 68P_0402_50V8K
2 @
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
LVDS & DVI Connector
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
KFT00 M/B LA-4821P Schematic
Date: Tuesday, March 10, 2009 Sheet 16 of 47
5 4 3 2 1
A B C D E
D5 D6 D7
2
@ @ @
DAN217_SC59 DAN217_SC59 DAN217_SC59 L13
KC FBM-L11-201209-221LMAT_0805
1
+R_CRT_VCC +CRT_VCC
W=40mils
1
D8 F1 W=40mils
+L_CRT_VCC 2 1 1 2
1 1
3
RB491D_SC59-3 1.1A_6VDC_FUSE
+3VS 1
Place closed to chipset C278
0.1U_0402_16V4Z Follow JFT00 Smybol
2
VGA_CRT_R L15 1 2 CRT_R_2 JCRT1
<9> VGA_CRT_R
FBMA-L10-160808-800LMT_0603 6
11
VGA_CRT_G L17 1 2 CRT_G_2 1
<9> VGA_CRT_G
FBMA-L10-160808-800LMT_0603 7
12
VGA_CRT_B L19 1 2 CRT_B_2 2
<9> VGA_CRT_B
FBMA-L10-160808-800LMT_0603 8
1
13
R212 R213 R214 1 1 1 1 1 1 3
C279 C280 C281 C282 C283 C285 1 1 1 9
75_0402_5% 75_0402_5% 75_0402_5% 14
C284 C286 C287 4 16
2
2
2 2 2 2 2 2 10P_0402_50V8J 10P_0402_50V8J 10P_0402_50V8J 10
10P_0402_50V8J 10P_0402_50V8J 22P_0402_50V8J 2 2 2
15 17
22P_0402_50V8J 22P_0402_50V8J 1 5
10P_0402_50V8J
SUYIN_070549FR015S208CR
+CRT_VCC CRT_HSYNC_2 C288
1 2 CONN@
L20 FCM1608C-121T_0603 <EMI> 2
1 2 2 1 <EMI> 100P_0402_50V8J DSUB_12
C289 0.1U_0402_16V4Z R215 10K_0402_5% 1 2 CRT_VSYNC_2
L21 FCM1608C-121T_0603 1
1
U5 <EMI> C290
1 1 <EMI>
OE#
2 VGA_CRT_HSYNC CRT_HSYNC_0 2
<9> VGA_CRT_HSYNC 2 A Y 4 1 2 CRT_HSYNC_1 C292 68P_0402_50V8K
R216 39_0402_1% C291 2
G
10P_0402_50V8J 10P_0402_50V8J DSUB_15
TC7SET125FUF_SC70 <EMI> 2 2 <EMI>
3
+CRT_VCC 1
C293
Place closed to chipset 68P_0402_50V8K
1 2
C294 0.1U_0402_16V4Z 2
1
U6
<EMI>
OE#
VGA_CRT_VSYNC 2 4 CRT_VSYNC_0 1 2 CRT_VSYNC_1 12/22 Change to SE071680J80
<9> VGA_CRT_VSYNC A Y R218 39_0402_1%
G
(IFTXX)
1
TC7SET125FUF_SC70
3
D9 D10 Add IFTXX
<EMI> <EMI>
DAN217_SC59 DAN217_SC59
Andy_1102
@ @
3
+5VS
+3VS
+CRT_VCC
1
3 R220 3
+3VS 2.2K_0402_5%
2
R221 R222
2.2K_0402_5% 2.2K_0402_5%
2
DSUB_12 6 1 GMCH_CRT_DATA <9>
Q44A
5
2N7002DW-T/R7_SOT363-6
1
10/5 Change to SB00000AR00 R225
2.2K_0402_5%
2
+3VS
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
CRT & TV-OUT Connector
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
KFT00 M/B LA-4821P Schematic
Date: Tuesday, March 10, 2009 Sheet 17 of 47
A B C D E
5 4 3 2 1
+1.8VS +1.8VS
G10
H13
H12
H11
H10
D13
D12
D11
D10
M1
G4
H4
C2
R336 0_0402_5%
K3
K4
B3
K2
E9
E8
E7
E6
E5
L1
L2
L3
L6
J4
J5
J6
J7
J8
J9
U7 Modify 10U_1206 to
10U_0805
VDD3V
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
PCIEVDD
PCIEVDD
PCIEVDD
PCIEVDD
PCIEVDD
PCIEVDD
PCIEVDD
PCIEVDD
PCIEVDD
PCIEVDD
PCIEVDD
DACVDD
PCIEAVDD
LVDSPLLVDD
PLL1VDD
LAVDD
LAVDD
LAVDD
LAVDD
LAVDD
LAVDD
LAVDD
LAVDD
LAVDD
T17 PAD G2 GPIOA PERN5/SVB_Bn N12 HDVBN2_C <7>
T20 PAD H2 GPIOB PERP5/SVB_Bp N13 HDVBP2_C <7>
T21 PAD H1 GPIOC PERN4/SVB_Gn N10 HDVBN1_C <7>
T18 PAD G1 GPIOD PERP4/SVB_Gp N11 HDVBP1_C <7>
For 307LV/ELV only T7 PAD E12 LCDSENSE/GPIOE PERN3/SVB_Rn N8 HDVBN0_C <7>
T8 PAD E11 INTN/GPIOF PERP3/SVB_Rp N9 HDVBP0_C <7>
<16> GMCH_ENVDD G13 GPIOG
<31> ENBKL G12 GPIOH PERN2/SVA_Bn N6 HDVAN2_C <7>
T10 PAD F11 GPIOI PERP2/SVA_Bp N7 HDVAP2_C <7>
1
TSCLKI/GPION
T22 PAD J3 TVCLKO/GPIOO REFCLKN L7 PCIE_CLK_307# <14>
VB_LAVDD R108 1 @ 2 1.65K_0402_1% L8
REFCLKP PCIE_CLK_307 <14>
R107 1 2 6.04K_0402_1% EXTSWING C13 L4 VB_PCIERSET0 R370 1 2 499_0402_1%
EXTSWING PCIERSET0
1 2 R96 1 2 24K_0402_1% A12 LX3P PCIERSET1 L5 VB_PCIERSET1 R369 124_0402_1%
C110 A13
1U_0603_10V4Z LVDSA2+ LX3N
<16> LVDSA2+ C11 LX2P VACLK K13 VACLK <9>
LVDSA2- C12 J12 VBCLK_RR132 1 2 33_0402_5%
<16> LVDSA2- VBCLK <9>
307LV/ELV:
Stuff R107, R96, C110
Un-stuff R108
<16>
<16>
<16>
LVDSA1+
LVDSA1-
LVDSA0+
LVDSA1+
LVDSA1-
LVDSA0+
A10
A11
C9
LX2N
LX1P
LX1N
LX0P
SiS307ELV VBCLK
VBHSYNC
VBVSYNC
VBHCAD
K11
J11
L13
VBHSYNC <9>
VBVSYNC <9>Side-Band
VBCAD <9> Signals
307DV/CP: Stuff R108 LVDSA0- C10 L12
<16> LVDSA0- LX0N VBHCLK VBHCLK <9>
Un-stuff R107, R96, C110 LVDSAC+ A8 R345 1 2 0_0402_5% VB_DACVDD
<16> LVDSAC+ LXC1P
LVDSAC- A9 B2 V2RSET R346 115_0402_1% AGND
<16> LVDSAC- LXC1N V2RSET
C7 B1 V2COMP @ 307ELV:stuff R345, un-stuff R346
LXC2P V2COMP
C8 LXC2N TVDACR D2 307LV/DV/CP:stuff R346, un-stuff R345
A6 LX4P TVDACG D1
A7 LX4N 8/28 Change U6 from SIS307LV SA00000O920 to SIS307ELV SA00000O930 TVDACB E2 5/20 Change R345 from @ to stuff
C5 LX5P TVCSYNC E1 PAD T6 307ELV:NC these 4 pins!
C6 LX5N
A4 L9 VB_PCIEAVSS
LX6P PCIEAVSS VB_LVDSPLLVSS
A5 LX6N LVDSPLLVSS A2
C3 K1 VB_PLL1VSS C109 1 2 0.1U_0402_16V4Z
LX7P PLL1VSS
C4 LX7N
DACVSS C1 AGND
<16> I2CC_SDA E13 LDDCDATA DACVSS D3 307ELV:change C94 to 0 ohm
<16> I2CC_SCL F12 LDDCCLK DACVSS E3 307LV/DV/CP:C94=0.1uF
VBOSCO J1 E4
B VBRCLK R830 1 VBOSCO DACVSS B
<14> VBRCLK 2 0_0402_5% VBRCLK_R J2 VBRCLK DACVSS F4 V2COMP C94 1 2 0_0402_5%
T15 PAD G11 PFTEST2 VB_DACVDD
8/28 Change C94 from 0.1U to 0 Ohm +3VS
T11 PAD F10 PFTEST1
AGND
PAD E10 99mA L4
T9 PFTESTO
<9,19> NB_RST# F13 EXTRSTN
1 1 1 1 1
C92 C93 C91 C669 C670 1_0603_5%
PCIEVSS
PCIEVSS
PCIEVSS
PCIEVSS
PCIEVSS
PCIEVSS
PCIEVSS
PCIEVSS
PCIEVSS
PCIEVSS
PCIEVSS
PCIEVSS
PCIEVSS
PCIEVSS
PCIEVSS
PCIEVSS
PCIEVSS
PCIEVSS
PCIEVSS
PCIEVSS
PCIEVSS
PCIEVSS
LAVSS
LAVSS
LAVSS
LAVSS
LAVSS
LAVSS
LAVSS
LAVSS
LAVSS
LAVSS
LAVSS
LAVSS
LAVSS
LAVSS
LAVSS
LAVSS
LAVSS
0.1U_0402_16V4Z 10U_0805_10V4Z 10U_0805_10V4Z
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
2 2 2 4.7U_0805_10V4Z 2 2
0.01U_0402_16V7K 7/30 change L14 to 1_0603
SIS307LV-B0_BGA_167P AGND
F5
F6
F7
F8
F9
G5
G6
G7
G8
G9
H5
H6
H7
H8
H9
J10
K12
K10
K9
K8
K7
K6
K5
L10
L11
M2
M3
M4
M5
M6
M7
M8
M9
M10
M11
M12
M13
N1
A3
B4
B5
B6
B7
B8
B9
B10
B11
B12
B13
D4
D5
D6
D7
D8
D9
+3VS
Add C669 and C670
General I/O Power
Y2 @
14.31818MHZ_16PF_DSX840GA
VBOSCO 2 1 R125 1 @ 2 10_0402_5% VBRCLK_R
1 2 VB_VDD3V 2 2
R358 0_0402_5% 1 C116 C113
C434 @ @
27P_0402_50V8J 27P_0402_50V8J
0.1U_0402_16V4Z 1 1
2 11mA +3VS
L7
NOTE: all stuffed(default) VB_PLL1VDD 1 2
R334 0_0603_5% MBK1608121YZF_0603
Modify before using! 1
C118
1
C119
1
C154
+1.8VS
0.1U_0402_16V4Z 0.01U_0402_16V7K 10U_0805_10V4Z
VB_PLL1VSS 2 2 2
A 1 2 A
1 1 1 1 AGND R139 0_0402_5%
C441 C437 C440 C433
DDC pull-up
0.1U_0402_16V4Z 0.1U_0402_16V4Z +5VS
2 2
0.1U_0402_16V4Z
2 2
0.1U_0402_16V4Z I2CC_SCL
R124 2.2K_0402_5% Security Classification Compal Secret Data
Title
Compal Electronics, Inc.
1 2 Issued Date 2008/10/18 Deciphered Date 2009/10/18
I2CC_SDA 1
R118
2
2.2K_0402_5% LVDS Encoder SiS307LV
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Internal Core Power AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
KFT00 M/B LA-4821P Schematic
Date: Tuesday, March 10, 2009 Sheet 18 of 47
5 4 3 2 1
5 4 3 2 1
+3VS
RP44
U11A PCI_REQ#4 1 8
D PCI_REQ#3 2 7 D
H5 H2 PCI_REQ#4 PCI_REQ#2 3 6
AD31 PREQ4# PCI_REQ#3 PCI_REQ#1
J4 AD30 PREQ3# H1 4 5
J3 G3 PCI_REQ#2
AD29 PREQ2# PCI_REQ#1 8.2K_1206_8P4R_5%
K1 AD28 PREQ1# G4
K2 G2 PCI_REQ#0
AD27 PREQ0# RP45
J5 AD26
K4 J2 PCI_GNT#4 PAD PCI_REQ#0 1 8
AD25 PGNT4# T28
K3 J1 PCI_GNT#3 PAD INT_N_A 2 7
AD24 PGNT3# T29
L2 H3 PCI_GNT#2 PAD PCI_PIRQB# 3 6
AD23 PGNT2# T27
K5 H4 PCI_GNT#1 PAD PCI_PIRQC# 4 5
AD22 PGNT1# T26
L4 AD21 PGNT0# G5
L3 8.2K_1206_8P4R_5%
AD20
M1 AD19 C/BE3# L1
M2 M3 RP46
AD18 C/BE2# PCI_PIRQD#
L5 N5 1 8
M4
P3
R1
AD17
AD16
AD15
AD14
PCI C/BE1#
C/BE0#
INTA#
R5
F5 INT_N_A
INT_N_A <7,9>
PCI_FRAME#
PCI_IRDY#
PCI_TRDY#
2
3
4
7
6
5
R2 F4 PCI_PIRQB#
AD13 INTB# PCI_PIRQC# 8.2K_1206_8P4R_5%
P5 AD12 INTC# F3
R4 G1 PCI_PIRQD#
AD11 INTD# RP47
R3 AD10
T1 N1 PCI_FRAME# PCI_STOP# 1 8
AD9 FRAME# PCI_IRDY# PCI_SERR#
T2 AD8 IRDY# N2 2 7
T4 M5 PCI_TRDY# PCI_DEVSEL# 3 6
AD7 TRDY# PCI_STOP# PCI_PLOCK#
T3 AD6 STOP# N3 4 5
U1 P2 PCI_SERR#
AD5 SERR# 8.2K_1206_8P4R_5%
U2 AD4 PAR P4
C T5 N4 PCI_DEVSEL# C
AD3 DEVSEL# PCI_PLOCK#
U4 AD2 PLOCK# P1
U3 AD1
V1 V2 CLK_PCI_SB
AD0 PCICLK CLK_PCI_SB <14>
D5 PCI_RST#_R R384 1 2 33_0402_5%
PCIRST# PCI_RST# <28,29,30,31,33>
R831 1 2 33_0402_5% NB_RST# <9,18>
ZAD[0..16] ZAD0 Y22 AE19
<9> ZAD[0..16] ZAD0 IDA0
ZAD1 Y25 AD18
ZAD2 ZAD1 IDA1
Y23 ZAD2 IDA2 AC17
ZAD3 W21 AF18
ZAD4 ZAD3 IDA3 +3VS
Y26 ZAD4 IDA4 AB16
ZAD5 W22 AE17
ZAD6 ZAD5 IDA5 IDE_DIORDY R450 1 @
W24 ZAD6 IDA6 AD16 2 4.7K_0402_5%
ZAD7 W25 AF16 IDE_DD7
+1.8VS ZAD8 ZAD7 IDA7 IDE_IRQ R434 1
U21 ZAD8 IDA8 AE16 2 8.2K_0402_5%
ZAD9 U24 AF17
ZAD10 ZAD9 IDA9
U22 ZAD10 IDA10 AC16
1
MuTIOL
ZAD11 T22 AD17 IDE_DDREQ R441 1 @ 2 4.7K_0402_5%
R198 ZAD12 ZAD11 IDA11
U25 ZAD12 IDA12 AE18
ZAD13 T23 AB17 IDE_IRQ R437 1 @ 2 4.7K_0402_5%
150_0402_1% ZAD14 ZAD13 IDA13
T25 ZAD14 IDA14 AF19
ZAD15 T26 AC18 IDE_DD7 R259 1 2 5.6K_0402_5%
IDE
2
ZDREQ IIORA#
SZCMP_N IIOWA# AD19 R437 => Intel :Don't Pull-down SiS : Pull-down ? ohm (Un-Mount)
AB24 ZCMP_N IDACKA# AC19
SZCMP_P AB25 R218 => Intel :Don't Pull-down SiS : Pull-down 5.6K ohm (Mount)
ZCMP_P IDE_DIORDY
ICHRDYA AE20
AVDD_SZ4X AA22 AB18 IDE_DDREQ
AVSS_SZ4X AVDD_Z4X IDREQA IDE_IRQ +1.8VS
AB23 AVSS_Z4X IIRQA AB19
CBLIDA AC20 8mA
SZVREF AB26 ZVREF IDEAVDD IDEAVDD L66 1
<14> Z_CLK1 AC26 ZCLK AVDD_IDE V3 2
V4 IDEAVSS MBK1608121YZF_0603
+1.8VS AVSS_IDE
1 1 1
C536 C535 C521
1 2 SZCMP_N AE22
R206 56_0402_5% SPI_DI 0.1U_0402_16V4Z 0.01U_0402_16V7K 0.1U_0402_16V4Z
AD22
1
R204
2
56_0402_5%
SZCMP_P AF21
AE21
SPI_DO
SPI_CS1N
SPI_CS0N
SPI SPI_CLK
SPI_HARDWARE_TRAP
AF22
AF23 1 2
IDEAVSS
2 2
1
R428
2
0_0402_5%
2
R257 4.7K_0402_5%
SIS968-B0_TEBGA_570P
SPI_Hardware Trap
0:LPC (Default)
+1.8VS
1:SPI
16mA
L67 1 2 AVDD_SZ4X
A A
MBK1608121YZF_0603
1 1 1
C541 C549 C550
U11B
8mA +1.8VALW
C175 15P_0402_50V8J OSC32KHO E2 C8 AVSS_GMACCMP
OSC32KHI OSC32KHO AVSS_GMACCMP18 AVDD_GMACCMP AVDD_GMACCMP L38 1
E1 OSC32KHI AVDD_GMACCMP18 D9 2
10M_0402_5%
RTC
X1 MBK1608121YZF_0603
1
3 4 BAT_PWRGD F1 B8 MOSC25MHO 1 1
NC OUT BATOK OSC25MHO
R173
SB_PWRGD E4 A8 MOSC25MHI C459 C457
<9,31> SB_PWRGD PWROK OSC25MHI
2 NC IN 1 1
C473 +RTCVCC A12 GTXCLK PAD 0.1U_0402_16V4Z 0.01U_0402_16V7K
GTXCLK T4 2 2
32.768KHZ_12.5P_1TJS125BJ2A251 D1 F14 EXTCLK PAD T25
2
0.1U_0402_16V4Z RTCVDD EXTCLK AVSS_GMACCMP 1 2
C172 15P_0402_50V8J 2 TXCLK R832 0_0402_5%
D2 RTCVSS TXCLK B11 TXCLK <28>
D D
C12 TX_EN R389 1 2 33_0402_5%
TXEN TXEN <28>
8/07 modified from 12P to 15P C11 TXER PAD
TXER T24 Put closed to 968
<31,33> LPC_AD0 LPC_AD0 Y5
LPC_AD1 LAD0 TXD_0 R146 33_0402_5%
<31,33> LPC_AD1 AA4 LAD1 TXD0 D12 1 2 TXD0 <28>
GMAC
+3VS
LPC
<31,33> LPC_AD2 LPC_AD2 AB2 A13 TXD_1 R159 1 2 33_0402_5%
LAD2 TXD1 TXD1 <28>
<31,33> LPC_AD3 LPC_AD3 AB3 B13 TXD_2 R158 1 2 33_0402_5% MOSC25MHO
LAD3 TXD2 TXD2 <28>
R430 1 2 4.7K_0402_5% LPC_DRQ0# C13 TXD_3 R145 1 2 33_0402_5%
TXD3 TXD3 <28>
R429 1 2 10K_0402_5% SERIRQ LPC_FRAME# AB1 R151 0_0402_5%
<31,33> LPC_FRAME# LFRAME#
LPC_DRQ0# AB4 A14 RGMCMP_N R161 1 2 56_0402_5% +3VALW MOSC25MHI 1 @ 2
SERIRQ LDRQ# RGMCMP_N RGMCMP_P R160 1
R430 => Intel :Not Pull-up SiS : Pull-up 4.7K ohm (Mount)
<31> SERIRQ AA5 SIRQ RGMCMP_P B14 2 56_0402_5%
1
C14 RGMVREF R147 1 2 150_0402_1% +3VALW
RGMVREF R150
R429 => Intel :Pull-up 10K ohm (Mount) SiS :Not Pull-up RXCLK
RXCLK A11 RXCLK <28>
1
HD Audio
1 0_0402_5%
C10 RXDV R142 C120 Y4
RXDV <28>
2
HDA_SDIN0 RXDV RXER
<35> HDA_SDIN0 E5 HDA_SDIN0 RXER E12 RXER <28> 1 2
EMI Recommend HDA_SDIN1 C4 150_0402_1% 0.01U_0402_16V7K
<37> HDA_SDIN1 HDA_SDIN1 2
A10 RXD0 25MHZ_20PF_6X25000017
RXD0 <28>
2
HDA_SDOUT_SB RXD0 RXD1
Y3 HDA_SDOUT RXD1 C9 RXD1 <28>
HDA_BITCLK_SB 1 @ 2 @1 2 HDA_SYNC_SB Y2 B9 RXD2 C152 C151
HDA_SYNC RXD2 RXD2 <28>
R914 10_0402_5% C846 10P_0402_50V8J A9 RXD3
RXD3 RXD3 <28>
HDA_RST_SB# B3 33P_0402_50V8J 33P_0402_50V8J
HDA_BITCLK_SB HDA_RESET# COL
<35> HDA_BITCLK_AUDIO 1 2 Y1 HDA_BIT_CLK COL E10 COL <28>
R192 33_0402_5% E11 CRS
CRS CRS <28> the same with "180"
1 2 E14 H_MDC R260 1 2 33_0402_5% MDC
<37> HDA_BITCLK_MDC MDC MDC <28>
R194 33_0402_5% E13 MDIO MDIO <28> 7/30 modified from 27P to 33P
HDA_SDOUT_SB MDIO U9
<35> HDA_SDOUT_AUDIO 1 2
R201 33_0402_5% D8 GPIO21 GPIO23 4 5
C
GPIO21 GPIO22 GPIO22 DO GND C
<37> HDA_SDOUT_MDC 1 2 GPIO22 F8 3 DI NC 6
R203 33_0402_5% H_INIT# AC23 E8 GPIO23 GPIO21 2 7
<4> H_INIT# INIT# GPIO23 SK NC
1 2 HDA_SYNC_SB H_A20M# AE26 A7 GPIO24 GPIO24 1 8 +3VALW
<35> HDA_SYNC_AUDIO <4> H_A20M# A20M# GPIO24 CS VCC
PCI Express
<37> HDA_RST_MDC# 1 2 <4> H_STPCLK# AF25 STPCLK# PTX0+ N24 1 PCIE_ITX_C_PRX_P0 <29>
R167 33_0402_5% H_CPUSLP# AD24 N23 PCIE_ITX_PRX_N0 C511 1 2 0.1U_0402_10V7K PCIE_ITX_C_PRX_N0
<5> H_CPUSLP# CPUSLP# PTX0- PCIE_ITX_C_PRX_N0 <29>
8/29 change net from BAT_PWRGD to net +RTCVCC K26 PCIE_PTX_C_IRX_P1
PRX1+ PCIE_PTX_C_IRX_P1 <30>
K25 PCIE_PTX_C_IRX_N1
PRX1- PCIE_PTX_C_IRX_N1 <30>
L24 PCIE_ITX_PRX_P1 C512 1 2 0.1U_0402_10V7K PCIE_ITX_C_PRX_P1 NEW Card
+RTCVCC PTX1+ PCIE_ITX_C_PRX_P1 <30>
SMT1-05_4P L23 PCIE_ITX_PRX_N1 C506 1 2 0.1U_0402_10V7K PCIE_ITX_C_PRX_N1
PTX1- PCIE_ITX_C_PRX_N1 <30>
SW1 30mA +1.8VS
A@ H_PROCHOT# AC24 F26
CPU IU <4> H_PROCHOT# PROCHOT# NC11
1 3 H_THERMTRIP# AD25 F25 AVDD_PEXTRX L9 1 2
<4> H_THERMTRIP# THERMTRIP# NC10
AGPBUSY# AE23 G24 MBK1608121YZF_0603
<9> AGPBUSY# BMBUSY# NC9
2 4 NC8 G23 1 1
H26 C185 C186
NC7
H25
6
5
J1 C328
1U_0603_10V4Z 0.01U_0402_16V7K @ Title
2 2 2 2 JOPEN
Issued Date 2008/10/18 Deciphered Date 2009/10/18
SIS968(2/5)-PCIE_LAN_RTC
2
10U_0805_10V4Z 2
Decoupling Capacitor THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
0.1U_0402_16V4Z 10U_0805_10V4Z Custom 1.0
Please close to SB DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
KFT00 M/B LA-4821P Schematic
Date: Tuesday, March 10, 2009 Sheet 20 of 47
5 4 3 2 1
5 4 3 2 1
+1.8VALW 7mA
L8 1 2 USBPVDD18
MBK1608121YZF_0603 1 1
C170 C171
U11C
D 0.1U_0402_16V4Z 0.01U_0402_16V7K D
2 2 USBPVSS18
1 2
R168 0_0402_5% USB20_P0 D26 A22 USB_CLK_12M
USB <30>
<30>
USB20_P0
USB20_N0 USB20_N0 D25
UV0+ OSC12MHI
B22
USB_CLK_12M <14>
USB20_P1 UV0- OSC12MHO USBREF R402 1
E24 F20 2 127_0402_1%
+3VALW 8mA BT <33>
<33>
USB20_P1
USB20_N1 USB20_N1 E23
UV1+ USBREF
USB20_P2 UV1- USBPVDD18
A20 B26
L43 1 2
New Card <30>
<30>
USB20_P2
USB20_N2 USB20_N2 B20
UV2+ AVDD_USBPLL18
B25 USBPVSS18
MBK1608121YZF_0603 USB20_P3 UV2- AVSS_USBPLL18
C489
1 1
C478
Place C478,C489 close to <37> USB20_P3
USB20_N3
C19 UV3+ USBCMPAVDD18
D19 E21
FP
U11 Pin F17,F19,F22 <37>
<30>
USB20_N3
USB20_P4 USB20_P4 A18
UV3- AVDD_USBCMP18
E20 USBCMPAVSS18
0.1U_0402_16V4Z 0.01U_0402_16V7K USB20_N4 UV4+ AVSS_USBCMP18
B18
2 2 USB <30>
<30>
USB20_N4
USB20_P5 USB20_P5 C17
UV4-
D21 USBCMPAVDD33
USB20_N5 UV5+ AVDD_USBCMP33 USBCMPAVSS33
8mA USB <30> USB20_N5 D17 UV5- AVSS_USBCMP33 C21
<26> USB20_P6 USB20_P6 A16
C465
1 1
USBCMPAVDD33
C466
Place C465,C466
Card Reader <26>
<37>
USB20_N6
USB20_P7
USB20_N6
USB20_P7
USB20_N7
B16
C15
D15
UV6+
UV6-
UV7+
USB UVDD33
UVDD33
F17
F19
F22
USBCMPAVDD33
+1.8VALW 284mA
AVSS_SATAPLL33 AC8
AD8
AVSS_SATAPLL33
AVSS_SATAPLL33
SATA SRX1+
SRX1-
XIN
AE5
AE8
SATA_DTX_C_IRX_N1
SOSC25MHI 1
SATA_DTX_C_IRX_N1 <24>
2
R211 1 2 12K_0402_1% SATA_REXT AF7 AF8 R219 0_0402_5%
L44 1 UVDD18 C216 22P_0402_50V8J REXT XOUT
2 1 2
MBK1608121YZF_0603 1 1 AA3 H_SATA_LED#
C475 C474 SATA_CLK_DP HDACT
<14> SATA_CLK_DP AE15 CLK100P
SATA_CLK_DN AD15 AC1 ISWITCHOPEN1 R207 1 2 1K_0402_5%
<14> SATA_CLK_DN CLK100N ISWITCHOPEN1
0.1U_0402_16V4Z 0.01U_0402_16V7K AD1 ISWITCHOPEN0 R209 1 2 1K_0402_5%
2 2 ISWITCHOPEN0
1
R836 1 2 4.7K_0402_5% SB_PCIE_WAKE# R576 1 @ 2 10K_0402_5%
R205
@
10K_0402_5%
1
U39
OE#
H_SATA_LED# 2 4 SATA_LED#
+1.8VS A Y SATA_LED# <37>
6mA
G
L23 1 2 AVDD_SATARX @ TC7SET125FUF_SC70
3
MBK1608121YZF_0603 Remove R838 R839 R840 R552
1 1 Add RP43 Michael 2008/5/30
C222 C215
R837 1 2 0_0402_5%
0.1U_0402_16V4Z 0.01U_0402_16V7K +3VALW
2 2 RP43
1 2 AVSS_SATARX 5 4 USB_OC#2
R217 0_0402_5% 6 3 USB_OC#1
7 2 USB_OC#3
8 1 USB_OC#7
10K_1206_8P4R_5%
0.1U_0402_16V4Z 0.01U_0402_16V7K
2 2
1 2 AVSS_SATAPLL33
R440 0_0402_5% Security Classification Compal Secret Data
Title
Compal Electronics, Inc.
Issued Date 2008/10/18 Deciphered Date 2009/10/18
SIS968(3/5)-USB_SATA
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
KFT00 M/B LA-4821P Schematic
Date: Tuesday, March 10, 2009 Sheet 21 of 47
5 4 3 2 1
5 4 3 2 1
+3VS
1 1 1 1 1 1 1 1
C502 C507 C522 C534 C542 C538 C543 C556
0.1U_0402_16V4Z
2 2 2 2 2 2 2 2
D D
0.1U_0402_16V4Z 0.1U_0402_16V4Z 1U_0603_10V4Z 10U_0805_10V4Z
U11D +1.8VS
+1.05VS
22mA +1.8VS
AA21 VTT IVDD T18
+3VS AB22 J14 413mA
VTT IVDD 0.1U_0402_16V4Z 1U_0603_10V4Z 10U_0805_10V4Z
IVDD U9
V16 PVDD IVDD T9
29mA V15 PVDD IVDD R9 1 1 1 1 1 1 1 1
V14 P9 C514 C525 C526 C527 C539 C540 C524 C523
PVDD IVDD
T8 PVDD IVDD N9
N8 M9 0.1U_0402_16V4Z
PVDD IVDD 2 2 2 2 2 2 2 2
L9 PVDD IVDD K9
IVDD V10
W17 V11 0.1U_0402_16V4Z 0.1U_0402_16V4Z 1U_0603_10V4Z 10U_0805_10V4Z
W16
W15
W14
OVDD
OVDD
OVDD
OVDD
Power IVDD
IVDD
IVDD
IVDD
V12
V13
V17
W13 OVDD IVDD R17
+1.8VS +1.8VS C557,C555,C217,C228,C551,C554 +1.8VALW +1.05VS
W12 R18
K8
OVDD IVDD close to U30 Pin AVDD_SATA
OVDD 1U_0603_10V4Z
L8 OVDD VDDZ N18
M8 OVDD VDDZ W19 413mA
P8 OVDD VDDZ V19 1 1 1 1 1 1 1 1
R8 V18 C533 C555 C217 C228 C497 C488 C547 C793
OVDD VDDZ
U8 OVDD VDDZ U18
+3VALW V8 W18 0.01U_0402_16V7K 0.1U_0402_16V4Z 1U_0603_10V4Z 0.1U_0402_16V4Z 1U_0603_10V4Z
C
OVDD VDDZ 2 2 2 2 2 2 2 2 C
VDDZ P18
H19 OVDD_AUX VDDZ Y24
4mA H9 V24 0.1U_0402_16V4Z 10U_0805_10V4Z
OVDD_AUX VDDZ
H8 OVDD_AUX VDDZ T24
F7 OVDD_AUX VDDZ R24
+3VALW
J11 OVDD_AUX VDDZ AA25
+1.8VS C504,C509,C494,C495,C513,C503 +3VALW
J12 W26
OVDD_AUX VDDZ
U26 +1.8VALW close to U30 Pin AVDDPEX
VDDZ 1U_0603_10V4Z 1U_0603_10V4Z
H10 GMIIVDD_AUX
8mA H11 GMIIVDD_AUX IVDD_AUX J9
H12 GMIIVDD_AUX IVDD_AUX J8 19mA 1 1 1 1 1 1 1 1
H13 J10 C504 C509 C494 C495 C501 C500 C148 C510
+1.8VS GMIIVDD_AUX IVDD_AUX
J13 GMIIVDD_AUX IVDD_AUX J16
J17 0.01U_0402_16V7K 0.1U_0402_16V4Z
IVDD_AUX +1.8VS 2 2 2 2 2 2 2 2
K18 AVDDPEX IVDD_AUX J18
153mA L18 AVDDPEX
L19 W11 0.1U_0402_16V4Z 10U_0805_10V4Z 0.1U_0402_16V4Z 1U_0603_10V4Z
AVDDPEX AVDD_SATA
M18 AVDDPEX AVDD_SATA W10 190mA
M19 AVDDPEX AVDD_SATA W9
N19 AVDDPEX AVDD_SATA W8
H21 AVDDPEX AVDD_SATA V9
J21 AVDDPEX AVDD_SATA AF10
K21 AVDDPEX AVDD_SATA AE10
L21 AVDDPEX AVDD_SATA AD11 Put under 968 solder side
M21 AVDDPEX AVDD_SATA AD10
N21 AVDDPEX AVDD_SATA AC11
M22 AVDDPEX AVDD_SATA AC10
H22 AB11 +1.8VS +3VS +1.05VS
AVDDPEX AVDD_SATA
AVDD_SATA AB10
B 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z B
AVDD_SATA AB9
AVDD_SATA AB8
1 1 1 1 1 1 1 1 1 1
C537 C530 C520 C517 C794 C531 C519 C516 C532 C546
1 1 1 1 1 1 1 1 1 1
C493 C499 C482 C486 C492 C498 C513 C503 C551 C544
0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.01U_0402_16V7K 0.1U_0402_16V4Z 0.01U_0402_16V7K
2 2 2 2 2 2 2 2 2 2
A A
U11E
SIS968-B0_TEBGA_570P
A A
R373 1 @ 2 1K_0402_1% 8 DP
+5VS 9 +5V
10 +5V
11
12
MD
15
Follow JFT00 Smybol
GND GND
13 GND GND 14
SATA_DTX_C_IRX_P1 1 2 SATA_DTX_IRX_P1 1
2 <21> SATA_DTX_C_IRX_P1 GND 2
C373 0.01U_0402_16V7K SATA_ITX_C_DRX_P0_R1 2
SATA_ITX_C_DRX_N0_R1 A+
3 A-
4 GND
SATA_DTX_C_IRX_N0_R1 1 2 SATA_DTX_IRX_N0 5
C400 0.01U_0402_16V7K B-
6 B+
SATA_DTX_C_IRX_P0_R1 1 2 SATA_DTX_IRX_P0 7
C395 0.01U_0402_16V7K GND
+3VS 8 V33
9 V33
10 V33
11 GND
12 GND
13 GND
+5VS 14
+3VS +5VS V5
15 V5
0.1U_0402_16V4Z 10U_0805_10V4Z 16 V5
17 GND
1 1 1 1 1 18 Reserved
C366 C365 C367 C353 C354 1 19
C68 GND
20 V12
21 V12
2 2 2 2 2 0.1U_0402_16V4Z 22 V12
2 @
1000P_0402_50V7K 1U_0603_10V4Z 10U_0805_10V4Z
SUYIN_127043FR022G204ZL_NR
CONN@
3 3
Re and Rf close to Rd
SATA_ITX_C_DRX_P0 SATA_ITX_C_DRX_P0_R1
Rd
Re Rf
4 4
SATA_ITX_C_DRX_P0_R2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
HDD & ODD Connector
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
KFT00 M/B LA-4821P Schematic
Date: Tuesday, March 10, 2009 Sheet 24 of 47
A B C D E F G H
5 4 3 2 1
+3VS
+3VS
C496 1 2 0.1U_0402_16V4Z
C448 1 2 0.1U_0402_16V4Z
Connecte to CPU
1
U32 U24
P
Vcc
NC
D R401 1 2 33_0402_5% 2 4 R414 1 2 33_0402_5% R391 1 2 33_0402_5% 2 4 R842 1 2 33_0402_5% DPRSTP_N_INV D
<20> SB_DPRSLPVR A Y PM_DPRSLPVR_D <46> <20> SB_DPRSLPVR A Y
NC 1
G
1 1 NL17SZ14DFT2G_SOT353-5
C464 NL17SZ17DFT2G_SOT353-5 C460
3
@ @
0.01U_0402_16V7K 0.01U_0402_16V7K
2 2
Use SA00001N400 FootPrint
R553 1 @ 2 0_0402_5%
1
@ R157 R165
8/1 Rotate
1.05K_0402_1%
1.05K_0402_1%
200K_0402_5%
300_0402_5%
300_0402_5%
2
2
7/20 Reserved
8
C U10 C
U40
EN
DPRSTP_N_INV 1 6 H_DPRSTP# 7 2
A1 Y1 VREF2 VREF1
DPRSTP_N_INV 6 3
SCL2 SCL1 H_DPRSTP# <5,46>
2 GND VCC 5 +3VALW
H_DPSLP_N_LS 5 4
SDA2 SDA1 H_DPSLP# <5>
GND
H_DPSLP_N_LS 3 4 H_DPSLP#
A2 Y2
1
C173 PCA9306DCUR_VSSOP8
1
NC7WZ07P6X_NL_SC70-6 @ @
0.01U_0402_16V7K
2
+3VS +3VS
1 2
B C446 0.1U_0402_16V4Z B
5
5
U33
Vcc
2 4 1 2 2
P
<20> CPUSTP_N_OLD A Y B
R372 499_0402_1% 1 R371 33_0402_5% 4 H_DPSLP_N_LS
NC Y
G
U23 1 A
G
NL17SZ17DFT2G_SOT353-5
3
NC7SZ08P5X_NL_SC70-5
3
Vcc
1 2 2 A Y 4 1 2
R380 33_0402_5% 1 R379 33_0402_5%
NC
G
U31
1 1 NL17SZ17DFT2G_SOT353-5 +3VS
3
C447 C451
@ 1 2
100P_0402_50V8J 0.01U_0402_16V7K Use SA00001N400 FootPrint C452 0.1U_0402_16V4Z
2 2
5
U22
2
G Vcc
B CPUSTP#
Y 4 CPUSTP# <14>
1 A
NC7SZ32P5X_NL_SC70-5
3
A A
1
for 5158 and 5158E co-layout SP2 SDWP#
1
1 R857 R858
Michael 2008/6/18 C796 R843 @ @ SP3 SDCD#
@ 5159@ 10_0402_5% 10_0402_5%
47P_0402_50V8J 0_0402_5% SP4 SDCDAT1 MSWR
2
2
2
D 1 1 SP5 MSBS D
C812 C813
+3VS_CR_VCC @ @ SP6 MSCDAT1
0.1U_0402_16V4Z 10P_0402_50V8J 10P_0402_50V8J
2 2
SP7 SDCDAT0 MSCDAT0
1 1 1
C799 2 2 SP8 SDCDAT7 MSCDAT2
C800 C801
1U_0603_10V4Z C797 C798 U41 SP9 MS_INS#
2 2 2
1U_0603_10V4Z 0.1U_0402_16V4Z
AV_PLL 1 1
1 AV_PLL SP10 SDCDAT6 MSCDAT3
0.1U_0402_16V4Z 3 NC
7 NC SP11 SDCCLK MSCCLK
+VCC_OUT 9 CARD_3V3
11 D3V3 SP12 SDCDAT5 MSCDAT6
33 D3V3 10 AV_PLL
VREG
MS_D4 22 SP13 SDCDAT4 MSCDAT7
NC 30
+3VS_CR_VCC 1 R844 2 0_0603_5% +3V3_IN 8 3V3_IN SP14
1 2 CARD_RST# 44
<20> CARD_RST#_R RST#
+3VALW 1 @ 2 R875 MODE_SEL 45 SP15 SDCDAT3
R845 0_0603_5% MODE_SEL
1 C803 @ 0_0402_5% CARD_XTLO 47 XTLO XD_CLE_SP19 43
CARD_XTLI 48 42 SP16 SDCDAT2
C802 0.1U_0402_16V4Z XTLI XD_CE#_SP18
XD_ALE_SP17 41
+3VS_CR_VCC 4.7U_0805_10V4Z USB20_N6 4 40 SDDAT2_XDRE# SP17
2 <21> USB20_N6 DM SD_DAT2/XD_RE#_SP16
<21> USB20_P6 USB20_P6 5 39 SDDAT3_XDWE#
DP SD_DAT3/XD_WE#_SP15
14 GPIO0 XD_RDY_SP14 38 SP18
1
SD_DAT4/XD_WP#/MS_D7_SP13 37
R846 35 R847 0_0402_5% SP19
C 100K_0402_5% SD_DAT5/XD_D0/MS_D6_SP12 SDCLK_MSCLK SD_CLK C
SD_CLK/XD_D1/MS_CLK_SP11 34 1 2
31 SDDAT6_MSD3 R848 0_0402_5%
SD_DAT6/XD_D7/MS_D3_SP10 MS_INS# MS_CLK
29 1 2
2
MS_INS#_SP9
1 R849 2 CARD_RST#
SD_DAT7/XD_D2/MS_D2_SP8 28 SDDAT7_MSD2
0_0603_5% 27 SDDAT0_MSD0
SD_DAT0/XD_D6/MS_D0_SP7
1
C804 26 SP6
SD_DAT1/XD_D3/MS_D1_SP6 MS_BS +3VS_CR_VCC
XD_D5_SP5 25
@ R850 23 XDD4_SDDAT1
1U_0603_10V4Z 499K_0402_1% XD_D4/SD_DAT1_SP4 SD_CD# U42
SD_CD#_SP3 21
20 SD_WP 8 1 CARD_EECS
2
16 CARD_EECS
EECS
<14> CLK_48M_CR 1 R899 2 CARD_XTLI 1 2 CARD_XTLO R900 6 AGND EESK 17 CARD_EESK
0_0402_5% 46 36 SD_CMD
12MHZ_16P_6X12000012 6.19K_0402_1% AGND SD_CMD
JREAD1
2
R854 +VCC_3IN1 6
@ R855 RTS5158E-GR_LQFP48_7X7 SDDAT0_MSD0 VDD_SD
9 DAT0_SD
270K_0402_5% 0_0402_5% 5158E@ XDD4_SDDAT1 10
SDDAT2_XDRE# DAT1_SD
1 1 2 DAT2_SD
C806 C807 SDDAT3_XDWE# 3
2
@ @ SD_CLK CD/DAT3_SD
7 CLK_SD
6P_0402_50V8J 6P_0402_50V8J SD_WP 11
B 2 2 SD_CMD WP_SD B
4 CMD_SD
SD_CD# 1 CD_SD
5 VSS_SD
8 VSS_SD
10U_0805_10V4Z
0_0603_5%
0.1U_0402_16V4Z
12 VSS_MS
C808
1 1 22 GND
23 GND
C809
C839
4.7U_0805_10V4Z @ PROCO_MDR019-C0-1202
2 2 CONN@
+3VS
W=40mils
Add C822 4.7u and reserve C808 10u
1
S
2
2
G
1 @ 2 2
<31> CR_ON#
R913 100K_0402_5% Q56
SI2301BDS_SOT23
@
Security Classification Compal Secret Data Compal Electronics, Inc.
D Issued Date 2008/10/18 Deciphered Date 2009/10/18 Title
W=40mils RTS5158E Cardreader
1
+3VS_CR_VCC THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
KFT00 M/B LA-4821P Schematic
Date: Tuesday, March 10, 2009 Sheet 26 of 47
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
None
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
KFT00 M/B LA-4821P Schematic
Date: Tuesday, February 10, 2009 Sheet 27 of 47
5 4 3 2 1
5 4 3 2 1
+3VALW
T1
TPRX+ 1 16 RX+
TPRX- RD+ RX+ RX-
2 RD- RX- 15
R149 +3V_LAN +3V_LAN_AVDD PWFBOUT R33 0_0603_5% RCT 3 14 RXCT
+3V_LAN CT CT
Other CG use 1210 4 NC NC 13
0_0603_5% Other CG use 5 12
L6 TCT NC NC TXCT
1 6 CT CT 11
1 2 C56 TPTX+ 7 10 TX+
+3V_LAN FBM-L11-160808-601LMT_0603 TPTX- TD+ TX+ TX-
D 8 TD- TX- 9 D
1 1 1 1 0.1U_0402_16V4Z
C150 C149 C147 C102 2
350uH_NS0013LF
R350 1 2 1.5K_0402_1% MDIO 10U_0805_10V4Z 4.7U_0805_10V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
2 2 2 2
R366 1 2 @ 4.7K_0402_5% ISOLATE
R152 1 2 @ 4.7K_0402_5% COL R30 0_0603_5% 7/20 Swap pin 1,2 to 7,8 and 16,15 to 10,9
R368 1 4.7K_0402_5% LED0
2 change T1 from SP050001310(Lankcom)
Place L47, C460, C462, C463 as close to each power pin 1
R367 1 2 4.7K_0402_5% LED1
as possible.
C50 to SP050004L00(TAIMAG)
R153 1 2 4.7K_0402_5% LED2 0.1U_0402_16V4Z
2
R154 1 2 4.7K_0402_5% LED3
+3V_LAN +3V_LAN
R364 1 2 4.7K_0402_5% LED4
1
R109 1 2 33_0402_5% RXD_V 22 8 PWFBIN
<20> RXDV RXDV PWFBIN
R117 1 2 33_0402_5% RXD_0 21 R362
<20> RXD0 RXD0
R122 1 2 33_0402_5% RXD_1 20 LED3 D4 2 1 RLS4148_LL34-2
<20>
<20>
RXD1
RXD2
R129 1
R135 1
2 33_0402_5%
33_0402_5%
RXD_2
RXD_3
19
RXD1
RXD2 TPRX-
4.7K_0402_5% Lan Conn.
<20> RXD3 2 18 30 8/1 Change D7,D8 from SC1B751V010 to SC11N414880
2
R138 1 33_0402_5% RXC RXD3 TPRX- TPRX+ D34
<20> RXCLK 2 16 RXC TPRX+ 31
R903 1 2 33_0402_5% COL_R 1 2
<20> COL
R904 1 2 33_0402_5% CRS_R 23
COL 1
C435 1
EMI Recommend
<20> CRS CRS
Network I/F
1 1
2 2
1
FOX_AS0B226-S40N-7F 100K_0402_5% R462 Please place these caps between JMIN1 and JMIN2
CONN@ @
10K_0402_5%
For Arcadyan Broadcom 4312 DCLK C757 1 2 @ 100P_0402_50V8J
2
PK292008Y10 and Arcadyan Ralink WN7612A MINI_RF_OFF# DDATA C758 1 2 @ 100P_0402_50V8J
PK29200BN00 WLAN pull +3VS 1
D
4 +3VS +1.5VS Q45 2 RF_ON# 4
RF_ON# <31>
SSM3K7002FU_SC70-3 G
S
3
1 1 1 1 1 1
C206 C205 C199 C241 C207 C203
JAQ60
New Card
JEXP1
1 1 1 GND
C695 C696 <21> USB20_N2 USB20_N2 2
@ USB20_P2 USB_D-
<21> USB20_P2 3 USB_D+
+1.5VS 0.1U_0402_16V4Z 4.7U_0805_10V4Z CP_USB# 4
C694 U18 2 2 CPUSB#
40 mils 5 RSV
2 1 0.1U_0402_16V4Z 12 1.5Vin 1.5Vout 11 +1.5VS_CARD1 6 RSV
14 13 DCLK 7
1 +3VS 1.5Vin 1.5Vout <14,29> DCLK SMB_CLK 1
<14,29> DDATA DDATA 8
C689 +1.5VS_CARD1 SMB_DATA
60 mils +1.5VS_CARD1 9 +1.5V
2 1 0.1U_0402_16V4Z 2 3.3Vin 3.3Vout 3 +3VS_CARD1 10 +1.5V
4 5 SB_PCIE_WAKE# 11
3.3Vin 3.3Vout <7,21,29> SB_PCIE_WAKE# WAKE#
2 1 0.1U_0402_16V4Z 1 1 +3VALW_CARD1 12 +3.3VAUX
+3VALW C693 17 15 +3VALW_CARD1 40 mils C697 C698 PERST1# 13
AUX_IN AUX_OUT @ PERST#
+3VS_CARD1 14 +3.3V
PCI_RST# 6 19 0.1U_0402_16V4Z 4.7U_0805_10V4Z 15
<19,28,29,31,33> PCI_RST# SYSRST# OC# 2 2 +3.3V
EXP_CLKREQ# 16
<14> EXP_CLKREQ# CLKREQ#
SYSON 20 8 PERST1# CP_PE# 17
<31,39> SYSON SHDN# PERST# <20> CP_PE# CPPE#
PCIE_CLK_EXP# 18
<14> PCIE_CLK_EXP# REFCLK-
SUSP# 1 16 PCIE_CLK_EXP 19
<31,39,42,44,45> SUSP# STBY# NC <14> PCIE_CLK_EXP REFCLK+
20 GND
+3VALW 2 1 CP_PE# 10 7 PCIE_PTX_C_IRX_N1 21
CPPE# GND <20> PCIE_PTX_C_IRX_N1 PERn0
R635 100K_0402_5% PCIE_PTX_C_IRX_P1 22
+3VALW_CARD1 <20> PCIE_PTX_C_IRX_P1 PERp0
2 1 CP_USB# 9 23
R636 100K_0402_5% CPUSB# PCIE_ITX_C_PRX_N1 GND
<20> PCIE_ITX_C_PRX_N1 24 PETn0
18 PCIE_ITX_C_PRX_P1 25
RCLKEN <20> PCIE_ITX_C_PRX_P1 PETp0
26 GND
R5538D001-TR-F_QFN20_4X4~D 1 1
C699 C700 27 29
internal pull high to 3.3Vaux-in @ 28
GND1
GND2
GND3
GND4 30
0.1U_0402_16V4Z 4.7U_0805_10V4Z
EC need setting at Hi-Z & output Low 2 2 SANTA_130810-1
CONN@
USB Connector
L69 <EMI> @
+USB_VCCA
W=80mils +USB_VCCB
W=80mils 1 2
Update New Symbol D74 @<EMI>
1 2 USB20_R_P0 USB20_R_N0
3 I/O I/O 2
+USB_VCCA +USB_VCCB +USB_VCCA
1 1 4 4 3 3
1 1 1 1 +USB_VCCA 4 VCC GND 1
+ C564 C563 C768 + C832 C830 C831 WCM2012F2SF-121T04_0805 JUSB1
@ @ 1 PJLCR05 SOT143
150U_D_6.3VM 470P_0402_50V7K 10U_0805_10V4Z 150U_D_6.3VM 470P_0402_50V7K 10U_0805_10V4Z USB20_N0 R878 1 <EMI> USB20_R_N0 VCC
<21> USB20_N0 2 0_0402_5% 2 D-
2 2 2 2 2 2 USB20_P0 R879 1 <EMI>
<21> USB20_P0 2 0_0402_5% USB20_R_P0 3 D+
4 GND
5 GND1
6 GND2
7 GND3
8 GND4 D75 @<EMI>
SUYIN_020173MR004S558ZL USB20_R_N4 USB20_R_P4
Change SA005280110 SOP8 CONN@
3 I/O I/O 2
WCM2012F2SF-121T04_0805
+5VALW +USB_VCCA +3VALW 4 4 3 3 +USB_VCCB 4 VCC GND 1
3 PJLCR05 SOT143 3
2
1 2 +USB_VCCB
R468 1 2
U26 L70 <EMI> @ JUSB2
1 8 10K_0402_5%
GND OUT USB20_N4 R880 1 <EMI> 1
2 7 <21> USB20_N4 2 0_0402_5% USB20_R_N4
1
@ 8 10
0.1U_0402_16V4Z WCM2012F2SF-121T04_0805 SUYIN_020122MR008S535ZA 4 1
2 +USB_VCCB VCC GND
<31> USB2_ON# 4 4 3 3 CONN@
PJLCR05 SOT143
1 1 2 2
L71 <EMI> @
R884
U44 +USB_VCCB
1 8 10K_0402_5% 01/06 Add C860 for ESD Recommend
GND OUT
2 7
1
IN OUT
3 IN NC 6 1
1 4 5 C860
4 EN# OC USB_OC#45 <21> 4
C833 <EMI>
G545A2P8U MSOP 8P 0.1U_0603_25V7K
4.7U_0805_10V4Z 2
2 Close to JUSB2 1
C834
@
0.1U_0402_16V4Z
2
<31> USB2_ON#
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2008/10/18 Deciphered Date 2009/10/18 Title
NewCard & USB Connector
11/29 change this symbol's footprint as THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B 1.0
ADT7421ARMZ-REEL_MSOP8 DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
KFT00 M/B LA-4821P Schematic
Date: Tuesday, March 10, 2009 Sheet 30 of 47
A B C D E
5 4 3 2 1
1
2 1 TP_CLK R316 1 2 4.7K_0402_5%
C355 C363 1 1 1 1 1 1 R312
0.1U_0402_16V4Z
C396
0.1U_0402_16V4Z
C417
0.1U_0402_16V4Z
C406
0.1U_0402_16V4Z
C386
1000P_0402_50V7K
C815
1000P_0402_50V7K
C359
20 mils RA@ TP_DATA R315 1 2 4.7K_0402_5%
0.1U_0402_16V4Z 1000P_0402_50V7K Ra 100K_0402_5%
1 ECAGND 2
1 2
2
L27 FBM-11-160808-601-T_0603 2 2 2 2 2 2 MB_ID PCI_RST# R256 1 2 100K_0402_5%
1
20 mils 1
C356 R311
111
125
12_A@
22
33
96
67
Rb
9
D U21 0.1U_0402_16V4Z 0_0402_5% D
2
VCC
VCC
VCC
VCC
VCC
VCC
AVCC
2
+3VALW
1 2
R342 0_0402_5%
KSO1 R885 1 2 47K_0402_5%
D22 @ GATEA20 1 21 INVT_PWM
<20> GATEA20 GA20/GPIO00 INVT_PWM/PWM1/GPIO0F INVT_PWM <16>
KB_RST# 2 1 2 23 BEEP# KSO2 R886 1 2 47K_0402_5%
<20> KB_RST# KBRST#/GPIO01 BEEP#/PWM2/GPIO10 BEEP# <35>
<20> SERIRQ SERIRQ 3 26
RB751V_SOD323 LPC_FRAME# SERIRQ# FANPWM1/GPIO12 ACOFF
<20,33> LPC_FRAME# 4 LFRAME# ACOFF/FANPWM2/GPIO13 27 ACOFF <42> ENE Recommend
C426 <20,33> LPC_AD3 LPC_AD3 5
@ LPC_AD2 LAD3 ECAGND
2 1 2 1 <20,33> LPC_AD2 7 LAD2 PWM Output 1 2
R340 10_0402_5%<20,33> LPC_AD1 LPC_AD1 8 63 BATT_TEMP C816 0.01U_0402_16V7K ESB_CLK_R
LAD1 BATT_TEMP/AD0/GPIO38 BATT_TEMP <41>
@ 22P_0402_50V8J LPC_AD0 BATT_OVP
<20,33> LPC_AD0 10 LAD0 LPC & MISC BATT_OVP/AD1/GPIO39 64
ADP_I
BATT_OVP <42>
ESB_DAT_R
ADP_I/AD2/GPIO3A 65 ADP_I <42>
CLK_PCI_EC 12 AD Input 66 1
<14> CLK_PCI_EC PCICLK AD3/GPIO3B
PCI_RST# 13 75 C719 C720
<19,28,29,30,33> PCI_RST# PCIRST#/GPIO05 AD4/GPIO42
R331 1 2 EC_RST# 37 76 MB_ID @
+3VALW ECRST# SELIO2#/AD5/GPIO43
47K_0402_5% EC_SCI# 20 22P_0402_50V8J 33P_0402_50V8J
<20> EC_SCI# SCI#/GPIO0E
1 <20> PM_CLKRUN# 1 @ 2 38 <EMI> 2 <EMI>
C391 R329 0_0402_5% CLKRUN#/GPIO1D DAC_BRIG
DAC_BRIG/DA0/GPIO3C 68 DAC_BRIG <16>
70 EN_FAN1 02/10 Change C720 from mount
EN_DFAN1/DA1/GPIO3D EN_FAN1 <4> @
0.1U_0402_16V4Z DA Output 71 IREF
2 KSI0 IREF/DA2/GPIO3E CHGVADJ
IREF <42> (33pF) to @ for LED random turn off issue
55 KSI0/GPIO30 DA3/GPIO3F 72 CHGVADJ <42> 01/06 Change C720 from @ to mount
KSI1 56
KSI2 KSI1/GPIO31 AUX_PWRGD
(33pF) for EMI Recommend
+3VALW 2 1 57 KSI2/GPIO32
R347 10K_0402_5% KSI3 58 83 BEEP#
EC_PME# KSI4 KSI3/GPIO33 PSCLK1/GPIO4A SYSON
<20> PCI_PME# 1 2 59 KSI4/GPIO34 PSDAT1/GPIO4B 84
R349 0_0402_5% KSI5 60 85 EC_SCI#
+5VALW KSI6 KSI5/GPIO35 PSCLK2/GPIO4C EC_THERM#
61 KSI6/GPIO36 PS2 Interface PSDAT2/GPIO4D 86
C KSI7 62 87 TP_CLK SERIRQ C
KSI7/GPIO37 TP_CLK/PSCLK3/GPIO4E TP_CLK <33>
100P_0402_50V8J
100P_0402_50V8J
100P_0402_50V8J
100P_0402_50V8J
100P_0402_50V8J
100P_0402_50V8J
1 2 EC_SMB_CK1 KSO0 39 88 TP_DATA
KSO0/GPIO20 TP_DATA/PSDAT3/GPIO4F TP_DATA <33>
R317 4.7K_0402_5% KSO1 40
EC_SMB_DA1 KSO2 KSO1/GPIO21 FP_ON#
1 2 41 KSO2/GPIO22 FP_ON# <37>
R310 4.7K_0402_5% KSO3 42 97 R320 1 @ 2 10K_0402_5% 1 1 1 1 1 1
KSO4 KSO3/GPIO23 SDICS#/GPXOA00 MUTE_LED#
43 KSO4/GPIO24 SDICLK/GPXOA01 98 MUTE_LED# <35>
KSO5 CAM_ON#
ISP MODE SUPPORT
KSO6
44 KSO5/GPIO25 Int. K/B SDIDO/GPXOA02 99
LID_SW#
CAM_ON# <37>
45 KSO6/GPIO26 Matrix SDIDI/GPXID0 109 LID_SW# <34> No stuff when use KB926C0 2 2 2 2 2 2
2 @ 1 KSO3 KSO7 46 SPI Device Interface KB926 SPI STRAP PIN
R327 4.7K_0402_5% KSO[0..15] KSO8 KSO7/GPIO27
<32> KSO[0..15] 47 KSO8/GPIO28
KSO9 48 119 FRD#SPI_SO C401 C416 C418
KSI[0..7] KSO9/GPIO29 SPIDI/RD# FRD#SPI_SO <33>
KSO10 49 120 FWR#SPI_SI C419 C360 C840
<32> KSI[0..7] KSO10/GPIO2A SPIDO/WR#
+3VS KSO11 50 SPI Flash ROM 126 SPI_CLK
KSO12 KSO11/GPIO2B SPICLK/GPIO58 FSEL#SPICS#
51 KSO12/GPIO2C SPICS# 128
1 2 EC_SMB_CK2 KSO13 52 SB_PWRGD
R309 2.2K_0402_5% KSO14 KSO13/GPIO2D PBTN_OUT#
53 KSO14/GPIO2E
1 2 EC_SMB_DA2 KSO15 54 73 S3AUXSW# EN_FAN1
KSO15/GPIO2F CIR_RX/GPIO40 S3AUXSW# <8>
100P_0402_50V8J
100P_0402_50V8J
100P_0402_50V8J
R308 2.2K_0402_5% 1 1 02/10 Change L55,L56 from 81 74 PSON#
KSO16/GPIO48 CIR_RLC_TX/GPIO41 PSON# <20>
EC Recommend C357 C358 82 89 FSTCHG 01/08 Add U46 (SC300001100) for ESD recommend
@ @
300ohm bead to 33ohm KSO17/GPIO49 FSTCHG/SELIO#/GPIO50 CHARGE_LED0#
FSTCHG <42>
BATT_CHGI_LED#/GPIO52 90 CHARGE_LED0# <37>
100P_0402_50V8J 100P_0402_50V8J for LED random turn off issue 91 CAPS_LED#
2 2 CAPS_LED#/GPIO53 PAD T31@ 1 1 1
<41> EC_SMB_CK1 EC_SMB_CK1 77 GPIO 92 CHARGE_LED1# U46
SCL1/GPIO44 BATT_LOW_LED#/GPIO54 CHARGE_LED1# <37>
<41> EC_SMB_DA1 EC_SMB_DA1 78 93 PWR_LED# ON/OFF# 6 3 EC_ON
SDA1/GPIO45 SUSP_LED#/GPIO55 PWR_LED# <37> D1- D2-
<4> EC_SMB_CK2 EC_SMB_CK2 79 SM Bus 95 SYSON
SCL2/GPIO46 SYSON/GPIO56 SYSON <30,39> 2 2 2
<4> EC_SMB_DA2 EC_SMB_DA2 80 121 VR_ON 5 2
+3VALW SDA2/GPIO47 VR_ON/XCLK32K/GPIO57 VR_ON <46> +3VALW VCC GND
127 ACIN
AC_IN/GPIO59 ACIN <40>
01/06 Change L55,L56 from 0ohm to 4 1 USB2_ON# C415
ESB_CLK D2+ D1+ C361 C818
1 2 300ohm bead for EMI Recommend PM_SLP_S3#
R887 4.7K_0402_5% 6 100 AUX_PWRGD IP4223CZ6_SO6
B <20> PM_SLP_S3# PM_SLP_S3#/GPIO04 EC_RSMRST#/GPXO03 AUX_PWRGD <9,20> B
1 2 ESB_DAT PM_SLP_S5# 14 101 EC_LID_OUT# @ <EMI>
<20> PM_SLP_S5# PM_SLP_S5#/GPIO07 EC_LID_OUT#/GPXO04 EC_LID_OUT# <20>
R888 4.7K_0402_5% EC_SMI# 15 102 EC_ON
<20> EC_SMI# EC_SMI#/GPIO08 EC_ON/GPXO05 EC_ON <34>
33_0402_5% 16 103 CR_ON#
LID_SW#/GPIO0A EC_SWI#/GPXO06 CR_ON# <26>
ESB_CLK_R L55 1 <EMI> 2 ESB_CLK 17 104 SB_PWRGD
<34> ESB_CLK_R SUSP#/GPIO0B ICH_PWROK/GPXO06 SB_PWRGD <9,20>
<34> ESB_DAT_R ESB_DAT_R L56 1 <EMI> 2 ESB_DAT 18 GPO 105 BKOFF# ACIN C389 1 2 100P_0402_50V8J
PBTN_OUT#/GPIO0C BKOFF#/GPXO08 BKOFF# <16>
+3VALW 33_0402_5% 19 GPIO 106 RF_ON#
EC_PME#/GPIO0D WL_OFF#/GPXO09 RF_ON# <29>
USB2_ON# 25 107 BT_ON# VR_ON C819 1 2 100P_0402_50V8J
<30> USB2_ON# EC_THERM#/GPIO11 GPXO10 BT_ON# <33>
1 @ 2 FRD#SPI_SO FAN_SPEED1 28 108
<4> FAN_SPEED1 FAN_SPEED1/FANFB1/GPIO14 GPXO11
R325 100K_0402_1% 29 ENBKL_Q C374 1 2 100P_0402_50V8J
EC_TX_P80_DATA FANFB2/GPIO15
<12,13,29> EC_TX_P80_DATA 30 EC_TX/GPIO16
1 @ 2 FSEL#SPICS# EC_RX_P80_CLK 31 110
<12,13,29> EC_RX_P80_CLK EC_RX/GPIO17 PM_SLP_S4#/GPXID1
R335 100K_0402_1% ON/OFF# 32 112 ENBKL_Q
<34> ON/OFF# ON_OFF/GPIO18 ENBKL/GPXID2
SCROLL_LED# 34 114 EAPD
<34> SCROLL_LED# PWR_LED#/GPIO19 GPXID3 EAPD <35,36>
1 2 SUSP# NUM_LED# 36 GPI 115 EC_THERM#
<34> NUM_LED# NUMLED#/GPIO1A GPXID4 EC_THERM# <20>
C413 @ 100P_0402_50V8J 116 SUSP#
GPXID5 SUSP# <30,39,42,44,45>
117 PBTN_OUT#
GPXID6 PBTN_OUT# <20>
118 EC_PME#
XCLKI GPXID7
122 XCLK1
SPI_CS# 1 2 FSEL#SPICS# XCLKO 123 124 +3VS R909 1 2 15K_0402_5% ENBKL_Q
<33> SPI_CS# XCLK0 V18R
R341 0_0402_5% 2 1
AGND
<33> SPI_CLK_R
1
R332 0_0402_5% C518 @ C
SPI_SI 1 2 FWR#SPI_SI XCLKI XCLKO 4.7U_0805_10V4Z 0.1U_0402_16V4Z +3VALW R869 1 2 10K_0402_5% 2 Q40
<33> SPI_SI 1 2 B
R326 0_0402_5% KB926QFA1 LQFP 128P MMBT3904_SOT23
11
24
35
94
113
69
ENE Recommend E
KB926 D3
3
1
C820 C821 R546 C
1
ECAGND
1 2 2 Q39
<18> ENBKL B
12P_0402_50V8J 12P_0402_50V8J MMBT3904_SOT23
OUT
IN
47K_0402_5% E
EC DEBUG PORT
3
A A
NC
+3VALW 1 1
EC_TX_P80_DATA 2 X2
2
EC_RX_P80_CLK 2 32.768KHZ_12.5P_1TJS125BJ2A251
3
4
3
4
Security Classification Compal Secret Data
Title
Compal Electronics, Inc.
ACES_85205-0400
Issued Date 2008/10/18 Deciphered Date 2009/10/18
DBCONN@
EC_KB926
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Modify X2 part number from SJ132P7KW10 AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 1.0
to SJ132P7K220 for cost down; Michael 2008/5/30 DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
KFT00 M/B LA-4821P Schematic
Date: Tuesday, March 10, 2009 Sheet 31 of 47
5 4 3 2 1
5 4 3 2 1
INT_KBD Conn.
KSI[0..7]
KSI[0..7] <31>
JKB1
D
KSO15 1
Follow JFT00 Smybol KSO[0..15]
D
1 KSO[0..15] <31>
KSO10 2
KSO11 2
3 3
KSO14 4
KSO13 5
4 Delete C525~C548 SE071101J80 (100pF)
KSO12 5
KSO3
6
7
6 Add SI102101K80 (CP : 100pF)
7
KSO6
KSO8
8
9
8 (EMI Recommend)
KSO7 9
10 10
KSO4 11
KSO2 11
12 12
KSI0 13 CP1 <EMI> CP4 <EMI>
KSO1 13 KSI4 KSO6
14 14 1 8 1 8
KSO5 15 KSI5 2 7 KSO3 2 7
KSI3 15 KSO0 KSO12
16 16 3 6 3 6
KSI2 17 KSI2 4 5 KSO13 4 5
KSO0 17
18 18
KSI5 19 100P_1206_8P4C_50V8 100P_1206_8P4C_50V8
KSI4 19
20 20
KSO9 21 CP2 <EMI> CP5 <EMI>
KSI6 21 KSI1 KSI3
22 22 1 8 1 8
KSI7 23 KSI7 2 7 KSO5 2 7
KSI1 23 KSI6 KSO1
24 24 3 6 3 6
KSO9 4 5 KSI0 4 5
100P_1206_8P4C_50V8 100P_1206_8P4C_50V8
25 GND1
C 26 CP3 <EMI> CP6 <EMI> C
GND2 KSO2 KSO14
1 8 1 8
ACES_85201-24051 KSO4 2 7 KSO11 2 7
CONN@ KSO7 3 6 KSO10 3 6
KSO8 4 5 KSO15 4 5
100P_1206_8P4C_50V8 100P_1206_8P4C_50V8
B B
A A
0.1U_0402_16V4Z
For EC+BIOS
JTP1
G2 8
G1 7
+3VALW 6
6
5 5 +5VS
4 TP_DATA TP_DATA <31>
20mils 4 TP_CLK
1 3 3 TP_CLK <31>
C836 U45 2
2
8 VCC VSS 4 1 1
0.1U_0402_16V4Z
2 ACES_87151-06051
3 W CONN@
7 HOLD
SPI_CS# 1
<31> SPI_CS# S
SPI_CLK_R 6
<31> SPI_CLK_R C
SPI_SI 5 SPI_SO 2
<31> SPI_SI D Q 2 R889
1
0_0402_5%
FRD#SPI_SO <31>
SST25LF080A_SO8-200mil TP_DATA TP_DATA
SA000012E00 TP_CLK TP_CLK
1 1
2
C837 C838
@ @ D77
100P_0402_50V8J 100P_0402_50V8J @
2 2 PSOT24C_SOT23-3
1
Bluetooth Conn.
+5VS
R529 +BT_VCC
4 4 3 3
10K_0402_5% JBT1
WCM2012F2SF-121T04_0805 8 10
2
8 GND
7 7
BT_LED# <21> USB20_P1 USB20_P1 R638 1 <EMI> 2 0_0402_5% USB20_R_P1 6
<37> BT_LED# 6
<21> USB20_N1 USB20_N1 R639 1 <EMI> 2 0_0402_5% USB20_R_N1 5
BT_ACTIVE 5
<29> BT_ACTIVE 4 4
1
D WLAN_ACTIVE
<29> WLAN_ACTIVE 3 3
Q18 2 BTON_LED 2
G 2
SSM3K7002FU_SC70-3 1 1 GND 9
S
3
CONN@
R530 ACES_87213-0800G
10K_0402_5%
2
+3VS
+3VALW
JDB1
1 1
1 2 CLK_PCI_DB
2 CLK_PCI_DB <14>
C553 C554 3
3 LPC_AD0
4 4 LPC_AD0 <20,31>
0.1U_0402_16V4Z 1U_0603_10V4Z 5 LPC_AD1 LPC_AD1 <20,31>
5
3
2
S
6 LPC_AD2 LPC_AD2 <20,31>
G 6 LPC_AD3
<31> BT_ON# 1 2 2 7 7 LPC_AD3 <20,31>
R531 100K_0402_5% Q19 8 LPC_FRAME#
8 LPC_FRAME# <20,31>
SI2301BDS_SOT23 9
9 PCI_RST#
D 10 10 PCI_RST# <19,28,29,30,31>
W=40mils 11
1
GND
+BT_VCC GND 12 1
1 ACES_85201-1005N C576
C557 C558 DBCONN@ @
@ 2 0.1U_0402_16V7K
4.7U_0805_10V4Z 0.1U_0402_16V4Z
2
ON/OFF switch
+3VALW
Conductive Board Conn.
R890 2 @ 1 0_0603_5%
+3VS Update Symbol
2
R533 +3VALW R891 2 1 0_0603_5%
1 100K_0402_5% R892 2 @ +3V_5VSW 1
+5VS 1 0_0603_5%
JSW1
1
SMT1-05_4P D26 +5VALW R893 2 @ 1 0_0603_5% 1 2
SW3 ON/OFF# ESB_CLK_R_L 1 2
2 ON/OFF# <31> 3 3 4 4
1 3 ON/OFFBTN# 1 ESB_DAT_R_L 5 6
51_ON# LID_SW# 5 6
3 51_ON# <40> <31> LID_SW# 7 7 8 8
2 4 +5V_LED 9 10
DAN202UT106_SC70-3 NUM_LED# R894 1 NUM_LED#_R 9 10
<31> NUM_LED# 2 0_0402_5% 11 11 12 12
SCROLL_LED# R895 1 2 0_0402_5% SCROLL_LED#_R 13 14
Power Button <31> SCROLL_LED#
6
5
13 14
15 15 16 16
ACES_85203-08421-11
1
2 CONN@
C561 D27
1000P_0402_50V7K RLZ20A_LL34
1 FBMA-11-100505-301T_0402
2
L73 1 <EMI> 2 ESB_CLK_R_L
<31> ESB_CLK_R
L74 1 <EMI> 2 ESB_DAT_R_L
<31> ESB_DAT_R
FBMA-11-100505-301T_0402
C866
<EMI>
02/18 Add L73,L74 and C866 for EMI recommend 33P_0402_50V8J
1
D
EC_ON 2
<31> EC_ON
G
2
S
3
R535 Q21
SSM3K7002FU_SC70-3
10K_0402_5% +5VALW R896 2 @ 1 0_0603_5%
1
2 R897 2 +5V_LED 2
+5VS 1 0_0603_5%
D70 DUAL@
1
R707 0_0402_5%
2 2 C623
2 1
220P_0402_50V7K
3 +MIC2_VREFO +MIC2_VREF_R G1 3 <EMI> DUAL@ 3
+MIC2_VREFO 1 2 G2 4
R725 0_0402_5%
1
1 ACES_85204-02001
D35
1
C723 R724 CONN@ MIC_GND @
27K_0402_5% R585 3
0.1U_0402_16V4Z @ 1
@ 2 0_0402_5% 2
Follow JFT00 Smybol
2
SINGLE@
2
PSOT05C-LF-T7 SOT-23-3
Internal MIC component close to U27 Internal MIC component close to U27
2 R586 1
SINGLE@
0_0402_5%
D71 DUAL@
+MIC2_VREF_R 2 1 1 R587 2
2.2K_0402_5%
RLS4148_LL34-2
JMICR1
MIC2_R_OUT 2 <EMI> MIC2_R
1 1 1
R708 0_0402_5%
MIC2_R <35>
2 2 C625
2 1
220P_0402_50V7K
@ G1 3 <EMI>
R866 0_0603_5% G2 4
ACES_85204-02001
CONN@ MIC_GND
R865 0_0603_5%
MIC_GND
GNDA Follow JFT00 Smybol
4 4
+3VS_DVDD
10mil
HD Audio Codec 1 1
L33 1 2
FBMA-L11-160808-800LMT_0603
+3VS C572 1 2 0.1U_0402_16V4Z
C570 C571
@ EC Beep
4.7U_0805_10V4Z
2 2 R541 1
<31> BEEP# 2 10K_0402_5% MONO_IN_1 1 2 MONO_IN
0.1U_0402_16V4Z C582 0.1U_0402_16V4Z
+AVDD_AC97
R852
0.1U_0402_16V4Z 40mil R543 1 2 10K_0402_5%
+VDDA <20> SB_SPKR
0_0603_5% R898 @ 0_0603_5%
D 1 1 1 1 +3VS
PCI Beep D
1
C573 C574 C575 C577
@ 10mil 1
C580
1
C581 R544
10U_0805_10V4Z 100P_0402_50V8J @
2 2 2 2 4.7U_0805_10V4Z 10K_0402_5%
2 2
2
0.1U_0402_16V4Z 0.1U_0402_16V4Z
25
38
9
U27
AVDD1
AVDD2
DVDD_IO
DVDD
14 35 AMP_LEFT
NC LINE_OUT_L AMP_LEFT <36>
15 36 AMP_RIGHT
NC LINE_OUT_R AMP_RIGHT <36>
1 2 MIC2_R_L C589 2.2U_0603_6.3V6K MIC2_C_L 16 39 AMP_LEFT_HP
<34> MIC2_L MIC2_L HP_OUT_L AMP_LEFT_HP <36>
R715 1K_0402_5%
1 2 MIC2_R_R C585 2.2U_0603_6.3V6K MIC2_C_R 17 41 AMP_RIGHT_HP
<34> MIC2_R MIC2_R HP_OUT_R AMP_RIGHT_HP <36>
R716 1K_0402_5%
23 LINE1_L NC 45
24 LINE1_R DMIC_CLK 46
18 CD_L NC 43
2/01 Let them floating
20 CD_R NC 44
C 19 C
CD_GND HDA_BITCLK_AUDIO
1 2 MIC1_R_L C591 2.2U_0603_6.3V6K MIC1_C_L 21
BIT_CLK 6 HDA_BITCLK_AUDIO <20> Sense Pin Impedance Codec Signals Funnction
<36> MIC1_L MIC1_L
R717 1K_0402_5%
MIC1_R_R C592 2.2U_0603_6.3V6K MIC1_C_R SDIN0 39.2K PORT-A (PIN 39, 41)
<36> MIC1_R 1
R718
2
1K_0402_5%
22 MIC1_R SDATA_IN 8 1
R545
2
33_0402_5%
HDA_SDIN0 <20> HP
C594 1 2 100P_0402_50V8J MONO_IN 12 37
@ PCBEEP MONO_OUT
20K PORT-B (PIN 21, 22) MIC
LINE1_VREFO 29 SENSE A / B
<20> HDA_RST_AUDIO# 11 RESET#
GPIO1 31 10K PORT-C (PIN 23, 24) LINE IN
<20> HDA_SYNC_AUDIO 10 SYNC
MIC1_VREFO_L 28 10mil +MIC1_VREFO_L
<20> HDA_SDOUT_AUDIO 5 SDATA_OUT 5.1K PORT-D (PIN 35, 36) LINE OUT
2
MIC1_VREFO_R 32 10mil +MIC1_VREFO_R
MUTE_LED# GPIO0
<31> MUTE_LED#
SENSE_A
3 GPIO3 MIC2_VREFO 30 10mil +MIC2_VREFO 39.2K PORT-E (PIN 14, 15) HP
SENSE_B
13
34
SENSE A
27 ACZ_VREF 10mil
SENSE B VREF
ACZ_JDREF
20K PORT-F (PIN 16, 17) MIC
<31,36> EAPD 47 EAPD JDREF 40 SENSE B
1
48 SPDIFO NC 33 1 1 10K PORT-G (PIN 43, 44) LINE IN
2
2
@ ALC268-GR_LQFP48
1
B
1 B
C598 DGND AGND
15P_0402_50V8J Change U27 from SA00001GD00 to SA00001GD10
2 @
ESD
+3VS
HDA_BITCLK_AUDIO
R864
Regulator for CODEC
2
4.7K_0402_5%
@ R549
1 2 SENSE_A
<36> MIC_SENSE
2
1 2 SENSE_B 0.01U_0402_16V7K
R551 20K_0402_1% Moat Bridge 2
A A
1 2
R861 0_0805_5% 10/2 change circuit U8 change footprint
SENSE FOR HP 1 2
R862 0_0805_5%
1 2
SENSE_A
R863 0_0805_5% Security Classification Compal Secret Data
Title
Compal Electronics, Inc.
<36> HP_SENSE 2 1 1 2 Issued Date 2008/08/30 Deciphered Date 2009/8/30
R554 39.2K_0402_1% R555 0_0805_5% <Title>
1 2
HD Audio Codec ALC268
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
R556 0_0805_5% AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
KFT00 M/B LA-4821P Schematic
Date: Tuesday, March 10, 2009 Sheet 35 of 47
5 4 3 2 1
A B C D E
+MIC1_VREFO_R
1
+5VALW R557 R558
fo=1/(2*3.14*R*C)=106Hz IN JACK
W=40mil 2.2K_0402_5% 2.2K_0402_5%
R=1.5K / C= 1uF
JEMIC1
2
680P_0402_50V7K
10U_0805_10V4Z
0.1U_0402_16V4Z
1 1 2 MIC_SENSE 5
<35> MIC_SENSE
C604 C605 C606 C607
4 10
+3VALW 1U_0603_10V4Z 9
R560 1 @ 2 2 1
2 1.5K_0402_1% <35> MIC1_R
MIC1_R L47 1 2 <EMI> MIC1_R_1 3 8
1 KC FBM-L11-160808-121LMT 0603 1
6 7
R562 1 @ 2 1.5K_0402_1% MIC1_L L48 1 2 <EMI> MIC1_L_1 2
<35> MIC1_L
KC FBM-L11-160808-121LMT 0603
11
19
20
10
1 1 1
1
C609 1 2 1U_0603_10V4Z U29 C610 C611
<35> AMP_RIGHT
3
<EMI> <EMI> FOX_JA6333L-B3S0-7F~N
CVDD
HVDD
PVDD
PVDD
VDD
C608 1 2 1U_0603_10V4Z 220P_0402_50V7K 220P_0402_50V7K CONN@
<35> AMP_LEFT 2 2
AMPR SPKR+
C841 1 2 1U_0603_10V4Z AMPL
3 INR_A ROUT+ 22
SPKR- @ RED
5 21
Trace width/spacing/other=8/6/50
1
INL_A ROUT- D29
R563 1 2 100K_0402_5% AMP_EN# 27 8 PSOT05C-LF-T7 SOT-23-3
/AMP EN LOUT+ <EMI>
LOUT- 9
+5VS R564 1 @ 2 100K_0402_5% HP_EN 24 HP EN HP_R
HP_R 17
1 2 AMP_RHPIN 1 2 INR_H 4 18 HP_L
<35> AMP_RIGHT_HP INR_H HP_L
C612 4.7U_0805_10V4Z R565 39K_0402_5% 6
AMP_LHPIN INL_H INL_H
1 2 1 2
<35> AMP_LEFT_HP
C613 4.7U_0805_10V4Z R566 39K_0402_5% 26 /SD
10mil
AMP_SD# 15 CVSS
AMP_BEEP CVSS
1 2 1 2 1 2 28
R569 0_0402_5% C614 0.47U_0603_16V4Z R567 0_0402_5% BEEP
16
HEADPHONE
AMP_CP+ VSS
1 2 AMP_CP-
12
14
CP+
2
OUT JACK
CP- GND
1
C617 1U_0603_10V6K 23 C619
AMP_BIAS PGND 1U_0603_10V6K JEHP1
25 BIAS PGND 7
C618 2.2U_0603_6.3V6K 13 HP_SENSE 5
<35> HP_SENSE
2
CGND
2 1 GND 29
C620 0.1U_0402_16V4Z 4 10
APA2057A_TSSOP28 9
HP_R L49 1 2 <EMI> HPR 3 8
9/5 If implement AMP BEEP, Swap C641 and R524. KC FBM-L11-160808-121LMT 0603 6 7
2 IN_A Gain = 10dB (Internal Speaker) HP_L L50 1 2 <EMI> HPL 2 2
R524 change from 0 Ohm to 47K KC FBM-L11-160808-121LMT 0603 1
IN_H Gain = 0dB (Headphone)
1
1 1
3
R570 R568 C615 C616 FOX_JA6333L-B3S0-7F~N
@ @ <EMI> <EMI> CONN@
0_0402_5% 0_0402_5%
11/28 Modified to X5R 10P_0402_50V8J2 2 10P_0402_50V8J
2
11/28 Change to SE080105K80 @
1
D30
PSOT05C-LF-T7 SOT-23-3 GREEN
Trace width/spacing=15/9 <EMI>
1
R571
10K_0402_1%
+3VALW 2
3 R573 3
1
1
1 C622
10K_0402_5% C621 R574
1
D 0.1U_0402_16V4Z
1
22K_0402_1% 2
2
G 0.01U_0402_16V7K 2
2
S
3
1
D
EAPD 2 1 2 Q23
<31,35> EAPD
R577 0_0402_5% G
Q24 S SSM3K7002FU_SC70-3
3
SSM3K7002FU_SC70-3
3
10 3.45 3.51 3.48 D31
@
11 3.56 3.62 3.59 PSOT24C_SOT23
<EMI>
1
4 4
1
HDA_RST_MDC# 11 12 HDA_BITCLK_MDC 1
<20> HDA_RST_MDC# IAC_RESET# IAC_BITCLK HDA_BITCLK_MDC <20>
1 C828 C829 R873
C629 @ @
0.1U_0402_16V4Z 1U_0603_10V4Z 0_0603_5%
GND
GND
GND
GND
GND
GND
3
2
S
22P_0402_50V8J
2
2 @ @
G
<31> CAM_ON# 1 2 2
R874 100K_0402_5% Q55
13
14
15
16
17
18
SI2301BDS_SOT23 +CAM_VCC
D @
Connector for MDC Rev1.5 W=20mils
1
+CAM_VCC
ACES_88018-124G 1 1
CONN@ C627 C628
R593
HDA_SDIN1 1 2 SDIN1_MDC 4.7U_0805_10V4Z 0.1U_0402_16V4Z
<20> HDA_SDIN1 2 2
33_0402_5% +VCC_MDC +3V_MDC JCAM1
1 1
USB20_N7 R594 1 2 0_0402_5% USB20_R_N7
Please add these caps close to JMDC1 as close as possible, <21>
<21>
USB20_N7
USB20_P7 USB20_P7 R595 1 2 0_0402_5% USB20_R_P7
2
3
2
HDA_SDOUT_MDC C752 3
1 2 @ 100P_0402_50V8J 1 1 4 4
C746 C745 5
HDA_SYNC_MDC C753 5
1 2 @ 100P_0402_50V8J 6 GND1
0.1U_0402_16V4Z 0.1U_0402_16V4Z 7
HDA_RST_MDC# C754 2 2 @ GND2
1 2 @ 100P_0402_50V8J @ L42 @ <EMI>
4 3 ACES_88266-05001
HDA_SDIN1 C756 4 3
1 2 @ 100P_0402_50V8J CAMCONN@
1 1 2 2
D73 @ <EMI>
USB20_R_P7 3 2 USB20_R_N7 WCM2012F2SF-121T04_0805
HDA_BITCLK_MDC I/O I/O
JMDC2 JRJ11
2
TIP
1 1 RING
1 Tip R868
+3VS 4 VCC GND 1
2 2 2 Ring PJLCR05 SOT143
G1 3 10_0402_5%
G2 4 3 GND1 @
2 2 4
1
ACES_85204-02001 C842 C843 GND2
CONN@ FOX_305-000-1176 1
330P_1808_3KV7K 330P_1808_3KV7K CONN@ C822
1 1
10P_0402_50V8J
2 @
Finger Print board
+3VS
W=20mils
1
1
C826 C827 R872
@ @
LED 0.1U_0402_16V4Z 1U_0603_10V4Z 0_0603_5%
3
2
S
2
G
1 @ 2 2
<31> FP_ON#
R871 100K_0402_5% Q54
SI2301BDS_SOT23
D @
R660 W=20mils
1
820_0402_5% +FP_VCC
+5VS 1 2 2 1 LED4 SATA_LED# <21>
HT-191NB_BLUE_0603
R596
820_0402_5%
+5VALW 1 2 2 1 LED1 PWR_LED# <31>
HT-191NB_BLUE_0603
D36 <EMI>
3 I/O I/O 2
R597 HT-191UD_AMBER_0603
820_0402_5% Amber
+5VALW 1 2 2 1 LED6 CHARGE_LED0# <31>
L72 @ <EMI> 4 VCC GND 1
4 4 3 3
R598 Blue PJLCR05 SOT143
1 2 2 1 LED7
+5VALW
820_0402_5%
CHARGE_LED1# <31>
1 2
EMI Request JFP1
1 2
HT-191NB_BLUE_0603
03/02 Change LED5,LED6 from WCM2012F2SF-121T04_0805
6 G1
5 G1
SC5191UD000 to SC500005T00 4
R599 USB20_P3 R640 1 USB20_R_P3 4
HT-191UD_AMBER_0603 <21> USB20_P3 2 0_0402_5% 3 3
820_0402_5% Amber <21> USB20_N3 USB20_N3 R641 1 2 0_0402_5% USB20_R_N3 2 2
+3VS 1 2 2 1 LED5 WLAN_LED# <29> +FP_VCC 1 1
R600 Blue E&T_3802-E04N-01R
+5VS 1 2 2 1 LED3 BT_LED# <33>
CONN@
820_0402_5% 1 1
C630 C631
HT-191NB_BLUE_0603 @ Follow JFT00 Smybol
4.7U_0805_10V4Z 0.1U_0402_16V4Z
2 2
12/7 Modified LED footprint to LED_HT-297UD-CB_4P THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
MDC/LED/Camera/FP
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
12/15 Modified to correct LED symbol! B 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
KFT00 M/B LA-4821P Schematic
Date: Tuesday, March 10, 2009 Sheet 37 of 47
H7 H8 H9 H10 H11 H12 H13 H14
HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA
1
H15 H16 H17 H18 H19 H20 H21 H22
HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA
1
1
H23 H25 H26 H27 H28 H29 H31
HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA
1
1
H32 H33 H34 H35 H36 H39 H40
HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA
1
1
FM1 FM2 FM3 FM4
1 1 1 1
+5VALW +5VS 01/09 Add C861 (0.1uF) +1.8VALW +1.8V 01/06 Add C859 (0.1uF) +1.8VALW +1.8VS
U13
for EMI Recommend U17
for EMI Recommend U15
8 D S 1 8 D S 1 8 D S 1
7 D S 2 7 D S 2 7 D S 2 1 1
2
6 3 1 1 1 6 3 1 1 1 6 3 C330 C342
D S C344 C334 R295 C861 D S C340 C329 R294 C859 D S @ R293
5 D G 4 5 D G 4 5 D G 4
@ @ <EMI> @ @ <EMI> 10U_0805_10V4Z @
AO4468_SO8 10U_0805_10V4Z 470_0603_5% 0.1U_0402_16V4Z AO4468_SO8 10U_0805_10V4Z 470_0603_5% 0.1U_0402_16V4Z AO4468_SO8 2 2
1U_0603_10V4Z 470_0603_5%
2 2
1U_0603_10V4Z 2 2 2
1U_0603_10V4Z 2
1 1
1
D
6
Q52A 2 SYSON#
1
@ G D
S Q46 2 SUSP
3
+VSB 5VS_GATE 2 SUSP +VSB 1 2 1.8V_GATE SSM3K7002FU_SC70-3 +VSB 2 1 1.8VS_GATE G
R288 R286 R284 S
3
33K_0402_5% 1 2N7002DW-T/R7_SOT363-6 47K_0402_5% 1 47K_0402_5% 1 Q58 @
1
1
1
D C323 D C318 C319 SSM3K7002FU_SC70-3
1
SUSP SYSON# D
2 2 Change Q46 package from SOT23
G 0.1U_0603_25V7K G 0.1U_0603_25V7K to SC70-3; Michael 2008/5/30 SUSP 2 0.1U_0603_25V7K
Q48 S 2 Q49 S 2 G 2
3
3
SSM3K7002FU_SC70-3 SSM3K7002FU_SC70-3 Q15 S
3
SSM3K7002FU_SC70-3
Change Q48 package from SOT23 Change Q49 package from SOT23
to SC70-3; Michael 2008/5/30 to SC70-3; Michael 2008/5/30 Change Q15 package from SOT23
to SC70-3; Michael 2008/5/30
2 2
Change Q25 Q50 package from SOT23
+3VALW TO +3VS to Q52A Q52B SOT363-6; Michael 2008/5/30 +1.2VALW TO +1.2VS
+3VALW +3VS +1.2VALW +1.2VS
U16 U14
8 D S 1 8 D S 1
7 D S 2 7 D S 2 Change Q47 Q51 package from SOT23
2
2
6 D S 3 1 1 6 D S 3 1 1 to Q53A Q53B SOT363-6; Michael 2008/5/30
5 4 C331 C343 R292 5 4 C327 C338 R290
D G @ @ D G @ @
AO4468_SO8 10U_0805_10V4Z 470_0603_5% AO4468_SO8 10U_0805_10V4Z 470_0603_5% +5VALW
2 2
1U_0603_10V4Z 2 2
1U_0603_10V4Z
3 1
2
Q52B
1
@ D R285
2 SUSP
5 SUSP G 100K_0402_5%
+VSB 1 2 3VS_GATE +VSB 1 2 1.2VS_GATE S
1
R287 2N7002DW-T/R7_SOT363-6 R283 Q57 @
4
1
D C320 D C317
1
SUSP SUSP D SSM3K7002FU_SC70-3
2 2
G 0.1U_0603_25V7K G 0.1U_0603_25V7K SYSON 2
2 2 <30,31> SYSON
Q17 S Q16 S G Q14
3
3
SSM3K7002FU_SC70-3 SSM3K7002FU_SC70-3 S
3
1
R281
Change Q17 package from SOT23 Change Q16 package from SOT23 10K_0402_5%
3 3
to SC70-3; Michael 2008/5/30 to SC70-3; Michael 2008/5/30
2
Change Q13 Q14 package from
SOT23 to SC70-3; Michael 2008/5/30
01/10 Add C862~C864 (0.1uF) for ESD Recommend
+5VALW
+1.8VS +3VALW B+ 7/24 Change R281 from 100K to 10K
+1.5VS +1.05VS +0.9VS
2
1 1 1 R278
2
1
@ @ @ 2 2 2 SUSP
SUSP <45>
1
1
D SSM3K7002FU_SC70-3
1
3
1
S @ S @ S @
3
R282 100P_0402_50V8J
2
10K_0402_5%
2
Change Q20 Q12 Q26 package from SOT23 to SC70-3; Michael 2008/5/30
4 4
1 1
PR18
1M_0402_1%
VIN VINDE-2
1 2
VIN
VS
VIN
0.01U_0402_25V7K
PL1
10K_0805_5%
PJP1 SMB3025500YA_2P
1
1
PC5
PR20
1 ADPIN 1 2
PR19 PR21
1000P_0402_50V7K
84.5K_0402_1% 10K_0402_5%
2
G 2 1 2
2
ACIN <31>
1
PC4
100P_0402_50V8J
G PR22
2
1
8
3 22K_0402_1%
PC3
VINDE-1 1 2 3
P
2
+
0.068U_0603_16V7K
SINGA_2DC-S756B200 PC2 1 PACIN
2
1000P_0402_50V7K VINDE-3 O PACIN <42>
2 -
G
20K_0402_1%
10K_0402_1%
0.1U_0402_16V7K
RLZ4.3B_LL34
<BOM Structure> PU1A
1
LM393DG_SO8
4
PC6
PR23
PC7
PR24
PD1
2
2
PC1
2
100P_0402_50V8J PR25
2
10K_0402_1%
2 1 RTCVREF
3.3V
2 2
Vin Detector
SP093MX0000 VIN
PJ2
+5VALWP 2 2 1 1 +5VALW
2
PD3
@ JUMP_43X118 BATT+ 2 1
PD2
RLS4148_LL34-2 RLS4148_LL34-2
1
1
PJ3 @PC87
@ PC87 51ON-1
+1.2VALWP 2 2 1 1 +1.2VALW
1
0.1U_0603_25V7K
2
@ JUMP_43X118 PR26 PR27
PQ35 68_1206_5% 68_1206_5%
TP0610K-T1-E3_SOT23-3
PR28
2
200_0603_5%
CHGRTCP 1 2 51ON-2 3 1
VS
3 3
0.22U_0603_25V7K
PJ4
1
2 1 @PC91
@ PC91
+1.8VALWP 2 1 +1.8VALW
1
PC8
PR29 PC9
@ JUMP_43X118 0.1U_0603_25V7K 100K_0402_1% 0.1U_0603_25V7K
2
PR30
2
22K_0402_1%
1 2 51ON-3
<34> 51_ON#
PJ5
+0.9VSP 2 2 1 1 +0.9VS
RTCVREF
1
@ JUMP_43X79
PR31
+CHGRTC PU2 200_0603_5%
PR32 PR33 G920AT24U_SOT89-3
560_0603_5% 560_0603_5% 3.3V
2
1 2RTCVREF-1
1 2 3 OUT IN 2CHGRTCIN
PJ6 @
1
GND PC11
+1.5VSP 2 2 1 1 +1.5VS PC10 1U_0805_25V4Z
JUMP_43X118 10U_0805_10V4Z1
2
@PC92
@ PC92
PJ7
4
+VSBP 2 1 +VSB 0.1U_0603_25V7K 4
2 1
@ JUMP_43X79
PJ16 @
+1.05VSP 2 2 1 1 +1.05VS
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2008/07/15 Deciphered Date 2009/07/15 Title
JUMP_43X118
DCIN & DETECTOR
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
KFT00 MB Schematic
Date: Tuesday, March 10, 2009 Sheet 40 of 47
A B C D
A B C D
BATT+
1000P_0402_50V7K
ID 4 2 1
1000P_0402_50V7K
B/I 3 2 PR35 1 @ 1K_0402_5%
1
9 2 1K_0402_5%
G TS
8 G GND 1
PC12
PC13
PC14
2
1 1
SUYIN_200275MR007G113ZL 0.01U_0402_50V7K
PR36 6.49K_0402_1%
1 2 +3VALWP
1
1
1
PR38
PR37 1K_0402_5%
100_0402_5%
2
PR39
100_0402_5%
2
BATT_TEMP <31>
2
EC_SMB_DA1
PH1 under CPU botten side :
EC_SMB_DA1 <31>
CPU thermal protection at 89 degree C
SMART EC_SMB_CK1
EC_SMB_CK1 <31>
Battery: Recovery at 70 degree C
7.BATT+ VS
6.SMD BATT_DET VL
0.1U_0603_25V7K
5.SMC VL
4.ID
PC15
3S Floating
150K_0402_1%
3.B/I
2
10K_0402_1%
2
1
2.TS
PR41
4S LOW
PR40
PR42
1.GND 1 442K_0603_1%
2
2 2
1
2
PR43
8
78.7K_0603_1%
1 2 5
P
+
O 7 MAINPWON <43>
TM_REF1 6 -
G
100K_0603_1%_TH11-4H104FT
PU1B
1
LM393DG_SO8
4
PH1
1000P_0402_50V7K
1U_0603_6.3V6M
2
1
PC16
PC17
PR44
2 150K_0402_1%
1 VL
150K_0402_1%
1
PR45
2
3 3
PQ36
TP0610K-T1-E3_SOT23-3
B+ 3 1 +VSBP
0.22U_1206_25V7K
0.1U_0603_25V7K
1
100K_0402_1%
1
PR46
PC18
PC19
2
22K_0402_1%
VL 1 2
10K_0402_1%
<BOM Structure>
2
PR48
PR49
1
0_0402_5% D
4
1 2 2 PQ37 4
<43,44,45> SPOK
G SSM3K7002F_SC59-3
0.1U_0402_16V7K
S
3
1
PC20
<BOM Structure>
2
BATT+
VIN P2
PQ40
FDS6675BZ_SO8
PR5
0.015_2512_1%
B+
1 8
PQ38 PQ39 1 4 2 7
PJ9 3 6
8 D S 1 1 S D 8 2 3 2 2 1 1 CHG_B+ 5
7 2 2 7 PR50
D S S D @ JUMP_43X118 47K_0402_5%
6 3 3 6
4
D S S D
4.7U_1206_25V6K
4.7U_1206_25V6K
4.7U_1206_25V6K
5 D G 4 4 G D 5 1 2 1 2 VIN
1_1210_5%
340K_0402_1%
PR54
1
1
47P_0402_50V8J
47K_0402_5% PR53 ACDET PC21
FDS4435BZ_SO8 FDS4435BZ_SO8
1
1 1
0.1U_0603_25V7K
PR51
PC22
PC23
PC24
0.1U_0603_25V7K
1 2 113K_0402_1% 1U_0603_6.3V6M
PR52
VREF 1 2 ACSET
2
1
3
PR55
PC25
1
0.1U_0603_25V7K
10K_0402_5%
PC28
1 2
PC34
2
2
1
ACN
ACP
1_1210_5%
200K_0402_5%
2 PC26 PR57 ACOFF#
2
ACDET
1
100K_0402_5%
PR58
PC27
PR56
0.01U_0402_16V7K
1
<BOM Structure>
2
PR59 CHGEN# CHG_B+
2
47K_0402_1% PQ41
2
54.9K_0402_1%
<BOM Structure>
1 2 2 DTA144EUA_SC70-3
1
2
1
2 ACOFF <31>
2.2U_0805_25V6K PC29
PR60
LPREF
ACSET
ACDET
LPMD
ACP
ACN
CHGEN
PQ42 29
TP
2
5
6
7
8
DTC115EUA_SC70-3 PR62 PC30
3
1
<BOM Structure>
0_0402_5% 1U_0805_25V6K
1
3
<30,31,39,44,45> SUSP# 1 2 8 28 P2 1 2 PQ44 PQ43
1
2
AGND BTST 0_0603_5%
1
3
2
1
S 1U_0603_6.3V6M 10UH_MPL73-100_3A_20% 0.02_2512_1%
3
REGN LX_CHG
11 VDAC PH 25 1 2 4 1
1
PR63 PD4 <BOM Structure> 3 2
1
5
6
7
8
3K_0402_1% D @ PR64
@PR64 VADJ REGN PR65
12 VADJ REGN 24 2 1
1 2 2 PQ46 143K_0402_1% 4.7_1206_5%
<40> PACIN
10U_1206_25VAK
10U_1206_25VAK
10U_1206_25VAK
G SSM3K7002FU_SC70-3 1SS355_SOD323-2
2
S <BOM
PR234
Structure> 13 23 DL_CHG 2
3
2 2
EXTPWR LODRV
1
PD5 1 2
<31> CHGVADJ
PC35
PC36
PC37
ACOFF# 1 2 4
1
210K_0402_1% 14 22 PC33
2
ISYNSET PGND
1
1SS355_SOD323-2 470P_0603_50V8J
DPMDET
1
1
PC38 PR66
IADAPT
<BOM Structure> 1 2
SRSET
CELLS
1
1U_0603_10V6K 499K_0402_1% PC40 PQ47
SRN
SRP
2
3
2
1
BAT
PR67 AO4466_SO8
2
15K_0402_5% 1U_0603_10V6K PC39
2
0.1U_0402_10V7K
15
16
17
18
19
20
21
IADAPT
PR68
10K_0402_5%
1 2
<31> ADP_I CELLS
100P_0402_50V8J
0.22U_0603_10V7K
1
1
PC58
PC42
2
2
VREF
2
0.1U_0603_25V7K
PR69
@ 0.1U_0603_25V7K
100K_0402_1% PR70
2 1 IREF <31>
1
PC43
133K_0402_1%
1
1
PC55
PC116
1
3 3
CHGEN# 0.1U_0402_10V7K
2
PR71
2
1
D 200K_0402_1%
2
2 PQ48 IREF Current
<31> FSTCHG
2
G SSM3K7002F_SC59-3
S
3
3.3V 3A BATT++
499K_0402_1% 340K_0402_1%
1
VS
PR72
0.01U_0402_25V7K
2OVP-1
1
PC45
1
CELLS GND
PR74
3 Cell LI-3S :13.5V----BATT-OVP=1.5V
2
VREF VREF
4 Cell BATT-OVP=0.1112*BATT+
2
2
8
VREF PR75
PR229 10K_0402_1% 3 OVP-2
P
+
47K_0402_1% 2 1 1
<31> BATT_OVP 0
2
- 2
105K_0402_1%
PR231
A/D
1
0.01U_0402_25V7K
100K_0402_1% 5 PU4A
P
4
+
1
PR76
CELLS 7 LM358DR_SO8
0
PC46
6
1
-
1
G
D
2
BATT_DET 2 PU4B
BATT_DET <41>
4
2
4
G LM358DR_SO8 4
S PQ61
3
3S Floating SSM3K7002F_SC59-3
OVP-4 OVP-3
4S LOW
Cells selector
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2008/07/15 Deciphered Date 2009/07/15 Title
CHARGER
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
KFT00 MB Schematic
Date: Tuesday, March 10, 2009 Sheet 42 of 47
A B C D
5 4 3 2 1
ISL6237_B+
ISL6237_B+
B+
PJ10 PR77
@ JUMP_43X118 0_0402_5%
2 2 1 1 1 2
2200P_0402_50V7K
10U_1206_25V6M
2200P_0402_50V7K
10U_1206_25V6M
D D
5
6
7
8
1
PC47
PC48
PC50
8
7
6
5
PC49
1U_0603_10V6K
VL
2
2
2
PC52
PQ16 PC51
4.7U_0805_6.3V6K
AO4466_SO8 0.1U_0603_25V7K 4
3/5V_VCC
1
1
3/5V_VIN
4
PC53
PQ15 +5VALWP
2
AO4466_SO8
3
2
1
PL5
1
2
3
PL6 4.7U_LF919AS-4R7M-P3_5.2A_20%
7
4.7U_LF919AS-4R7M-P3_5.2A_20% PU6 PC54 2 1
1 2 1U_0603_10V6K
VIN
V5FILT
LDO
+3VALWP 33 19 1 2
TP V5DRV
5
6
7
8
1
PQ17
8
7
6
5
UG3 26 15 HG5 AO4712_SO8
PR78 DRVH2 DRVH1 PR79
0_0402_5%
15V_SNB
1
2
2
2
PR82
61.9K_0402_1%
0_0402_5% 0_0402_5% +
13V_SNB
4
2
+ 4 PC56
2
0.1U_0603_25V7K PC41
1
2 220U_6.3VM_R15
@ PR83
SW3 25 16 SW5
1
3
2
1
220U_D2_4VY_R15M @ 680P_0603_50V8J 0.1U_0603_25V7K PC60
1
2
3
2
LG3 23 18 LG5 @ 680P_0603_50V8J
1
DRVL2 DRVL1
@ 10K_0402_1%
2
PGND 22
2
C C
PR84
FB3 30 VOUT2
0_0402_5%
PR85
VOUT1 10
VL 32
1
REFIN2
1
11 FB5
2VREF_ISL6237 FB1
1 2 1 VREF2
PC61
0.22U_0603_25V7K 9
VSW
8 LDOREFIN
PD6
RB751V-40TE17_SOD323-2 29 5V_SKIP 2 1
SKIPSEL PR86
VL
1 2
@ 0_0402_5%
1 2
20 28 PR87
PD7 PR88 NC PGOOD2 0_0402_5%
VS RLZ5.1B_LL34 100K_0402_1%
EN_LDO-1 EN_LDO SPOK <41,44,45>
1 2 1 2 4 EN_LDO PGOOD1 13
2
200K_0402_5%
2
PR89
TONSE
VREF3
1
3/5V_EN2 27 31 ILIM2 2 1
GND
1
EN2 TRIP2
PR91
2
SN0806081RHBR_QFN32_5X5 316K_0402_1%
21
B PD8 VL B
806K_0603_1%
13/5V_NC
@ RB751V-40TE17_SOD323-2
2
1 2 PR92
13/5V_TON
PR93
0_0402_5%
2VREF_ISL6237 1
@
1U_0603_10V6K
PR95
PC63
@ 47K_0402_5%
PR94
1
2 1 1 2
2
<41> MAINPWON
0.047U_0402_16V7K
@ 0.047U_0402_16V7K
0_0402_5% PR96
0_0402_5%
1
2
PC64
PC65
2
Vlimit=(5E-06 * 316K)/10=158mV
Ilimit=158mV/(18m ~ 15m)
=8.77A ~ 10.53A
Iocp=Ilimit+Delta I/2
=9.75A ~11.51 A
+3VALWP Ipeak=4.85A ; Imax=3.395A Delta I=1.956A (Freq=400KHz)
Rds(on)=18m ohm(max) ; Rds(on)=15m ohm(typical)
Vlimit=(5E-06 * 180K)/10=90mV
Ilimit=90mV/(18m ~ 15m)
=5A ~ 6A
A A
Iocp=Ilimit+Delta I/2
=5.967A ~ 6.967A
Delta I=1.934A (Freq=300KHz)
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2008/07/15 Deciphered Date 2009/07/15 Title
3VALW/5VALW
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
KFT00 MB Schematic
Date: Tuesday, March 10, 2009 Sheet 43 of 47
5 4 3 2 1
5 4 3 2 1
D D
PJ11
1.2V_IN 2 1 B+
2 1
@ JUMP_43X79
5
6
7
8
10U_1206_25V6M
1
PC66
PR97
2
240K_0402_5% 4
1.2V_TON 1 2 PQ27
PR98 PR99 AO4466_SO8
PC67
0_0402_5% 0_0603_1%
1 2 1.2V_EN BST_1.2V 1 2BST_1.2V-1
1 2
<41,43,45> SPOK
3
2
1
0.1U_0603_25V7K
1
PL11
15
14
1
PC68 2.2UH_PCMC063T-2R2MN_8A_20%
@0.1U_0402_16V7K 1 2
EN_PSV
TP
VBST
+1.2VALWP
@ 4.7_1206_5%
2 13 UG_1.2V <BOM Structure>
TON DRVH
PR100
PR101 3 12 SW_1.2V
VOUT LL
5
6
7
8
220U_V_4VM_R15M
10U_0805_6.3V6M
422_0603_1% 1
+5VALWP 1 2 1.2V_V5FILT 4 11 1 2 +5VALWP
2
V5FILT TRIP
1
PC69
PC70
PR102 +
AO4712_SO8
1.2V_FB 5 10 16.5K_0402_1%
VFB V5DRV
2
1
LG_1.2V 2
6 PGOOD DRVL 9 4
PGND
C C
PQ28
PC71
GND
1U_0603_10V6K PC72
2
@ 680P_0603_50V7K
@ 47P_0402_50V8J
PC74
1 2 PC73
3
2
1
PU7 4.7U_0805_10V6K
2
TPS51117RGYR_QFN14_3.5x3.5
PR103
20K_0402_1%
1 2
1
PR104
30.1K_0402_1%
2
VFB=0.75V
Vo=VFB*(1+PR103/PR104)=1.203V
+5VS +1.2VS Ton=187.68ns
PJ12 Freq=337KHz
Cesr=15m ohm
2
@ JUMP_43X118
Ipeak=7.82A Imax=5.474A
1U_0603_6.3V6M
Delta I=((19-1.2)*(1.2/19))/(L*Freq)=1.516A
1
PC263
B B
1
Vtrip=Rtrip*10uA=165mV
2
Iocp-min=Vtrip/(Rdsonmax*1.2)+0.758=8.4A
4.7U_0805_6.3V6K
Iocp-max=Vtrip/(Rdsontyp*1.2)+0.758=9.92A
1
PC264
Iocp=8.4A~9.92A
2
6
PU12
5
VCNTL
VIN
7 POK
VOUT 4 +1.05VSP
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
1.1K_0402_1%
VOUT 3
PR315
1
1
PC266
PC267
PC268
<30,31,39,42,45> SUSP# 1 2 8 EN FB 2
PR316
PC265
GND
0_0402_5% 9
2
VIN @
1
APL5913-KAC-TRL_SO8 0.01U_0402_25V7K
1
PC269
1
3.4K_0402_1%
0.1U_0402_16V7K
2
@
PR319
2
A A
FB=0.8V
Vout=0.8v*(1+R316/R319)
Imax=3.22A Ipeak=4.6A Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2008/07/15 Deciphered Date 2009/07/15 Title
1.2V//1.05V
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
KFT00 MB Schematic
Date: Tuesday, March 10, 2009 Sheet 44 of 47
5 4 3 2 1
5 4 3 2 1
D
PJ13 D
1.8V_IN 2 1 B+
2 1
@ JUMP_43X79
5
6
7
8
10U_1206_25V6M
1
PC75
PR105
2
240K_0402_5% 4
1.8V_TON 1 2 PQ23
PR106 PR107 AO4466_SO8
0_0402_5% 0_0603_1%
1 2 1.8V_EN BST_1.8V 1 2BST_1.8V-1
1 2
<41,43,44> SPOK
3
2
1
PC76
0.1U_0603_25V7K
15
14
1
1
PL9
PC77 2.2UH_PCMC063T-2R2MN_8A_20%
EN_PSV
TP
VBST
@ 0.1U_0402_16V7K 1 2 +1.8VALWP
2
2 13 UG_1.8V
TON DRVH
@ 4.7_1206_5%
3 12 SW_1.8V
VOUT LL
PR108
PR109
5
6
7
8
10U_0805_6.3V6M
422_0603_1% 1.8V_V5FILT
220U_D2_4VY_R15M
4 V5FILT TRIP 11 1 2 1
+5VALWP 1 2 PR110 +5VALWP
1
PC78
PC79
1.8V_FB 5 10 16.5K_0402_1% +
VFB V5DRV
AO4712_SO8
6 9 LG_1.8V
2
PGOOD DRVL
1
2
PGND
4
GND
PQ25
@ 680P_0603_50V7K
PC80
1U_0603_10V6K PC81
2
1
@ 47P_0402_50V8J
8
C C
PC83
1 2 PU8 PC82
3
2
1
TPS51117RGYR_QFN14_3.5x3.5 4.7U_0805_10V6K
2
VFB=0.75V
Vo=VFB*(1+PR111/PR112)=1.829V PR111
17.8K_0402_1%
Freq=334KHz 1 2
1
Cesr= ohm
Ipeak=12.22 A Imax=8.554A
PR112
Delta I=((19-1.8)*(1.8/19))/(L*Freq)=2.21A 12.1K_0402_1%
Vtrip=Rtrip*10uA=165mV
2
Iocp-min=Vtrip/(Rdsonmax*1.2)+1.105=8.74A
Iocp-max=Vtrip/(Rdsontyp*1.2)+1.105=10.27A
Iocp=8.74A~10.27A
+1.8VS
+1.8V
1
PJ15
1
1
JUMP_43X118 +5VS
PJ14
1
2
@ JUMP_43X79
2
2
1
B PU9 PC167 B
2
1
1U_0603_6.3V6M
2
2 5 PC168
GND NC
1
PC84 4.7U_0805_6.3V6K
2
1
4.7U_0805_6.3V6K 3 7 PC85
PR113 VREF NC 1U_0603_6.3V6M
2
1K_0402_1% 4 8
VOUT NC PU10
9 6
2
TP PR268 VCNTL
5 VIN VOUT 3
APL5331KAC-TRL_SO8 0_0402_5% 9 4 +1.5VSP
VIN VOUT
1
1
+0.9VSP <30,31,39,42,44> SUSP# 1 2 8 EN
1
1
D
22U_0805_6.3V6M
PR116 7 2 PR269
GND
POK FB
PC169
<39> SUSP 1 PR115 2 2 PQ50
1K_0402_1% PC88 PC170
2
1
1
0_0402_5% G SSM3K7002FU_SC70-3
0.1U_0402_16V7K 3K_0402_1%
2
2
1
2
PC89 10U_0805_6.3V6M @ 0.1U_0402_16V7K
2
2
@ 0.1U_0402_16V7K
2
1
0.01U_0402_25V7K
PR270
3.4K_0402_1%
2
Vout=Vin*R116/(R113+R116)=0.925
VFB=0.8V
Imax=1.4A Ipeak=2A Imax=0.966A Ipeak=1.38A
A A
@
H_DPRSTP# PC270 1 2 470P_0402_50V7K
+3VS
@ 10K_0402_5%
1.91K_0402_1%
1
1
D D
PR119
PR120
<25>
2
PM_DPRSLPVR_D
<14> VGATE
<14> CLK_EN# 1 2
PR121 +CPU_B+ PL12
@ 0_0402_5% +3VS +5VS HCB4532KF-800T90_1812
<31>
VR_ON
1 2 B+
PMON
2200P_0402_50V7K
10U_1206_25V6M
10U_1206_25V6M
1
1
0_0402_5%
0_0402_5%
1
100U_25V_M
PR124
PR235
PC94
PC95
PC96
+
PC97
2
2
@
2
2
0_0402_5%
1CPU_VREF
499_0402_1%
5
0_0402_5%
124K_0402_1%
0_0402_5%
0_0402_5%
PQ29
2
TPCA8023-H_SO8
1
1
1
@ 4
CPU_DPRSLPVR
CPU_CLK_EN#
CPU_TRIPSEL
CPU_VR_ON 2
1
CPU_OSRSEL
CPU_TONSEL
PR122
PR127
PR128
CPU_V5FILT
CPU_ISLEW
2
2
2
<BOM Structure>
PR123
PR125
PR126
2 1
3
2
1
PC103 1 2 +CPU_CORE
1U_0402_6.3V6K
5
6
7
8
1
PL13
+5VS
SI4634DY-T1-E3_SO8
PR135
1
C 0.36UH_PCMC104T-R36MN1R17_30A_20% C
17.8K_0402_1%
@ 6.8_1206_5%
41
40
39
38
37
36
35
34
33
32
31
1CPU1_SNB
PR129
2
CPU_VREF
1 2 ISLEW
OSRSEL
TONSEL
TRIPSEL
CLK_EN#
GND
V5FILT
PWRMON
VR_ON
DPRSLPVR
PGOOD
2
PR130 PD9 4 4 PR131
PQ31
5.11K_0402_1% 1SS355_SOD323-2 69.8K_0402_1%
2
1 2CPU_DROOP 1 30 UGATE_CPU1 1 2
PC98 68P_0402_50V8J DROOP DRVH1 @
1
CPU_CSP1 2 1 1 2CPU_VREF 2 29 BOOT_CPU1
1 PR133 2BOOT_CPU1-1
1 2 PC101
3
2
1
3
2
1
VREF VBST
PR132 470_0402_1% PC99 0.22U_0603_10V7K 0_0603_5% PC100 @ 680P_0603_50V7K 1 2CPU_SN-1
1 2
2
2
CPU_CSN1
CPU_CSP1
PC102 28.7K_0402_1% 100K_0603_1%_TH11-4H104FT
100P_0402_50V8J 1 2 CPU_CSP1-2 4 27 LGATE_CPU1 +CPU_B+ 1 2
1
10U_1206_25V6M
10U_1206_25V6M
PR136 470_0402_1% 1 2 CPU_CSN1-1 5 CSN1 V5IN 26 1 2 0.033U_0402_16V7K
1
CPU_CSN2 2 1 PC106 33P_0402_50V8J PC107 10U_0603_6.3V6M TPCA8028-H_SOP ADVANCE8
PC109
PC110
PR137 470_0402_1% 1 2 CPU_CSN2-1 6 CSN2
PU11
PGND 25
2
2
PC111 1 2 CPU_CSP2-2 7 CSP2 DRVL2 24 LGATE_CPU2
100P_0402_50V8J PC112 33P_0402_50V8J 4
1
3
2
1
CPU_THERM UGATE_CPU2 0.22U_0603_10V7K
DPRSTP#
10 THERM DRVH2 21 2 1
1
VR_TT#
1
PL14
0_0402_5%
0_0402_5%
1 2
VID6
VID5
VID4
VID3
VID2
VID1
VID0
PSI#
+5VS
5
6
7
8
5
0.36UH_PCMC104T-R36MN1R17_30A_20%
SI4634DY-T1-E3_SO8
1
1
PR140
PR141
17.8K_0402_1%
PD10 PR142
PR144
1SS355_SOD323-2 @ 6.8_1206_5%
2
11
12
13
14
15
16
17
18
19
20
1CPU2_SNB
PR143
2
20K_0402_5% PR145
1CPU_DPRSTP#
B 4 4 69.8K_0402_1% B
2
2
VID6
VID5
VID4
VID3
VID2
VID1
VID0
PSI#
PQ33
1 2
1
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
@ 1 2CPU_SN-2
1 2
3
2
1
3
2
1
PC114 PR148 PH3
2
1
CPU_CSN2
CPU_CSP2
PR146 PR147 @ 680P_0603_50V7K 28.7K_0402_1% 100K_0603_1%_TH11-4H104FT
100_0402_5% 100_0402_5% 1 2
2
PC115
0.033U_0402_16V7K
PR149
PR150
PR151
PR152
PR153
PR154
PR155
PR156
PR157
2
1
<5>
<5>
VSSSENSE
VCCSENSE
PQ34
+CPU_CORE
TPCA8028-H_SOP ADVANCE8
<5,25>
H_DPRSTP#
<5>
<5>
<5>
<5>
<5>
<5>
CPU_VID6
CPU_VID5
CPU_VID3
CPU_VID2
CPU_VID1
CPU_VID0
<5>
<5>
H_PSI#
CPU_VID4
A A
D
1 Change charge current to 3.36A at Iref=3.3V A 3 change PR70 from 133K to 97.6K D
2 change charger current sense size and value A 3 change PR17 from 15m to 20m ohm
5 change PR90 ,PR91 for 3V,5V ocp set A 4 Change from 301K to 315K and 174K
6 change PR102 for 1.2V OCP set A 5 Change from 14.7K to 16.5K
7 change 1.2v from 1.225V to 1.2V follow KSWXX A 5 Change PR103 and PR104 to 18.2K and 30.1K
8 change PR110 for 1.8V OCP set A 6 Change from 14.7K to 16.5K
C C
9 change 1.8v from 1.851V to 1.829V follow KSWXX A 6 Change PR111 and PR112 to 17.4K and 12.1K
15 adjust cpu load line C change PR130 from 4.02K to 5.49 K ohm
16 change cpu choke footprint C change choke footprint from toho to cyntec
B B
18 adjust back to back mos turn off time change PC27 from 0.47U to 0.1U
19 Adjust 1.2v voltage from 1.2035V to 1.2483V for hw requet change PR103 from 18.2k to 20k
20 Adjust 1.8v voltage from 1.8285V to 1.8533V for hw request change PR111 from 17.4k to 17.8k
22 NPO must use J tolerance change PC104 PC106 PC108 PC112 from K to J tolerance
23
A A