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LG TV Plasma CH - PD92A 42PQ1100 PDF
LG TV Plasma CH - PD92A 42PQ1100 PDF
LG TV Plasma CH - PD92A 42PQ1100 PDF
PLASMA TV
SERVICE MANUAL
CHASSIS : PD92A
CONTENTS ............................................................................................................................... 2
SPECIFICATION.........................................................................................................................4
Copyright © 2009 LG Electronics. Inc. All right reserved. -2- LGE Internal Use Only
Only for training and service purposes
SAFETY PRECAUTIONS
Keep wires away from high voltage or high temperature parts. Leakage Current Hot Check circuit
Due to high vacuum and large surface area of picture tube, AC Volt-meter
extreme care should be used in handling the Picture Tube.
Do not lift the Picture tube by it's Neck.
Copyright © 2009 LG Electronics. Inc. All right reserved. -3- LGE Internal Use Only
Only for training and service purposes
SPECIFICATIONS
NOTE : Specifications and others are subject to change without notice for improvement.
1. Application Range
This spec is applied to the 42/50” PLASMA TV used PD92A Chassis.
Chassis Market Brand Remark
2. Specification
Each part is tested as below without special appointment.
1) Temperature : 25±5°C (77±9°F), CST : 40±5
2) Relative Humidity: 65±10%
3) Power Voltage: Standard Input voltage (100-240V~, 50/60Hz)
* Standard Voltage of each product is marked by models.
4) Specification and performance of each parts are followed each drawing and specification by part number in accordance with SBOM.
5) The receiver must be operated for about 20 minutes prior to the adjustment.
3. Test Method
1) Performance : LGE TV test method followed.
2) Demanded other specification
Safety : CE, IEC specification
EMC : CE, IEC
Albania, Austria, Belgium, Bosnia, Bulgaria, Croatia, Czech, Denmark, Safety : IEC60065
Estonia, Finland France, Germany, Greece, Hungarym Ireland, Italy, EMC : EN55013
Kazekhstan, Latvia, Lthuania, Luxembourg, Morocco,Netherlands, Norway, EN55022 TEST
Poland, Portugal Romania, Russia, Sebia, Slovakia, Lovenia, Spain, EN55020
Sweden, Swtzerland, Turkey, UK, Ukraine EN55024
Copyright © 2009 LG Electronics. Inc. All right reserved. -4- LGE Internal Use Only
Only for training and service purposes
4. Module Specification
(1) 50”
(2) 42”
Copyright © 2009 LG Electronics. Inc. All right reserved. -5- LGE Internal Use Only
Only for training and service purposes
5. Model General Specification
Copyright © 2009 LG Electronics. Inc. All right reserved. -6- LGE Internal Use Only
Only for training and service purposes
6. Chroma & Brightness
6.1 WXGA module (42G2,42G2A module,SET With 38%Glass Filter)
No Item Min Typ Max Unit Remark
*) Peak Brightness Mode
-1/100 white Window pattern
(Typically 1%Window size)
1. White peak 42G2 315 362 - cd/m2 -100IRE (255Gray)
brightness -Picture: Vivid (Medium)
-Input: HDMI- PC(1920*1080 60Hz)
*Peak Brightness Condition may Slightly
different between sets.
170 189 42G2
- cd/m2 -25/ 100 white Window pattern
161 183 42G2A
- 100% Window White Pattern
2. White average brightness 47 54 - cd/m2 - 100IRE(255Gray)
- Picture: Vivid(Medium )
- 85IRE(216Gray) 100% Window White Pattern
3. Brightness uniformity -10 0 +10 %
- Picture: Vivid(Medium)
X 0.270 0.285 0.300
White
Y 0.278 0.293 0.308 - White : 85IRE(216Gray)
X 0.635 0.640 - 100% Window White Pattern
Red
4. Color Y 0.318 0.330 0.340 - R/G/B : 100IRE(255Gray)
Coordinate X 0.242 0.300 0.305 100% Window White Pattern
Green
Y 0.595 0.600 - - Picture: Vivid(Medium )
X - 0.150 0.158 - 100% Window
Blue
Y - 0.060 0.070
- 85IRE 100% Window White Pattern
5. Color coordinate uniformity -0.01 Average +0.01
- Picture: Vivid(Medium)
-1/100 white window pattern(Peak mode)
6. Contrast ratio 42G2 100k:1 1000k:1 -100IRE(255Gray)
at dark room -Picture:Vivid(Medium)
-Input:HDMI-PC (1920*1080 60Hz)
7. Color X 0.261 0.276 0.291
Cool
Temperature Y 0.268 0.283 0.298
X 0.270 0.285 0.300 - 85IRE 100% Window White Pattern
Medium
Y 0.278 0.293 0.308 - APC : Vivid(Medium)
X 0.298 0.313 0.328
Warm
Y 0.314 0.329 0.344
Copyright © 2009 LG Electronics. Inc. All right reserved. -7- LGE Internal Use Only
Only for training and service purposes
ADJUSTMENT INSTRUCTION
1. Application Range
This spec sheet is applied all of the PDP TV, PD92A chassis. 4. Insert Tool OPTION and Model
Name Download
(1) Press IN_START key on R/C to insert Tool OPTION
(2) On the “Tool Option 1”, Insert Tool Option by a number
2. Specification. key
(1) Because this is not a hot chassis, it is not necessary to use
an isolation transformer. However, the use of isolation Model Name Model Option Value
transformer will help protect test instrument. 50PG3000-ZA 4717
(2) Adjustment must be done in the correct order. 42PQ3000-ZA 4461
(3) The adjustment must be performed in the circumstance of
50PG6000-ZA 8814
25±5°C of temperature and 65±10% of relative humidity if
42PQ6000-ZA 8558
there is no specific designation.
(4) The input voltage of the receiver must keep 100~240V,
50PQ2000-ZA 2669
50/60Hz. 42PQ2000-ZA 2413
(5) The receiver must be operated for about 5 minutes prior to 50PS3000-ZB 4781
the adjustment when module is in the circumstance of over 50PS6000-ZC 8878
15° 42PQ1000-ZD 260
- In case of keeping module is in the circumstance of 0°C, 42PQ1100-ZE 10500
it should be placed in the circumstance of above 15°C for 42PQ1000-ZA 12548
2 hours 60PS4000-ZA 7085
- In case of keeping module is in the circumstance of below 50PQ1000-ZD 580
-20°C, it should be placed in the circumstance of above 50PQ1100-ZE 10820
15°C for 3 hours,. 50PQ1000-ZA 12868
* Set is activated HEAT run without signal generator in this Tool Option
mode. Tool Option 4782
* Single color pattern (WHITE) of HEAT RUN MODE uses to
Model Name : 50PS1000-ZD
check panel.
INCH : 50
Caution: If you turn on a still screen more than 20 minutes Tool : PS60
(Especially digital pattern, cross hatch pattern), an
after image may be occur in the black level part of the EYE : 1
screen. Media Player : EMF-PMM
HDMI Type : 3-HDMI
3. PCB assembly adjustment method XD Plazma : 0
Caution: Using ‘power on’ button of the control R/C, power on OK to Download
TV.
DOWNLOAD : OK
O Auto-control adjustment protocol(RS-232C)
Copyright © 2009 LG Electronics. Inc. All right reserved. -8- LGE Internal Use Only
Only for training and service purposes
5. EDID(The Extended Display 2) HDMI
ⓐ Product ID
Product ID
MODEL NAME Product ID
HEX EDID Table
42PQ3000 40433 9DF1 F19D
42PQ6000 40431 9DEF EF9D
50PQ3000 50250 C44A 4AC4
50PQ6000 50248 C448 48C4
O Detail EDID Options are below (ⓐ, ⓑ, ⓒ, ⓓ) 42PQ2000 40467 9E13 139E
50PQ2000 50276 C464 64C4
ⓐ Product ID 50PS3000 50278 C466 66C4
50PS6000 50280 C468 68C4
Product ID
MODEL NAME Product ID 60PS4000 50290 C472 72C4
HEX EDID Table
42PQ1000 40473 9E19 199E
42PQ3000 40433 9DF1 F19D
42PQ1100 40475 9E1B 1B9E
42PQ6000 40431 9DEF EF9D
50PQ1000 50296 C478 78C4
50PQ3000 50250 C44A 4AC4
50PQ6000 50248 C448 48C4
ⓑ Week, Year
42PQ2000 40467 9E13 139E => Controlled on production line:
50PQ2000 50276 C464 64C4 ex) Week: ‘03’ -> ‘03’
50PS3000 50278 C466 66C4 Year: ‘2009’ -> ‘13’
50PS6000 50280 C468 68C4
ⓒ Model Name(Hex)
60PS4000 50290 C472 72C4
42PQ1000 40473 9E19 199E
42PQ1100 40475 9E1B 1B9E
50PQ1000 50296 C478 78C4
ⓒ Model Name(Hex)
Copyright © 2009 LG Electronics. Inc. All right reserved. -9- LGE Internal Use Only
Only for training and service purposes
5.2 Confirmation 8. Download Serial Number (RS-232C)
1) Press ‘InStart’ Key on Factory SVC Remote Controller, It is
possible to check ADC & EDID ADJ (1) Press “Power on” key of service R/C.(Baud rate : 115200
bps)
(2) Connect RS232 Signal Cable to RS-232 Jack.
(3) Write Serial number by use RS-232.
(4) Must check the serial number at the Diagnostics of SET
UP menu.
(Refer to below ‘6.SET INFORMATION’).
2) Select “Channel Recovery” and press navigation key(G). (3) Auto W/B adjustment instrument(only for Auto adjustment)
(4) 9 Pin D-Sub Jack(RS232C) is connected to the AUTO W/B
EQUIPMENT.
(1) Va adjustment
1) Connect + terminal of D. M.M. to Va pin of P811, connect - Color Coordinate ±Color
CSM Temp
terminal to GND pin of P811. x y Coordinate
2) After turning VR901,voltage of D.M.M adjustment as same
Cool 0.276 0.283 11,000K 0.002
as Va voltage which on label of panel right/top (deviation;
±0.5V) Medium 0.285 0.293 9,300K 0.002
Warm 0.313 0.329 6,500K 0.002
(2) Vs adjustment
1) Connect + terminal of D. M..M. to Vs pin of P811, connect
-terminal to GND pin of P811.
2) After turning VR951, voltage of D.M.M adjustment as same
as Vs voltage which on label of panel right/top (deviation ;
±0.5V)
Copyright © 2009 LG Electronics. Inc. All right reserved. - 10 - LGE Internal Use Only
Only for training and service purposes
9.3. Manual W/B Process (using adjusts Remote control)
10. Checking the EYE-Q Operation
Please Adjust in AV 1 MODE, Turn off Energy Saving Mode. (1) Press the EYE Key on the adjustment remote controller.
(2) Check the Sensor DATA (It must be under 10) and keep
(1) Enter “PICTURE RESET” on Picture Mode, then turn off the data longer than 1.5s
Fresh Contrast and Fresh colour in Advanced Control (3) Check ‘OK’
(2) After enter Service Mode by pushing “ADJ” key,
(3) Enter White Pattern off of service mode, and change off ->
on.
(4) Enter “W/B ADJUST” by pushing “ G ” key at “3. W/B
ADJUST”.
(5) Adjust W/B DATA, for all CSM, choose ‘COPY ALL’
[ Gain Max Value is 192. So, Never make any Gain Value (Sensor DATA 0 ~ 4095, Power Saving Mode 0 ~ 12)
over 192 and please fix one Value on 192, between R, G [ IF you press IN-STAP Button, change Green Eye-check OSD.
and B.
Copyright © 2009 LG Electronics. Inc. All right reserved. - 11 - LGE Internal Use Only
Only for training and service purposes
12. SW Download Guide.
* Put a *.bin to USB Stick and Turn on TV
5. Updating Completed, The TV will restart automatically.
1. Put the USB Stick to the USB socket After turn on TV, Please press ‘IN-STOP’ button on ADJ
2. Automatically detecting update file in USB Stick Remote-control.
* If your downloaded program version in USB Stick is Low, it * IF you don’t have ADJ R/C, enter ‘Factory Reset’ in OPTION
didn’t work. MENU.
But your downloaded version is High, USB data is
automatically detecting. 6. When TV turn on, check the Updated version on Diagnostics
3. Show the message “Copying files from memory” MENU.
4. Updating is staring.
Copyright © 2009 LG Electronics. Inc. All right reserved. - 12 - LGE Internal Use Only
Only for training and service purposes
SC2_L/R_IN P1100
DTV/MNT_L/R_OUT EEPROM HDCP EEPROM
(IC111) (IC102)
DTV/MNT_V_OUT 17V 12V 5V
SC2_CVBS_IN SYSTEM_SCL SYSTEM_SCL
SPDIF_OUT SYSTEM_SDA SYSTEM_SDA
SC1_CVBS_IN
SPI_CSN_1 Flash Memory
TV_L/R_OUT
16MB (IC103)
DSUB_R/G/B EEPROM
- 13 -
LVA_ [0:4] Panel
I2C_A_TU
COMP_Y/Pb/Pr LED_G/R & IR
KEY1/2 P402
COMP_L/R_IN
BLOCK DIAGRAM
I2S
DDC_SCL, SDA_1,2,3
HPD
TDMS
RS232C_Tx/Rx
(IC702)
HDMI_CEC
HDMI_I2C
PCM_ADD
PCM_CD_ON
TS_Serial
TS_Parallel
PCM_DATA
5V_HDMI_1, 2, 3
MUTE, AMP_RST
SIDE_Y, C_IN
SCL/SDA_SUB/AMP
SIDE_CVBS_IN
CI Slot
(P800)
CI_CD_1/2
SIDE_L,R_IN
SP (L)
KIC7SZ32FU TAS5709
(IC802) IC1000
USB_DM/DP
P1000 SP (R)
L313
1 17V 2 17V
3 GND 4 GND L316 AVDD_MPLL
L324
KEY- (Q504) AZ1117H-1.2
23 5VST 24
ON 5V_MST 3.3V_PVSB
FET 1.2V_DVDD
Waf L331 VSB IC
SMW200-24C (Q303) L503
- 14 -
er 3.3V_DVDD
VSB_Ctrl L501 3.3V_AVDD
Power_SW
NVRAM
L312
Audio
POWER FLOW DIAGRAM
L1011 3.3V_AMP_AVDD
AMP
IC804
5V_USB USB
MIC2019YM6
EEPROM
12V (HDMI)
HDMI
switch
IC503 IC505
L326
5V_TU
<Mstar Power Sequence> KIA7808AF AZ1117H-ADJ Tuner
Copyright © 2009 LG Electronics. Inc. All right reserved. - 15 - LGE Internal Use Only
Only for training and service purposes
EXPLODED VIEW
IMPORTANT SAFETY NOTICE
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These
parts are identified by in the Schematic Diagram and EXPLODED VIEW.
It is essential that these special safety parts should be replaced with the same components as
recommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.
400
600
601
602
520
900
603
250
590
270
200
240
901
501
A10
260
580
302
301
305
LV1
300
A2
303
120
310
560
330
570
400
600
601
602
520
900
603
250
590
270
200
240
901
501
A10
260
580
302
301
305
LV1
300
A2
303
120
310
560
330
570
NC_3
5 12
NC_6
1% C123 MS_SCK
0.1uF REFM I3S_OUT_BCK
C124 G5 F16 R135 100
NC_4 NC_5
MS_LRCK
R113
4.7K
6 11
SPI_CSN_1 R183 C125 0.047uF L1 E11 R136 100
100 47
CS GND RIN0M I5S_OUT_SD MS_LRCH
7 10
Flash_WP_1 FULL SPEC R186 47 C126 0 . 0 4 7 u FFULL SPEC
L2 E10
SO WP/ACC
COMP_Pr RIN0P I 2 SI6S_OUT_MUTE ROM_TX C157 C158 C159 C160
8 9 R187 47 C127 0.047uF M1 E14 R137 22 22pF 22pF
GIN0M SPDIFO SPDIF_OUT 22pF 22pF
SPI_SDO R111 FULL SPEC R188 47 C128 M2
0 . 0 4 7 u F FULL SPEC G16 50V 50V 50V
100 COMP_Y GIN0P I2S_IN_BCK 5V_ON 50V IC100-*1
MSD237HFG(SATURN4 NO-HD DIVX)
OPT OPT U2
T2
P4
GPIO148
GPIO147
AUVRM
AUVRP
N5
N4
U3
R189
GPIO146 AUVAG
0.047uF
GPIO145 AUCOM
P5
47
N6
GPIO144 AUL0
F3 P6
GPIO16 AUR0
E9 R3
GPIO14 AUL1
V11 R4
GPIO4 AUR1
V10 Y3
BIN0M I3S_IN_WS
GPIO3 AUL2
Y4
AUR2
H2 R5
RXA0N AUL3
H1 R6
RXA0P AUR3
J2 T3
RXA1N AUL4
N2 G15
J1 T4
47 C130
RXA2N AUL5
K1 T6
RXA2P AUR5
G2 Y6
RXACKN AUOUTL0
G1 W4
RXACKP AUOUTR0
D2 V3
470 C131
RXBCKN PWM4
C1 U16
RXBCKP PWM3
W9 T16
RXC0N PWM2
Y9 P16
SDA_EXPANDER
RXC0P PWM1
W10 R16
SOGIN0 SPDIFI
RXC1N PWM0
Y10 V16
RXC1P SAR5
W11 V15
RXC2N SAR4
Y11 U15
RXC2P SAR3
W8 V14
R185 100
RXCCKN SAR2
L7
Y8 Y12
RXCCKP SAR1
W12
SAR0
G4
VCLAMP
F5 E16
REXT I2S_OUT_MCK
G6 E12
SC2_ID
REFM I3S_OUT_BCK
G5 F16
HSYNC0 +5V_ST
REFP I4S_OUT_WS
L1 E11
RIN0M I5S_OUT_SD
L2 E10
RIN0P I6S_OUT_MUTE
M1 E14
GIN0M SPDIFO
M2 G16
Updated 08.07.10
GIN0P I2S_IN_BCK
M7 Y13
N1 H16
BIN0M I3S_IN_WS
N2 G15
BIN0P I4S_IN_SD
J5 F15
SOGIN0 SPDIFI
L7
TU_SLEEP_MODE
HSYNC0
M7 Y13
VSYNC0 SCK
H6 W13
47 C106
RIN2P USB_DM_P0
L4 A1
GIN2P USB_DP_P0
O C D I S O P T T I O N . ( s e e t h e s h e e t 6 ) +3.3V_EXPANDER
L3 B2
BIN2P USB_DM_P1
L5 B1
SOGIN2 USB_DP_P1
DSUB_R
K5 E7
SPI_SDI
VSYNC2 USB_VBUS_P1
OPT
R1 M5
VCOM1 TAGC
R2 M6
H5 Y14
K4 N3
CVBS7 VR12
47 C107
J4 W2
CVBS6 SIFM
K3 Y2
CVBS5 SIFP
5V_CI_CTL
J3 W1
CVBS4 VIFM
M3 Y1
R116
CVBS3 VIFP
P1
DSUB_G
SC1_VOUT_MUTE
M4 P15
FLASH SPI_SDO
CVBS1 DDCA_SDA
P2 P14
CVBS0 DDCA_SCL
T1 F6
CVBSOUT DDCDA_SDA
M16 G3
DREXT DDCDA_SCL
H3 W14
N16 E4
47 C108 4.7K
DDCDB_SCL
T14
REVISION
DDCDC_SDA
R14
DDCDC_SCL
Y15
08.07.10
DDCR_SDA
W15
HOTPLUGA
SPI_CSN_1
E5
HOTPLUDB
N15
HOTPLUDC
E3
CEC
470 C109
XIN
FOR HD
U1
XOUT
MUTE
SOGIN1 IRIN IR
2.PWM is Deleted & RTC is added FULL SPEC R163 510 G7 L18 R144 100
10K
OPT
R26
10K
R25
10K
OPT
R24
R23
FULL-HD
R157
4.7K
4.7K
SOGIN2 USB_DP_P1
R168 100 OPT K5 E7
C171 K5:CVBS OUT2 REV2‘ HSYNC2 USB_CID_P1 OPT OPT
C170 R169 100 K6 E8
10uF SC1_FB VSYNC2 USB_VBUS_P1
6.3V 0.1uF 22 R131 R170 1.2K
SCL_EXPANDER
22 R130 R176 47 C114 0.047uF R1 M5
C168
SDA_EXPANDER VCOM1 TAGC
47uF
C169
0.1uF
16V
GPIO31 48
GPIO30 47
GPIO29 46
GPIO28 45
GPIO27 44
GPIO26 43
GPIO25 42
GPIO24 41
GPIO23 40
GPIO22 39
GPIO21 38
GPIO20 37
C166
SIDE_CVBS_DET +3.3V_CI
C167
0.1uF
47uF
16V
GPIO32 GPIO19 MSTAR REQUEST 32.768K READY is OUT over SPEC VCOM0 VR27
1 36 K4 N3
GPIO33 GPIO18 08.09.12 FULL SPEC CVBS7 VR12
S_DET 2 35 R177 47 C116 0.047uF J4 W2 0.1uF C155
GPIO34 GPIO17 C175 SIDE_C_IN CVBS6 SIFM R38
COMP_DET 3 34 20pF K3 Y2 0.1uF C156 R39
R21 FULL SPEC FULL SPEC CVBS5 SIFP SIF+ 4.7K 4.7K
GPIO35 4 33 GPIO16 X101 R172 47 C117 0.047uF
RGB_DET 1M J3 W1
GND_1 5
IC109 32 I2C_SCL 12MHz SIDE_Y_IN FULL SPEC FULL0SPEC CVBS4 VIFM
R178 47 C118 .047uF M3 Y1
R22 VDDP I2C_SDA SIDE_CVBS_IN CVBS3 VIFP SDA_GREENEYE
0
6 LGE40RC-LF 31 C176 R173 47 C119 FULL0SPEC
.047uF P1
GND_2 XIN 20pF SC2_CVBS_IN CVBS2
7 30 R179 47 C120 0.047uF M4 P15 SCL_GREENEYE
VDDC HWRESET SC1_CVBS_IN CVBS1 DDCA_SDA DDC_SDA/UART_TX
8 29 R180 47 C121 0.047uF P2 P14
GPIO36 GPIO15 GPIO15: XOUT TV_CVBS+ CVBS0 DDCA_SCL DDC_SCL/UART_RX
9 28 R181 47 T1 F6 R151 22 ACTIVE LOW
SCART1_DET DTV/MNT_V_OUT CVBSOUT DDCDA_SDA DDC_SDA_1
GPIO37 10 27 GPIO14 VOLTAGE DETECTOR
+3.3V_VDDP_ST M16 G3 R149
13 GPIO00
14 GPIO01
15 GPIO02
16 GPIO03
17 GPIO04
18 GPIO05
19 GPIO06
20 GPIO07
21 GPIO08
22 GPIO09
23 GPIO10
24 GPIO11
SCART2_DET 22
GPIO38 GPIO13 DREXT DDCDA_SCL DDC_SCL_1
11 26 N16 E4 R32 22 *Mstar reset:Active high reset
SC_REC2 GPIO39 GPIO12 DACSVM DDCDB_SDA DDC_SDA_2
12 25 E6 R34 22
SC_REC1 DDCDB_SCL DDC_SCL_2
AC T14 R154 22 +3.3V_VDDP_ST
+1.8V_EXPANDER 16V KDS226 DDCDC_SDA DDC_SDA_3 +3.3V_VDDP_ST
47uF R14 R150 22
D100 R11 DDCDC_SCL DDC_SCL_3
C174 Y15
100
100
SW100
100
CEC
U14 22 R155 10
E C173 R17 HWRESET
10uF Should be on top side of PCB becase of debugging V1 C161
0 XIN
KDS181
R14 16V OPT U1 20pF
R156
USB_CTL
C178
USB_OCD
XOUT
D101
FULL SPEC X100
5V_HDMI_3
10K 1M R159
0.1uF
5V_HDMI_1
5V_HDMI_2
12MHz 33K
RTC_INT
1%
1K
LVB_4P
1/10W
R231
LVA4P A_MDATA[11] C217
M20 B7 A_MDATA[10]
LVA_0M LVB0M A_MDATA[10] 0.1uF
AR202 M19 C10 50V
LVA_0P LVB0P A_MDATA[9] A_MDATA[9]
22 N20 C7
LVA_1M LVB1M A_MDATA[8] A_MDATA[8]
1/16W N19 C6
IC100 +3.3V_AVDD_AU LVA_1P
R217 P20
LVB1P A_MDATA[7]
C11
A_MDATA[7]
22
MSD237HFG(SATURN4 NO-SD HD DIVX) C200 +3.3V_AVDD_LPLL LVA_2M
P19
LVB2M A_MDATA[6]
C5
A_MDATA[6]
22 R218 A_MDATA[5]
0.1uF LVA_2P LVB2P A_MDATA[5]
50V C206 22 R219 R20 C12
LVA_CKM LVBCKM A_MDATA[4] A_MDATA[4]
0.1uF R220 R19 B12
B15 P8 +3.3V_AVDD_MEMPLL 22 A_MDATA[3]
GND_1 AVDD_AU 50V +3.3V_AVDD_MPLL LVA_CKP LVBCKP A_MDATA[3]
D7 K18 T20 A6
LVA_3M LVB3M A_MDATA[2] A_MDATA[2]
GND_2 AVDD_LPLL C215 AR203 T19 A12
D8 N7 LVA_3P A_MDATA[1] A_MDATA[1]
GND_3 AVDD_MPLL 0.1uF LVB3P
D12 D14 22 U20 B6
+3.3V_AVDD_ADC 50V LVA_4M LVB4M A_MDATA[0] A_MDATA[0]
GND_4 AVDD_MEMPLL 1/16W U19 C13
D13 H7 LVA_4P A_MADR[12] A_MADR[12]
GND_5 AVDD_33_1 LVB4P
F7 J6 D4 R241 56
GND_6 AVDD_33_2 C204 C210 +3.3V_AVDD_OTG A_MADR[11] A_MADR[11]
J9 J7 0.1uF 0.1uF TS_D[7] V5 C14
GND_7 AVDD_33_3 C214 TS0DATA[7] A_MADR[10] A_MADR[10]
J10 K7 50V 50V TS_D[6] T8 A14
0.1uF +3.3V_AVDD_VIF TS0DATA[6] A_MADR[9] A_MADR[9]
GND_8 AVDD_33_4 TS_D[5] T7 D5 R242 56
J11 F8 50V A_MADR[8] A_MADR[8]
GND_9 AVDD_USB TS0DATA[5]
J12 P7 TS_D[4] R8 B13
TS0DATA[4] A_MADR[7] A_MADR[7]
GND_10 AVDD_VIF C216 TS_D[3] R7 D6
J13 P13 +3.3V_VDDP 0.1uF A_MADR[6]
GND_11 AVDD_DM TS0DATA[3] A_MADR[6]
K9 N8 50V TS_D[2] U6 B14
TS0DATA[2] A_MADR[5] A_MADR[5]
GND_12 VDDP_1 TS_D[1] U5 A3
K10 N12 C201 C207 A_MADR[4]
GND_13 VDDP_2 TS0DATA[1] A_MADR[4]
K11 P11 0.1uF 0.1uF +1.8V_DDR2_MAIN TS_D[0] V4 A13
TS_D[0-7] TS0DATA[0] A_MADR[3] A_MADR[3]
GND_14 VDDP_3 50V 50V Y7 B3
K12 P12 A_MADR[2]
GND_15 VDDP_4 TS_CLK TS0CLK A_MADR[2]
K13 G11 V6 A15
TS_VALID TS0VALID A_MADR[1] A_MADR[1] OPT
GND_16 AVDD_DDR_1 C209 W5 C3
L9 G12 C202 A_MADR[0]
GND_17 AVDD_DDR_2 0.1uF TS_SYNC TS0SYNC A_MADR[0] 1G 56 R278
L10 G13 0.1uF 33 R221 M17 F14 R276
GND_18 AVDD_DDR_3 50V 50V BUF_TS_DATA[0] TS1DATA A_BADR[2] A_BA2 f o r 1 G M e m o r0y
L11 G14 33 R222 N18 D10 R243 56
GND_19 AVDD_DDR_4 BUF_TS_CLK TS1CLK A_BADR[1] A_BA1
L12 H14 +1.25V_AVDD_DVI 33 R223 L17 D9 R244 56
GND_20 AVDD_DDR_5 BUF_TS_VAL TS1VALID A_BADR[0] A_BA0
L13 G10 33 R224 P18 B5 R233 33
GND_21 AVDD_DVI BUF_TS_SYNC TS1SYNC A_MCLK A_MCLK+
L19 H9 C205 A5 R234 33
GND_22 VDDC_1 +1.25V_VDDC A_MCLKZ A_MCLK-
L20 H10 0.1uF PCM_D[7] U7 D11 R245 56
GND_23 50V PCM_D[7]/CI_D[7] A_MCLKE A_CLKE
VDDC_2 PCM_D[6] U8 C4 R246 56
M9 J15 PCM_D[6]/CI_D[6] A_ODT
GND_24 VDDC_3 A_ODT
M10 K15 PCM_D[5] U9 D3 R247 56
GND_25 VDDC_4 PCM_D[5]/CI_D[5] A_WEZ A_WE
M11 L15 C203 C208 C213 PCM_D[4] T9 B4 R248 56
GND_26 VDDC_5 PCM_D[4]/CI_D[4] A_RASZ A_RAS
M12 M15 0.1uF 0.1uF 0.1uF PCM_D[3] R9 A4 R249 56
GND_27 VDDC_6 50V 50V 50V PCM_D[3]/CI_D[3] A_CASZ A_CAS
M13 N10 PCM_D[2] P9 E15
GND_28 VDDC_7 PCM_D[2]/CI_D[2] B_MVREF
W6 N11 PCM_D[1] R10 F18 R235 56
GND_29 VDDC_8 PCM_D[1]/CI_D[1] B_DDR2_DQM[1] B_DQM1
100 R212 W7 P10 PCM_D[0] R11 E20 R236 56
HDMI_CEC GND_30 VDDC_9 PCM_D[0]/CI_D[0] B_DDR2_DQM[0] B_DQM0
PCM_A[14] V7 D20 R237 56
PCM_A[14]/CI_A[14] B_DDR2_DQS[1] B_DQS1P
PCM_D[0-7] PCM_A[13] V8 E19 R238 56 B_DQS0P
PCM_A[13]/CI_A[13] B_DDR2_DQS[0]
PCM_A[12] U10 D19 R239 56
PCM_A[12]/CI_A[12]B_DDR2_DQSB[1] B_DQS1M
PCM_A[11] T10 E18 R240 56
PCM_A[11]/CI_A[11]B_DDR2_DQSB[0] B_DQS0M
Next Revision Ready (Stand By 0.2W)_080403 PCM_A[10] T11 D18
PCM_A[10]/CI_A[10] B_MDATA[15] B_MDATA[15]
PCM_A[9] V9 F19 B_MDATA[14]
PCM_A[9]/CI_A[9] B_MDATA[14]
PCM_A[8] U11 C18 B_MDATA[13]
PCM_A[8]/CI_A[8] B_MDATA[13]
PCM_A[7] R12 G18 B_MDATA[12]
PCM_A[7]/CI_A[7] B_MDATA[12]
PCM_A[6] T12 G19 B_MDATA[11]
PCM_A[6]/CI_A[6] B_MDATA[11]
PCM_A[5] U12 C19 B_MDATA[10]
PCM_A[5]/CI_A[5] B_MDATA[10]
PCM_A[4] V12 F20
PCM_A[4]/CI_A[4] B_MDATA[9] B_MDATA[9]
PCM_A[3] R13 C20
PCM_A[3]/CI_A[3] B_MDATA[8] B_MDATA[8]
PCM_A[2] T13 B20
PCM_A[2]/CI_A[2] B_MDATA[7] B_MDATA[7]
PCM_A[1] U13 G20
PCM_A[1]/CI_A[1] B_MDATA[6] B_MDATA[6]
PCM_A[0] V13 A20
PCM_A[0-14] PCM_A[0]/CI_A[0] B_MDATA[5] B_MDATA[5]
U18 H20
PCM_IORD_N PCMIOR/CI_RD B_MDATA[4] B_MDATA[4]
T18 H19
PCM_IOWR_N PCMIOW/CI_WR B_MDATA[3] B_MDATA[3]
U17 B18
PCM_REG_N PCMREG/CI_CLK B_MDATA[2] B_MDATA[2]
T17 H18
PCM_CE_N PCMCEN/CI_CS B_MDATA[1] B_MDATA[1]
R17 B19
PCM_IRQA_N PCMIRQ/CI_INT B_MDATA[0] B_MDATA[0]
R18 K20
PCM_WAIT_N PCMWAIT/CI_WACK B_MADR[12] B_MADR[12]
V18 C15 R252 56
PCM_OE_N PCMOEN B_MADR[11] B_MADR[11]
V17 J20
PCM_WE_N PCMWEN B_MADR[10] B_MADR[10]
P17 K19
PCM_RESET CI_RST B_MADR[9] B_MADR[9]
N17 A16 R253 56
PCM_CD_N CI_CD B_MADR[8] B_MADR[8]
J17
B_MADR[7] B_MADR[7]
D15
B_MADR[6] B_MADR[6]
H17
B_MADR[5] B_MADR[5]
B16
B_MADR[4] B_MADR[4]
G17
B_MADR[3] B_MADR[3]
D16
B_MADR[2] B_MADR[2]
F17
B_MADR[1] B_MADR[1]
C16
B_MADR[0] B_MADR[0]
K17 R277 1G R279
56
B_BADR[2] B_BA2 f o r 1 G M e m o r y0
E17 R254 56
B_BADR[1] B_BA1
J19 R255 56
B_BADR[0] B_BA0
A19 R250 33
B_MCLK B_MCLK+
A18 R251 33
B_MCLKZ B_MCLK-
J18 R256 56
B_MCLKE B_CLKE
C17 R257 56
B_ODT B_ODT
D17 R258 56
B_WEZ B_WE
B17 R259 56
B_RASZ B_RAS
A17 R260 56
B_CASZ B_CAS
IC300 IC301
R350 R354
1K 1K
1%
H5PS5162FFR-S6C H5PS5162FFR-S6C
1%
BA0 L2 BA0
A_BA0 +1.8V_DDR2_MAIN B_BA0 L2 +1.8V_DDR2_MAIN
BA1 L3 Close to DDR Power Pin BA1 Close to DDR Power Pin
A_BA1 VDD5 B_BA1 L3 VDD5
A1 A1
E1 VDD4 VDD4
E1
C309
C310
C311
C312
C313
C314
C315
C316
C317
C318
C328
C329
C330
C331
C332
C333
C334
C335
C336
C337
C304
C305
C306
C307
C308
C323
C324
C325
C326
C327
CK J8 J9 VDD3 CK VDD3
A_MCLK+ B_MCLK+ J8 J9
CK K8 M9 VDD2 CK VDD2
A_MCLK- K8 M9
CKE VDD1 B_MCLK-
K2 R1 CKE K2 R1 VDD1
A_CLKE
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
B_CLKE
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
ODT K9 ODT
A_ODT B_ODT K9
CS L8 A9 VDDQ10 CS VDDQ10
L8 A9
RAS K7 C1 VDDQ9 RAS VDDQ9
A_RAS B_RAS K7 C1
CAS L7 C3 VDDQ8 CAS VDDQ8
A_CAS B_CAS L7 C3
WE K3 C7 VDDQ7 WE VDDQ7
A_WE B_WE K3 C7
C9 VDDQ6 VDDQ6
C9
E9 VDDQ5 VDDQ5
LDQS LDQS E9
A_DQS0P F7 VDDQ4 F7
G1 B_DQS0P G1 VDDQ4
UDQS B7 UDQS
A_DQS1P VDDQ3 B_DQS1P B7 VDDQ3
G3 G3
G7 VDDQ2 VDDQ2
G7
LDM F3 G9 VDDQ1 LDM VDDQ1
A_DQM0 B_DQM0 F3 G9
UDM B3 UDM
A_DQM1 B_DQM1 B3
B2 VSSQ10 VSSQ10
NC1 NC1 B2
A2 VSSQ9 A2
B8 B8 VSSQ9
NC2 E2 NC2
VSSQ8 E2 VSSQ8
NC3 A7 A7
R8 NC3 R8
D2 VSSQ7 VSSQ7
D2
D8 VSSQ6 VSSQ6
D8
VSSDL E7 VSSQ5 +1.8V_DDR2_MAIN VSSQ5
+1.8V_DDR2_MAIN J7 FOR ELPIDA FOR ELPIDA
VSSDL J7 E7
F2 VSSQ4 IC300-*1 IC301-*1
VSSQ4
EDE5116AJBG-8E-E
VREF J2 G8
G2
H7
DQ0
DQ1
DQ2
EDE5116AJBG-8E-E
VREF J2 G8
G2
H7
DQ0
DQ1
DQ2
F2
VSSQ3
A0 M8 A0 M8
H3 DQ3 H3 DQ3
A1 M3 A1 M3
VSSQ3
H1 DQ4 H1 DQ4
A2 M7 A2 M7
F8
H9 DQ5 H9 DQ5
A3 N2 A3 N2
F1 DQ6 F1 DQ6
F8
A4 N8 A4 N8
F9 DQ7 F9 DQ7
A5 N3 A5 N3
C8 DQ8 C8 DQ8
A6 N7 A6 N7
C2 DQ9 C2 DQ9
A7 P2 A7 P2
D7 DQ10 D7 DQ10
A8 P8 A8 P8
D3 DQ11 D3 DQ11
A9 P3 A9 P3
D1 DQ12 D1 DQ12
VSSQ2
A10 M2 A10 M2
D9 DQ13 D9 DQ13
A11 P7 A11 P7
VSSQ2
B1 DQ14 B1 DQ14
A12 R2 A12 R2
H2
DQ15 DQ15
C321
B9 B9
C302
BA0
BA1
CK
CK
L2
L3
J8
K8
A1
E1
J9
M9
VDD_5
VDD_4
VDD_3
VDD_2
BA0
BA1
CK
CK
L2
L3
J8
K8
A1
E1
J9
M9
VDD_5
VDD_4
VDD_3
VDD_2
H2
VDDL VSSQ1
CKE VDD_1 CKE VDD_1
0.1uF
K2 R1 K2 R1
0.1uF J1 H8
ODT
CS
RAS
CAS
WE
K9
L8
K7
L7
K3
A9
C1
C3
C7
C9
VDDQ_10
VDDQ_9
VDDQ_8
VDDQ_7
VDDQ_6
ODT
CS
RAS
CAS
WE
K9
L8
K7
L7
K3
A9
C1
C3
C7
C9
VDDQ_10
VDDQ_9
VDDQ_8
VDDQ_7
VDDQ_6
VDDL J1 H8 VSSQ1
E9 VDDQ_5 E9 VDDQ_5
LDQS F7 LDQS F7
G1 VDDQ_4 G1 VDDQ_4
UDQS B7 UDQS B7
G3 VDDQ_3 G3 VDDQ_3
G7 VDDQ_2 G7 VDDQ_2
LDM F3 G9 VDDQ_1 LDM F3 G9 VDDQ_1
UDM B3 UDM B3
B2 VSSQ_10 B2 VSSQ_10
NC_1 A2 NC_1 A2
B8 VSSQ_9 B8 VSSQ_9
NC_2 E2 NC_2 E2
A7 VSSQ_8 A7 VSSQ_8
NC_3 R8 NC_3 R8
D2 VSSQ_7 D2 VSSQ_7
D8 VSSQ_6 D8 VSSQ_6
VSSDL E7 VSSQ_5 VSSDL E7 VSSQ_5
J7 J7
F2 VSSQ_4 F2 VSSQ_4
F8 VSSQ_3 F8 VSSQ_3
H2 VSSQ_2 H2 VSSQ_2
VDDL J1 H8 VSSQ_1 VDDL J1 H8 VSSQ_1
AR300 AR304
56 56
1/16W 1/16W
DDR2_A_MDATA[11] A_MDATA[11] DDR2_B_MDATA[11] B_MDATA[11]
DDR2_A_MDATA[12] A_MDATA[12] AR309 DDR2_B_MDATA[12] B_MDATA[12]
56 AR312
DDR2_A_MDATA[9] A_MDATA[9] 1/16W DDR2_B_MDATA[9] B_MDATA[9]
56
DDR2_A_MDATA[14] A_MDATA[14] DDR2_B_MDATA[14] B_MDATA[14] 1/16W
AR301 AR305 B_MADR[10] DDR2_B_MADR[10]
56 A_MADR[1] DDR2_A_MADR[1] 56
1/16W A_MADR[10] 1/16W B_MADR[1] DDR2_B_MADR[1]
DDR2_A_MADR[10]
A_MDATA[4] A_MADR[5] B_MADR[3] DDR2_B_MADR[3]
DDR2_A_MDATA[4] DDR2_A_MADR[5] DDR2_B_MDATA[4] B_MDATA[4]
A_MDATA[3] B_MADR[5] DDR2_B_MADR[5]
DDR2_A_MDATA[3] AR310 DDR2_B_MDATA[3] B_MDATA[3]
A_MDATA[1] 56 AR313
DDR2_A_MDATA[1] 1/16W DDR2_B_MDATA[1] B_MDATA[1]
56
DDR2_A_MDATA[6] A_MDATA[6] DDR2_B_MDATA[6] B_MDATA[6] 1/16W
A_MADR[9] DDR2_A_MADR[9]
AR302 AR306 B_MADR[7] DDR2_B_MADR[7]
56 A_MADR[12] DDR2_A_MADR[12]
56
1/16W A_MADR[7] DDR2_A_MADR[7] 1/16W B_MADR[9] DDR2_B_MADR[9]
DDR2_A_MDATA[15] A_MDATA[15] A_MADR[3] DDR2_A_MADR[3] B_MDATA[15] B_MADR[12] DDR2_B_MADR[12]
DDR2_B_MDATA[15]
DDR2_A_MDATA[8] A_MDATA[8] AR311 B_MDATA[8]
DDR2_B_MDATA[8]
DDR2_A_MDATA[10] A_MDATA[10] 56 B_MDATA[10] AR308
1/16W DDR2_B_MDATA[10] 56
DDR2_A_MDATA[13] A_MDATA[13] B_MDATA[13]
DDR2_B_MDATA[13] 1/16W
A_MADR[0] DDR2_A_MADR[0]
AR303
56 A_MADR[2] DDR2_A_MADR[2] AR307 B_MADR[0] DDR2_B_MADR[0]
1/16W 56
A_MADR[4] DDR2_A_MADR[4] 1/16W B_MADR[2] DDR2_B_MADR[2]
DDR2_A_MDATA[7] A_MDATA[7] A_MADR[6] DDR2_A_MADR[6] B_MADR[4] DDR2_B_MADR[4]
DDR2_B_MDATA[7] B_MDATA[7]
DDR2_A_MDATA[0] A_MDATA[0] B_MADR[6] DDR2_B_MADR[6]
DDR2_B_MDATA[0] B_MDATA[0]
DDR2_A_MDATA[2] A_MDATA[2]
DDR2_B_MDATA[2] B_MDATA[2]
DDR2_A_MDATA[5] A_MDATA[5]
DDR2_B_MDATA[5] B_MDATA[5]
OPT
GND OPT 10K R435
8 10K
C415
OPT
SCL_SUB IC400 IC402
9 R403 100 MIC2019YM6 PCA9517DGKR 0.1uF
OPT
SCL_SUB/AMP
010:D9;001:Y15 010:D9;001:Y14 50V
10
SDA_SUB 100 R400 VIN
1 6
VOUT
001:AA7
VCCA
1 8
VCCB
004:T7
SDA_SUB/AMP 33 R416
0M C414 GND
2 5
ILIMIT
SCL_GREENEYE SCLA
2 7
SCLB SCL_TRACE_GRRENEYE
OPT
11 0.1uF R431 33 OPT R417
LVA_0M 004:H4;002:O18 ENABLE FAULT SDAA SDAB OPT
33
OP 50V 3 4 SDA_GREENEYE 3 6
SDA_TRACE_GRRENEYE 004:T7
12 LVA_0P 004:H5;002:O18 OPT GND EN 0 R432 OPT
001:AA7 R429 33 4 5
GREENEYE_CTRL 001:E4
1M R426
13 LVA_1M 004:H5;002:O18 180
1P USB_CTL
14 LVA_1P 004:H5;002:O18 001:G4 R430
2M R425 USB_OCD 33 FULL SPEC
15 004:H5;002:O18
LVA_2M 0 001:G4
R433
2P 33
16 004:H5;002:O17 Will be changed for NEW MODEL
LVA_2P
CKM FULL SPEC
17 LVA_CKM 004:H6;002:O17
CMP
18 LVA_CKP 004:H6;002:O17
3M
19 LVA_3M 004:H6;002:O17
3P
20 LVA_3P 004:H6;002:O17
4M
21 LVA_4M 004:H6;002:O16
4P
22 LVA_4P 004:H6;002:O16
PC_SER_CLK R402 0 ROM_DL
23
PC_SER_CLK 007:AB3
PC_SER_DATA R401 0 ROM_DL
24 PC_SER_DATA 007:AB4
DISP_EN
25
NC
R405FOR HD22
26
R404
DISP_EN
004:I3;001:E9 IR/CONTROL_REVERSE Will be changed for NEW MODEL & WAFER IS LOCKING TYPE
P402
2K 12507WS-15L
C400
P403
TF05-51S FOR HD +3.3V_VDDP_ST 680pF
L407
NC
OPT MBW2012-301F
1
NC
R411 0 IR
1
2
001:X10 IR
ROM_TX
3
4
ROM_RX R407
NC 10K R421 GND
5
GND
0 2
6 001:V13KEY1
GND
7
GND FOR KEY_ESD FOR EMI KEY1
8 R406 C402 3
NC
10K C406-*1 FOR KEY_C
9
1000pF
10
NC
CDS3C05GTA C406
4+ R423 10pF
11
4- LVB_4P 0 KEY2
4
12
3+ LVB_4M 001:V14 KEY2
13
3-
LVB_3P FOR KEY_ESD FOR EMI
14
GND
LVB_3M C405-*1 C401 FOR KEY_C KEY_ON
15
CK+ R418 CDS3C05GTA 1000pF C405 5
16
CK-
LVB_CKP 0
10pF
17
18
GND LVB_CKM 0 1 1 : IKEY_ON
15 GND
C413 6
19
2+
KEY ON(NEW POWER B/D
20
2- LVB_2P 1000pF
1+ LVB_2M FOR EMI
21
LVB_1P SCL_EYE
1-
7
22
0+ LVB_1M SCL_TRACE_GRRENEYE
004:AA16
23
LVB_0P C410
0-
24
NC
LVB_0M 33pF SDA_EYE
25
OPT 8
26
NC SDA_TRACE_GRRENEYE
004:AA16
D4+ C408
FULL-HD 27
D4-
LVA_4P 004:H13;002:O16
33pF GND
28
D3+
LVA_4M 004:H13;002:O16
OPT 9
29
D3-
LVA_3P 004:H13;002:O17 +5V_ST
30
GND
LVA_3M 004:H13;002:O17 +5V_MULTI L403
31
BG2012B121F 5V_ST
BG2012B121F
0CK+
10
32
0CK-
LVA_CKP 004:H14;002:O17 C403
33
LVA_CKM004:H14;002:O17
L406
34
GND
4.7uF
D2+
16V 5V_Multi
35
D2- LVA_2P 004:H14;002:O17 11
36
D1+ LVA_2M 004:H15;002:O18 C411
37
D1-
LVA_1P 004:H15;002:O18 4.7uF
GND
38
D0+
LVA_1M 004:H15;002:O18 16V 12
39
D0-
LVA_0P 004:H16;002:O18
40
GND
LVA_0M 004:H16;002:O18 R420
41
10K LED_RED
42
NC
LED_RED 13
NC
43
44
NC
R422
NC FULL-HD 0 LED_GRE
45
SDA 0 0 1 : I 1 6 ; 0 0 1LED_GRE
:V15 14
46 C404
47
DISP_EN R413 22 1000pF C407
48
SCL
DISP_EN FOR EMI 10pF PWM
PC_SER_DATA 15
49 004:J11;001:E9
PC_SER_CLK
50
GND
51
R412 16
52 1K
GND
FULL-HD GND
16V 16V
R507 10 XC5000_RESET_N
0.1uF 0.1uF
C508 C504
+3.3V_TU_XE 16V
0.1uF +1.8V_TU_XE
50V C507 16V
1000pF 0.1uF +3.3V_TU_XE
C521 R504 1% C524
4.99K +3.3V_TU_XE TU_TS_CLK,TU_TS_DATA[0-7],TU_TS_SYNC,TU_TS_VAL
1000pF
+1.8V_TU_XE
KCN-ET-0-0094
C514
TU_TS_DATA[7]
TU_TS_DATA[6]
TU_TS_DATA[5]
TU_TS_DATA[4]
TU_TS_DATA[3]
TU_TS_DATA[2]
TU_TS_DATA[1]
TU_TS_DATA[0]
TU_TS_CLK
TU_TS_VAL
TU_TS_SYNC
VDDA_8
VDDA_7
VDDC_9
VDDC_8
VDDC_7
VDDC_6
VREF_N
50V
VREF_P
GND_9
RESET
+3.3V_TU_CE
REXT
VI2C
JK500
R501
R502
C518 1. France ATV channel skip
1K
39pF
1K
48
47
46
45
44
43
42
41
40
39
38
37
C532
56pF
0.1uF
1 IN1 2 35 SDA
C503
16V
L505 270nH
GND_1 SCL
33 R519
33 R511
33 R529
33 R513
33 R527
0603CS-R39XGLW
2 3 34
C511
0603CS-R27XGLW
18pF
390nH
R518
33 R523
33 R517
33 R510
50V
R528
RCLAMP0502B D503
RCLAMP1521P D502
C1 IN2 4 33 VDDD_2
C502 C515
IC500 R558
33
A C546 820nH GND_2 5 32 EXTREF 18pF 18pF
C568
100
OPT
X-TAL_2
33
C510 1008CS-821XGLC
EXTCHOKE X1 50V 50V
C2 6 XC5000 31 +1.8V_TU_CE
GND_2
X501 OPT
OPT
0.1uF
L504
C523
C528 VDDA_2 X2 100 R531 0.1uF
8 29 16V
31.875MHz
0.1uF
0.1uF
C530 VDDA_3 9 28 ADDRSEL OPT 0
50V
3
C526
OPT
18pF
16V
120pF
c r y s t aX502
C520 VDDC_1 DDI2
l_2
10 27
0.1uF GND_4 11 26 VDDC_5
CVDD_6
CVDD_5
R522
VSS_11
VSS_10
MOCLK
R516
BKERR
1
MICLK
VDD_5
VDDC_2 DDI1
33
12 25
MDO7
MDO6
MDO5
MDO4
MDO3
MDO2
MDO1
MDO0
NEED TO CHANGE NEW PAL SHIELD CASE
33
X-TAL_1
GND_1
C517 C545
13
14
15
16
17
18
19
20
21
22
23
24
2008. 08. 30
0.1uF 1nF
SDA_D_TU
SCL_D_TU
+3.3V_TU_CE R533 50V
SIF
VIF
+3.3V_TU_XE 22K
GND_5
GND_6
VAGC
VDDC_3
VDDC_4
VDDA_4
VDDA_5
VDDA_6
VDDD_1
TESTMODE
+1.8V_TU_XE +1.8V_TU_XE
+5V_TU
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
L507
CM2012F2R2KT +3.3V_TU_CE
16V
0.1uF VSS_1 1 48 MOVAL
16V
16V C505
0.1uF VDD_1 47 MOSTRT
R554
0.1uF 2 R532
C563 C527 C512
390
C 8 41
IF_AGC
10pF +1.8V_TU_CE
TUNER_SIF_IF_N
RESET 9 40 VSS_8
005:A11
CE6355_RESET_N
+5V_TU SLEEP 10 39 CVDD_4
TU_SLEEP_MODE
ACTIVE HIGH STATUS 11 38 VSS_7
4.7K SADD4 37 CVDD_3
R542
390
C564 R525 12
A2[GN]
0 13 36 10K
SIF+
001:V7 VSS_4 14 35 CLK2/GPP0 R515 +3.3V_TU_CE
10K
+5V_TU
D501 SADD3 15 34 RFLEV
OPT
ISA1530AC1
R541
390
0.1uF
B Q506 16V
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
C
TV_CVBS+
XTI
001:M6
VSS_5
VSS_6
VIN
VIN
XTO
PLLTEST
AVDD
SADD1
SADD0
CVDD_2
PLLVDD
PLLGND
AGND_1
AGND_2
OSCMODE
+1.8V_TU_CE
+5V_TU
L502
R556 E
2.7uH
680
ISA1530AC1
C539
0.1uF
16V
C541
B Q502 C566
R552
390
0.1uF
TUNER_CVBS_IF_P C567 0.1uF 50V
C R524
10pF 10K
SC1_TV_VOUT
22pF
22pF
C538
C542
OPT
OPT
R526
E
10K
OPT
OPT
ISA1530AC1 R521
100K
B Q503
C
+5V_TU R520
X500 R512
20.48MHz 0.1uF
16V 0.1uF
R550
C565 16V
390
0.1uF Q504
KRA102S 100 C540 C543
0
16V R538
R508
27pF 27pF
DTV_IF_P Q505 SC1_VOUT_MUTE
50V 50V
0.1uF
C560
2SC3875S(ALY) R537 2K 3 1
DTV_IF_N
DTV_IF_P
E 2
Q501 08.10.06 CHANGE LOAD CAP 22pF -> 27pF
B ISA1530AC1
R630
10K
SCART SCART JACK is changed because of SCART DETECTION siganl.
PIN 22 is added. 08.07.10
L604
SC1_CVBS_IN SCART1_DET 001:B6
R613 R634
C611 8OHM 001:M6
1K
75 56pF C620
1% 50V 0.1uF +5V_GENERAL
L613
16V CB3216PA501E
10K
R667
GND OPT R685
C652 0.1uF 47 R686 SCART2_DET
E 330 R670 001:B6
C644 1K
23 L611
C653 0.1uF 2SA1504S 0.1uF
C Q602 B SC2_CVBS_IN 16V
23 R696 001:M7 P_12V
27K
23 C635 8OHM
330 C R648
R677
Q608 B C C646 L612
75 56pF
C616 2SC3052 R682 10uF CB3216PA501E
22 100uF 82 23 1% 50V
22 Q603 B 16V
16V E 2SC3052 SC1_TV_VOUT
21 005:O6 OPT
R695 R671 R676
21 0 OPT 22
470 E 22 C654 0.1uF 47 R688
20 R612 E
20 68 21 330
27K
R681
R672
R683
21
R678
330
330
C655 0 . 1 u F
1K
19 2SA1504S
19 20 Q609 B
20 C
18 R674
27K
18 19 330 C
R690
Q607 B C C645
19
17 2SC3052 R675 10uF
17 22 18 R641 Q601 B 82 16V
R623 SC1_FB 18 75
001:M8 E 2SC3052 DTV/MNT_V_OUT
16 C647 001:M6
16 17 R697 R673
SC1_R 001:M9 0.1uF 17 0 OPT 1.8K E
15 50V C622
15 R601 D617 R610 16
100uF
10K
16
R684
R689
R680
CDS3C30GTH 75
R687
330
330
14 75 1% 30V 1%
1K
14 15 16V
15
13
13 14
14
12
12 13
SC1_G 001:M9 13 R642 R663
11 75 0
11 R602 12
12 REC_8 006:K4
. 10 75 1% 11 L609 R666
11 8OHM R654 56K
. 9 R626 001:V19
56K . 10 10K SC2_ID
SC1_ID 001:V14 SC2_L_IN 001:M11
SC_ID 8 R645 C632 R669
. 9 R660 C639
470K 330pF 11K
SC1_B 001:M9 R629 12K 560pF
B 7 50V
SC2_ID 8 50V
11K
R603
LIN 6 75 Changed 24K to 11K because of ID level
. 7
1% L603 L607
C631 2008. 07. 11
GND 5 47uF
8OHM R617 L_IN 6 BG2012B080TF 16V R691
10K 1K
GND 4
SC1_L_IN 001:V19 GND 5
C626 C648 DTV/MNT_L_OPOUT
3 C609
L_OUT R604 C613 1000pF 6800pF 006:O3
330pF R622 GND 4
560pF 50V L608
2 470K 50V 12K
R_IN 50V OPT R652
L_OUT 3 8OHM
10K
R_OUT 1 SC2_R_IN 001:V19
R_IN 2
R643 C630 R657 C637
C608 R_OUT 1 470K 330pF 12K 560pF
L601 47uF 50V
BG2012B080TF R692 50V
JK600 16V
1K
TV_L_OPOUT
C649 006:AA3 JK601 L606
C603 R694
6800pF BG2012B080TF
1000pF 1K
50V OPT ADD LPF IN AUDIO OUT 2008.10.24 C651
DTV/MNT_R_OPOUT
L602 C623 C625 006:O8
6800pF
8OHM R609 1000pF 47uF
10K 16V
SC1_R_IN 001:V19 50V OPT
C607
R600 330pF R616 C610
470K 50V 12K 560pF
50V
TV_R_OPOUT
DTV/MNT_R_OPOUT 006:H8
L600 C605
BG2012B080TF R693 006:Y10 IC600 33pF C604 6800pF
1K LM324D OPT
TV_R_OPOUT C618 R658 10K
C650 006:AA9 6800pF
C600 C602 6800pF OPT OUT1 1 14 OUT4 10K R611
1000pF
50V
47uF
16V [SCART PIN 8] C612 33pF NEED TO CHECK RESISTOR VALUE BECAUSE AUDIO OUTPUT
INPUT1+ 3 12 INPUT4+
R653 5.6K 5.6K R651
DTV/MNT_R_OUT TV_R_OUT
R637
10K 001:AB18 001:AC15
P_12V GND
C VCC 4 11
B Q606 L605
R632 120-ohm
2SC3875S(ALY)
INPUT2+ 5 10 INPUT3+
10K R639 5.6K R618 TV_L_OUT
E C619
12K 0LCML00003B 001:AC15
SCART 0OHM 0.1uF
INPUT2- 6 9 INPUT3-
L600-*1 0 L606-*1 0 C
001:B5
B Q605
33pF C606
SC_REC1 R631 5.6K
L601-*1 0 L607-*1 0 2SC3875S(ALY) DTV/MNT_L_OUT OUT3
R635 OUT2 7 8
001:AB18
15K E C617 33pF
10K R625
L602-*1 0 L608-*1 0
FULL SPEC
RS232C
R724 FULL SPEC
10K
R725
Component 1K
COMP_DET 001:B7
FULL SPEC D714 C728 C729
JK701 CDS3C05GTA 0.47uF 0.47uF
5.6V C727 25V
PPJ209-02 0.47uF 25V
OPT
25V C730
0.47uF
2A [GN]1P_CAN 25V
DOUT2
DUMMY_BODY
RIN2
C2-
C1-
C2+
C1+
4A [GN]CONTACT
V-
V+
FULL SPEC
FULL SPEC R733
JK707 3A [GN]O_SPRING C712 22
1
Side S-Video PPJ232-01
2B [BL]1P_CAN
D709
CDS3C30GTH
FULL SPEC
R726
0.1uF
50V
FULL SPEC
COMP_Y 001:M12
IC702
FULL SPEC 1 30V 75
Dummy OPT FULL SPEC R734 MAX3232CDR
JK705 5B [BL]C_LUG_L C713 22
PSJ015-02 2 COMP_Pb 001:M11
D710 FULL SPEC 0 . 1 u F
CDS3C30GTH R727 50V
10
11
12
13
14
15
16
3 2C [RD]1P_CAN1 30V 75
9
3 FULL SPEC
OPT FULL SPEC R735
GND
VCC
DOUT1
ROUT2
ROUT1
DIN2
DIN1
RIN1
5C [RD]C_LUG_L C714 22
4 COMP_Pr 001:M12
4D D711 FULL SPEC 0 . 1 u F +3.3V_AVDD
2D [WH]1P_CAN CDS3C30GTH R728 50V
30V 75 FULL SPEC C731
SIDE_Y_IN OPT R737 0.47uF
4C 10K 25V
CDS3C30GTH 001:M7 5D [WH]C_LUG_L
D704 R707 COMP_L_IN 001:V18
30V 75 FULL SPEC FULL SPEC FULL SPEC
D712 R729 C715 R755
4B FULL SPEC FULL SPEC 2E [RD]1P_CAN2 CDS3C05GTA 100pF R742 R756
470K 4.7K R761 R764 R766
5.6V 50V 12K 4.7K
100 100 0
OPT
4E [RD]CONTACT
4A FULL SPEC
SIDE_C_IN R736 001:O20 RS232C_TXD
CDS3C30GTH 001:M7 10K
R706 3E [RD]O_SPRING
D703 75 COMP_R_IN 001:V18
5 30V D713 FULL SPEC FULL SPEC
FULL SPEC FULL SPEC
FULL SPEC CDS3C05GTA R730 C716 R743
5.6V 100pF
470K 50V 12K 001:O20RS232C_RXD
OPT
7 +5V_GENERAL
FULL SPEC
R702
10K
PC AUDIO
JK702 JK704
KCN-DS-1-0088
PEJ024-01
S_DET
9
3 E_SPRING
CDS3C30GTH 001:B7 FULL SPEC
10
D702
30V T_TERMINAL1
6A
5
FULL SPEC FULL SPEC
R738
7A B_TERMINAL1 10K
PC_R_IN 001:V18
FULL SPEC FOR DEB +5V_ST
4 R_SPRING C717
100pF
FULL SPEC
R731
FULL SPEC
R740
PC D723
KDS184
A2
50V 470K 4.7K
5 T_SPRING C
FULL SPEC
R739 A1
7B B_TERMINAL2 10K FULL SPEC
IC701
PC_L_IN 001:V19 FULL SPEC
FULL SPEC AT24C02BN-10SU-1.8 C724
T_TERMINAL2 C718 FULL SPEC 0.1uF
Side AV 6B
SHIELD_PLATE
100pF
50V
FULL SPEC
R732
470K
R741
4.7K
A0
1 8
VCC
50V
FOR DEB
R757
8 A1 WP R754
SIDE_CVBS_IN 2 7
4.7K 4.7K
FULL SPEC FULL SPEC 001:M7 FOR DEB
FULL SPEC A2 SCL
D706 R713
3 6 DDC_SCL/UART_RX 001:V6
JK700 +5V_GENERAL 30V 75 GND SDA
FULL SPEC 4 5 DDC_SDA/UART_TX
0 01:O19;001:V6
PPJ218-02 FULL SPEC R752
[YL]O_SPRING
R712 FULL SPECC720 10K C725 C726
4A 10K FULL SPEC R746 22pF 18pF 18pF FOR DEB OPT
FULL SPEC SIDE_CVBS_DET C719 FOR DEB R760
10K 50V 50V 50V R758 22
0 R788
FULL SPEC 22pF 22
5A [YL]CONTACT 50V OPT OPT
001:B8 FULL SPEC FULL SPEC
FULL SPEC C706 FULL SPEC D718
D705 D717 30V
0.1uF +5V_USB_N R744 30V CDS3C30GTH
[YL]U_CAN 30V 100 D724 OPT
2A 16V
0 R787
FULL SPEC
R784 FULL SPEC USB DSUB_VSYNC
001:M10 FULL SPEC
JP708 CDS3C05GTA
5.6V
3B [WH]C_LUG 0 R776 10K
OPT
DSUB_HSYNC JP709
SIDE_L_IN R745 D722
FULL SPEC FULL SPEC FULL SPEC 001:V18 001:M10 +5V_GENERAL
R777 100 CDS3C05GTA
[WH]U_CAN D700 FULL SPEC L701
R786 0
R785 0
PQ10
PQ10
2B C733 5.6V
OPT
30V R775 12K FULL SPEC
470K 100pF CB3216PA501E R747
22 FULL SPEC
[RD]O_SPRING FULL SPEC FULL SPEC R765
4C R783 001:M10 DSUB_B
OPT 10K FULL SPEC
0 R780 10K FULL SPEC JP712
SIDE_R_IN R753 D719 R767
5C [RD]CONTACT FULL SPEC FULL SPEC FULL SPEC 001:V18 C700 CDS3C30GTH
FULL SPEC C711 75 FULL SPEC
30V RGB_DET
R779 R778 JK706 1uF
D701 C736 12K KJA-UB-4-0004 10uF JP710 D725 1K
30V 470K 16V 16V R762 CDS3C05GTA
2C [RD]U_CAN 100pF 0
5.6V
FULL SPEC
1
OPT
R748 OPT
USB DOWN STREAM
22
PC_DEBUG R781 001:M10 DSUB_G
FOR DEB
0 FULL SPEC FULL SPEC JP711
2
11
12
13
14
15
3
USB_DP
001:W9
D707
16
10
6
9
1 DDC_SDA/UART_TX
0 01:O19;001:V6 CDS3C05GTA FULL SPEC
4
5
OPT CDS3C05GTA
5
R813
10K P800
R815
100
CI_CD1
C801 10067972-050LF PCM_D[0-7]
0.1uF
16V 35 AR831 PCM_D[3]
36 33
PCM_D[4]
AR800 37 3
33 PCM_D[5]
TS_D[4] 38 4
BUF_TS_CLK,BUF_TS_DATA[0],BUF_TS_SYNC,BUF_TS_VAL,TU_TS_DATA[1-7] PCM_D[6]
TS_D[5] 39 5
TS_D[6] 40 6 R826 10K PCM_A[0-14]
OPT R829 47
TS_D[7] 41 7 PCM_CE_N 2010_A4
R816 10K
42 8 AR834
R824 47 33 PCM_A[11]
43 9 PCM_OE_N
R806 47 PCM_A[10]
PCM_IORD_N 44 10
R807 47 PCM_A[9]
PCM_IOWR_N 45 11
PCM_A[8]
AR801 46 12
BUF_TS_DATA[0] 33 PCM_A[14]
47 13
TU_TS_DATA[1] PCM_A[13]
48 14
TU_TS_DATA[2] R823 47 PCM_A[12]
49 15 PCM_WE_N
TU_TS_DATA[3] 50 16
C802 51 17 C808 OPT
0.1uF R819 OPT R822 OPT 0.1uF +5V_GENERAL AR835
52 18 R825 33
AR802 16V 16V 100 R827 10K 2010_A4
TU_TS_DATA[4] 33 53 19 PCM_IRQA_N
TU_TS_DATA[5] R830
54 20 47
TU_TS_DATA[6] 2010_A4
55 21 C809 0 . 1 u F 16V
AR836 PCM_A[7]
TU_TS_DATA[7] 56 22 33
R814 10K PCM_A[6]
57 23
R808 47 PCM_A[5]
PCM_RESET OPT 58 24
R809 47 PCM_A[4]
PCM_WAIT_N 59 25
R810 47 PCM_A[3]
PCM_REG_N 60 26
PCM_A[2]
TS_CLK 61 27
PCM_A[1]
TS_VALID 62 28
PCM_A[0]
TS_SYNC 63 29
64 30 AR837
65 31 33
AR803
33 2010_A4
66 32
TS_D[0] 67 33 AR832
33 PCM_D[7]
TS_D[1] 68 34
PCM_D[0]
TS_D[2]
TS_D[3]
2
G2 1
G1 PCM_D[1]
R820 PCM_D[2]
AR804 R817 OPT
33 100
CI_CD2
+5V_GENERAL
R812 OPT 10K
R811 10K C803
0.1uF
16V
AR805
BUF_TS_SYNC 33
BUF_TS_VAL
BUF_TS_CLK
IC800
74LVC541A(PW) +3.3V_CI
33K
R1254
A2 Y1 G
4 17 0.1uF 0.1uF 100uF 0.1uF R838
TU_TS_DATA[0] BUF_TS_VAL GND 3 4 OUT_Y 47
50V R821 50V 16V 50V PCM_CD_N
R831 22K CMOS
A3 Y2
TU_TS_CLK 5 16 BUF_TS_DATA[0] 10K
C812
10uF
A4 Y3 C 16V
6 15 BUF_TS_CLK R818
10K OPT
B Q800
5V_CI_CTL 2SC3052
A5 Y4
7 14
E
A6 Y5
8 13
A7 Y6
9 12
GND Y7
10 11
HDMI1 5V_HDMI_1
C
JK901 R901
Q901 B 10K
2SC3875S(ALY) HPD1 001:V4
22
E
C900
19
0.1uF
50V
18 R900
1K
17
DDC_SDA_1 009:AB15;001:V6
16
5V_HDMI_1 +5V_ST
15 DDC_SCL_1 009:AB15;001:V6
IC901
A1
A2
14 AT24C02BN-10SU-1.8
R907 0
CEC_REMOTE 009:F8;009:W4 KDS184
13 D901
C
CK-_HDMI1 001:O17 A0 VCC
12 1 8
11
CK+ C903
10 A1 WP
CK+_HDMI1 001:O17 2 7 0.1uF
D0- R913 R916
9 D0-_HDMI1 001:O18 47K 47K
D0_GND A2 SCL
8 3 6 DDC_SCL_1
D0+ R948 100 009:N17;001:V6
7 D0+_HDMI1 001:O18 GND SDA
D1- 4 5 DDC_SDA_1
6 D1-_HDMI1 001:O18 R949 100 009:N17;001:V6
D1_GND
5
D1+
4 D1+_HDMI1 001:O18
D2-
3 001:O17 5V_HDMI_2 +5V_ST
D2-_HDMI1
D2_GND
2 IC902
A1
A2
D2+ AT24C02BN-10SU-1.8
1 D2+_HDMI1 001:O17 KDS184
GND D905
20 FULL SPEC
C
A0 VCC
GND 1 8
21
FULL SPEC
C905
A1 WP 0.1uF FULL SPEC
2 7
R917 R922
47K 47K
FULL SPEC
FULL SPEC
HDMI2 GND A2
3 6
SCL R923 100
DDC_SCL_2
FULL SPEC 009:G8;001:V5
GND SDA
4 5 DDC_SDA_2
5V_HDMI_2 R921 100 009:G8;001:V6
HDMI3 FULL SPEC
2SC3875S(ALY) HPD2
22 001:V4 IC903
E JK902 FULL SPEC
A1
A2
C AT24C02BN-10SU-1.8
C904 JACK_GND FULL SPEC R930
19 KDS184
0.1uF Q902 B 10K
50V 2SC3875S(ALY) HPD3 001:V4 D903
18 R920 20
C
FULL SPEC A0 VCC FULL SPEC
1K 1 8
FULL SPEC 19 HPD E
17 C901
DDC_SDA_2 +5V_POWER 0.1uF FULL SPEC
16 18 A1 WP C908
009:AB11;001:V6 50V 2 7
R906 0 . 1 u F R931 R933
DDC_SCL_2 17 DDC/CEC_GND 1K FULL SPEC
15 47K 47K
009:AB11;001:V5 FULL SPEC FULL SPEC FULL SPEC
A2 SCL FULL SPEC
16 SDA FULL SPEC
14 3 6 DDC_SCL_3
R918 0 DDC_SDA_3 009:AB7;001:V5
CEC_REMOTE 009:L16;009:W4 SCL R950 100 009:R7;001:V5
13 15
FULL SPEC DDC_SCL_3 009:AB8;001:V5 GND SDA FULL SPEC
CK-_HDMI2 001:O15 NC 4 5 DDC_SDA_3
12 14
R951 100 009:R8;001:V5
13 CEC GND
11
CK+
10 CK+_HDMI2 001:O15 CLK-
12
FULL SPEC D0- CK-_HDMI3 001:O14
9 D0-_HDMI2 001:O17 11 CLK_SHIELD
D0_GND +3.3V_VDDP_ST
8 CLK+
10 CK+_HDMI3
D0+ 001:O14
7 FULL SPEC DATA0-
D0+_HDMI2 001:O16 9
D1- D0-_HDMI3
6 001:O15 FULL SPEC
D1-_HDMI2 001:O16 8 DATA0_SHIELD R928
D1_GND
5 DATA0+ 68K R935
7
D1+ D0+_HDMI3 001:O15 27K
4 DATA1-
MMBD301LT1G
D1+_HDMI2 001:O16 6 OPT
D2- D1-_HDMI3 001:O15
3 FULL SPEC
D2-_HDMI2 001:O16 5 DATA1_SHIELD
D2_GND D904
2 DATA1+ 30V
4
D2+ D1+_HDMI3 001:O14
1 DATA2-
D2+_HDMI2 001:O16 3 009:F8;009:L16 CEC_REMOTE HDMI_CEC 002:B11
GND D2-_HDMI3 001:O14
20
2 DATA2_SHIELD S B D
GND
21 DATA2+ D902
1 FULL SPEC
001:O14 OPT
D2+_HDMI3
BSS83
Q900
GND
G
GND
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS EAX57566204 2009.04.15
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. HDMI 9 11
HDMI
AVSS L1003
+3.3V_AU_AVDD
120-ohm
R1014
R1006
0 +3.3V_DVDD
470
2200pF
C1013 4700pF
C1020 120-ohm
1uF
22K
AVSS 0.033uF
0.047uF
C1014
C1011 4700pF 50V P_17V
C1017
AVSS
C1015
R1015
C1009 R1013
5 GVDD_OUT_1
0.047uF 470
Separate DGND AND AVSS
11 PLL_FLTP
10 PLL_FLTM
3 PVDD_A_2
2 PVDD_A_1
C1026 C1043 C1045
6 SSTIMER
C1022
47uF 47uF 47uF
12 VR_ANA
7 OC_ADJ
0.01uF
4 BST_A
1 OUT_A
9 AVSS
8 NC
+3.3V_AU_AVDD
R1008 33
004:H16;001:Y15 SDA_SUB/AMP
PVDD_D_1
PVDD_D_2
RESET
BST_D
DVSS_2
STEST
R1009 33
004:H16;001:Y14 SCL_SUB/AMP
C1007 C1008
33pF 33pF
+3.3V_DVDD OPT OPT
P_17V
OPT
R1007
R1005
33 2K C1021 C1023 C1044 C1046
001:O19
47uF 47uF 47uF
AMP_RST 0.01uF
SPDIF OPTIC JACK
C1018
C1002
1uF
1000pF
OPT 0.033uF
+3.3V_DVDD C1019
50V
+5V_GENERAL+5V_GENERAL
C1016
0.1uF
C1010 C1012
10uF 16V 0.01uF
R1000
OPT
4.7K
JK1000
JST1223-001
001:V12SPDIF_OUT
GND
Fiber Optic
C1047 VCC
C1005
2
100pF 0.1uF
50V 50V
VINPUT
3
4
FIX_POLE
+3.3V_AVDD_VIF
L1114
CB3216PA501E
+1.8V_DDR
+5V_SYS V0 = 1.25(1+R2/R1) +1.8V_DDR2_MAIN
IC1107
PM Control +5V_SYS
L1101
AZ1085S-ADJTR/E1
R1125
50V
5V MULTI R1139
39 R2
R1140
82 C1188
0.1uF
50V
1% 470uF
22K D 1% 16V
G Q1102
RSR025P03
C1159 L1126
10uF +5V_ST CB3216PA501E +5V_TU
Q1101 S
C 16V +5V_MULTI
PM for GPIO4 2SC3875S(ALY) C1210
POWER_ON/OFF1 OPT C1209
B 47uF
16V 0.1uF
R1122
10K 50V
E C1155 +5V_GENERAL
0.1uF L1100
50V CB3216PA501E
C1165 C1166
47uF 0.1uF +5V_CI C1193 C1194 C1190 C1191 C1202 C1203 C1207
16V 50V 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF
50V 50V 50V 50V 50V 50V 50V
L1108
CB3216PA501E
C1167 C1168
47uF 0.1uF
16V 50V
1 No Picture/Sound OK 1
2 No Picture/No sound 2
4 Picture broken/Freezing 4
First of all, Check whether there is SVC Bulletin in GCSC System for these model.
First of all, Check whether all of cable between board was inserted properly or not.
(Main B/D↔ Power B/D, Power B/D↔ Y-sus B/D,Y-Sus B/D ↔Z-Sus B/D,LVDS Cable,Speaker Cable,IR B/D Cable,,,)
Move Move
Power problem 1. Check Y-Sus/ Z-Sus Board Power problem
Section 2. Replace defective B/D Section
N Replace
Move Main B/D
No Picture/ Sound Ok
Section
N Repair/Replace
Check IR operation Normal
IR B/D
Y
Check Input signal
Y Y . RF Cable connection
Power OSD
. SCART Cable connection
LED ON? appear?
. HDMI Cable connection
. Component Cable …
N N
N
Normal
Close
2
Copyright ⓒ 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes LGE Internal Use Only
Repair Process
A. Picture Problem Making 2009. 2 . 1
PDP TV Symptom
Mal-discharge/Noise/dark picture Revision 3/9
Check
Picture problem
Type Check CTRL ROM Ver. N N
Dot Normal Replace Normal Replace
and
type Picture? Control board Picture? Module
Rom Upgrade
Y Y
Mal-discharge
Close Close N
Y
Close
Close Close
3
Copyright ⓒ 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes LGE Internal Use Only
Repair Process
A. Picture Problem Making 2009. 2 . 1
PDP TV Symptom
Picture broken/Freezing Revision 4/9
N
■ Menu→Setup →Booster
Check RF Cable Booster menu
Normal Y Check SVC N Normal Y
Connection On→Off: Check Close
1. Reconnection Picture? S/W Version Bulletin? Picture?
Off→On: Check
2. Install Booster
N Y N
Close
※ ’09 years new model apply chip tuner
so, chip tuner is soldered on main PCB
[ Chip Tuner: IC500(XC5000) ]
4
Copyright ⓒ 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes LGE Internal Use Only
Repair Process
A. Picture Problem Making 2009. 2 . 1
PDP TV Symptom
Vertical bar/ Horizontal Bar Revision 5/9
Check
defect type Regular Check Module pattern Y
Normal Replace
Vertical by using “TILT” key
Pattern? Module
Line / Bar on SVC R/C
N
Check connection
Irregular N Check Main B/D
of Connector Y 1.Check CTRL B/D Normal
Vertical Normal Replace Module
Line / Bar (COF,TCP) 2.Replace Board Picture?
(If Main B/D doesn’t cause)
on CTRL B/D , X B/D
N
Y
1.Connector re-connection
Close
2.Eliminate foreign material on Connector
Y
Close
※ H-Line’s Cause is rare CTRL B/D
Check connection Y N N
Horizontal 1. Check Y Drive B/D Normal 1.Check CTRL B/D Normal Replace
of Connector (FPC) Normal
Line/Bar 2. Replace Board Picture? 2.Replace Board Picture? Module
on Y Drive B/D
N Y Y
Y DC Power on N N
Check Check Repair/Replace
Power LED by pressing Power Key Normal Normal
Power LED ON? R/C IR Operation IR B/D
On Remote control
. Stand-By: Red Y Y
. Operating: Green N
Close
Check Power cord
was inserted properly
※ ’09 years new model apply mechanical power switch
to reduce power consumption in stand-by status.
Check & Repair If mechanical power switch off
Mechanical Power switch → Doesn’t turn on by remote control
on Local control of TV
→ Doesn’t appear LED light
Y
Normal Close
?
N
Check ST-BY 5V
on Power Board
Check
Y Check Y Check Y N
Normal Normal Normal the other pin’s Replace
AC DET Signal RL_ON Signal Normal
Voltage? Signal? Signal? Output voltage Power B/D
on Power B/D on Power B/D
on Power B/D
N N Y
N
Close
Check Power B/D Check Main B/D
Replace Power B/D Replace Main B/D
6
Copyright ⓒ 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes LGE Internal Use Only
Repair Process
B. Power Problem Making 2009. 2 . 1
PDP TV Symptom
Turn off (Instant, under watching) Revision 7/9
RCU Off
7
Copyright ⓒ 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes LGE Internal Use Only
Repair Process
C. Sound Problem Making 2009. 2 . 1
PDP TV Symptom
No sound/ Sound distortion Revision 8/9
1.No sound( If HDMI Input only have no sound, upload EDID data) Close
Close Close
Check 17V N
Normal Check Power B/D
(Audio IC B+)
voltage? Replace Power B/D
on Power B/D
Y
Check R/C Operating Check & Replace Close Check 5v on Power B/D Repair/Replace
When turn off light Battery of R/C Replace Power B/D or IR B/D
in room Replace Main B/D
(Power B/D don’t have problem)
If R/C operate, Normal
Close
Explain the customer operating?
cause is interference
from light in room. N
Replace R/C
N Y Y N
9
Copyright ⓒ 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes LGE Internal Use Only
PDP TV Repair Process Index
- Trouble shooting by input block (Component level check)
2 Digital TV 2
3 Analog TV 3
4 Component 4
Video Probelm
5 RGB(D-SUB) 5
7 HDMI 7
8 All Input 8
9 Digital TV / HDMI 9
11 Component / AV / RGB 11
12 Optical Audio 12
Check L1103 N
Replace L1103
Voltage Level 5V
Y
Check RF Cable
Check 5V voltage N
Replace IC500 or IC501
on IC500, IC501(Chip Tuner)
Y
Green
Check color Bad Tuner. Replace Tuner.
None
Y
Check P400 or P403
N Replace Mstar(IC100) has
#17(CKM) , #18(CKP) ,
problems
#32(CKP) , #33(CKM)
Y
Check PDP Module
Control board
Refer to Module CAS
Check RF Cable
Check 5V voltage N
Replace IC503 or IC505
on IC500, IC501(Chip Tuner)
Y
Replace Mstar(IC100)
Replace Mstar(IC100)
※ Measured signals depend on the input signal.
Y
N
Check JK703 Replace connector (JK703).
Y
N
Check signal
Replace R747, R748, R749
R747, R748, R749
N
Check Signal
Replace R753,R750,R751
R753,R750,R751
Y
N
Check AV port of JK600,JK601 (Rear)
Replace or reseat connector
Check JK700 (Side), JK705(S)
Check signal
N
R601,602,603,L604 (SCART1 AV),
Replace Resistor
L611 (SCART2 AV) ,R713 (Side AV),
R707(S-Video)
Y
Check JK901 / J902 / J903 N
Replace connector
for proper connection or damage
Y
Check EDID EEPROM
N
(IC901,902,903) Replace IC901,902,903
→ Power(#8) & I2C Signal (#5, #6)
Y
N
Check HDCP (IC102)
Replace IC102
→Power(#8) & I2C Signal (#5, #6)
Y
N
Check Mstar(IC100) Replace Mstar(IC100)
Y
Check IC1000 Power N Check 17V (P1100 #1,2),
17V(C1023), 3.3V(L1002,L1003) 3.3V (IC1103 #2)
Y
N Check
Check IC1000 Status
Reset (R1005) / PDN (R1003)
PDN(#19) / Reset(#25) is High?
:They must be High (3.3V)
Y
N
Check SCL,SDA
Replace R1008,R1009
R1008,R1009
Check Connector N
Replace P1000
P1000
Y
N
Check speaker for damage. Replace the Speaker
◆ Digital TV
N Follow procedure digital TV
Check video output
video trouble shooting
Y
◆ HDMI
N
Check R554,R557 for 5V Check R554,R557 output
N
Check SIF signal L501 Replace IC500
N
Check SIF signal (R557) Check SIF line
Follow procedure All source audio < SIF waveform – sample >
trouble shooting
- Defend on the input signal.
Y
Check signal
R736 / R737 (Component1) N
R738 / R739 (RGB) Replace the Resistor
R617 / R609, R654, / R652 (SCART, Rear AV)
R776 / R780 (AV Side)
Follow procedure
All source audio trouble shooting
N
Check SPDIF signal (R137) Replace Mstar IC100
Replace JK1000
N
Check L701 voltage level 5V Replace L701
N
Check IC400 Replace IC400
• Exception
- USB power could be disabled by inrushing current
- In this case, remove the device and try to reboot the TV (AC power off/on)
Check P1100 N
Check GPIO Path of IC100
Disp_EN,VaVs ON, 5V_MNT
Y
Check PDP Module
Control board
Refer to Module CAS