Implementation of 128 Bit Two Fish Encryption Algorithm

Dr. Jamuna S,Sanjay Kumar,Sanjeeth K,Shashi Bhushan Thakur,Yogesh

Department of Electronics and Communication
Dayananda Sagar College of Engineering

Abstract-Cryptography refers almost to encryption, which is figure that bolsters keys of length of 128, 192 or 256-bits.
the process of converting ordinary information For effortlessness just a 128-piece key length variant will
(called plaintext) into unintelligible form (called cipher text). be executed.
Cryptography is an important aspect when we deal with
network security. ‘Crypto’ means secret or hidden.
Cryptography is the science of secret writing with the
II LITERATURE SURVEY:
intention of keeping the data secret. Cryptanalysis, on the Over the years many proposed works have been done in
other hand, is the science or sometimes the art of breaking the field of two fish encryption algorthim.The different
cryptosystems. These both terms are a subset of what is methodology and concept has been tested and verified to
called as Cryptology.The interest for productive and secure implement twofish encryption algorithm. Bruce Schneier
figures has offered ascend to another age of block cipher [1] has presented Twofish, the rationale behind its design,
equipped for giving expanded assurance at lower cost. and the results of their initial cryptanalysis. Design and
Among these new calculations is Twofish, a promising 128- cryptanalysis go hand in hand. It is impossible to do one
bit block cipher. Twofish can be actualized in equipment in without the other and it is only in the analysis that the
14000 gates. The plan of both the round capacity and the key
strength of an algorithm can be demonstrated. Yeong-
timetable allows a wide assortment of tradeoffs between
speed, programming size, key setup time, gate tally, and Kang Lai [2] has presented architecture for VLSI design
memory. In this proposed work, a form of Twofish with a and its Implementation for its Twofish block cipher. In
128-bit key length will be executed utilizing a Zed Board. this paper, VLSI implementation of compact and low-
power module which implements the Twofish data
I INTRODUCTION encryption algorithm. The proposed architecture can be
efficiently applied to the high-speed networking. Mark De
As electronic correspondences spread to each zone of Clercq [3] concludes that Twofish turned out to be a very
present day life, cryptography has turned into a basic flexible deign. From the subkey generation to the data
segment to control the legitimacy, honesty, secrecy and encryption, Twofish offered a wide variety of design
non-reputability of private information that courses possibilities, which is actually one of its main advantages
over its competitors since AES must be a general rather
through open systems. With expanding execution,
than a specialized algorithm. The implementation of the
prerequisites and upgrades in innovation, better-adjusted
cipher in conformance with the specifications was
figures are making their phantom to supplant maturing
calculations that have turned out to be excessively challenging but the quality of the documentation and the
powerless or unreasonably moderate for the present available resources allowed us to reach our goal.
applications. In this undertaking a Zed Board gadget will
be utilized to execute a promising figure of this new age III METHODOLOGY
interoperability testing. Every one of the highlights
including sub-key age, encryption and decoding will be
executed. Twofish was one of the five finalists for the
Advanced Encryption Standard (AES) rivalry held by the
National Institute of Standards and Technology (NIST).
AES is the
Successor to the maturing DES calculation. Twofish is a
successor to Blowfish, a settled figure with no known
blemishes that is more effective than DES. The
calculation is free of licenses and will along these lines be
generally utilized. Twofish has numerous characteristics
that make it intriguing for a task. Twofish encryption
calculation is structured in light of equipment execution
and would thus be able to be mapped productively to
equipment gadgets, for example, Zed Board and Smart
Cards. It likewise offers distinctive potential outcomes of
exchange offs among space and speed and can be
pipelined. The evaluated door check will be somewhere in
the range of 14000 and 80000: Twofish. It is a 128-piece
Figure 1:Twofish Building blocks

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I FEISTEL NETWORKS The Q-Permutation is at the centre of the plan of Twofish.
The permutation is executed on a byte of input, which is
A Feistel organize is a general technique for changing any split in two before being rotated and modified along
capacity (as a rule called the F work) into a stage. The different paths. The most important operations of the
basic structure square of a Feistel arranges is the F work: permutation are executed with four lookup tables labelled
a key-subordinate mapping of an information string onto a t0, t1, t2 and t3. Each lookup table takes 4 bits of input
yield string. A F work is dependably non-straight and and produces a 4-bit value[3].
where perhaps non-surjective: F : {0, 1}n/2 × {0, 1}N →
{0, 1}n/2 where n is the square size of the Feistel
Network, and F is a capacity taking n/2 bits of the square
and N bits of a key as info, and delivering a yield of
length n/2 bits. In each round, the "source square" is the
contribution to F, and the yield of F is xored with the
"objective square," after which these two squares swap
places for the following round. Two rounds of a Feistel
organize is known as a "cycle". In one cycle, all of the
content square has been adjusted once. Twofish is a 16-
round Feistel coordinate with a bijective F work.

II WHITENING

Whitening , the strategy of xoring key material before

the first round and after the last round.It was demonstrated
that whitening significantly expands the trouble of key
hunt assaults against the rest of the figure.We found that
whitening considerably expanded the trouble of assaulting
the figure, by escaping an assailant the particular Figure 3:Q permutation
contributions to the first and last adjusts F capacities.
Twofish xors 128 bits of subkey before the first Feistel Each lookup table thus has 16 entries of 4 bits. There are
round, and another 128 bits after the last Feistel round. four lookup tables per q permutation and two different q
These subkeys are determined in a similar way as the permutations q0 and q1 each with its set of lookup table.
round subkeys, yet are not utilized anyplace else in the For the permutation q0 the 4-bit S-boxes are given by:
figure. There are two sorts of whitening Input and Output
Whitening. The information is first hooked into a register.
It is then isolated into four words that are xored with four
subkeys K0...K3. This progression is known as the
information whitening. Subsequent to going multiple
times through this capacity, the four expressions of
information are xored with four subkeys K4...K7. This
progression is known as the yield whitening.

III Q PERMUTATIONS
Figure 3: Look up Table for q0

For permutation q1 the 4-bit S-boxes are given by:

Figure 4: Look up Table for q1

V S BOXES

A S-box is a table-driven non-straight substitution task or algorithmically. Twofish uses four different, bijective,
utilized in most block ciphers. S-boxes vary in both input key-dependent, 8-by-8-bit S-boxes. These S-boxes are
size and output size, and can be created either randomly assembled utilizing two fixed 8-by-8-bit stages and key

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material[1]. The S-Box works on a 32-bit word. Every
byte of the word goes through three Q-Permutations as
can be seen from Figure 2 . The output of each bank of q
V MAXIMUM DISTANCE SEPARABLE MATRIX
The Maximum Distance Separable (MDS) Matrix is a 4x4
grid of bytes that duplicates a vector of four bytes. A
Maximum Distance Separable (MDS) code over a field is
a direct mapping from a field component to b field
components, creating a composite vector of a+b
components, with the property that the base number of
non-zero components in any non-zero vector is at any rate
b + 1. There are just three unique qualities, 01, 5B and EF
in the matrix. For instance, the outcome zo ought to be yo
*01 y1* E F y2 *5B y3*EF. The outcome is
placed in the zo, z1, z2 and z3 register.
Figure 7: Maximum Distance Separable Matrix
VI PSEUDO HADAMARD TRANSFORM
The module of PHT is very straightforward. Its design
appeared in Figure[2]. We just utilize two 32-bit adders to
actualize it. The adders play out the expansion of modulo
permutations is then recombined into a word and xored
with a 32-bit value.
2 32. We execute the quick adders, carry1ookahead adders,
to play out the tasks. As a result of the utilization of
subkey age, the 8-bit designed right pivot is actualized in
the information. While performing encryption, PHT will
choose the non-rotation input.While performing key
booking activity, the rotation information will be chosen.
Rather than utilizing 4 key-subordinate S-boxes, a 4-by-4
MDS network, and the PHT, we could have utilized 8
key-subordinate S-boxes and a 8-by-8 MDS framework
over GF (28).
Figure 6:Pseudo Hadamard transform
IV RESULTS AND DISCUSSION
I SIMULATION RESULTS
The simulation was done using Xilinx Vivado.Below
simulation result is for plain text=0 and key=0.In the
Simulation result s0,s1,s2,s3,s4,s5,s6,s7,s8 are the sub-
generation keys.The Register Transfer level schematic is
shown in 3.1.
3
Figure 7:Simulation Results

Figure 8:Implemented design Figure 9:RTL Schematic of Synthesised design

IIHARDWARE IMPLEMENTATION design,implementationdesign,design time summary and

hardware output are shown in 4.1,4.2,4.3.The Hardware
128 bit Two Fish Encryption Algorithm has been output is for plain text=8 hexadecimal and key=0
Implemented on hardware using Zedboard.In order to Hexadecimal
implement the design Virtual Input Output Intellectual
Property has been used. The synthesis

4
Figure 10:Power utilisation
CONCLUSION
This paper explained about the implementation of
Twofish encryption algorithm using Vivado Design Suite.
Twofish ended up being a truly adaptable algorithm. From
the subkey age to the information encryption, Twofish
offered a wide assortment of plan potential outcomes,
which is really one of its primary favourable
circumstances over its rivals since AES must be a general
instead of a particular calculation. It can keep running at
66 MHz with 200 Mbps throughput. While working in
3.3V power, its capacity dispersal is 44 mW.
ACKNOWLEDGEMENT
This work is been carried out as a part of DRDO
sponsored research work in the department. We are
grateful for the resources support provided.
Figure 11:Hardware result
REFERENCES
[1]Bruce Schneier,John Kelsey,Doug Whiting,David
Wagner,Chris Hall , Niels Ferguson Twofish: A 128-Bit Block
Cipher, 15 June 1998
[2]Yeong-Kang Lai, Liang-Gee Chen, Jian-Yi Lai, and Tai-
Ming Parng:Vlsi architecture design and Implementation for
Two Fish Block Cipher, 0-7803-7448-7/02/$17.00 2002 IEEE
[3]Mark De Clercq, Vincent Levesque: A VHDL
Implementation of the twofish Block Cipher
[4]Bruce Schneier:Description of a New Variable-Length Key,
64-Bit Block Cipher(Blow fish)
[5]Divya M,Dinesha P,Jamuna S:Implementation of Advanced
Encryption Standard in Vivado Design Suite
[6] Understanding cryptography:Christof Paar and Jan Pelzi
[7]Applied Cryptography:Bruce Scheiner