What is north bridge and south bridge architecture?

A northbridge or host bridge is one of the two chips in the core logic chipset architecture on
a PC motherboard, the other being thesouthbridge. Unlike the southbridge, northbridge is connected
directly to the CPU via the frontside bus (FSB) and thus responsible for tasks that require the highest
performance. The northbridge is usually paired with a southbridge, also known as I/O controller hub.
[1]
In systems where they are included, these two chips manage communications between
the CPU and other parts of the motherboard, and constitute the core logic chipset of the PC
motherboard.[2]

The southbridge is one of the two chips in the core logic chipset on a personal
computer (PC) motherboard, the other being thenorthbridge. The southbridge typically implements
the slower capabilities of the motherboard in a northbridge/southbridge chipsetcomputer
architecture. In systems with Intel chipsets, the southbridge is named I/O Controller Hub (ICH),
while AMD has named its southbridge Fusion Controller Hub (FCH) since the introduction of
its Fusion APUs.A

Explain in detail the Addressing modes of the 8086 processor.

Various addressing modes of 8086/8088

1) Register Addressing mode
2) Immediate Addressing mode
3) Register Indirect Addressing mode
4) Direct Addressing mode
5) Indexed Addressing mode
6) Base Relative Addressing mode
7) Base Indexed Addressing mode

Register Addressing Mode

Data transfer using registers is called register addressing mode. Here operand value is
present in register. For example

MOV AL,BL;
MOV AX,BX;
Immediate Addressing mode
When data is stored in code segment instead of data segment immediate addressing
mode is used. Here operand value is present in the instruction. For example

MOV AX, 12345;

Direct Addressing mode
When direct memory address is supplied as part of the instruction is called direct
addressing mode. Operand offset value with respect to data segment is given in
instruction. For example
 MOV AX, [1234];
ADD AX, [1234];
Register Indirect Addressing mode
Here operand offset is given in a cpu register. Register used are BX, SI(source index),
DI(destination index), or BP(base pointer). BP holds offset w.r.t Stack segment, but
SI,DI and BX refer to data segment. For example

MOV [BX],AX;
ADD AX, [SI];
Indexed Addressing mode
Here operand offset is given by a sum of a value held in either SI, or DI register and a
constant displacement specified as an operand. For example
Lets take arrays as an example. This is very efficient way of accessing arrays.
My_array DB ‘1’, ‘2’, ‘3’,’4,’5’;

MOV SI, 3;
MOV AL, My_array[3];

So AL holds value 4.
Base Relative Addressing mode
Operand offset given by a sum of a value held either in BP, or BX and a constant offset
sepecified as an operand. For example

MOV AX,[BP+1];
JMP [BX+1];
Base Indexed
Here operand offset is given by sum of either BX or BP with either SI or DI. For example

MOV AX, [BX+SI]

JMP [BP+DI]

What is TSR? Explain how they are different than normal DOS programs.
In computers, a terminate and stay resident program (commonly referred to by the initialism TSR)
is a computer program that uses a system call in DOS operating systems to return control of the
computer to the operating system, as though the program has quit, but stays resident in computer
memory so it can be reactivated by a hardware or software interrupt.[1] This technique partially
overcame DOS operating systems' limitation of executing only one program, or task, at a time. TSR
is unique to DOS and not used in Windows.

Normally in DOS operating systems, only one program can run at any given time. To stop running, it
gives control back to the DOS shell program, COMMAND.COM, using the system call INT 21h/4Ch.
[2]
The memory and system resources that were used by the program are then marked as unused.
This in effect makes it impossible to restart parts of it again without reloading it from scratch.
However, if a program ends with the system call INT 27h or INT 21h/31h, the operating system
does not reuse a certain specified part of the program's memory
Write note on Secondary storage.

Secondary storage, sometimes called auxiliary storage or external storage,

is non-volatile storage that is not under the direct control of a computer's
central processing unit (CPU) or does not directly interact with an application.

Typically, secondary storage is used to back upprimary

storage through replication or otherdata protection methods, which involves
holding a secondary copy of the data. In a business environment, an older
network-attached storage (NAS) box, storage-area network (SAN) or tape
library may be used for secondary storage. Object storage devices can also
be used to implement secondary storage and lessen the demand on primary
storagearrays. The growth of corporate data has prompted many storage
managers to move data to secondary storage to ease the strain on primary
storage systems to reclaim more expensive storage arrays and maintain older
data in an easily accessible form to satisfy business and regulatory
compliancerequirements.

Describe any five features of USB.

 The computer acts as the host.

 Up to 127 devices can connect to the host, either directly or by

way of USB hubs.

 Individual USB cables can run as long as 5 meters; with hubs,

devices can be up to 30 meters (six cables' worth) away from the
host.

 With USB 2.0,the bus has a maximum data rate of 480 megabits
per second (10 times the speed of USB 1.0).
  A USB 2.0 cable has two wires for power (+5 volts and ground)
and a twisted pair of wires to carry the data. The USB 3.0 standard
adds four more wires for data transmission. While USB 2.0 can
only send data in one direction at a time (downstream or
upstream), USB 3.0 can transmit data in both directions
simultaneously.

 On the power wires, the computer can supply up to 500 milliamps

of power at 5 volts. A USB 3.0 cable can supply up to 900
milliamps of power.

 Low-power devices (such as mice) can draw their power directly

from the bus. High-power devices (such as printers) have their
own power supplies and draw minimal power from the bus. Hubs
can have their own power supplies to provide power to devices
connected to the hub.

 USB devices are hot-swappable, meaning you can plug them into
the bus and unplug them any time. A USB 3.0 cable is compatible
with USB 2.0 ports -- you won't get the same data transfer speed
as with a USB 3.0 port but data and power will still transfer through
the cable.

 Many USB devices can be put to sleep by the host computer when
the computer enters a power-saving mode.

Write note on Hardwired control

Hardwired control is a control mechanism that generates control

signals by using an appropriate finite state machine (FSM).
Microprogrammed control is a control mechanism that generates
control signals by reading a memory called a control storage (CS)
that contains control signals. Although microprogrammed control
seems to be advantageous to implement CISC machines, since CISC
requires systematic development of sophisticated control signals,
there is no intrinsic difference between these 2 types of control.
Objectives:
1. To explain the concept of a control word
2. To show how control words can be generated using hardwired control
3. To explain the concept of microprogramming
4. To discuss some advantages and disadvantages of microprogramming.

Explain in detail Programmed I/O and Interrupt driven I/O.

Programmed I/O (PIO) refers to data transfers initiated by a CPU under driver software control to access
registers or memory on a device.

The CPU issues a command then waits for I/O operations to be complete. As the CPU is faster than the
I/O module, the problem with programmed I/O is that the CPU has to wait a long time for the I/O module
of concern to be ready for either reception or transmission of data. The CPU, while waiting, must
repeatedly check the status of the I/O module, and this process is known as Polling. As a result, the level
of the performance of the entire system is severely degraded.

The CPU issues commands to the I/O module then proceeds with its normal work until interrupted by I/O
device on completion of its work.

For input, the device interrupts the CPU when new data has arrived and is ready to be retrieved by the
system processor. The actual actions to perform depend on whether the device uses I/O ports, memory
mapping.