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POWER FLOW ANALYSIS IN INTEGRATED AC-DC SYSTEMS

Research · July 2015

DOI: 10.13140/RG.2.1.1967.8565

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Sanjeev Kumar Aggarwal

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 A Dissertation Work

On

POWER FLOW ANALYSIS IN INTEGRATED AC-DC SYSTEMS

Submitted to

National Institute of Technology,

Kurukshetra

For the partial fulfillment of the requirements for

the degree of
Master of Technology ( ELECTRICAL ENGG.)
Specialization – POWER SYSTEM

Under the Guidance of Submitted by

Dr. S. P. Jain SANJEEV KUMAR AGGARWAL
Roll No.: 2K2-762

Department of Electrical Engineering

National Institute of Technology,
Kurukshetra
June-2004

1
 CERTIFICATE

This is to certify that the thesis entitled ‘POWER FLOW ANALYSIS IN

INTEGRATED AC-DC SYSTEMS’ carried out by Mr. Sanjeev Kumar Aggarwal
for the partial fulfillment of the requirements for the degree of M.Tech
(ELECTRICAL ENGINEERING), is a bonafide record of the work done by the
candidate under my guidance.

(Dr. S.P. Jain)

Professor,
Department of Electrical Engineering,
National Institute of Technology,
Kurukshetra.

2
 ACKNOWLEDGEMENTS

I wish to express my sincere thanks to my guide, Dr. S. P. Jain, for

his encouragement and criticism that led to successful completion of this work.
I would like to thank Dr. Ashwani Kumar (Lecturer, EED) for his
valuable suggestions and arranging the data for UPSEB 75 BUS system from
I.I.T.(Kanpur). I extend my thanks to the other faculty members of Electrical
Engineering Department, who had given me support and encouragement during
the completion of this project. I am also thankful to my colleagues in the Electrical
Engineering Department, M.M. Engineering College, Mullana, for their co-
operation during the completion of the project.
Finally, I would like to express my deep appreciation to my family
and friends who have been a constant source of inspiration. I am eternally
grateful to them for always encouraging and being with me where ever and when
ever I needed them.

June, 2004 (SANJEEV KUMAR AGGARWAL)

3
 POWER FLOW ANALYSIS IN INTEGRATED AC-DC SYSTEMS
ABSTRACT

H.V.D.C. transmission is now an acceptable alternative to AC and is proving an

economical solution not only for very long distance but also for underground and
marine transmission as well as a means of interconnecting systems of different
frequencies or with problems of stability and fault level.

The original justification for hvdc transmission was its lower cost for long
electrical distances which, in case of submarine cable schemes, applies to
relatively short geographical distances. At present, the controllability factor often
justifies the DC alternative regardless of cost, as evidenced by the growing
number of back to back links in existence.

The merits of HVDC over AC transmission have been explained in several books
by Adamson and Hingorani, Uhlmann, Kimbark, Arrillaga and Padiyar listed in
chronological order.

In earlier days, the dynamic performance of the DC link was assessed with the
help of scale down simulators. These provided a reasonable representation of
the converter control and protection functions, but were very restricted in AC
network representation.

With the expansion of HVDC transmission throughout the world and particularly
the increasing number of interconnections between different countries, few power
systems can continue to escape the effect of this technology in their planning and
operation. Such expansion has encouraged the development of analytical
models to represent the behaviour of the AC-DC power system.

Power flow analysis is an essential component of system studies carried out for
planning, design and operation of power system. It is basically simulation of the

4
system in steady-state and determines the operating point which is later used for
initializing variables in transient and dynamic system simulation.

The basic load flow has to be substantially modified to be capable of modeling

the operating state of the combined AC and DC systems under the specified
conditions of load, generation and DC system control strategies.

The existence of a DC link in the power system requires the modeling of DC link
in the power flow analysis. While the modeling of DC system for power flow is
fairly standard, the solution methodology varies.

The primary objective of this dissertation work is the incorporation of HVDC links
in the power flow analysis. The mathematical models and their solution methods
are discussed. An attempt has been made to discuss the different algorithms
proposed in the literature. A detailed BIBLIOGRAPHY is presented at the end of
the work. A general purpose AC –DC load flow program (using MATLAB 6.5) has
been developed. Both two and multi-terminal DC systems are considered. The
program has been applied to UPSEB – 75 bus system and results of the program
are presented.

5
 CONTENTS

CHAPTER 1 INTRODUCTION

1.1 General 1
1.2 Nature of Problem 2
1.2.1. Load Flow Techniques 2
1.2.2. Effect of HVDC on Load 3
Flow Solution.
1.3 Scope of Work 5

CHAPTER 2 HVDC CONVERTER AND SYSTEM CONTROL

2.1 General 6
2.2 Converter Equation 6
2.2.1. Rectifier Equations 7
2.2.2. Inverter Equations 8
2.3 HVDC System Control 9
2.4 Alternative Form of Control 12
2.5 Firing angle Control 14

CHAPTER 3 MULTITERMINAL DC SYSTEMS

3.1 General 15
3.2 Potential Application and Benefits 16
3.3 Types of MTDC Systems 17
3.3.1. Series MTDC Systems 17
3.3.2. Parallel MTDC Systems 18
3.4 Comparison of Series & Parallel 20
MTDC Systems
3.5 Control of MTDC System 21
3.5.1. Series Connected System 21
3.5.2. Parallel Connected System 22
3.5.2.1. Current Margin Method 22

6
CHAPTER 4 MODELLING OF HVDC SYSTEMS

4.1 General 27
4.2 Converter Variable 27
4.3 Incorporation of Control Equations 29
4.3.1. Rectifier Operation 30
4.3.2. Inverter Operation 31
4.4 Representation for Power Flow 30
Solution
4.4.1. AC/DC Interface at the HT 32
Bus
4.4.1.1. Mode 1 32
4.4.1.2. Mode 2 34
4.4.1.3. Mode 3 36
4.4.2 AC/DC Interface at the LT 37
Bus
4.5 Inclusion of Converter Station 38
Losses
4.6 Incorporation of the problem in 40
the Newton’s method
4.7 Modelling of DC links for multi- 41
-terminal System
4.7.1. DC Networks 41
4.7.2. DC Converter 42
4.7.3. Controller Equation 42

CHAPTER 5 AC-DC LOAD FLOW SOLUTION TECHNIQUES

5.1 General 44
5.1.1. Simultaneous or Unified 44
5.1.2. Sequential or alternating 44
5.2 Review of Solution Techniques 45
Available in the literature.
5.2.1. Braunagel’s approach 45
5.2.2. Arrillagu’s Approach 50
5.2.3. Mathur’s Approach 56
5.2.4. J.Reeve’s Approach 62
5.2.5. C.M.Ong’s Approach 68
5.3 Comparison between Unified 78
& sequential Algorithms & a
discussion on the convergence
properties

7
CHAPTER 6 DISCUSSION AND SCOPE OF FUTURE WORK
79

CHAPTER 7 TEST SYSTEMS AND RESULTS

7.1 DC Data 82
7.1.1. Test System A 82
7.1.2. Test System B 83
7.2 AC Data 85
7.2.1. AEP-14 Bus System 85
7.2.2. UPSEB 75 Bus System 86
7.3 Results 91
7.3.1. Results of FDLF performed 91
on AEP-14 Bus Test System
7.3.2. Results of FDLF performed 93
on UPSEB-75 Bus Test System
7.3.3. Results of AC-DC load flow 100
study using Newton’s method
7.3.4. AC-DC load flow results on 103
AEP 14 Bus System
7.3.5. AC-DC load flow results on 104
UPSEB-75 Bus System

REFERENCES & BIBLIOGRAPHY 105

PROGRAM 108

8
LIST OF FIGURES

1.1 An HVDC Link.

2.1 Basic Three Phase Rectifier Bridge.
2.2 Two Terminal DC Link.
2.3 Normal control characteristics.
2.4 Control characteristics and power flow reversal.
2.5 Constant power characteristics.
2.6 Voltage and current limits.
3.1 MTDC Configuration for bulk power transmission.
3.2 Reinforcement of AC network using MTDC link.
3.3 A series connected MTDC system.
3.4 Four terminal DC line with converter in parallel (Monopoler).
3.5 A 3 terminal mesh connection (Bipolar).
3.6 Control of a series connected MTDC system.
3.7 Control of parallel connected system.
3.8 Current reference balancer.
4.1 Basic DC converter.
4.2 Single phase equivalent circuit for basic converter.
4.3 AC-DC interface.
4.4 Mode 1.
4.5 Mode 2.
4.6 Rectifier circuit (Inclusion of converter losses).
4.7 Inverter circuit (Inclusion of converter losses).
5.2.2.1. Flow Chart for Unified AC-DC Load Flow
5.2.2.2. Jacobian Matrix for Four terminal parallel system.
5.2.2.3. Simplified flowchart for DC load flow.
5.2.2.4. Equivalent circuit of a 3-winding transformer with auxiliary equipment.
7.1 AEP-14 Test System.

9
 CHAPTER 1
Introduction

1.1 GENERAL

Owing to the increasing size of interconnected AC power system, digital computers are
most widely used to simulate AC systems for the study of load flow, short circuit,
dynamic machine stability and transient over voltage problems. Incorporation of HVDC
transmission subsystems in AC transmission networks has been a major change in power
transmission during last few years. This change requires modification in the performance
evaluation procedures notably for load flow and stability studies. As a result, a number of
academics and engineers are engaged in devising the most efficient and cost effective
procedures for power system analysis. This dissertation work describes a survey of the
available literature on the power flow solution in the interconnected AC – DC systems.

Speaking of change, HVDC lines joining two AC buses have already appeared in many
systems. Some are to provide asynchronous ties, others are links across the water bodies
and many are for bulk power transmission over long distances. Based on the current state
of HVDC development and keeping in mind the requirements of some new systems being
planned, one can, with reasonable confidence, say that multi-terminal HVDC
transmission systems will form subsystems of power transmission systems in near future.
Already, as on date, a few multi-terminal lines are working successfully and many more
will be installed in future to solve the suburban electric supply problems. The
requirement, therefore, is that we must have digital computer programs which are flexible
and which can efficiently handle a multi-terminal HVDC system embedded in the AC
system for load flow and stability studies.

Historically, as the requirement of inclusion of DC links in the AC load flow program

appeared, the first action was to model each DC terminal appropriately as a load or
source for solving the AC network and separate subroutines for DC system were added.
Since iterative procedures were in use for solution, sequential iteration of AC and DC
systems formed a convenient process. Admittedly a number of refinements based on the
degree of convergence for each system were experimented to determine the most
effective. As the need for AC/DC system studies surged upwards, an earnest effort to
devise the best procedure of computation became paramount. This lead to the
development of procedures for solving simultaneously, in each iteration, the equations of
integrated AC/DC systems.

Although it is claimed that the ―add-on‖ technique of successive iteration is inefficient

but proponents of it claim the other way and support it because it utilizes existing
programs for AC systems with minimum modifications and by virtue of a separate DC
system solution a greater flexibility in its modelling exists.

On the other hand proponents of unified or simultaneous approach support this method
by claiming that it is superior and faces no convergence problems. Never the less, a
survey of available literature shows that both methods are equally competitive and

10
methods using sequential approach have been developed with all the best qualities of
simultaneous and sequential solution combined (C.M.Ong‘s Approach). One of those
sequential methods has been developed as a part of dissertation work.

1.2 Nature of the Problem

1.2.1 Load Flow Techniques

The object of the load flow problem is to determine the steady state operating point of the
power generation and transmission system for a given set of bus bar loads. Active power
generation is normally specified according to economic dispatching practice and the
generator voltage magnitude is normally maintained at a specified level by the automatic
voltage regulator acting on the machine excitation. Loads are normally specified by their
constant active and reactive power requirements, assumed unaffected by the small
variations of voltage and frequency expected during normal steady state operation.

The solution is expected to provide information of

 Voltage magnitudes and angles at all the buses.
 Active and reactive power flows in the individual transmission lines.
 System losses.
 Reactive power generated or absorbed at the voltage controlled buses.

The current problems faced in the development of the load flow are:-
 An ever increasing size of system to be solved.
 On-line applications for automatic control.
 System optimization.

Hundreds of contributions have been offered in the literature to overcome these problems
[1]. Recently the advances in soft computing procedures (employing artificial intelligence
tools) also provide a reasonable solution to the working engineers and academicians for
the current challenges of the load flow problem [2].

Five main properties are required of a load flow solution method:-

 High computational speed.
 Low computer storage.
 Reliability of solution.
 Versatility.
 Simplicity.

Broadly speaking, for an AC system load flow analysis using the nodal voltage method,
two sets of interdependent equations are solved repeatedly until the voltage distribution
converges to some required accuracy. Usually three iterative methods are prevalent to
solve AC power flow equations using nodal approach.

1. Gauss Seidel method.[3]

2. Newton Raphson method.[3,4]

11
 ΔP = H N Δθ
ΔQ J L ΔV/V
(1.1)
where
ΔP = Pksp ─ Vk ∑ Vm(Gkm cos θkm + Bkm sin θkm) (1.2)
sp
ΔQ = Qk ─ Vk ∑ Vm(Gkm sin θkm + Bkm cos θkm) (1.3)
and H, N, J, L are square submatrices of first order partial derivatives of ΔP and ΔQ
with respect to Δθ and ΔV.

3. Fast decoupled load flow method.[3,4]

Equations 1.1 and 1.2 are retained to provide exact power mismatches, but the
increments in V and θ are obtained by the successive solution of two decoupled
matrix equations,i.e.
[ΔP/V] = [B] [Δθ] (1.4)
[ΔQ/V] = [B] [ΔV] (1.5)
where,
Bkm = ─ 1/Xkm for m ≠ k

Bkk = ∑ 1/Xkm (1.6)

mωk

Bkm = ─Bkm for m ≠ k

Bkk = ∑ Bkm
mωk

The elements of B and B are constant and the matrices need be triangularised
only once for a particular network.

Because of its strong convergence, Newton-Raphson method and associated decoupled

methods have found general acceptability.

1.2.2 Effect of HVDC on load flow problem

The recent availability of high voltage power electronics switching devices has lead to
the development of HVDC transmission and FACT technology. Although the original
purpose of the former was a return to the DC transmission for large distances, most of the
recently commissioned schemes are actually back to back, their purpose is the
interconnection of asynchronous power systems

This is well established fact that behaviour of HVDC link is different from the AC
interconnection and nature of integrated AC/DC power flow analysis is quite
complex.The presence in the AC system of one or both ends of a DC link adds one or two
nodal injected currents (or powers) to those already existing owing to the presence of
either generator or loads. The requirement is a completely self-contained program which
will give the currents from the two converters when provided with the nodal voltages.

12
The other form involves the DC link being an integral part of an AC system, where
simultaneous solution of power flow at both ends is essential. The former is a simple
version of the latter.

A diagram of a DC link is shown in Fig.1.1

converter1 converter2

Fig.1.1: DC Link

For simulation, the DC link includes the converter transformers, thus extending up to the
points where capacitor or filter banks are connected or where E1 and E2 can be assumed
to be reasonably sinusoidal. It may be mentioned here that harmonics must be excluded
from the AC load flow problem. These are largely lost in the filter circuit and have no
power component; in a properly designed DC link, any small proportion of harmonics
entering the AC system is not likely to penetrate far.

It is a well known fact that, within an error of about 1% (up to angle of overlap μ = 300),
a simple relationship exists between fundamental currents on the secondary sides of the
converter transformers and direct currents:-

| I1| = | I2| = √6 Id
π
If Id and the tap changer ratios are known, I1 and I2 can be calculated. Thus, since the
fundamental current is equal at the two ends, only the power‘s active and reactive
components differ. Another fact is that the active power at the inverter is equal to that at
the rectifier minus the losses. Thus, the knowledge of Id, of which losses are a function,
and link power would be sufficient to compute the active component of the alternating
current. These considerations lead to a solution only when Id, the power transfer and the
tap changer positions are known. These values are, however, unlikely to be readily
available and, in any case, are functions of the terminal alternating voltages, the nature of
individual converter control and the overall system control. For an automatic and
accurate assessment of Id, there is little alternative but to take into account the nature of
the converter and system control.

13
1.3 SCOPE OF WORK

The major contributions of this thesis are:-

 A review of the selected AC-DC load flow procedures has been presented.
 A simple and efficient AC-DC load flow method for multi-terminal HVDC
systems has been developed.
 The program is run on two systems and results are presented.

14
 CHAPTER 2
HVDC Converter and System Control

2.1 GENERAL
HVDC control has been covered in great detail in many publications (5,6,7,8,9). Fist of
all we will write converter and inverter equations and then we will discuss their control.

Vterm
Id

1 3 5
1:a

Vd
Ip

4 6 2

To filters

Fig. 2.1 Basic Three Phase Rectifier Bridge

The basic converter configuration is the Graetz bridge as shown in fig.2.1

For large power ratings, static converter units generally consist of a number of series
and/or parallel connected bridges, some or all bridges being phase-shifted relative to the
others. With these configurations, 12-pulse and higher pulse numbers can be achieved to
reduce the distortion of the supply current with limited or no filtering. A multiple bridge
rectifier can, therefore be modeled as a single equivalent bridge with a sinusoidal supply
voltage at the terminals.

2.2 Converter Equations

Following assumptions are normally made in the development of the steady state model

1. The forward voltage drop in a conducting valve is neglected so that the valve may
be considered as a switch. This is justified by the fact that the voltage drop is very

15
 small in comparison with the normal operating voltage. It is further, quite
independent of the current and should, therefore, play an insignificant part in the
commutation process since all valves commutating on the same side of the bridge
suffer similar drop. Such a drop is taken into account by adding it to the DC line
resistance. The transformer winding resistance is also ignored in the development
of the equations, though it should also be included to calculate the power loss.
2. The converter transformer leakage reactance as viewed from the secondary
terminals are identical for the three phases, and variations of leakage reactance
caused by on load tap changing are ignored.
3. The direct current ripple is ignored, i.e., sufficient smoothing inductance is
assumed on the DC side.

2.2.1 Rectifer Equations

AC and DC voltage relationship is given as

I. Vd = Vdo cos α – 3 Xc Id (2.1)
π
Where Vdo = 3√2 a Vterm
π (2.2)
Another equation for DC voltage is
Vd = Vd0 (cos α + cos(α + μ))
2 (2.3)
α = Firing angle
μ = Angle of overlap.
δ=α+μ

II. Fourier analysis of the AC current waveform, including the effect of

commutation leads to the following relationship between the rms of the
fundamental component and the direct current.
Is = k√6.Id (2.4)
π
where
k = √[cos 2α – cos 2(α + μ)] 2 + [2μ+ sin2α – sin2(α + μ)]2
4[cos α – cos(α + μ)] (2.5)

For values of μ not exceeding 60o.

Approximate expression
Is = √6 .Id
π (2.6)
The above relationship is exact if μ = 0;
With μ = 600, the error is 4.3%, and with μ < 300(normal value), the error is less
than 1.1%.

So values of k are very close to unity under normal operating conditions i.e.
when the voltage and the currents are close to their nominal values and the AC
voltage waveforms are symmetrical and undistorted.

16
 Therefore, taking into account the transformer tap position, the current on the
primary side becomes
6
Ip = k.a. Id (2.7)


III. Using the fundamental components of voltage and current and assuming
perfect filtering at the converter terminals the power factor angle at the
converter terminals is φ (the displacement between fundamental voltage and
current waveforms) and can be written as

P = √3 Vterm Ip cos φ = Vd Id (2.8)

cos φ = (cos α + cos δ) (2.9)

2k
Q = √3 Vterm Ip sin φ (2.10)

2.2.2 Inverter Equations

When 0 < α < 900 Rectification

0 0
90 < α <180 Inversion
β = π – α = Ignition advance angle (2.11)
γ = π – δ = Extinction advance angle or deionization angle at the end of the
commutating period, before the voltage across the commutating valve reverses.
μ = δ – α = β – γ = angle of overlap (2.12)
α + μ < 1800 – γ0
γ0 = Minimum extinction angle
If above condition is not met, a commutation failure occurs.

Voltage equations are:-

1. Vd = Vdo cos γ – 3 Xc Id (2.13)
π
Where Vdo = 3√2 a Vterm
π (2.14)

2. Vd = Vdo cos β + 3 Xc Id
π (2.15)

Comparing equations 2.1 and 2.13, inverter voltage equations are obtained by substituting
γ for α in the rectifier equations. However, it is to be noted that while α is directly
controllable, γ is not.

Inverter operation requires the existence of three conditions as follows:-

 An active AC system which provides the commutating voltage.

17
  A DC power supply of opposite polarity to provide continuity for the
unidirectional current flow (i.e. from anode to cathode through the switching
devices).
 Fully controlled rectification to provide firing delays beyond 90o.

When the conditions are met, a negative voltage of a magnitude given by equation 2.13 is
impressed across the converter bridge and power (─Vd.Id) is inverted. Now power factor
angle(φ) is larger than 900. i.e.
P = √3 Vterm Ip cos φ = ─√3 Vterm Ip cos(π ─ φ) (2.16)
Q =√3 Vterm Ip sin φ = √3 Vterm Ip sin(π ─ φ) (2.17)

2.3 H.V.D.C. System Control

The Fundamental objectives of an HVDC control system are:-
 To control a system quantity such as DC line current, transmitted power or frequency
of either of the two connected AC networks with sufficient accuracy and speed of
response.
 To ensure stable converter operation in presence of small system disturbances.
 Keeping the voltage at the sending end of the line constant at its rated value in so far
as possible in order to minimize losses for a given power.
 To fulfill the above objectives at minimum reactive power consumption (keeping
power factor as high as possible).
 Control should also ensure stable operation at large disturbances, such as a fault, or at
least minimize the consequences when the fault is cleared during normal operation.

Id

Vdr Vdi

converter1 converter2
Fig2.2 Two terminal DC link

The sending and receiving ends of a two terminal HVDC transmission link such as that
illustrated in Fig2.2 can be modelled as single equivalent bridges with terminal voltages
Vdr and Vdi respectively. The direct current is thus given by:-

Id = Idr = Idi = Vdr─Vdi

Rd (2.18)
Where Rd is the resistance of the link and includes the loop transmission resistance (if
any), the resistance of the smoothing reactors and the converter valves.
The power at the rectifier terminal is
Pdr = Vdr.Id (2.19)
The power at the inverter terminal is
Pdi = Vdi . Id = Pds – Id2. Rd (2.20)

18
In HVDC transmission, because of the rather small values of line resistance, the direct
current will vary rapidly and drastically with small changes in the direct voltage
difference between terminals.To achieve the objectives of minimum reactive power
requirements at the terminals and to reduce system losses, it is imperative to maintain the
highest possible transmission voltage. This is achieved by minimizing the inverter end
extinction angle i.e. operating the inverter on constant extinction angle (C.E.A.) control
while controlling the direct current at the rectifier and by means of temporary delay angle
backed by transformer tap change control. Grid/gate control, which is rapid (1 to 10 ms)
and tap changing which is slow (5 to 6 seconds per step) are used in a complementary
manner. Grid/gate control is used initially for rapid action, followed by tap changing to
restore the converter quantities (α for rectifier and γ for inverter) to their normal range.

CEA control applied to the inverter automatically varies the firing angle of advance to
maintain the EA (γ) at a constant value. A value between 15o and 18o is usually chosen
for γ. Deionization imposes a definite minimum limit on γ and the EA control usually
maintains it at this limit. A larger value would give a decreased risk of commutation
failures, but simultaneously give increased stresses on the valves and increased reactive
power consumption.

Constant current (CC) control applied to the rectifier regulates the firing angle α to
maintain a pre specified link current Idsp, within the the range of α. At steady state
operation, it is suitable to operate the rectifier with a firing angle of 7o to 10o. A small
angle would give less demand for reactive power, but also would limit the ability to
rapidly increase the rectifier voltage by rapidly decreasing the firing angle. If the value of
α required to maintain Idsp, falls below its minimum limit, current control is transferred
to the inverter, i.e. α is fixed on its minimum limit, and the inverter firing angle is
advanced to control the current.

The converter transformer tap change is a composite part of this control. The rectifier
transformer attempts to regulate the DC voltage at some point along the line to a
specified level. For minimum loss and minimum reactive power absorption, this voltage
is required to be as high as possible, and the firing angle of the rectifier should be as low
as possible.

Fig 2.3 shows the DC voltage/ current characteristic at the rectifier and inverter ends (the
latter have been drawn with reverse polarity in order to illustrate the operating point). The
current controller gains are very large and for all practical purposes the slopes of the
constant current characteristics can be ignored. Consequently, the operating current is
equal to the relevant current setting. i.e. Idsr and Idsi for rectifier and inverter constant
current control, respectively.

The direction of power flow is determined by current settings, the rectifier end always
having the larger settings. The difference between the settings is the current margin Idm is
given by
Idm = Idsr – Idsi > 0 (2.21)

19
 Vd

Rectifier(amin)

Inverter EA

InverterCC
Idm Rectifier CC

Id

Idsi Idsr

Fig 2.3 Normal control characteristics

Many DC transmission schemes are bidirectional i.e. each converter operates sometimes
as a rectifier and sometimes as an inverter. Moreover, during DC line faults both
converters are forced into the inverter mode in order to de-energize the line faster. In such
cases each converter is provided with a combined characteristic as shown in Fig2.4,
which includes natural rectification, CC control and constant EA control.

With the characteristic shown by solid lines (i.e. operating at point A) power is
transmitted from converter 1 to converter 2. Both stations are given the same current
command, but the current margin setting is subtracted at the inverter end. When power
reversal is to be implemented, the current settings are reversed and the broken line
characteristics apply. This results in operating point B with direct voltage reversed and no
change in direct currents.

Id and hence the difference of internal voltages are always positive because of the
unilateral conduction of the valves. If it is desired to reverse the direction of power
transmission, the polarity of the direct voltages at both ends of the line must be reversed
while maintaining the sign of their algebraic difference. Converter 2 then becomes the
rectifier and converter 1 the inverter. The terminal voltage of the rectifier is always
greater in absolute value than that of the inverter, although it is less algebraically in the
event of negative voltage

20
2.4 Alternative forms of control
A commonly used operating mode is constant power (CP) control as with constant
current control, either converter can control power. The power setting at the rectifier
terminal Pdsr must be larger than at the inverter terminal Pdsi by suitable power margin
Pdm i.e.
Pdm = Pdsr – Pdsi > 0 (2.22)
Vd
Converter 1

Converter 2

Id

B Converter 1

Fig 2.4 Control characteristics and

power flow reversal.
Converter 2

21
Several limits are added to the CP characteristics as shown in fig 2.6. These are:
 A maximum current limit with the purpose of preventing thermal damage to the
converter valves; normally between 1 and 1.2 times the nominal current.
 A minimum current limit (about 10 per cent of the nominal value) in order to
avoid possible current discontinuities which can cause over voltages.
 Voltage dependent current limit (line OA in the fig.2.6) in order to reduce the
power loss and reactive power demand.

In cases where the power rating of the DC link is comparable with the rating of either the
sending or receiving AC system interconnected by the link, the frequency of the smaller
AC system is often controlled to a large extent by the DC link. With power frequency
(PF) control, if the frequency goes out of the pre specified limits, the output power is
made proportional to the deviation of frequency from its nominal value. Frequency
control is analogous to the CC described earlier i.e. the converter with lower voltage
determines the direct voltage of the line and the one with higher voltage determines the
frequency. Again current limits have to be imposed which override the frequency error
signal.

CP / EA and CC / EA controls were evolved principally for bulk point to point power
transmission over long distances or submarine crossings and are still the main control
modes in present use.

Vd

α min

EA

Pdm

Id

Idsi Idsr

Fig.2.5 Constant Power Characteristics

22
 Vd

Vmax

CP

Id

O Imin
Fig.2.6 Voltage and Current Limits
Multi-terminal DC schemes have also being considered, based on the basic controls. Two
alternatives are possible, i.e., constant voltage parallel and constant current series
schemes.

2.4 Firing angle control

The operation of CC and CEA controllers is closely linked with the methods of
generation of gate pulses for the valves in a converter. The following are the two basic
requirements for the firing pulse generation of HVDC valves:

1. The firing instant for all the valves are determined at ground potential and the
firing signals sent to individual thyristors by light signals through fiber optic
cables. The required gate power is made available at the potential of individual
thyristor.
2. While a single pulse is adequate to turn on a thyristor, the gate pulse generator
must send a pulse whenever required, if the particular valve is to be kept in a
conducting state. This is of importance when operating at low DC currents and a
transient might reduce the current below the holding current.
There are two basic firing schemes, namely:
 Individual Phase control (IPC)
 Equidistant pulse control (EPC)

IPC was used in the past and has now been replaced by EPC. A detailed explanation is
beyond the scope of the present work.

23
 CHAPTER 3
Multi-terminal DC Systems

3.1 GENERAL
Successful applications of point-to-point DC links worldwide have shown power system
planners that three-terminal DC (3TDC) and multi-terminal DC (MTDC) schemes will be
the vehicles to fully utilize economic and technical advantages of HVDC technology in
future. A multi-terminal DC (MTDC) system has more than two converter stations, some
of them operating as rectifiers and others as inverters. The simplest way of building a
MTDC system from an existing two terminal system is to introduce tappings. Parallel
operation of converters and bipoles can also be viewed as multi-terminal operation.

Unlike AC systems, the task of extending the two terminal systems to multi-terminal
systems is not trivial. The complexities of control and protection increase considerably
and the use of HVDC breakers is generally required in the MTDC systems. MTDC
systems can be planned in advance or evolve from expansion of operating two-terminal
DC (2TDC) links. In the latter case, often it is advantageous to do the advanced planning
so as to minimize the required modifications, thereby minimizing the outage of the link
during expansion.

3.2 Potential Applications and Benefits

Potential applications for MTDC systems are similar to those for 2TDC systems and can
be classified under three basic categories.
 Bulk power transmission – where low cost energy from several power plants is
transmitted over a long distance to different AC systems.(fig3.1)
 AC network interconnection (Asynchronous interconnection) over a long or
medium distance- where generation/load balancing and sharing of spinning
reserves are of primary concern.
 Reinforcement of an AC network – where limited expansion possibilities exist.
Energy from a new power plant is fed to different locations of an AC system,
usually metropolitan.(fig3.2.)

MTDC systems offer both economic and technical advantages over several equivalent
2TDC systems. The primary economic advantages are as follows:-
 The total installed converter rating in an MTDC system is usually less than that of
several equivalent 2TDC systems.
 MTDC systems offer low cost transmission lines and/or cables.
 The inherent overload capability of MTDC transmission lines can increase the
capacity of transmission corridors.

24
 ▼ ▼
R1 R2

▼
I1 ▼ I2

Fig 3.1 MTDC configuration for Bulk Power Transmission.

AC System

► ◄

Fig 3.2 Reinforcing of AC network Using MTDC link.

25
Technical advantages of MTDC systems include the following:-
 MTDC systems provide greater flexibility in dispatching transmitted power. In
mesh DC networks, the inherent overload capability of transmission lines allows
for more flexible DC power transmission patterns.
 In a larger interconnected power system, MTDC systems can provide a powerful
control action to damp out troublesome electromechanical oscillations.
 In conjunction with phase shifting transformers and generation shifting, MTDC
systems may be used to enforce desired power flow patterns in a large
interconnected power system
.
3.3 Types of MTDC Systems
There are possible two types of MTDC systems
(i) Series.
(ii) Parallel.
The parallel MTDC systems can further be subdivided into the following two categories:-
(a) Radial.
(b) Mesh.

3.3.1 Series MTDC system

This is a natural extension of the two terminal system which is a series connected system.
A three-terminal MTDC system is shown in Fig.3.3 This shows a monopolar
arrangement; however, a homopolar arrangement with two conductors is also possible.

Fig.3.3 A Series connected MTDC system.

26
 The system is grounded at only one point which may be conveniently chosen. If the line
insulation is adequate, the grounding point can be shifted, based on changes in the
operating conditions. Grounding capacitors may also be used to improve insulation
coordination and system performance during transients.

In a series connected system, the current is set by one converter station and is common
for all stations. The remaining stations operate at constant angle (extinction or delay) or
voltage control. In order to minimize the reactive power requirements and the losses in
valve damper circuits, the normal operating values of the firing angle may be adjusted
using tap changer control. At all times, the sum of the voltages across the rectifier
stations must be larger than the sum of the voltages across the inverter stations. In case of
a drop in the voltage at the current controlling rectifier station, the inverter station with
the larger current reference takes over the current control.

The switching in or out of a bridge is accomplished by deblocking/block and bypass in a

manner similar to that in a two terminal system. The clearing of a fault in the DC line is
also similar. The power reversal at a station is done as in a two terminal system, by
reversing the DC voltage by converter control.

The power control in a two terminal system is accomplished by adjusting the current
while trying to maintain a constant voltage in the system. This is done to minimize the
losses. However, in a MTDC series system, central control would be required to adjust
the current in response to changing load conditions. The local control of power would
imply adjusting voltage at the converter station using angle and tap controls. Using only
one bridge or a 12 pulse unit for the voltage control and operating the remaining bridges
at minimum (or maximum) delay angle can reduce the reactive power requirements.

The consideration of series connected schemes has been generally confined to

applications with small power taps (generally less than 20%) where it may be more
economical to operate at a higher current and lower voltage than for a full voltage tap at
full voltage and reduced current. In a series tap, the voltage rating is proportional to the
power capacity of the tap. However, the converter transformer must have full DC
network voltage insulation. Flexibility of the power transfer could require a wide range
for the transformer taps of the series station.

3.3.2 Parallel MTDC Systems

In the parallel scheme, the converters are connected in parallel and operate at a common
voltage. The connections can be either radial or mesh. The following relation apply,
∑Pr = ∑Pi + ∑Pl (3.1)
Where,
∑Pr = Sum of the rectifier outputs.
∑Pi = Sum of the inverter outputs.
∑Pl = Sum of losses in the lines.

27
Here, the operating philosophy of constant voltage AC system is extended to the DC
systems. The currents in all the converter stations except one are adjusted according to
the power requirements. One of the terminals operates as a voltage setting terminal at
constant angle or voltage.

A radial system is one in which the disconnection of one segment of transmission would
result in interruption of power from one or more converter station.In a mesh system the
removal of one link would not result in a disruption provided the remaining links are
capable of carrying the required power (with increased losses). Evidently, a mesh system
can be more reliable than a radial system.

The majority of studies and proposed applications have considered parallel configuration
with radial type connection. The mesh connection, although offering more redundancy,
requires greater length of DC lines.

The power reversal in a parallel MTDC system would involve mechanical switching as
the voltage can not be reversed. Also the loss of a bridge in one converter station would
require the disconnection of a bridge in all the stations or disconnection of the affected
station.

Vd +
I1 I2 -I3 -I4
-
▲ ▲ ▼ ▼

Fig.3.4 Four Terminal DC line with converters in parallel (monopolar arrangement)

28
 Inverter1

Rectifier1 ▼

Rectifier 2

▼
Inverter 2
Fig 3.5 A Three Terminal Mesh Connection (Bipolar Arrangement)

3.4 Comparison of Series and Parallel MTDC Systems:-

The advantages and disadvantages of series and parallel MTDC systems
are given below:-
1. High speed reversal of power is possible in series systems without mechanical
switching. This is not possible in parallel systems.
2. The valve voltage rating in a series system is related to power system rating,
while the current rating in a parallel connected system is related to power. This
would imply that for small power ratings of the tap, series connection maybe
cheaper even though valves have to be insulated for full voltage to ground. The
parallel connection has the advantage of stage development in the converter
stations by adding parallel converters as the power requirements increase.
3. There are increased losses in the line and valves in series systems, (losses are
higher in portions with lower voltage) in comparison to parallel systems. The
system operation in series systems can be optimized by operating the largest
inverter at rated voltage.
4. Insulation coordination is a problem in series systems as the voltage along the line
varies.
5. The permanent fault in a line section would lead to complete shutdown of the
series system, while it would lead to only the shutdown of a converter station
connected to the line section in a radial MTDC system. With provisions for fast
identification and clearing of faults in mesh connected systems , there is no
disruption of power transfer.
6. The reduction in AC voltages and commutation failures in an inverter can lead to
overloading of converters as current is transferred from other terminals in a
parallel system. The problem is severe if the rating of the inverter is relatively

29
 small. Increased values of smoothing reactor and voltage dependent current limits
can reduce the severity. However, the voltage ratings would increase, resulting in
increased unit costs. A recent study shows that the cost of a 500 MW DC
equipment (at +- 500 kV) would be 74% of the cost of a 1000 MW DC equipment
[ref.11]. It is concluded that a practical limit to unequal inverter ratings may be
75% : 25% .
7. The control and protection philosophy in a series MTDC system is a natural
extension of that in a two terminal system. However, extension to the parallel
systems is not straight forward. Increased commutation requirements and
problems in recovery from commutation failures are associated with the parallel
systems. HVDC breakers of appropriate rating may be required for clearing faults
in the DC line or converter stations.

From the relative merits and demerits of series and parallel MTDC systems described
above, it may be concluded that series connection is appropriate for taps of rating less
than 20% of the major inverter terminal. parallel connections are more versatile and is
expected to be widely used as in AC systems. The use of parallel connection as compared
to series connected scheme results in fewer line losses, is easier to control, and offers
more flexibility for future expansion.

3.5 Control of MTDC systems

The basic control principle for MTDC systems is a generalization of that for two-terminal
systems. The control characteristic for each converter is composed of segments
representing constant-current control and constant-firing angle control (CEA for inverter
and CIA for rectifier). In addition, an optional constant-voltage segment may be included.

The converter characteristics, together with the dc network conditions, establish the
operating point of the system. For a common point to exist, converter control
characteristics must intersect.

For MTDC systems, there is considerable room for providing flexibility of options to
meet the requirements of individual systems.The following is a general discussion of
significant aspects related to control of parallel and series connected systems.

3.5.1 Series-connected systems

In a series-connected system, current is controlled by one terminal, and all other

terminals either operate at constant-angle (α or γ) control or regulate voltages. Fig3.6
illustrates the control strategy usually considered for series systems.

Current control is assumed by a rectifier if the sum of the rectifier voltages at the ordered
current is greater than the sum of the inverter voltages: the rectifier with lowest current
order assumes the current control. On the other hand, if the sum of the inverter
voltages is greater the inverter with higher current order assumes current control.

30
For series systems, the voltage references must be balanced, whereas for parallel systems
current references must be coordinated. However, for series systems the coordination
problem is not as critical as it could be with parallel systems.The series systems allow the
high speed power reversal at any terminal without the need for switching operations.
Bridges and terminals can be taken out of service without affecting the rest of the system.
Communication between terminals is required for controlling the line loadings to
minimize loses; this can be achieved with a relatively slow communication.

The operation of converters in series requires converter operations with high firing
angles. This can be minimized by tap-changer control and backing off one bridge against
another.

3.5.2 Parallel connected systems

The various methods available in the literature are as follows:

1. Current-Margin Method
2. Voltage Limiting Control[10]
3. Use of Decentralized Current Reference Balancer(DCRB)[11]
4. Two ACR (Automatic Current Regulator) Method[12].

Here we will discuss Current margin method only.

3.5.2.1 Current - Margin Method

This is most widely considered and the natural extension of control philosophy in a two
terminal system.One of the converter station which is operating at the angle limit
(minimum α or minimum γ) determines the DC voltage (dependent on the AC voltage
and the tap ratio). The remaining terminals operate as current controlling terminals. The
current through the voltage setting terminal say n is given by

n-1
In = ─ ∑ Ij (3.2)
j=1

where n is the number of terminals. In the above equation, the inverter currents are
treated as negative, while the rectifier currents are treated as positive. The current
controlling terminals operate with a voltage margin which may become zero or negative
during disturbances in the AC system. As even small disturbances can affect the voltage
margin, it is necessary to maintain the current and power distribution in the system with
minor changes, during the disturbances. This is possible if current control is also
provided at the voltage setting terminal (or slack terminal) such that it tries to maintain
the same current as before. Because of measurement errors and the requirements of a
smooth transition from angle (or voltage) control to current control, the current reference
at the voltage setting terminal is chosen to satisfy the following equation:

n
∑ Ij ref = Imargin (3.3)
j=1

31
Vd

CIA

CC

I1 Id

Vd

CIA

CC

Id
I2
Vd Fig.3.6
Control Characteristics of
a Series Connected System

CEA

CC

Id
I3

Vd

CEA

CC

Id
I4

32
The converter with the lowest voltage ceiling always acts as a voltage setting terminal.
The changes in the voltage setting terminal due to disturbances in the AC system are
called Mode Shifts. Uncontrolled mode shifts can be minimized by selecting a terminal
with highest short circuit ratio as the voltage setting terminal. Due to the negative
resistance characteristics of the constant extinction angle control, it would be advisable to
choose a rectifier terminal. The magnitude of the current margin is critical as converters
of lower ratings can be overloaded when operating at angle limit.

Vd

CIA
CIA CEA CEA

CC CC CC CC

Id
I1 I2 I3 I4
Rectifier 1 Rectifier 2 Inverter 1 Inverter 2

Fig.3.7 Control of Parallel Connected MTDC System

The central controller that regulates the current orders at all the converter stations is
termed as Current Reference Balancer (CRB) and is shown in the analog version in Fig.5.
Here, the current orders calculated from local power controllers are adjusted in order to
satisfy equation 2. The limits on the current orders are taken into account in balancing
current references. The actual implementation of CRB can be performed by using
microprocessors

Satisfactory operation of MTDC systems requires a reliable central CRB that operates at
all times. This requires reliable two way communication between a central station and
each converter station. If there is loss of a station and this information is not
communicated, the system operation is adversely affected. In case of loss of a rectifier
station, the power transfer is interrupted by voltage collapse. In case of loss of an inverter
station, other stations will be overloaded.

In the current margin method, the change in the voltage setting terminal requires the
operation of tap changing in converter transformer to modify the voltage margin. This
can be slow and results in less flexible control to deal with mode shifts. An improvement
has been suggested by using a modified control scheme termed as voltage margin control
method. In this method, all converter stations are provided with automatic voltage

33
 regulators (ACR). In the voltage setting terminal, AVR reference voltage is set to the
rated voltage and in other stations, AVR reference voltage is set higher by an amount ΔE.

Iref1‟
∑ Iref1

Iref2‟ ∑ Iref2

∑ Iref3
‟
Iref3

K1 K2 K3 ∑
Imargin

Weighting Factors
High Gain Amplifier

Fig.3.8 Current Reference Balancer

The operation of this control technique is illustrated in detail in [9].

The voltage margin control method is also not free from the requirements of the
centralized control and fast communication. In order to facilitate the operation of MTDC
systems even when there is failure of communication system, the following modifications
to the basic current margin method of control have been suggested:

34
1. Voltage Limiting Control [10]
2. Use of Decentralized Current Reference Balancer(DCRB)(11)
3. Two ACR (Automatic Current Regulator) Method (12).
These methods will not be discussed here.

35
 CHAPTER 4
MODELLING OF HVDC SYSTEMS
4.1 GENERAL
In this section, the modeling of HVDC systems in power- flow and stability studies will
be presented. The representation of the DC systems requires consideration of the
following:-
 Converter model
 DC transmission line/network model
 Interface between ac & dc systems
 DC system controls model

The representation of the converters is based on the following basic assumptions:

a) The direct current Id is ripple free and direct voltage is smooth.
b) The AC systems at the inverter and the rectifier consist of perfectly sinusoidal,
constant frequency, balanced voltage sources behind balanced impedances. This
assumes that all harmonic currents and voltages introduced by the commutation
system do not propagate into the ac system because of filtering.
c) The converter transformers do not saturate. The converter transformer is lossless and
the magnetizing admittance is ignored.
The validity of making the first two assumptions for power flow and stability studies has
been demonstrated in reference 13.

4.2 Converter Variables

Under balanced conditions similar converter bridges attached to the same ac terminal bus
bar will operate identically regardless of the transformer connections. They may therefore
be replaced by an equivalent bridge for the purpose of single phase load flow analysis.
With reference to fig.4.1, the set of variables illustrated, representing fundamental
frequency or DC quantities permits a full description of the converter system operation.
An equivalent circuit representation for the converter is shown in fig. 4.2, which includes
the modification as explained earlier as regards the position of angle reference.

Here
Vterm  = line to line converter terminal bus bar nodal voltage (phase angle referred
to converter reference)

E  = Fundamental frequency component of the voltage waveform at the converter

transformer secondary.
Ip,Is = fundamental frequency component of the current wave shape on the primary and
secondary of the converter transformer respectively.
 = Firing angle delay.
a = Transformer‘s off nominal tap ratio.
Id = converter direct current.
Vd = Average dc voltage.

36
Vterm θterm o

E θ‟ Id
1:a

Vd
Ip Is θ‟‟
α

Fig.4.1 Basic DC converter ( angles refer to a.c. system reference)

Id

Vterm φ
E ψ
a.Bt
Is 0o

Ip Vd

a(a-1)Bt (1-a)Bt

Fig.4.2 Single Phase equivalent circuit for basic converter (angles refer to DC
reference)

37
Out of these ten variables, nine are associated with the converter plus Vterm (ac terminal
voltage magnitude) form a possible choice of X for the formulation of DC load flow
problem.

The minimum number of variables required to define the operating state of the system is
the number of independent variables.Any other system variable or parameter (e.g. P dc
and Qdc) may be written in terms of these variables. Two independent variables are
sufficient to model dc converter, operating under balanced conditions, from a known
terminal voltage source. However, the control requirements of HVDC converters are such
that a range of variables or functions of them are the required variables. If minimum
number of variables is used, then the control specifications must be translated into
equations in terms of these two variables. These equations will often contain complex
non – linearities and present difficulties in their derivation and program implementation.
In addition the expressions used for Pterm(dc) and Qterm(dc) may be rather complex and
this will make the programming of a unified solution more difficult.

For these reasons a non minimal set of variables is recommended i.e. all variables which
are influenced by the control action are retained in this model. This is in contrast to the ac
load flow where, due to the restricted nature of the control specifications, the minimum
set is normally used. The following set of variables permits simple relationships for all
the model control strategies.

[X] = [Vd, Id, a, cos, ] (4.1)

Variable  is included to ensure a simple expression for Qdc , while this is important in
the formulation of the unified solution , variable  may be omitted in the sequential
solution as it is not involved in the formulation of any control specification. cos is used
as a variable rather than  to linearize the equations and thus improve convergence.

4.3 Incorporation of control equations

At each converter, the angle (α or γ), here γ is the extinction angle at the inverter
terminal, and the transformer tap, a, can be controlled directly to achieve
 Current control
 DC voltage control
 Power control
 Control of reactive power
Generally, the angle control is continuous while the tap changer control (which is
mechanically operated) is discrete. Theoretically, if the taps are continuous and
unlimited, it is possible to control (in steady state) the current/power or voltage/reactive
power with the tap changer control alone. In a two terminal DC system, the tap changer at
the inverter is normally used to control the DC voltage while the tap changer at the
rectifier is used to control the delay angle. The discrete nature of the controller results in
the delay angle or DC voltage lying within narrow bounds rather than at fixed value.

38
The limits on the control variables, α (or γ) and ‗a‘ must be considered when specifying
Vd , Id , Pd, and Qd . Also, it is necessary to consider current limits in a converter when
subjected to voltage control. The existence of limits on control and the dependent
variables can require rescheduling of power (or current) and voltage. Some times, it may
be necessary to consider mode shift where the voltage setting terminal shifts from one
converter to the other. Handling all these variations can be a complex task in the load
flow analysis of DC systems with many terminals.

Any function of the ten dc variables is a valid (mathematically) controls equation so long
as each equation is independent of all other equations. In practice there are restrictions
limiting the number of alternatives. Some control strategies refer to the characteristics of
power transmission, other introduce constraints such as minimum delay or extinction
angle.

Examples of some valid control specifications are:-

(i) Specified converter transformer tap.
a — asp = 0 (4.2)
(ii) Specified d.c. voltage.
Vd —Vdsp = 0 (4.3)
(iii) Specified d.c. current
Id — Idsp = 0 (4.4)
(iv) Specified minimum firing angle
. cosα — cosαmin = 0 (4.5)
(v) Specified d.c. power transmission
Vd Id — Pdcsp = 0 (4.6)

During the iterative solution procedure the uncontrolled converter variables may go
outside the prespecified limits, when this happens, the offending variable is usually held
to its limit value and an appropriate control variable is freed.

4.3.1 Rectifier Operation

The dc system may be summarized as follows:-

R(X ,Vterm) k = 0 (4.7)
where R(1) = Vd – k1.a.Vterm.cos(φ)
R(2) = Vd – k1.a. Vterm.cos α + k2 Id Xc
R(3) = ƒ(Vd,Id)
R(4) = control equation
R(5) = control equation
** Vterm can be either a specified quantity or an ac system constraint.
The equations for Pdc and Qdc are
Pterm(dc) = Vterm . Ip . cos(φ) (4.8)
= Vterm . k1.a .Id. cos(φ)
or Pterm(dc) = Vd.Id (4.9)
Qterm(dc) = Vterm . Ip . sin(φ)
= Vterm . k1.a .Id. sin (φ ) (4.10)

39
4.3.2 Inverter Operation

All the equations presented so far are equally applicable to the inverter operation.
However, during inversion it is the extinction advance angle (γ), which is the subject of
control action and not the firing angle (α). For convenience, therefore equation R(2) of
(4.7) may be written as
Vd = k1.a.Vterm.cos(γ) — Id.Rc (4.11)
But if we take Id to be positive in the outward direction from the terminal then
Vd = k1.a.Vterm.cos(γ) + Id.Rc
Therefore, R(2) = Vd — k1.a.Vterm.cos(γ)— Id.Rc (4.12)

4.4 Representation for Power-Flow Solution:-

From the analysis presented so far, the converter equation may be summarized as
follows:
Vdo = 3√2 a Vterm
π

Vd = Vdo cosα – 3Xc Id

π

or (4.13)
Vd = Vdo cosγ – 3Xc Id
π

φ ≈ cos-1(Vd/Vdo)

P = Vd Id = Pac

Q = P tanφ

where
Vterm = RMS line-to-line voltage on HT bus
a = transformer turns ratio
P = active power
Q = reactive power
Xc = ω.Lc = commutating reactance per bridge/phase
Vd, Id = direct voltage and current per pole

40
 Vterm Id
1 : a

Vd

HT LT

The equation used above for determining the power factor angle (φ) is approximate. It
simplifies analysis significantly and gives results of acceptable accuracy, consistent with
the level of accuracy associated with iterative solution techniques used for power-flow
analysis. For specific application requiring greater accuracy, exact relationship between
ac and dc quantities derived previously may be used.

For the purpose of illustration, we will consider a two terminal dc link. Using the
subscripts r and i to denote rectifier and inverter quantities, respectively, the equation for
a dc line having a resistance RL is given by

Vdr = Vdi + RL Id (4.14)

4.4.1 AC/DC interface at the HT bus

Power flow analysis requires joint solution of the dc and ac system equations. One
approach is to solve the two sets of equations iteratively, as illustrative in fig.4.3, with the
converter transformer HT bus (ac side) providing the interface between ac & dc
equations.

Here Vtermr and Vtermi are considered to be input quantities for the solution of DC system
equation. They are known from the previous step in the ac solution. Variables Pr, Qr, Pi
and Qi are considered to be outputs from the solution of DC system equations. They are
used in the next iteration for solving the AC system equation.

The dependent and independent variables in the solution of DC equation depend on

rectifier and inverter control mode. The three possible modes of operation are:

Mode 1: rectifier on CC control; inverter on CEA control.

Mode 2: inverter on CC control; rectifier on CIA control
Mode 3: rectifier on CIA control; inverter on modified characteristic.

In Mode1, alternative inverter control function are constant voltage control and constant-
β control. For purposes of illustration we will consider here only the CEA control mode.

41
 Interface
DC System Pr
αdes.
Rectifier Qr
αmin. Vtermr

AC
Iord System
DC line

γmin. Pi
Inverter Qi
Im(margin)
Vtermi

Fig.4.3 AC-DC Interface

4.4.1(a) Mode 1: rectifier on CC control and inverter on CEA control;

In mode 1, we have

 Inverter firing angle adjusted to give γ = γmin

 Rectifier firing angle adjusted to give Id = Iord
 Rectifier transformer tap adjusted to give α within a desired range
 Inverter transformer tap adjusted to desired voltage

From equation 4.13, with Id = Iord , we may write inverter equation as follows:
Vdoi = 3√2 a Vtermi
π
Vdi = Vdo cos γmin – 3Xc Id
π
φi = cos-1(Vdi/Vdoi)
Pi = Vdi Idi
Qi = Pi tanφi

42
 Since γmin and Iord are known and Vtermi is given by the previous ac solution, Vdi, Pi, Qi
can be computed. The transformer tap can be adjusted to give the Vdi within the desired
range.
The rectifier equations are:
Vdir = Vdi + RL Iord
Vdor = 3√2 a Vterm
π
α = cos [ (Vdr/Vdor) + (Xcr. Iord / √(2) ar Vtermr)
-1

In the above equations voltage Vtermr is known from the previous ac solution. The turn
ratio ar is adjusted to give α within the desired range.
φr = cos-1(Vdr/Vdor)
Pr = Vdr Iord
Qr = Pr. tan φr

Here Pi, Pr, Qi, Qr

are outputs to be used in the next iteration of the ac solution.

Vd

CIA

CEA
Inverter

Im

CC

Rectifier
Id

Iord
Fig 4.4 Mode 1

4.4.1(b) Mode 2: Inverter on CC control and Rectifier on CIA control:

In mode 2, we have
 Rectifier firing angle α = αmin

43
 Inverter firing angle adjusted to give Id = Iord ─ Im
 Rectifier transformer tap adjusted to maximized DC voltage
 Inverter transformer tap adjusted so that γ > γmin and var consumption is minimized.
With, Id = Iord ─ Im the rectifier equations are
Vdor = 3√2 ar Vtermr
π
Vdr = Vdor cosαmin – 3Xc (Iord – Im)
π
φr = cos-1(Vdr/Vdor)
Pr = Vdr(Iord – Im)
Qr = Pr tanφr
In the above equations, Vtermr is known from the previous ac solution, and Id is held at
(Iord ─Im ) by the inverter. Turns ratio ar, may be adjusted to maximize Vdr.
With Vtermi known from the ac solution, the inverter equation may be solved as follows:
Vdori = 3√2 ai Vterm
π
Vdi = Vdr – RL. Id
= Vdr – RL(Iord – Im)
γ = cos-1[ (Vdi/Vdoi) + Xci.(Iord ─ Im) / √(2) ai Vtermi)
φi = cos-1(Vdi/Vdoi)
Pi = Vdi (Iord –Im)
Qi = Pi tan φi
Turns ratio ai may be adjusted to ensure γ > γmin and minimize var consumption.
Variables Pr, Pi, Qr, Qi are outputs of the above calculations to be used for the next
iteration of the ac solution
Vd

CIA CEA
Inverter

CC CC

Im
Reciifier
Id

Iord
Fig.4.5 Mode 2

44
4.4.1(c) Mode 3: Rectifier on CIA control and Inverter on modified characteristic

For power flow studies, it is usually sufficient to consider modes 1 and 2. However, for
power flow solutions (solution of network algebraic equations) associated with stability
studies, it is necessary to consider the transition between modes 1 & 2 .Under these
conditions, the inverter characteristics are modified as shown in fig 5. The segment JK,
with a positive slope, provides a more stable control mode then the segment FK. One
method of realizing this modified characteristic is to operate the inverter in the constant-β
mode.
In mode 3, we have
 rectifier ignition delay angle = αmin.
 inverter ignition advance angle = βc
 Id = Id‘ such that Iord > Id‘ > (Iord ─ Im)

Vd

F K
D

Id
Iord ─ Im Iord

Id‘
Fig. 5 Mode 3

45
The DC system equations are solved as follows to compute the line current.
Vdor = 3√2 ar Vtermr.
π
Vdoi =3√2 . ai Vtermi
π
Variables Vtermr and Vtermi are known from the previous ac solution.

Vdr = Vdor cos αmin ─ 3 Id‘ Xcr

π
Vdi = Vdoi cos βc + 3 Id‘ Xci . (4.15)
π

From line equation we have

Vdr = Vdi + RL Id‘

Hence
Id‘= Vdr ─ Vdi
RL
= [Vdor cos αmin – Vdoi cosβc – 3/π Id‘(Xcr + Xci )]
RL

Rearranging, we have the following expression for Id‘ in terms of Vdor, Vdoi, αmin and βc,
whose values are known.

Id‘ = Vdor cos αmin – Vdoi cos βc

RL + 3/π Xcr +3/π Xci (4.16)

With the values of Id‘ known, Vdr and Vdi are calculated by using equation (4.15), the ac
quantities can then be calculated as follows.
φr = cos-1(Vdr/Vdor)
φi = cos-1(Vdi/Vdoi)
Pr = Vdr Id‘, Qr = Pr tan φr
Pi = Vdi Id‘, Qi = Pi tan φi
For transient stability simulation the tap-changer action is too slow and hence is not
considered for any given system condition, the rectifier and inverter modes of operations may
not be known prior to the solution of the system equations, therefore, the following procedure
may be used to established operating mode and solve the AC and DC equations

(1) Solve for AC equation; output Vtermr, Vtermi

(2) (a) Solve mode 1 DC equations
if α > α min, mode 1 condition is satisfied; go to step 3
(b) if α ≤ α min, solve for mode 2 DC equations
if if γ > γmin, mode 2 condition is satisfied ; go to step 3.
(c) γ ≤ γ min, solve for mode 3 equations.

46
 (3) Calculate Pr, Qr, Pi and Qi., if mismatch is greater then tolerance, go back to step 1 and
solve ac equations.
(4) If mismatch is less then tolerance, solution is complete.

4.4.2 AC /DC interface at the LT Bus.

In the representation discussed above, the AC/DC interface is at the HT side of the
commutating transformer. An alternative representation is to have AC/DC interface at the
LT side (the valve side) of the commutating transformer.

The advantage of using AC /DC interface at the LT bus is that it allows the commutation
reactance to be different from the leakage reactance of the commutating transformer.
Ideally, it should be the leakage reactance plus the equivalent system reactance at the HT
bus. In most cases, the system reactance is small compared to the transformer reactance
and therefore the LT bus representation may not be essential. In weak system, this may
not be true and the flexibility offered by the so called LT representation is useful. The LT
bus representation also offers flexibility in modeling SVCs, synchronous condensers, and
filters connected to the tertiary winding of the converter transformer.

In the LT bus interface approach, the AC system representation includes converter

transformers and the AC solution includes computation of LT bus voltages. The LT
voltages are used as input to the solution of DC equations. The HT bus voltage (or more
precisely the commutating voltage) is computed from the LT voltage and used in the
solution of DC equation, which are essentially the same as those for the HT bus interface
approach. The output of the solution of DC equation for use in the next iteration of the
AC solution is P and Q at the LT bus. The following are the details of the calculations.
Since an equivalent HT bus is used, there is no need for a transformer tap ratio in the DC
equations.

Reference 14 uses the above approach.

4.5 Inclusion of Converter Station Losses:-

The DC system equations used so far did not consider converter station losses. There are
several losses associated with the converter station such as those of converter
transformer, filters, valves and valve auxiliaries and smoothing reactors. The transformer
copper loss may be represented by a series resistance, while other ac side losses are
neglected. Inclusion of this resistance in the commutation overlap equation, however,
results in considerable complexity in the converter equations; this is not usually justified.

The losses associated with valves and their auxiliaries may be combined with the
smoothing reactor and explicitly represented as equivalent series resistance (Req) on the
DC side. There is also a small valve forward voltage drop (Vdrop) due to arc drop in
mercury arc valves or forward voltage drop in thyristors. There effects may be included
by modifying the converter equations as follows:
Vd = Vdo cosα – Rc Id – Req Ic – Vdrop

47
where
Rc = Equivalent commutating resistance = (3/π).Xc
Req = Equivalent resistance representing the losses in the valve and auxiliaries
Vdrop = voltage drop across the valve
The above equation is applicable to a rectifier as well as an inverter. However, for
inverter calculations we prefer to write the equations in terms of γ:

Vd = Vdo cosγ ─RcId + Req.Id + Vdrop

Figure 4.6 shows the corresponding equivalent circuits. These modifications to the
original equations present little complexity and easy to incorporate.

Rc Req Vdrop

Id

Vd

Fig.4.6 Rectifier

Vdrop
Req ─Rc

Id
Vd

Fig.4.7 Inverter

48
The effect of neglecting losses is to introduce a small error in the computed value of
active power and a relatively significant error in the value of reactive power [13].These
effects could be important for the case of back to back links.

4.6 INCORPORATION OF THE PROBLEM IN THE NEWTON‟S

METHOD
The operating state of the combined power system is defined by the vector
[ V ,  ,X ]
Where
V is a vector of the voltage magnitude at all ac system bus bar
 is a vector of the angles at all ac system bus bars (except the swing bus which has
been assigned  = 0)
X is a vector of DC variables.

The development of the Newton – Raphson based algorithm requires the formulation of n
independent equations in terms of n variables.
Since [D] = [J] . [C] (4.6.1)
For pure AC system buses the difference equations are :-
Psp – Pcalc. = 0 ; (4.6.2)
Qsp – Qcalc. = 0 ; (4.6.3)
For buses at which converter terminals are connected the difference equations are
Pterm (sp) – Pterm(dc) – Pterm(ac) = 0 (4.6.4)
(sp)
Qterm – Qterm(dc) – Qterm(ac) = 0 (4.6.5)
Where
Pterm(ac) is the injected power at the terminal bus bar as function of the AC system
variables.
Pterm(dc) is the injected power at the terminal bus bar as a function of the d.c. system
variables.
Pterm(sp) is the usual ac system load at the terminal bus bar.
Similarly for Qterm(ac), Qterm(dc), Qterm(sp).
Here Pterm(dc) = ƒ( Vterm , X) (4.6.6)
Qterm(dc) = ƒ( Vterm , X) (4.6.7)
The equations derived from the specified a.c. system conditions may therefore be
summarized as :-

ΔP(V,)
ΔPterm(V,,x)Ξ = 0; (4.6.8)
ΔQterm(V,,x)
ΔQterm(V,,x)

A further set of independent equations are derived from the DC system conditions:-
R(Vterm,X)k = 0, (4.6.9)
k stands for number of converters present.

49
The dc system equations (4.6.6), (4.6.7), (4.6.8) are made independent of the AC system
angle  by selecting a separate angle reference for the dc system variables. This improves
the algorithmic performance by effectively decoupling the angle dependence of ac and dc
systems.The general ac-dc load flow problem may therefore be summarized as the
solution of :-

ΔP(V,)
ΔPterm(V,,X)
ΔQ(V,) = 0; (4.6.10)
ΔQterm(V,,X)
R(Vterm,X)

Here ―term‖ refers to the converter ac terminal bus bar.

4.7 MODELLING OF DC LINKS FOR MULTI-TERMINAL

SYSTEM

The formulation of power flow equation developed above applies to a two terminal DC
system. The method can be readily extended to multi terminal system.

4.7.1 DC Networks

The DC Networks consists of DC links, smoothing reactors and converters can be viewed
as a resistive network excited by current or voltage source in steady-state. Depending on
the series or shunt connection of converters, it may be appropriate to consider loop
resistance or nodal conductance matrix. The converters are not ideal sources, but are
described by the converters and controller equations.

In general, the elements of the DC networks can be separated into tree branches and
links. In radial DC networks, there is no loss of generality in assuming that all the
resistances form a subset of tree branches. The converters can be divided into either tree
branches or links. The equations describing the DC networks are:
─ [g] vg = ig (4.7.1)
ig = ─BLg IdL (4.7.2)
idT = ─BLT IdL (4.7.3)
t t
VdL = B Lg Vg + B Lg .VdT
= BtLg [g]-1 BLg IdL + BtLg .VdT (4.7.4)

where [g] is the matrix of the element conductances (diagonal), Vg and ig are the voltage
and current vectors corresponding to conductances. IdL and IdT are the currents through
the converters that are included in the links and the tree respectively. VdL and VdT are the
corresponding converter voltages. BLg and BLT are the components of the fundamental
cutest matrix.
NOTE: The convention shown here is that the voltage across an element is the voltage
rise (in the direction of the current). This explains the negative signs in Eq. (4.7.1). Also

50
it is assumed that the current direction in a converter is such that it is always positive (the
current can not be reversed in a converter, only the voltages can be reversed). The voltage
is positive across a rectifier and negative across a inverter. This is considered to be more
flexible as it covers both series and parallel connected systems.

AN EXAMPLE: If the converters are all connected in parallel and there is no ground
connections, Eqs. (1) to (4) can be written in the nodal reference frame given below
[G] ΔVd = [S] Id (4.7.5)
Sj .Vdj = ΔVdj + VdN SN (4.7.6)
N-1
SN IdN = ─∑ Sj Idj (4.7.7)
j=1

Where [G] is a (n-1) * (n-1) nodal conductance matrix, Vdj is the voltage across the jth
converter (with respect to ground). VdN and IdN are the voltage and current in the last
(Nth) converter. The conductance matrix [G] in non-singular and is formed by taking bus
N as reference. [S] is a diagonal matrix with element Sj . Sj is equal to +1 for a rectifier
and ─1 for a inverter.

In general, the network constraints (Kirchoff‘s Laws) results in the following N equations
for the N converter DC system
L1 (Id,Vd) = 0 (4.7.8)
L2 (Id) = 0 (4.7.9)
where Id and Vd are N dimensional vectors of converter currents and voltages. L1 and L2
are linear relations which express the network constraints (3) and (4) respectively. There
are N equations in converter currents and voltages expressed by (8) and (9).

4.7.2 DC CONVERTER

It is assumed that N converters can be put into m groups such that for all the converters in
a group, the AC converter bus is identical. Normally, all the converters in a station can be
grouped together. The number of converters in the ith group is ni. It is obvious that
m
∑ ni = N (4.7.10)
i=1

Converter equations remain the same.

4.7.3 CONTROLLER EQUATIONS

At each converter, the angle (α or γ) and the transformer tap (T) can be controlled directly
within limits to achieve
 Current control
 DC voltage control
 Power control or
 Control of reactive power.

51
Generally the angle control is continuous while the tap changer control (which is
mechanically operated) is discrete. Theoretically, if the tap are continuous and unlimited,
it is possible to control (in steady state) the current/power or voltage/ reactive power with
the tap changer control alone. In a two terminal DC system, the tap changer at the
inverter controls the delay angle. The discrete nature of the controller results in the delay
angle or DC voltage lying within narrow bounds rather than at fixed values.

The limits on the control variables, α (or γ) and T must be considered when specifying Id,
Pd or Vd and Qd. Also it is necessary to consider current limits in a converter when
subjected to voltage control. The existence of limits on control and the dependent
variables can require rescheduling of power (or current) and voltage. Sometimes, it may
be even necessary to consider mode shift (the changes in the voltage setting terminal due
to disturbances in the AC system) where the voltage setting terminal shifts from the one
converter to the other. Handling all these variations can be complex task in the load flow
analysis of DC systems with many terminals.

At a station, the converters may be series (or parallel) connected and are fed from the
same AC bus. In such cases, it is appropriate to specify the total power at the station.
Although, usually each converter in a station carries the same power, it is possible to
have a station where the power is shared unequally by different converters. In such cases,
the converter control will be used to establish a certain proportion among voltage or
current in series or parallel connected converter of a station. This will result in the control
equations of the following type:
Fdj = Cj Fdσ (4.7.11)
nσ
∑ Cj = 1 (4.7.12)
j=1
where Fd stands for DC voltage (or current) in series (or parallel) connected converters in
a station.

If the N converter DC system is connected to the AC system at m stations (buses), it is

obvious that the power can be specified only at (m-1) station at the most.

It is possible to have one of the control variable can be specified. Sometimes, instead of
specifying the angle current (or power) controlled converters, it is usual to specify a
voltage margin (of usually 3%) In this case, the following equation applies:
Vdj = 0.97 [ ( Kj Eσ cos θjmin /Tj) – Rcj Idj ] (19)
where θj = αj or γj depending on whether jth converter is a rectifier or inverter.

52
 CHAPTER 5
AC-DC Load-flow Solution Techniques
5.1 GENERAL
The solution methodology for ac-dc power can be classified as:-

5.1.1. Simultaneous or unified

This method gives due recognition to the interdependence of ac and dc system

equations and simultaneously solve the complete system. Conceptually, the simplest
implementation of this approach is to consider all the equations (for DC and AC
systems) combined into one set of nonlinear algebraic equations. A Jacobian matrix is
then constructed and Newton's method is used to solve this set of equations. A
variation of this approach is to use ―fast decoupled " method of solution for the AC
system equations.Following commonly used methodologies are available in the
literature:-
 Duane A. Braunagel‘s Approach [15].
 J. Arrillaga‘s Approach [16].
 R.M. Mathur‘s Approach [17].

5.2.2. Sequential or alternating

The sequential method results from a further simplification of the unified method, i.e. the
AC system equations are solved with the DC system modelled simply as real and reactive
power injections at the appropriate terminal bus bar. For a DC solution the AC system is
modelled simply as a constant voltage at the converter AC terminal bus bar. The
following commonly used methodologies are available in the literature:-
 J.Reeve‘s Approach [18].
 C.M. Ong‘s Approach.[19]

One is the sequential solution approach in which the AC and DC equation are solved
separately at each iteration. The other is unified solution approach in which AC and DC
system are combined and solved as one set of equation during each iteration.

5.2 Review of Solution Techniques available in the literature:

5.2.1 Braunagel‟s Approach

Till this paper, although methods for ac-dc solution were available but they were based
on sequential approach. In this paper a per unit system for DC equations was presented so
as to make them compatible with the AC equations. As a result of this it became possible
to solve ac-dc equations simultaneously rather than serially. The method can be applied
to multi-terminal DC networks as well as two terminal DC lines.
EQUATIONS FOR AC-DC CONVERTER
The basic converter equations used in this paper are described below. As listed below,
these equations are valid only for a single bridge converter and are not in per unit form.

53
These equations are based on the previously listed assumptions and use the symbols
defined at the end. Power leaving the bus is defined as positive. Assume T=1.

Id = 3 Em [cos() - cos(+)]
2Xt
Vd= Vb- Vn = 32 E [cos() + cos(+)]
2
Iac = Ia – jIr
Ia = 3 Em sin()sin(2+)
22 Xt
Ir = 3 Em [ - sin()sin(2+)]
22 Xt

In a more convenient form,

Ia = 3 E [cos(2) - cos(2+2)]
4Xt
Ir = 3 E [2+ sin(2) - sin(2+2)]
4Xt

The power relationships are as follows:

Sac = Pac + jQac = 3.E. I*ac

Pb = -VbId
Pn = VnId
Pac + Pb + Pn = 0

Id

Iac Xt
Vd Vb

Sac T:1

Vac‘‘
Vac

Vn

54
In order to mesh the AC and DC equations directly into the Newton power flow, the
converter equations must be expressed in a per unit system that is compatible with the
AC per unit system . Both AC and DC per unit systems are listed below.

AC PER UNIT SYSTEM

VAbase = VA3

Ebase = E1-g

Ibase = VAbase/ 3Ebase

Zbase = Ebase/ Ibase

DC PER UNIT SYSTEM

VAbase = VAac base

Ebase = E1-g = KEac base

Ibase = VAbase/ Ebase= 3Iac base / K

Zbase = Ebase/ Ibase= K2Zac base/ 3

Note that the constant K may differ for each converter. For DC systems with negative
polarity, K will also be negative. The DC voltage base must remain unchanged within a
DC network, but each separate network may have a different base.

Before putting the converter equations into per unit form, consider the effect of multiple
converter bridges and an off-nominal tap ratio on the transformer modelled within the
converter. The bridges of a converter are connected in parallel on the AC side and in
series on the DC side. If the primed quantities indicate values for only one bridge, then
for multiple bridges
For DC
Vd = BVd‘
Id = Id‘

For AC
E = E‘
Iac = BIac‘

If E‖ is the AC voltage on the DC side of the transformer, then E‖ =E/T. To include the
effects of an off-nominal transformer ratio, substitute E/T for E in the previous equations.

E/E‖ = T/1

55
The converter equations in per unit are listed below. Xt is the per unit reactance of the
transformer on the AC base. For the remainder of this discussion, all quantities are
expressed in per unit.

Id = KE [cos() - cos(+)]
6TXt

Vd = 36BE [cos() + cos(+)]

2KT

Vb = Vd + Vn

Pac + jQac = E I*ac

Pdc = VdcIdc

Pac = 3BE2 [cos(2) - cos(2+2)]

4T2Xt

Qac = 3BE2 [2 + sin(2) - sin(2+2)]

4T2Xt

Pb = ─VbId

= ─3BE2 [cos(2) - cos(2+2)] ─ VnKE [cos() - cos(+)]

4T2Xt 6TXt

Pn = VnId

Pac = VdId

IMPLEMENTATION OF DC EQUATIONS

Each converter will add three equations and variables to the Jacobian. Mathematically,
the converter equations can be arranged to maintain a constant
(A) DC voltage at Vb or
(B) DC current through the converter Id, or
(C) AC watts delivered to the DC system Pac, or
(D) AC vars consumed in the converter Qac.

The last option is not practical for physical reasons. Hence, we will not discuss it further
in this paper. For each type of converter control, there are two possible modes of control:
1)  variable,  variable
2)  variable,  variable, while maintaining a minimum extinction angle.

56
The set of DC variables has been chosen as
X = { α, μ, T, V}
The set of AC system variables are
{ E, δ}

The various possibilities of modelling the control for a converter may prove used to the
planner when running power flow. For example, while some converters are normally
current controlled, the current setting is often adjusted to maintain a constant power flow.
With these control equations, the planner can specify the desired power flow.

Associated with each converter there is an additional transformer equation. The purpose
of the variable tap transformer is to alter the AC voltage going into the valves of the
converter. If this were not done, there would be no guarantee that there is a feasible
interface between the AC-DC systems. Changing the firing and commutation angle
changes both the DC current and voltage, however there are constraints on both of these
quantities. By introducing a transformer into the converter model, the AC voltage can be
altered to allow the voltage and current constraints to be matched simultaneously.

DC lines and buses are handled in power flow in much the same manner as quantities,
with a few restrictions. A line can have resistance only as a line shunt parameter. A DC
bus has plus or minus voltage magnitude with no associated phase angle. A DC bus may
have only watts as generation and load, and resistance only as bus shunt element. Each
DC bus introduces into the Jacobian one equation, Pdc and one variable, Vdc.

The neutral bus, Vn, is handled like any other DC bus. If the positive and negative DC
systems are unbalanced, the current will flow in the neutral system. This current flow will
affect the voltage of the positive and negative DC systems. The resistance between
neutral buses, whether due to line or ground return, is modelled in the power flow as a
line. Any one or all the neutral buses may be connected directly to the ground. The
neutral buses that solidly grounded are designated as system swing buses with a voltage
magnitude of zero. The power flow program has the ability of handling 25 swing buses,
AC or DC.

When all the converters in a DC network are controlling the DC current, the algebraic
sum of all the currents into the systems must equal to zero. If the converters are modelled
to control the AC watts, the DC network requires a ―swing‖ converter, the same reasons
that the AC system requires a swing generator. One converter must be able to supply line
losses and system wide power mismatches. If there are N converters in a DC system, at
most, N-1 converters can be controlling the power. It is our experience that atleast on DC
bus in each network should be voltage controlled. The function of this bus is to define the
reference voltage, similar to the fixed voltage of the system swing bus in the AC system.

The control on each converter can be specified independently of the other converters in
the DC system. Mathematically, the model of the converter and the associated equations
will accommodate any configuration that the user desired to consider. However in all

57
applications of the power flow, it is the responsibility of the user to define that is
reasonable.

Specific consideration must be given to the starting values assigned to the DC parameters
when first beginning the iterative processes of the Newton method. When using
previously solved values, no problem arises. However when not using previously solved
values, DC buses in the positive portions of the DC systems should have starting voltages
of +1 pu, and those in the negative portions –1 pu. Neutral buses that are not grounded
should be assigned voltages close to zero. Starting values of 1.05 have yielded
satisfactory results. The transformer tap ratio, Tp should be set to 1. The firing and
commutation angles should be given typical values, remembering that the former may be
either positive or negative.

The Jacobian consists of terms as per the following details:-

(A) Converter maintaining constant current
ΔId, ΔS, ΔR
(B) Converter maintaining constant DC voltage
ΔP, ΔR, ΔS
(C) Converter maintaining constant AC vars
ΔPac, ΔQac
(D) For DC buses
ΔPdc
Where,
S = 36BE [cos() + cos(+)] + Vn – Vb = 0
2KT
R = cos() + cos(+) ─ cos γo ─1 = 0

LIST OF SYMBOLS

Sac , Vac , Iac Complex AC power, voltage and current

Em AC voltage magnitude, l-g, peak of Vac,
E AC voltage magnitude, l-l, r.m.s. of Vac
Ia,Ir Active and reactive component of AC current flowing into the
converter,rms
Pdc,Vdc,Idc DC power, voltage and current
Vd DC voltage developed across converter
Id DC current flowing in converter
Vb DC current at ―high‖ side converter
Vn DC current at neutral side converter
Xt Transformer reactance
T Transformer tap ratio
K Ratio of AC and DC per unit voltage at the DC side of transformer
within the converter.
B Number of bridges in converter
 Firing angle of Converter
 Commutation angle of converter

58
δo Minimum extinction angle
Baci AC bus
Bdci DC bus
Pb DC power going into converter at non-neutral DC bus
Pn DC power going into converter at neutral DC bus
* Complex Conjugate

5.2.2 Arrillaga‟s Approach

D.C. PER UNIT SYSTEM

Common power and voltage base parameters are used on both sides of the converter.

Pb(dc) = Pb(ac) = Pb
Vb(dc) = Vb(ac) = Vb
Ib(ac) = Pb / √(3) * Vb
Ib(dc) = Pb/Vb

Therefore, Ib(dc) = √3 . Ib(ac) (5.2.2.1)

Now for a perfectly smooth direct current and neglecting the commutation overlap, the
rms fundamental components of the ac current is related to Id by the expression.
Is = (√6/) * Id.
Converting this into per unit and taking commutation overlap into account, this equation
becomes:-
Is (p.u.) = k * 3 * (√2/) * Id(p.u.) (5.2.2.2)
Where k is very close to unity. k ≈ 0.995

REPRESENTATION OF POWER FLOW SOLUTION

Since X = [Vd , Id , a , cosα ,Φ ],

Therefore a total of 5 equations are required.
The converter equations may be written as follows:-

Vd = k1 * a * Vterm * cosΦ (5.2.2.3.a)

Vd = k1 * a * Vterm * cosα — k2 * Id * Xc (5.2.2.3.b)
Here Xc is the commutation reactance per phase.
DC current and voltages are related by dc system configuration.
ƒ(Vd,Id) = 0 (5.2.2.3.c)
e.g. for a simple rectifier supplying a passive load is
Vd — Id * Rd = 0
The final two equations are derived from the specified control mode.

59
INCORPORATION OF CONTROL EQUATIONS:-

At each converter, the angle (α or γ), here γ is the extinction angle at the inverter
terminal, and the transformer tap, a, can be controlled directly to achieve
 Current control
 DC voltage control
 Power control
 Control of reactive power
Generally, the angle control is continuous while the tap changer control (which is
mechanically operated) is discrete. Theoretically, if the taps are continuous and
unlimited, it is possible to control (in steady state) the current/power or voltage/reactive
power with the tap changer control alone. In a two terminal DC system, the tap changer at
the inverter is normally used to control the DC voltage while the tap changer at the
rectifier is used to control the delay angle. The discrete nature of the controller results in
the delay angle or DC voltage lying within narrow bounds rather than at fixed value.
The limits on the control variables, α (or γ) and ‗a‘ must be considered when
specifying Vd , Id , Pd, and Qd . Also, it is necessary to consider current limits in a
converter when subjected to voltage control. The existence of limits on control and the
dependent variables can require rescheduling of power (or current) and voltage. Some
times, it may be necessary to consider mode shift where the voltage setting terminal shifts
from one converter to the other. Handling all these variations can be a complex task in
the load flow analysis of DC systems with many terminals.
Any function of the ten dc variables is a valid
(mathematically) controls equation so long as each equation is independent of all other
equations. In practice there are restrictions limiting the number of alternatives. Some
control strategies refer to the characteristics of power transmission, other introduce
constraints such as minimum delay or extinction angle.
Examples of some valid control specifications are:-
(i) Specified converter transformer tap.
a — asp = 0
(ii) Specified d.c. voltage.
Vd —Vdsp = 0
(iii) Specified d.c. current
Id — Idsp = 0
(iv) Specified minimum firing angle
. cos — cosmin = 0
(v) Specified d.c. power transmission
Vd Id — Pdcsp = 0
During the iterative solution procedure the uncontrolled converter
variables may go outside the prespecified limits, when this happens, the offending
variable is usually held to its limit value and an appropriate control variable is fre
The dc system may be summarized as follows:-
R(X ,Vterm) k = 0 (5.2.2.4)
where R(1) = Vd – k1.a.Vterm.cos(φ)
R(2) = Vd – k1.a. Vterm.cos α + k2 Id Xc
R(3) = ƒ(Vd,Id)

60
 R(4) = control equation
R(5) = control equation
** Vterm can be either a specified quantity or an ac system constraint.
The equations for Pdc and Qdc are
Pterm(dc) = Vterm . Ip . cos(φ) (5.2.2.5)
= Vterm . k1.a .Id. cos(φ)
or Pterm(dc) = Vd.Id (5.2.2.6)
Qterm(dc) = Vterm . Ip . sin(φ)
= Vterm . k1.a .Id. sin (φ ) (5.2.2.7)

INVERTER OPERATION:-
All the equations presented so far are equally applicable to the inverter
operation. However, during inversion it is the extinction advance angle (γ), which is the
subject of control action and not the firing angle (α). For convenience, therefore equation
R(2) of (5.2.2.4) may be written as
Vd = k1.a.Vterm.cos(γ) — Id.Rc
But if we take Id to be positive in the outward direction from the terminal then
Vd = k1.a.Vterm.cos(γ) + Id.Rc
Therefore, R(2) = Vd — k1.a.Vterm.cos(γ)— Id.Rc (5.2.2.8)
Method followed is unified solution based on the fast decoupled load flow solution.
Unified Solution :-
This method gives due recognition to the interdependence of ac and
dc system equations and simultaneously solve the complete system. Conceptually, the
simplest implementation of this approach is to consider all the equations (for DC and AC
systems) combined into one set of nonlinear algebraic equations. A Jacobian matrix is
then constructed and Newton's method is used to solve this set of equations. A variation
of this approach is to use ―fast decoupled " method of solution for the AC system
equations. Here the Jacobian matrix is approximated and at each step, the following
equation is solved:-

The standard Newton–Raphson algorithm involves repeat solution of the matrix

equations.

P(V,) 
Pterm(V,,x) term
Q(V,) = J V
Qterm(V,,x) Vterm
R(Vterm,x) x

Where J is the matrix of first order partial derivatives.

Pterm = Pterm sp– Pterm ( ac) – Pterm (dc)

Qterm = Qterm sp — Qterm (ac) – Qterm (dc)
and

61
 Pterm (dc) = ƒ (Vterm,X)
Qterm (dc) = ƒ (Vterm,X)

Applying the AC fast decoupled assumptions to all Jacobian elements related to the a.c.
system equations,yield

P(V,) 
Pterm(V,,x) B´ DD AA´ term
Q(V,) B´´ V
Qterm(V,,x) Bii AA´´ Vterm
R(Vterm,x)
BB´´ A x

Where all matrix elements are zero unless otherwise indicated. The matrices [B‟] and
[B‟‟] are the usual single-phase fast decoupled Jacobians and are constant in value. The
other matrices indicated vary at each iteration in the solution process.

A modification is required for the element indicated as Bii‘‘ in equation above. This
element is a function of the system variables and therefore varies at each iteration.
In the above formulation, the DC variables x are coupled to both the real and reactive
power mismatches. However, this equation may be separated to enable a block successive
iteration scheme to be used. The DC mismatches and variables can be appended to the
two fast decoupled AC equations, in which case the following two equations result:-

P/V 
B´ AA´ term
Pterm / Vterm =
A
R X

Q/V B´´ V
Qterm / Vterm
= Bii AA´´ Vterm
R BB´´ A
X

The algorithm may be further simplified by recognizing the following physical

characteristics of the AC and the DC system.

 The coupling between DC variable and the AC terminal voltage is strong.

 There is no coupling between DC mismatches and AC system angles.
 Under all practical control strategies the DC power is well constrained and this
implies that the changes in DC variables X do not greatly affect the real power
mismatches at the terminals. This coupling, embodied in matrix AA‘ is can therefore

62
be justifiably removed.

These features justifies the removal of the DC equations from above equation of ΔP
to yield a -P, QDC- block successive iteration scheme, represented by the following
two equations:-

[ΔP/V] = [B‟] [ Δθ],

Q/V B´´ V
Qterm / Vterm Bii AA´´
= Vterm
R BB´´ A
X

63
 Data input

Triangulate B‘ and B‘‘ converter busbars not used as pivots

Calculate P(a.c. system only)

Calculate Pterm (dc) and d.c. residuals (R)

Yes
Converged

No
Form d.c. jacobian matrix P=1

Forward reduction of vector /V

Solve reduced equation for Pterm and x Q=1 Yes

No
Back substitute for 

Update x and 

P=0

Calculate Q(a.c. system only) STOP

Calculate Qterm(d.c.) and dc residuals (R )

Yes
Converged

No
Q=1
Form d.c. jacobian matrix

2 3
1

64
 1 3
2

P=1
Forward reduction of vector Q/V
No

Solve reduced equation for Vterm and x

Back substitute for V

Update x and V

Q=0

Fig.5.2.2.1 Flow chart for Unified AC-DC load flow

5.2.3 Mathur‟s Approach

DC system
Simulation

For mathematical modelling usual assumptions are made.

The following equations describe a DC system:
Consider equations and residuals:-

Residuals Equations for each DC terminal

R1 Vd = Ke.E.cos - KcXcId ………………………1

R2 Vd = Ke.E.cos………………………………….2

R3 SIGN.Kd.Id.cos(+) + BEsin = 0…………….3

R4 SIGN.Kd.Id.sin(+) = BEcos ─aBV…………4

Equation 2 is obtained by equating ac and dc power at the terminal. For equations 3 and 4

Im = 6 Id

Control Equations and residuals :

65
Mode of Residuals Rc Rt
Control

Constant voltage(Vd) cossp = cos Vdsp=Vd

Constant current(Id) Idsp=Id .97KeEcosmin─.97KcXcId=Vd

Constant power(Pd) Pdsp=Pd .97KeEcosmin─.97KcXcId=Vd

Id

Vm 0o
E -Ψm
am.Ym
Is 0o

Ip Vd

am(am-1)Ym (1-am)Ym

Ip -(Ψm+Φm)

Im -(Ψm+Φm)

DC Network Equations and residuals:

For any configuration of multi-terminlal HVDC system network equations are given by

Residual Equation
-Rg G.Vd = Id

Where G is the conductance matrix

66
Residuals as identified with the above equations are obtained by R= (LHS – RHS) of the
equations.
Method of solutions

Newton‘s method is used to solve the dc system equations in the form R=A.X where R
is the residual vector, X =[Id,Vd,cos,E,,,a]T and matrix A is the dc
jacobian matrix. Some diagonal elements of the jacobian matrix can be very small or
zero. To avoid complications arising from these zero or near zero element, for the
computation of X we should either use partial pivoting in which case we have to use the
full jacobian matrix or we can use the proposed step by step solution described below, for
which we must store only the G matrix which is very small [n x n] where n is the number
of HVDC terminals] eg; for a 3 terminal dc, full jacobian is a 21x21 matrix whereas, the
conductance matrix is only 3x3. Therefore , in the proposed solution, storage requirement
is only 1/49th .
Consider a 3-terminal (terminals m,k,n) HVDC system such that
m is on dc voltage control
k is on dc current control, and
n is on dc power control

Using a step by step solution, the values of elements ΔX are calculated.

(i)Calculation of Vdm ,Idm ,Vdk ,Idk ,Vdn ,Idn

─1
ΔVdm -1 gmk gmn -R.gm – gmm .Rtm

ΔVdk 0 gkk gkn -Rgk-gkm.Rtm +Rck

ΔVdn 0 gnk gnn + -Rgn-gnmRtm +Rcn/Vdn

Pdn/V2dn

(ii)Calculation of cos and E:

(a)Constant voltage control
cos = Rc
E= (R1 + Rt –Ke.E.Rc +KcXcId)/ Kecos

(b) Constant current or constant power control

E=(-Rt+.97KcXcId+Vd)/(.97Kecosmin)
cos= (R1+Vd-KecosE+KcXcId)/Ke.E

(iii)calculation of  ,  and a:

 = (-R2-Vd+KecosE)/Ke.E.sin
 = (R3+ SIGN.Kd.cos(+)/(SIGN.Kd.Id.sin(+)-BEcos)
a = [-R4-A1. Id+A2. E-A3.(SIGN.Kd.Id.cos(+)+B.E.sin)]/B.V
where A1 = SIGN Kd sin(+)

67
 A2 = Bcos
A3 = SIGN.Kd.Id.cos(+)
At the end of each DC iteration, however, violation for the upper and lower limits of
converter transformer taps ‗a‘ and firing or extinction angles ‗‘ are corrected.
Above equations provide the elements of X vector which modify the values of
the dc variables and are used as initial values for the next iteration.

INTEGRATED AC/DC SYSTEM

Equations
For the ac system alone using the fast decoupled technique we have:-
P/V = AJ1.θ
Q/V = AJ4.V
Integration of AC and DC system yields

P/V AJ1 C PX θ

Q/V D AJ4 QX V
=
R B RV A X

These equations are solved to yield

(P/V)INT AJ1 θ

(Q/V)INT = AJ4 V

RINT A NT X

where,
(P/V)INT = (P/V)ac - (Pdcm/Vm)dc – PX.X (23)
(Q/V)INT = (Q/V)ac - (Qdcm/Vm)dc – QX.X (24)
(R-RV.AJ4 Q/V) = (A-RV.AJ4 .QX).X
-1 -1
(25)
(R-RINT) = (A-AINT) X
or
RINT = AINT. X
In the above manipulations and for storage scarcity techniques are fully exploited.

Method of Solution

The following steps are taken:

68
1. Calculate the initial values for both ac system and dc system variables.
2. Form and factorize AJ1 and AJ4 using the Bi-factorization method (9).
3. Calculate (P/V)ac ,( Q/V)ac and R.
4. Calculate RV,QX and PX.
5. Calculate X.
a) Elements of X excluding a are calculated as in the normal case of dc system
using the step by step method as outlined earlier.
b) Residual vector R4 has to be modified due to the integration of ac and dc system
as follows,
R4INT = R4 - RINT
Where RINT = RV.AJ4-1(Q/V)
= RV. V1
Zollankopr‘s method is used to calculate V1 and then by multiplying it by RV
using a sparsity technique we get RINT
c) A technique is developed using the same routine of zollankopf, which can be used
in the multoplication of two sparse matrices, to calculate AINT = RV. AJ4-1.QX.
The only effect of AINT is to modify the values of A1,A2 and A3 of equation 19.
d) A is computed from equation 19 using R4INT in place of R4 and the modified
values of A1,A2 and A3. This completes the first dc iteration. Update X.
6. Modify n elements of (P/V)ac given by step 3 and corresponding to the ac/dc bus
bars to get (P/V)INT and then use zollenkopf‘s method to solve for  according to
equation 23 . Update θ.
7. Using the update values of X and v in forming ( Q/V)INT solve for V according to
equation 24. Update V.

This completes the first iteration of the integrated ac/dc system. The pattern for
subsequent iterations is the same except that we start from step 3, since matrices AJ1 and
AJ4 are constant and need to be factorize only once at the beginning of the solution.
Convergence tests are used for the iteration system with the criteria.

Max P  p
Max Q  p for all buses

PER UNIT SYSTEM

Common power and voltage base parameters are chosen for ac and dc systems.

AC Per Unit System

(VA base)ac = MVA (3 phase power)
(V base)ac = EL(line to line) kv
3
(I base)ac = ((MVA)/3 EL) x 10 A
(Z base)ac = EL2/(MVA) Ω

DC per unit system

(VA base)dc = (MVA)

69
(V base)dc = EL
Therefore, (I base)dc = 3(I base)ac A
(Z base)dc = (Z base)ac 

Im (r.m.s. fundamental component of transformer secondary current) is related to Id by Im

= 6/Id, which is exact only if  (overlap angle) = 0, but which is true with a maximum
error of 4.3% at  = 600 and only 1.1% for <300(the normal operation range). In the
per unit system chosen above Im = KdId, Kd = 32/. In case of NB bridges connected in
series per pole,Vd, per pole according to equation 2 is Vd = (32/).NB.E.cos or Vd =
Ke.E.cos, Ke = 32/.

In case of single bridge, dc equation is

Vd = (32/).E.cos - (3/).Xc.Id, where Xc is the bridge commutation reactance. In
general case of a multibridge terminal, Xc is the equivalent commutation reactance of the
terminal and Kc remains (3/).

Notation

All equations have been written in per unit values.

Vd = direct voltage
Id = direct current
I = r.m.s. alternating current
V = ac bus voltage
Y = admittance
B = suceptance
G = Conductance matrix
A = transformer ratio
Vm = ac bus voltage at terminal m
 = for dc system control angle: for rectifiers,  for inverters; for ac system- bus
angle.
 = firing angle
 = extinction angle
 = power factor angle
E/- = r.m.s. converter transformer secondary voltage
SIGN = 1.0 for rectifier , -1.0 for inverter
P = active power
Q = Reactive power
P = active power mismatch
Q = reactive power mismatch
n = no. of dc terminals
ND = 7 x n no. of dc variables, 7 for each terminal
N = size of matrices AJ1 and AJ4
Vdm,Idm = direct voltage and current at terminal ―m‖
Pdcm,Qdcm = active and reactive power at terminal ―m‖

70
5.2.4. J.Reeve‟s Approach

This approach utilizes the sequential method for the solution of ac-dc load flow problem.
DC solution is obtained with the help of Newton‘s method. It readily interfaces with an
ac load flow program.

Terminal Configuration

The terminal equations which interface the dc system to each terminal ac bus are written
with reference to fig. 1 which shows one equivalent converter per pole.

In order to accommodate any converter configuration with possible series/parallel bridge

groups, the bridge voltage V is replaced in the equations as NsV, where Ns is the number
of bridges in series , and the commutation reactance becomes the series parallel
combination of the individual values. Multiplying by 3/ gives the equivalent
commutation resistance, Rc.

Vχ Id
θ
I ξ

▲
Vd Vbus
1:a

Pac Rg
‘

▲
1:a

Idn

Converter Terminal

71
Terminal and control Equations

The approximation I = (6/)Id simplifies the computation with an error less than 1.1%
in the normal operating range, and is within the accuracy of load flow solutions. At the
end of the solution, a more precise calculation can be made, if judged necessary.

The Newton-method Jacobian-matrix equation to be constructed and solved at each

iteration of the dc system load flow calculation has the form
F= ─ J.X (1)
where F is the jacobian vector, J is the jacobian matrix, and X is the correction vector
for the problem variables.
X = [ Vd, Id, a, cosθ, χ─ξ ]

The equation in per unit describing a terminal are listed below. Each is followed by the
corresponding row of eq. (1), whose residual term F is the numerical difference between
the right and left hand sides of the terminal equation.

At each converter:
Pdc = Pac
i.e. Vd = aVcos(-) (2a)
Fp = -Vd + Vcos(-)a + Vasin(-) (2b)

Vd = aVcos- RcId (3a)

Fv = -Vd + aVcos + Vcosa -RcId (3b)

 is the delay angle () or extinction angle () as appropriate.

For power control:

IdVd = Pset (4a)
Fcp = VdId + IdVd (4b)

For direct current control:

Id = Idset (5a)
Fcc = Id (5b)

Constant angle control (minimum or maximum ):

Cos = cosmin (6a)
F = cos (6b)

The use of cos instead of  improves the linearity of the problem.

Unlike 2-terminlal operation, a system with more than one inverting terminal must have
atleast one of them not determining dc voltage and controlled for current and power.
Frequent changes in control allocations are avoided by including the voltage margin in
such terminals. A conventional rectifying terminal on current /power control would
typically have 140   160 for a minimum  of 5-70. For typical inverter min values of

72
15-180, a similar margin for withstanding voltage fluctuations is tolerated by 210   
220. For computational purposes, the condition is described by

Vd = .97Vd(limit) (7a)
Ftc = -.97Vcosmina + .97RcId + Vd (7b)

The dc voltage at the voltage controlling terminal is maintained by tap-changing:

Vd = Vdset (8a)
Ftv = Vd (8b)

DC network equations

In parallel connected systems

Id = GVd (9a)
FG = -GVd + Id (9b)
Where G is the conductance matrix.

In series connected system, with N-1 terminals on power control , the Nth terminal
accomodates losses. The common loop current is determined from
Vdi + IR = 0 (10a)
Fs = - Vdf - RI (10b)

With voltage polarity retained. A variable ground position is permitted.

Load Flow Solution

DC system

An example of the jacobian matrix arrangement for a 4-terminal parallel-connected dc

system is shown in fig. 2. Non-zero elements are denoted by crosses. The residuals and
connections to the variable are shown adjacent to the corresponding rows.

In radials systems, the number of variables are decreased by initially eliminating the tap
buses and then the tap buses and then the tap-bus voltages are re-calculated after
convergence. An ordering routine identifies radial systems and assigns the highest
numbers to the tap buses the converter buses are located in the upper left corner of the
conductance matrix and the tap buses are eliminated using a variant of Gauss‘s column
elimination.

Compact storage of the elements of the jacobian matrix and the use of sparsity techniques
enhances computing efficiency.

73
FP1 X X X r11
FP2 X X X r12
FP3 X X X r13
FP4 X X X r14
FV1 X X X X Id1
FV2 X X X X Id2
FV3 X X X X Id3
=
FV4 X X X X Id4
FG1 X X X X a1
FG2 X X X X a2
FG3 X X X X a3
FG4 X X X X a4
FTC1 X X X v1
FTC2 X v2
FTC3 X X X v3
FTC4 X X X v4
FCP1 X X cos1
FCP2 X cos2
FCP3 X X cos3
FCP4 X X cos4

Fig. 5.2.4.1 Jacobian Matrix for 4 –Terminal Parallel System

74
 ENTER

FROM AC Yes
ITERATION UPDATE V

No

READ DATA

FORM G

INITIAL CONDITIONS
CONDITIONSCONDIT
IONS
OPERATING CONDITIONS
CONDITIONS

FORM JACOBIAN
JACOBIAN
Yes
DC
CONVERGED? PRINT
ONLY
No

SOLVE JACOBIAN STOP

JacobianJACOBIAN

UPDATE VARIABLES

Yes
1ST DC ITERATION

No

TAP LIMITS
No

COUNT=2

DC ONLY

AC ITERATION

Fig.5.2.4.2 Simplified Flow chart for DC load flow

75
SYMBOLS

a transformer turns ratio

Id direct current
Idset specified direct current
Vd direct voltage
Vg terminal neutral voltage
V alternating voltage line-to-line at the primary of a converter transformer
P active power
Pset specified dc power
Q reactive power
I alternating current
 control angle
 firing angle
 extinction angle
 voltage angle
 current angle
=- Power factor angle
Rc commutation resistance
RG resistance of ground connection
F residual vector in Netwon‘s method
G conductance matrix

Per unit system

The same power base is chosen for the ac and dc system. For the dc side a voltage base
(line-to-line) is specified and the current and impedence buses are calculated.
(Pac)base = P MW (3 phase power)
(Vac)base = V KV (line to line)
(Iac)base = P/(3 V) x 103 A
(Zac)base = (1/3) V/(Iac)base ohms
For the dc side a current base is chosen such that
(Idc)base = (/6) (Iac)base A
(Idc)base = P/((32/)(Vac)base x 103
(Vdc)base = (32/)(Vac)base x 103 KV
(Zdc)base = Vdc/(Idc)base ohms
= (32/)(6/)(Vac/(Iac)base)
= (18/2)(Zac)base

76
5.2.5 C.M. Ong‟s Approach

On the basis of this approach a program for AC-DC load flow has been developed using
MATLAB 6.5. This technique is based on sequential approach and utilizes Gauss- Seidel
iterative technique for solving the DC equations.
Basic Equations

The basic equations describing the converter with its firing angle and tap controls and the
dc networks are summarized.

Converter equations

The converter model is based on the relationship between the ripple-free average dc
quantities and the fundamental frequency ac quantities.

Based on the per unit system given in the last, the following equations can be written for
every converter terminal. For the kth converter, its dc voltage equation in terms of its tap
ak, ac voltage Vk, control angle k, commutation resistance Rck, and the dc current Idk is
Vdk = akVkcosk – RckIdk (1)

Its dc power equation is

Pdk = VdkIdk (2)

Neglecting the losses in the kth converter and its transformer and equating the
expressions for powers on the ac side and dc side, the equation obtained for its power
factor angle (k - k) is
Vdk = akVkcos(k - k) (3)

For the simple circuit representation of the converter transformer shown in fig., the
equation for the reactive power flowing from the ac bus into kth converter terminal is
Qk = Pdktan(k - k) (4)

But with the more elaborate representation of the transformer and auxiliary equipment
shown in fig. of appendix I, the real and reactive power on the ac bus side of the
transformer are no longer given by the Eqs. 2 and 4 respectively; they can, however, be
determined by the procedure outlined in appendix I, using the known values of P dk, Qk,
Idk and akVk.

Converter controls equations

A practical operating scheme for multiterminal dc system using local terminal controls is
to have the dc system voltage determined at one terminal – the voltage controlling
terminal. The other terminals are provided with scheduled power and current settings.

To keep the reactive power consumption of the converters and the losses in the snubber
circuits low, the control angles should be small. But to maintain phase control and

77
reliable commutation, a minimum control angle should be maintained. Typical values of
the minimum ignition angle min range from 50 to 70 and those of the minimum extinction
angle range from 150 to 200.

VΨ Id
θ
I ξ

▲
Vd Vbus
1:a
1:a

Pac Rg
‘

▲
1:a

Idn

Fig.5.2.5.1 Converter Terminal

In most load-flow methods, the voltage controlling terminal that is operating at the
scheduled voltage Vdsch is also assumed to operate with a certain minimum control angle
min. thus if the mth terminal is the voltage controlling terminal, its dc voltage and control
angles are
Vdm = Vdsch (5)
and m = m min
(6)

For the terminal with a scheduled current or power control, it is common practice to
coordinate the tap control with the phase control so that the terminal will operate at some
dc voltage below its own minimum ignition or extinction angle characteristic to avoid
frequent mode shift from occurring with normal ac voltage fluctuations. Typically, a 3%
voltage margin, is provided; with the average min or min given above, typical values of
the control angle  and  are 150 and 200 respectively for those dc terminals with a
scheduled current or power control. This typical voltage margin of 3% in practice can be
considered in the load-flow computation by modifying the dc voltage equations for such
terminals with a coefficient of K = 0.97.

78
Thus if the kth terminal has a scheduled current control, its dc current is equal to the
scheduled current Idksch, that is
Idk = Idksch (7)
And its dc voltage equation is
Vdk = Kk[akVkcoskmin – RckIdk] (8)

Similarly, if the kth terminal has a scheduled power control, its dc power is equal to the
scheduled power Pdksch, that is
Pdk = Pdksch (9)

And its dc voltage equation is also given by eq. 8.

DC network equations

The equations for the dc network can be formulated to suit the procedure that is used to
solve them. Since multiterminal dc networks in the near future are unlikely to have
greater than 30 buses, the present choice is the Rbus Gauss-Siedel method.

Although the algorithm is applicable to a generator bipolar network, there is no loss of

generality by considering a symmetrical m-terminal bipolar system that can be
economically represented by an equivalent m-terminal monopolar system.

If the buses are numbered so that the mth terminal is the voltage controlling terminal and
its network terminal is also the reference bus for the Rbus‘ the voltage equations for the dc
network of the equivalent m-terminal monopolar system can be written as
m-1
Vdk =  rkiIdi + Vdm‘ , k=1,…..,(m-1) (10)
i=1
Where rki‘s are the elements of the dc network Rbus with the terminal of the mth terminal
as its reference.
Note that Vdm is the dc voltage at the terminal of the voltage controlling terminal; Vdm is
equal to the scheduled voltage Vdsch of that terminal.

Method of solution

The method of solution is simple but different from those of previous ac-dc load-flow
methods.

First the voltage equation in eq. 10 are solved by using Vdm = Vd sch , Idi = Idisch for the
terminals with scheduled current settings, and Idi = Pdisch/Vdi for those with scheduled
power settings in the Gauss-Sciedel iterative procedure of the Vd‘s that start with all Vd‘s
initially set equal to Vdsch. This dc network solution establishes the value of dc current, dc
voltage and dc power at every dc terminal of the m-terminal network.

Next, the product of tap a and the ac voltage V, or aV, at every terminal is determined
individually: For the voltage controlling terminal, this is determined by substituting its
value of Vd and  from eqs. 5 and 6 and its value of Id from the dc network solution into

79
eq 1. For the other terminals with scheduled current or power control s, their aV‘s are
determined individually by substituting their values of Vd and Id from the dc network
solution and the value of K into Eq. 8. Note that at this point, the V‘s at the converter
buses are still unknown quantities.

With the knowledge of the aV‘s and Vd‘s, the power factor angles (-)‘s can now be
determined from eq.3.

With the simple transformer representation shown in fig. 1, the real and reactive powers
flowing from the ac bus to the converter terminal are given by directly eqs. 2 and 4. With
the more elaborate transformer representation of fig. 7 in Appendix I, the real and
reactive powers flowing from the ac bus have to be determined iteratively using the
known values of Pd, Q, Id and aV at that converter terminal. In any case, the real and
reactive power flowing from the ac buses to every converter terminal, or the whole dc
system, can now be obtained.

Knowing the real and reactive power flowing from the ac buses into the dc system
complete the description of all the real and reactive loads on the ac system; the ac load
flow can be determined.

The ac load flow provides the value of ac voltages at those ac buses connected to the dc
system; knowing these ac voltages V‘s, together with the aV‘s obtained previously, the
tap a of every converter transformer can be determined. And if these taps are within their
upper and lower limits, the complete ac-dc solution is obtained. However, if any of these
taps exceeds its limits, the dc system‘s voltage at the voltage controlling terminal is
normally rescheduled and the whole procedure has to be repeated.

A way of rescheduling the dc system‘s voltage has been described in J.Reeve‘s approach.
Briefly, the tap which exceeds its limit by the largest amount is first identified, say ak. If
ak is greater than amax, the scheduled dc voltage at the voltage controlling terminal is
decreased by the ratio ak/amax. And if ak is less than amin, the scheduled dc voltage is
increased by the ratio amin/ak.

Upper and lower tap limits can be separately exceeded at different terminals, for
example, when there is an unusual steep voltage gradient in the dc network. However,
this condition is not common in normal steady-state operations and has been excluded in
certain methods by stopping the computation whenever such a condition is detected.

The flowchart of the simple version of the ac-dc load flow method for ac-dc systems with
multi terminal dc networks is given in fig. 5.2.5.2.

From this description of the method of solution, many desirable features of the method
become apparent:
1. The new ac-dc method can adopt any ac load flow method for the ac solutions.
2. It is the economical method; both dc and ac solutions need only be computed once to
obtain the ac-dc solution with taps that are within their limits.

80
3. Its storage requirement for the dc solution is mainly for the Rbus Gauss-Seidel dc
network solution; this is minimal compared to that for the jacobian in most Newton‘s
method.
4. It is a simple approach to understand and to program.

Capabilities of the simple version of the method

Inspite of its simplicity, the simple version of the method has many capabilities:
It will handle general bipolar dc systems with symmetrical or asymmetrical network
configurations. We have developed our program for only monopolar networks but which
can be easily extendable to bipolar networks.

For asymmetrical network configuration, the network equations for both positive and
negative poles can be solved simultaneously by the Rbus Gauss-Sciedel iterative method
using the scheduled values of the converter terminals in both poles.

Back to back systems, and also pole-paralleling operations, with zero resistance network
connections between adjacent terminals present no problem to the Rbus formulation used.

Voltage control at a remote dc bus, or line voltage drop bias, can simply be
accommodated by rearranging the dc network equations so that the specified voltage V dv
at the remote bus appears on the right hand side of the network equations. This is
accomplished by expressing Vdv in terms of Vdm using eq. 8 and then substituting back to
eliminate Vdm; Eq. 8 becomes

m-1
Vdk =  (rki-rvi)Idi + Vdv , k=1,……m
i=1 kv

Special features added

Features such as discrete tap, distinction between scheduled voltage and angle controls,
fixed taps and extended phase controls, and converter current limits that are important for
transient stability studies of ac-dc systems can all be easily incorporated with the efficient
method of solution above to form a truly versatile ac-dc load-flow method.

The numerous but simple steps taken to incorporate these features are best described by
flowcharts. First, a simplified flowchart of the ac-dc load-flow is given in fig.5.2.5.3. A
number of blocks containing minor calculations have been added to the simple version of
the ac-dc load-flow that is given in Fig. 5.2.5.4.

Limits on the dc currents of the terminals can be conveniently applied during the Gauss-
Seidel iterative solution of the dc network equations.

For scheduled angle with discrete tap and fixed tap with extended phase control, iteration
between dc and ac solutions are required. But these are special features, which neither

81
simultaneous nor sequential solution Newton‘s methods have been shown to be capable
of providing. Besides the numerical examples will later show that for conditions
requiring these features the number of iterations between ac and dc solutions of the
method are about that taken by the established Newton‘s method to handle conditions
that the simple version of this method can solve with just one dc solution and one ac
solution.

The main steps in the dc load-flow are shown in fig.5.2.5.4. Many of these steps involve
very little computing efforts.Because the terminal with a scheduled angle control and
discrete tap can have only discrete step changes in its open-circuit voltage, its condition is
better handled by manipulating directly with its open –circuit voltage es than with its
terminal voltage Vd. Thus for the terminal with a scheduled angle control, an internal bus
with open-circuit voltage es is defined, and at the same time its commutating resistance is
incorporated into the Rbus of the dc network.

1. ENTER WITH DATA AND

4 SET INITIAL CONDITIONS
8 2. SOLVE DC NETWORK‘S
EQUATIONS FOR Vd‘s, Id‘s
5 AND Pd‘s
3. DETERMINE THE aV
PRODUCTS AND POWER
6 FACTOR ANGLES (-)‘s
4. DETERMINE REAL AND
REACTIVE POWER
7 LOADINGS OF DC SYSTEMS
AT AC BUSES
5. AC LOAD-FLOW
9
6. DETERMINE TAPS a‘s FROM
AC VOLTAGES V‘s AND aV
PRODUCTS
7. TAP LIMITS EXCEEDED?
8. RESCHDULE DC VOLTAGE
9. PRINT RESULT

fig.5.2.5.2 FLOW CHART FOR THE SIMPLE VERSION OF THE DC LOAD-

FLOW

82
 1

2
1.ENTER
5 2. DC LOAD-FLOW
3 3 AC LOAD-FLOW
4. UPPER TAP LIMIT
Yes EXCEEDED
4 5.RESCHEDULE DC
VOLTAGE
6.CONTINOUS TAP?
7.PRINT RESULT
6 Yes 7 8.FIXED TAP?
9.DERMINE NEAREST TAP
POSITIONS AND cos‘s
ASSUMING FIXED acos PRODUCTS
8 No 9 10.DETERMINE cos‘s USING UPDATE
AC VOLTAGES
11.UPDATE Q CONSUMPTIONS
12. SCHEDULED ANGLE CONTROL
10 AND DISCRETE TAP?
13.DETERMINE OPEN CIRCUIT
VOLTAGE OF TERMINAL WITH
SCHEDULED ANGLE CONTROL
11 USING THE UPDATED AC
VOLTAGES
14. AC LOAD FLOW
Yes 13 15 CHECK CONVERGENCE OF AC
12 VOLTAGES OF AC BUSES WITH DC
TERMINALS.
16. PRINT RESULT
14

15

No
16

Fig.5.2.5.3 FLOWCHART FOR THE AC-DC LOAD FLOW

83
 1
1. ENTER
2. FIRST DC LOAD FLOW?
3. READ DATA AND SET INITIAL
2
CONDITIONS
4. FORM R-BUS MATRIX
5. FIXED TAP?
3 6. SCHEDULED VOLTAGE
CONTROL?
7. DETERMINE es
4 8. SCHEDULED ANGLE CONTROL
9. IF DISCRETE TAP, SET ITS OPEN
CIRCUIT es TO CORRESPOND TO
5 6 THE SCHEDULED ANGLE AND
TAP
10. ADD RC OF SCHEDULED ANGLE
CONTROL TERMINAL TO R-BUS
8 9 10 7 11. UPDATE DC VOLTAGES
12. DETERMINE DC CURRENTS OF
SCHEDULED POWER CONTROL
TERMINALS, SET THE MAXIMUM
11 VALUES IF THESE LIMITS ARE
EXCEEDED
13. CHECK CONVERGHENCE OF DC
12 VOLTAGES
14. DETERMINE CURRENT, POWER
AND VOLTAGE OF SLACK
TERMINAL
13 15. SCHEDULED VOLTAGE
CONTROL?
16. FIXED TAP?
14 17. SET s = min AND CALCULATE aV
OF BUS ‗A‘ SLACK TERMINAL
18. DETERMINE s FROM DC
VOLTAGE EQUATION
15 19 21 19. FIXED TAP?
20. DETERMINE s FROM coss = es/Av
21. S = sch
22. FIXED TAP?
20 23. DETERMINE cos FROM DC
16
VOLTAGE EQUATION WITH
17 CURRENT, VOLTAGE AND Av
CURRENT
18 24. DETERMINE AV AND cos FOR
NON-SLACK TERMINAL
25. DETERMINE P AND Q LOADINGS
ON AC SYSTEM
22 26. RETURN

23
Fig.5.2.5.4 Flow chart for the DC load
24
Flow.

25

26
84
APPENDIX I(0f 5.2.5)
THREE WINDING TRANSFORMER REPRESENTATION

Many 3-winding converter transformers with auxiliary equipment can be represented by

the equivalent circuit given in Fig.5.2.5.5.

To determine the real and reactive power flowing from the ac bus into the transformer, a
simple load-flow of the T-network has to be solved using bus 1 as the reference bus with
a voltage magnitude aV, bus 3 as a P, Vt bus, and bus 2 as a Pd' Q‘ bus. At bus 2 the real
power Pd is the dc power obtained from the dc network solution and reactive power Q‘ is
calculated from the expression

Q‘ = Pdtan(-) – (Id/nb)2Xc (12)

V P,Q‘

aV Xp Xs
▲
1:a 1 2

Xt

Vt

Xf

Fig.5.2.5.5 Equivalent Circuit of a three winding transformer with auxiliary

equipment.

85
APPENDIX II (of 5.2.5)
GENERAL BIPOLAR NETWORK EQUATIONS

In a general bipolar system, the dc network configuration, and also the number of
converters, of the positive pole can be different from those of the negative pole. At a
terminal the dc currents of the two poles need not be the same, in fact, one of these
currents may even be zero. For such asymmetrical operation, the equation for the positive
pole dc terminal voltage at the kth terminal of the general m-terminal bipolar system is
m-1
V +
dk =  r+kiI+di – rgk(I-dk – I+dk) + V+dm + rgm(I-dm – I+dm), (13)
i=1
where r+ki
are the elements of the positive pole network Rbus matrix with the mth
terminal, the voltage controlling, chosen as reference.
The dc currents flowing into the positive pole dc network should sum to zero. Thus,
m
 I+di = 0
i=1
Similar equations can be written for the negative pole dc terminal voltage and currents.

APPENDIX III (of 5.2.5)

LIST OF SYMBOLS

V/ - ac bus voltage and phase control

I/ - r.m.s. alternating current and phase angle
a - transformer tap ratio
θ - control angle, ignition or extinction angle
e - open-circuit voltage, Vacos
Vd - direct voltage
Id - direct current
rij - (i,j)th element of the resistance bus matrix
rg - resistance of ground connection
X - reactance
Rc - equivalent commutating resistance
nb - number of series-connected bridges in a terminal
Superscripts: + for positive pole quantities
- for negative pole quantities
max for maximum value
min for minimum value
sch for scheduled value

Per Unit System

A common base power P base is chosen for both ac and dc systems.

(V base)ac = V(line to line, rms value)

(I base)ac = P base / 3(V base)ac

86
Z base ac = (V base)ac / 3(I base)ac
Choose (V base)ac = K (V base)ac
Where K= 32/ nb
Then (I base)dc = 3/K (I base)ac

(Z base)dc = K2 (Z base)ac
If P base is one converter transformer rating and Xc is the per unit commutating
reactance, the equivalent commutating resistance in per unit is given by

Rc =( / 6nb)Xc

5.3 Comparison between Unified and Sequential Algorithms and A

discussion on the Convergence Properties. :-
The overall convergence rate of ac-dc algorithms depends on the successful interaction of
the two distinct parts. The AC system equations are solved using the well behaved
constant tangent fast decoupled algorithm, whereas the DC system equations are solved
using the more powerful, but somewhat more erratic, full Newton - Raphson approach.

The powerful convergence of the Newton - Raphson process for the DC equations can
cause overall convergence difficulties. If the first DC iteration occurs before the reactive
power-voltage update then the DC variables are converged to be compatible with the
incorrect terminal voltage. This introduces an unnecessary discontinuity which may lead
to convergence difficulties in the sequential method. In the unified approach the powerful
convergence of the DC equations is dampened by the reflection of the AC mismatches
onto the changes in DC variables. This gives faster and better behaved convergence. The
solution time of the DC equations is normally small compared to the solution time of the
AC equations. The relative efficiencies of the alternative algorithms may therefore be
assessed by comparing the total number of voltage and angle updates.

In general, those schemes which acknowledge the fact that the DC variables are strongly
related to the terminal voltage give the fastest and most reliable performance. The unified
methods are the more reliable and the P, Q-DC solution is the most efficient. Of the
sequential methods, the (P, Q, DC) solution is only marginally inferior to the unified
method.

When the bus bar to which the converters are attached is voltage controlled (as is often
the case) the two approaches become virtually identical as the interaction between AC
and DC systems is much smaller.

The sequential method has the advantage of modularity in programming where these AC
and DC systems are modelled separately in different program segments. Generally, the
AC load flow program is written for large system and is well tested. The AC system
formulation is also well established. In contrast, the DC system controllers can be flexible
and undergo changes as technology is continuously improving. In such cases it is much

87
simpler to modify or update DC system models to incorporate new controllers.

However, from the computational point of view and convergence of the solution
algorithm under specific conditions, the unified method has an edge over the sequential
method.

The only computational difference between a unified and a comparable sequential

iteration is that the DC Jacobian equation for the unified method is larger. The difference
is one additional row and column for each converter present. In terms of computational
cost per iteration the corresponding unified and sequential algorithms are virtually
identical.
 In cases where the AC system is strong, both the unified and sequential
algorithms may be programmed to give fast and reliable convergence.
 If the AC system is weak the sequential algorithm is susceptible to convergence
problems. Thus, in general, the unified method is recommended due to its greater
reliability. (This observation is also left for the future work)

88
 CHAPTER 6
DISCUSSION AND SCOPE OF FUTURE WORK
This dissertation work has been performed to initiate the research work in the area of
integrated ac-dc analysis at NIT, Kurukshetra. The present work had following objectives
in mind.
 To develop programs on ac-dc load flow analysis. One program based on
sequential method utilizing FDLF and applied point to point HVDC links had
already been developed as a part of project work. Now this program has been
developed which utilizes the FDLF for ac load flow and Gauss-Seidel iterative
technique for DC load flow. This program is also based on sequential technique
and applicable to both two terminal and multi-terminal HVDC networks.
 To apply the program on some already available test systems in the literature and
verify its authenticity by comparing the results. This has been done by applying
the program on AEP 14 bus test system and results have been verified.
 To apply the program on some Indian system and performing the analysis. The
program has been applied to UPSEB – 75 bus test system and results are
presented.
 To prepare a review on the already available methodologies on ac-dc load flow.
 To prepare a detailed bibliography of papers available on ac-dc load flow in the
literature.

The work has achieved all the objectives successfully.For the future work following
objectives can be kept in mind:-

 The concept of optimal power flow can also be extended to the DC load flow
where it can be considered that the specifications for powers (and reactive
power if any) at a converter station are set by consideration of minimizing an
objective function. Assuming that the specifications are set by optimization at
a higher level (where only the AC system is considered). The solution of
power flow equations can be viewed as the solution of the following
optimization problem.
m
min J = ∑ [Wσ1 (Pσ – Pσspec)2 + Wσ2 (Qσ – Qσspec )2]
σ =1

subject to the constraints

umin < u < umax
xmin < x < xmax
g(x,u) = 0 (1)
where u is the control vector consisting of converter angles and transformer
tap, x is the vector of dependent variables such as converter currents, voltages
, line flows etc. Equation(1) represents the equality constraints which enables
one to solve for x given u.

Therotically, the optimization problem can be complex as some of the control

variables (transformer taps) are decrete. However, the solution of the

89
 optimization problem can be simplified using iterative linear or quadratic
programming technique.
 The program can be extended for three phase systems which will be useful
for integrated ac-dc analysis of unbalanced systems.
 New algorithms for ac-dc load-flow can be developed which are superior than
the available techniques in terms of speed and memory requirements.
 The program can be applied to more and more realistic systems and an impact
analysis can be performed.

90
 CHAPTER 7
Test Systems and Results
In this section, numerical examples of two test systems solved by the ac-dc load-flow
method (using C.M. Ong‘s approach) that has lot of features are given.The fast decoupled
method of Stott and Alsac has been used to solve the ac load-flow in both of these
numerical examples.

Table 7.1 gives the summary of the test cases of the two systems solved by the ac-dc
load-flow method. It gives the types and scheduled values of the controls on the converter
terminals, the size of the tap, steps, and the current limits.

System A shown in fig.7.1 is an ac-dc system similar to that used in reference [16],it is
based on AEP-14 bus ac test system[20,21]. Data of this system is provided in Table 2.
The ac interconnection between buses 2 and 5, 2 and 4, 4 and 5 have been replaced by a 3
– terminal dc system using the sams ac lines.

System B is that of UPSEB-75 bus ac test system.The data of this system is provided
(Table7.3). The ac interconnection between buses 29 and 22, 38 and 29, 38 and 22 have
been replaced by a 3-terminal dc system using the same ac lines.

First FDLF is run on the two systems and results are presented. Then, ac-dc load-flow is
run and the results are presented.

7.1 DC DATA
7.1.1 Test System A (AEP 14 bus)

C1(bus no.2) C2(bus no.5) C3(bus no.4)

Rectifier Rectifier Inverter

Case 1 P(sch.) P(sch.) V(sch.) Continuous Tap,

0.97645 0.21135 0.9800 Voltage Control

Case 2 P(sch.) P(sch.) V(sch.) Discrete Tap,

0.97645 0.21135 0.9800 (step= .015)
Voltage control
Case 3 P(sch.) P(sch.) Θ(sch.) Angle control,
0.97645 0.21135 18.0 Discret step size
= .015
Case 4 P(sch.) P(sch.) V Fixed Tap.
0.97645 0.21125 0.8751 I1(max.)= 5.0

Table 7.1

91
7.1.2 Test System B (UPSEB 75 bus)

C1(bus no.29) C2(bus no.38) C3(bus no.22)

Rectifier Inverter Inverter

Case 1 P(sch.) P(sch.) V(sch.) Continuous Tap,

0.9726 0.9396 0.9800 Voltage Control

Case 2 P(sch.) P(sch.) V(sch.) Discrete Tap,

0.9726 0.9396 0.9800 (step= .015)
Voltage control
Case 3 P(sch.) P(sch.) Θ(sch.) Angle control,
0.9726 0.9396 16.0 Discret step size
= .015
Case 4 P(sch.) P(sch.) V Fixed Tap.
0.9726 0.9396 0.98 I1(max.)= 5.0

92
 13
14

12 11

10

G
6 9
C
1 C

5 7

4 ►

2 ▲
▼

93
 Fig.7.1 AEP-14 BUS TEST SYSTEM

7.1 AC DATA

7.2.1 AEP-14 BUS DATA

BUS DATA
Bus V δ Pgen Qgen Pd Qd TYPE AC/DC
1 1.06 0 0 0 0 0 0 0
2 1.045 0 .4 0 .217 .127 1 1
3 1.010 0 0 0 .942 .190 1 0
4 1.0 0 0 0 .478 -.039 2 1
5 1.0 0 0 0 .076 .016 2 1
6 1.07 0 0 0 .112 -.075 1 0
7 1.0 0 0 0 0 0 2 0
8 1.09 0 0 0 0 0 1 0
9 1.0 0 0 0 .295 .166 2 0
10 1.0 0 0 0 .090 .058 2 0
11 1.0 0 0 0 .035 .018 2 0
12 1.0 0 0 0 .061 .016 2 0
13 1.0 0 0 0 .135 .058 2 0
14 1.0 0 0 0 .149 .050 2 0

LINE DATA
Line SN EN R X Bc TAP
1 1 2 0.01938 0.05917 0.0264 1
2 1 5 0.05403 0.22304 0.0246 1
3 2 3 0.04699 0.19797 0.0219 1
4 2 4 0.05811 0.17632 0.0187 1
5 2 5 0.05695 0.17388 0.0170 1
6 3 4 0.06701 0.17103 0.0173 1
7 4 5 0.01335 0.04211 0.0128 1
8 4 7 0.0 0.20912 0.0 0.978
9 4 9 0.0 0.55618 0.0 0.969
10 5 6 0.0 0.25202 0.0 0.932
11 6 11 0.09498 0.19890 0.0 1
12 6 12 0.12291 0.25581 0.0 1
13 6 13 0.06615 0.13027 0.0 1

94
14 7 8 0.0 0.17615 0.0 1
15 7 9 0.0 0.11001 0.0 1
16 9 10 0.03181 0.08450 0.0 1
17 9 14 0.12711 0.27038 0.0 1
18 10 11 0.08205 0.19207 0.0 1
19 12 13 0.22092 0.19988 0.0 1
20 13 14 0.17093 0.34802 0.0 1

CAPACITOR DATA
Capacitor Bus Susceptance
1 9 0.19
7.2.2 UPSEB 75 BUS SYSTEM
BUS DATA

Bus V δ Pgen Qgen Pd Qd TYPE

1 1.03 0.0 7.25 0.0 0.0 0.0 0
2 1.05 0.0 2.60 0.0 0.0 0.0 1
3 1.03 0.0 1.80 0.0 0.0 0.0 1
4 1.05 0.0 1.00 0.0 0.0 0.0 1
5 1.05 0.0 1.80 0.0 0.0 0.0 1
6 1.05 0.0 1.20 0.0 0.0 0.0 1
7 1.05 0.0 0.60 0.0 0.0 0.0 1
8 1.05 0.0 0.80 0.0 0.0 0.0 1
9 1.05 0.0 5.50 0.0 0.0 0.0 1
10 1.02 0.0 0.80 0.0 0.0 0.0 1
11 1.02 0.0 1.09 0.0 0.0 0.0 1
12 1.05 0.0 18.00 0.0 0.0 0.0 1
13 1.05 0.0 9.00 0.0 0.0 0.0 1
14 1.03 0.0 1.50 0.0 0.0 0.0 1
15 1.01 0.0 4.54 0.0 0.0 0.0 1
16 1.00 0.0 0.0 0.0 -0.5869 0.2756 2
17 1.00 0.0 0.0 0.0 0.0 0.0 2
18 1.00 0.0 0.0 0.0 0.0 0.0 2
19 1.00 0.0 0.0 0.0 0.0 0.0 2
20 1.00 0.0 0.0 0.0 1.5637 0.3393 2
21 1.00 0.0 0.0 0.0 0.0 0.0 2
22 1.00 0.0 0.0 0.0 0.0 0.0 2
23 1.00 0.0 0.0 0.0 0.0 0.0 2
24 1.00 0.0 0.0 0.0 2.2795 0.4053 2
25 1.00 0.0 0.0 0.0 2.1048 0.4343 2
26 1.00 0.0 0.0 0.0 0.0 0.0 2
27 1.00 0.0 0.0 0.0 3.0600 0.407 2
28 1.00 0.0 0.0 0.0 1.2775 0.2835 2
29 1.00 0.0 0.0 0.0 0.0 0.0 2
30 1.00 0.0 0.0 0.0 2.2646 0.4424 2
31 1.00 0.0 0.0 0.0 0.0 0.0 2

95
32 1.00 0.0 0.0 0.0 0.7811 0.1159 2
33 1.00 0.0 0.0 0.0 0.0 0.0 2
34 1.00 0.0 0.0 0.0 0.8170 0.8384 2
35 1.00 0.0 0.0 0.0 0.0 0.0 2
36 1.00 0.0 0.0 0.0 0.0 0.0 2
37 1.00 0.0 0.0 0.0 1.4428 0.4093 2
38 1.00 0.0 0.0 0.0 0.0 0.0 2

Bus V δ Pge Qgen Pd Qd TYPE

39 1.00 0.0 0.0 0.0 0.8512 0.2946 2
40 1.00 0.0 0.0 0.0 0.0 0.0 2
41 1.00 0.0 0.0 0.0 0.0 0.0 2
42 1.00 0.0 0.0 0.0 10.00 0.0 2
43 1.00 0.0 0.0 0.0 0.0 0.0 2
44 1.00 0.0 0.0 0.0 0.0 0.0 2
45 1.00 0.0 0.0 0.0 0.0 0.0 2
46 1.00 0.0 0.0 0.0 1.5632 0.8336 2
47 1.00 0.0 0.0 0.0 0.7455 0.0877 2
48 1.00 0.0 0.0 0.0 0.5083 0.1397 2
49 1.00 0.0 0.0 0.0 0.8572 0.5158 2
50 1.00 0.0 0.0 0.0 2.0210 0.7494 2
51 1.00 0.0 0.0 0.0 0.5776 0.0062 2
52 1.00 0.0 0.0 0.0 0.9827 -0.1815 2
53 1.00 0.0 0.0 0.0 0.8263 -0.0033 2
54 1.00 0.0 0.0 0.0 1.6195 0.2900 2
55 1.00 0.0 0.0 0.0 2.7423 0.3108 2
56 1.00 0.0 0.0 0.0 1.4028 0.3432 2
57 1.00 0.0 0.0 0.0 1.5278 0.1853 2
58 1.00 0.0 0.0 0.0 0.9419 0.1129 2
59 1.00 0.0 0.0 0.0 1.2189 0.1101 2
60 1.00 0.0 0.0 0.0 0.7420 0.0742 2
61 1.00 0.0 0.0 0.0 1.0650 0.0658 2
62 1.00 0.0 0.0 0.0 1.0018 0.1813 2
63 1.00 0.0 0.0 0.0 0.5801 0.0531 2
64 1.00 0.0 0.0 0.0 0.5679 0.1333 2
65 1.00 0.0 0.0 0.0 1.4784 0.1281 2
66 1.00 0.0 0.0 0.0 0.3174 0.1518 2
67 1.00 0.0 0.0 0.0 0.9643 0.1055 2
68 1.00 0.0 0.0 0.0 0.4287 0.3360 2
69 1.00 0.0 0.0 0.0 0.5594 0.3253 2
70 1.00 0.0 0.0 0.0 0.2334 0.0230 2
71 1.00 0.0 0.0 0.0 0.9173 0.2136 2
72 1.00 0.0 0.0 0.0 0.5252 0.1176 2

96
73 1.00 0.0 0.0 0.0 4.4700 0.0 2
74 1.00 0.0 0.0 0.0 2.8800 0.0 2
75 1.00 0.0 0.0 0.0 -4.440 0.0 2

LINE DATA

SN EN R X Bc TAP
19 20 0.00065 0.02604 0.00000 1.000
16 02 0.00123 0.02469 0.00000 1.000
18 03 0.00000 0.02917 0.00000 1.000
17 16 0.00065 0.02604 0.00000 1.000
17 01 0.00073 0.01460 0.00000 1.000
22 25 0.00065 0.02604 0.00000 1.000
23 24 0.00065 0.02600 0.00000 1.000
26 27 0.00065 0.02604 0.00000 1.000
28 04 0.00306 0.06135 0.00000 1.000
29 30 0.00043 0.01736 0.00000 1.000
31 05 0.00235 0.04710 0.00000 1.000
32 06 0.00514 0.10285 0.00000 1.000
33 07 0.00549 0.10978 0.00000 1.000
34 08 0.00000 0.04860 0.00000 1.000
35 09 0.00049 0.01943 0.00000 1.000
36 37 0.00065 0.02604 0.00000 1.000
38 39 0.00130 0.05208 0.00000 1.000
24 10 0.00243 0.04860 0.00000 1.000
40 11 0.00770 0.02720 0.00000 1.000
41 12 0.00016 0.00591 0.00000 1.000
42 13 0.00030 0.01199 0.00000 1.000
43 14 0.00000 0.02841 0.00000 1.000
44 15 0.00000 0.02273 0.00000 1.000
45 44 0.00056 0.02222 0.00000 1.000
16 46 0.00810 0.03880 0.28060 1.000
16 50 0.00993 0.04746 0.77286 1.000
17 19 0.00468 0.04770 1.25900 1.000
17 23 0.00785 0.07990 2.09476 1.000
23 29 0.00806 0.08169 2.13616 1.000
20 64 0.01830 0.09270 0.14780 1.000
19 26 0.00294 0.02997 0.78412 1.000
47 50 0.01093 0.05221 0.37784 1.000

97
35 41 0.00031 0.00310 0.08112 1.000
47 67 0.00662 0.03164 0.22902 1.000
24 27 0.00505 0.02416 0.17460 1.000
24 54 0.01291 0.06171 0.44654 1.000
27 51 0.01600 0.08100 0.12880 1.000
51 52 0.01550 0.07940 0.12600 1.000
25 60 0.01660 0.08430 0.13440 1.000
25 43 0.01270 0.06410 0.10440 1.000
34 54 0.01770 0.08510 0.60520 1.000
54 28 0.01060 0.05060 0.36640 1.000
28 43 0.00580 0.02900 0.04740 1.000
SN EN R X Bc TAP
28 56 0.00370 0.01780 0.06440 1.000
56 30 0.00490 0.02370 0.17180 1.000
30 57 0.00750 0.03840 0.06220 1.000
53 30 0.00679 0.03412 0.05564 1.000
53 61 0.00666 0.03390 0.05344 1.000
30 61 0.01440 0.07310 0.11700 1.000
57 58 0.00670 0.03390 0.05340 1.000
57 59 0.00583 0.02956 0.04692 1.000
59 39 0.01410 0.07180 0.11400 1.000
39 31 0.01440 0.07250 0.11800 1.000
39 33 0.00705 0.03590 0.22800 1.000
54 63 0.00990 0.05090 0.08020 1.000
55 63 0.00780 0.03980 0.06280 1.000
61 62 0.01160 0.05830 0.09500 1.000
62 32 0.00690 0.03500 0.22520 1.000
31 32 0.00050 0.00253 0.01610 1.000
35 36 0.00479 0.04880 1.27228 1.000
46 37 0.01732 0.08784 0.13964 1.000
19 36 0.00254 0.02584 0.67596 1.000
17 35 0.00051 0.00517 0.13520 1.000
20 40 0.00580 0.02940 0.18840 1.000
40 48 0.00830 0.04240 0.06680 1.000
74 41 0.00927 0.09429 0.46586 1.000
74 41 0.00833 0.08478 2.21710 1.000
74 73 0.00559 0.05686 1.48708 1.000
26 22 0.00650 0.06617 1.73042 1.000
29 22 0.00260 0.02646 0.69220 1.000
26 41 0.00823 0.08375 0.19106 1.000
48 49 0.00930 0.04750 0.07480 1.000
49 40 0.01330 0.06680 0.10840 1.000
38 29 0.00370 0.03762 0.97740 1.000
38 22 0.00325 0.03307 0.86528 1.000
18 47 0.00437 0.02552 0.18798 1.000
30 65 0.00248 0.01186 0.08588 1.000

98
41 42 0.00031 0.00310 0.08112 1.000
42 74 0.00918 0.09306 2.43360 1.000
20 66 0.01325 0.06667 0.10832 1.000
23 74 0.00015 0.00155 0.05408 1.000
24 67 0.00124 0.00593 0.04294 1.000
18 68 0.00336 0.01963 0.03716 1.000
18 71 0.01344 0.07852 0.14460 1.000
27 68 0.01344 0.07852 0.14460 1.000
27 71 0.00336 0.01963 0.03616 1.000
25 72 0.01598 0.08108 0.12872 1.000
43 58 0.01315 0.06696 0.11556 1.000
SN EN R X Bc TAP
39 31 0.01440 0.07250 0.11800 1.000
43 56 0.00499 0.02397 0.17046 1.000
55 44 0.00998 0.04794 0.34092 1.000
73 45 0.00121 0.01109 1.45630 1.000
29 75 0.00051 0.00517 0.13520 1.000
37 69 0.01212 0.06100 0.09912 1.000
70 72 0.00878 0.04430 0.07160 1.000
21 65 0.00083 0.00396 0.02862 1.000
21 30 0.00695 0.03500 0.05686 1.000

CAPACITOR DATA
Cap./Reactor Bus Susceptance
1 17 -0.90703
2 19 -0.45351
3 22 -0.45351
4 23 -0.90703
5 26 -1.47846
6 29 -0.45351
7 35 -0.45351
8 36 -0.45351
9 41 -2.02267
10 42 -0.57143
11 73 -0.45351
12 74 -2.47623

99
7.3 RESULTS

7.3.1 Result of FDLF performed on AEP-14 Bus Test System

The solution of ac FDLF is converged
AC LOAD FLOW STUDY
REPORT OF POWER FLOW CALCULATIONS
Number of iterations : 6
BUS DATA
Bus um da(deg.)
1 1.0600 0.0000
2 1.0450 -4.9773
3 1.0100 -12.7085
4 1.0191 -10.3258
5 1.0207 -8.7849
6 1.0700 -14.2249
7 1.0621 -13.3711
8 1.0900 -13.3711
9 1.0565 -14.9509
10 1.0515 -15.1084
11 1.0572 -14.7968
12 1.0552 -15.0779
13 1.0505 -15.1598
14 1.0359 -16.0420
Bus pg qg pc qc
1 2.3228 -0.1707 0.0000 0.0000
2 0.4000 0.4185 0.2170 0.1270
3 0.0000 0.2311 0.9420 0.1900
4 0.0000 0.0000 0.4780 -0.0390
5 0.0000 0.0000 0.0760 0.0160
6 0.0000 -0.0302 0.1120 -0.0750
7 0.0000 0.0000 0.0000 0.0000
8 0.0000 0.1723 0.0000 0.0000
9 0.0000 0.0000 0.2950 0.1660
10 0.0000 0.0000 0.0900 0.0580
11 0.0000 0.0000 0.0350 0.0180
12 0.0000 0.0000 0.0610 0.0160

100
13 0.0000 0.0000 0.1350 0.0580
14 0.0000 0.0000 0.1490 0.0500

LINE FLOWS
sn en p(sn,en) p(en,sn) q(sn,en) q(en,sn)
1 2 1.5672 -1.5244 -0.2037 0.2761
1 5 0.7555 -0.7279 0.0330 0.0278
2 3 0.7314 -0.7082 0.0357 0.0157
2 4 0.5613 -0.5446 -0.0254 0.0364
2 5 0.4151 -0.4061 0.0050 -0.0138
3 4 -0.2333 0.2370 0.0255 -0.0517
4 5 -0.6125 0.6176 0.1500 -0.1603
4 7 0.2812 -0.2812 -0.0930 0.1099
4 9 0.1611 -0.1611 -0.0027 0.0158
5 6 0.4408 -0.4408 0.1303 -0.0859
6 11 0.0732 -0.0726 0.0343 -0.0332
6 12 0.0777 -0.0769 0.0249 -0.0234
6 13 0.1771 -0.1750 0.0715 -0.0674
7 8 0.0000 0.0000 -0.1679 0.1723
7 9 0.2812 -0.2812 0.0580 -0.0500
9 10 0.0525 -0.0524 0.0434 -0.0431
9 14 0.0944 -0.0933 0.0369 -0.0344
10 11 -0.0378 0.0380 -0.0149 0.0152
12 13 0.0161 -0.0160 0.0074 -0.0073
13 14 0.0563 -0.0558 0.0167 -0.0156
REAL LOSSES : 0.1328
REACTIVE LOSSES : 0.0361

101
7.3.2 Result of FDLF performed on UPSEB -75 Bus System
The solution of ac FDLF is converged
AC LOAD FLOW STUDY
REPORT OF POWER FLOW CALCULATIONS
Number of iterations : 12
BUS DATA
Bus um da(deg.)
1 1.0300 0.0000
2 1.0500 -5.9358
3 1.0300 -20.2275
4 1.0500 -31.8806
5 1.0500 -28.4117
6 1.0500 -26.6789
7 1.0500 -29.6857
8 1.0500 -30.6466
9 1.0500 0.7018
10 1.0200 -23.0665
11 1.0200 -17.4991
12 1.0500 1.0044
13 1.0500 0.3900
14 1.0300 -32.8273
15 1.0100 -19.9059
16 1.0777 -9.2647
17 1.0785 -5.7331
18 1.0862 -22.9174
19 1.1178 -16.1773
20 1.0854 -19.5508
21 1.2115 -36.5454
22 1.2671 -32.0081
23 1.1881 -20.2203
24 1.1262 -25.2792
25 1.2327 -35.5574
26 1.1369 -21.3073
27 1.1225 -25.8414
28 1.1335 -35.0491
29 1.2678 -31.6434
30 1.2122 -36.0605

102
31 1.1329 -32.7106
32 1.1327 -32.8438
33 1.1591 -33.0610
34 1.0741 -32.6222
35 1.0762 -4.7568
36 1.1107 -13.6403
37 1.0900 -15.5370
38 1.2762 -32.4684
39 1.1834 -34.2132
40 1.0466 -19.6198
41 1.0740 -4.4404
42 1.0743 -5.1287
43 1.1336 -34.9189
44 1.1063 -25.2051
45 1.1912 -26.6024
46 1.0619 -13.2081
47 1.1054 -23.3108
48 1.0348 -21.2163
49 1.0261 -21.7315
50 1.0858 -18.6443
51 1.1369 -32.0084
52 1.1453 -35.6809
53 1.2020 -37.2288
54 1.1289 -33.1283
55 1.0966 -32.5825
56 1.1566 -35.7727
57 1.1803 -38.1639
58 1.1627 -38.0207
59 1.1782 -38.0803
60 1.2304 -38.0021
61 1.1921 -37.2467
62 1.1550 -35.5342
63 1.1109 -33.4531
64 1.0779 -22.1643
65 1.2110 -36.5963
66 1.0797 -20.5689
67 1.1230 -25.2035
68 1.0904 -23.8257
69 1.0712 -17.0858
70 1.2413 -38.4439
71 1.1128 -25.9384
72 1.2398 -38.0304
73 1.2136 -27.3088
74 1.1880 -19.9415
75 1.2704 -30.8307

103
Bus pg qg pc qc
1 7.4300 -3.4142 0.0000 0.0000
2 2.6000 -1.2295 0.0000 0.0000
3 1.8000 -1.9424 0.0000 0.0000
4 1.0000 -1.4490 0.0000 0.0000
5 1.8000 -1.8674 0.0000 0.0000
6 1.2000 -0.8377 0.0000 0.0000
7 0.6000 -1.0542 0.0000 0.0000
8 0.8000 -0.5071 0.0000 0.0000
9 5.5000 -1.2927 0.0000 0.0000
10 0.8000 -2.2515 0.0000 0.0000
11 1.0900 -1.2800 0.0000 0.0000
12 18.0000 -3.8857 0.0000 0.0000
13 9.0000 -1.9200 0.0000 0.0000
14 1.5000 -3.7274 0.0000 0.0000
15 4.5400 -4.0682 0.0000 0.0000
16 0.0000 0.0000 -0.5869 0.2756
17 0.0000 0.0000 0.0000 0.0000
18 0.0000 0.0000 0.0000 0.0000
19 0.0000 0.0000 0.0000 0.0000
20 0.0000 0.0000 1.5637 0.3393
21 0.0000 0.0000 0.0000 0.0000
22 0.0000 0.0000 0.0000 0.0000
23 0.0000 0.0000 0.0000 0.0000
24 0.0000 0.0000 2.2795 0.4053
25 0.0000 0.0000 2.1048 0.4343
26 0.0000 0.0000 0.0000 0.0000
27 0.0000 0.0000 3.0600 0.4070
28 0.0000 0.0000 1.2775 0.2835
29 0.0000 0.0000 0.0000 0.0000
30 0.0000 0.0000 2.2646 0.4424
31 0.0000 0.0000 0.0000 0.0000
32 0.0000 0.0000 0.7811 0.1159
33 0.0000 0.0000 0.0000 0.0000
34 0.0000 0.0000 0.8170 0.8384
35 0.0000 0.0000 0.0000 0.0000
36 0.0000 0.0000 0.0000 0.0000

104
37 0.0000 0.0000 1.4428 0.4093
38 0.0000 0.0000 0.0000 0.0000
39 0.0000 0.0000 0.8512 0.2946
40 0.0000 0.0000 0.0000 0.0000
41 0.0000 0.0000 0.0000 0.0000
42 0.0000 0.0000 10.0000 0.0000
43 0.0000 0.0000 0.0000 0.0000
44 0.0000 0.0000 0.0000 0.0000
45 0.0000 0.0000 0.0000 0.0000
46 0.0000 0.0000 1.5632 0.8336
47 0.0000 0.0000 0.7455 0.0877
48 0.0000 0.0000 0.5083 0.1397
49 0.0000 0.0000 0.8572 0.5158
50 0.0000 0.0000 2.0210 0.7494
51 0.0000 0.0000 0.5776 0.0062
52 0.0000 0.0000 0.9827 -0.1815
53 0.0000 0.0000 0.8263 -0.0033
54 0.0000 0.0000 1.6195 0.2900
55 0.0000 0.0000 2.7423 0.3108
56 0.0000 0.0000 1.4028 0.3432
57 0.0000 0.0000 1.5278 0.1853
58 0.0000 0.0000 0.9419 0.1129
59 0.0000 0.0000 1.2189 0.1101
60 0.0000 0.0000 0.7420 0.0742
61 0.0000 0.0000 1.0650 0.0658
62 0.0000 0.0000 1.0018 0.1813
63 0.0000 0.0000 0.5801 0.0531
64 0.0000 0.0000 0.5679 0.1333
65 0.0000 0.0000 1.4784 0.1281
66 0.0000 0.0000 0.3174 0.1518
67 0.0000 0.0000 0.9643 0.1055
68 0.0000 0.0000 0.4287 0.3360
69 0.0000 0.0000 0.5594 0.3253
70 0.0000 0.0000 0.2334 0.0230
71 0.0000 0.0000 0.9173 0.2136
72 0.0000 0.0000 0.5252 0.1176
73 0.0000 0.0000 4.4700 0.0000
74 0.0000 0.0000 2.8800 0.0000
75 0.0000 0.0000 -4.4400 0.0000

105
LINE FLOWS
sn en p(sn,en) p(en,sn) q(sn,en) q(en,sn)
19 20 2.7768 -2.7718 1.4047 -1.2029
16 2 -2.5908 2.6000 1.4147 -1.2295
18 3 -1.8000 1.8000 2.1353 -1.9424
17 16 2.7508 -2.7466 0.0509 0.1185
17 1 -7.3840 7.4300 4.3343 -3.4142
22 25 3.7557 -3.7488 1.6944 -1.4190
23 24 4.6107 -4.5970 2.9121 -2.3643
26 27 3.8913 -3.8834 0.6868 -0.3723
28 4 -0.9914 1.0000 1.6215 -1.4490
29 30 6.9213 -6.9038 4.1533 -3.4496
31 5 -1.7857 1.8000 2.1548 -1.8674
32 6 -1.1900 1.2000 1.0375 -0.8377
33 7 -0.5927 0.6000 1.2007 -1.0542
34 8 -0.8000 0.8000 0.5467 -0.5071
35 9 -5.4858 5.5000 1.8553 -1.2927
36 37 1.5605 -1.5588 0.8713 -0.8039
38 39 0.9395 -0.9348 2.2644 -2.0722
24 10 -0.7867 0.8000 2.5182 -2.2515
40 11 -1.0691 1.0900 1.3539 -1.2800
41 12 -17.9508 18.0000 5.7034 -3.8857
42 13 -8.9770 9.0000 2.8410 -1.9200
43 14 -1.5000 1.5000 4.1597 -3.7274
44 15 -4.5400 4.5400 4.8963 -4.0682
45 44 -1.3302 1.3393 4.6047 -4.2450
16 46 2.0454 -2.0162 -0.2442 -0.2581
16 50 3.8788 -3.7464 -1.5647 0.3888
17 19 4.4924 -4.4079 -2.3754 0.1994
17 23 3.8793 -3.7654 -3.7867 -0.4479
23 29 3.5390 -3.4600 -4.1592 -1.4891
20 64 0.5730 -0.5679 -0.1867 -0.1333
19 26 3.7030 -3.6688 -1.8849 0.2400
47 50 -1.6933 1.7254 0.3842 -1.1383
35 41 -1.9605 1.9618 0.8929 -1.0676
47 67 1.1229 -1.1123 -1.1066 0.5883
24 27 0.5273 -0.5262 -0.1549 -0.2811

106
24 54 2.7245 -2.6471 -0.9915 0.2261
27 51 1.6083 -1.5731 -0.5885 0.4377
51 52 0.9955 -0.9827 -0.4439 0.1815
25 60 0.7482 -0.7420 -0.3019 -0.0742
25 43 0.1300 -0.1002 1.7236 -1.8662
34 54 -0.0170 0.0242 -1.3851 -0.0495
54 28 0.7941 -0.7883 -0.7223 -0.1877
28 43 -0.0974 0.0974 -0.0445 -0.0770
28 56 0.5996 -0.5913 -1.6727 1.5438
56 30 -0.2532 0.2794 -2.8919 2.5363
30 57 1.5115 -1.4971 0.6456 -0.7497
53 30 -0.9050 0.9090 -0.2529 0.1108
53 61 0.0787 -0.0782 0.2562 -0.4066
30 61 0.4580 -0.4553 0.0755 -0.4002
57 58 0.0193 -0.0175 0.5354 -0.6729
57 59 -0.0500 0.0500 0.0291 -0.1594
59 39 -1.2689 1.2857 0.0493 -0.2817
39 31 -4.3068 -2.7490 -16.9656 -18.8750
39 33 -0.5866 0.5927 0.6059 -1.2007
54 63 0.2093 -0.2080 0.2558 -0.4501
55 63 0.3744 -0.3721 -0.5383 0.3970
61 62 -0.5315 0.5401 0.7411 -0.9597
62 32 -1.5419 1.5602 0.7784 -1.2749
31 32 1.1518 -1.1513 -0.1601 0.1215
35 36 3.7013 -3.6418 -2.3036 -0.1334
46 37 0.4530 -0.4472 -0.5755 0.2818
19 36 -2.0719 2.0813 -0.2859 -1.2974
17 35 -3.7385 3.7450 0.7216 -0.9699
20 40 0.3165 -0.3068 1.1466 -1.5257
40 48 0.7423 -0.7379 0.0835 -0.2059
74 41 -8.7888 6.0756 -12.3668 -16.4431
74 41 -8.6263 6.2084 -13.1753 -17.1038
74 73 3.1886 -3.1467 -2.7375 -1.1254
26 22 3.8230 -3.7244 -4.4703 0.4589
29 22 0.3864 -0.3861 -1.1135 -1.1080
26 41 -4.0455 4.1722 1.6323 -0.8104
48 49 0.2296 -0.2290 0.0662 -0.2217
49 40 -0.6282 0.6336 -0.2941 0.0883
38 29 -0.5851 0.5862 -1.2448 -1.9076
38 22 -0.3545 0.3550 -1.0197 -1.7733
18 47 0.1778 -0.1751 -1.0700 0.6347
30 65 1.1347 -1.1325 -0.2350 -0.0067
41 42 4.4173 -4.4120 -0.6330 0.4990
42 74 3.3889 -3.2863 -3.9996 -1.2036
20 66 0.3186 -0.3174 -0.0963 -0.1518
23 74 -4.3843 4.3864 0.4146 -0.5459
24 67 -0.1476 0.1480 0.5872 -0.6938

107
 18 68 0.8917 -0.8890 -0.4225 0.3501
18 71 0.7305 -0.7219 -0.6428 0.3434
27 68 -0.4549 0.4603 0.3634 -0.6861
27 71 0.1962 -0.1954 0.4715 -0.5570
25 72 0.7657 -0.7590 -0.4371 0.0780
43 58 0.9377 -0.9244 -0.7970 0.5601
39 31 -4.3068 -2.7490 -16.9656 -18.8750
43 56 0.5651 -0.5583 -1.4193 1.0050
55 44 -3.1167 3.2007 0.2275 -0.6513
73 45 -1.3233 1.3303 0.4574 -4.6046
29 75 -4.4340 4.4403 -0.3725 0.0003
37 69 0.5632 -0.5594 0.1128 -0.3253
70 72 -0.2334 0.2338 -0.0230 -0.1956
21 65 0.3460 -0.3459 0.0377 -0.1214
21 30 -0.3460 0.3466 -0.0377 -0.1264
REAL LOSSES : 1.9788
REACTIVE LOSSES : -40.3812

108
7.3.3 The results of the ac-dc load flow study using
Newton’s method, applied to point to point HVDC
transmission. Here line between bus no. 4 and 5 is replaced
by an HVDC link whose data is as follows.(Arrillaga’s
Approach.
Characteristics of DC Link

Characteristic Converter 1 Converter 2

A.C. Bus bar Bus 5 Bus 4

D.C. Voltage Base 100 kV 100 kV

Transformer 0.126 0.0728

Reactance

Commutation 0.126 0.0728

Reactance

Filter Admittance 0.478 0.629

(Bf)
DC-Link-Resistance 0.334 Ω

Control Parameters for case1

DC Link Power 58.6 MW -------

109
Rectifier Firing 7.0 -------
Angle(deg)

Inverter Extinction --------- 10.0

Angle (deg)
Inverter DC Voltage --------- —128.87 kV

AC-DC LOAD FLOW STUDY

REPORT OF POWER FLOW CALCULATIONS
Number of iterations : 9
BUS DATA
Bus um da(deg.)
1 1.0600 0.0000
2 1.0450 -5.0084
3 1.0100 -12.6711

110
 4 1.0611 -11.2164
5 1.0319 -8.7718
6 1.0700 -14.2373
7 1.0809 -14.0351
8 1.0900 -14.0351
9 1.0741 -15.5323
10 1.0660 -15.5946
11 1.0645 -15.0632
12 1.0566 -15.1191
13 1.0530 -15.2580
14 1.0471 -16.3967
Bus pg qg pc qc
1 2.3267 -0.2243 0.0000 0.0000
2 0.4000 0.1122 0.2170 0.1270
3 0.0000 -0.0200 0.9420 0.1900
4 0.0000 0.0000 0.4780 -0.0390
5 0.0000 0.0000 0.0760 0.0160
6 0.0000 -0.1497 0.1120 -0.0750
7 0.0000 0.0000 0.0000 0.0000
8 0.0000 0.0563 0.0000 0.0000
9 0.0000 0.0000 0.2950 0.1660
10 0.0000 0.0000 0.0900 0.0580
11 0.0000 0.0000 0.0350 0.0180
12 0.0000 0.0000 0.0610 0.0160
13 0.0000 0.0000 0.1350 0.0580
14 0.0000 0.0000 0.1490 0.0500
LINE FLOWS
sn en p(sn,en) p(en,sn) q(sn,en) q(en,sn)
1 2 1.5766 -1.5332 -0.2059 0.2799
1 5 0.7501 -0.7230 -0.0184 0.0763
2 3 0.7252 -0.7024 0.0363 0.0134
2 4 0.5960 -0.5737 -0.2753 0.3017
2 5 0.3949 -0.3867 -0.0557 0.0441
3 4 -0.2397 0.2462 -0.2234 0.2030
4 7 0.2758 -0.2758 0.0278 -0.0142
4 9 0.1592 -0.1592 0.0471 -0.0344
5 6 0.4477 -0.4477 0.1847 -0.1365
6 11 0.0789 -0.0784 -0.0075 0.0086
6 12 0.0773 -0.0766 0.0194 -0.0179
6 13 0.1794 -0.1774 0.0500 -0.0460
7 8 0.0000 0.0000 -0.0559 0.0563
7 9 0.2758 -0.2758 0.0700 -0.0624
9 10 0.0470 -0.0467 0.0857 -0.0850
9 14 0.0929 -0.0915 0.0642 -0.0612
10 11 -0.0432 0.0434 0.0270 -0.0266
12 13 0.0156 -0.0156 0.0019 -0.0019
13 14 0.0580 -0.0575 -0.0101 0.0112

111
 REAL LOSSES : 0.1367
REACTIVE LOSSES : -0.8104
\n\n DC DATA \n
Converter Data \n
converter no. : 1 , At Bus no.5
1.2902
0.4542
0.9772
0.9926
0.3102
pdc:
0.5860
qdc:
0.1879
Inverter Data \n
Inverter no. : 1, At Bus no. 4
1.2887
-0.4542
0.9403
0.9848
0.2793
pdc:
-0.5853
qdc:
0.1679
>>

7.3.4 AC-DC LOAD FLOW RESULTS ON AEP 14 BUS SYSTEM

Lines between bus no. 2-2, 2-5, 4-5 have been replaced by 3-terminal HVDC
transmission system.
AC-DC LOAD FLOW STUDY
REPORT OF POWER FLOW CALCULATIONS
Case 1 :- Continuous Tap, Scheduled Voltage Control
Number of AC iterations : 3.5

112
Number of DC iterations : 3
con.no. Vd Id P Q a_tap Theta V_term
1 0.9978 0.9786 0.9765 0.4244 1.0411 15.3814 1.0450
2 0.9846 0.2146 0.2114 0.0678 0.9840 15.6141 1.0508
3 0.9800 1.1933 -1.1694 0.5327 1.0213 18.0000 1.0544

Case 2 :- Discrete Tap, Scheduled Voltage Control

Number of AC iterations : 3.5,1
Number of DC iterations : 3
con.no. Vd Id P Q a_tap Theta V_term\n
1 0.9978 0.9786 0.9765 0.4343 1.0450 16.1395 1.0450
2 0.9846 0.2146 0.2114 0.0685 0.9850 15.8132 1.0507
3 0.9800 1.1933 -1.1694 0.5133 1.0150 16.8673 1.0566
>>
Case 3 :- Discrete Tap, Scheduled Angle Control
Number of AC iterations : 3.5,0,1,1,1,1
Number of DC iterations : 4,4,4
con.no. Vd Id P Q a_tap Theta V_term
1 0.9272 1.0532 0.9765 0.4315 0.9700 14.2970 1.0450
2 0.9130 0.2315 0.2114 0.0657 0.9100 14.6130 1.0510
3 0.9080 1.2847 -1.1665 0.5527 0.9550 18.0000 1.0521

Case 4 :- Fixed Tap, Scheduled Voltage Control

Number of AC iterations : 3
Number of DC iterations : 3.5,2
con.no. Vd Id P Q a_tap Theta V_term
1 0.8949 1.0911 0.9765 0.5887 1.0000 24.3531 1.0450
2 0.8803 0.2401 0.2114 0.1355 1.0000 31.3533 1.0431
3 0.8751 1.3312 -1.1649 0.7528 1.0000 27.4733 1.0293

7.3.5 AC-DC LOAD FLOW RESULTS ON UPSEB 75 BUS SYSTEM

Lines between bus no. 29-22, 38-29, 38-22 have been replaced by 3-terminal HVDC
transmission system.
AC-DC LOAD FLOW STUDY
REPORT OF POWER FLOW CALCULATIONS
Case 1 :- Continuous Tap, Scheduled Voltage Control
Number of AC iterations : 5

113
Number of DC iterations : 2
con.no. Vd Id P Q a_tap Theta V_term
1 0.9806 0.9919 0.9726 0.4209 0.9449 15.3856 1.1308
2 0.9794 0.9594 -0.9396 0.4810 1.0530 20.9758 1.0448
3 0.9800 1.9513 -1.9123 1.0620 1.0359 16.0000 1.0821
>>
Case 2 :- Discrete Tap, Scheduled Voltage Control
Number of AC iterations : 5,1.5,1.5,1.5,1.5,1.5
Number of DC iterations : 2,2,2
con.no. Vd Id P Q a_tap Theta V_term
1 0.9806 0.9919 0.9726 0.4070 0.9400 14.2720 1.1313
2 0.9794 0.9594 -0.9396 0.4962 1.0600 21.9390 1.0437
3 0.9800 1.9513 -1.9123 1.0363 1.0300 14.8199 1.0836
>>

Case 3 :- Discrete Tap, Scheduled Angle Control

Number of AC iterations : 5,1.5,1.5,1.5,1.5,1.5
Number of DC iterations : 1,1,1

con.no. Vd Id P Q a_tap Theta V_term

1 0.9632 1.0097 0.9726 0.4099 0.9250 14.1149 1.1306
2 0.9620 0.9767 -0.9396 0.4702 1.0300 20.0026 1.0457
3 0.8634 1.9864 -1.7150 1.0081 0.9250 16.0000 1.0828
>>

Case 4 :- Fixed Tap, Scheduled Voltage Control

Number of AC iterations : 5,3,3,3,3,3.
Number of DC iterations : 2,2,2.

con.no. Vd Id P Q a_tap Theta V_term

1 0.9806 0.9919 0.9726 0.5807 1.0000 25.5732 1.1267
2 0.9794 0.9594 -0.9396 0.4188 1.0000 16.6432 1.0495
3 0.9800 1.9513 -1.9123 0.9418 1.0000 9.4583 1.0880
>>

References and Bibliography

1. B. Stott, ‗Review of load flow calculation methods‟, Proc. IEEE, vol.62, pp.916-
929, 1974.

2. „Power System Restructuring and Deregulation‟ Book Edited by L.L.Lie, John

Willey & Sons.

114
3. ‗Computer Methods in Power System Analysis‟, by G.W.Stagg and A.H. El-
Abiad, McGraw Hill,1968.

4. 'Computer Modelling of Electrical Power system ', by J.Arrillaga, Arnold C.P.

and Harker B.J., " John Wiley and Sons ". 1983

5. E.W.Kimbark, Direct Current Transmission, Wiley-Interscience, 1971.

6. C.Adamson and N.G.hingorani, High Voltage Direct Current Power

Transmission, Garraway Limited, London, 1960.

7. E.Uhlmann, Power Transmission by Direct Current, Springer-Verlag, 1975

8. J.Arrillaga, High Voltage direct Current Transmission, IEE Power Engineering

Series 6, Peter Peregrinus Ltd., 1983.

9. 'HVDC Power Transmission Systems', by K.R. Padiyar, New Age International

(P) Limited.

10. R.Forest , Heyner, G.Kangiesser, K.W. and Waldmann H,‟Multi-terminal

operation of HVDC converter stations‘, IEEE Trans. on Power apparatus and
systems, Vol. PAS-88, No. 7, pp 1042-50, July 1969.

11. F.Nozari, Grund C.E. and Hauth R.L,.‘Current order coordination in multi-
terminal DC system‘, IEEE Trans. on Power apparatus and systems, Vol. PAS-
100, pp 4628-35, Nov. 1981.

12. T.Sakurai, Goto, K.Irokawa, S.Imai K. and Sakai T. „ A new control method for
multiterminal HVDC transmission systems‘, IEEE Trans. on Power apparatus
and systems, Vol. PAS-102, pp 1140-50, May 1978.

13. B.K.Johnson, F.P.DeMello, nad J.M. Undrill, ―Comparing Fundamental

Frequency and Differencial Equation Representation of AC/DC,‖ IEEE
Trans. on Power apparatus and systems,Vol. PAS-101, pp. 3379-3384, September
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14. G.D. Breuer, J.F. Luini, and C.C. Young, ―Studies of Large AC/DC Systems on
the Digital Computer,‖ IEEE Trans. on Power apparatus and systems, , Vol.
PAS-85, pp. 1107-1115, November 1966.
15. D.A.Braunagel, L.A.Kraft and J.L.Whysong,‖Inclusion of dc converter and
transmission equations directly in a Newton power flow,‖ IEEE Trans. Power
Apparatus and Systems, Vol. PAS, No. 1, 1976, pp. 76-88.

16. M..M. El-Marsafawy and R.M.Mathur, ―A new, fast technique for load-flow
solution of integrated multi-terminal dc/ac systems,‖ IEEE Trans. Power
Apparatus and Systems, Vol. PAS-99, No. 1, 1980, pp. 246-253.

115
17. J. Arrillaga and Bodger P., ‗Integration of HVDC links with fast decoupled
load flow solutions‘ Proc.IEE, vol.124, pp.463-468, 1977.

18. J.Reeve, G.Fahmy and B.Scott,‖Versatile load flow method for multiterminal
HVDC systems,‖ IEEE Trans. Power Apparatus and Systems, Vol. PAS-96, No.
3, 1977, pp. 925-933.

19. C.M.Ong and Fudeh M.,‟A simple and efficient AC-DC load flow method for
multi-terminal hvdc systems‘, IEEE Trans. on Power apparatus and systems,
Vol. PAS-100,pp. 4389-96,1981

20. IEEE Computer Applications Sub-Committee Standard Test Systems,

American Electric Power Service Corporation, 1962

21. J. Arrillaga and Sato H., 21.‗Improve load flow technique for integrated AC-
DC systems‘, proc. IEEE, vol.116,pp.525-532, 1969.

Other papers on AC-DC LOAD FLOW

22. J.Arrillaga and P.Bodger, ―AC-DC load-flow with realistic representation of

the converter plant,”Proc. IEE, Vol. 125, No. 1, 1978, pp. 41-46.

23. 23.G. B. Sheble and Heydt, G. T., ‗Power flow studies for systems with HVDC
Transmission‘ PICA conf. proceedings, pp.223-228, 1975.

24. K.R. Padiyar and Sachchidanand, ‗Load flow analysis of multi terminal
HVDC/AC systems‘, IFAC Symposium on theory and applications of digital
control, New Delhi, pp. 595-599, January. 1982.

25. C.M.Ong and Fudeh H.,‟AC power flow control with a multi-terminal hvdc
system‟,IEEE Trans. Vol. PAS-100,pp. 4686-91,1981.

26. J. Mahserdjian, Lefebvre S. and Mukhedkar D.,‘ A multiterminal HVDC load

flow with flexible control specifications‟,IEEE Trans. Vol. PWRD-1,pp.272-
282,1986.

27. F.L.Alvarado, et al.‘ An integrated approach to multiterminal HVDC power

flow studies‘, Int. Conf. on DC Power Transmission, Montreal, pp. 16-22, 1984.
28. W.K. Marshall, Padiyar K.R., Denton L.M., Smolinski W.J. and Hill E.F. ‗ A
simplified HVDC link representation for stability studies‟, C 74-434-7, Paper
presented at IEEE Summer Power Meeting, 1974.

29. G.B.Sheble and G.T.Heydt, “Power flow studies for systems with HVDC
transmission,” Proc.Power Industry Computer Applications, 1975, pp. 223-228.

116
30. C.M.Ong and A.Hamzei-nejad, ―A general-purpose multiterminal dcload-
flow,” IEEE 1981 Winter Meeting, Paper 81 WM 0207

31. F.Nishimura, A.Watanabe, N.Fujii and F.Ogata, “Constant power factor control
system for hvdc transmission,” IEEE Trans. Power Apparatus and Systems,
Vol. PAS-95, No. 6, pp. 1845-1853.

Multi-Terminal HVDC Systems.

32. J.Hegi, M.Bahrman, G.Scott, and G.Liss, “Control of the Quebec-New England
Multiterminal HVDC System,” CIGRE Paper 14-04, Paris 1988.

33. R.Forest , Heyner, G.Kangiesser, K.W. and Waldmann, H.‟Multiterminal

operation of HVDC converter stations‟, IEEE Trans. on Power apparatus and
systems, Vol. PAS-88, No. 7, pp 1042-50, July 1969.

34. K.W.Kaingiesser, Bowles J.P. Ekstrom A., Reeve, J., and Rumpf, E. ‗HVDC
Multiterminal Systems‟, CIGRE 14-08, 1974.

35. J.Reeve, „ Multiterminal HVDC Power Systems‟, IEEE Trans. on Power

apparatus and systems, Vol. PAS-99, No. 2, pp 729-37, March/April 1980.

36. R.Joetten, Bowles, J.P., Liss, G.Martin C.J.B. and Rumpf E. ‗Control in HVDC
Systems-The state of the Art‟, Part II: Multiterminal Systems, CIGRE 14-
07,1980.

37. I.Ishikawa, Machida T., Watanabe A., Konishi H. and Murai K. ‗Development of
centralized control system for multiterminal HVDC transmission systems‟,
IEEE PES Winter meeting, A78-122-4, 1978.

38. T.Sakurai, Goto, K.Irokawa, S.Imai K. and Sakai T. ‗ A new control method for
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40. P.C.S. Krishnayya, Lefebvre, S.Sood V.K. and Balu, N. J. ‗Simulator study of
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IEEE Trans. on Power apparatus and systems, Vol. PAS-103, pp 3125-32, Oct.
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117
 42. W.F.Long, Reeve, J.McNichol, J.R. ,Harrison R.E. and Bowles J.P.
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43. M.Ishikawa, Horinchi S., Irokawa S., Imai K. Hirsoe S. and Sekiya K. ‗Simulator
study of multiterminal HVDC transmission systems without fast
communication‟, IEEE Trans. Vol. PWRD-1, No. 3, pp 218-227, July 1986.

Other References.

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45. B.J. Cory (editor), High Voltage Direct Current Converters and systems,
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PROGRAM
%%%%%%%%%%%%%%PROGRAM FOR AC_DC LOAD FLOW%%%%%%%%%%%%%%%%%
%%%%%% The Program is versatile and applicable to Multi-terminal HVDC
%%%%%% links.
%%%%%%% SEQUENTIAL APPROACH %%%%%%%%%%%%%
% DATE PROGRAMMER REVISION
% ------ ------------- -----------
% 24-1-2004 SANJEEV KUMAR AGGARWAL _
% e_mail == vasusanjeev@yahoo.co.in
%

118
clear;
j = sqrt(-1) ; convs = pi/180 ; conv_fact = pi/180;
%%%% First enter AC data.
%%n = input('Enter the number of buses:\n');
n =75 %% Enter the number of buses

epsp = .001;%%The convergence criterion for P-mismatch

epsq = .001;%%The convergence criterion for Q-mismatch

%%nl_ac = input('Enter the number of ac lines:\n');

nl_ac = 97 %% The number of ac lines.

%%ncap = input('Enter the number of capacitors:\n');

ncap = 12 %%% The number of capacitors or reactors
maxit = 20 %%The maximum number of iterations
%%% AC bus data entry
[ibus,uum,uua,ppg,qqg,ppc,qqc,typ_ac] = ...
textread('upseb1.dat','%d%f%f%f%f%f%f%d');
%%%typ_ac = 0 slack bus %%% typ_dc = 0 ac bus
%%%typ_ac = 1 generator bus %%% typ_dc = 1 dc terminal
%%%typ_ac = 2 load bus
%Compeletion of AC Bus Data entering
npu = 0; npq = 0;
%%% npu = no.of generator buses.
%%% npq = no. of load buses.
%assigning appropriate index to each ac bus
for jj = 1:n
switch(typ_ac(jj))
case 0 %Slack bus
index = n;
case 1 %Generator bus
npu = npu+1;
index = n-npu;
case 2 %Load bus
npq = npq+1;
index = npq;
end %End of ac switch statement

ind(ibus(jj)) = index;
pg(index) = ppg(jj); qg(index)= qqg(jj);
pc(index) = ppc(jj); qc(index)= qqc(jj);
um(index) = uum(jj) ; ua(index)= uua(jj);

end %%%% End of ac bus indexing

nm1 = n-1;
%% Initialisation for pq buses.
for ii = 1:nm1
um1(ii) = um(ii);
ua1(ii) = ua(ii);
end
%% Initialisation for pv buses.
for ii = 1:npq
umq(ii) = um(ii);
end
ind;

119
um1;
ua1;
umq;

%% CONSTRUCTION OF BUS ADMITTANCE MATRIX %%%%%%

%%Size of YBUS is (N X N)
%%% Entering the line data.
[rl,ll,r,x,xc,tap] = textread('upseb2.dat','%d%d%f%f%f%f');
g = zeros(n,n);
b = zeros(n,n);
for ii = 1:nl_ac
sqz = (r(ii)^2 + x(ii)^2) * tap(ii);
line(ii,1) = rl(ii);
line(ii,2) = ll(ii);

j1 = ind(rl(ii));
k1 = ind(ll(ii));
st = sqz * tap(ii);
xsq = x(ii)/sqz;
rsq = r(ii)/sqz;
zl(ii,1)= r(ii)/st;
zl(ii,2)= xc(ii) - x(ii)/st;
zl(ii,3) = rsq * tap(ii);
zl(ii,4) = xc(ii) - xsq * tap(ii);
b(j1,k1) = b(j1,k1) +xsq;
b(k1,j1) = b(k1,j1) +xsq ;
b(j1,j1) = b(j1,j1) - (xsq/tap(ii)) + xc(ii);
b(k1,k1) = b(k1,k1) - (xsq*tap(ii)) +xc(ii);
g(j1,k1) = g(j1,k1) - rsq;
g(k1,j1) = g(k1,j1) - rsq;
g(j1,j1) = g(j1,j1) + rsq/tap(ii);
g(k1,k1) = g(k1,k1) + rsq*tap(ii);
end

if ncap ~=0
[cap_no,bus_no,xc1] = textread('upseb3.dat','%d%d%f');
for ii = 1:ncap
k1 = ind(bus_no(ii));
b(k1,k1) = b(k1,k1) + xc1(ii);
end
end

g;
b;

%%%%%%%%%%formation of B'and B'' Matrices.

%%% Size of B'= (nm1 X nm1) and B" =(npq X npq)
bdn = zeros(n); bd = zeros(nm1);
bddn = zeros(n); bdd = zeros(npq);
for ii = 1:nl_ac
line(ii,1) = rl(ii);
line(ii,2) = ll(ii);
jj = ind(rl(ii));
kk = ind(ll(ii));
bdn(jj,kk) = bdn(jj,kk) - 1/x(ii);

120
 bdn(kk,jj) = bdn(kk,jj) - 1/x(ii);
bdn(jj,jj) = bdn(jj,jj) + 1/x(ii);
bdn(kk,kk) = bdn(kk,kk) + 1/x(ii);
end
for ii = 1:npq
for jj = 1:npq
bdd(ii,jj) = -b(ii,jj);
end
end

for ii = 1 :nm1
for jj = 1:nm1
bd(ii,jj) = bdn(ii,jj);
end
end

bd;
bdd;

%%%% A.C. Initialisations.

pd_term = zeros(1,n);%%Vector of power drawm by dc terminals at ac
buses.
qd_term = zeros(1,n);
%%%%%Entering DC - Bus Data
%%%%%%%%First of all we will run DC LOAD-FLOW %%%%%%%%%%%%%%
%%%%%Always give DC Slack Bus last number.
n_dc = 3 ; %%%number of dc buses.
n_conv = 3; %%% number of dc terminals.
nline_dc = 3;%%% number of dc lines.
n_dcmn = n_dc -1;
k1_dc = 1.00;%%%% DC equation constant.
i_dcmax = 5.0; %%%Maximum dc current limit through scheduled power
terminal
fixed_tap = 0; %% fixed tap = 0 , Taps are not fixed.
%% fixed tap = 1 , Taps are fixed.
discrete_tap = 0; %%% discrete tap = 0 , Taps are continuous
%%% discrete tap = 1 , Taps are discrete.
step_size = 0.015;
theta_min =zeros(n_dc,1); ;%%% 5 - 7 rectifier VCT
%%% 15 - 18 inverter VCT

%%%%%% test_inputdc1.dat = convertor data %%%%%%%%%%%%%

%%%%% Always put VCT dc slack bus in the last.
[ibus_dc,index_ac,mode_type,control_type,sl_no,spec_1,spec_2,r_conv] =
...
textread('upsebdc1.dat','%d%d%d%d%d%f%f%f');
%%%% mode 1 = Rectifier %%% mode 2 = Inverter
%%%% mode 3 = no converter
%%% sl_no = 0 non-slack terminal
%%% sl_no = 1 slack bus
ibus_dc
mode_type
control_type
sl_no
spec_1
spec_2
r_conv

121
%%%%% Completion of converter data entry.
%%%%%%
%%%%%%
a_tapmax =1.15; %%%% Upper tap limit
a_tapmin =0.85; %%%% Lower tap limit

n_dcmn = n_dc - 1;
%%%test_inputdc2.dat = DC Network data.
[iline_dc,rl_dc,ll_dc,r_dl] = textread('upsebdc2.dat','%d%d%d%f');
iline_dc
rl_dc
ll_dc
r_dl
%%%%%%%% End of DC Network data entry.
%%%Intialising the DC variables
e_dc = zeros(n_dc,1); %%% Vector of DC open circuit voltages.
u_dc = zeros(n_dc,1) ; i_dc = zeros(n_dc,1);
a_tap = ones(n_dc,1) ; theta = zeros(n_dc,1);
sgn = zeros(n_dc,1);
vterm = ones(n_dc,1);
avterm = ones(n_dc,1)
p_dc = zeros(n_dc,1) ; q_dc = zeros(n_dc,1);
pt_dc = zeros(n_dc,1); qt_dc = zeros(n_dc,1);
%%%% Assignment of various control specifications.
for jj = 1 :n_dc
switch(control_type(jj))
case 0 %%% Voltage Controlled bus or DC Slack bus.
u_dc(jj,1) = spec_1(jj);
case 1 %%% Power Controlled bus.
p_dc(jj,1) = spec_1(jj);
case 2 %%% Current Controlled bus.
i_dc(jj,1) = spec_1(jj);
case 3 %%% Uncontrolled Bus , no converteor connected
i_dc(jj,1) = 0;
case 4 %%% Scheduled angle control.
theta_sch = spec_1(jj) * conv_fact;
end
end %%% End of for loop.

for jj = 1:n_dc
switch(mode_type(jj))
case 1 %%%%%% Rectifier
sgn(jj,1) = 1;
theta(jj,1) = spec_2(jj) * conv_fact ;
theta_min(jj,1) = theta(jj,1);
case 2 %%%%%% Inverter
sgn(jj,1) = -1;
theta(jj,1) = spec_2(jj) * conv_fact ;
theta_min(jj,1) = theta(jj,1);
case 3 %%%%%% No convertor
sgn(jj,1) = 1;
end
end %%%% End of for loop.
u_dc
i_dc
theta
sgn

122
p_dc

for jj = 1:n_dc
if sl_no(jj,1) == 1
slack_bus = jj;
end
end
%%% Enter tap positions if it is a fixed tap load flow
if fixed_tap == 1
[dcbus_number,a_tapf] = textread('test_inputdctap.dat','%d%f');
end

if control_type(slack_bus,1) == 4
n_dcmn1 = n_dc;
end

if control_type(slack_bus,1) == 0
n_dcmn1 = n_dcmn;
end
n_dcmn1 = n_dcmn;
%%%% Formation of BUS CONDUCTANCE MATRIX for DC Network.
%%%%% Size of g_dc matrix is (n_dc - 1) X (n_dc - 1).
g_dc = zeros(n_dcmn1 ,n_dcmn1);
g_dc1 = zeros(n_dc,n_dc);

for ii = 1:nline_dc

line_dc(ii,1) = rl_dc(ii);
line_dc(ii,2) = ll_dc(ii);
jj1 = rl_dc(ii) ;
kk1 = ll_dc(ii) ;
g_dc1(jj1,kk1) = g_dc1(jj1,kk1) - (1/r_dl(ii));
g_dc1(kk1,jj1) = g_dc1(kk1,jj1) - (1/r_dl(ii));
g_dc1(jj1,jj1) = g_dc1(jj1,jj1) + (1/r_dl(ii));
g_dc1(kk1,kk1) = g_dc1(kk1,kk1) + (1/r_dl(ii));
end
g_dc1

%%% After formulating BUS RESISTANCE MATRIX, we form DC network

equations.
%%% Vd' = [R] Id' + E Vd(N) S(N)
%%% Vd' = [S] Vd , Id' = [s] Id'
%%% We set different conditions for Scheduled angle control and
Scheduled
%%% voltage control at dc buses.
if fixed_tap == 1

for ii = 1:n_dc
a_tap(ii,1) = a_tapf(ii,1);
end
if control_type(slack_bus,1) == 4
theta(slack_bus,1) = theta_sch;

e_dc(slack_bus,1)=k1_dc*vterm(slack_bus,1)*a_tap(slack_bus,1)...
*cos(theta(slack_bus,1));
i_dc(slack_bus,1) = 0;

123
 %% g_dc1(slack_bus,slack_bus) =
g_dc1(slack_bus,slack_bus)+...
%% (1/r_conv(slack_bus,1));
end
end
if fixed_tap == 0
if control_type(slack_bus,1) == 4
theta(slack_bus,1) = theta_sch;

e_dc(slack_bus,1)=k1_dc*vterm(slack_bus,1)*a_tap(slack_bus,1)...
*cos(theta(slack_bus,1));
i_dc(slack_bus,1) = 0;
%% g_dc1(slack_bus,slack_bus) =
g_dc1(slack_bus,slack_bus)+...
%% (1/r_conv(slack_bus,1));
end
end
%%% End of assignment statements for scheduled angle control.

%%%% Assignment of g_dc to g_dc1

for ii = 1:n_dcmn1
for jj = 1:n_dcmn1
g_dc(ii,jj) = g_dc1(ii,jj);
end
end
g_dc
rbus_dc = inv(g_dc);
rbus_dc

%%%%% Start of ac-dc loadflow iteration process.

dc_loadflow = 0 ;
eps_taplimit = 0; %%%% 0 = continuing dc loadflow iterations.
%%%% 1 = stop the iterations.
if control_type(slack_bus,1) == 4
eps_vterm = 0;
else
eps_vterm = 1;
end

while((dc_loadflow <10 ) & ((eps_taplimit ==0)|(eps_vterm ==0)))

%%% First dc load flow is performed.
%%% Assignment of reference terminal to the slack bus terminal.
if control_type(slack_bus,1) == 0
u_dcref = u_dc(slack_bus,1)
end
if control_type(slack_bus,1) == 4
u_dcref = e_dc(slack_bus,1)
i_dc(slack_bus,1) = 0.0;
end

%%% Assignment of initial guess to converter currents

for jj = 1:n_dcmn1
if control_type(jj) == 1 %%% power controlled bus
i_dc(jj,1) = p_dc(jj,1)/u_dcref ;
u_dc(jj,1) = u_dcref;
end
if (control_type(jj) ==2 | control_type(jj) ==3)

124
 u_dc(jj,1) = u_dcref;
end
end
i_dc
%%%% Now we apply Gauss-Seidel iterative procedure to solve
%%%% for DC network equations for u_dc,i_dc,p_dc.
k_itrdc = 1 %%% Initialize dc iteration counter
maxitrdc = 20; %%% maximum dc iterations
againdc = 0 ; %% againdc = 0 stands for continuing iterations
%% againdc = 1 stands for stopping iterations
delu_dc = zeros(n_dcmn1,1);

eps_dc = 0.0001;

%%% start of Gauss Seidel iterative procedure

while (k_itrdc < maxitrdc) & (againdc == 0)
maxdel = 0.0;
for ii = 1:n_dcmn1
sum(ii) = 0.0 ;
u_dc1(ii,1) = u_dc(ii,1);
for jj = 1:n_dcmn1
sum(ii) = sum(ii) + rbus_dc(ii,jj) * i_dc(jj,1) *
sgn(jj,1);
end
printsum = sum(ii)
u_dc(ii,1) = sum(ii) + u_dcref;
%%% updating the current values.
if control_type(ii,1) == 1
i_dc(ii,1) = p_dc(ii,1)/u_dc(ii,1);
if i_dc(ii,1) > i_dcmax
i_dc(ii,1) = i_dcmax;
end
end

i_dc

delu_dc(ii,1) = abs(u_dc(ii,1) - u_dc1(ii,1));

delu_dc
if delu_dc(ii,1) > maxdel
maxdel = delu_dc(ii,1);
end
end
%%% Updating the reference value in case of angle controlling terminal.
if control_type(slack_bus,1) == 4
sumi = 0;
for ii = 1:n_dcmn
sumi = sumi + i_dc(ii,1);
end
i_dc(slack_bus,1) = sumi;
u_dcref = e_dc(slack_bus,1) -
i_dc(slack_bus,1)*r_conv(slack_bus,1);
u_dc(slack_bus,1) = u_dcref;
end
%%%end of reference updating procedure in case of angle controlling
%%%terminal.

if maxdel > eps_dc

125
 againdc = 0;
k_itrdc = k_itrdc + 1
else
againdc = 1;
end

end %%% End of while loop of gauss seidel iterative process.

k_itrdc
disp('Voltage and Current vectors after Gauss-Seidel process\n')
u_dc
i_dc

%%% Calculating the current for the slack bus converter

sum_iref = 0.0;
for ii = 1:n_dcmn
i_dc1(ii,1) = i_dc(ii,1) * sgn(ii,1);
sum_iref = sum_iref + i_dc1(ii,1);
end
i_dc(slack_bus,1) = (-1)*sum_iref;
i_dc1(slack_bus,1) = i_dc(slack_bus,1);
if abs(i_dc(slack_bus,1)) > i_dcmax %%% Check for current limit
violation.
for ii = 1:n_dc
i_dc(ii,1) = i_dc(ii,1)*(i_dcmax/i_dc(slack_bus,1));
end
end
i_dc1
%%%%%% After computing current and voltages at dc busbars, we compute
power
%%%%%% at slack and current controlling terminals.

%%% Now we compute the p_dc from Vd and Id vectors

for ii = 1:n_dc
if (control_type(ii)==0 | control_type(ii)==2 |
control_type(ii)==4)
p_dc(ii) = u_dc(ii,1) * abs(i_dc(ii,1));
end
end
p_dc

%%%Computation of the product of the tap 'a' and the ac voltage Vterm=
avterm
%%% Vd = K1.a.Vterm.cos(theta)-Id.Rc (for voltage controlling terminal)
%%% Vd = 0.97[K1.a.Vterm.cos(theta)-Id.Rc] (for other terminals)
if control_type(slack_bus,1) == 0 %%% voltage controlling terminal
if fixed_tap == 1
theta(slack_bus,1) =
acos((u_dc(slack_bus,1)+i_dc(slack_bus,1)...
*
r_conv(slack_bus,1))/(k1_dc*a_tapf(slack_bus,1)*...
vterm(slack_bus,1)));
avterm(slack_bus,1) = (u_dc(slack_bus,1) + r_conv(slack_bus,1)
...
* i_dc(slack_bus,1))/(k1_dc * cos(theta(slack_bus,1)));
end
if fixed_tap == 0

126
 theta(slack_bus,1) = theta_min(slack_bus,1);
avterm(slack_bus,1) = (u_dc(slack_bus,1) + r_conv(slack_bus,1)
...
* i_dc(slack_bus,1))/(k1_dc * cos(theta(slack_bus,1)));
end
end

if control_type(slack_bus,1) == 4 %%%Scheduled Angle control

if fixed_tap == 1 %%% fixed tap has higher priority over control
angle.
theta(slack_bus,1) = acos((u_dc(slack_bus,1)+ i_dc(slack_bus,1) *
...
r_conv(slack_bus,1)) /(k1_dc *a_tapf(slack_bus,1)...
* vterm(slack_bus,1)));
avterm(slack_bus,1) = a_tap(slack_bus,1) * vterm(slack_bus,1)
end

if fixed_tap == 0
theta(slack_bus,1) = theta_sch;
avterm(slack_bus,1) = (u_dc(slack_bus,1) + i_dc(slack_bus,1) *...
r_conv(slack_bus,1))/(k1_dc * ...
cos(theta(slack_bus,1)));
end
end

if fixed_tap == 1
for ii = 1 : n_dc
if ii ~= slack_bus
theta(ii,1) =
acos(((u_dc(ii,1)/0.97)+i_dc(ii,1)*r_conv(ii,1))/...
(k1_dc*a_tapf(ii,1)*vterm(ii,1)));
end
end
end

if fixed_tap == 0
for ii = 1:n_dc
if ii ~= slack_bus

if control_type(ii,1) == 3
avterm(ii,1) = u_dc(ii,1);
end

if(control_type(ii,1) == 2 | control_type(ii,1) == 1)
avterm(ii,1) =((u_dc(ii,1)/0.97)+
r_conv(ii)*i_dc(ii,1))/...
(k1_dc * cos(theta_min(ii,1)));
theta(ii,1)=acos((u_dc(ii,1)+i_dc(ii,1)*r_conv(ii,1))/...
(k1_dc*avterm(ii,1)));
end
end
end
end
theta
avterm
%%% Now we compute the power factor angles at all dc buses.
fi_term = zeros(n_dc,1);

127
for ii = 1:n_dc
if control_type(ii) == 3
fi_term(ii,1) = 0;
elseif control_type(ii,1) == 4 %%% Scheduled Angle Control
cfi_term1 = u_dc(ii,1)/(k1_dc * avterm(ii,1));
fi_term(ii,1) = acos(cfi_term1);
else
cfi_term = u_dc(ii,1)/(k1_dc * avterm(ii,1));
fi_term(ii,1) = acos(cfi_term);
end
end
fi_term

%%% Now we compute the real and reactive powers drawn by the converter
%%% terminals.
for ii = 1:n_dc
if control_type(ii,1) == 3
pt_dc(ii,1) = 0.0;
qt_dc(ii,1) = 0.0;
else
pt_dc(ii,1) = sgn(ii,1) * p_dc(ii,1);
qt_dc(ii,1) = p_dc(ii,1) * tan(fi_term(ii,1));
end
end
pt_dc
qt_dc

%%%% This is end of DC loadflow.

%%%%% After calculating real and reactive powers drawn by the HVDC
%%%%% terminals assign them to the respective ac buses as P,Q loads.
for ii = 1:n_dc
pd_term(ind(index_ac(ii))) = pt_dc(ii,1);
qd_term(ind(index_ac(ii))) = qt_dc(ii,1);
end

pd_term
qd_term

%%% Now perform AC loadflow to calculate voltage updates at dc

terminals.
%%%%%%This calculates the P and Q updates
da = zeros(nm1,1);%%% da = Phase angle difference
du = zeros(npq,1); %%% du = Voltage magnitude difference
%%% The stert of P and Q calculations updates
k_itr = 0; %%% iteration counter
againp = 0;%%again = 0 stands for continuing the iterations
againq = 0;%%%again = 1 stands for stopping the iterations

delp = zeros(nm1,1); delq = zeros(npq,1);

%%% Start of the FDLF iterative procedure
while (k_itr < maxit) & (againp ==0 | againq ==0)
%%% Computation of bus powers in terms of voltage updates
k_itr
for ii = 1:n
pe(ii) = 0.0;
for jj =1:n
gij=g(ii,jj); bij = b(ii,jj);

128
 if (gij~=0 | bij~=0)
angd = ua(ii) - ua(jj);
uij = um(ii) * um(jj);
cs = cos(angd);
sn = sin(angd);
pe(ii) = pe(ii) + uij *(gij*cs + bij*sn);
end
end
end

%%%% End of P updates

pe;

%%%Start of P routine
%%%First we calculate the P mismatches
againp = 1;
%% If no power difference is > epsp then stop iterating
for ii = 1:nm1
delp(ii) = pg(ii)-pc(ii)-pe(ii)-pd_term(ii);
if abs(delp(ii)) > epsp
againp = 0;
end

end %%%End of P mismatch calculations

if againp == 1
if againq == 1
break; %%come out of ac iteration routine
end
else
k_itr = k_itr + 1;
bdinv = inv(bd);
da = bdinv * (delp./abs(um1'));
ua1 = ua1 + da';
end

for ii = 1:nm1
ua(ii) = ua1(ii);
end
%%%%%Start of Q routine
%%%%First we calculate the delta Q
againq = 1;
for ii = 1:n
qe(ii) = 0.0;
for jj =1:n
gij=g(ii,jj); bij = b(ii,jj);
if (gij~=0 | bij~=0)
angd = ua(ii) - ua(jj);
uij = um(ii) * um(jj);
cs = cos(angd);
sn = sin(angd);
qe(ii) = qe(ii) + uij *(gij*sn - bij*cs);
end
end
end
qe;

129
for ii = 1:npq
delq(ii) = qg(ii)-qc(ii)-qe(ii)-qd_term(ii);
%%%%%%%delq(ii) = qg(ii)-qc(ii)-qe(ii);
if abs(delq(ii)) > epsq
againq = 0;
end
end %%% End of Q - mismatch
if againq == 1
if againp == 1
break;
end
else
k_itr = k_itr +1;
bddinv = inv(bdd);
du = bddinv * (delq./abs(umq'));
for jpv = (npq + 1):nm1
du(jpv,1) = 0.0;
end
for ii = 1:npq
umq(ii) = umq(ii) + du(ii);
um(ii) = um(ii) + du(ii);
um1(ii) = um1(ii) + du(ii);
end
end
um1;

for ii = 1:nm1
um(ii) = um1(ii);
end

end %%end of while loop of ac load flow iteration

if k_itr == maxit
fprintf('The solution of ac FDLF is not converged\n');
else
fprintf('The solution of ac FDLF is converged\n');
end

%%%% After computing voltage updates, we assign them back to dc

terminals.
for ii = 1:n_dc
vterm(ii) = um(ind(index_ac(ii)));
end
%%% Next we compute the tap positions.
if fixed_tap == 0
for ii = 1:n_dc
a_tap(ii) = avterm(ii)/vterm(ii);
end
end
vterm
a_tap
%%% Check for tap limit violations.
for ii = 1:n_dc
dtap_u(ii,1) = a_tapmax - a_tap(ii);
dtap_l(ii,1) = a_tap(ii) - a_tapmin;
end

130
deltapu = 0; deltapl = 0;
for ii = 1:n_dc
if dtap_u(ii,1) < 0
for ii = 1:n_dc
if dtap_l(ii,1) < 0
fprintf('Solution of ac dc load flow is not
converging\n');
break;
end
end
if abs(dtap_u(ii)) > deltapu
deltapu = dtap_u(ii);
xtap = ii;
end
end

if dtap_l(ii,1) < 0
for ii = 1:n_dc
if dtap_u(ii,1) < 0
fprintf('Solution of ac dc load flow is not
converging\n');
break;
end
end
if abs(dtap_l(ii)) > deltapu
deltapl = dtap_l(ii);
xtap = ii;
end
end
end
%%%% Rescheduling of dc voltages at voltage controlling terminal
if deltapu ~= 0
u_dc(slack_bus,1) = u_dc(slack_bus,1) * a_tapmax/a_tap(xtap);
end
if deltapl ~= 0
u_dc(slack_bus,1) = u_dc(slack_bus,1) * a_tapmin/a_tap(xtap);
end

if deltapu == 0
if deltapl == 0
eps_taplimit = 1;
end
end
%%% Start of procedure for discrete tap positions.
if discrete_tap == 1 %%%%% Discrete tap positions.
if fixed_tap == 0
for ii = 1:n_dc
if ii==slack_bus
if control_type(ii,1)==4
theta(ii,1) = theta_sch;
a_tap(ii,1) = a_tapmin + step_size*...
floor(((a_tap(ii,1)-a_tapmin)/step_size) +
0.5);
u_dc(ii,1) = k1_dc*a_tap(ii,1)*vterm(ii,1)*...
cos(theta(ii,1))-i_dc(ii,1)*r_conv(ii,1);
else
a_tap(ii,1) = a_tapmin + step_size*...

131
 floor(((a_tap(ii,1)-a_tapmin)/step_size) +
0.5);
theta(ii,1) = acos((u_dc(ii,1) + i_dc(ii,1)*...
r_conv(ii,1))/(k1_dc*a_tap(ii,1)*vterm(ii,1)));
end
else
a_tap(ii,1) = a_tapmin + step_size*...
floor(((a_tap(ii,1)-a_tapmin)/step_size) +
0.5);
theta(ii,1) = acos((u_dc(ii,1) + i_dc(ii,1)*...
r_conv(ii,1))/(k1_dc*a_tap(ii,1)*vterm(ii,1)));
end
end
else
for ii = 1:n_dc
theta(ii,1) =acos((u_dc(ii,1) +
i_dc(ii,1)*r_conv(ii,1))/...
(k1_dc*a_tap(ii,1)*vterm(ii,1)));
end
end
a_tap
theta

for ii = 1:n_dc
if control_type(ii) == 3
fi_term(ii,1) = 0;
elseif control_type(ii,1) == 4 %%% Scheduled Angle Control
cfi_term1 = u_dc(ii,1)/(k1_dc * a_tap(ii,1)*vterm(ii,1));
fi_term(ii,1) = acos(cfi_term1);
else
cfi_term = u_dc(ii,1)/(k1_dc * a_tap(ii,1)*vterm(ii,1));
fi_term(ii,1) = acos(cfi_term);
end

end
fi_term

%%% Now we recompute the reactive powers drawn by the converter

terminals.
for ii = 1:n_dc
if control_type(ii,1) == 3
qt_dc(ii,1) = 0.0;
else
qt_dc(ii,1) = p_dc(ii,1) * tan(fi_term(ii,1));
qd_term(ind(index_ac(ii))) = qt_dc(ii,1);
end
end
pt_dc
qt_dc
if control_type(slack_bus,1) == 4
e_dc1(slack_bus,1) = k1_dc * a_tap(slack_bus,1) *
vterm(slack_bus,1)...
* cos(theta_sch);
e_dc1
e_dc
dele_dc = e_dc1(slack_bus,1) - e_dc(slack_bus,1);
dele_dc

132
 if abs(dele_dc) <= eps_dc
eps_vterm = 1;
else
eps_vterm = 0;
end
e_dc(slack_bus,1) = e_dc1(slack_bus,1);
end
%%%% Perform AC loadflow studies again.
%%%%%%This calculates the P and Q updates
da = zeros(nm1,1);%%% da = Phase angle difference
du = zeros(npq,1); %%% du = Voltage magnitude difference
%%% The stert of P and Q calculations updates
k_itr = 0; %%% iteration counter
againp = 0;%%again = 0 stands for continuing the iterations
againq = 0;%%%again = 1 stands for stopping the iterations

delp = zeros(nm1,1); delq = zeros(npq,1);

%%% Start of the FDLF iterative procedure
while (k_itr < maxit) & (againp ==0 | againq ==0)
%%% Computation of bus powers in terms of voltage updates
k_itr
for ii = 1:n
pe(ii) = 0.0;
for jj =1:n
gij=g(ii,jj); bij = b(ii,jj);
if (gij~=0 | bij~=0)
angd = ua(ii) - ua(jj);
uij = um(ii) * um(jj);
cs = cos(angd);
sn = sin(angd);
pe(ii) = pe(ii) + uij *(gij*cs + bij*sn);
end
end
end

%%%% End of P updates

pe;

%%%Start of P routine
%%%First we calculate the P mismatches
againp = 1;
%% If no power difference is > epsp then stop iterating
for ii = 1:nm1
delp(ii) = pg(ii)-pc(ii)-pe(ii)-pd_term(ii);
if abs(delp(ii)) > epsp
againp = 0;
end

end %%%End of P mismatch calculations

if againp == 1
if againq == 1
break; %%come out of ac iteration routine
end
else
k_itr = k_itr + 1;

133
 bdinv = inv(bd);
da = bdinv * (delp./abs(um1'));
ua1 = ua1 + da';
end

for ii = 1:nm1
ua(ii) = ua1(ii);
end
%%%%%Start of Q routine
%%%%First we calculate the delta Q
againq = 1;
for ii = 1:n
qe(ii) = 0.0;
for jj =1:n
gij=g(ii,jj); bij = b(ii,jj);
if (gij~=0 | bij~=0)
angd = ua(ii) - ua(jj);
uij = um(ii) * um(jj);
cs = cos(angd);
sn = sin(angd);
qe(ii) = qe(ii) + uij *(gij*sn - bij*cs);
end
end
end
qe;
for ii = 1:npq
delq(ii) = qg(ii)-qc(ii)-qe(ii)-qd_term(ii);
if abs(delq(ii)) > epsq
againq = 0;
end
end %%% End of Q - mismatch
if againq == 1
if againp == 1
break;
end
else
k_itr = k_itr +1;
bddinv = inv(bdd);
du = bddinv * (delq./abs(umq'));
for jpv = (npq + 1):nm1
du(jpv,1) = 0.0;
end
for ii = 1:npq
umq(ii) = umq(ii) + du(ii);
um(ii) = um(ii) + du(ii);
um1(ii) = um1(ii) + du(ii);
end
end
um1;

for ii = 1:nm1
um(ii) = um1(ii);
end

end %%end of while loop of ac load flow iteration

134
if k_itr == maxit
fprintf('The solution of ac FDLF2 is not converged\n');
else
fprintf('The solution of ac FDLF2 is converged\n');
end
%%% Assigning back to dcterminals.
del_vterm_max = 0;
for ii = 1:n_dc
vterm1(ii,1) = um(ind(index_ac(ii)));
del_vterm(ii) = vterm1(ii,1) - vterm(ii,1);
if abs(del_vterm(ii)) > del_vterm_max
del_vterm_max = abs(del_vterm);
end
end
vterm1
u_dc
i_dc
for ii = 1:n_dc
vterm(ii,1) = vterm1(ii,1);
end
if del_vterm_max > eps_dc
eps_taplimit = 0;
else
eps_taplimit = 1;
end

end %%%% End of procedure for discrete tap positions.

end %%%%% End of while loop of complete AC-DC loadflow.

%%%%%%%%%%Printing of the results

%%%Having finished, we compute and print
%%%%%%%%%%%%%%%%%%%%% all bus voltages and angles
disp('');
disp(' AC-DC LOAD FLOW STUDY ');
disp('');

disp(' REPORT OF POWER FLOW CALCULATIONS ');

disp('');
disp('');
fprintf('Number of iterations : %d\n',k_itr);
disp(' BUS DATA ');
disp('');
disp('Bus um da(deg.) ');
disp('');
for ii = 1:n
jj = ind(ii);
da = ua(jj) / convs;
fprintf('%2d %12.4f %12.4f\n',ii,um(jj),da);
end
disp('Bus pg qg pc qc');
disp('');
for ii = 1:n
jj = ind(ii);

if (jj > npq)

135
 qg(jj) = qe(jj) + qc(jj);
if (jj == n)
pg(jj) = pe(jj) + pc(jj);
end
end
fprintf('%2d %10.4f %10.4f %10.4f
%10.4f\n',ii,pg(jj),qg(jj),pc(jj),qc(jj));
end

%%%%%%%%% End of Bus Data

%%%%%Next we compute the line flows
fprintf(' LINE FLOWS \n');
disp('sn en p(sn,en) p(en,sn) q(sn,en)
q(en,sn)\n');
for ii = 1:nl_ac
jj = line(ii,1);
kk = line(ii,2);
jl = ind(jj);
kl = ind(kk);
gjj = zl(ii,1); gkk = zl(ii,3);
bjj = zl(ii,2); bkk = zl(ii,4);
gjk = g(jl,kl); bjk = b(jl,kl);
gkj = g(kl,jl); bkj = b(kl,jl);

angd = ua(jl) - ua(kl);

usqj = um(jl)^2;
uskj = um(kl) * um(jl);
csd = cos(angd) ; ssd = sin(angd);
usqk = um(kl)^2;
usc = uskj * csd; ucs = uskj * ssd;

pjk = gjj * usqj + gjk * usc + bjk * ucs;

pkj = gkk * usqk + gkj * usc - bkj * ucs;
qjk =-bjj * usqj - bjk * usc + gjk * ucs;
qkj =-bkk * usqk - bkj * usc - gkj * ucs;
fprintf('%3d %3d %12.4f %12.4f %12.4f
%12.4f\n',jj,kk,pjk,pkj,qjk,qkj);
end
%%%%%End of line data
%%%%%%Next we compute the LINE LOSSES
ploss = 0.0 ; qloss = 0.0;
for ii = 1:n
ploss = ploss + pg(ii) - pc(ii) - pd_term(ii);
qloss = qloss + qg(ii) - qc(ii) - qd_term(ii);
end
fprintf(' REAL LOSSES : %8.4f\n',ploss);
fprintf('REACTIVE LOSSES : %8.4f\n',qloss);
%%%%%End of the ac load flow data
%%%%%%Entering the DC data
disp('\n\n DC DATA \n ');
disp('con. no. Vd Id P Q a_tap Theta
V_term\n');
for ii = 1:n_dc
fprintf('%3d %8.4f %8.4f %8.4f %8.4f %8.4f %8.4f
%8.4f\n',ii,u_dc(ii),...

i_dc(ii),pt_dc(ii),qt_dc(ii),a_tap(ii),theta(ii),vterm(ii));

136
 end

137

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