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Sheet1

LocoNo: 18001 LocoType: T18 Shed:SSB Zone:NR Date: 06/08/2019 Time: 06:08:54 Fault Code: 16938 Message: Spare Location
Present Date: 06/08/2019 12:01:38

Field Name Units 06/08/2019 06:08:49


06/08/2019 06:08:50
06/08/2019 06:08:51
06/08/2019 06:08:52
Index NUM 28 25 26 26
CCC1_State - NW MASTER NW MASTER NW MASTER NW MASTER
CCC2_State - NW ACT SLAVE NW ACT SLAVE NW ACT SLAVE NW ACT SLAVE
CCC3_State - NW REG SLAVE NW REG SLAVE NW REG SLAVE NW REG SLAVE
CCC4_State - NW REG SLAVE NW REG SLAVE NW REG SLAVE NW REG SLAVE
CAB1_MR_Pr bar 9.2 9.2 9.2 9.2
CAB2_MR_Pr bar 8.7 8.7 8.7 8.7
CAB1_BP_Pr bar 4.9 4.9 4.9 4.9
CAB2_BP_Pr bar 4.9 4.9 4.9 4.9
C1PAN_UP_CAB_SW clear clear clear clear
C1PAN_DN_CAB_SW clear clear clear clear
C1VCB_ON_CAB_SW clear clear clear clear
C1VCB_OFF_CAB_SW clear clear clear clear
C1ENS_SW clear clear clear clear
C1CSC_SW clear clear clear clear
C1EMY_OFF_SW set set set set
C1KEY_MCH_SW set set set set
C1RDM_MCH_SW clear clear clear clear
C1FWD_MCH_SW set set set set
C1REV_MCH_SW clear clear clear clear
C1DRIVE_MCH_SW set set set set
C1BRK_MCH_SW set set set set
C1COAST_MCH_SW clear clear clear clear
C1EMY_BRK_MCH_SW clear clear clear clear
C1VCD_HRFB set set set set
C1FLT_RST_SW clear clear clear clear
C1VCD_RESET clear clear clear clear
C1FLASHR_HRFB clear clear clear clear
C1PB_RELEASE_SW clear clear clear clear
C1PB_APPLY_SW clear clear clear clear
C1VCD_ACK clear clear clear clear
C1AUX_HDLT_SW set set set set
C1LMP_TST_D_G_SW clear clear clear clear
C1BMC_OFF clear clear clear clear
C1DCL_HRFB clear clear clear clear
C1HORN_SW clear clear clear clear
C1LIGHT_100Per_SW clear clear clear clear
C1LIGHT_50Per_SW clear clear clear clear
C1NO_MOTION_SRFB clear clear clear clear
C1V_5KMPH_SRFB set set set set
C1DOOR_CLOSE_SW clear clear clear clear
C1CAB_OCC_SEL_SW set set set set
C1BAL_ISO_SW clear clear clear clear
C1EBL_ISO_SW clear clear clear clear
C1EOL_ISOLATE_SW clear clear clear clear

Page 1
Sheet1

C1DWB_SW clear clear clear clear


C1AUTH_ACTIVE_SW clear clear clear clear
C1SINGLE_UNIT_SW clear clear clear clear
C1UV_BYP_SW clear clear clear clear
C1MIN_1_BRK_TL clear clear clear clear
C1MIN_1_PB_TL clear clear clear clear
C1DWB_HRFB clear clear clear clear
C1LOC_EB1_HRFB set set set set
C1LOC_EB2_HRFB set set set set
C1PANTO_14 clear clear clear clear
C1PANTO_23 set set set set
C1START_ALL_MAC clear clear clear clear
C1TCMS_EMY_SRFB clear clear clear clear
C1CO_LPT_HRFB clear clear clear clear
C1CO_HPT_HRFB set set set set
C1ACO_LPT_HRFB clear clear clear clear
C1ACO_HPT_HRFB clear clear clear clear
C1COLPT_ISO_SRFB clear clear clear clear
C1COHPT_ISO_SRFB clear clear clear clear
C1UV_RLY_SRFB clear clear clear clear
C1DOOR_OPEN_L_SW clear clear clear clear
C1DOOR_OPEN_R_SW clear clear clear clear
C1DOOR_OPEN_L_HRFB clear clear clear clear
C1DOOR_OPEN_R_HRFB clear clear clear clear
C1D02 set set set set
C1Spr2 clear clear clear clear
C1ALL_DR_CLSED_HRFB clear clear clear clear
C1Spr3 clear clear clear clear
C1RMPU_ON_TL clear clear clear clear
C1RMPU_OFF_TL clear clear clear clear
C1Spr4 clear clear clear clear
C1Spr5 clear clear clear clear
C1Spr6 clear clear clear clear
C1Spr7 clear clear clear clear
C1Spr8 clear clear clear clear
C1Spr9 clear clear clear clear
C1SB_EBL_MCB set set set set
C1BAL_ECN1MCB set set set set
C1BAT_CNT_ECN2_MCB set set set set
C1CAB_LT_EB_MCB set set set set
C1CAB_OC1_EOL_MCB set set set set
C1CAB_OC2_RECORDER_CB set set set set
C1CCU2_FLASHER_MCB set set set set
C1DBC_LRMS_MCB set set set set
C1DCU_L_HDLT_MCB set set set set
C1DCU_R_PANTO_MC_MCB set set set set
C1DCU_TLPASMCB set set set set
C1DPL_PB_TL_MCB set set set set
C1CAB_FAN_RMPU_MCB set set set set

Page 2
Sheet1

C1DTC_MARKER_LT_MCB set set set set


C1EBL_BYP_CCU1_MCB set set set set
C1DIP_90_Spr clear clear clear clear
C1DIP_91_Spr clear clear clear clear
C1DIP_92_Spr clear clear clear clear
C1DIP_93_Spr clear clear clear clear
C1DIP_94_Spr clear clear clear clear
C1DIP_95_Spr clear clear clear clear
C1DIP_96_Spr clear clear clear clear
C1DIP_Spr_in_f1 clear clear clear clear
C1DIP_Spr_in_f2 clear clear clear clear
C1DIP_Spr_in_f3 clear clear clear clear
C1DIP_Spr_in_f4 clear clear clear clear
C1DIP_Spr_in_f5 clear clear clear clear
C1DIP_Spr_in_f6 clear clear clear clear
C1DIP_Spr_in_f7 clear clear clear clear
C1DIP_Spr_in_f8 clear clear clear clear
C1DIP_Spr_in_f9 clear clear clear clear
C1DIP_Spr_in_f10 clear clear clear clear
C1DIP_Spr_in_f11 clear clear clear clear
C1DIP_Spr_in_f12 clear clear clear clear
C1DIP_Spr_in_f13 clear clear clear clear
C1DIP_Spr_in_f14 clear clear clear clear
C1DIP_Spr_in_f15 clear clear clear clear
C1DIP_Spr_in_f16 clear clear clear clear
C1NOT_ALL_PAN_UP clear clear clear clear
C1NOT_ALL_MC_ON clear clear clear clear
C1ENS_LAMP clear clear clear clear
C1CSC_LAMP set set set set
C1FLT_RST_LMP clear clear clear clear
C1PB_APP_LAMP clear clear clear clear
C1PB_REL_LAMP clear clear clear clear
C1VCD_BUZZER clear clear clear clear
C1_VCD_RELAY set set set set
C1VCD_LAMP clear clear clear clear
C1TCMS_EMY_BRK clear clear clear clear
C1ASR_FAILURE clear clear clear clear
C1UV_RELAY clear clear clear clear
C1LAMP_TEST clear clear clear clear
C1Spr15 clear clear clear clear
C1CAB_OCC1_LOOP_ISO clear clear clear clear
C1CAB_OCC2_LOOP_ISO clear clear clear clear
C1TCN_FAIL set set set set
C1OHE_AVAILABLE set set set set
C1FLT_BUZZER clear clear clear clear
C1AC_FAULT clear clear clear clear
C1NO_MOTION clear clear clear clear
C1V_5KMPH set set set set
C1AUTO_FLASHER clear clear clear clear

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Sheet1

C1Spr25 clear clear clear clear


C1Spr26 set set set set
C1Spr27 clear clear clear clear
C1Spr28 set set set set
C1Spr29 clear clear clear clear
C1Spr30 clear clear clear clear
C1Spr31 clear clear clear clear
C1Spr32 clear clear clear clear
C1Spr33 clear clear clear clear
C1Spr34 clear clear clear clear
C1Spr35 clear clear clear clear
C1Spr36 clear clear clear clear
C1Spr37 clear clear clear clear
C1Spr38 clear clear clear clear
C1Spr39 clear clear clear clear
C1Spr40 clear clear clear clear
C1Spr41 clear clear clear clear
C1Spr42 clear clear clear clear
C1Spr43 clear clear clear clear
C1Spr44 clear clear clear clear
C1Spr45 clear clear clear clear
C1Spr46 clear clear clear clear
C1Spr47 clear clear clear clear
C1Spr48 clear clear clear clear
C2PAN_UP_CAB_SW clear clear clear clear
C2PAN_DN_CAB_SW clear clear clear clear
C2VCB_ON_CAB_SW clear clear clear clear
C2VCB_OFF_CAB_SW clear clear clear clear
C2ENS_SW clear clear clear clear
C2CSC_SW clear clear clear clear
C2EMY_OFF_SW set set set set
C2KEY_MCH_SW clear clear clear clear
C2RDM_MCH_SW clear clear clear clear
C2FWD_MCH_SW clear clear clear clear
C2REV_MCH_SW clear clear clear clear
C2DRIVE_MCH_SW clear clear clear clear
C2BRK_MCH_SW set set set set
C2COAST_MCH_SW set set set set
C2EMY_BRK_MCH_SW clear clear clear clear
C2VCD_HRFB set set set set
C2FLT_RST_SW clear clear clear clear
C2VCD_RESET clear clear clear clear
C2FLASHR_HRFB clear clear clear clear
C2PB_RELEASE_SW clear clear clear clear
C2PB_APPLY_SW clear clear clear clear
C2VCD_ACK clear clear clear clear
C2AUX_HDLT_SW clear clear clear clear
C2LMP_TST_D_G_SW clear clear clear clear
C2BMC_OFF clear clear clear clear

Page 4
Sheet1

C2DCL_HRFB clear clear clear clear


C2HORN_SW clear clear clear clear
C2LIGHT_100Per_SW clear clear clear clear
C2LIGHT_50Per_SW clear clear clear clear
C2NO_MOTION_SRFB clear clear clear clear
C2V_5KMPH_SRFB set set set set
C2DOOR_CLOSE_SW clear clear clear clear
C2CAB_OCC_SEL_SW clear clear clear clear
C2BAL_ISO_SW clear clear clear clear
C2EBL_ISO_SW clear clear clear clear
C2EOL_ISOLATE_SW clear clear clear clear
C2DWB_SW clear clear clear clear
C2AUTH_ACTIVE_SW clear clear clear clear
C2SINGLE_UNIT_SW clear clear clear clear
C2UV_BYP_SW clear clear clear clear
C2MIN_1_BRK_TL clear clear clear clear
C2MIN_1_PB_TL clear clear clear clear
C2DWB_HRFB clear clear clear clear
C2LOC_EB1_HRFB set set set set
C2LOC_EB2_HRFB set set set set
C2PANTO_14 set set set set
C2PANTO_23 clear clear clear clear
C2START_ALL_MAC clear clear clear clear
C2TCMS_EMY_SRFB clear clear clear clear
C2CO_LPT_HRFB clear clear clear clear
C2CO_HPT_HRFB clear clear clear clear
C2ACO_LPT_HRFB clear clear clear clear
C2ACO_HPT_HRFB set set set set
C2COLPT_ISO_SRFB clear clear clear clear
C2COHPT_ISO_SRFB clear clear clear clear
C2UV_RLY_SRFB clear clear clear clear
C2DOOR_OPEN_L_SW clear clear clear clear
C2DOOR_OPEN_R_SW clear clear clear clear
C2DOOR_OPEN_L_HRFB clear clear clear clear
C2DOOR_OPEN_R_HRFB clear clear clear clear
C2D02 clear clear clear clear
C2Spr2 clear clear clear clear
C2ALL_DR_CLSED_HRFB clear clear clear clear
C2Spr3 clear clear clear clear
C2RMPU_ON_TL clear clear clear clear
C2RMPU_OFF_TL clear clear clear clear
C2Spr4 clear clear clear clear
C2Spr5 clear clear clear clear
C2Spr6 clear clear clear clear
C2Spr7 clear clear clear clear
C2Spr8 clear clear clear clear
C2Spr9 clear clear clear clear
C2SB_EBL_MCB set set set set
C2BAL_ECN1MCB set set set set

Page 5
Sheet1

C2BAT_CNT_ECN2_MCB set set set set


C2CAB_LT_EB_MCB set set set set
C2CAB_OC2_EOL_MCB set set set set
C2CAB_OC2_RECORDER_CB set set set set
C2CCU2_FLASHER_MCB set set set set
C2DBC_LRMS_MCB set set set set
C2DCU_L_HDLT_MCB set set set set
C2DCU_R_PANTO_MC_MCB set set set set
C2DCU_TLPASMCB set set set set
C2DPL_PB_TL_MCB set set set set
C2CAB_FAN_RMPU_MCB set set set set
C2DTC_MARKER_LT_MCB set set set set
C2EBL_BYP_CCU1_MCB set set set set
C2DIP_90_Spr clear clear clear clear
C2DIP_91_Spr clear clear clear clear
C2DIP_92_Spr clear clear clear clear
C2DIP_93_Spr clear clear clear clear
C2DIP_94_Spr clear clear clear clear
C2DIP_95_Spr clear clear clear clear
C2DIP_96_Spr clear clear clear clear
C2DIP_Spr_in_f1 clear clear clear clear
C2DIP_Spr_in_f2 clear clear clear clear
C2DIP_Spr_in_f3 clear clear clear clear
C2DIP_Spr_in_f4 clear clear clear clear
C2DIP_Spr_in_f5 clear clear clear clear
C2DIP_Spr_in_f6 clear clear clear clear
C2DIP_Spr_in_f7 clear clear clear clear
C2DIP_Spr_in_f8 clear clear clear clear
C2DIP_Spr_in_f9 clear clear clear clear
C2DIP_Spr_in_f10 clear clear clear clear
C2DIP_Spr_in_f11 clear clear clear clear
C2DIP_Spr_in_f12 clear clear clear clear
C2DIP_Spr_in_f13 clear clear clear clear
C2DIP_Spr_in_f14 clear clear clear clear
C2DIP_Spr_in_f15 clear clear clear clear
C2DIP_Spr_in_f16 clear clear clear clear
C2NOT_ALL_PAN_UP clear clear clear clear
C2NOT_ALL_MC_ON clear clear clear clear
C2ENS_LAMP clear clear clear clear
C2CSC_LAMP clear clear clear clear
C2FLT_RST_LMP clear clear clear clear
C2PB_APP_LAMP clear clear clear clear
C2PB_REL_LAMP clear clear clear clear
C2VCD_BUZZER clear clear clear clear
C2_VCD_RELAY set set set set
C2VCD_LAMP clear clear clear clear
C2TCMS_EMY_BRK clear clear clear clear
C2ASR_FAILURE clear clear clear clear
C2UV_RELAY clear clear clear clear

Page 6
Sheet1

C2LAMP_TEST clear clear clear clear


C2Spr15 clear clear clear clear
C2CAB_OCC1_LOOP_ISO clear clear clear clear
C2CAB_OCC2_LOOP_ISO clear clear clear clear
C2TCN_FAIL set set set set
C2OHE_AVAILABLE set set set set
C2FLT_BUZZER clear clear clear clear
C2AC_FAULT clear clear clear clear
C2NO_MOTION clear clear clear clear
C2V_5KMPH set set set set
C2AUTO_FLASHER clear clear clear clear
C2Spr25 clear clear clear clear
C2Spr26 set set set set
C2Spr27 clear clear clear clear
C2Spr28 set set set set
C2Spr29 clear clear clear clear
C2Spr30 clear clear clear clear
C2Spr31 clear clear clear clear
C2Spr32 clear clear clear clear
C2Spr33 clear clear clear clear
C2Spr34 clear clear clear clear
C2Spr35 clear clear clear clear
C2Spr36 clear clear clear clear
C2Spr37 clear clear clear clear
C2Spr38 clear clear clear clear
C2Spr39 clear clear clear clear
C2Spr40 clear clear clear clear
C2Spr41 clear clear clear clear
C2Spr42 clear clear clear clear
C2Spr43 clear clear clear clear
C2Spr44 clear clear clear clear
C2Spr45 clear clear clear clear
C2Spr46 clear clear clear clear
C2Spr47 clear clear clear clear
C2Spr48 clear clear clear clear
DDU_flag1 clear clear clear clear
DDU_flag2 set set set set
DDU_flag3 clear clear clear clear
DDU_flag4 clear clear clear clear
DDU_flag5 clear clear clear clear
DDU_flag6 clear clear clear clear
DDU_flag7 set set set set
DDU_flag8 clear clear clear clear
DDU_flag9 clear clear clear clear
DDU_flag10 clear clear clear clear
DDU_flag11 clear clear clear clear
DDU_flag12 clear clear clear clear
DDU_flag13 clear clear clear clear
DDU_flag14 clear clear clear clear

Page 7
Sheet1

DDU_flag15 clear clear clear clear


DDU_flag16 clear clear clear clear
Train_Opmode - PWR PWR PWR PWR
MCH_Per % 9 9 9 9
Train_OHE_Voltage kV 24.6 24.6 24.5 24.5
Train_OHE_Current A 50 49 54 57
PIS_Trip_Distance Meters 19915 19927 19939 19950
Recorder_Speed kmph 41 41 41 41
Train_Acceleration m/sec2 0.02 0.02 0.02 0.01
Cruise_RPM RPM 1235 1235 1235 1235
V_max_speed kmph 160 160 160 160
Mot_prohibit_num - None None None None
VCD_Count NUM 3 4 5 6
BN_voltage_in_rake NUM 125 125 125 125
MR_pressure_in_Rake bar 3.9 3.9 3.9 3.9
Cab_1_2_Occ clear clear clear clear
Cab_Occupied_Normal_Mode set set set set
Cab_Occupied_RDM_Mode clear clear clear clear
Forward set set set set
Reverse clear clear clear clear
Drive_Input set set set set
Brake_Input clear clear clear clear
Coast_Input clear clear clear clear
Emergency_Input clear clear clear clear
VCD_State clear clear clear clear
EBL_Triggered_sts clear clear clear clear
EBL_Isolation_sts clear clear clear clear
EOL_Triggered_sts clear clear clear clear
EOL_Isolation_sts clear clear clear clear
Min1BrkApd_Sts clear clear clear clear
BAL_Isolation_sts clear clear clear clear
AWS_Service_Brake clear clear clear clear
AWS_Emy_Brake clear clear clear clear
NS_Progress clear clear clear clear
Main_Head_Light_sts set set set set
Selector_Switch_sts clear clear clear clear
Horn_sts clear clear clear clear
Flasher_sts_CAB_1 clear clear clear clear
Flasher_sts_CAB_2 clear clear clear clear
Wiper_ON_sts clear clear clear clear
Under_Volt_sts clear clear clear clear
Data_logging_paras3 NUM 0 0 0 0
Data_logging_paras4 NUM 0 0 0 0
Data_logging_paras5 NUM 0 0 0 0
Data_logging_paras6 NUM 0 0 0 0
DTC_DBC_CB set set set set
Key_SW_ON set set set set
Last_CO_DTC set set set set
RDM_command clear clear clear clear

Page 8
Sheet1

Forward_command set set set set


Reverse_command clear clear clear clear
Driver_command set set set set
Brake_command clear clear clear clear
Coast_command clear clear clear clear
HB_Apply clear clear clear clear
HB_Release set set set set
EBL_Triggered clear clear clear clear
EOL_SW_On clear clear clear clear
TPWS_Ser_Brake clear clear clear clear
Emy_Brk_command clear clear clear clear
Cab_Occupied_DTC set set set set
BU_Isolate Normal Normal Normal Normal
No_of_BU_s_configured
Panto_Up_Loc clear clear clear clear
Panto_Down_Loc clear clear clear clear
VCB_On_Loc clear clear clear clear
VCB_Off_Loc clear clear clear clear
Drive_Loc set set set set
Brake_Loc set set set set
Coast_Loc clear clear clear clear
Fwd_Loc set set set set
Rev_Loc clear clear clear clear
Line_isolator Open Open Open Open
EP_Brake_Test clear clear clear clear
Brake_Test_Master Invalid Invalid Invalid Invalid
Cruise_Mode set set set set
Cab2_Driving clear clear clear clear
EBL3_Driving set set set set
BAL_MCB_sts set set set set
BAL_ISO_SW_sts clear clear clear clear
MC2_Bg1_Iso
MC2_Bg2_Iso
BU_Isolate_Dsp
Bp_Isolation
PB_Apply_SW clear clear clear clear
PB_Release_SW clear clear clear clear
100Per_Light_command set set set set
50Per_Light_command clear clear clear clear
Door_Warning_Bell
All_Door_Closed
UV_Disable_Self_Test clear clear clear clear
C_wt_sim_frm_mcc clear clear clear clear
PB_Apply_Loc clear clear clear clear
PB_Release_Loc clear clear clear clear
MR_OK set set set set
Ignore_EP_Failed clear clear clear clear
Rake_TE_Interlock clear clear clear clear
Spr_W3B15 clear clear clear clear

Page 9
Sheet1

Panto_Up_Cab clear clear clear clear


Panto_Down_Cab clear clear clear clear
VCB_On_Cab clear clear clear clear
VCB_Off_Cab clear clear clear clear
Neutral_Section Clear Clear Clear Clear
MC1_LC1_seq_no 2 2 2 2
MC1_LC2_seq_no 10 10 10 10
ACU_RAP_Mode No RAP No RAP No RAP No RAP
ACU_NDTC_CO1_Cmd Clear Clear Clear Clear
ACU_MC2_CO1_Cmd Clear Clear Clear Clear
ACU_NDTC_CO2_Cmd Clear Clear Clear Clear
ACU_MC2_CO2_Cmd Clear Clear Clear Clear
MAC_ON_OFF Set Set Set Set
ADCR_Over_Ride Invalid Invalid Invalid Invalid
Zero_Speed Invalid Invalid Invalid Invalid
Panto_Down_DSP Invalid Invalid Invalid Invalid
VCB_Open_DSP Invalid Invalid Invalid Invalid
MC1_Bogie1_Isolate_DSP
MC1_Bogie2_Isolate_DSP
MAC_Command_DSP Invalid Invalid Invalid Invalid
Fault_Reset_command clear clear clear clear
Atleast_1VCB_On set set set set
EP_DTC_Iso_DSP
MC2_LC1_seq_no 6 6 6 6
MC2_LC2_seq_no 14 14 14 14
Health_LC_Cnt 16 16 16 16
Door_Control_Fail clear clear clear clear
MCC1_BE_torque_reference N-m 0 0 0 0
MCC1_TE_percentage % 9 9 9 9
MCC1_DISP_TE_BE_PERC % 9 9 9 9
MCC2_BE_torque_reference N-m 0 0 0 0
MCC2_TE_percentage % 9 9 9 9
MCC2_DISP_TE_BE_PERC % 9 9 9 9
BU_Number NUM 2 2 2 2
NDTCLignts_L1_On_sts set set set set
NDTCLights_L2_On_sts set set set set
NDTCLights_Emy_L1_On_sts set set set set
NDTCLights_Emy_L2_On_sts set set set set
NDTC415V_CO1_sts clear clear clear clear
NDTC415V_CO2_sts clear clear clear clear
NDTCPB_Applied_sts clear clear clear clear
NDTCPB_Released_sts set set set set
NDTCEbl_sts clear clear clear clear
NDTCSpr1 clear clear clear clear
NDTCSpr2 clear clear clear clear
NDTCSpr3 clear clear clear clear
NDTCSpr4 clear clear clear clear
NDTCSpr5 clear clear clear clear
NDTCSpr6 clear clear clear clear

Page 10
Sheet1

NDTCCompressor_Running_sts set set set set


NDTCPCC_MAC_Sw_sts
NDTC415V_CO1_Stk_High clear clear clear clear
NDTC415V_CO1_Stk_Low clear clear clear clear
NDTC415V_CO2_Stk_High clear clear clear clear
NDTC415V_CO2_Stk_Low clear clear clear clear
NDTCBG1_Sen1_Suspension_Flt clear clear clear clear
NDTCBG1_Sen2_Suspension_Flt clear clear clear clear
NDTCBG2_Sen1_Suspension_Flt clear clear clear clear
NDTCBG2_Sen2_Suspension_Flt clear clear clear clear
NDTCMAC_Pr_OK_sts set set set set
NDTCEBL3_Drop clear clear clear clear
NDTCPB_Rel_TL clear clear clear clear
NDTCMR_Sensor_Hlt Ok Ok Ok Ok
NDTCMore_Than_1_Sus_Fail clear clear clear clear
NDTCBG1_Sensor_1_Hlt Ok Ok Ok Ok
NDTCBG1_Sensor_2_Hlt Ok Ok Ok Ok
NDTCBG2_Sensor_1_Hlt Ok Ok Ok Ok
NDTCBG2_Sensor_2_Hlt Ok Ok Ok Ok
NDTCLights_L1_Stk_High clear clear clear clear
NDTCLights_L1_Stk_Low clear clear clear clear
NDTCLights_L2_Stk_High clear clear clear clear
NDTCLights_L2_Stk_Low clear clear clear clear
NDTCHB_Applied clear clear clear clear
NDTCHB_Released set set set set
NDTCEP_Applied clear clear clear clear
NDTCMin_1_Sus_failed clear clear clear clear
NDTCBP_Status Healthy Healthy Healthy Healthy
NDTCMain_Hit set set set set
NDTCRednt_Hlt set set set set
DTC_Air_suspension_pressure_1 bar 3.6 3.7 3.6 3.7
DTC_Air_suspension_pressure_2 bar 3.8 3.7 3.8 3.8
DTC_Air_suspension_pressure_3 bar 3.4 3.4 3.5 3.4
DTC_Air_suspension_pressure_4 bar 3.8 3.8 3.7 3.8
DTC_Coach_weight Tons 56.3 56.3 56.3 56.3
DTC_MR_sensor bar 9.2 9.2 9.2 9.2
DTC_BP_sensor bar -2.4 -2.4 -2.4 -2.4
LT_L1SRFB set set set set
LT_L2_SRFB set set set set
EMY_LT1_HF set set set set
EMY_LT2_HF set set set set
PASALR_TRG clear clear clear clear
PAS_MCB set set set set
RDM_DTC_SW clear clear clear clear
FWD_MCH_SW set set set set
REV_MCH_SW clear clear clear clear
DRV_MCH_SW set set set set
BRK_MCH_SW set set set set
CST_MCH_SW clear clear clear clear

Page 11
Sheet1

EBL2_HRFB set set set set


EBL3_SRFB set set set set
EBL1_HRFB set set set set
EBLBYPASHF clear clear clear clear
BAL_SRFB clear clear clear clear
BAL_TL clear clear clear clear
FARmpu1Smk clear clear clear clear
RARmpu1Smk clear clear clear clear
MR_PROKPSw set set set set
LBSR_FB clear clear clear clear
LBSR_BYPAS clear clear clear clear
FARmpu2Smk clear clear clear clear
RARmpu2Smk clear clear clear clear
MNR_ENT set set set set
MJR_ENT set set set set
MIN1_PB_TL clear clear clear clear
CAB1_OC_TL set set set set
CAB2_OC_TL clear clear clear clear
EMY_LTSSW clear clear clear clear
AC_ON clear clear clear clear
AC_OFF clear clear clear clear
AC_3PH_CO_L1 clear clear clear clear
AC_3PH_CO_L2 clear clear clear clear
LOC_SHNT clear clear clear clear
MR_OKPRSW set set set set
BP_OKPRSW set set set set
LDSRR_HRFB set set set set
LDSLR_HRFB set set set set
DPR_HRFB clear clear clear clear
SM_TL clear clear clear clear
PB_RELSWTL clear clear clear clear
PB_APYSWTL clear clear clear clear
PB_OK_PRSW set set set set
PB_APLD_HB clear clear clear clear
BG1ASR_IC clear clear clear clear
PB_IC clear clear clear clear
MAC_AUTOSW set set set set
MAC_ON_SW clear clear clear clear
MAC_OFF_SW clear clear clear clear
MAC_ON_SFB set set set set
MACA03PRSW set set set set
MACA05PRSW clear clear clear clear
BN_CONT_FB set set set set
BRKAPLDBCU clear clear clear clear
Spr_57 clear clear clear clear
BG2_T_PRES set set set set
BG1_T_PRES set set set set
BG2ASR_IC clear clear clear clear
BATSEL_MCB set set set set

Page 12
Sheet1

EOL3_SRFB clear clear clear clear


MR_ISO_COCK clear clear clear clear
Spr64 clear clear clear clear
ECN1_CB set set set set
ECN1_CB_861 set set set set
NDTC_EMY_BRK_CB set set set set
BMC_OFF clear clear clear clear
BAT_CRG_CB set set set set
EBCU1_EBCU2_CB set set set set
PB_MCB set set set set
PCU_R__PCU_CB set set set set
Spr_byte bits 0 0 0 0
LT_L1_KONT set set set set
LT_L2_KONT set set set set
EMY_COMP set set set set
EBL3_ROUT set set set set
BAL_MAIN clear clear clear clear
BN_UV_RMPU clear clear clear clear
PB_APPLY clear clear clear clear
PBREL_VOUT clear clear clear clear
EOL3_ROUT clear clear clear clear
MAC_ONKONT set set set set
3PH_CO_L1 clear clear clear clear
3PH_CO_L2 clear clear clear clear
AIR_DRNVLV clear clear clear clear
DOP_14 clear clear clear clear
DOP_15 clear clear clear clear
HB_REL_OP set set set set
DOP_17 set set set set
DOP_18 clear clear clear clear
DOP_19 clear clear clear clear
DOP_20 clear clear clear clear
DOP_21 clear clear clear clear
DOP_22 clear clear clear clear
DOP_23 clear clear clear clear
DOP_24 clear clear clear clear
DOP_25 clear clear clear clear
DOP_26 clear clear clear clear
DOP_27 clear clear clear clear
DOP_28 clear clear clear clear
DOP_29 clear clear clear clear
DOP_30 clear clear clear clear
DOP_31 clear clear clear clear
DOP_32 clear clear clear clear
DTC_BG1_EP_available K_N 27.5 27.5 27.5 27.5
DTC_BG2_EP_available K_N 27.5 27.5 27.5 27.5
DTC_BG1_BC_Pressure bar 0 0 0 0
DTC_BG2_BC_Pressure bar 0 0 0 0
DTC_BECU_Sts1_Spr1 clear clear clear clear

Page 13
Sheet1

DTC_BECU_Sts1_Spr2 clear clear clear clear


DTC_BECU_St1WPS_Active clear clear clear clear
DTC_BECU_Sts1_Spr3 clear clear clear clear
DTC_BECU_St1Brk_Applied_Sts clear clear clear clear
DTC_BECU_St1SB_Available set set set set
DTC_BECU_St1WPS_Test_Ready clear clear clear clear
DTC_BECU_St1WPS_Test_Sts_Runing clear clear clear clear
DTC_BECU_Sts2_Spr1 clear clear clear clear
DTC_BECU_Sts2_Spr2 clear clear clear clear
DTC_BECU_WPS_Active clear clear clear clear
DTC_BECU_Sts2_Spr3 clear clear clear clear
DTC_BECU_Brk_Applied_Sts clear clear clear clear
DTC_BECU_SB_Available clear clear clear clear
DTC_BECU_WPS_Test_Ready clear clear clear clear
DTC_BECU_WPS_Test_Sts_Runing clear clear clear clear
DTC_BECU_Direct_Brk_Bg1 clear clear clear clear
DTC_BECU_Direct_Brk_Bg2 clear clear clear clear
DTC_BECU_Car clear clear clear clear
DTC_BECU_Bg1 clear clear clear clear
DTC_BECU_Bg2 clear clear clear clear
DTC_PB_Iso_Cock clear clear clear clear
DTC_BECU_Sts3_Spr2 clear clear clear clear
DTC_BECU_Sts3_Spr3 clear clear clear clear
DTC_BECU_Drive set set set set
DTC_BECU_Coast clear clear clear clear
DTC_BECU_Brake clear clear clear clear
DTC_BECU_Emy_Brake clear clear clear clear
DTC_BECU_RDM clear clear clear clear
DTC_BECU_TPWS_Srv_Brk clear clear clear clear
DTC_BECU_Sts4_Spr1 clear clear clear clear
DTC_BECU_Sts4_Spr2 clear clear clear clear
DTCD1Fully_opned clear clear clear clear
DTCD1Closed set set set set
DTCD1Opened clear clear clear clear
DTCD1Obstacle_DeDTCD clear clear clear clear
DTCD1Emy_Device clear clear clear clear
DTCD1Critical_Failure clear clear clear clear
DTCD1Door_Isolated clear clear clear clear
DTCD2Fully_opned clear clear clear clear
DTCD2Closed set set set set
DTCD2Opened clear clear clear clear
DTCD2Obstacle_DeDTCD clear clear clear clear
DTCD2Emy_Device clear clear clear clear
DTCD2Critical_Failure clear clear clear clear
DTCD2Door_Isolated clear clear clear clear
DTCD3Fully_opned clear clear clear clear
DTCD3Closed set set set set
DTCD3Opened clear clear clear clear
DTCD3Obstacle_DeDTCD clear clear clear clear

Page 14
Sheet1

DTCD3Emy_Device clear clear clear clear


DTCD3Critical_Failure clear clear clear clear
DTCD3Door_Isolated clear clear clear clear
DTCD4Fully_opned clear clear clear clear
DTCD4Closed set set set set
DTCD4Opened clear clear clear clear
DTCD4Obstacle_DeDTCD clear clear clear clear
DTCD4Emy_Device clear clear clear clear
DTCD4Critical_Failure clear clear clear clear
DTCD4Door_Isolated clear clear clear clear
DTCRMPU1_Air_Con_ON_Sts clear clear clear clear
DTCRMPU1_Air_Con_ON_Sts1 set set set set
DTCRMPU1_Blower1_ON_Sts set set set set
DTCRMPU1_Blower2_ON_Sts clear clear clear clear
DTCRMPU1_Compr1_ON_Sts clear clear clear clear
DTCRMPU1_Compr2_ON_Sts set set set set
DTCRMPU1_Emy_Blower_ON_Sts clear clear clear clear
DTCRMPU1_Relative_Hiumidity set set set set
DTCRMPU1_Condensor_Fan1_Sts set set set set
DTCRMPU1_Condensor_Fan2_Sts set set set set
DTCRMPU2_Air_Con_ON_Sts clear clear clear clear
DTCRMPU2_Air_Con_ON_Sts1 set set set set
DTCRMPU2_Blower1_ON_Sts set set set set
DTCRMPU2_Blower2_ON_Sts clear clear clear clear
DTCRMPU2_Compr1_ON_Sts clear clear clear clear
DTCRMPU2_Compr2_ON_Sts set set set set
DTCRMPU2_Emy_Blower_ON_Sts clear clear clear clear
DTCRMPU2_Relative_Hiumidity clear clear clear clear
DTCRMPU2_Condensor_Fan1_Sts set set set set
DTCRMPU2_Condensor_Fan2_Sts clear clear clear clear
TCLignts_L1_On_sts set set set set
TCLights_L2_On_sts set set set set
TCLights_Emy_L1_On_sts set set set set
TCLights_Emy_L2_On_sts set set set set
TCPB_Applied_sts clear clear clear clear
TCPB_Released_sts set set set set
TCEbl_sts clear clear clear clear
TCVCB_Sts set set set set
TCPanto_Graph_Sts set set set set
TCTF_Blw_LS_sts clear clear clear clear
TCTF_Blw_HS_sts set set set set
TCAAC_Sts clear clear clear clear
TCTF_Oil_Pump_sts set set set set
TCBG1_Sen1_Suspension_Flt clear clear clear clear
TCBG1_Sen2_Suspension_Flt clear clear clear clear
TCBG2_Sen1_Suspension_Flt clear clear clear clear
TCBG2_Sen2_Suspension_Flt clear clear clear clear
TCEBL3_Drop clear clear clear clear
TCPB_Rel_TL clear clear clear clear

Page 15
Sheet1

TCMore_Than_1_Sus_Fail clear clear clear clear


TCBG1_Sensor_1_Hlt Ok Ok Ok Ok
TCBG1_Sensor_2_Hlt Ok Ok Ok Ok
TCBG2_Sensor_1_Hlt Ok Ok Ok Ok
TCBG2_Sensor_2_Hlt Ok Ok Ok Ok
TCLights_L1_Stk_High clear clear clear clear
TCLights_L1_Stk_Low clear clear clear clear
TCLights_L2_Stk_High clear clear clear clear
TCLights_L2_Stk_Low clear clear clear clear
TCHB_Applied clear clear clear clear
TCHB_Released set set set set
TCEP_Applied clear clear clear clear
TCMin_1_Sus_failed clear clear clear clear
TC_BP_Status Healthy Healthy Healthy Healthy
TCMain_Hit set set set set
TCRednt_Hlt set set set set
TC_Air_suspension_pressure_1 bar 4.1 4 4 4
TC_Air_suspension_pressure_2 bar 4.1 4.1 4.1 4.2
TC_Air_suspension_pressure_3 bar 3.7 3.7 3.8 3.8
TC_Air_suspension_pressure_4 bar 4 4 3.9 4
TC_Coach_weight Tons 59.6 59.7 59.6 59.8
Vcb_Trip_Num NUM None None None None
TC_Op_Mode NUM PWR PWR PWR PWR
LIGHTS_L1_SRFB set set set set
LIGHTS_L2_SRFB set set set set
EMY_LGTS1_HRFB set set set set
EMY_LGTS2_HRFB set set set set
PAS_ALRM_TRIG_IN clear clear clear clear
PAS_MCB_861 set set set set
RDM_DTC_SW_861 clear clear clear clear
FWD_MCH_SW_861 set set set set
REV_MCH_SW_861 clear clear clear clear
DRIVE_MCH_SW set set set set
BRAKE_MCH_SW set set set set
COAST_MCH_SW clear clear clear clear
EBL2_HRFB_IN set set set set
EBL3_SRFB_IN set set set set
EBL1_HRFB_IN set set set set
EBL_BYPAS_HRFB_IN clear clear clear clear
BAL_SRFB_IN clear clear clear clear
BAL_TL_IN clear clear clear clear
Rmpu1_FASmoke_IN clear clear clear clear
Rmpu1_RASmoke_IN clear clear clear clear
Rmpu2_FASmoke_IN clear clear clear clear
Rmpu2_RASmoke_IN clear clear clear clear
EBCU1_MCB set set set set
EBCU2_MCB set set set set
MRPRESS set set set set
BPPRESS set set set set

Page 16
Sheet1

PB_IC_861 clear clear clear clear


BG1ASRIC clear clear clear clear
PAN1_4_SW clear clear clear clear
PAN2_3_SW set set set set
EMY_LTS_SW clear clear clear clear
ENS_TL clear clear clear clear
BG2ASRIC clear clear clear clear
BG1BCPRS set set set set
BG2BCPRS set set set set
EPBRKAPLD clear clear clear clear
SM_TL_861 clear clear clear clear
AC_3PH_CO_SRFB clear clear clear clear
LDSRR_HF set set set set
LDSLR_HF clear clear clear clear
DPR_HRFB_861 clear clear clear clear
PB_MCB set set set set
PBRELSWTL clear clear clear clear
PBAPYSWTL clear clear clear clear
PB_OKPRSW set set set set
PBAPLEDHF clear clear clear clear
MAJREVNT clear clear clear clear
MINREVNT set set set set
PANUP_CSW clear clear clear clear
PANDW_CSW clear clear clear clear
VCB_ON_CSW clear clear clear clear
VCB_OFF_CSW clear clear clear clear
MIN1_PB_TL_861 clear clear clear clear
LBSR_FB_861 clear clear clear clear
LBRBYPASSW clear clear clear clear
EOL3_SRFB_861 set set set set
AACOKPRSW set set set set
AAC_SRFB clear clear clear clear
EOL1OK_HF set set set set
EOL2OK_HF set set set set
TF_B1_HS_SF clear clear clear clear
TF_B2_HS_SF clear clear clear clear
TFOIL_PMP_CB set set set set
TFOIL_FLW set set set set
TFOIL_LVL set set set set
TFOILPRES set set set set
EOL123OK set set set set
VCB_FB_NO set set set set
VCB_FB_NC clear clear clear clear
VCB_ON_SF set set set set
PANVCB_CB set set set set
AAC_MAN_ON_SW clear clear clear clear
PANADDPSW clear clear clear clear
VCBTrip1 clear clear clear clear
VCBTrip2 clear clear clear clear

Page 17
Sheet1

TFOILPMP_SFB set set set set


TF_B1_LS_SF set set set set
TF_B2_LS_SF set set set set
TFSEC_WAT clear clear clear clear
TF_MRHS_WAT clear clear clear clear
TFOIL_LWR set set set set
ACU_MCB set set set set
PH3CON1FB set set set set
PNORDPRSW clear clear clear clear
PH3CON2FB set set set set
LISO_ONSF clear clear clear clear
LISO_ONF1 clear clear clear clear
LISO_OFF_SF set set set set
LISO_OFF_FB set set set set
TFOIL_P2_SF clear clear clear clear
EPC_EPCUR_CB set set set set
ETB_TCMCB set set set set
ECN1_DLCB set set set set
ECN2_DRCB set set set set
EBK_LISCB set set set set
EXTFLTAC2 clear clear clear clear
LTS_L1_K set set set set
LTS_L2_K set set set set
EMYCOM_RO set set set set
EBL3_RO set set set set
BALMAN_RO clear clear clear clear
TFOIL_P2_K clear clear clear clear
PB_APPLY_VOUT clear clear clear clear
PB_RELEASE_VOUT clear clear clear clear
EOL3_ROUT_861 set set set set
DOP10 clear clear clear clear
AC_3PH_CO clear clear clear clear
DOP12 clear clear clear clear
OHEAVLSTS set set set set
ACU1_415E set set set set
UV_BN clear clear clear clear
HBRELO_P set set set set
AAC_CONT clear clear clear clear
PANUP_VLV set set set set
PANDW_VLV clear clear clear clear
VCB_RLY set set set set
LISO_ON_R clear clear clear clear
LISO_OFF_R set set set set
TFBLW1L_K set set set set
TFBLW2L_K set set set set
TFOILPMPK set set set set
TFBLW1H1K clear clear clear clear
TFBLW1H2K clear clear clear clear
TFBLW2H1K clear clear clear clear

Page 18
Sheet1

TFBLW2H2K clear clear clear clear


ST_OF_PAN set set set set
ST_OF_VCB set set set set
ACU2_415E set set set set
DOP33 clear clear clear clear
DOP34 clear clear clear clear
DOP35 clear clear clear clear
DOP36 clear clear clear clear
DOP37 clear clear clear clear
DOP38 clear clear clear clear
DOP39 clear clear clear clear
DOP40 clear clear clear clear
DOP41 clear clear clear clear
DOP42 clear clear clear clear
DOP43 clear clear clear clear
DOP44 clear clear clear clear
DOP45 clear clear clear clear
DOP46 clear clear clear clear
DOP47 clear clear clear clear
DOP48 clear clear clear clear
TC_BG1_EP_available K_N 30.25 30.25 30.25 30.25
TC_BG2_EP_available K_N 29 29 29 29
TC_BG1_BC_Pressure bar 0 0 0 0
TC_BG2_BC_Pressure bar 0 0 0 0
TC_BECU_Sts1_Spr1 clear clear clear clear
TC_BECU_Sts1_Spr2 clear clear clear clear
TC_BECU_St1WPS_Active clear clear clear clear
TC_BECU_Sts1_Spr3 clear clear clear clear
TC_BECU_St1Brk_Applied_Sts clear clear clear clear
TC_BECU_St1SB_Available set set set set
TC_BECU_St1WPS_Test_Ready clear clear clear clear
TC_BECU_St1WPS_Test_Sts_Runing clear clear clear clear
TC_BECU_Sts2_Spr1 clear clear clear clear
TC_BECU_Sts2_Spr2 clear clear clear clear
TC_BECU_WPS_Active clear clear clear clear
TC_BECU_Sts2_Spr3 clear clear clear clear
TC_BECU_Brk_Applied_Sts clear clear clear clear
TC_BECU_SB_Available clear clear clear clear
TC_BECU_WPS_Test_Ready clear clear clear clear
TC_BECU_WPS_Test_Sts_Runing clear clear clear clear
TC_BECU_Direct_Brk_Bg1 clear clear clear clear
TC_BECU_Direct_Brk_Bg2 clear clear clear clear
TC_BECU_Car clear clear clear clear
TC_BECU_Bg1 clear clear clear clear
TC_BECU_Bg2 clear clear clear clear
TC_PB_Iso_Cock clear clear clear clear
TC_BECU_Sts3_Spr2 clear clear clear clear
TC_BECU_Sts3_Spr3 clear clear clear clear
TC_BECU_Drive set set set set

Page 19
Sheet1

TC_BECU_Coast clear clear clear clear


TC_BECU_Brake clear clear clear clear
TC_BECU_Emy_Brake clear clear clear clear
TC_BECU_RDM clear clear clear clear
TC_BECU_TPWS_Srv_Brk clear clear clear clear
TC_BECU_Sts4_Spr1 clear clear clear clear
TC_BECU_Sts4_Spr2 clear clear clear clear
TCD1Fully_opned clear clear clear clear
TCD1Closed set set set set
TCD1Opened clear clear clear clear
TCD1Obstacle_Detcd clear clear clear clear
TCD1Emy_Device clear clear clear clear
TCD1Critical_Failure clear clear clear clear
TCD1Door_Isolated clear clear clear clear
TCD2Fully_opned clear clear clear clear
TCD2Closed set set set set
TCD2Opened clear clear clear clear
TCD2Obstacle_Detcd clear clear clear clear
TCD2Emy_Device clear clear clear clear
TCD2Critical_Failure clear clear clear clear
TCD2Door_Isolated clear clear clear clear
TCD3Fully_opned clear clear clear clear
TCD3Closed set set set set
TCD3Opened clear clear clear clear
TCD3Obstacle_Detcd clear clear clear clear
TCD3Emy_Device clear clear clear clear
TCD3Critical_Failure clear clear clear clear
TCD3Door_Isolated clear clear clear clear
TCD4Fully_opned clear clear clear clear
TCD4Closed set set set set
TCD4Opened clear clear clear clear
TCD4Obstacle_Detcd clear clear clear clear
TCD4Emy_Device clear clear clear clear
TCD4Critical_Failure set set set set
TCD4Door_Isolated clear clear clear clear
TCRMPU1_Air_Con_ON_Sts clear clear clear clear
TCRMPU1_Air_Con_ON_Sts1 set set set set
TCRMPU1_Blower1_ON_Sts set set set set
TCRMPU1_Blower2_ON_Sts clear clear clear clear
TCRMPU1_Compr1_ON_Sts clear clear clear clear
TCRMPU1_Compr2_ON_Sts set set set set
TCRMPU1_Emy_Blower_ON_Sts clear clear clear clear
TCRMPU1_Relative_Hiumidity clear clear clear clear
TCRMPU1_Condensor_Fan1_Sts set set set set
TCRMPU1_Condensor_Fan2_Sts set set set set
TCRMPU2_Air_Con_ON_Sts clear clear clear clear
TCRMPU2_Air_Con_ON_Sts1 set set set set
TCRMPU2_Blower1_ON_Sts set set set set
TCRMPU2_Blower2_ON_Sts clear clear clear clear

Page 20
Sheet1

TCRMPU2_Compr1_ON_Sts clear clear clear clear


TCRMPU2_Compr2_ON_Sts set set set set
TCRMPU2_Emy_Blower_ON_Sts clear clear clear clear
TCRMPU2_Relative_Hiumidity clear clear clear clear
TCRMPU2_Condensor_Fan1_Sts set set set set
TCRMPU2_Condensor_Fan2_Sts clear clear clear clear
BU1_OHE_Voltage kV 24.5 24.5 24.4 24.4
BU1_OHE_Current A 13.3 13.5 14.3 14.2
TRAN_OIL_TEMP1 oC 43 43 43 43
TRAN_OIL_TEMP2 - 43 43 42 43
BU_speed - 41.4 41.3 41.2 41.1
Primary_Current - 13.3 13.5 13.7 13.7
Return_Current - 12.6 13 14.3 14.3
MC1Lignts_L1_On_sts set set set set
MC1Lights_L2_On_sts set set set set
MC1Lights_Emy_L1_On_sts set set set set
MC1Lights_Emy_L2_On_sts set set set set
MC1Spr90 clear clear clear clear
MC1Spr91 clear clear clear clear
MC1PB_Applied_sts clear clear clear clear
MC1PB_Released_sts set set set set
MC1Ebl_sts clear clear clear clear
MC1Spr1 clear clear clear clear
MC1Spr2 clear clear clear clear
MC1Spr3 clear clear clear clear
MC1Spr4 clear clear clear clear
MC1Spr5 clear clear clear clear
MC1Spr6 clear clear clear clear
MC1Spr7 clear clear clear clear
MC1Spr8 clear clear clear clear
MC1Spr9 clear clear clear clear
MC1Spr10 clear clear clear clear
MC1Spr11 clear clear clear clear
MC1Spr12 clear clear clear clear
MC1Spr13 clear clear clear clear
MC1BG1_Sen1_Suspension_Flt clear clear clear clear
MC1BG1_Sen2_Suspension_Flt clear clear clear clear
MC1BG2_Sen1_Suspension_Flt clear clear clear clear
MC1BG2_Sen2_Suspension_Flt clear clear clear clear
MC1Spr14 clear clear clear clear
MC1EBL3_Drop clear clear clear clear
MC1PB_Rel_TL clear clear clear clear
MC1Spr15 Ok Ok Ok Ok
MC1More_Than_1_Sus_Fail clear clear clear clear
MC1BG1_Sensor_1_Hlt Ok Ok Ok Ok
MC1BG1_Sensor_2_Hlt Ok Ok Ok Ok
MC1BG2_Sensor_1_Hlt Ok Ok Ok Ok
MC1BG2_Sensor_2_Hlt Ok Ok Ok Ok
MC1Lights_L1_Stk_High clear clear clear clear

Page 21
Sheet1

MC1Lights_L1_Stk_Low clear clear clear clear


MC1Lights_L2_Stk_High clear clear clear clear
MC1Lights_L2_Stk_Low clear clear clear clear
MC1HB_Applied clear clear clear clear
MC1HB_Released set set set set
MC1EP_Applied clear clear clear clear
MC1Min_1_Sus_failed clear clear clear clear
MC1_BP_Status Healthy Healthy Healthy Healthy
MC1Main_Hit set set set set
MC1Rednt_Hlt set set set set
MC1_Air_suspension_pressure_1 bar 3.4 3.4 3.4 3.4
MC1_Air_suspension_pressure_2 bar 3.4 3.4 3.4 3.4
MC1_Air_suspension_pressure_3 bar 3.5 3.5 3.6 3.5
MC1_Air_suspension_pressure_4 bar 3.4 3.4 3.3 3.4
M1Coach_weight Tons 60.4 60.3 60.3 60.3
M1MR_sensor bar -5 -5 -5 -5
M1BP_sensor bar -2.4 -2.4 -2.4 -2.4
M1LIGHTS_L1_SRFB set set set set
M1LIGHTS_L2_SRFB set set set set
M1EMY_LGTS1_HRFB set set set set
M1EMY_LGTS2_HRFB set set set set
M1PAS_ALRM_TRIG clear clear clear clear
M1PAS_MCB set set set set
M1RDM_DTC_SW clear clear clear clear
M1FWD_MCH_SW set set set set
M1REV_MCH_SW clear clear clear clear
M1DRIVE_MCH_SW set set set set
M1BRAKE_MCH_SW set set set set
M1COAST_MCH_SW clear clear clear clear
M1EBL2_HRFB set set set set
M1EBL3_SRFB set set set set
M1EBL1_HRFB set set set set
M1EBL_BYPAS_HRFB clear clear clear clear
M1BAL_SRFB clear clear clear clear
M1BAL_TL clear clear clear clear
M1Rmpu1_Smoke clear clear clear clear
M1Rmpu2_Smoke clear clear clear clear
M1Spr21 clear clear clear clear
M1LBSR_FB clear clear clear clear
M1LBSR_BYPAS clear clear clear clear
M1FARmpu2Smk clear clear clear clear
M1RARmpu2Smk set set set set
M1MNR_ENT clear clear clear clear
M1MJR_ENT set set set set
M1MIN1_PB_TL clear clear clear clear
M1CAB1_OC_TL set set set set
M1CAB2_OC_TL clear clear clear clear
M1EMY_LTS_SW clear clear clear clear
M1AC_ON clear clear clear clear

Page 22
Sheet1

M1AC_OFF clear clear clear clear


M1Spr_34 clear clear clear clear
M1Spr_35 clear clear clear clear
M1Spr_36 clear clear clear clear
M1MR_OK_PRSW set set set set
M1BP_OK_PRSW set set set set
M1LDSRR_HRFB set set set set
M1LDSLR_HRFB set set set set
M1DPR_HRFB clear clear clear clear
M1SM_TL clear clear clear clear
M1PBREL_SWTL clear clear clear clear
M1PBAPY_SWTL clear clear clear clear
M1PBAPL_PRSW set set set set
M1PB_APLD_HF clear clear clear clear
M1BG1_ASR_IC clear clear clear clear
M1PB_IC clear clear clear clear
M1NS_CAB_SW clear clear clear clear
M1TCCBLW1_CB set set set set
M1TCCBLW2_CB set set set set
M1EARTH_SW clear clear clear clear
M1LTC1_MCB set set set set
M1Spr_54 clear clear clear clear
M1LTC2_MCB set set set set
M1EPBRK_APLD clear clear clear clear
M1ED_CUTOFF clear clear clear clear
M1BG2BC_PRES set set set set
M1BG1BC_PRES set set set set
M1BG2_ASR_IC clear clear clear clear
M1Spr_61 clear clear clear clear
M1Spr_62 clear clear clear clear
M1Spr_63 clear clear clear clear
M1MCUR_MCUCB set set set set
M1ECN1_DL_CB set set set set
M1ECN2_DR_CB set set set set
M1MCOM_EBKCB set set set set
M1Spr_68 clear clear clear clear
M1Spr_69 clear clear clear clear
M1BCU1_2CB set set set set
M1PB_MCB set set set set
M1Spr_72 clear clear clear clear
M1LT_L1_KONT set set set set
M1LT_L2_KONT set set set set
M1EMY_COMP set set set set
M1EBL3_ROUT set set set set
M1BAL_MAIN clear clear clear clear
M1DOP_6 clear clear clear clear
M1PB_APPLY clear clear clear clear
M1PBREL_VOUT clear clear clear clear
M1_DOP9 clear clear clear clear

Page 23
Sheet1

M1_DOP10 clear clear clear clear


M1_DOP11 clear clear clear clear
M1_DOP12 clear clear clear clear
M1DOP13 clear clear clear clear
M1DOP14 clear clear clear clear
M1BN_UV_RMPU clear clear clear clear
M1HB_REL_OP set set set set
M1DOP17 clear clear clear clear
M1DOP18 clear clear clear clear
M1DOP19 clear clear clear clear
M1DOP20 clear clear clear clear
M1DOP21 clear clear clear clear
M1DOP22 clear clear clear clear
M1DOP23 clear clear clear clear
M1DOP24 clear clear clear clear
M1DOP25 clear clear clear clear
M1DOP26 clear clear clear clear
M1DOP27 clear clear clear clear
M1DOP28 clear clear clear clear
M1DOP29 clear clear clear clear
M1ED_BRK_ACTIVE clear clear clear clear
M1ED_BRK_WSP_ACT clear clear clear clear
M1DOP32 clear clear clear clear
M1_BG1_EP_available K_N 31.5 31.5 31.5 31.5
M1_BG2_EP_available K_N 31.5 31.5 31.5 31.5
MC1_BG1_BC_Pressure bar 0 0 0 0
MC1_BG2_BC_Pressure bar 0 0 0 0
MC1_BECU_Sts1_Spr1 clear clear clear clear
MC1_BECU_Sts1_Spr2 clear clear clear clear
MC1_BECU_St1WPS_Active clear clear clear clear
MC1_BECU_Sts1_Spr3 clear clear clear clear
MC1_BECU_St1Brk_Applied_Sts clear clear clear clear
MC1_BECU_St1SB_Available set set set set
MC1_BECU_St1WPS_Test_Ready clear clear clear clear
MC1_BECU_St1WPS_Test_Sts_Runing clear clear clear clear
MC1_BECU_Sts2_Spr1 clear clear clear clear
MC1_BECU_Sts2_Spr2 clear clear clear clear
MC1_BECU_WPS_Active clear clear clear clear
MC1_BECU_Sts2_Spr3 clear clear clear clear
MC1_BECU_Brk_Applied_Sts clear clear clear clear
MC1_BECU_SB_Available clear clear clear clear
MC1_BECU_WPS_Test_Ready clear clear clear clear
MC1_BECU_WPS_Test_Sts_Runing clear clear clear clear
MC1_BECU_Direct_Brk_Bg1 clear clear clear clear
MC1_BECU_Direct_Brk_Bg2 clear clear clear clear
MC1_BECU_Car clear clear clear clear
MC1_BECU_Bg1 clear clear clear clear
MC1_BECU_Bg2 clear clear clear clear
MC1_PB_Iso_Cock clear clear clear clear

Page 24
Sheet1

MC1_BECU_Sts3_Spr2 clear clear clear clear


MC1_BECU_Sts3_Spr3 clear clear clear clear
MC1_BECU_Drive set set set set
MC1_BECU_Coast clear clear clear clear
MC1_BECU_Brake clear clear clear clear
MC1_BECU_Emy_Brake clear clear clear clear
MC1_BECU_RDM clear clear clear clear
MC1_BECU_TPWS_Srv_Brk clear clear clear clear
MC1_BECU_Sts4_Spr1 clear clear clear clear
MC1_BECU_Sts4_Spr2 clear clear clear clear
MC1D1Fully_opned clear clear clear clear
MC1D1Closed set set set set
MC1D1Opened clear clear clear clear
MC1D1Obstacle_Detcd clear clear clear clear
MC1D1Emy_Device clear clear clear clear
MC1D1Critical_Failure clear clear clear clear
MC1D1Door_Isolated clear clear clear clear
MC1D2Fully_opned clear clear clear clear
MC1D2Closed set set set set
MC1D2Opened clear clear clear clear
MC1D2Obstacle_Detcd clear clear clear clear
MC1D2Emy_Device clear clear clear clear
MC1D2Critical_Failure clear clear clear clear
MC1D2Door_Isolated clear clear clear clear
MC1D3Fully_opned clear clear clear clear
MC1D3Closed set set set set
MC1D3Opened clear clear clear clear
MC1D3Obstacle_Detcd clear clear clear clear
MC1D3Emy_Device clear clear clear clear
MC1D3Critical_Failure clear clear clear clear
MC1D3Door_Isolated clear clear clear clear
MC1D4Fully_opned clear clear clear clear
MC1D4Closed set set set set
MC1D4Opened clear clear clear clear
MC1D4Obstacle_Detcd clear clear clear clear
MC1D4Emy_Device clear clear clear clear
MC1D4Critical_Failure clear clear clear clear
MC1D4Door_Isolated clear clear clear clear
MC1RMPU1_Air_Con_ON_Sts clear clear clear clear
MC1RMPU1_Air_Con_ON_Sts1 set set set set
MC1RMPU1_Blower1_ON_Sts set set set set
MC1RMPU1_Blower2_ON_Sts clear clear clear clear
MC1RMPU1_Compr1_ON_Sts set set set set
MC1RMPU1_Compr2_ON_Sts set set set set
MC1RMPU1_Emy_Blower_ON_Sts clear clear clear clear
MC1RMPU1_Relative_Hiumidity clear clear clear clear
MC1RMPU1_Condensor_Fan1_Sts set set set set
MC1RMPU1_Condensor_Fan2_Sts set set set set
MC1RMPU2_Air_Con_ON_Sts clear clear clear clear

Page 25
Sheet1

MC1RMPU2_Air_Con_ON_Sts1 set set set set


MC1RMPU2_Blower1_ON_Sts set set set set
MC1RMPU2_Blower2_ON_Sts clear clear clear clear
MC1RMPU2_Compr1_ON_Sts clear clear clear clear
MC1RMPU2_Compr2_ON_Sts clear clear clear clear
MC1RMPU2_Emy_Blower_ON_Sts clear clear clear clear
MC1RMPU2_Relative_Hiumidity set set set set
MC1RMPU2_Condensor_Fan1_Sts clear clear clear clear
MC1RMPU2_Condensor_Fan2_Sts clear clear clear clear
M1Mot_prohibit_num NUM None None None None
M1No_of_active_Inverters NUM 2 2 2 2
M1Direction_TM_1 Fwd Fwd Fwd Fwd
M1Direction_TM_2 Fwd Fwd Fwd Fwd
M1Direction_TM_3 Fwd Fwd Fwd Fwd
M1Direction_TM_4 Fwd Fwd Fwd Fwd
M1All_Mot_Fwd set set set set
M1All_Mot_Rev clear clear clear clear
M1Etb_Fwd_Der_Cmd set set set set
M1Etb_Rev_Der_Cmd clear clear clear clear
M1Wheel_Slip_2_Indication clear clear clear clear
M1Wheel_Slip_4_Indication clear clear clear clear
M1Speed_Ignore_TM_1 clear clear clear clear
M1Speed_Ignore_TM_2 clear clear clear clear
M1Speed_Ignore_TM_3 clear clear clear clear
M1Speed_Ignore_TM_4 clear clear clear clear
M1Inv1_Active set set set set
M1Inv2_Active set set set set
M1Wheel_Slip_TM_1 clear clear clear clear
M1Wheel_Slip_TM_2 clear clear clear clear
M1Wheel_Slip_TM_3 clear clear clear clear
M1Wheel_Slip_TM_4 clear clear clear clear
M1ETB_NS_Command Invalid Invalid Invalid Invalid
M1NS_Progress Invalid Invalid Invalid Invalid
M1NS_Opmode clear clear clear clear
M1NS_Start_LC_Disable clear clear clear clear
M1NS_Start_VCB_Open clear clear clear clear
M1Wsm_Spr_Flag_1 clear clear clear clear
M1Roll_back_by_MCC clear clear clear clear
M1Wsm_Spr_Flag_3 clear clear clear clear
M1LC1_Active clear clear clear clear
M1LC2_Active clear clear clear clear
M1Average_Speed kmph 41.4 41.4 41.3 41.1
M1Inv1_Torque_ref N-m 191 231 263 292
M1Inv2_Torque_ref N-m 191 231 263 292
M1Inv1_Torque_feedback N-m 186 226 252 288
M1Inv2_Torque_feedback N-m 192 220 252 298
M1Inv1_RPM RPM 1192 1190 1187 1184
M1Inv2_RPM RPM 1192 1189 1186 1184
M1Inv1_RPM_Limit NUM 1249 1247 1244 1241

Page 26
Sheet1

M1Inv2_RPM_Limit NUM 1249 1247 1244 1241


M1Average_RRPM RPM 1190 1188 1185 1182
M1Final_TE_percentage15 % 4.1 4.9 5.6 6.2
M1Total_Percentage_TE_Avail15 % 99.1 99.1 99.1 99.1
M1Total_Percentage_TE_Fbk15 % 1.2 1.4 1.5 1.8
M1Total_Percentage_OHE_Der_Demand % 100 100 100 100
M1Tbm_ui_Perc_EPBE_Availx15 % 100 100 100 100
M1Tbm_ui_Perc_EDBE_Availx15 % 100 100 100 100
M1Tbm_ui_Tot_BE_TrqDemand N-m 0 0 0 0
M1Tbm_ui_TotEdBe_TrqDemand N-m 0 0 0 0
M1Tbm_ui_TotEpBe_TrqDemand N-m 0 0 0 0
M1Tbm_ui_TotEDTrq_Fbk N-m 0 0 0 0
M1Tbm_ui_TotEPTrq_Fbk N-m 0 0 0 0
M1Inv1Per_Trq_availability % 99 99 99 99
M1Inv2Per_Trq_availability % 99 99 99 99
M1Inv1Per_final_stall_Trq % 4 4 5 6
M1Inv2Per_final_stall_Trq % 4 4 5 6
M1Inv1Per_power_availability % 100 100 100 100
M1Inv2Per_power_availability % 100 100 100 100
M1Inv1Per_final_power % 100 100 100 100
M1Inv2Per_final_power % 100 100 100 100
M1_Ep_Reference_DTC N-m 0 0 0 0
M1_Ep_Reference_MC1 N-m 0 0 0 0
M1_Ep_Feedback_DTC N-m 0 0 0 0
M1_Ep_Feedback_MC1 N-m 0 0 0 0
M1LTC1_reference_power kW 690 690 690 690
M1LTC2_reference_power kW 690 690 690 690
M1LTC1_feeback_power kW 42 54 64 60
M1LTC2_feeback_power kW 50 48 46 59
M1LTC1_Total_Shaft_Power kW 23 28 31 35
M1LTC2_Total_Shaft_Power kW 23 27 31 36
M1_INV1_Efficiency - 52.6 53.8 58.7 58.9
M1_INV2_Efficiency - 48.7 54.3 56 60.5
M1_INV1_Mot1_Wheel_Dia NUM 951 951 951 951
M1_INV1_Mot2_Wheel_Dia NUM 951 951 951 951
M1_INV2_Mot1_Wheel_Dia NUM 36 36 36 36
M1_INV2_Mot2_Wheel_Dia NUM 952 952 952 952
M1_Mcc_stat1 - 49272 49272 49272 49272
M1_RefWheel_Rpm RPM 1190 1188 1185 1182
M1_INV1_TE_BE_Limit - MAX_TRQ_LMT
MAX_TRQ_LMT
MAX_TRQ_LMT
MAX_TRQ_LMT
M1_INV2_TE_BE_Limit - MAX_TRQ_LMT
MAX_TRQ_LMT
MAX_TRQ_LMT
MAX_TRQ_LMT
M1_Avail_Ed_trq N-m 8540 8540 8540 8540
M1OHE_Power kW 0 0 0 0
M1_MC_Opmode - PWR PWR PWR PWR
M1_FGU_Per Hz 0 0 0 0
M1_Wheel_Dia_Fail_Num NUM 0 0 0 0
M1_L1Motoring set set set set
M1_L1Idle clear clear clear clear
M1_L1Forward clear clear clear clear

Page 27
Sheet1

M1_L1Reverse set set set set


M1_L1Neutral_Sec_ON clear clear clear clear
M1_L1TC_Enable clear clear clear clear
M1_L1NS_Tmc_DclvCntrl_En set set set set
M1_L1SelfTstEnable clear clear clear clear
M1_L1OneLCShtDwn set set set set
M1_L1AllTmStatorSensFlty clear clear clear clear
M1_L1ACU1PhFlty clear clear clear clear
M1_L1Hi_acceleration set set set set
M1_L1SpdSen_Connected_Rev clear clear clear clear
M1_L1BC_Applied clear clear clear clear
M1_L1AllWhSlip clear clear clear clear
M1_L1LTC1CW1_Spr clear clear clear clear
M1_LTC1_Line_frequency NUM 25547 25536 25546 25542
M1_LTC1_Appx_avg_mot_RPM NUM 1191 1188 1185 1183
M1_LTC1_Appx_avg_mot_StTemp NUM 69 69 69 69
M1_LTC1_RefWhRpm NUM 1191 1188 1185 1183
M1_LTC1_Aux_Pwr_Trq NUM 0 0 0 0
M1_L1Mot set set set set
M1_L1Reg_Braking clear clear clear clear
M1_L1Idle_861 clear clear clear clear
M1_L1Forwd set set set set
M1_L1Rev clear clear clear clear
M1_L1Panto_up_sts set set set set
M1_L1VCB_On_sts set set set set
M1_L1Line_Converter_Enb set set set set
M1_L1OvlIgbtfireReq clear clear clear clear
M1_L1Fault_Ack clear clear clear clear
M1_L1SelfTstEnab set set set set
M1_L1VcbONRlyFbk set set set set
M1_L1Ph3_Availble set set set set
M1_L1Acu_pwm_en clear clear clear clear
M1_L1Spr14 clear clear clear clear
M1_L1Spr15 set set set set
M1_L2Motoring set set set set
M1_L2Idle clear clear clear clear
M1_L2Forward clear clear clear clear
M1_L2Reverse set set set set
M1_L2Neutral_Sec_ON clear clear clear clear
M1_L2TC_Enable clear clear clear clear
M1_L2NS_Tmc_DclvCntrl_En set set set set
M1_L2SelfTstEnable clear clear clear clear
M1_L2OneLCShtDwn set set set set
M1_L2AllTmStatorSensFlty clear clear clear clear
M1_L2ACU1PhFlty clear clear clear clear
M1_L2Hi_acceleration set set set set
M1_L2SpdSen_Connected_Rev clear clear clear clear
M1_L2BC_Applied clear clear clear clear
M1_L2AllWhSlip clear clear clear clear

Page 28
Sheet1

M1_L2LTC2CW1_Spr clear clear clear clear


M1_LTC2_Line_frequency NUM 25547 25538 25546 25541
M1_LTC2_Appx_avg_mot_RPM NUM 1191 1189 1186 1183
M1_LTC2_Appx_avg_mot_StTemp NUM 69 69 69 69
M1_LTC2_RefWhRpm NUM 1191 1189 1186 1183
M1_LTC2_Aux_Pwr_Trq NUM 0 0 0 0
M1_L2Mot set set set set
M1_L2Reg_Braking clear clear clear clear
M1_L2Idle_861 clear clear clear clear
M1_L2FoWd set set set set
M1_L2Rev clear clear clear clear
M1_L2Panto_up_sts set set set set
M1_L2VCB_On_sts set set set set
M1_L2Line_Converter_Enb set set set set
M1_L2OvlIgbtfireReq clear clear clear clear
M1_L2Fault_Ack clear clear clear clear
M1_L2SelfTstEnaBb set set set set
M1_L2VcbONRlyFbk set set set set
M1_L2Ph3_Availble set set set set
M1_L2Acu_pwm_en clear clear clear clear
M1_L2Spr14 clear clear clear clear
M1_L2Spr15 set set set set
M1_I1Vce_Sat_Fault clear clear clear clear
M1_I1Differential_Speed_Fault clear clear clear clear
M1_I1Current_Crossed_Maximum_Limit clear clear clear clear
M1_I1Tx_Open_ShutDown clear clear clear clear
M1_I1TI_RPM_Crossed_Maximum_Limit clear clear clear clear
M1_I1Phase_Current_Sensors_Faulty clear clear clear clear
M1_I1ATC_to_TMC_Comm_Failed_TMC clear clear clear clear
M1_I1Pinion_Slip_Detected clear clear clear clear
M1_I1ControlData_Checksum_Failed clear clear clear clear
M1_I1Gate_Drive_Power_Supply_Missing_RX_open clear clear clear clear
M1_I1DCLV_Crossed_Maximum_Limit clear clear clear clear
M1_I1Locked_Axle_Detected clear clear clear clear
M1_I1DCLV_Below_Minimum_Limit clear clear clear clear
M1_I1Motor_Phase_Reversal_Detected clear clear clear clear
M1_I1ATC_Shutdown clear clear clear clear
M1_I1ATC2TMC_Comm_ATC_Failed clear clear clear clear
M1_I1Wheel_Slip_Deration_Flag clear clear clear clear
M1_I1LC_Deration_flag clear clear clear clear
M1_I1DCLV_Deration_flag clear clear clear clear
M1_I1Spr162 clear clear clear clear
M1_I1Spr163 clear clear clear clear
M1_I1Spr164 clear clear clear clear
M1_I1Spr165 clear clear clear clear
M1_I1Spr166 clear clear clear clear
M1_I1Motoring set set set set
M1_I1Regeneration_Braking clear clear clear clear
M1_I1Idle clear clear clear clear

Page 29
Sheet1

M1_I1TM1_Direction_Flag_EQEP_flag set set set set


M1_I1Spr175 clear clear clear clear
M1_I1TM1_Speed_Sensor_Faulty_Speed_Ignore clear clear clear clear
M1_I1TM1_RollBack_Ignore clear clear clear clear
M1_I1TM1_Teeth_Not_Passed clear clear clear clear
M1INV1_Total_Deration_Factor % 100 100 100 100
M1_I1Spr186 clear clear clear clear
M1_I1Spr187 clear clear clear clear
M1_I1Spr188 clear clear clear clear
M1_I1TM2_Direction_Flag_EQEP_Flag clear clear clear clear
M1_I1Spr189 clear clear clear clear
M1_I1TM2_Speed_Sensor_Faulty_Speed_Ignore clear clear clear clear
M1_I1TM2_RollBack_Ignore clear clear clear clear
M1_I1TM2_Teeth_Not_Passed clear clear clear clear
M1_I1INV1_UVPh_HSTempSnsrhlth set set set set
M1_I1INV1_Wph_BCH_HSTempSnsrhlth set set set set
M1_I1INV1_Sensor_Hlt_Spr0 set set set set
M1_I1INV1_TM1_Statrsnsrhlth set set set set
M1_I1INV1_TM2_Statrsnsrhlth set set set set
M1_I1INV1_SS_cnectrs_open set set set set
M1_I1INV1_IO_card_PS_health clear clear clear clear
M1_I1INV1_IO_card_Sense clear clear clear clear
M1_I1INV1_COMB_Power_supply clear clear clear clear
M1_I1INV1_Speed_sensor1_OC clear clear clear clear
M1_I1INV1_Speed_sensor2_OC clear clear clear clear
M1INV1_statusdata41 NUM 0 0 0 0
M1INV1_statusdata42 NUM 0 0 0 0
M1INV1_Torque_Feedback_262 N-m 186 226 252 288
M1INV1_TM1_RPM RPM 1193 1190 1186 1183
M1INV1_TM2_RPM RPM 1192 1190 1189 1185
M1_I1FrlessthanFsl clear clear clear clear
M1_I1Idbuild_completed set set set set
M1_I1NS_enable clear clear clear clear
M1_I1Sensorless_enable clear clear clear clear
M1_I1Spr203 clear clear clear clear
M1_I1Spr204 clear clear clear clear
M1_I1Spr205 clear clear clear clear
M1_I1Spr206 clear clear clear clear
M1_I1Spr207 clear clear clear clear
M1_I1Spr208 clear clear clear clear
M1_I1Spr209 clear clear clear clear
M1_I1Spr210 clear clear clear clear
M1_I1Spr211 clear clear clear clear
M1_I1Spr212 clear clear clear clear
M1_I1Spr213 clear clear clear clear
M1_I1Spr214 clear clear clear clear
M1_I2Vce_Sat_Fault clear clear clear clear
M1_I2Differential_Speed_Fault clear clear clear clear
M1_I2Current_Crossed_Maximum_Limit clear clear clear clear

Page 30
Sheet1

M1_I2Tx_Open_ShutDown clear clear clear clear


M1_I2TI_RPM_Crossed_Maximum_Limit clear clear clear clear
M1_I2Phase_Current_Sensors_Faulty clear clear clear clear
M1_I2ATC_to_TMC_Comm_Failed_TMC clear clear clear clear
M1_I2Pinion_Slip_Detected clear clear clear clear
M1_I2ControlData_Checksum_Failed clear clear clear clear
M1_I2Gate_Drive_Power_Supply_Missing_RX_open clear clear clear clear
M1_I2DCLV_Crossed_Maximum_Limit clear clear clear clear
M1_I2Locked_Axle_Detected clear clear clear clear
M1_I2DCLV_Below_Minimum_Limit clear clear clear clear
M1_I2Motor_Phase_Reversal_Detected clear clear clear clear
M1_I2ATC_Shutdown clear clear clear clear
M1_I2ATC2TMC_Comm_ATC_Failed clear clear clear clear
M1_I2Wheel_Slip_Deration_Flag clear clear clear clear
M1_I2LC_Deration_flag clear clear clear clear
M1_I2DCLV_Deration_flag clear clear clear clear
M1_I2Spr218 clear clear clear clear
M1_I2Spr219 clear clear clear clear
M1_I2Spr220 clear clear clear clear
M1_I2Spr221 clear clear clear clear
M1_I2Spr222 clear clear clear clear
M1_I2Motoring set set set set
M1_I2Regeneration_Braking clear clear clear clear
M1_I2Idle clear clear clear clear
M1_I2TM1_Direction_Flag_EQEP_flag set set set set
M1_I2Spr231 clear clear clear clear
M1_I2TM1_Speed_Sensor_Faulty_Ignore clear clear clear clear
M1_I2TM1_RollBack_Ignore clear clear clear clear
M1_I2TM1_Teeth_Not_Passed clear clear clear clear
M1INV2_Total_Deration_Factor % 100 100 100 100
M1_I2Spr241 clear clear clear clear
M1_I2Spr242 clear clear clear clear
M1_I2Spr243 clear clear clear clear
M1_I2TM2_Direction_Flag_EQEP_Flag clear clear clear clear
M1_I2Spr244 clear clear clear clear
M1_I2TM2_Speed_Sensor_Faulty_Ignore clear clear clear clear
M1_I2TM2_RollBack_Ignore clear clear clear clear
M1_I2TM2_Teeth_Not_Passed clear clear clear clear
M1_I2INV2_UVPh_HSTempSnsrhlth set set set set
M1_I2INV2_Wph_BCH_HSTempSnsrhlth set set set set
M1_I2INV2_Sensor_Hlt_Spr0 set set set set
M1_I2INV2_TM1_Statrsnsrhlth set set set set
M1_I2INV2_TM2_Statrsnsrhlth set set set set
M1_I2INV2_SS_cnectrs_open set set set set
M1_I2INV2_IO_card_PS_health clear clear clear clear
M1_I2INV2_IO_card_Sense clear clear clear clear
M1_I2INV2_COMB_Power_supply clear clear clear clear
M1_I2INV2_Speed_sensor1_OC clear clear clear clear
M1_I2INV2_Speed_sensor2_OC clear clear clear clear

Page 31
Sheet1

M1INV2_statusdata41 NUM 0 0 0 0
M1INV2_statusdata42 NUM 0 0 0 0
M1INV2_Torque_Feedback_274 N-m 192 220 252 298
M1INV2_TM1_RPM RPM 1192 1190 1187 1184
M1INV2_TM2_RPM RPM 1193 1190 1188 1185
M1_I2FrlessthanFsl clear clear clear clear
M1_I2Idbuild_completed set set set set
M1_I2NS_enable clear clear clear clear
M1_I2Sensorless_enable clear clear clear clear
M1_I2Spr258 clear clear clear clear
M1_I2Spr259 clear clear clear clear
M1_I2Spr260 clear clear clear clear
M1_I2Spr261 clear clear clear clear
M1_I2Spr262 clear clear clear clear
M1_I2Spr263 clear clear clear clear
M1_I2Spr264 clear clear clear clear
M1_I2Spr265 clear clear clear clear
M1_I2Spr266 clear clear clear clear
M1_I2Spr267 clear clear clear clear
M1_I2Spr268 clear clear clear clear
M1_I2Spr269 clear clear clear clear
M1_LC1_Brake_chopper_Current A 0 0 0 0
M1_LC1_Line_Freq Hz 49 49 49 49
M1_LC1_Power_Factor - 0.95 0.97 0.98 0.97
M1_LC1_Earth_Fault_Voltage V 1367 1369 1366 1368
M1LC1_Pre_Charging_Contactor_Fb Low Low Low Low
M1LC1_Line_Converter_Contactor_NO_FB High High High High
M1LC1_Line_Converter_Contactor_NC_FB Low Low Low Low
M1LC1_Blower_Fb High High High High
M1LC1_DIO5 Low Low Low Low
M1LC1_DIO6 Low Low Low Low
M1LC1_DIO7 Low Low Low Low
M1LC1_DIO8 Low Low Low Low
M1LC1_Pre_charging_Output Low Low Low Low
M1LC1_Line_Output High High High High
M1LC1_VCB_ON_Output Low Low Low Low
M1LC1_Blower_Enable High High High High
M1LC1_DIO9 Low Low Low Low
M1LC1_DIO10 Low Low Low Low
M1LC1_DIO11 Low Low Low Low
M1LC1_DIO12 Low Low Low Low
M1LC1ST_CFG clear clear clear clear
M1LC1Shutdown_issued_By_MCALC clear clear clear clear
M1LC1Vp_Sensor_Faulty clear clear clear clear
M1LC1Is_Sensor_Faulty clear clear clear clear
M1LC1Precharging_Failed clear clear clear clear
M1LC1LC_Control_Reached_Saturation clear clear clear clear
M1LC1BCH_IGBT_Short_Circuit clear clear clear clear
M1LC1Both_DCLV_Sensors_Faulty clear clear clear clear

Page 32
Sheet1

M1LC1Shutdown_issued_By_OLC clear clear clear clear


M1LC1Shutdown_issued_By_TC clear clear clear clear
M1LC1DC_Link_Short_Circuited clear clear clear clear
M1LC1LC1_SHD2_Spr3 clear clear clear clear
M1LC1LC1_SHD2_Spr2 clear clear clear clear
M1LC1LC1_SHD2_Spr1 clear clear clear clear
M1LC1ALC_ShutDown clear clear clear clear
M1LC1ALC_to_LC_Comm_Failed_By_ALC clear clear clear clear
M1_LC1_OHE_Voltage V 24.4 24.5 24.4 24.5
M1_LC1_Is_rms_Sec_Current A 49 62 73 68
M1_LC1_IsrefMag NUM 70.5 82.4 86.4 87.6
M1_LC1_DCLV1 V 1795 1792 1796 1798
M1LC1Secondary_Current_Crossed_MaxLimit clear clear clear clear
M1LC1PLLUnable2Lock clear clear clear clear
M1LC1Catenary_V_Frequency_Out_of_Limits clear clear clear clear
M1LC1Vce_Sat_Detection_Fault clear clear clear clear
M1LC1LC_PWM_OFC_Tx_Failure clear clear clear clear
M1LC1LC_PWM_OFC_Rx_Failure clear clear clear clear
M1LC1Vp_Below_Minimum_Fault clear clear clear clear
M1LC1DCLVCrossedMaxLimit clear clear clear clear
M1LC1DCLV_Sensed_High_dVbydT clear clear clear clear
M1LC1DCLVCrossedMinLimit clear clear clear clear
M1LC1Eflt_At_DCL_Positive_Side clear clear clear clear
M1LC1Eflt_At_DCL_Negative_Side clear clear clear clear
M1LC1Eflt_At_Tf_OR_TM_Side clear clear clear clear
M1LC1LC1_SHD1_Spr2 clear clear clear clear
M1LC1LC_ALC_DPR_Comm_Failed clear clear clear clear
M1LC1LC1_SHD1_Spr1 clear clear clear clear
M1LC1PLL_Locked_sts Locked Locked Locked Locked
M1LC1Volt_Regulation_Enable Enabled Enabled Enabled Enabled
M1LC1LC1_LC_CFG_SHD2TC clear clear clear clear
M1LC1BCH_TEST_OK Passed Passed Passed Passed
M1LC1High_Speed_1ms_FDP_Freeze_Flag clear clear clear clear
M1LC1High_Speed_62p5uSec_FDP_Freeze_Flag clear clear clear clear
M1LC1LC1_LC_Flag_sts_Spr1 No No No No
M1LC1BCH_Circuit_Faulty Healthy Healthy Healthy Healthy
M1LC1LC_Ready Ready Ready Ready Ready
M1LC1VCB_trip_request_to_MCC clear clear clear clear
M1LC1LC1_LC_Flag_sts_Spr2 clear clear clear clear
M1LC1Lock_Out_Bit_For_LC_SHD clear clear clear clear
M1LC1Pulse_Staggering_Number_Change_Bit clear clear clear clear
M1LC1LC1_LC_Flag_sts_Spr3 clear clear clear clear
M1LC1LC1_LC_Flag_sts_Spr4 clear clear clear clear
M1LC1LC1_LC_Flag_sts_Spr5 clear clear clear clear
M1_LC1_DCLV2 V 1800 1790 1795 1797
M1_LC2_Brake_chopper_Current A 0 0 0 0
M1_LC2_Line_Freq Hz 49 49 49 49
M1_LC2_Power_Factor - 0.98 0.97 0.95 0.97
M1_LC2_Earth_Fault_Voltage V 1366 1365 1362 1367

Page 33
Sheet1

M1LC2_Pre_Charging_Contactor_Fb Low Low Low Low


M1LC2_Line_Converter_Contactor_NO_FB High High High High
M1LC2_Line_Converter_Contactor_NC_FB Low Low Low Low
M1LC2_Blower_Fb High High High High
M1LC2_DIO5 Low Low Low Low
M1LC2_DIO6 Low Low Low Low
M1LC2_DIO7 Low Low Low Low
M1LC2_DIO8 Low Low Low Low
M1LC2_Pre_charging_Output Low Low Low Low
M1LC2_Line_Output High High High High
M1LC2_VCB_ON_Output Low Low Low Low
M1LC2_Blower_Enable High High High High
M1LC2_DIO9 Low Low Low Low
M1LC2_DIO10 Low Low Low Low
M1LC2_DIO11 Low Low Low Low
M1LC2_DIO12 Low Low Low Low
M1LC2ST_CFG clear clear clear clear
M1LC2Shutdown_issued_By_MCALC clear clear clear clear
M1LC2Vp_Sensor_Faulty clear clear clear clear
M1LC2Is_Sensor_Faulty clear clear clear clear
M1LC2Precharging_Failed clear clear clear clear
M1LC2LC_Control_Reached_Saturation clear clear clear clear
M1LC2BCH_IGBT_Short_Circuit clear clear clear clear
M1LC2Both_DCLV_Sensors_Faulty clear clear clear clear
M1LC2Shutdown_issued_By_OLC clear clear clear clear
M1LC2Shutdown_issued_By_TC clear clear clear clear
M1LC2DC_Link_Short_Circuited clear clear clear clear
M1LC2LC2_SHD2_Spr3 clear clear clear clear
M1LC2LC2_SHD2_Spr2 clear clear clear clear
M1LC2LC2_SHD2_Spr1 clear clear clear clear
M1LC2ALC_ShutDown clear clear clear clear
M1LC2ALC_to_LC_Comm_Failed_By_ALC clear clear clear clear
M1_LC2_OHE_Voltage V 24.4 24.6 24.6 24.6
M1_LC2_Is_rms_Sec_Current A 57 55 53 67
M1_LC2_IsrefMag NUM 65.7 74.5 69.2 96.7
M1_LC2_DCLV1 V 1803 1799 1808 1797
M1LC2Secondary_Current_Crossed_MaxLimit clear clear clear clear
M1LC2PLLUnable2Lock clear clear clear clear
M1LC2Catenary_V_Frequency_Out_of_Limits clear clear clear clear
M1LC2Vce_Sat_Detection_Fault clear clear clear clear
M1LC2LC_PWM_OFC_Tx_Failure clear clear clear clear
M1LC2LC_PWM_OFC_Rx_Failure clear clear clear clear
M1LC2Vp_Below_Minimum_Fault clear clear clear clear
M1LC2DCLVCrossedMaxLimit clear clear clear clear
M1LC2DCLV_Sensed_High_dVbydT clear clear clear clear
M1LC2DCLVCrossedMinLimit clear clear clear clear
M1LC2Eflt_At_DCL_Positive_Side clear clear clear clear
M1LC2Eflt_At_DCL_Negative_Side clear clear clear clear
M1LC2Eflt_At_Tf_OR_TM_Side clear clear clear clear

Page 34
Sheet1

M1LC2LC2_SHD1_Spr2 clear clear clear clear


M1LC2LC_ALC_DPR_Comm_Failed clear clear clear clear
M1LC2LC2_SHD1_Spr1 clear clear clear clear
M1LC2PLL_Locked_sts Locked Locked Locked Locked
M1LC2Volt_Regulation_Enable Enabled Enabled Enabled Enabled
M1LC2LC2_LC_CFG_SHD2TC clear clear clear clear
M1LC2BCH_TEST_OK Passed Passed Passed Passed
M1LC2High_Speed_1ms_FDP_Freeze_Flag clear clear clear clear
M1LC2High_Speed_62p5uSec_FDP_Freeze_Flag clear clear clear clear
M1LC2LC2_LC_Flag_sts_Spr1 No No No No
M1LC2BCH_Circuit_Faulty Healthy Healthy Healthy Healthy
M1LC2LC_Ready Ready Ready Ready Ready
M1LC2VCB_trip_request_to_MCC clear clear clear clear
M1LC2LC2_LC_Flag_sts_Spr2 clear clear clear clear
M1LC2Lock_Out_Bit_For_LC_SHD clear clear clear clear
M1LC2Pulse_Staggering_Number_Change_Bit clear clear clear clear
M1LC2LC2_LC_Flag_sts_Spr3 clear clear clear clear
M1LC2LC2_LC_Flag_sts_Spr4 clear clear clear clear
M1LC2LC2_LC_Flag_sts_Spr5 clear clear clear clear
M1_LC2_DCLV2 V 1798 1801 1810 1799
MC2Lignts_L1_On_sts set set set set
MC2Lights_L2_On_sts set set set set
MC2Lights_Emy_L1_On_sts set set set set
MC2Lights_Emy_L2_On_sts set set set set
MC2_415V_CO1_sts clear clear clear clear
MC2_415V_CO2_sts clear clear clear clear
MC2PB_Applied_sts clear clear clear clear
MC2PB_Released_sts set set set set
MC2Ebl_sts clear clear clear clear
MC2Spr1 clear clear clear clear
MC2Spr2 clear clear clear clear
MC2Spr3 clear clear clear clear
MC2Spr4 clear clear clear clear
MC2Spr5 clear clear clear clear
MC2Spr6 clear clear clear clear
MC2Spr7 clear clear clear clear
MC2Spr8 clear clear clear clear
MC2Spr9 clear clear clear clear
MC2_415V_CO1_Stk_High clear clear clear clear
MC2_415V_CO1_Stk_Low clear clear clear clear
MC2_415V_CO2_Stk_High clear clear clear clear
MC2_415V_CO2_Stk_Low clear clear clear clear
MC2BG1_Sen1_Suspension_Flt clear clear clear clear
MC2BG1_Sen2_Suspension_Flt clear clear clear clear
MC2BG2_Sen1_Suspension_Flt clear clear clear clear
MC2BG2_Sen2_Suspension_Flt clear clear clear clear
MC2Spr10 clear clear clear clear
MC2EBL3_Drop clear clear clear clear
MC2PB_Rel_TL clear clear clear clear

Page 35
Sheet1

MC2Spr11 Ok Ok Ok Ok
MC2More_Than_1_Sus_Fail clear clear clear clear
MC2BG1_Sensor_1_Hlt Ok Ok Ok Ok
MC2BG1_Sensor_2_Hlt Ok Ok Ok Ok
MC2BG2_Sensor_1_Hlt Ok Ok Ok Ok
MC2BG2_Sensor_2_Hlt Ok Ok Ok Ok
MC2Lights_L1_Stk_High clear clear clear clear
MC2Lights_L1_Stk_Low clear clear clear clear
MC2Lights_L2_Stk_High clear clear clear clear
MC2Lights_L2_Stk_Low clear clear clear clear
MC2HB_Applied clear clear clear clear
MC2HB_Released set set set set
MC2EP_Applied clear clear clear clear
MC2Min_1_Sus_failed clear clear clear clear
MC2_BP_Status Healthy Healthy Healthy Healthy
MC2Main_Hit set set set set
MC2Rednt_Hlt set set set set
MC2_Air_suspension_pressure_1 bar 3.5 3.5 3.5 3.5
MC2_Air_suspension_pressure_2 bar 3.3 3.3 3.3 3.3
MC2_Air_suspension_pressure_3 bar 3.1 3.1 3.1 3.1
MC2_Air_suspension_pressure_4 bar 3.5 3.5 3.5 3.5
M2Coach_weight Tons 59.5 59.6 59.5 59.5
M2MR_sensor bar -5 -5 -5 -5
M2BP_sensor bar -2.4 -2.4 -2.4 -2.4
M2LIGHTS_L1_SRFB set set set set
M2LIGHTS_L2_SRFB set set set set
M2EMY_LGTS1_HRFB set set set set
M2EMY_LGTS2_HRFB set set set set
M2PAS_ALRM_TRIG clear clear clear clear
M2PAS_MCB set set set set
M2RDM_DTC_SW clear clear clear clear
M2FWD_MCH_SW set set set set
M2REV_MCH_SW clear clear clear clear
M2DRIVE_MCH_SW set set set set
M2BRAKE_MCH_SW set set set set
M2COAST_MCH_SW clear clear clear clear
M2EBL2_HRFB set set set set
M2EBL3_SRFB set set set set
M2EBL1_HRFB set set set set
M2EBL_BYPAS_HRFB clear clear clear clear
M2BAL_SRFB clear clear clear clear
M2BAL_TL clear clear clear clear
M2Rmpu1_Smoke clear clear clear clear
M2Rmpu2_Smoke set set set set
M2Spr21 clear clear clear clear
M2LBSR_FB clear clear clear clear
M2LBSR_BYPAS clear clear clear clear
M2FARmpu2Smk clear clear clear clear
M2RARmpu2Smk clear clear clear clear

Page 36
Sheet1

M2MNR_ENT set set set set


M2MJR_ENT set set set set
M2MIN1_PB_TL clear clear clear clear
M2CAB1_OC_TL set set set set
M2CAB2_OC_TL clear clear clear clear
M2EMY_LTS_SW clear clear clear clear
M2AC_ON clear clear clear clear
M2AC_OFF clear clear clear clear
M2AC_3PH_CO_SRFB_L1 clear clear clear clear
M2AC_3PH_CO_SRFB_L2 clear clear clear clear
M2Spr_36 clear clear clear clear
M2MR_OK_PRSW set set set set
M2BP_OK_PRSW set set set set
M2LDSRR_HRFB set set set set
M2LDSLR_HRFB set set set set
M2DPR_HRFB clear clear clear clear
M2SM_TL clear clear clear clear
M2PBREL_SWTL clear clear clear clear
M2PBAPY_SWTL clear clear clear clear
M2PBAPL_PRSW set set set set
M2PB_APLD_HF clear clear clear clear
M2BG1_ASR_IC clear clear clear clear
M2PB_IC_IN clear clear clear clear
M2NS_CAB_SW clear clear clear clear
M2TCCBLW1_CB set set set set
M2TCCBLW2_CB set set set set
M2EARTH_SW clear clear clear clear
M2LTC1_MCB set set set set
M2Spr_54 clear clear clear clear
M2LTC2_MCB set set set set
M2EPBRK_APLD clear clear clear clear
M2ED_CUTOFF clear clear clear clear
M2BG2BC_PRES set set set set
M2BG1BC_PRES set set set set
M2BG2_ASR_IC clear clear clear clear
M2Spr_61 clear clear clear clear
M2Spr_62 clear clear clear clear
M2Spr_63 clear clear clear clear
M2MCUR_MCUCB set set set set
M2ECN1_DL_CB set set set set
M2ECN2_DR_CB set set set set
M2MCOM_EBKCB set set set set
M2Spr_68 clear clear clear clear
M2Spr_69 clear clear clear clear
M2BCU1_2CB set set set set
M2PB_MCB set set set set
M2Spr_72 clear clear clear clear
M2LT_L1_KONT set set set set
M2LT_L2_KONT set set set set

Page 37
Sheet1

M2EMY_COMP set set set set


M2EBL3_ROUT set set set set
M2BAL_MAIN clear clear clear clear
M2DOP_6 clear clear clear clear
M2PB_APPLY clear clear clear clear
M2PBREL_VOUT clear clear clear clear
M2_DOP9 clear clear clear clear
M2_DOP10 clear clear clear clear
M2AC3PH_COL1 clear clear clear clear
M2AC3PH_COL2 clear clear clear clear
M2DOP13 clear clear clear clear
M2DOP14 clear clear clear clear
M2BN_UV_RMPU clear clear clear clear
M2HB_REL_OP set set set set
M2DOP17 clear clear clear clear
M2DOP18 clear clear clear clear
M2DOP19 clear clear clear clear
M2DOP20 clear clear clear clear
M2DOP21 clear clear clear clear
M2DOP22 clear clear clear clear
M2DOP23 clear clear clear clear
M2DOP24 clear clear clear clear
M2DOP25 clear clear clear clear
M2DOP26 clear clear clear clear
M2DOP27 clear clear clear clear
M2DOP28 clear clear clear clear
M2DOP29 clear clear clear clear
M2ED_BRK_ACTIVE clear clear clear clear
M2ED_BRK_WSP_ACT clear clear clear clear
M2DOP32 clear clear clear clear
M2_BG1_EP_available K_N 31.25 31.25 31.25 31.25
M2_BG2_EP_available K_N 30.5 30.5 30.5 30.5
MC2_BG1_BC_Pressure bar 0 0 0 0
MC2_BG2_BC_Pressure bar 0 0 0 0
MC2_BECU_Sts1_Spr1 clear clear clear clear
MC2_BECU_Sts1_Spr2 clear clear clear clear
MC2_BECU_St1WPS_Active clear clear clear clear
MC2_BECU_Sts1_Spr3 clear clear clear clear
MC2_BECU_St1Brk_Applied_Sts clear clear clear clear
MC2_BECU_St1SB_Available set set set set
MC2_BECU_St1WPS_Test_Ready clear clear clear clear
MC2_BECU_St1WPS_Test_Sts_Runing clear clear clear clear
MC2_BECU_Sts2_Spr1 clear clear clear clear
MC2_BECU_Sts2_Spr2 clear clear clear clear
MC2_BECU_WPS_Active clear clear clear clear
MC2_BECU_Sts2_Spr3 clear clear clear clear
MC2_BECU_Brk_Applied_Sts clear clear clear clear
MC2_BECU_SB_Available clear clear clear clear
MC2_BECU_WPS_Test_Ready clear clear clear clear

Page 38
Sheet1

MC2_BECU_WPS_Test_Sts_Runing clear clear clear clear


MC2_BECU_Direct_Brk_Bg1 clear clear clear clear
MC2_BECU_Direct_Brk_Bg2 clear clear clear clear
MC2_BECU_Car clear clear clear clear
MC2_BECU_Bg1 clear clear clear clear
MC2_BECU_Bg2 clear clear clear clear
MC2_PB_Iso_Cock clear clear clear clear
MC2_BECU_Sts3_Spr2 clear clear clear clear
MC2_BECU_Sts3_Spr3 clear clear clear clear
MC2_BECU_Drive set set set set
MC2_BECU_Coast clear clear clear clear
MC2_BECU_Brake clear clear clear clear
MC2_BECU_Emy_Brake clear clear clear clear
MC2_BECU_RDM clear clear clear clear
MC2_BECU_TPWS_Srv_Brk clear clear clear clear
MC2_BECU_Sts4_Spr1 clear clear clear clear
MC2_BECU_Sts4_Spr2 clear clear clear clear
MC2D1Fully_opned clear clear clear clear
MC2D1Closed set set set set
MC2D1Opened clear clear clear clear
MC2D1Obstacle_Detcd clear clear clear clear
MC2D1Emy_Device clear clear clear clear
MC2D1Critical_Failure clear clear clear clear
MC2D1Door_Isolated clear clear clear clear
MC2D2Fully_opned clear clear clear clear
MC2D2Closed set set set set
MC2D2Opened clear clear clear clear
MC2D2Obstacle_Detcd clear clear clear clear
MC2D2Emy_Device clear clear clear clear
MC2D2Critical_Failure clear clear clear clear
MC2D2Door_Isolated clear clear clear clear
MC2D3Fully_opned clear clear clear clear
MC2D3Closed set set set set
MC2D3Opened clear clear clear clear
MC2D3Obstacle_Detcd clear clear clear clear
MC2D3Emy_Device clear clear clear clear
MC2D3Critical_Failure clear clear clear clear
MC2D3Door_Isolated clear clear clear clear
MC2D4Fully_opned clear clear clear clear
MC2D4Closed set set set set
MC2D4Opened clear clear clear clear
MC2D4Obstacle_Detcd clear clear clear clear
MC2D4Emy_Device clear clear clear clear
MC2D4Critical_Failure clear clear clear clear
MC2D4Door_Isolated clear clear clear clear
MC2RMPU1_Air_Con_ON_Sts clear clear clear clear
MC2RMPU1_Air_Con_ON_Sts1 clear clear clear clear
MC2RMPU1_Blower1_ON_Sts clear clear clear clear
MC2RMPU1_Blower2_ON_Sts clear clear clear clear

Page 39
Sheet1

MC2RMPU1_Compr1_ON_Sts clear clear clear clear


MC2RMPU1_Compr2_ON_Sts clear clear clear clear
MC2RMPU1_Emy_Blower_ON_Sts clear clear clear clear
MC2RMPU1_Relative_Hiumidity clear clear clear clear
MC2RMPU1_Condensor_Fan1_Sts clear clear clear clear
MC2RMPU1_Condensor_Fan2_Sts clear clear clear clear
MC2RMPU2_Air_Con_ON_Sts clear clear clear clear
MC2RMPU2_Air_Con_ON_Sts1 clear clear clear clear
MC2RMPU2_Blower1_ON_Sts clear clear clear clear
MC2RMPU2_Blower2_ON_Sts clear clear clear clear
MC2RMPU2_Compr1_ON_Sts clear clear clear clear
MC2RMPU2_Compr2_ON_Sts clear clear clear clear
MC2RMPU2_Emy_Blower_ON_Sts clear clear clear clear
MC2RMPU2_Relative_Hiumidity clear clear clear clear
MC2RMPU2_Condensor_Fan1_Sts clear clear clear clear
MC2RMPU2_Condensor_Fan2_Sts clear clear clear clear
M2Mot_prohibit_num NUM None None None None
M2No_of_active_Inverters NUM 2 2 2 2
M2Direction_TM_1 Fwd Fwd Fwd Fwd
M2Direction_TM_2 Fwd Fwd Fwd Fwd
M2Direction_TM_3 Fwd Fwd Fwd Fwd
M2Direction_TM_4 Fwd Fwd Fwd Fwd
M2All_Mot_Fwd set set set set
M2All_Mot_Rev clear clear clear clear
M2Etb_Fwd_Der_Cmd set set set set
M2Etb_Rev_Der_Cmd clear clear clear clear
M2Wheel_Slip_2_Indication clear clear clear clear
M2Wheel_Slip_4_Indication clear clear clear clear
M2Speed_Ignore_TM_1 clear clear clear clear
M2Speed_Ignore_TM_2 clear clear clear clear
M2Speed_Ignore_TM_3 clear clear clear clear
M2Speed_Ignore_TM_4 clear clear clear clear
M2Inv1_Active set set set set
M2Inv2_Active set set set set
M2Wheel_Slip_TM_1 clear clear clear clear
M2Wheel_Slip_TM_2 clear clear clear clear
M2Wheel_Slip_TM_3 clear clear clear clear
M2Wheel_Slip_TM_4 clear clear clear clear
M2ETB_NS_Command Invalid Invalid Invalid Invalid
M2NS_Progress Invalid Invalid Invalid Invalid
M2NS_Opmode clear clear clear clear
M2NS_Start_LC_Disable clear clear clear clear
M2NS_Start_VCB_Open clear clear clear clear
M2Wsm_Spr_Flag_1 clear clear clear clear
M2Roll_back_by_MCC clear clear clear clear
M2Wsm_Spr_Flag_3 clear clear clear clear
M2LC1_Active clear clear clear clear
M2LC2_Active clear clear clear clear
M2Average_Speed kmph 41.5 41.3 41.3 41.1

Page 40
Sheet1

M2Inv1_Torque_ref N-m 193 0 0 0


M2Inv2_Torque_ref N-m 193 469 533 591
M2Inv1_Torque_feedback N-m 186 0 0 0
M2Inv2_Torque_feedback N-m 190 462 524 600
M2Inv1_RPM RPM 1192 1189 1186 1183
M2Inv2_RPM RPM 1192 1189 1186 1184
M2Inv1_RPM_Limit NUM 1250 1246 1244 1241
M2Inv2_RPM_Limit NUM 1250 1246 1244 1241
M2Average_RRPM RPM 1191 1187 1185 1182
M2Final_TE_percentage15 % 4.1 5 5.7 6.3
M2Total_Percentage_TE_Avail15 % 100 50 50 50
M2Total_Percentage_TE_Fbk15 % 1.1 1.4 1.6 1.8
M2Total_Percentage_OHE_Der_Demand % 100 100 100 100
M2Tbm_ui_Perc_EPBE_Availx15 % 100 100 100 100
M2Tbm_ui_Perc_EDBE_Availx15 % 100 50 50 50
M2Tbm_ui_Tot_BE_TrqDemand N-m 0 0 0 0
M2Tbm_ui_TotEdBe_TrqDemand N-m 0 0 0 0
M2Tbm_ui_TotEpBe_TrqDemand N-m 0 0 0 0
M2Tbm_ui_TotEDTrq_Fbk N-m 0 0 0 0
M2Tbm_ui_TotEPTrq_Fbk N-m 0 0 0 0
M2Inv1_percentage_Torque_availability % 100 0 0 0
M2Inv2_percentage_Torque_availability % 100 100 100 100
M2Inv1_percentage_final_stall_Torque % 4 0 0 0
M2Inv2_percentage_final_stall_Torque % 4 9 11 12
M2Inv1_percentage_power_availability % 100 100 100 100
M2Inv2_percentage_power_availability % 100 100 100 100
M2Inv1_percentage_final_power % 100 100 100 100
M2Inv2_percentage_final_power % 100 100 100 100
M2_Ep_Reference_DTC N-m 0 0 0 0
M2_Ep_Reference_MC2 N-m 0 0 0 0
M2_Ep_Feedback_DTC N-m 0 0 0 0
M2_Ep_Feedback_MC2 N-m 0 0 0 0
M2LTC1_reference_power kW 690 690 690 690
M2LTC2_reference_power kW 690 690 690 690
M2LTC1_feeback_power kW 42 28 23 23
M2LTC2_feeback_power kW 48 78 87 95
M2LTC1_Total_Shaft_Power kW 23 0 0 0
M2LTC2_Total_Shaft_Power kW 23 57 65 74
M2_INV1_Efficiency - 51.9 35.6 30 30
M2_INV2_Efficiency - 49.2 69.4 74.3 77.1
M2_INV1_Mot1_Wheel_Dia NUM 951 951 951 951
M2_INV1_Mot2_Wheel_Dia NUM 952 952 952 952
M2_INV2_Mot1_Wheel_Dia NUM 36 36 36 36
M2_INV2_Mot2_Wheel_Dia NUM 955 955 955 955
M2_Mcc_stat1 - 49272 49272 49272 49272
M2_RefWheel_Rpm RPM 1191 1187 1185 1182
M2_INV1_TE_BE_Limit - MAX_TRQ_LMT
MAX_TRQ_LMT
MAX_TRQ_LMT
MAX_TRQ_LMT
M2_INV2_TE_BE_Limit - MAX_TRQ_LMT
MAX_TRQ_LMT
MAX_TRQ_LMT
MAX_TRQ_LMT
M2_Avail_ed_trq N-m 8540 4270 4270 4270

Page 41
Sheet1

M2OHE_Power kW 0 0 0 0
M2_MC_Opmode - PWR PWR PWR PWR
M2_FGU_Percentage Hz 0 0 0 0
M2_Wheel_Dia_Fail_Num NUM 0 0 0 0
M2_L1Motoring set set set set
M2_L1Idle clear clear clear clear
M2_L1Forward clear clear clear clear
M2_L1Reverse set set set set
M2_L1Neutral_Sec_ON clear clear clear clear
M2_L1TC_Enable clear clear clear clear
M2_L1NS_Tmc_DclvCntrl_En set set set set
M2_L1SelfTstEnable clear clear clear clear
M2_L1OneLCShtDwn set set set set
M2_L1AllTmStatorSensFlty clear clear clear clear
M2_L1ACU1PhFlty clear clear clear clear
M2_L1Hi_acceleration set set set set
M2_L1SpdSen_Connected_Rev clear clear clear clear
M2_L1BC_Applied clear clear clear clear
M2_L1AllWhSlip clear clear clear clear
M2_L1LTC1CW1_Spr clear clear clear clear
M2_LTC1_Line_frequency NUM 25546 25550 25544 25545
M2_LTC1_Appx_avg_mot_RPM NUM 1191 1188 1185 1183
M2_LTC1_Appx_avg_mot_StTemp NUM 62 143 143 143
M2_LTC1_RefWhRpm NUM 1191 1188 1185 1183
M2_LTC1_Aux_Pwr_Trq NUM 0 0 0 0
M2_L1Mot set set set set
M2_L1Reg_Braking clear clear clear clear
M2_L1Idle_861 clear clear clear clear
M2_L1Fowd set set set set
M2_L1Rev clear clear clear clear
M2_L1Panto_up_sts set set set set
M2_L1VCB_On_sts set set set set
M2_L1Line_Converter_Enb set set set set
M2_L1OvlIgbtfireReq clear clear clear clear
M2_L1Fault_Ack clear clear clear clear
M2_L1SelfTstEnb set set set set
M2_L1VcbONRlyFbk set set set set
M2_L1Ph3_Availble set set set set
M2_L1Acu_pwm_en clear clear clear clear
M2_L1Spr14 clear clear clear clear
M2_L1Spr15 set set set set
M2_L2Motoring set set set set
M2_L2Idle clear clear clear clear
M2_L2Forward clear clear clear clear
M2_L2Reverse set set set set
M2_L2Neutral_Sec_ON clear clear clear clear
M2_L2TC_Enable clear clear clear clear
M2_L2NS_Tmc_DclvCntrl_En set set set set
M2_L2SelfTstEnable clear clear clear clear

Page 42
Sheet1

M2_L2OneLCShtDwn set set set set


M2_L2AllTmStatorSensFlty clear clear clear clear
M2_L2ACU1PhFlty clear clear clear clear
M2_L2Hi_acceleration set set set set
M2_L2SpdSen_Connected_Rev clear clear clear clear
M2_L2BC_Applied clear clear clear clear
M2_L2AllWhSlip clear clear clear clear
M2_L2LTC2CW1_Spr clear clear clear clear
M2_LTC2_Line_frequency NUM 25548 25539 25540 25540
M2_LTC2_Appx_avg_mot_RPM NUM 1190 1187 1184 1182
M2_LTC2_Appx_avg_mot_StTemp NUM 69 69 69 69
M2_LTC2_RefWhRpm NUM 1190 1187 1184 1182
M2_LTC2_Aux_Pwr_Trq NUM 0 0 0 0
M2_L2Mot set set set set
M2_L2Reg_Braking clear clear clear clear
M2_L2Idle_861 clear clear clear clear
M2_L2Forwd set set set set
M2_L2Rev clear clear clear clear
M2_L2Panto_up_sts set set set set
M2_L2VCB_On_sts set set set set
M2_L2Line_Converter_Enb set set set set
M2_L2OvlIgbtfireReq clear clear clear clear
M2_L2Fault_Ack clear clear clear clear
M2_L2SelfTstEnb set set set set
M2_L2VcbONRlyFbk set set set set
M2_L2Ph3_Availble set set set set
M2_L2Acu_pwm_en clear clear clear clear
M2_L2Spr14 clear clear clear clear
M2_L2Spr15 set set set set
M2_I1Vce_Sat_Fault clear clear clear clear
M2_I1Differential_Speed_Fault clear clear clear clear
M2_I1Current_Crossed_Maximum_Limit clear clear clear clear
M2_I1Tx_Open_ShutDown clear clear clear clear
M2_I1TI_RPM_Crossed_Maximum_Limit clear clear clear clear
M2_I1Phase_Current_Sensors_Faulty clear clear clear clear
M2_I1ATC_to_TMC_Comm_Failed_TMC clear clear clear clear
M2_I1Pinion_Slip_Detected clear clear clear clear
M2_I1ControlData_Checksum_Failed clear clear clear clear
M2_I1Gate_Drive_Power_Supply_Missing_RX_open clear clear clear clear
M2_I1DCLV_Crossed_Maximum_Limit clear clear clear clear
M2_I1Locked_Axle_Detected clear clear clear clear
M2_I1DCLV_Below_Minimum_Limit clear clear clear clear
M2_I1Motor_Phase_Reversal_Detected clear clear clear clear
M2_I1ATC_Shutdown clear clear clear clear
M2_I1ATC2TMC_Comm_ATC_Failed clear clear clear clear
M2_I1Wheel_Slip_Deration_Flag clear clear clear clear
M2_I1LC_Deration_flag clear clear clear clear
M2_I1DCLV_Deration_flag clear clear clear clear
M2_I1Spr162 clear clear clear clear

Page 43
Sheet1

M2_I1Spr163 clear clear clear clear


M2_I1Spr164 clear clear clear clear
M2_I1Spr165 clear clear clear clear
M2_I1Spr166 clear clear clear clear
M2_I1Motoring set set set set
M2_I1Regeneration_Braking clear clear clear clear
M2_I1Idle clear clear clear clear
M2_I1TM1_Direction_Flag_EQEP_flag set set set set
M2_I1Spr175 clear clear clear clear
M2_I1TM1_Speed_Sensor_Faulty_Speed_Ignore clear clear clear clear
M2_I1TM1_RollBack_Ignore clear clear clear clear
M2_I1TM1_Teeth_Not_Passed clear clear clear clear
M2INV1_Total_Deration_Factor % 100 100 100 100
M2_I1Spr186 clear clear clear clear
M2_I1Spr187 clear clear clear clear
M2_I1Spr188 clear clear clear clear
M2_I1TM2_Direction_Flag_EQEP_Flag clear clear clear clear
M2_I1Spr189 clear clear clear clear
M2_I1TM2_Speed_Sensor_Faulty_Speed_Ignore clear clear clear clear
M2_I1TM2_RollBack_Ignore clear clear clear clear
M2_I1TM2_Teeth_Not_Passed clear clear clear clear
M2_I1INV1_UVPh_HSTempSnsrhlth set set set set
M2_I1INV1_Wph_BCH_HSTempSnsrhlth set set set set
M2_I1INV1_Sensor_Hlt_Spr0 set set set set
M2_I1INV1_TM1_Statrsnsrhlth clear set set set
M2_I1INV1_TM2_Statrsnsrhlth set set set set
M2_I1INV1_SS_cnectrs_open set set set set
M2_I1INV1_IO_card_PS_health clear clear clear clear
M2_I1INV1_IO_card_Sense clear clear clear clear
M2_I1INV1_COMB_Power_supply clear clear clear clear
M2_I1INV1_Speed_sensor1_OC clear clear clear clear
M2_I1INV1_Speed_sensor2_OC clear clear clear clear
M2INV1_statusdata41 NUM 0 0 0 0
M2INV1_statusdata42 NUM 0 0 0 0
M2INV1_Torque_Feedback_419 N-m 186 0 0 0
M2INV1_TM1_RPM RPM 1193 1189 1187 1183
M2INV1_TM2_RPM RPM 1193 1190 1187 1184
M2_I1FrlessthanFsl clear clear clear clear
M2_I1Idbuild_completed set set set set
M2_I1NS_enable clear clear clear clear
M2_I1Sensorless_enable clear clear clear clear
M2_I1Spr203 clear clear clear clear
M2_I1Spr204 clear clear clear clear
M2_I1Spr205 clear clear clear clear
M2_I1Spr206 clear clear clear clear
M2_I1Spr207 clear clear clear clear
M2_I1Spr208 clear clear clear clear
M2_I1Spr209 clear clear clear clear
M2_I1Spr210 clear clear clear clear

Page 44
Sheet1

M2_I1Spr211 clear clear clear clear


M2_I1Spr212 clear clear clear clear
M2_I1Spr213 clear clear clear clear
M2_I1Spr214 clear clear clear clear
M2_I2Vce_Sat_Fault clear clear clear clear
M2_I2Differential_Speed_Fault clear clear clear clear
M2_I2Current_Crossed_Maximum_Limit clear clear clear clear
M2_I2Tx_Open_ShutDown clear clear clear clear
M2_I2TI_RPM_Crossed_Maximum_Limit clear clear clear clear
M2_I2Phase_Current_Sensors_Faulty clear clear clear clear
M2_I2ATC_to_TMC_Comm_Failed_TMC clear clear clear clear
M2_I2Pinion_Slip_Detected clear clear clear clear
M2_I2ControlData_Checksum_Failed clear clear clear clear
M2_I2Gate_Drive_Power_Supply_Missing_RX_open clear clear clear clear
M2_I2DCLV_Crossed_Maximum_Limit clear clear clear clear
M2_I2Locked_Axle_Detected clear clear clear clear
M2_I2DCLV_Below_Minimum_Limit clear clear clear clear
M2_I2Motor_Phase_Reversal_Detected clear clear clear clear
M2_I2ATC_Shutdown clear clear clear clear
M2_I2ATC2TMC_Comm_ATC_Failed clear clear clear clear
M2_I2Wheel_Slip_Deration_Flag clear clear clear clear
M2_I2LC_Deration_flag clear clear clear clear
M2_I2DCLV_Deration_flag clear clear clear clear
M2_I2Spr218 clear clear clear clear
M2_I2Spr219 clear clear clear clear
M2_I2Spr220 clear clear clear clear
M2_I2Spr221 clear clear clear clear
M2_I2Spr222 clear clear clear clear
M2_I2Motoring set set set set
M2_I2Regeneration_Braking clear clear clear clear
M2_I2Idle clear clear clear clear
M2_I2TM1_Direction_Flag_EQEP_flag set set set set
M2_I2Spr231 clear clear clear clear
M2_I2TM1_Speed_Sensor_Faulty_Ignore clear clear clear clear
M2_I2TM1_RollBack_Ignore clear clear clear clear
M2_I2TM1_Teeth_Not_Passed clear clear clear clear
M2INV2_Total_Deration_Factor % 100 100 100 100
M2_I2Spr241 clear clear clear clear
M2_I2Spr242 clear clear clear clear
M2_I2Spr243 clear clear clear clear
M2_I2TM2_Direction_Flag_EQEP_Flag clear clear clear clear
M2_I2Spr244 clear clear clear clear
M2_I2TM2_Speed_Sensor_Faulty_Ignore clear clear clear clear
M2_I2TM2_RollBack_Ignore clear clear clear clear
M2_I2TM2_Teeth_Not_Passed clear clear clear clear
M2_I2INV2_UVPh_HSTempSnsrhlth set set set set
M2_I2INV2_Wph_BCH_HSTempSnsrhlth set set set set
M2_I2INV2_Sensor_Hlt_Spr0 set set set set
M2_I2INV2_TM1_Statrsnsrhlth set set set set

Page 45
Sheet1

M2_I2INV2_TM2_Statrsnsrhlth set set set set


M2_I2INV2_SS_cnectrs_open set set set set
M2_I2INV2_IO_card_PS_health clear clear clear clear
M2_I2INV2_IO_card_Sense clear clear clear clear
M2_I2INV2_COMB_Power_supply clear clear clear clear
M2_I2INV2_Speed_sensor1_OC clear clear clear clear
M2_I2INV2_Speed_sensor2_OC clear clear clear clear
M2INV2_statusdata41 NUM 0 0 0 0
M2INV2_statusdata42 NUM 0 0 0 0
M2INV2_Torque_Feedback_431 N-m 194 462 524 600
M2INV2_TM1_RPM RPM 1192 1190 1188 1185
M2INV2_TM2_RPM RPM 1194 1189 1187 1184
M2_I2FrlessthanFsl clear clear clear clear
M2_I2Idbuild_completed set set set set
M2_I2NS_enable clear clear clear clear
M2_I2Sensorless_enable clear clear clear clear
M2_I2Spr258 clear clear clear clear
M2_I2Spr259 clear clear clear clear
M2_I2Spr260 clear clear clear clear
M2_I2Spr261 clear clear clear clear
M2_I2Spr262 clear clear clear clear
M2_I2Spr263 clear clear clear clear
M2_I2Spr264 clear clear clear clear
M2_I2Spr265 clear clear clear clear
M2_I2Spr266 clear clear clear clear
M2_I2Spr267 clear clear clear clear
M2_I2Spr268 clear clear clear clear
M2_I2Spr269 clear clear clear clear
M2_LC1_Brake_chopper_Current A 0 0 0 0
M2_LC1_Line_Freq Hz 49 49 49 49
M2_LC1_Power_Factor - 0.97 0.87 0.73 0.76
M2_LC1_Earth_Fault_Voltage V 1374 1372 1371 1371
M2LC1_Pre_Charging_Contactor_Fb Low Low Low Low
M2LC1_Line_Converter_Contactor_NO_FB High High High High
M2LC1_Line_Converter_Contactor_NC_FB Low Low Low Low
M2LC1_Blower_Fb High High High High
M2LC1_DIO5 Low Low Low Low
M2LC1_DIO6 Low Low Low Low
M2LC1_DIO7 Low Low Low Low
M2LC1_DIO8 Low Low Low Low
M2LC1_Pre_charging_Output Low Low Low Low
M2LC1_Line_Output High High High High
M2LC1_VCB_ON_Output Low Low Low Low
M2LC1_Blower_Enable High High High High
M2LC1_DIO9 Low Low Low Low
M2LC1_DIO10 Low Low Low Low
M2LC1_DIO11 Low Low Low Low
M2LC1_DIO12 Low Low Low Low
M2LC1ST_CFG clear clear clear clear

Page 46
Sheet1

M2LC1Shutdown_issued_By_MCALC clear clear clear clear


M2LC1Vp_Sensor_Faulty clear clear clear clear
M2LC1Is_Sensor_Faulty clear clear clear clear
M2LC1Precharging_Failed clear clear clear clear
M2LC1LC_Control_Reached_Saturation clear clear clear clear
M2LC1BCH_IGBT_Short_Circuit clear clear clear clear
M2LC1Both_DCLV_Sensors_Faulty clear clear clear clear
M2LC1Shutdown_issued_By_OLC clear clear clear clear
M2LC1Shutdown_issued_By_TC clear clear clear clear
M2LC1DC_Link_Short_Circuited clear clear clear clear
M2LC1LC1_SHD2_Spr3 clear clear clear clear
M2LC1LC1_SHD2_Spr2 clear clear clear clear
M2LC1LC1_SHD2_Spr1 clear clear clear clear
M2LC1ALC_ShutDown clear clear clear clear
M2LC1ALC_to_LC_Comm_Failed_By_ALC clear clear clear clear
M2_LC1_OHE_Voltage V 24.3 24.4 24.4 24.5
M2_LC1_Is_rms_Sec_Current A 56 33 26 27
M2_LC1_IsrefMag NUM 65.2 21.9 16.6 16.1
M2_LC1_DCLV1 V 1797 1797 1796 1800
M2LC1Secondary_Current_Crossed_MaxLimit clear clear clear clear
M2LC1PLLUnable2Lock clear clear clear clear
M2LC1Catenary_V_Frequency_Out_of_Limits clear clear clear clear
M2LC1Vce_Sat_Detection_Fault clear clear clear clear
M2LC1LC_PWM_OFC_Tx_Failure clear clear clear clear
M2LC1LC_PWM_OFC_Rx_Failure clear clear clear clear
M2LC1Vp_Below_Minimum_Fault clear clear clear clear
M2LC1DCLVCrossedMaxLimit clear clear clear clear
M2LC1DCLV_Sensed_High_dVbydT clear clear clear clear
M2LC1DCLVCrossedMinLimit clear clear clear clear
M2LC1Eflt_At_DCL_Positive_Side clear clear clear clear
M2LC1Eflt_At_DCL_Negative_Side clear clear clear clear
M2LC1Eflt_At_Tf_OR_TM_Side clear clear clear clear
M2LC1LC1_SHD1_Spr2 clear clear clear clear
M2LC1LC_ALC_DPR_Comm_Failed clear clear clear clear
M2LC1LC1_SHD1_Spr1 clear clear clear clear
M2LC1PLL_Locked_sts Locked Locked Locked Locked
M2LC1Volt_Regulation_Enable Enabled Enabled Enabled Enabled
M2LC1LC1_LC_CFG_SHD2TC clear clear clear clear
M2LC1BCH_TEST_OK Passed Passed Passed Passed
M2LC1High_Speed_1ms_FDP_Freeze_Flag clear clear clear clear
M2LC1High_Speed_62p5uSec_FDP_Freeze_Flag clear clear clear clear
M2LC1LC1_LC_Flag_sts_Spr1 No No No No
M2LC1BCH_Circuit_Faulty Healthy Healthy Healthy Healthy
M2LC1LC_Ready Ready Ready Ready Ready
M2LC1VCB_trip_request_to_MCC clear clear clear clear
M2LC1LC1_LC_Flag_sts_Spr2 clear clear clear clear
M2LC1Lock_Out_Bit_For_LC_SHD clear clear clear clear
M2LC1Pulse_Staggering_Number_Change_Bit clear clear clear clear
M2LC1LC1_LC_Flag_sts_Spr3 clear clear clear clear

Page 47
Sheet1

M2LC1LC1_LC_Flag_sts_Spr4 clear clear clear clear


M2LC1LC1_LC_Flag_sts_Spr5 clear clear clear clear
M2_LC1_DCLV2 V 1807 1800 1799 1802
M2_LC2_Brake_chopper_Current A 1 0 0 1
M2_LC2_Line_Freq Hz 49 49 49 49
M2_LC2_Power_Factor - 0.97 0.99 0.99 0.99
M2_LC2_Earth_Fault_Voltage V 1364 1365 1364 1365
M2LC2_Pre_Charging_Contactor_Fb Low Low Low Low
M2LC2_Line_Converter_Contactor_NO_FB High High High High
M2LC2_Line_Converter_Contactor_NC_FB Low Low Low Low
M2LC2_Blower_Fb High High High High
M2LC2_DIO5 Low Low Low Low
M2LC2_DIO6 Low Low Low Low
M2LC2_DIO7 Low Low Low Low
M2LC2_DIO8 Low Low Low Low
M2LC2_Pre_charging_Output Low Low Low Low
M2LC2_Line_Output High High High High
M2LC2_VCB_ON_Output Low Low Low Low
M2LC2_Blower_Enable High High High High
M2LC2_DIO9 Low Low Low Low
M2LC2_DIO10 Low Low Low Low
M2LC2_DIO11 Low Low Low Low
M2LC2_DIO12 Low Low Low Low
M2LC2ST_CFG clear clear clear clear
M2LC2Shutdown_issued_By_MCALC clear clear clear clear
M2LC2Vp_Sensor_Faulty clear clear clear clear
M2LC2Is_Sensor_Faulty clear clear clear clear
M2LC2Precharging_Failed clear clear clear clear
M2LC2LC_Control_Reached_Saturation clear clear clear clear
M2LC2BCH_IGBT_Short_Circuit clear clear clear clear
M2LC2Both_DCLV_Sensors_Faulty clear clear clear clear
M2LC2Shutdown_issued_By_OLC clear clear clear clear
M2LC2Shutdown_issued_By_TC clear clear clear clear
M2LC2DC_Link_Short_Circuited clear clear clear clear
M2LC2LC2_SHD2_Spr3 clear clear clear clear
M2LC2LC2_SHD2_Spr2 clear clear clear clear
M2LC2LC2_SHD2_Spr1 clear clear clear clear
M2LC2ALC_ShutDown clear clear clear clear
M2LC2ALC_to_LC_Comm_Failed_By_ALC clear clear clear clear
M2_LC2_OHE_Voltage V 24.4 24.4 24.4 24.5
M2_LC2_Is_rms_Sec_Current A 56 89 99 108
M2_LC2_IsrefMag NUM 86.2 147.2 154.1 174.8
M2_LC2_DCLV1 V 1795 1801 1804 1801
M2LC2Secondary_Current_Crossed_MaxLimit clear clear clear clear
M2LC2PLLUnable2Lock clear clear clear clear
M2LC2Catenary_V_Frequency_Out_of_Limits clear clear clear clear
M2LC2Vce_Sat_Detection_Fault clear clear clear clear
M2LC2LC_PWM_OFC_Tx_Failure clear clear clear clear
M2LC2LC_PWM_OFC_Rx_Failure clear clear clear clear

Page 48
Sheet1

M2LC2Vp_Below_Minimum_Fault clear clear clear clear


M2LC2DCLVCrossedMaxLimit clear clear clear clear
M2LC2DCLV_Sensed_High_dVbydT clear clear clear clear
M2LC2DCLVCrossedMinLimit clear clear clear clear
M2LC2Eflt_At_DCL_Positive_Side clear clear clear clear
M2LC2Eflt_At_DCL_Negative_Side clear clear clear clear
M2LC2Eflt_At_Tf_OR_TM_Side clear clear clear clear
M2LC2LC2_SHD1_Spr2 clear clear clear clear
M2LC2LC_ALC_DPR_Comm_Failed clear clear clear clear
M2LC2LC2_SHD1_Spr1 clear clear clear clear
M2LC2PLL_Locked_sts Locked Locked Locked Locked
M2LC2Volt_Regulation_Enable Enabled Enabled Enabled Enabled
M2LC2LC2_LC_CFG_SHD2TC clear clear clear clear
M2LC2BCH_TEST_OK Passed Passed Passed Passed
M2LC2High_Speed_1ms_FDP_Freeze_Flag clear clear clear clear
M2LC2High_Speed_62p5uSec_FDP_Freeze_Flag clear clear clear clear
M2LC2LC2_LC_Flag_sts_Spr1 No No No No
M2LC2BCH_Circuit_Faulty Healthy Healthy Healthy Healthy
M2LC2LC_Ready Ready Ready Ready Ready
M2LC2VCB_trip_request_to_MCC clear clear clear clear
M2LC2LC2_LC_Flag_sts_Spr2 clear clear clear clear
M2LC2Lock_Out_Bit_For_LC_SHD clear clear clear clear
M2LC2Pulse_Staggering_Number_Change_Bit clear clear clear clear
M2LC2LC2_LC_Flag_sts_Spr3 clear clear clear clear
M2LC2LC2_LC_Flag_sts_Spr4 clear clear clear clear
M2LC2LC2_LC_Flag_sts_Spr5 clear clear clear clear
M2_LC2_DCLV2 V 1797 1801 1805 1802
A1_Txfr_Primary_Voltage V 24.09 24.09 24.09 24.09
A1_415V_AC_o_p_RY_phase V 412 415 415 410
A1_I_p_Current A 154 154 168 153
A1_DCLink_Voltage V 639 640 640 645
A1_Txfr_Secondary_Voltage V 413 407 405 413
A1_415V_AC_o_p_YB_phase V 410 412 420 415
A1_415V_AC_o_p_R_P_I A 98 98 95 85
A1_415V_AC_o_p_Y_P_I A 83 80 86 80
A1_415V_AC_o_p_B_P_I A 87 93 97 83
A1_415V_AC_o_p_R_P_I_CT A 92 98 90 77
A1_415V_AC_o_p_B_P_I_CT A 76 74 98 71
A1_Blower_Rph_I A 2 2 2 2
A1_Blower_Yph_I A 2 2 2 2
A1_3_Ph_Ert_Leak_I mA 21 19 17 21
A1_Intrnl_Ambient_Temp oC 48 46 48 46
A1_LC_INV_IGBT_HSTemp oC 47 48 48 48
A1_110V_Control_supply_V V 128 124 126 124
A1_LC_Mod_Temp_Sh_dwn_Cnt NUM 0 0 0 0
A1_INV_Mod_Temp_Sh_dwn_Cnt NUM 0 0 0 0
A1_LC_Mod_Sts NUM 2 2 2 2
A1_Inverter_Mod_Sts NUM 2 2 2 2
A1_I_P_Power_Factor NUM 1 1 1 1

Page 49
Sheet1

A1_Inv_MI NUM 0.965 0.965 0.965 0.949


A1_Inv_Op_Frq Hz 50.2 50.2 50.2 50.2
A1_I_P_Frq Hz 49.95 49.95 49.95 49.95
A1AC_ON set set set set
A1PRECHARG_CONT_FB set set set set
A1IP_MAIN_CONT_FB clear clear clear clear
A1THPH_OP_CONT_FB clear clear clear clear
A1DC_OP_CONT_FB set set set set
A1BLW_CONT_SELFAC_FB clear clear clear clear
A1BLW_CONT_OTHERAC_FB set set set set
A1EARTH_SW_AKEY_FB set set set set
A1BATT_STATUS_CARD_FB1 set set set set
A1BATT_STATUS_CARD_FB2 set set set set
A1BLW_RPM_FB set set set set
A1OTHERAC_HEALTH_FB clear clear clear clear
A1AC1_AC2_SELECTION_FB set set set set
A1CAP_FAN_FB clear clear clear clear
A1Lic_Mod_any_prot_notok clear clear clear clear
A1cntr_enable_from_stepstart set set set set
A1Lic_control_enable clear clear clear clear
A1Lic_ip_volt_status set set set set
A1Lic_mod_health set set set set
A1Lic_op_volt_status set set set set
A1Lic_mod_reset clear clear clear clear
A1Lic_enable_at_zero_crossing set set set set
A1PLL_Locked_status set set set set
A1Voltage_Reg_Enable set set set set
A1Ready_For_Control_Enable set set set set
A1Panto_Up_Status set set set set
A1VCBStatus set set set set
A1Lc_Left_Ecap_monitor clear clear clear clear
A1Lc_Right_Ecap_monitor clear clear clear clear
A1Precharging_cont_driving_status clear clear clear clear
A1Ip_cont_driving_status set set set set
A1THPH_OP_cont_driving_status set set set set
A1DCOP_cont_driving_status clear clear clear clear
A1Blower_cont_driving_status set set set set
A1ACeld_ext_temp clear clear clear clear
A1ACOP_extfault_check clear clear clear clear
A1ACext_shrtckt_temp clear clear clear clear
A1THswfail clear clear clear clear
A1HS_Over_Temp clear clear clear clear
A1Caphvfail clear clear clear clear
A1Int_amb_Over_Temp clear clear clear clear
A1Ip_fuse_status clear clear clear clear
A1DCop_volt_status clear clear clear clear
A1HighSpeed62p5uSecFDPFreezeFlag clear clear clear clear
A1VCB_trip_request clear clear clear clear
A1dc_op_short_ckt_temp clear clear clear clear

Page 50
Sheet1

A1Config_Out_of_Bounds clear clear clear clear


A1Inv_op_not_ok clear clear clear clear
A1LC_restart_mode clear clear clear clear
A1Inv_restart_mode clear clear clear clear
A1AC_OP_section_health_status set set set set
A1Inverter_output_status_notok_no_extfault clear clear clear clear
A1System_Configuration_Changed set set set set
A1Default_Configuration_Loaded clear clear clear clear
A1Vp_below_Minimum clear clear clear clear
A1Vp_Above_Maximum clear clear clear clear
A1LC_HS_Temp_Crosses_Degrees clear clear clear clear
A1Int_Amb_Temp_Crosses_Degrees clear clear clear clear
A1Th_Op_Contactor_Disable_Request clear clear clear clear
A1DC_OP_Contactor_Disable_Req_from_MCC clear clear clear clear
A1Inv_Enable_Based_Ac_ON set set set set
A1DCOP_cont_strucklow clear clear clear clear
A1DCOP_cont_struckhigh clear clear clear clear
A1Blower_cont_strucklow clear clear clear clear
A1Blower_cont_struckhigh clear clear clear clear
A1Blower_overcurr clear clear clear clear
A1InvExtFlt clear clear clear clear
A1Inv_op_ext_eld clear clear clear clear
A1Inv_op_ext_shrt_ckt clear clear clear clear
A1Volt_phimb clear clear clear clear
A1Curr_phimb clear clear clear clear
A1Sing_phasing clear clear clear clear
A1DC_op_ext_short_ckt clear clear clear clear
A1DC_op_int_short_ckt clear clear clear clear
A1Inv_OP_L1_Over_Current_CT clear clear clear clear
A1Inv_OP_L2_Over_Current_CT clear clear clear clear
A1Inv_OP_L3_Over_Current_CT clear clear clear clear
A1Inv_OP_Over_Current_CT clear clear clear clear
A1Input_Under_Voltage clear clear clear clear
A1Input_Over_Voltage clear clear clear clear
A1Sec_ip_over_curr_rms clear clear clear clear
A1Precharging_fault clear clear clear clear
A1Precharg_cont_strucklow clear clear clear clear
A1Precharg_cont_struckhigh clear clear clear clear
A1Ip_cont_strucklow clear clear clear clear
A1Ip_cont_struckhigh clear clear clear clear
A1Lc_op_over_volt clear clear clear clear
A1Lc_op_under_volt clear clear clear clear
A1Lc_short_ckt clear clear clear clear
A1Lc_R_Leg_Gdps_fail clear clear clear clear
A1Lc_cap_HV clear clear clear clear
A1Lc_gvm_fault clear clear clear clear
A1Sec_ip_inst_OverCurrent clear clear clear clear
A1PLL_Unable2Lock clear clear clear clear
A1CatenaryVoltage_Frequency_Outof_Limits clear clear clear clear

Page 51
Sheet1

A1DCLVSensed_High_dVbydT clear clear clear clear


A1Input_Under_Voltage_861 clear clear clear clear
A1Input_Over_Voltage_861 clear clear clear clear
A1DCLV_Crossed_Min_Limit clear clear clear clear
A1LC_OP_Over_Load clear clear clear clear
A1VR_PID_Saturation clear clear clear clear
A1Lc_L_Leg_Gdps_fail clear clear clear clear
A1Ecap_faults clear clear clear clear
A1Dclv_over_volt clear clear clear clear
A1RY_Overvolt clear clear clear clear
A1RY_Undervolt clear clear clear clear
A1YB_Underrvolt clear clear clear clear
A1YB_Overvolt clear clear clear clear
A1L1_over_curr clear clear clear clear
A1L2_over_curr clear clear clear clear
A1L3_over_curr clear clear clear clear
A1L4_over_curr clear clear clear clear
A1L5_over_curr clear clear clear clear
A1Inv_shdwn_dueto_blw clear clear clear clear
A1THPH_op_cont_strucklow clear clear clear clear
A1THPH_op_cont_struckhigh clear clear clear clear
A1Inv_op_int_eld clear clear clear clear
A1Inv_op_int_shrt_ckt clear clear clear clear
A1Inv_Rph_Gate_V_Flt clear clear clear clear
A1Inv_Yph_Gate_V_Flt clear clear clear clear
A1Inv_Bph_Gate_V_Flt clear clear clear clear
A1Inv_IP_Under_Volt clear clear clear clear
A1Inv_Rph_GDPS_Fail clear clear clear clear
A1Inv_Yph_GDPS_Fail clear clear clear clear
A1Inv_Bph_GDPS_Fail clear clear clear clear
A1Mode Emergency mode
Emergency mode
Emergency mode
Emergency mode
A1Restart_mode_sts Clear Clear Clear Clear
A1ACU_ON ok ok ok ok
A1ACU_I_P_section_hlt_sts ok ok ok ok
A1415V_AC_O_P_section_hlt_sts ok ok ok ok
A1ACU_I_P_v_sts ok ok ok ok
A1LC_O_P_v_sts ok ok ok ok
A1415V_AC_O_P_sts ok ok ok ok
A1415V_AC_external_flt_sts Clear Clear Clear Clear
A1Earth_Sw_A_Key_Fb
A1System_Internal_flt_sts Clear Clear Clear Clear
A1Inv_o_p_sts_not_ok_no_ext_flt Clear Clear Clear Clear
A1DC_Section_flt_sts Clear Clear Clear Clear
A1415V_AC_O_P_cont_driving_sts Set Set Set Set
A1415V_AC_O_P_cont_fb Set Set Set Set
A1Dc_section_hlt_sts Clear Clear Clear Clear
A1DC_o_p_sts Disable Disable Disable Disable
DTC_Door1and_2_TL_Sts NUM 514 514 514 514
DTC_Door3and_4_TL_Sts NUM 514 514 514 514

Page 52
Sheet1

MC1_Door1and_2_TL_Sts NUM 2 2 2 2
MC1_Door3and_4_TL_Sts NUM 514 514 514 514
TC_Door1and_2_TL_Sts NUM 512 512 512 512
TC_Door3and_4_TL_Sts NUM 514 514 514 514
MC2_Door1and_2_TL_Sts NUM 514 514 514 514
MC2_Door3and_4_TL_Sts NUM 514 514 514 514
A2_Txfr_Primary_Voltage V 24.29 24.29 24.29 24.29
A2_415V_AC_o_p_RY_phase V 415 412 415 415
A2_I_p_Current A 127 125 132 135
A2_DCLink_Voltage V 641 640 638 639
A2_Txfr_Secondary_Voltage V 407 402 407 405
A2_415V_AC_o_p_YB_phase V 415 415 420 418
A2_415V_AC_o_p_R_P_I A 67 65 67 67
A2_415V_AC_o_p_Y_P_I A 55 58 55 54
A2_415V_AC_o_p_B_P_I A 66 67 67 64
A2_415V_AC_o_p_R_P_I_CT A 60 53 49 58
A2_415V_AC_o_p_B_P_I_CT A 55 48 52 46
A2_Blower_Rph_I A 2 2 2 2
A2_Blower_Yph_I A 2 2 2 2
A2_3_Ph_Ert_Leak_I mA 17 16 16 17
A2_Intrnl_Ambient_Temp oC 45 46 45 46
A2_LC_INV_IGBT_HSTemp oC 44 44 44 42
A2_110V_Control_supply_V V 123 123 123 123
A2_LC_Mod_Temp_Sh_dwn_Cnt NUM 0 0 0 0
A2_INV_Mod_Temp_Sh_dwn_Cnt NUM 0 0 0 0
A2_LC_Mod_Sts NUM 2 2 2 2
A2_Inverter_Mod_Sts NUM 2 2 2 2
A2_I_P_Power_Factor NUM 1 1 1 1
A2_Inv_MI NUM 1 1 1 1
A2_Inv_Op_Frq Hz 50.2 50.2 50.2 50.2
A2_I_P_Frq Hz 49.95 49.95 49.95 49.95
A2AC_ON set set set set
A2PRECHARG_CONT_FB set set set set
A2IP_MAIN_CONT_FB clear clear clear clear
A2THPH_OP_CONT_FB clear clear clear clear
A2DC_OP_CONT_FB clear clear clear clear
A2BLW_CONT_SELFAC_FB set set set set
A2BLW_CONT_OTHERAC_FB clear clear clear clear
A2EARTH_SW_AKEY_FB set set set set
A2BATT_STATUS_CARD_FB1 set set set set
A2BATT_STATUS_CARD_FB2 clear clear clear clear
A2BLW_RPM_FB clear clear clear clear
A2OTHERAC_HEALTH_FB set set set set
A2AC1_AC2_SELECTION_FB clear clear clear clear
A2CAP_FAN_FB clear clear clear clear
A2Lic_Mod_any_prot_notok clear clear clear clear
A2cntr_enable_from_stepstart set set set set
A2Lic_control_enable clear clear clear clear
A2Lic_ip_volt_status set set set set

Page 53
Sheet1

A2Lic_mod_health set set set set


A2Lic_op_volt_status set set set set
A2Lic_mod_reset clear clear clear clear
A2Lic_enable_at_zero_crossing set set set set
A2PLL_Locked_status set set set set
A2Voltage_Reg_Enable set set set set
A2Ready_For_Control_Enable set set set set
A2Panto_Up_Status set set set set
A2VCBStatus set set set set
A2Lc_Left_Ecap_monitor clear clear clear clear
A2Lc_Right_Ecap_monitor clear clear clear clear
A2Precharging_cont_driving_status clear clear clear clear
A2Ip_cont_driving_status set set set set
A2THPH_OP_cont_driving_status set set set set
A2DCOP_cont_driving_status set set set set
A2Blower_cont_driving_status clear clear clear clear
A2ACeld_ext_temp clear clear clear clear
A2ACOP_extfault_check clear clear clear clear
A2ACext_shrtckt_temp clear clear clear clear
A2THswfail clear clear clear clear
A2HS_Over_Temp clear clear clear clear
A2Caphvfail clear clear clear clear
A2Int_amb_Over_Temp clear clear clear clear
A2Ip_fuse_status clear clear clear clear
A2DCop_volt_status set set set set
A2HighSpeed62p5uSecFDPFreezeFlag clear clear clear clear
A2VCB_trip_request clear clear clear clear
A2dc_op_short_ckt_temp clear clear clear clear
A2Config_Out_of_Bounds clear clear clear clear
A2Inv_op_not_ok clear clear clear clear
A2LC_restart_mode clear clear clear clear
A2Inv_restart_mode clear clear clear clear
A2AC_OP_section_health_status set set set set
A2Inverter_output_status_notok_no_extfault clear clear clear clear
A2System_Configuration_Changed set set set set
A2Default_Configuration_Loaded clear clear clear clear
A2Vp_below_Minimum clear clear clear clear
A2Vp_Above_Maximum clear clear clear clear
A2LC_HS_Temp_Crosses_Degrees clear clear clear clear
A2Int_Amb_Temp_Crosses_Degrees clear clear clear clear
A2Th_Op_Contactor_Disable_Request clear clear clear clear
A2DC_OP_Contactor_Disable_Req_from_MCC clear clear clear clear
A2Inv_Enable_Based_Ac_ON set set set set
A2DCOP_cont_strucklow clear clear clear clear
A2DCOP_cont_struckhigh clear clear clear clear
A2Blower_cont_strucklow clear clear clear clear
A2Blower_cont_struckhigh clear clear clear clear
A2Blower_overcurr clear clear clear clear
A2InvExtFlt clear clear clear clear

Page 54
Sheet1

A2Inv_op_ext_eld clear clear clear clear


A2Inv_op_ext_shrt_ckt clear clear clear clear
A2Volt_phimb clear clear clear clear
A2Curr_phimb clear clear clear clear
A2Sing_phasing clear clear clear clear
A2DC_op_ext_short_ckt clear clear clear clear
A2DC_op_int_short_ckt clear clear clear clear
A2Inv_OP_L1_Over_Current_CT clear clear clear clear
A2Inv_OP_L2_Over_Current_CT clear clear clear clear
A2Inv_OP_L3_Over_Current_CT clear clear clear clear
A2Inv_OP_Over_Current_CT clear clear clear clear
A2Input_Under_Voltage clear clear clear clear
A2Input_Over_Voltage clear clear clear clear
A2Sec_ip_over_curr_rms clear clear clear clear
A2Precharging_fault clear clear clear clear
A2Precharg_cont_strucklow clear clear clear clear
A2Precharg_cont_struckhigh clear clear clear clear
A2Ip_cont_strucklow clear clear clear clear
A2Ip_cont_struckhigh clear clear clear clear
A2Lc_op_over_volt clear clear clear clear
A2Lc_op_under_volt clear clear clear clear
A2Lc_short_ckt clear clear clear clear
A2Lc_R_Leg_Gdps_fail clear clear clear clear
A2Lc_cap_HV clear clear clear clear
A2Lc_gvm_fault clear clear clear clear
A2Sec_ip_inst_OverCurrent clear clear clear clear
A2PLL_Unable2Lock clear clear clear clear
A2CatenaryVoltage_Frequency_Outof_Limits clear clear clear clear
A2DCLVSensed_High_dVbydT clear clear clear clear
A2Input_Under_Voltage_861 clear clear clear clear
A2Input_Over_Voltage_861 clear clear clear clear
A2DCLV_Crossed_Min_Limit clear clear clear clear
A2LC_OP_Over_Load clear clear clear clear
A2VR_PID_Saturation clear clear clear clear
A2Lc_L_Leg_Gdps_fail clear clear clear clear
A2Ecap_faults clear clear clear clear
A2Dclv_over_volt clear clear clear clear
A2RY_Overvolt clear clear clear clear
A2RY_Undervolt clear clear clear clear
A2YB_Underrvolt clear clear clear clear
A2YB_Overvolt clear clear clear clear
A2L1_over_curr clear clear clear clear
A2L2_over_curr clear clear clear clear
A2L3_over_curr clear clear clear clear
A2L4_over_curr clear clear clear clear
A2L5_over_curr clear clear clear clear
A2Inv_shdwn_dueto_blw clear clear clear clear
A2THPH_op_cont_strucklow clear clear clear clear
A2THPH_op_cont_struckhigh clear clear clear clear

Page 55
Sheet1

A2Inv_op_int_eld clear clear clear clear


A2Inv_op_int_shrt_ckt clear clear clear clear
A2Inv_Rph_Gate_V_Flt clear clear clear clear
A2Inv_Yph_Gate_V_Flt clear clear clear clear
A2Inv_Bph_Gate_V_Flt clear clear clear clear
A2Inv_IP_Under_Volt clear clear clear clear
A2Inv_Rph_GDPS_Fail clear clear clear clear
A2Inv_Yph_GDPS_Fail clear clear clear clear
A2Inv_Bph_GDPS_Fail clear clear clear clear
A2Mode Emergency mode
Emergency mode
Emergency mode
Emergency mode
A2Restart_mode_sts Clear Clear Clear Clear
A2ACU_ON ok ok ok ok
A2ACU_I_P_section_hlt_sts ok ok ok ok
A2415V_AC_O_P_section_hlt_sts ok ok ok ok
A2ACU_I_P_v_sts ok ok ok ok
A2LC_O_P_v_sts ok ok ok ok
A2415V_AC_O_P_sts ok ok ok ok
A2415V_AC_external_flt_sts Clear Clear Clear Clear
A2Earth_Sw_A_Key_Fb
A2System_Internal_flt_sts Clear Clear Clear Clear
A2Inv_o_p_sts_not_ok_no_ext_flt Clear Clear Clear Clear
A2DC_Section_flt_sts Clear Clear Clear Clear
A2415V_AC_O_P_cont_driving_sts Set Set Set Set
A2415V_AC_O_P_cont_fb Set Set Set Set
A2Dc_section_hlt_sts Set Set Set Set
A2DC_o_p_sts Enable Enable Enable Enable
A2DC_DCcnvt_i_p_dclink_v V 640 648 632 636
A2DC_DC_cnvt_prmy_I_tf A 21 21 20 21
A2DC_o_p_volt V 125 125 125 125
A2DC_o_p_I A 75 75 72 75
A2DC_DC_duty NUM 4992 4953 5070 4992
A2_DC_DC_IGBT_Temp oC 39 39 39 39
A2_DC_DC_Mod_Stp_Srt_Sts NUM 2 2 2 2
A2_DC_DC_Temp_Sh_Dwn_Cnt NUM 0 0 0 0
DC_health_status set set set set
DC_op_status set set set set
DC_section_fault_status clear clear clear clear
DCDC_conv_enable_status set set set set
DCDC_IGBT_THSW_status set set set set
DCDC_ip_voltage_status set set set set
DCDC_power_on_reset clear clear clear clear
DCDC_short_ckt clear clear clear clear
DCDC_op_over_load clear clear clear clear
DCDC_op_over_volt clear clear clear clear
DCDC_op_under_volt clear clear clear clear
DCDC_igbt_mod_thsw_fail clear clear clear clear
DCDC_HS_over_temp clear clear clear clear
DC_op_over_curr clear clear clear clear
DCDC_ip_under_volt clear clear clear clear

Page 56
Sheet1

DCDC_ip_over_volt clear clear clear clear


DCDC_GD_PS_fail clear clear clear clear
shrt_ckt_flag_VI_check clear clear clear clear
DCDC_gate_voltage_monitor clear clear clear clear
TXFR_OVER_CURRENT clear clear clear clear
DCDC_OP_OL_with_volt_dip clear clear clear clear
PowerOn clear clear clear clear
BCS_Bat_Chrg_I_P_V V 123 124 123 124
BCS_Battery_O_P_V V 110 109 110 110
BCS_Battery_Chrg_Inductor_I A 4 1 4 2
BCS_DC_ELD_Sensor_V V 50 46 46 42
BCS_Battery_O_P_I A -2 -5 -2 -3
BCS_BD_O_P_I A 14 14 14 14
BCS_Batt_Chrg_IGBT_H_S_Temp oC 33 33 33 33
BCS_Batt_control_supply_V V 121 121 120 121
BCS_B_C_Module_Sts NUM 2 2 2 2
BCS_B_C_Module_Temporary_Shut_do NUM 0 0 0 0
OP_Under_volt clear clear clear clear
OP_Over_volt clear clear clear clear
Short_ckt clear clear clear clear
OP_Over_curr_L1 clear clear clear clear
OP_Over_curr_L2 clear clear clear clear
Ip_volt_sens_flt clear clear clear clear
Op_volt_sens_flt clear clear clear clear
Op_curr_sens_flt clear clear clear clear
BC_OL_with_volt_dip clear clear clear clear
VI_Short_ckt clear clear clear clear
BCSBatFF1Spr10 clear clear clear clear
BCSBatFF1Spr11 clear clear clear clear
BCSBatFF1Spr12 clear clear clear clear
BCSBatFF1Spr13 clear clear clear clear
BCSBatFF1Spr14 clear clear clear clear
BCSBatFF1Spr15 clear clear clear clear
IP_Over_volt clear clear clear clear
IP_Under_volt clear clear clear clear
BD_over_curr clear clear clear clear
BC_anti_parallel_diode_fail clear clear clear clear
BN_Ccont_struck_high clear clear clear clear
BN_Ccont_struck_low clear clear clear clear
Bat_revflowcurr_prot clear clear clear clear
DCELD clear clear clear clear
Min_cntrl_supply clear clear clear clear
Max_cntrl_supply clear clear clear clear
HS_Over_temp clear clear clear clear
BN_Over_curr clear clear clear clear
BN_ext_fault clear clear clear clear
BCSBatFF2Spr13 clear clear clear clear
BCSBatFF2Spr14 clear clear clear clear
BCSBatFF2Spr15 clear clear clear clear

Page 57
Sheet1

Timer_1mS set set set set


Timer0_50uS set set set set
Cla1Isr2 clear clear clear clear
Bat_Health set set set set
DC_OP_Status_861 clear clear clear clear
Bat_enable
Any_prot_not_ok clear clear clear clear
Bat_ip_fuse set set set set
BCS_Pulse_disable clear clear clear clear
HS_THSW_FB set set set set
Power_on clear clear clear clear
TL_BN_ON set set set set
TL_BN_OFF clear clear clear clear
Bn_on_cmnd_valid
Bat_op_fuse set set set set
Bd_fuse set set set set
Bat_fuse set set set set
Offline_rev_pol_sense set set set set
Bnc_on_high_state clear clear clear clear
Bnc_on_low_state set set set set
Bnc_off_high_state clear clear clear clear
Bnc_off_low_state set set set set
Bnc_on_command clear clear clear clear
Bnc_off_command clear clear clear clear
Bnc_on_at_reset clear clear clear clear
BN_cont_enabled set set set set
BN_cont_fb_861 set set set set
HSFDP_Freeze clear clear clear clear
HSFDP_MemoryFreeze clear clear clear clear
HS_50uSecFDPFreezeFlag clear clear clear clear
B_C_I_p_Volt_sts ok ok ok ok
B_C_O_P_sts ok ok ok ok
Battery_charger_Hlt_sts Set Set Set Set
Battery_Charger_Fault_sts Disable Disable Disable Disable
Battery_charger_ip_fuse_fb Enable Enable Enable Enable
Battery_charger_op_fuse_fb Set Set Set Set
Batt_chag_module_thrm_sw_sts ok ok ok ok
Battery_fuse_fb ok ok ok ok
B_C_Enable_sts ok ok ok ok
BD_fuse_fb Set Set Set Set
DC_ELD_indication
BN_contactor_contactor_driving_sts Set Set Set Set
BN_contactor_contactor_Fb Set Set Set Set
Offline_rev_pol_sense_fb Set Set Set Set
DC_output_sts
Spr_bits
High_Speed_Intimation
Comm_sts_Flags_Spr1 clear clear clear clear
Comm_sts_Flags_Spr2 set set set set

Page 58
Sheet1

Comm_sts_Flags_Spr3 clear clear clear clear


Comm_sts_Flags_Spr4 set set set set
Comm_sts_Flags_Spr5 clear clear clear clear
Comm_sts_Flags_Spr6 set set set set
Comm_sts_Flags_Spr7 clear clear clear clear
Comm_sts_Flags_Spr8 set set set set
Comm_sts_Flags_Spr9 clear clear clear clear
Comm_sts_Flags_Spr10 set set set set
Comm_sts_Flags_Spr11 clear clear clear clear
Comm_sts_Flags_Spr12 set set set set
Comm_sts_Flags_Spr13 clear clear clear clear
Comm_sts_Flags_Spr14 set set set set
Software_Version1 NUM TC4,ALC3,LC3 ALC4,LC4 CCC,CCCR,PCC
PCCR,MCC1,MCC1R
Software_Version2 NUM 1027 1030 0 1061
Software_Version3 NUM 1028 1030 0 1067
Software_Version4 NUM 1028 0 1061 1061
pis_word_1 - 0 0 0 0
pis_word_2 - 0 0 0 0
pis_word_3 - 0 0 0 0
pis_word_4 - 0 0 0 0
DTC_MC1_Sts - 170 170 170 170
TC_MC2_Sts - 43520 43520 43520 43520
Auxiliary_Power W 4 5 5 5
Traction_Power W 3751150000 1879441000 2963931000 2173043000
M1_INV1_Comm_Health_Flag NUM 6144 6144 6144 6144
M1_INV1_TM1_RPMstatusflag NUM 0 0 0 0
M1_INV1_SensorSpeed RPM 1193 1190 1189 1185
M1_INV1_TM2_RPMstatusflag NUM 32768 32768 32768 32768
M1_INV1_Beat_Magnitude A 0.31 0.31 0.24 0.24
M1_INV1_StatusWord NUM 0 0 0 0
M1_INV1_Average_RPM RPM 1193 1189 1186 1185
M1_INV1_LCflagstatus NUM 8 8 8 8
M1INV1_Speed_Signal_1_input_sts set set set set
M1INV1_Speed_Signal_2_input_sts set set set set
M1INV1_Speed_Signal_3_input_sts set set set set
M1INV1_Speed_Signal_4_input_sts set set set set
M1INV1_Spr13 clear clear clear clear
M1INV1_Spr14 clear clear clear clear
M1INV1_Spr15 clear clear clear clear
M1INV1_Spr16 clear clear clear clear
M1_INV1_statusdata15 NUM 1189 1186 1184 1182
M1_INV1_FluxSpeed RPM 1193.99 1190.77 1189.75 1186.38
M1_INV1_VceSatCnt_Lvl1 NUM 0 0 0 0
M1_INV1_WrkPulseMode NUM 11 11 11 11
M1_INV1_DiffRpmCntr1 NUM 47941 47941 47941 47941
M1_INV1_Ir_Rms A 168.27 169.68 169.01 168.27
M1_INV1_Iy_Rms A 168.27 169.68 169.01 168.27
M1_INV1_Ib_Rms A 169.01 170.41 168.27 167.54
M1_INV1_Slip_RPM RPM 0.59 0.73 0.73 0.88

Page 59
Sheet1

M1_INV1_Modulation_Index NUM 806 809 809 808


M1_INV1_DiffRpmCntr2 NUM 187 187 187 187
M1_INV1_DCLV NUM 1800 1796 1785 1802
M1_INV1_statusdata43 NUM 1 1 1 1
M1_INV1_Ipeak A 416 426 414 418
M1_INV2_Comm_Health_Flag NUM 6144 6144 6144 6144
M1_INV2_TM1_RPMstatusflag NUM 0 0 0 0
M1_INV2_SensorSpeed RPM 1193 1191 1188 1184
M1_INV2_TM2_RPMstatusflag NUM 0 0 0 0
M1_INV2_Beat_Magnitude A 0.18 0.37 0.37 0.43
M1_INV2_StatusWord NUM 0 0 0 0
M1_INV2_Average_RPM RPM 1193 1190 1188 1185
M1_INV2_LCflagstatus NUM 8 8 8 8
M1INV2_Speed_Signal_1_input_sts set set set set
M1INV2_Speed_Signal_2_input_sts set set set set
M1INV2_Speed_Signal_3_input_sts set set set set
M1INV2_Speed_Signal_4_input_sts set set set set
M1INV2_Spr13 clear clear clear clear
M1INV2_Spr14 clear clear clear clear
M1INV2_Spr15 clear clear clear clear
M1INV2_Spr16 clear clear clear clear
M1_INV2_statusdata15 NUM 1192 1187 1185 1183
M1_INV2_FluxSpeed RPM 1194.14 1191.36 1188.43 1185.5
M1_INV2_VceSatCnt_Lvl1 NUM 1 0 0 0
M1_INV2_WrkPulseMode NUM 11 11 11 11
M1_INV2_DiffRpmCntr1 NUM 12080 12080 12080 12080
M1_INV2_Ir_Rms A 171.14 169.68 172.55 173.28
M1_INV2_Iy_Rms A 170.41 169.68 173.95 173.95
M1_INV2_Ib_Rms A 172.55 171.14 176.03 175.35
M1_INV2_Slip_RPM RPM 0.59 0.73 0.73 0.88
M1_INV2_Modulation_Index NUM 808 813 811 813
M1_INV2_DiffRpmCntr2 NUM 47 47 47 47
M1_INV2_DCLV NUM 1813 1798 1812 1796
M1_INV2_statusdata43 NUM 1 1 1 1
M1_INV2_Ipeak A 420 416 418 438
M1LC1LC_TC2_Redundant_Comm_Faulty Healthy Healthy Healthy Healthy
M1LC1Fault_Flag_sts_1_Spr1 clear clear clear clear
M1LC1BCH_Res_IGBT_Open clear clear clear clear
M1LC1BCH_Temp_Crossed_Max_Limit clear clear clear clear
M1LC1LC_LC_DSPCAN_Comm_Faulty Healthy Healthy Healthy Healthy
M1LC1LC_TC1_DSPCAN_Comm_Faulty Healthy Healthy Healthy Healthy
M1LC1LC_TC2_DSPCAN_Comm_Faulty Healthy Healthy Healthy Healthy
M1LC1LC_TC1_Redundant_Comm_Faulty Healthy Healthy Healthy Healthy
M1LC1Hlth_Missing_Frm_OtherLC Healthy Healthy Healthy Healthy
M1LC1LC_Number_mismatch clear clear clear clear
M1LC1Other_LC_number_wrong clear clear clear clear
M1LC1DSP_CANA_initialize_Flt clear clear clear clear
M1LC1DSP_CANB_initialize_Flt clear clear clear clear
M1LC1BCH_Has_Low_Resistance_Path clear clear clear clear

Page 60
Sheet1

M1LC1BCH_IGBT_Fired_TimedOut clear clear clear clear


M1LC1CFG_CheckSUm_Fail clear clear clear clear
M1LC1Fault_Flag_sts_2_Spr0 clear clear clear clear
M1LC1Fault_Flag_sts_2_Spr1 clear clear clear clear
M1LC1Fault_Flag_sts_2_Spr2 clear clear clear clear
M1LC1Fault_Flag_sts_2_Spr3 clear clear clear clear
M1LC1LC_LC_DSPCAN_RedComm_Faulty Healthy Healthy Healthy Healthy
M1LC1LC1_Fault_Flag_sts_2_Spr4 clear clear clear clear
M1LC1Both_BCH_Circuits_are_Faulty Healthy Healthy Healthy Healthy
M1LC1DCLV_Discharge_Failed Passed Passed Passed Passed
M1LC1VR_PID_Stopped clear clear clear clear
M1LC1BCH_Fired_at_Level1 Not Fired Not Fired Not Fired Not Fired
M1LC1BCH_Fired_at_Level2 Not Fired Not Fired Not Fired Not Fired
M1LC1BCH_L1_Fire_Timeout clear clear clear clear
M1LC1HSFDP_ReadAck_Fail Passed Passed Passed Passed
M1LC1HSFDP_CompleteAck_Fail Passed Passed Passed Passed
M1LC1HSFDP_Progress2DMC_Fail Passed Passed Passed Passed
M1LC1BCH_Trip_Very_High_Volt Not Tripped Not Tripped Not Tripped Not Tripped
M1LC1VceSat_in_BCH clear clear clear clear
M1LC1BCH_Over_Current clear clear clear clear
M1LC1BCH_PWM_OFC_TX_Fail clear clear clear clear
M1LC1BCH_GDPSfailorRxOFCcablefail clear clear clear clear
M1LC1Fault_Flag_sts_3_Spr2 clear clear clear clear
M1LC1Fault_Flag_sts_3_Spr3 clear clear clear clear
M1LC1Fault_Flag_sts_3_Spr4 clear clear clear clear
M1LC1Fault_Flag_sts_3_Spr5 clear clear clear clear
M1LC1Fault_Flag_sts_3_Spr6 clear clear clear clear
M1LC1Fault_Flag_sts_3_Spr7 clear clear clear clear
M1LC1Fault_Flag_sts_3_Spr8 clear clear clear clear
M1LC1Fault_Flag_sts_3_Spr9 clear clear clear clear
M1LC1Fault_Flag_sts_3_Spr10 clear clear clear clear
M1LC1Fault_Flag_sts_3_Spr11 clear clear clear clear
M1LC1Fault_Flag_sts_3_Spr12 clear clear clear clear
M1LC1Fault_Flag_sts_3_Spr13 clear clear clear clear
M1LC1WDRST clear clear clear clear
M1LC1MailBox_Mismatch clear clear clear clear
M1LC1Send_Sema_Acquire_Fail Acquired Acquired Acquired Acquired
M1LC1Send_Sema_Release_Fail Released Released Released Released
M1LC1Receive_Sema_Acquire_Fail Acquired Acquired Acquired Acquired
M1LC1Receive_Sema_Release_Fail Released Released Released Released
M1LC1LowDCLVActual clear clear clear clear
M1LC1DPRAM_CAN_Received clear clear clear clear
M1LC1PLL_Reset clear clear clear clear
M1LC1PLL_Run set set set set
M1LC1DCLV_Transient_Detect clear clear clear clear
M1LC1BCH_IGBT_Fired clear clear clear clear
M1LC1Fault_Flag_sts_4_Spr0 clear clear clear clear
M1LC1Fault_Flag_sts_4_Spr1 clear clear clear clear
M1LC1Fault_Flag_sts_4_Spr2 clear clear clear clear

Page 61
Sheet1

M1LC1Fault_Flag_sts_4_Spr3 clear clear clear clear


M1_LC1_LTC_Blower_current A 2.06 2.14 2.1 1.99
M1_LC1_Is_rms_With_Ripple A 69 80 89 85
M1_LC1_DCLV_Ref V 1800 1800 1800 1800
M1_LC1_DCLV_Max V 1827 1827 1831 1830
M1_LC1_OHE_V_Peak V 34.48 34.69 34.54 34.67
M1_LC1_IsPeak A 173 191 212 205
M1_LC1_contactor_and_cfg_status NUM 2 2 2 2
M1LC1Primary_Over_I clear clear clear clear
M1LC1100_Hz_Filter_Over_Current clear clear clear clear
M1LC1secondary_current_crossed_max_limit clear clear clear clear
M1LC1Line_Cont_stuck_closed_DCLV_blw_min clear clear clear clear
M1LC1DCLV_Crossed_max_limit_Lockout clear clear clear clear
M1LC1DCLV_Crossed_min_limit_Lockout clear clear clear clear
M1LC1100Hz_Filter_I_Lockout clear clear clear clear
M1LC1Earth_fault_at_positive_side clear clear clear clear
M1LC1Earth_fault_at_negative_side clear clear clear clear
M1LC1Earth_fault_at_TF_TM_side clear clear clear clear
M1LC1Line_cont_stuck_open clear clear clear clear
M1LC1Precharge_stuck_open clear clear clear clear
M1LC1ALC1_Isolation_Spr0 clear clear clear clear
M1LC1ALC1_Isolation_Spr1 clear clear clear clear
M1LC1ALC1_Isolation_Spr2 clear clear clear clear
M1LC1ALC1_Isolation_Spr3 clear clear clear clear
M1_LC1_Earth_Flt_RatioVeVdc NUM 0.759 0.761 0.759 0.761
M1LC1ALC_Sh_B1 clear clear clear clear
M1LC1ALC_Sh_B2 clear clear clear clear
M1LC1AIP_or_DIO_card_missing clear clear clear clear
M1LC1Thermal_switch_shutdown clear clear clear clear
M1LC1Cntrl_data_not_Rxed_from_any_node clear clear clear clear
M1LC1DSP_Sts_reply_fail_or_chksuk_fail clear clear clear clear
M1LC1DSP_Control_Ack_failed clear clear clear clear
M1LC1DSP_Software_not_valid clear clear clear clear
M1LC1Precharging_contactor_stuck_open clear clear clear clear
M1LC1Main_contactor_stuck_open clear clear clear clear
M1LC1Pre_charging_failed clear clear clear clear
M1LC1ALC_LC_Communication_failed clear clear clear clear
M1LC1ALC_Sh_B13 clear clear clear clear
M1LC1DSP_shd1 clear clear clear clear
M1LC1DSP_shd2 clear clear clear clear
M1LC1ALC1_SHD_Spr0 clear clear clear clear
M1_LC1_VR_Ki_out A 27 28 32 31
M1_LC1_VR_Kd_out A 2 3 1 0
M1_LC1_PWM_period_value NUM 13008 12848 12848 12848
M1_LC1_PLL_Phase_Error oC 0.0549 -0.2087 0 0.0879
M1_LC1_Phase_Angle_Delay oC 93.46 93.16 93.42 93.31
M1_LC1_PWM_Phase_Shift oC 359.13 359.13 359.13 359.13
M1LC1BCH_GDPSfail_or_OFCcablefail clear clear clear clear
M1LC1BCH_di_dtFault clear clear clear clear

Page 62
Sheet1

M1LC1BCH_Shoot_ThroughShortOpen clear clear clear clear


M1LC1BCH_VceSatHighFreq clear clear clear clear
M1LC1BCH_GateVolFault clear clear clear clear
M1LC1BCH_Txfailure clear clear clear clear
M1LC1BCH_Based_On_Count clear clear clear clear
M1LC1BCH_Spr clear clear clear clear
M1_LC1_Precharg_success_cnt NUM 6 6 6 6
M1LC1U_Bot_GDPSfail_or_OFCcablefail clear clear clear clear
M1LC1U_Bot_di_dtFault clear clear clear clear
M1LC1U_Bot_Shoot_ThroughShortOpen clear clear clear clear
M1LC1U_Bot_VceSatHighFreq clear clear clear clear
M1LC1U_Bot_GateVolFault clear clear clear clear
M1LC1U_Bot_Txfailure clear clear clear clear
M1LC1U_Bot_Based_On_Count clear clear clear clear
M1LC1U_Bot_Spr clear clear clear clear
M1LC1U_Top_GDPSfail_or_OFCcablefail clear clear clear clear
M1LC1U_Top_di_dtFault clear clear clear clear
M1LC1U_Top_Shoot_ThroughShortOpen clear clear clear clear
M1LC1U_Top_VceSatHighFreq clear clear clear clear
M1LC1U_Top_GateVolFault clear clear clear clear
M1LC1U_Top_Txfailure clear clear clear clear
M1LC1U_Top_Based_On_Count clear clear clear clear
M1LC1U_Top_Spr clear clear clear clear
M1LC1V_Bot_GDPSfail_or_OFCcablefail clear clear clear clear
M1LC1V_Bot_di_dtFault clear clear clear clear
M1LC1V_Bot_Shoot_ThroughShortOpen clear clear clear clear
M1LC1V_Bot_VceSatHighFreq clear clear clear clear
M1LC1V_Bot_GateVolFault clear clear clear clear
M1LC1V_Bot_Txfailure clear clear clear clear
M1LC1V_Bot_Based_On_Count clear clear clear clear
M1LC1V_Bot_Spr clear clear clear clear
M1LC1V_Top_GDPSfail_or_OFCcablefail clear clear clear clear
M1LC1V_Top_di_dtFault clear clear clear clear
M1LC1V_Top_Shoot_ThroughShortOpen clear clear clear clear
M1LC1V_Top_VceSatHighFreq clear clear clear clear
M1LC1V_Top_GateVolFault clear clear clear clear
M1LC1V_Top_Txfailure clear clear clear clear
M1LC1V_Top_Based_On_Count clear clear clear clear
M1LC1V_Top_Spr clear clear clear clear
M1LC1AIP1_Sense Low Low Low Low
M1LC1AIP2_Sense High High High High
M1LC1Can_OFC_Sense Low Low Low Low
M1LC1DIO_Sense Low Low Low Low
M1LC1ALC1_card_pin_Spr0 Low Low Low Low
M1LC1AIP1_power_supply Low Low Low Low
M1LC1AIP2_power_supply Low Low Low Low
M1LC1DIO_power_supply Low Low Low Low
M1LC1ALC1_card_pin_Spr1 Low Low Low Low
M1LC1CAN_OFC_power_supply Low Low Low Low

Page 63
Sheet1

M1LC1Combined_power_supply Low Low Low Low


M1LC1ALC1_card_pin_Spr2 Low Low Low Low
M1LC1Test_mode_enabled Disabled Disabled Disabled Disabled
M1LC1ALC1_card_pin_Spr3 Low Low Low Low
M1LC1Test_mode_Type Manual Manual Manual Manual
M1LC1Pre_charging_contactor_Inhibit Normal Normal Normal Normal
M1LC2LC_TC2_Redundant_Comm_Faulty Healthy Healthy Healthy Healthy
M1LC2Fault_Flag_sts_1_Spr1 clear clear clear clear
M1LC2BCH_Res_IGBT_Open clear clear clear clear
M1LC2BCH_Temp_Crossed_Max_Limit clear clear clear clear
M1LC2LC_LC_DSPCAN_Comm_Faulty Healthy Healthy Healthy Healthy
M1LC2LC_TC1_DSPCAN_Comm_Faulty Healthy Healthy Healthy Healthy
M1LC2LC_TC2_DSPCAN_Comm_Faulty Healthy Healthy Healthy Healthy
M1LC2LC_TC1_Redundant_Comm_Faulty Healthy Healthy Healthy Healthy
M1LC2Hlth_Missing_Frm_OtherLC Healthy Healthy Healthy Healthy
M1LC2LC_Number_mismatch clear clear clear clear
M1LC2Other_LC_number_wrong clear clear clear clear
M1LC2DSP_CANA_initialize_Flt clear clear clear clear
M1LC2DSP_CANB_initialize_Flt clear clear clear clear
M1LC2BCH_Has_Low_Resistance_Path clear clear clear clear
M1LC2BCH_IGBT_Fired_TimedOut clear clear clear clear
M1LC2CFG_CheckSUm_Fail clear clear clear clear
M1LC2Fault_Flag_sts_2_Spr0 clear clear clear clear
M1LC2Fault_Flag_sts_2_Spr1 clear clear clear clear
M1LC2Fault_Flag_sts_2_Spr2 clear clear clear clear
M1LC2Fault_Flag_sts_2_Spr3 clear clear clear clear
M1LC2LC_LC_DSPCAN_RedComm_Faulty Healthy Healthy Healthy Healthy
M1LC2LC1_Fault_Flag_sts_2_Spr4 clear clear clear clear
M1LC2Both_BCH_Circuits_are_Faulty Healthy Healthy Healthy Healthy
M1LC2DCLV_Discharge_Failed Passed Passed Passed Passed
M1LC2VR_PID_Stopped clear clear clear clear
M1LC2BCH_Fired_at_Level1 Not Fired Not Fired Not Fired Not Fired
M1LC2BCH_Fired_at_Level2 Not Fired Not Fired Not Fired Not Fired
M1LC2BCH_L1_Fire_Timeout clear clear clear clear
M1LC2HSFDP_ReadAck_Fail Passed Passed Passed Passed
M1LC2HSFDP_CompleteAck_Fail Passed Passed Passed Passed
M1LC2HSFDP_Progress2DMC_Fail Passed Passed Passed Passed
M1LC2BCH_Trip_Very_High_Volt Not Tripped Not Tripped Not Tripped Not Tripped
M1LC2VceSat_in_BCH clear clear clear clear
M1LC2BCH_Over_Current clear clear clear clear
M1LC2BCH_PWM_OFC_TX_Fail clear clear clear clear
M1LC2BCH_GDPSfailorRxOFCcablefail clear clear clear clear
M1LC2Fault_Flag_sts_3_Spr2 clear clear clear clear
M1LC2Fault_Flag_sts_3_Spr3 clear clear clear clear
M1LC2Fault_Flag_sts_3_Spr4 clear clear clear clear
M1LC2Fault_Flag_sts_3_Spr5 clear clear clear clear
M1LC2Fault_Flag_sts_3_Spr6 clear clear clear clear
M1LC2Fault_Flag_sts_3_Spr7 clear clear clear clear
M1LC2Fault_Flag_sts_3_Spr8 clear clear clear clear

Page 64
Sheet1

M1LC2Fault_Flag_sts_3_Spr9 clear clear clear clear


M1LC2Fault_Flag_sts_3_Spr10 clear clear clear clear
M1LC2Fault_Flag_sts_3_Spr11 clear clear clear clear
M1LC2Fault_Flag_sts_3_Spr12 clear clear clear clear
M1LC2Fault_Flag_sts_3_Spr13 clear clear clear clear
M1LC2WDRST clear clear clear clear
M1LC2MailBox_Mismatch clear clear clear clear
M1LC2Send_Sema_Acquire_Fail Acquired Acquired Acquired Acquired
M1LC2Send_Sema_Release_Fail Released Released Released Released
M1LC2Receive_Sema_Acquire_Fail Acquired Acquired Acquired Acquired
M1LC2Receive_Sema_Release_Fail Released Released Released Released
M1LC2LowDCLVActual clear clear clear clear
M1LC2DPRAM_CAN_Received clear clear clear clear
M1LC2PLL_Reset clear clear clear clear
M1LC2PLL_Run set set set set
M1LC2DCLV_Transient_Detect clear clear clear clear
M1LC2BCH_IGBT_Fired clear clear clear clear
M1LC2Fault_Flag_sts_4_Spr0 clear clear clear clear
M1LC2Fault_Flag_sts_4_Spr1 clear clear clear clear
M1LC2Fault_Flag_sts_4_Spr2 clear clear clear clear
M1LC2Fault_Flag_sts_4_Spr3 clear clear clear clear
M1_LC2_LTC_Blower_current A 2 2.08 2.02 1.9
M1_LC2_Is_rms_With_Ripple A 77 75 74 85
M1_LC2_DCLV_Ref V 1800 1800 1800 1800
M1_LC2_DCLV_Max V 1825 1825 1828 1829
M1_LC2_OHE_V_Peak V 34.48 34.73 34.78 34.77
M1_LC2_IsPeak A 200 189 205 214
M1_LC2_contactor_and_cfg_status NUM 2 2 2 2
M1LC2Primary_Over_I clear clear clear clear
M1LC2100_Hz_Filter_Over_Current clear clear clear clear
M1LC2secondary_current_crossed_max_limit clear clear clear clear
M1LC2Line_Cont_stuck_closed_DCLV_blw_min clear clear clear clear
M1LC2DCLV_Crossed_max_limit_Lockout clear clear clear clear
M1LC2DCLV_Crossed_min_limit_Lockout clear clear clear clear
M1LC2100Hz_Filter_I_Lockout clear clear clear clear
M1LC2Earth_fault_at_positive_side clear clear clear clear
M1LC2Earth_fault_at_negative_side clear clear clear clear
M1LC2Earth_fault_at_TF_TM_side clear clear clear clear
M1LC2Line_cont_stuck_open clear clear clear clear
M1LC2Precharge_stuck_open clear clear clear clear
M1LC2ALC1_Isolation_Spr0 clear clear clear clear
M1LC2ALC1_Isolation_Spr1 clear clear clear clear
M1LC2ALC1_Isolation_Spr2 clear clear clear clear
M1LC2ALC1_Isolation_Spr3 clear clear clear clear
M1_LC2_Earth_Flt_RatioVeVdc NUM 0.758 0.758 0.758 0.758
M1LC2ALC_Sh_B1 clear clear clear clear
M1LC2ALC_Sh_B2 clear clear clear clear
M1LC2AIP_or_DIO_card_missing clear clear clear clear
M1LC2Thermal_switch_shutdown clear clear clear clear

Page 65
Sheet1

M1LC2Cntrl_data_not_Rxed_from_any_node clear clear clear clear


M1LC2DSP_Sts_reply_fail_or_chksuk_fail clear clear clear clear
M1LC2DSP_Control_Ack_failed clear clear clear clear
M1LC2DSP_Software_not_valid clear clear clear clear
M1LC2Precharging_contactor_stuck_open clear clear clear clear
M1LC2Main_contactor_stuck_open clear clear clear clear
M1LC2Pre_charging_failed clear clear clear clear
M1LC2ALC_LC_Communication_failed clear clear clear clear
M1LC2ALC_Sh_B13 clear clear clear clear
M1LC2DSP_shd1 clear clear clear clear
M1LC2DSP_shd2 clear clear clear clear
M1LC2ALC1_SHD_Spr0 clear clear clear clear
M1_LC2_VR_Ki_out A 34 31 33 39
M1_LC2_VR_Kd_out A -1 0 -3 1
M1_LC2_PWM_period_value NUM 12560 12848 12848 12848
M1_LC2_PLL_Phase_Error oC 0.033 -0.2747 0.011 0.0989
M1_LC2_Phase_Angle_Delay oC 98.22 97.95 98.18 98.06
M1_LC2_PWM_Phase_Shift oC 352.21 352.21 352.21 352.21
M1LC2BCH_GDPSfail_or_OFCcablefail clear clear clear clear
M1LC2BCH_di_dtFault clear clear clear clear
M1LC2BCH_Shoot_ThroughShortOpen clear clear clear clear
M1LC2BCH_VceSatHighFreq clear clear clear clear
M1LC2BCH_GateVolFault clear clear clear clear
M1LC2BCH_Txfailure clear clear clear clear
M1LC2BCH_Based_On_Count clear clear clear clear
M1LC2BCH_Spr clear clear clear clear
M1_LC2_Precharg_success_cnt NUM 6 6 6 6
M1LC2U_Bot_GDPSfail_or_OFCcablefail clear clear clear clear
M1LC2U_Bot_di_dtFault clear clear clear clear
M1LC2U_Bot_Shoot_ThroughShortOpen clear clear clear clear
M1LC2U_Bot_VceSatHighFreq clear clear clear clear
M1LC2U_Bot_GateVolFault clear clear clear clear
M1LC2U_Bot_Txfailure clear clear clear clear
M1LC2U_Bot_Based_On_Count clear clear clear clear
M1LC2U_Bot_Spr clear clear clear clear
M1LC2U_Top_GDPSfail_or_OFCcablefail clear clear clear clear
M1LC2U_Top_di_dtFault clear clear clear clear
M1LC2U_Top_Shoot_ThroughShortOpen clear clear clear clear
M1LC2U_Top_VceSatHighFreq clear clear clear clear
M1LC2U_Top_GateVolFault clear clear clear clear
M1LC2U_Top_Txfailure clear clear clear clear
M1LC2U_Top_Based_On_Count clear clear clear clear
M1LC2U_Top_Spr clear clear clear clear
M1LC2V_Bot_GDPSfail_or_OFCcablefail clear clear clear clear
M1LC2V_Bot_di_dtFault clear clear clear clear
M1LC2V_Bot_Shoot_ThroughShortOpen clear clear clear clear
M1LC2V_Bot_VceSatHighFreq clear clear clear clear
M1LC2V_Bot_GateVolFault clear clear clear clear
M1LC2V_Bot_Txfailure clear clear clear clear

Page 66
Sheet1

M1LC2V_Bot_Based_On_Count clear clear clear clear


M1LC2V_Bot_Spr clear clear clear clear
M1LC2V_Top_GDPSfail_or_OFCcablefail clear clear clear clear
M1LC2V_Top_di_dtFault clear clear clear clear
M1LC2V_Top_Shoot_ThroughShortOpen clear clear clear clear
M1LC2V_Top_VceSatHighFreq clear clear clear clear
M1LC2V_Top_GateVolFault clear clear clear clear
M1LC2V_Top_Txfailure clear clear clear clear
M1LC2V_Top_Based_On_Count clear clear clear clear
M1LC2V_Top_Spr clear clear clear clear
M1LC2AIP1_Sense Low Low Low Low
M1LC2AIP2_Sense High High High High
M1LC2Can_OFC_Sense Low Low Low Low
M1LC2DIO_Sense Low Low Low Low
M1LC2ALC1_card_pin_Spr0 Low Low Low Low
M1LC2AIP1_power_supply Low Low Low Low
M1LC2AIP2_power_supply Low Low Low Low
M1LC2DIO_power_supply Low Low Low Low
M1LC2ALC1_card_pin_Spr1 Low Low Low Low
M1LC2CAN_OFC_power_supply Low Low Low Low
M1LC2Combined_power_supply Low Low Low Low
M1LC2ALC1_card_pin_Spr2 Low Low Low Low
M1LC2Test_mode_enabled Disabled Disabled Disabled Disabled
M1LC2ALC1_card_pin_Spr3 Low Low Low Low
M1LC2Test_mode_Type Manual Manual Manual Manual
M1LC2Pre_charging_contactor_Inhibit Normal Normal Normal Normal
M2_INV1_Comm_Health_Flag NUM 6144 6144 6144 6144
M2_INV1_TM1_RPMstatusflag NUM 0 0 0 0
M2_INV1_SensorSpeed RPM 1191 1191 1187 1184
M2_INV1_TM2_RPMstatusflag NUM 32768 32768 32768 32768
M2_INV1_Beat_Magnitude A 0.12 0.18 0.12 0.31
M2_INV1_StatusWord NUM 0 0 0 0
M2_INV1_Average_RPM RPM 1193 1190 1187 1184
M2_INV1_LCflagstatus NUM 8 8 8 8
M2INV1_Speed_Signal_1_input_sts set set set set
M2INV1_Speed_Signal_2_input_sts set set set set
M2INV1_Speed_Signal_3_input_sts set set set set
M2INV1_Speed_Signal_4_input_sts set set set set
M2INV1_Spr13 clear clear clear clear
M2INV1_Spr14 clear clear clear clear
M2INV1_Spr15 clear clear clear clear
M2INV1_Spr16 clear clear clear clear
M2_INV1_statusdata15 NUM 1190 1187 1184 1182
M2_INV1_FluxSpeed RPM 1192.09 1191.07 1186.96 1184.03
M2_INV1_VceSatCnt_Lvl1 NUM 0 0 0 0
M2_INV1_WrkPulseMode NUM 11 11 11 11
M2_INV1_DiffRpmCntr1 NUM 15148 15148 15148 15148
M2_INV1_Ir_Rms A 169.68 172.55 169.68 170.41
M2_INV1_Iy_Rms A 168.27 170.41 168.27 170.41

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M2_INV1_Ib_Rms A 170.41 171.14 169.01 170.41


M2_INV1_Slip_RPM RPM 0.59 0 0 0
M2_INV1_Modulation_Index NUM 803 807 802 800
M2_INV1_DiffRpmCntr2 NUM 59 59 59 59
M2_INV1_DCLV NUM 1810 1806 1801 1807
M2_INV1_statusdata43 NUM 1 1 1 1
M2_INV1_Ipeak A 425 429 431 431
M2_INV2_Comm_Health_Flag NUM 6144 6144 6144 6144
M2_INV2_TM1_RPMstatusflag NUM 0 0 0 0
M2_INV2_SensorSpeed RPM 1193 1189 1187 1185
M2_INV2_TM2_RPMstatusflag NUM 0 0 0 0
M2_INV2_Beat_Magnitude A 0.24 0.61 0.67 0.61
M2_INV2_StatusWord NUM 0 0 0 0
M2_INV2_Average_RPM RPM 1193 1190 1187 1184
M2_INV2_LCflagstatus NUM 8 8 8 8
M2INV2_Speed_Signal_1_input_sts set set set set
M2INV2_Speed_Signal_2_input_sts set set set set
M2INV2_Speed_Signal_3_input_sts set set set set
M2INV2_Speed_Signal_4_input_sts set set set set
M2INV2_Spr13 clear clear clear clear
M2INV2_Spr14 clear clear clear clear
M2INV2_Spr15 clear clear clear clear
M2INV2_Spr16 clear clear clear clear
M2_INV2_statusdata15 NUM 1189 1187 1184 1180
M2_INV2_FluxSpeed RPM 1193.12 1190.92 1188.43 1186.52
M2_INV2_VceSatCnt_Lvl1 NUM 0 0 0 0
M2_INV2_WrkPulseMode NUM 11 11 11 11
M2_INV2_DiffRpmCntr1 NUM 14316 14316 14316 14316
M2_INV2_Ir_Rms A 169.01 170.41 175.35 177.43
M2_INV2_Iy_Rms A 168.27 170.41 176.76 176.76
M2_INV2_Ib_Rms A 169.01 172.55 175.35 178.1
M2_INV2_Slip_RPM RPM 0.59 1.46 1.76 1.9
M2_INV2_Modulation_Index NUM 812 805 811 811
M2_INV2_DiffRpmCntr2 NUM 55 55 55 55
M2_INV2_DCLV NUM 1807 1807 1797 1794
M2_INV2_statusdata43 NUM 1 1 1 1
M2_INV2_Ipeak A 409 425 430 429
M2LC1LC_TC2_Redundant_Comm_Faulty Healthy Healthy Healthy Healthy
M2LC1Fault_Flag_sts_1_Spr1 clear clear clear clear
M2LC1BCH_Res_IGBT_Open clear clear clear clear
M2LC1BCH_Temp_Crossed_Max_Limit clear clear clear clear
M2LC1LC_LC_DSPCAN_Comm_Faulty Healthy Healthy Healthy Healthy
M2LC1LC_TC1_DSPCAN_Comm_Faulty Healthy Healthy Healthy Healthy
M2LC1LC_TC2_DSPCAN_Comm_Faulty Healthy Healthy Healthy Healthy
M2LC1LC_TC1_Redundant_Comm_Faulty Healthy Healthy Healthy Healthy
M2LC1Hlth_Missing_Frm_OtherLC Healthy Healthy Healthy Healthy
M2LC1LC_Number_mismatch clear clear clear clear
M2LC1Other_LC_number_wrong clear clear clear clear
M2LC1DSP_CANA_initialize_Flt clear clear clear clear

Page 68
Sheet1

M2LC1DSP_CANB_initialize_Flt clear clear clear clear


M2LC1BCH_Has_Low_Resistance_Path clear clear clear clear
M2LC1BCH_IGBT_Fired_TimedOut clear clear clear clear
M2LC1CFG_CheckSUm_Fail clear clear clear clear
M2LC1Fault_Flag_sts_2_Spr0 clear clear clear clear
M2LC1Fault_Flag_sts_2_Spr1 clear clear clear clear
M2LC1Fault_Flag_sts_2_Spr2 clear clear clear clear
M2LC1Fault_Flag_sts_2_Spr3 clear clear clear clear
M2LC1LC_LC_DSPCAN_RedComm_Faulty Healthy Healthy Healthy Healthy
M2LC1LC1_Fault_Flag_sts_2_Spr4 clear clear clear clear
M2LC1Both_BCH_Circuits_are_Faulty Healthy Healthy Healthy Healthy
M2LC1DCLV_Discharge_Failed Passed Passed Passed Passed
M2LC1VR_PID_Stopped clear clear clear clear
M2LC1BCH_Fired_at_Level1 Not Fired Not Fired Not Fired Not Fired
M2LC1BCH_Fired_at_Level2 Not Fired Not Fired Not Fired Not Fired
M2LC1BCH_L1_Fire_Timeout clear clear clear clear
M2LC1HSFDP_ReadAck_Fail Passed Passed Passed Passed
M2LC1HSFDP_CompleteAck_Fail Passed Passed Passed Passed
M2LC1HSFDP_Progress2DMC_Fail Passed Passed Passed Passed
M2LC1BCH_Trip_Very_High_Volt Not Tripped Not Tripped Not Tripped Not Tripped
M2LC1VceSat_in_BCH clear clear clear clear
M2LC1BCH_Over_Current clear clear clear clear
M2LC1BCH_PWM_OFC_TX_Fail clear clear clear clear
M2LC1BCH_GDPSfailorRxOFCcablefail clear clear clear clear
M2LC1Fault_Flag_sts_3_Spr2 clear clear clear clear
M2LC1Fault_Flag_sts_3_Spr3 clear clear clear clear
M2LC1Fault_Flag_sts_3_Spr4 clear clear clear clear
M2LC1Fault_Flag_sts_3_Spr5 clear clear clear clear
M2LC1Fault_Flag_sts_3_Spr6 clear clear clear clear
M2LC1Fault_Flag_sts_3_Spr7 clear clear clear clear
M2LC1Fault_Flag_sts_3_Spr8 clear clear clear clear
M2LC1Fault_Flag_sts_3_Spr9 clear clear clear clear
M2LC1Fault_Flag_sts_3_Spr10 clear clear clear clear
M2LC1Fault_Flag_sts_3_Spr11 clear clear clear clear
M2LC1Fault_Flag_sts_3_Spr12 clear clear clear clear
M2LC1Fault_Flag_sts_3_Spr13 clear clear clear clear
M2LC1WDRST clear clear clear clear
M2LC1MailBox_Mismatch clear clear clear clear
M2LC1Send_Sema_Acquire_Fail Acquired Acquired Acquired Acquired
M2LC1Send_Sema_Release_Fail Released Released Released Released
M2LC1Receive_Sema_Acquire_Fail Acquired Acquired Acquired Acquired
M2LC1Receive_Sema_Release_Fail Released Released Released Released
M2LC1LowDCLVActual clear clear clear clear
M2LC1DPRAM_CAN_Received clear clear clear clear
M2LC1PLL_Reset clear clear clear clear
M2LC1PLL_Run set set set set
M2LC1DCLV_Transient_Detect clear clear clear clear
M2LC1BCH_IGBT_Fired clear clear clear clear
M2LC1Fault_Flag_sts_4_Spr0 clear clear clear clear

Page 69
Sheet1

M2LC1Fault_Flag_sts_4_Spr1 clear clear clear clear


M2LC1Fault_Flag_sts_4_Spr2 clear clear clear clear
M2LC1Fault_Flag_sts_4_Spr3 clear clear clear clear
M2_LC1_LTC_Blower_current A 2.02 2.09 2.07 2.02
M2_LC1_Is_rms_With_Ripple A 69 57 56 58
M2_LC1_DCLV_Ref V 1800 1800 1800 1800
M2_LC1_DCLV_Max V 1830 1830 1829 1832
M2_LC1_OHE_V_Peak V 34.98 34.86 34.52 34.64
M2_LC1_IsPeak A 178 151 152 158
M2_LC1_contactor_and_cfg_status NUM 2 2 2 2
M2LC1Primary_Over_I clear clear clear clear
M2LC1100_Hz_Filter_Over_Current clear clear clear clear
M2LC1secondary_current_crossed_max_limit clear clear clear clear
M2LC1Line_Cont_stuck_closed_DCLV_blw_min clear clear clear clear
M2LC1DCLV_Crossed_max_limit_Lockout clear clear clear clear
M2LC1DCLV_Crossed_min_limit_Lockout clear clear clear clear
M2LC1100Hz_Filter_I_Lockout clear clear clear clear
M2LC1Earth_fault_at_positive_side clear clear clear clear
M2LC1Earth_fault_at_negative_side clear clear clear clear
M2LC1Earth_fault_at_TF_TM_side clear clear clear clear
M2LC1Line_cont_stuck_open clear clear clear clear
M2LC1Precharge_stuck_open clear clear clear clear
M2LC1ALC1_Isolation_Spr0 clear clear clear clear
M2LC1ALC1_Isolation_Spr1 clear clear clear clear
M2LC1ALC1_Isolation_Spr2 clear clear clear clear
M2LC1ALC1_Isolation_Spr3 clear clear clear clear
M2_LC1_Earth_Flt_RatioVeVdc NUM 0.763 0.762 0.762 0.762
M2LC1ALC_Sh_B1 clear clear clear clear
M2LC1ALC_Sh_B2 clear clear clear clear
M2LC1AIP_or_DIO_card_missing clear clear clear clear
M2LC1Thermal_switch_shutdown clear clear clear clear
M2LC1Cntrl_data_not_Rxed_from_any_node clear clear clear clear
M2LC1DSP_Sts_reply_fail_or_chksuk_fail clear clear clear clear
M2LC1DSP_Control_Ack_failed clear clear clear clear
M2LC1DSP_Software_not_valid clear clear clear clear
M2LC1Precharging_contactor_stuck_open clear clear clear clear
M2LC1Main_contactor_stuck_open clear clear clear clear
M2LC1Pre_charging_failed clear clear clear clear
M2LC1ALC_LC_Communication_failed clear clear clear clear
M2LC1ALC_Sh_B13 clear clear clear clear
M2LC1DSP_shd1 clear clear clear clear
M2LC1DSP_shd2 clear clear clear clear
M2LC1ALC1_SHD_Spr0 clear clear clear clear
M2_LC1_VR_Ki_out A 24 16 16 16
M2_LC1_VR_Kd_out A -1 0 0 0
M2_LC1_PWM_period_value NUM 12848 12848 12848 12848
M2_LC1_PLL_Phase_Error oC 0 -0.022 0.0439 0.011
M2_LC1_Phase_Angle_Delay oC 112.36 112.48 112.29 112.32
M2_LC1_PWM_Phase_Shift oC 355.67 355.67 355.67 355.67

Page 70
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M2LC1BCH_GDPSfail_or_OFCcablefail clear clear clear clear


M2LC1BCH_di_dtFault clear clear clear clear
M2LC1BCH_Shoot_ThroughShortOpen clear clear clear clear
M2LC1BCH_VceSatHighFreq clear clear clear clear
M2LC1BCH_GateVolFault clear clear clear clear
M2LC1BCH_Txfailure clear clear clear clear
M2LC1BCH_Based_On_Count clear clear clear clear
M2LC1BCH_Spr clear clear clear clear
M2_LC1_Precharg_success_cnt NUM 6 6 6 6
M2LC1U_Bot_GDPSfail_or_OFCcablefail clear clear clear clear
M2LC1U_Bot_di_dtFault clear clear clear clear
M2LC1U_Bot_Shoot_ThroughShortOpen clear clear clear clear
M2LC1U_Bot_VceSatHighFreq clear clear clear clear
M2LC1U_Bot_GateVolFault clear clear clear clear
M2LC1U_Bot_Txfailure clear clear clear clear
M2LC1U_Bot_Based_On_Count clear clear clear clear
M2LC1U_Bot_Spr clear clear clear clear
M2LC1U_Top_GDPSfail_or_OFCcablefail clear clear clear clear
M2LC1U_Top_di_dtFault clear clear clear clear
M2LC1U_Top_Shoot_ThroughShortOpen clear clear clear clear
M2LC1U_Top_VceSatHighFreq clear clear clear clear
M2LC1U_Top_GateVolFault clear clear clear clear
M2LC1U_Top_Txfailure clear clear clear clear
M2LC1U_Top_Based_On_Count clear clear clear clear
M2LC1U_Top_Spr clear clear clear clear
M2LC1V_Bot_GDPSfail_or_OFCcablefail clear clear clear clear
M2LC1V_Bot_di_dtFault clear clear clear clear
M2LC1V_Bot_Shoot_ThroughShortOpen clear clear clear clear
M2LC1V_Bot_VceSatHighFreq clear clear clear clear
M2LC1V_Bot_GateVolFault clear clear clear clear
M2LC1V_Bot_Txfailure clear clear clear clear
M2LC1V_Bot_Based_On_Count clear clear clear clear
M2LC1V_Bot_Spr clear clear clear clear
M2LC1V_Top_GDPSfail_or_OFCcablefail clear clear clear clear
M2LC1V_Top_di_dtFault clear clear clear clear
M2LC1V_Top_Shoot_ThroughShortOpen clear clear clear clear
M2LC1V_Top_VceSatHighFreq clear clear clear clear
M2LC1V_Top_GateVolFault clear clear clear clear
M2LC1V_Top_Txfailure clear clear clear clear
M2LC1V_Top_Based_On_Count clear clear clear clear
M2LC1V_Top_Spr clear clear clear clear
M2LC1AIP1_Sense Low Low Low Low
M2LC1AIP2_Sense High High High High
M2LC1Can_OFC_Sense Low Low Low Low
M2LC1DIO_Sense Low Low Low Low
M2LC1ALC1_card_pin_Spr0 Low Low Low Low
M2LC1AIP1_power_supply Low Low Low Low
M2LC1AIP2_power_supply Low Low Low Low
M2LC1DIO_power_supply Low Low Low Low

Page 71
Sheet1

M2LC1ALC1_card_pin_Spr1 Low Low Low Low


M2LC1CAN_OFC_power_supply Low Low Low Low
M2LC1Combined_power_supply Low Low Low Low
M2LC1ALC1_card_pin_Spr2 Low Low Low Low
M2LC1Test_mode_enabled Disabled Disabled Disabled Disabled
M2LC1ALC1_card_pin_Spr3 Low Low Low Low
M2LC1Test_mode_Type Manual Manual Manual Manual
M2LC1Pre_charging_contactor_Inhibit Normal Normal Normal Normal
M2LC2LC_TC2_Redundant_Comm_Faulty Healthy Healthy Healthy Healthy
M2LC2Fault_Flag_sts_1_Spr1 clear clear clear clear
M2LC2BCH_Res_IGBT_Open clear clear clear clear
M2LC2BCH_Temp_Crossed_Max_Limit clear clear clear clear
M2LC2LC_LC_DSPCAN_Comm_Faulty Healthy Healthy Healthy Healthy
M2LC2LC_TC1_DSPCAN_Comm_Faulty Healthy Healthy Healthy Healthy
M2LC2LC_TC2_DSPCAN_Comm_Faulty Healthy Healthy Healthy Healthy
M2LC2LC_TC1_Redundant_Comm_Faulty Healthy Healthy Healthy Healthy
M2LC2Hlth_Missing_Frm_OtherLC Healthy Healthy Healthy Healthy
M2LC2LC_Number_mismatch clear clear clear clear
M2LC2Other_LC_number_wrong clear clear clear clear
M2LC2DSP_CANA_initialize_Flt clear clear clear clear
M2LC2DSP_CANB_initialize_Flt clear clear clear clear
M2LC2BCH_Has_Low_Resistance_Path clear clear clear clear
M2LC2BCH_IGBT_Fired_TimedOut clear clear clear clear
M2LC2CFG_CheckSUm_Fail clear clear clear clear
M2LC2Fault_Flag_sts_2_Spr0 clear clear clear clear
M2LC2Fault_Flag_sts_2_Spr1 clear clear clear clear
M2LC2Fault_Flag_sts_2_Spr2 clear clear clear clear
M2LC2Fault_Flag_sts_2_Spr3 clear clear clear clear
M2LC2LC_LC_DSPCAN_RedComm_Faulty Healthy Healthy Healthy Healthy
M2LC2LC1_Fault_Flag_sts_2_Spr4 clear clear clear clear
M2LC2Both_BCH_Circuits_are_Faulty Healthy Healthy Healthy Healthy
M2LC2DCLV_Discharge_Failed Passed Passed Passed Passed
M2LC2VR_PID_Stopped clear clear clear clear
M2LC2BCH_Fired_at_Level1 Not Fired Not Fired Not Fired Not Fired
M2LC2BCH_Fired_at_Level2 Not Fired Not Fired Not Fired Not Fired
M2LC2BCH_L1_Fire_Timeout clear clear clear clear
M2LC2HSFDP_ReadAck_Fail Passed Passed Passed Passed
M2LC2HSFDP_CompleteAck_Fail Passed Passed Passed Passed
M2LC2HSFDP_Progress2DMC_Fail Passed Passed Passed Passed
M2LC2BCH_Trip_Very_High_Volt Not Tripped Not Tripped Not Tripped Not Tripped
M2LC2VceSat_in_BCH clear clear clear clear
M2LC2BCH_Over_Current clear clear clear clear
M2LC2BCH_PWM_OFC_TX_Fail clear clear clear clear
M2LC2BCH_GDPSfailorRxOFCcablefail clear clear clear clear
M2LC2Fault_Flag_sts_3_Spr2 clear clear clear clear
M2LC2Fault_Flag_sts_3_Spr3 clear clear clear clear
M2LC2Fault_Flag_sts_3_Spr4 clear clear clear clear
M2LC2Fault_Flag_sts_3_Spr5 clear clear clear clear
M2LC2Fault_Flag_sts_3_Spr6 clear clear clear clear

Page 72
Sheet1

M2LC2Fault_Flag_sts_3_Spr7 clear clear clear clear


M2LC2Fault_Flag_sts_3_Spr8 clear clear clear clear
M2LC2Fault_Flag_sts_3_Spr9 clear clear clear clear
M2LC2Fault_Flag_sts_3_Spr10 clear clear clear clear
M2LC2Fault_Flag_sts_3_Spr11 clear clear clear clear
M2LC2Fault_Flag_sts_3_Spr12 clear clear clear clear
M2LC2Fault_Flag_sts_3_Spr13 clear clear clear clear
M2LC2WDRST clear clear clear clear
M2LC2MailBox_Mismatch clear clear clear clear
M2LC2Send_Sema_Acquire_Fail Acquired Acquired Acquired Acquired
M2LC2Send_Sema_Release_Fail Released Released Released Released
M2LC2Receive_Sema_Acquire_Fail Acquired Acquired Acquired Acquired
M2LC2Receive_Sema_Release_Fail Released Released Released Released
M2LC2LowDCLVActual clear clear clear clear
M2LC2DPRAM_CAN_Received clear clear clear clear
M2LC2PLL_Reset clear clear clear clear
M2LC2PLL_Run set set set set
M2LC2DCLV_Transient_Detect clear clear clear clear
M2LC2BCH_IGBT_Fired clear clear clear clear
M2LC2Fault_Flag_sts_4_Spr0 clear clear clear clear
M2LC2Fault_Flag_sts_4_Spr1 clear clear clear clear
M2LC2Fault_Flag_sts_4_Spr2 clear clear clear clear
M2LC2Fault_Flag_sts_4_Spr3 clear clear clear clear
M2_LC2_LTC_Blower_current A 2.02 2.1 2.05 2.01
M2_LC2_Is_rms_With_Ripple A 74 103 111 120
M2_LC2_DCLV_Ref V 1800 1800 1800 1800
M2_LC2_DCLV_Max V 1826 1826 1826 1829
M2_LC2_OHE_V_Peak V 34.8 34.54 34.54 34.61
M2_LC2_IsPeak A 188 232 247 255
M2_LC2_contactor_and_cfg_status NUM 2 2 2 2
M2LC2Primary_Over_I clear clear clear clear
M2LC2100_Hz_Filter_Over_Current clear clear clear clear
M2LC2secondary_current_crossed_max_limit clear clear clear clear
M2LC2Line_Cont_stuck_closed_DCLV_blw_min clear clear clear clear
M2LC2DCLV_Crossed_max_limit_Lockout clear clear clear clear
M2LC2DCLV_Crossed_min_limit_Lockout clear clear clear clear
M2LC2100Hz_Filter_I_Lockout clear clear clear clear
M2LC2Earth_fault_at_positive_side clear clear clear clear
M2LC2Earth_fault_at_negative_side clear clear clear clear
M2LC2Earth_fault_at_TF_TM_side clear clear clear clear
M2LC2Line_cont_stuck_open clear clear clear clear
M2LC2Precharge_stuck_open clear clear clear clear
M2LC2ALC1_Isolation_Spr0 clear clear clear clear
M2LC2ALC1_Isolation_Spr1 clear clear clear clear
M2LC2ALC1_Isolation_Spr2 clear clear clear clear
M2LC2ALC1_Isolation_Spr3 clear clear clear clear
M2_LC2_Earth_Flt_RatioVeVdc NUM 0.018 0.044 0.049 0.056
M2LC2ALC_Sh_B1 clear clear clear clear
M2LC2ALC_Sh_B2 clear clear clear clear

Page 73
Sheet1

M2LC2AIP_or_DIO_card_missing clear clear clear clear


M2LC2Thermal_switch_shutdown clear clear clear clear
M2LC2Cntrl_data_not_Rxed_from_any_node clear clear clear clear
M2LC2DSP_Sts_reply_fail_or_chksuk_fail clear clear clear clear
M2LC2DSP_Control_Ack_failed clear clear clear clear
M2LC2DSP_Software_not_valid clear clear clear clear
M2LC2Precharging_contactor_stuck_open clear clear clear clear
M2LC2Main_contactor_stuck_open clear clear clear clear
M2LC2Pre_charging_failed clear clear clear clear
M2LC2ALC_LC_Communication_failed clear clear clear clear
M2LC2ALC_Sh_B13 clear clear clear clear
M2LC2DSP_shd1 clear clear clear clear
M2LC2DSP_shd2 clear clear clear clear
M2LC2ALC1_SHD_Spr0 clear clear clear clear
M2_LC2_VR_Ki_out A 40 61 62 65
M2_LC2_VR_Kd_out A 1 0 -1 0
M2_LC2_PWM_period_value NUM 12831 12831 12832 12833
M2_LC2_PLL_Phase_Error oC 0.033 -0.2197 0.022 0
M2_LC2_Phase_Angle_Delay oC 108.37 108.14 108.15 108.14
M2_LC2_PWM_Phase_Shift oC 348.75 348.75 348.75 348.75
M2LC2BCH_GDPSfail_or_OFCcablefail clear clear clear clear
M2LC2BCH_di_dtFault clear clear clear clear
M2LC2BCH_Shoot_ThroughShortOpen clear clear clear clear
M2LC2BCH_VceSatHighFreq clear clear clear clear
M2LC2BCH_GateVolFault clear clear clear clear
M2LC2BCH_Txfailure clear clear clear clear
M2LC2BCH_Based_On_Count clear clear clear clear
M2LC2BCH_Spr clear clear clear clear
M2_LC2_Precharg_success_cnt NUM 6 6 6 6
M2LC2U_Bot_GDPSfail_or_OFCcablefail clear clear clear clear
M2LC2U_Bot_di_dtFault clear clear clear clear
M2LC2U_Bot_Shoot_ThroughShortOpen clear clear clear clear
M2LC2U_Bot_VceSatHighFreq clear clear clear clear
M2LC2U_Bot_GateVolFault clear clear clear clear
M2LC2U_Bot_Txfailure clear clear clear clear
M2LC2U_Bot_Based_On_Count clear clear clear clear
M2LC2U_Bot_Spr clear clear clear clear
M2LC2U_Top_GDPSfail_or_OFCcablefail clear clear clear clear
M2LC2U_Top_di_dtFault clear clear clear clear
M2LC2U_Top_Shoot_ThroughShortOpen clear clear clear clear
M2LC2U_Top_VceSatHighFreq clear clear clear clear
M2LC2U_Top_GateVolFault clear clear clear clear
M2LC2U_Top_Txfailure clear clear clear clear
M2LC2U_Top_Based_On_Count clear clear clear clear
M2LC2U_Top_Spr clear clear clear clear
M2LC2V_Bot_GDPSfail_or_OFCcablefail clear clear clear clear
M2LC2V_Bot_di_dtFault clear clear clear clear
M2LC2V_Bot_Shoot_ThroughShortOpen clear clear clear clear
M2LC2V_Bot_VceSatHighFreq clear clear clear clear

Page 74
Sheet1

M2LC2V_Bot_GateVolFault clear clear clear clear


M2LC2V_Bot_Txfailure clear clear clear clear
M2LC2V_Bot_Based_On_Count clear clear clear clear
M2LC2V_Bot_Spr clear clear clear clear
M2LC2V_Top_GDPSfail_or_OFCcablefail clear clear clear clear
M2LC2V_Top_di_dtFault clear clear clear clear
M2LC2V_Top_Shoot_ThroughShortOpen clear clear clear clear
M2LC2V_Top_VceSatHighFreq clear clear clear clear
M2LC2V_Top_GateVolFault clear clear clear clear
M2LC2V_Top_Txfailure clear clear clear clear
M2LC2V_Top_Based_On_Count clear clear clear clear
M2LC2V_Top_Spr clear clear clear clear
M2LC2AIP1_Sense Low Low Low Low
M2LC2AIP2_Sense High High High High
M2LC2Can_OFC_Sense Low Low Low Low
M2LC2DIO_Sense Low Low Low Low
M2LC2ALC1_card_pin_Spr0 Low Low Low Low
M2LC2AIP1_power_supply Low Low Low Low
M2LC2AIP2_power_supply Low Low Low Low
M2LC2DIO_power_supply Low Low Low Low
M2LC2ALC1_card_pin_Spr1 Low Low Low Low
M2LC2CAN_OFC_power_supply Low Low Low Low
M2LC2Combined_power_supply Low Low Low Low
M2LC2ALC1_card_pin_Spr2 Low Low Low Low
M2LC2Test_mode_enabled Disabled Disabled Disabled Disabled
M2LC2ALC1_card_pin_Spr3 Low Low Low Low
M2LC2Test_mode_Type Manual Manual Manual Manual
M2LC2Pre_charging_contactor_Inhibit Normal Normal Normal Normal
M1INV1_UV_ph_IGBT_Heat_Sink_Te oC 51 51 51 51
M1INV1_WbphBch_IGBT_HeatSink_T oC 43 43 43 43
M1INV1_TM1_Stat_Temp oC 69 69 69 69
M1INV1_TM2_Stat_Temp oC 69 69 69 69
M1INV2_UV_ph_IGBT_Heat_Sink_Te oC 50 50 50 50
M1INV2_WbphBch_IGBT_HeatSink_T oC 43 43 43 43
M1INV2_TM1_Stat_Temp oC 69 69 69 69
M1INV2_TM2_Stat_Temp oC 69 69 69 70
M1LC1_Pre_Charging_Contactor_Hlth_Sts Healthy Healthy Healthy Healthy
M1LC1_Line_Converter_Contactor_NO_Hlth_Sts Healthy Healthy Healthy Healthy
M1LC1_Line_Converter_Contactor_NC_Hlth_Sts Healthy Healthy Healthy Healthy
M1LC1_Blower_Hlth_Sts Healthy Healthy Healthy Healthy
M1LC1_DIP5 Healthy Healthy Healthy Healthy
M1LC1_DIP6 Healthy Healthy Healthy Healthy
M1LC1_DIP7 Healthy Healthy Healthy Healthy
M1LC1_DIP8 Healthy Healthy Healthy Healthy
M1LC1_Pre_charging_Output_Hlth_Sts Healthy Healthy Healthy Healthy
M1LC1_Line_Output_Hlth_Sts Healthy Healthy Healthy Healthy
M1LC1_VCB_ON_Output_Hlth_Sts Healthy Healthy Healthy Healthy
M1LC1_Blower_Enable_Hlth_Sts Healthy Healthy Healthy Healthy
M1LC1_DOP5 Healthy Healthy Healthy Healthy

Page 75
Sheet1

M1LC1_DOP6 Healthy Healthy Healthy Healthy


M1LC1_DOP7 Healthy Healthy Healthy Healthy
M1LC1_DOP8 Healthy Healthy Healthy Healthy
M1_LC1_BCH_Resistor_Temp oC 49.9 49.9 50 49.9
M1_LC1_Uph_Heat_Sink_Temp oC 42 42 42 42
M1_LC1_Vph_Heat_Sink_Temp oC 43 43 43 43
M1_LC1_Precharge_Res_Temp oC 0 0 0 0
M1LC1Vp Healthy Healthy Healthy Healthy
M1LC1Is Healthy Healthy Healthy Healthy
M1LC1DCLV Healthy Healthy Healthy Healthy
M1LC1Tf_Primary_Current Healthy Healthy Healthy Healthy
M1LC1Tf_Primary_Return_Current Healthy Healthy Healthy Healthy
M1LC1U_Phase_Temp Healthy Healthy Healthy Healthy
M1LC1V_Phase_Temp Healthy Healthy Healthy Healthy
M1LC1_Sensor_Hlt_sts_Spr6 Healthy Healthy Healthy Healthy
M1LC1_Sensor_Hlt_sts_Spr5 Healthy Healthy Healthy Healthy
M1LC1_Sensor_Hlt_sts_Spr4 Healthy Healthy Healthy Healthy
M1LC1_Sensor_Hlt_sts_Spr3 Healthy Healthy Healthy Healthy
M1LC1BCH_Current Healthy Healthy Healthy Healthy
M1LC1100Hz_Filter_Current Faulty Faulty Faulty Faulty
M1LC1EFLT_Volt Faulty Faulty Faulty Faulty
M1LC1_Sensor_Hlt_sts_Spr2 Faulty Faulty Faulty Faulty
M1LC1_Sensor_Hlt_sts_Spr1 Faulty Faulty Faulty Faulty
M1LC2_Pre_Charging_Contactor_Hlth_Sts Healthy Healthy Healthy Healthy
M1LC2_Line_Converter_Contactor_NO_Hlth_Sts Healthy Healthy Healthy Healthy
M1LC2_Line_Converter_Contactor_NC_Hlth_Sts Healthy Healthy Healthy Healthy
M1LC2_Blower_Hlth_Sts Healthy Healthy Healthy Healthy
M1LC2_DIP5 Healthy Healthy Healthy Healthy
M1LC2_DIP6 Healthy Healthy Healthy Healthy
M1LC2_DIP7 Healthy Healthy Healthy Healthy
M1LC2_DIP8 Healthy Healthy Healthy Healthy
M1LC2_Pre_charging_Output_Hlth_Sts Healthy Healthy Healthy Healthy
M1LC2_Line_Output_Hlth_Sts Healthy Healthy Healthy Healthy
M1LC2_VCB_ON_Output_Hlth_Sts Healthy Healthy Healthy Healthy
M1LC2_Blower_Enable_Hlth_Sts Healthy Healthy Healthy Healthy
M1LC2_DOP5 Healthy Healthy Healthy Healthy
M1LC2_DOP6 Healthy Healthy Healthy Healthy
M1LC2_DOP7 Healthy Healthy Healthy Healthy
M1LC2_DOP8 Healthy Healthy Healthy Healthy
M1_LC2_BCH_Resistor_Temp oC 49.9 49.9 49.9 49.9
M1_LC2_Uph_Heat_Sink_Temp oC 42 42 42 42
M1_LC2_Vph_Heat_Sink_Temp oC 42 42 42 42
M1_LC2_Precharge_Res_Temp oC 0 0 0 0
M1LC2Vp Healthy Healthy Healthy Healthy
M1LC2Is Healthy Healthy Healthy Healthy
M1LC2DCLV Healthy Healthy Healthy Healthy
M1LC2Tf_Primary_Current1 Healthy Healthy Healthy Healthy
M1LC2Tf_Primary_Return_Current Healthy Healthy Healthy Healthy
M1LC2U_Phase_Temp Healthy Healthy Healthy Healthy

Page 76
Sheet1

M1LC2V_Phase_Temp Healthy Healthy Healthy Healthy


M1LC2_Sensor_Hlt_sts_Spr6 Healthy Healthy Healthy Healthy
M1LC2_Sensor_Hlt_sts_Spr5 Healthy Healthy Healthy Healthy
M1LC2_Sensor_Hlt_sts_Spr4 Healthy Healthy Healthy Healthy
M1LC2_Sensor_Hlt_sts_Spr3 Healthy Healthy Healthy Healthy
M1LC2BCH_Current Healthy Healthy Healthy Healthy
M1LC2100Hz_Filter_Current Faulty Faulty Faulty Faulty
M1LC2EFLT_Volt Faulty Faulty Faulty Faulty
M1LC2_Sensor_Hlt_sts_Spr2 Faulty Faulty Faulty Faulty
M1LC2_Sensor_Hlt_sts_Spr1 Faulty Faulty Faulty Faulty
M2INV1_UV_ph_IGBT_Heat_Sink_Te oC 45 45 45 45
M2INV1_WphBch_IGBT_HeatSink_Te oC 40 40 40 40
M2INV1_TM1_Stat_Temp oC 225 225 224 224
M2INV1_TM2_Stat_Temp oC 62 62 62 62
M2INV2_UV_ph_IGBT_Heat_Sink_Te oC 52 52 52 52
M2INV2_WphBch_IGBT_HeatSink_Te oC 43 43 43 43
M2INV2_TM1_Stat_Temp oC 68 68 68 68
M2INV2_TM2_Stat_Temp oC 70 70 70 70
M2LC1_Pre_Charging_Contactor_Hlth_Sts Healthy Healthy Healthy Healthy
M2LC1_Line_Converter_Contactor_NO_Hlth_Sts Healthy Healthy Healthy Healthy
M2LC1_Line_Converter_Contactor_NC_Hlth_Sts Healthy Healthy Healthy Healthy
M2LC1_Blower_Hlth_Sts Healthy Healthy Healthy Healthy
M2LC1_DIP5 Healthy Healthy Healthy Healthy
M2LC1_DIP6 Healthy Healthy Healthy Healthy
M2LC1_DIP7 Healthy Healthy Healthy Healthy
M2LC1_DIP8 Healthy Healthy Healthy Healthy
M2LC1_Pre_charging_Output_Hlth_Sts Healthy Healthy Healthy Healthy
M2LC1_Line_Output_Hlth_Sts Healthy Healthy Healthy Healthy
M2LC1_VCB_ON_Output_Hlth_Sts Healthy Healthy Healthy Healthy
M2LC1_Blower_Enable_Hlth_Sts Healthy Healthy Healthy Healthy
M2LC1_DOP5 Healthy Healthy Healthy Healthy
M2LC1_DOP6 Healthy Healthy Healthy Healthy
M2LC1_DOP7 Healthy Healthy Healthy Healthy
M2LC1_DOP8 Healthy Healthy Healthy Healthy
M2_LC1_BCH_Resistor_Temp oC 49.9 49.9 49.9 50
M2_LC1_Uph_Heat_Sink_Temp oC 40 40 40 40
M2_LC1_Vph_Heat_Sink_Temp oC 39 39 39 39
M2_LC1_Precharge_Res_Temp oC 0 0 0 0
M2LC1Vp Healthy Healthy Healthy Healthy
M2LC1Is Healthy Healthy Healthy Healthy
M2LC1DCLV Healthy Healthy Healthy Healthy
M2LC1Tf_Primary_Current Healthy Healthy Healthy Healthy
M2LC1Tf_Primary_Return_Current Healthy Healthy Healthy Healthy
M2LC1U_Phase_Temp Healthy Healthy Healthy Healthy
M2LC1V_Phase_Temp Healthy Healthy Healthy Healthy
M2LC1_Sensor_Hlt_sts_Spr6 Healthy Healthy Healthy Healthy
M2LC1_Sensor_Hlt_sts_Spr5 Healthy Healthy Healthy Healthy
M2LC1_Sensor_Hlt_sts_Spr4 Healthy Healthy Healthy Healthy
M2LC1_Sensor_Hlt_sts_Spr3 Healthy Healthy Healthy Healthy

Page 77
Sheet1

M2LC1BCH_Current Healthy Healthy Healthy Healthy


M2LC1100Hz_Filter_Current Faulty Faulty Faulty Faulty
M2LC1EFLT_Volt Faulty Faulty Faulty Faulty
M2LC1_Sensor_Hlt_sts_Spr2 Faulty Faulty Faulty Faulty
M2LC1_Sensor_Hlt_sts_Spr1 Faulty Faulty Faulty Faulty
M2LC2_Pre_Charging_Contactor_Hlth_Sts Healthy Healthy Healthy Healthy
M2LC2_Line_Converter_Contactor_NO_Hlth_Sts Healthy Healthy Healthy Healthy
M2LC2_Line_Converter_Contactor_NC_Hlth_Sts Healthy Healthy Healthy Healthy
M2LC2_Blower_Hlth_Sts Healthy Healthy Healthy Healthy
M2LC2_DIP5 Healthy Healthy Healthy Healthy
M2LC2_DIP6 Healthy Healthy Healthy Healthy
M2LC2_DIP7 Healthy Healthy Healthy Healthy
M2LC2_DIP8 Healthy Healthy Healthy Healthy
M2LC2_Pre_charging_Output_Hlth_Sts Healthy Healthy Healthy Healthy
M2LC2_Line_Output_Hlth_Sts Healthy Healthy Healthy Healthy
M2LC2_VCB_ON_Output_Hlth_Sts Healthy Healthy Healthy Healthy
M2LC2_Blower_Enable_Hlth_Sts Healthy Healthy Healthy Healthy
M2LC2_DOP5 Healthy Healthy Healthy Healthy
M2LC2_DOP6 Healthy Healthy Healthy Healthy
M2LC2_DOP7 Healthy Healthy Healthy Healthy
M2LC2_DOP8 Healthy Healthy Healthy Healthy
M2_LC2_BCH_Resistor_Temp oC 50 50 50 50
M2_LC2_Uph_Heat_Sink_Temp oC 44 44 44 44
M2_LC2_Vph_Heat_Sink_Temp oC 44 44 44 44
M2_LC2_Precharge_Res_Temp oC 0 0 0 0
M2LC2Vp Healthy Healthy Healthy Healthy
M2LC2Is Healthy Healthy Healthy Healthy
M2LC2DCLV Healthy Healthy Healthy Healthy
M2LC2Tf_Primary_Current1 Healthy Healthy Healthy Healthy
M2LC2Tf_Primary_Return_Current Healthy Healthy Healthy Healthy
M2LC2U_Phase_Temp Healthy Healthy Healthy Healthy
M2LC2V_Phase_Temp Healthy Healthy Healthy Healthy
M2LC2_Sensor_Hlt_sts_Spr6 Healthy Healthy Healthy Healthy
M2LC2_Sensor_Hlt_sts_Spr5 Healthy Healthy Healthy Healthy
M2LC2_Sensor_Hlt_sts_Spr4 Healthy Healthy Healthy Healthy
M2LC2_Sensor_Hlt_sts_Spr3 Healthy Healthy Healthy Healthy
M2LC2BCH_Current Healthy Healthy Healthy Healthy
M2LC2100Hz_Filter_Current Faulty Faulty Faulty Faulty
M2LC2EFLT_Volt Faulty Faulty Faulty Faulty
M2LC2_Sensor_Hlt_sts_Spr2 Faulty Faulty Faulty Faulty
M2LC2_Sensor_Hlt_sts_Spr1 Faulty Faulty Faulty Faulty

Page 78
Sheet1

6938 Message: Spare Location: PRAGATI MAIDAN

06/08/2019 06:08:53
06/08/2019 06:08:54
06/08/2019 06:08:55
06/08/2019 06:08:56
06/08/2019 06:08:57
26 27 27 27 28
NW MASTER NW MASTER NW MASTER NW MASTER NW MASTER
NW ACT SLAVE NW ACT SLAVE NW ACT SLAVE NW ACT SLAVE NW ACT SLAVE
NW REG SLAVE NW REG SLAVE NW REG SLAVE NW REG SLAVE NW REG SLAVE
NW REG SLAVE NW REG SLAVE NW REG SLAVE NW REG SLAVE NW REG SLAVE
9.3 9.3 9.3 9.2 9.2
8.7 8.7 8.7 8.7 8.8
4.9 4.9 4.9 4.9 4.9
4.9 4.9 4.9 4.9 4.9
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
set set set set set
set set set set set
clear clear clear clear clear
set set set set set
clear clear clear clear clear
set set set set set
set set set set set
clear clear clear clear clear
clear clear clear clear clear
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
set set set set set
clear clear clear clear clear
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear

Page 79
Sheet1

clear clear clear clear clear


clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
set set set set set
set set set set set
clear clear clear clear clear
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
set set set set set
set set set set set
set set set set set
set set set set set
set set set set set
set set set set set
set set set set set
set set set set set
set set set set set
set set set set set
set set set set set
set set set set set
set set set set set

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Sheet1

set set set set set


set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
set set set set set
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
set set set set set
clear clear clear clear clear

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Sheet1

clear clear clear clear clear


set set set set set
clear clear clear clear clear
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
set set set set set
set set set set set
clear clear clear clear clear
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear

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clear clear clear clear clear


clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
set set set set set
set set set set set
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
set set set set set
set set set set set

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set set set set set


set set set set set
set set set set set
set set set set set
set set set set set
set set set set set
set set set set set
set set set set set
set set set set set
set set set set set
set set set set set
set set set set set
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear

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Sheet1

clear clear clear clear clear


clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
set set set set set
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
set set set set set
clear clear clear clear clear
clear clear clear clear clear
set set set set set
clear clear clear clear clear
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear

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Sheet1

clear clear clear clear clear


clear clear clear clear clear
PWR PWR PWR PWR PWR
9 9 9 9 9
24.4 24.5 24.5 24.5 24.5
59 59 64 64 71
19962 19973 19985 19996 20007
41 41 41 41 41
0.01 0.01 0.01 0 0
1235 1235 1235 1235 1235
160 160 160 160 160
None None None None None
7 8 9 10 11
125 125 125 125 125
4.3 4.3 4.3 3.9 4
clear clear clear clear clear
set set set set set
clear clear clear clear clear
set set set set set
clear clear clear clear clear
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
set set set set set
set set set set set
set set set set set
clear clear clear clear clear

Page 86
Sheet1

set set set set set


clear clear clear clear clear
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
set set set set set
Normal Normal Normal Normal Normal

clear clear clear clear clear


clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
set set set set set
set set set set set
clear clear clear clear clear
set set set set set
clear clear clear clear clear
Open Open Open Open Open
clear clear clear clear clear
Invalid Invalid Invalid Invalid Invalid
set set set set set
clear clear clear clear clear
set set set set set
set set set set set
clear clear clear clear clear

clear clear clear clear clear


clear clear clear clear clear
set set set set set
clear clear clear clear clear

clear clear clear clear clear


clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear

Page 87
Sheet1

clear clear clear clear clear


clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
Clear Clear Clear Clear Clear
2 2 2 2 2
10 10 10 10 10
No RAP No RAP No RAP No RAP No RAP
Clear Clear Clear Clear Clear
Clear Clear Clear Clear Clear
Clear Clear Clear Clear Clear
Clear Clear Clear Clear Clear
Set Set Set Set Set
Invalid Invalid Invalid Invalid Invalid
Invalid Invalid Invalid Invalid Invalid
Invalid Invalid Invalid Invalid Invalid
Invalid Invalid Invalid Invalid Invalid

Invalid Invalid Invalid Invalid Invalid


clear clear clear clear clear
set set set set set

6 6 6 6 6
14 14 14 14 14
16 16 16 16 16
clear clear clear clear clear
0 0 0 0 0
9 9 9 9 9
9 9 9 9 9
0 0 0 0 0
9 9 9 9 9
9 9 9 9 9
2 2 2 2 2
set set set set set
set set set set set
set set set set set
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear

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Sheet1

set set set set set

clear clear clear clear clear


clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
set set set set set
clear clear clear clear clear
clear clear clear clear clear
Ok Ok Ok Ok Ok
clear clear clear clear clear
Ok Ok Ok Ok Ok
Ok Ok Ok Ok Ok
Ok Ok Ok Ok Ok
Ok Ok Ok Ok Ok
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
set set set set set
clear clear clear clear clear
clear clear clear clear clear
Healthy Healthy Healthy Healthy Healthy
set set set set set
set set set set set
3.7 3.7 3.7 3.7 3.7
3.8 3.8 3.8 3.8 3.8
3.4 3.4 3.5 3.4 3.4
3.8 3.7 3.8 3.8 3.7
56.2 56.2 56.4 56.3 56.1
9.2 9.2 9.2 9.2 9.2
-2.4 -2.4 -2.4 -2.4 -2.4
set set set set set
set set set set set
set set set set set
set set set set set
clear clear clear clear clear
set set set set set
clear clear clear clear clear
set set set set set
clear clear clear clear clear
set set set set set
set set set set set
clear clear clear clear clear

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Sheet1

set set set set set


set set set set set
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
set set set set set
set set set set set
clear clear clear clear clear
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
set set set set set
set set set set set
set set set set set
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
set set set set set
clear clear clear clear clear
clear clear clear clear clear
set set set set set
set set set set set
clear clear clear clear clear
set set set set set
clear clear clear clear clear
clear clear clear clear clear
set set set set set
set set set set set
clear clear clear clear clear
set set set set set

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clear clear clear clear clear


clear clear clear clear clear
clear clear clear clear clear
set set set set set
set set set set set
set set set set set
clear clear clear clear clear
set set set set set
set set set set set
set set set set set
set set set set set
0 0 0 0 0
set set set set set
set set set set set
set set set set set
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
set set set set set
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
27.5 27.5 27.5 27.5 27.5
27.5 27.5 27.5 27.5 27.5
0 0 0 0 0
0 0 0 0 0
clear clear clear clear clear

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clear clear clear clear clear


clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
set set set set set
clear clear clear clear clear
clear clear clear clear clear

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clear clear clear clear clear


clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
set set set set set
set set set set set
clear clear clear clear clear
clear clear clear clear clear
set set set set set
clear clear clear clear clear
set set set set set
set set set set set
set set set set set
clear clear clear clear clear
set set set set set
set set set set set
clear clear clear clear clear
clear clear clear clear clear
set set set set set
clear clear clear clear clear
clear clear clear clear clear
set set set set set
clear clear clear clear clear
set set set set set
set set set set set
set set set set set
set set set set set
clear clear clear clear clear
set set set set set
clear clear clear clear clear
set set set set set
set set set set set
clear clear clear clear clear
set set set set set
clear clear clear clear clear
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear

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clear clear clear clear clear


Ok Ok Ok Ok Ok
Ok Ok Ok Ok Ok
Ok Ok Ok Ok Ok
Ok Ok Ok Ok Ok
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
set set set set set
clear clear clear clear clear
clear clear clear clear clear
Healthy Healthy Healthy Healthy Healthy
set set set set set
set set set set set
4 4 4.1 4 4.1
4.1 4.1 4.1 4.2 4.1
3.8 3.8 3.9 3.8 3.8
3.9 4 3.9 4 3.9
59.7 59.8 59.7 59.7 59.8
None None None None None
PWR PWR PWR PWR PWR
set set set set set
set set set set set
set set set set set
set set set set set
clear clear clear clear clear
set set set set set
clear clear clear clear clear
set set set set set
clear clear clear clear clear
set set set set set
set set set set set
clear clear clear clear clear
set set set set set
set set set set set
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
set set set set set
set set set set set
set set set set set
set set set set set

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clear clear clear clear clear


clear clear clear clear clear
clear clear clear clear clear
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
set set set set set
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
set set set set set
clear clear clear clear clear
clear clear clear clear clear
set set set set set
clear clear clear clear clear
clear clear clear clear clear
set set set set set
clear clear clear clear clear
clear clear clear clear clear
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
set set set set set
set set set set set
clear clear clear clear clear
set set set set set
set set set set set
clear clear clear clear clear
clear clear clear clear clear
set set set set set
set set set set set
set set set set set
set set set set set
set set set set set
set set set set set
clear clear clear clear clear
set set set set set
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear

Page 95
Sheet1

set set set set set


set set set set set
set set set set set
clear clear clear clear clear
clear clear clear clear clear
set set set set set
set set set set set
set set set set set
clear clear clear clear clear
set set set set set
clear clear clear clear clear
clear clear clear clear clear
set set set set set
set set set set set
clear clear clear clear clear
set set set set set
set set set set set
set set set set set
set set set set set
set set set set set
clear clear clear clear clear
set set set set set
set set set set set
set set set set set
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
set set set set set
set set set set set
clear clear clear clear clear
set set set set set
clear clear clear clear clear
set set set set set
clear clear clear clear clear
set set set set set
clear clear clear clear clear
set set set set set
set set set set set
set set set set set
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear

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clear clear clear clear clear


set set set set set
set set set set set
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
30.25 30.25 30.25 30.25 30.25
29 29 29 29 29
0 0 0 0 0
0 0 0 0 0
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
set set set set set

Page 97
Sheet1

clear clear clear clear clear


clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
set set set set set
clear clear clear clear clear
clear clear clear clear clear
set set set set set
set set set set set
clear clear clear clear clear
clear clear clear clear clear
set set set set set
clear clear clear clear clear
clear clear clear clear clear
set set set set set
set set set set set
clear clear clear clear clear
set set set set set
set set set set set
clear clear clear clear clear

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clear clear clear clear clear


set set set set set
clear clear clear clear clear
clear clear clear clear clear
set set set set set
clear clear clear clear clear
24.4 24.5 24.5 24.4 24.5
16.2 15.1 15.6 17.6 17.9
43 43 43 43 43
42 43 43 42 43
41.1 41 41 41 41
16.3 15.1 15.7 14.8 17.9
14.6 15.1 15.5 17.6 16.4
set set set set set
set set set set set
set set set set set
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
Ok Ok Ok Ok Ok
clear clear clear clear clear
Ok Ok Ok Ok Ok
Ok Ok Ok Ok Ok
Ok Ok Ok Ok Ok
Ok Ok Ok Ok Ok
clear clear clear clear clear

Page 99
Sheet1

clear clear clear clear clear


clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
set set set set set
clear clear clear clear clear
clear clear clear clear clear
Healthy Healthy Healthy Healthy Healthy
set set set set set
set set set set set
3.4 3.4 3.4 3.4 3.4
3.4 3.4 3.4 3.4 3.4
3.6 3.6 3.5 3.6 3.6
3.3 3.4 3.4 3.3 3.3
60.3 60.4 60.4 60.2 60.3
-5 -5 -5 -5 -5
-2.4 -2.4 -2.4 -2.4 -2.4
set set set set set
set set set set set
set set set set set
set set set set set
clear clear clear clear clear
set set set set set
clear clear clear clear clear
set set set set set
clear clear clear clear clear
set set set set set
set set set set set
clear clear clear clear clear
set set set set set
set set set set set
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
set set set set set
clear clear clear clear clear
set set set set set
clear clear clear clear clear
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear

Page 100
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clear clear clear clear clear


clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
set set set set set
set set set set set
set set set set set
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
set set set set set
set set set set set
clear clear clear clear clear
set set set set set
clear clear clear clear clear
set set set set set
clear clear clear clear clear
clear clear clear clear clear
set set set set set
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
set set set set set
set set set set set
set set set set set
set set set set set
clear clear clear clear clear
clear clear clear clear clear
set set set set set
set set set set set
clear clear clear clear clear
set set set set set
set set set set set
set set set set set
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear

Page 101
Sheet1

clear clear clear clear clear


clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
31.5 31.5 31.5 31.5 31.5
31.5 31.5 31.5 31.5 31.5
0 0 0 0 0
0 0 0 0 0
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear

Page 102
Sheet1

clear clear clear clear clear


clear clear clear clear clear
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
set set set set set
set set set set set
clear clear clear clear clear
set set set set set
set set set set set
clear clear clear clear clear
clear clear clear clear clear
set set set set set
set set set set set
clear clear clear clear clear

Page 103
Sheet1

set set set set set


set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
set set set set set
clear clear clear clear clear
clear clear clear clear clear
None None None None None
2 2 2 2 2
Fwd Fwd Fwd Fwd Fwd
Fwd Fwd Fwd Fwd Fwd
Fwd Fwd Fwd Fwd Fwd
Fwd Fwd Fwd Fwd Fwd
set set set set set
clear clear clear clear clear
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
set set set set set
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
Invalid Invalid Invalid Invalid Invalid
Invalid Invalid Invalid Invalid Invalid
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
41.1 41 41 41 41
329 360 397 425 455
329 360 397 425 455
338 356 386 428 452
334 362 426 418 466
1182 1180 1180 1178 1180
1181 1181 1180 1179 1179
1239 1238 1236 1235 1236

Page 104
Sheet1

1239 1238 1236 1235 1236


1180 1179 1178 1177 1178
7 7.7 8.5 9 9.7
99.1 99.1 99.1 99.1 99.1
2.1 2.2 2.5 2.6 2.8
100 100 100 100 100
100 100 100 100 100
100 100 100 100 100
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
99 99 99 99 99
99 99 99 99 99
7 7 8 9 9
7 7 8 9 9
100 100 100 100 100
100 100 100 100 100
100 100 100 100 100
100 100 100 100 100
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
690 690 690 690 690
690 690 690 690 690
68 72 68 78 75
59 63 75 73 79
41 44 47 52 55
41 44 52 51 57
60.7 64.5 69.6 67.2 73.4
63.4 66.8 67.3 71.9 70.9
951 951 951 951 951
951 951 951 951 951
36 36 36 36 36
952 952 952 952 952
49272 49272 49272 49272 49272
1180 1179 1178 1177 1178
MAX_TRQ_LMT
MAX_TRQ_LMT
MAX_TRQ_LMT
MAX_TRQ_LMT
MAX_TRQ_LMT
MAX_TRQ_LMT
MAX_TRQ_LMT
MAX_TRQ_LMT
MAX_TRQ_LMT
MAX_TRQ_LMT
8540 8540 8540 8540 8540
0 0 0 0 0
PWR PWR PWR PWR PWR
0 0 0 0 0
0 0 0 0 0
set set set set set
clear clear clear clear clear
clear clear clear clear clear

Page 105
Sheet1

set set set set set


clear clear clear clear clear
clear clear clear clear clear
set set set set set
clear clear clear clear clear
set set set set set
clear clear clear clear clear
clear clear clear clear clear
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
25551 25549 25542 25543 25541
1180 1180 1179 1178 1178
69 69 69 69 69
1180 1180 1179 1178 1178
0 0 0 0 0
set set set set set
clear clear clear clear clear
clear clear clear clear clear
set set set set set
clear clear clear clear clear
set set set set set
set set set set set
set set set set set
clear clear clear clear clear
clear clear clear clear clear
set set set set set
set set set set set
set set set set set
clear clear clear clear clear
clear clear clear clear clear
set set set set set
set set set set set
clear clear clear clear clear
clear clear clear clear clear
set set set set set
clear clear clear clear clear
clear clear clear clear clear
set set set set set
clear clear clear clear clear
set set set set set
clear clear clear clear clear
clear clear clear clear clear
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear

Page 106
Sheet1

clear clear clear clear clear


25551 25548 25542 25542 25541
1182 1180 1179 1178 1179
69 69 69 69 69
1182 1180 1179 1178 1179
0 0 0 0 0
set set set set set
clear clear clear clear clear
clear clear clear clear clear
set set set set set
clear clear clear clear clear
set set set set set
set set set set set
set set set set set
clear clear clear clear clear
clear clear clear clear clear
set set set set set
set set set set set
set set set set set
clear clear clear clear clear
clear clear clear clear clear
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
set set set set set
clear clear clear clear clear
clear clear clear clear clear

Page 107
Sheet1

set set set set set


clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
100 100 100 100 100
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
set set set set set
set set set set set
set set set set set
set set set set set
set set set set set
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
0 0 0 0 0
0 0 0 0 0
338 356 386 428 452
1182 1180 1179 1179 1180
1184 1182 1182 1180 1182
clear clear clear clear clear
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear

Page 108
Sheet1

clear clear clear clear clear


clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
set set set set set
clear clear clear clear clear
clear clear clear clear clear
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
100 100 100 100 100
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
set set set set set
set set set set set
set set set set set
set set set set set
set set set set set
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear

Page 109
Sheet1

0 0 0 0 0
0 0 0 0 0
334 362 426 418 466
1181 1180 1179 1179 1179
1182 1183 1181 1180 1181
clear clear clear clear clear
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
0 0 0 0 0
49 49 49 49 49
0.97 0.98 0.97 0.97 0.97
1368 1366 1367 1368 1369
Low Low Low Low Low
High High High High High
Low Low Low Low Low
High High High High High
Low Low Low Low Low
Low Low Low Low Low
Low Low Low Low Low
Low Low Low Low Low
Low Low Low Low Low
High High High High High
Low Low Low Low Low
High High High High High
Low Low Low Low Low
Low Low Low Low Low
Low Low Low Low Low
Low Low Low Low Low
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear

Page 110
Sheet1

clear clear clear clear clear


clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
24.3 24.2 24.5 24.4 24.5
78 83 77 89 86
96.3 109.4 104.2 117.9 112.1
1800 1794 1801 1797 1804
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
Locked Locked Locked Locked Locked
Enabled Enabled Enabled Enabled Enabled
clear clear clear clear clear
Passed Passed Passed Passed Passed
clear clear clear clear clear
clear clear clear clear clear
No No No No No
Healthy Healthy Healthy Healthy Healthy
Ready Ready Ready Ready Ready
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
1799 1794 1799 1796 1802
0 0 0 0 0
49 49 49 49 49
0.97 0.97 0.98 0.98 0.98
1361 1362 1363 1366 1362

Page 111
Sheet1

Low Low Low Low Low


High High High High High
Low Low Low Low Low
High High High High High
Low Low Low Low Low
Low Low Low Low Low
Low Low Low Low Low
Low Low Low Low Low
Low Low Low Low Low
High High High High High
Low Low Low Low Low
High High High High High
Low Low Low Low Low
Low Low Low Low Low
Low Low Low Low Low
Low Low Low Low Low
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
24.3 24.2 24.6 24.4 24.4
68 73 85 83 91
93 103.8 109.1 122.7 134.8
1804 1801 1805 1798 1795
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear

Page 112
Sheet1

clear clear clear clear clear


clear clear clear clear clear
clear clear clear clear clear
Locked Locked Locked Locked Locked
Enabled Enabled Enabled Enabled Enabled
clear clear clear clear clear
Passed Passed Passed Passed Passed
clear clear clear clear clear
clear clear clear clear clear
No No No No No
Healthy Healthy Healthy Healthy Healthy
Ready Ready Ready Ready Ready
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
1806 1802 1806 1800 1797
set set set set set
set set set set set
set set set set set
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear

Page 113
Sheet1

Ok Ok Ok Ok Ok
clear clear clear clear clear
Ok Ok Ok Ok Ok
Ok Ok Ok Ok Ok
Ok Ok Ok Ok Ok
Ok Ok Ok Ok Ok
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
set set set set set
clear clear clear clear clear
clear clear clear clear clear
Healthy Healthy Healthy Healthy Healthy
set set set set set
set set set set set
3.5 3.5 3.5 3.5 3.5
3.3 3.4 3.3 3.3 3.3
3.1 3.2 3.2 3.2 3.2
3.5 3.5 3.4 3.5 3.4
59.5 59.7 59.5 59.6 59.6
-5 -5 -5 -5 -5
-2.4 -2.4 -2.4 -2.4 -2.4
set set set set set
set set set set set
set set set set set
set set set set set
clear clear clear clear clear
set set set set set
clear clear clear clear clear
set set set set set
clear clear clear clear clear
set set set set set
set set set set set
clear clear clear clear clear
set set set set set
set set set set set
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear

Page 114
Sheet1

set set set set set


set set set set set
clear clear clear clear clear
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
set set set set set
set set set set set
set set set set set
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
set set set set set
set set set set set
clear clear clear clear clear
set set set set set
clear clear clear clear clear
set set set set set
clear clear clear clear clear
clear clear clear clear clear
set set set set set
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
set set set set set
set set set set set
set set set set set
set set set set set
clear clear clear clear clear
clear clear clear clear clear
set set set set set
set set set set set
clear clear clear clear clear
set set set set set
set set set set set

Page 115
Sheet1

set set set set set


set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
31.25 31.25 31.25 31.25 31.25
30.5 30.5 30.5 30.5 30.5
0 0 0 0 0
0 0 0 0 0
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear

Page 116
Sheet1

clear clear clear clear clear


clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear

Page 117
Sheet1

clear clear clear clear clear


clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
None None None None None
2 1 1 1 1
Fwd Fwd Fwd Fwd Fwd
Fwd Fwd Fwd Fwd Fwd
Fwd Fwd Fwd Fwd Fwd
Fwd Fwd Fwd Fwd Fwd
set set set set set
clear clear clear clear clear
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
set clear clear clear clear
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
Invalid Invalid Invalid Invalid Invalid
Invalid Invalid Invalid Invalid Invalid
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
41.1 41 41 41 41

Page 118
Sheet1

0 0 0 0 0
664 726 797 855 918
0 0 0 0 0
680 722 810 850 930
1182 1182 1179 1180 1181
1182 1180 1180 1180 1180
1240 4800 4800 4800 4800
1240 1238 1236 1236 1236
1181 1179 1178 1178 1178
7.1 7.7 8.5 9.1 9.8
50 50 50 50 50
2.1 2.2 2.5 2.6 2.8
100 100 100 100 100
100 100 100 100 100
50 50 50 50 50
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
100 100 100 100 100
0 0 0 0 0
14 15 16 18 19
100 100 100 100 100
100 100 100 100 100
100 100 100 100 100
100 100 100 100 100
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
690 0 0 0 0
690 690 690 690 690
26 18 20 20 22
106 110 120 127 133
0 0 0 0 0
84 89 100 105 114
30 30 30 30 30
81 80.8 83.1 83 85.2
951 951 951 951 951
952 952 952 952 952
36 36 36 36 36
955 955 955 955 955
49272 49240 49240 49240 49240
1181 1179 1178 1178 1178
MAX_TRQ_LMT
TRQ_SHTDWN_LMT
TRQ_SHTDWN_LMT
TRQ_SHTDWN_LMT
TRQ_SHTDWN_LMT
MAX_TRQ_LMTMAX_TRQ_LMT MAX_TRQ_LMT MAX_TRQ_LMT MAX_TRQ_LMT
4270 4270 4270 4270 4270

Page 119
Sheet1

0 0 0 0 0
PWR PWR PWR PWR PWR
0 0 0 0 0
0 0 0 0 0
set clear clear clear clear
clear clear clear clear clear
clear set set set set
set set set set set
clear clear clear clear clear
clear clear clear clear clear
set clear clear clear clear
clear clear clear clear clear
set set set set set
clear clear clear clear clear
clear clear clear clear clear
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
25548 25552 25538 25545 25546
1181 1179 1179 1179 1179
143 143 143 143 143
1181 1179 1179 1179 1179
0 0 0 0 0
set set set set set
clear clear clear clear clear
clear clear clear clear clear
set set set set set
clear clear clear clear clear
set set set set set
set set set set set
set set set set set
clear clear clear clear clear
clear clear clear clear clear
set set set set set
set set set set set
set set set set set
clear clear clear clear clear
clear clear clear clear clear
set set set set set
set set set set set
clear clear clear clear clear
clear clear clear clear clear
set set set set set
clear clear clear clear clear
clear clear clear clear clear
set set set set set
clear clear clear clear clear

Page 120
Sheet1

set set set set set


clear clear clear clear clear
clear clear clear clear clear
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
25549 25551 25543 25547 25545
1180 1181 1178 1178 1178
69 69 69 69 69
1180 1181 1178 1178 1178
0 0 0 0 0
set set set set set
clear clear clear clear clear
clear clear clear clear clear
set set set set set
clear clear clear clear clear
set set set set set
set set set set set
set set set set set
clear clear clear clear clear
clear clear clear clear clear
set set set set set
set set set set set
set set set set set
clear clear clear clear clear
clear clear clear clear clear
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear

Page 121
Sheet1

clear clear clear clear clear


clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
set clear clear clear clear
clear clear clear clear clear
clear set set set set
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
100 100 100 100 100
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
set set set set set
set set set set set
set set set set set
set set set set set
set set set set set
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
1183 1181 1179 1179 1177
1183 1182 1180 1182 1181
clear clear clear clear clear
set clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear

Page 122
Sheet1

clear clear clear clear clear


clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
set set set set set
clear clear clear clear clear
clear clear clear clear clear
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
100 100 100 100 100
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
set set set set set
set set set set set
set set set set set
set set set set set

Page 123
Sheet1

set set set set set


set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
0 0 0 0 0
0 0 0 0 0
680 722 810 868 930
1183 1180 1181 1180 1180
1182 1180 1181 1181 1181
clear clear clear clear clear
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
0 0 0 0 0
49 49 49 49 49
0.73 0.39 0.14 0.02 0.09
1371 1371 1371 1372 1371
Low Low Low Low Low
High High High High High
Low Low Low Low Low
High High High High High
Low Low Low Low Low
Low Low Low Low Low
Low Low Low Low Low
Low Low Low Low Low
Low Low Low Low Low
High High High High High
Low Low Low Low Low
High High High High High
Low Low Low Low Low
Low Low Low Low Low
Low Low Low Low Low
Low Low Low Low Low
clear clear clear clear clear

Page 124
Sheet1

clear clear clear clear clear


clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
24.4 24.6 24.6 24.6 24.5
30 21 23 24 25
15.1 -23.3 -21.6 -16.8 -12.5
1801 1805 1803 1800 1798
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
Locked Locked Locked Locked Locked
Enabled Enabled Enabled Enabled Enabled
clear clear clear clear clear
Passed Passed Passed Passed Passed
clear clear clear clear clear
clear clear clear clear clear
No No No No No
Healthy Healthy Healthy Healthy Healthy
Ready Ready Ready Ready Ready
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear

Page 125
Sheet1

clear clear clear clear clear


clear clear clear clear clear
1803 1806 1803 1804 1801
0 0 0 0 1
49 49 49 49 49
0.99 0.99 0.99 0.99 0.99
1364 1366 1365 1364 1365
Low Low Low Low Low
High High High High High
Low Low Low Low Low
High High High High High
Low Low Low Low Low
Low Low Low Low Low
Low Low Low Low Low
Low Low Low Low Low
Low Low Low Low Low
High High High High High
Low Low Low Low Low
High High High High High
Low Low Low Low Low
Low Low Low Low Low
Low Low Low Low Low
Low Low Low Low Low
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
24.5 24.6 24.4 24.4 24.5
121 124 137 146 151
186.6 200.9 221.9 231 236.6
1802 1801 1799 1800 1804
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear

Page 126
Sheet1

clear clear clear clear clear


clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
Locked Locked Locked Locked Locked
Enabled Enabled Enabled Enabled Enabled
clear clear clear clear clear
Passed Passed Passed Passed Passed
clear clear clear clear clear
clear clear clear clear clear
No No No No No
Healthy Healthy Healthy Healthy Healthy
Ready Ready Ready Ready Ready
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
1803 1802 1799 1797 1805
23.89 24.09 24.09 24.09 24.09
418 415 415 412 412
152 153 142 152 151
639 638 642 640 637
405 407 405 402 407
415 415 415 418 415
89 90 86 85 88
83 78 74 80 83
83 83 88 86 83
90 93 89 84 89
73 81 79 89 86
2 2 2 2 2
2 2 2 2 2
17 16 19 23 17
47 46 46 47 46
48 47 47 48 48
127 123 124 126 124
0 0 0 0 0
0 0 0 0 0
2 2 2 2 2
2 2 2 2 2
1 1 1 1 1

Page 127
Sheet1

0.961 0.969 0.957 0.961 0.961


50.2 50.2 50.2 50.2 50.2
49.95 49.95 49.95 49.95 49.95
set set set set set
set set set set set
clear clear clear clear clear
clear clear clear clear clear
set set set set set
clear clear clear clear clear
set set set set set
set set set set set
set set set set set
set set set set set
set set set set set
clear clear clear clear clear
set set set set set
clear clear clear clear clear
clear clear clear clear clear
set set set set set
clear clear clear clear clear
set set set set set
set set set set set
set set set set set
clear clear clear clear clear
set set set set set
set set set set set
set set set set set
set set set set set
set set set set set
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
set set set set set
set set set set set
clear clear clear clear clear
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear

Page 128
Sheet1

clear clear clear clear clear


clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
set set set set set
clear clear clear clear clear
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear

Page 129
Sheet1

clear clear clear clear clear


clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
Emergency mode
Emergency mode
Emergency mode
Emergency mode
Emergency mode
Clear Clear Clear Clear Clear
ok ok ok ok ok
ok ok ok ok ok
ok ok ok ok ok
ok ok ok ok ok
ok ok ok ok ok
ok ok ok ok ok
Clear Clear Clear Clear Clear

Clear Clear Clear Clear Clear


Clear Clear Clear Clear Clear
Clear Clear Clear Clear Clear
Set Set Set Set Set
Set Set Set Set Set
Clear Clear Clear Clear Clear
Disable Disable Disable Disable Disable
514 514 514 514 514
514 514 514 514 514

Page 130
Sheet1

2 2 2 2 2
514 514 514 514 514
512 512 512 512 512
514 514 514 514 514
514 514 514 514 514
514 514 514 514 514
24.29 24.29 24.29 24.29 24.29
418 418 412 418 415
129 124 133 137 119
644 642 642 639 642
405 410 407 405 407
415 418 420 420 415
67 68 67 67 65
52 56 56 59 57
63 63 64 64 63
57 62 57 54 56
45 46 48 53 45
2 2 2 2 2
2 2 2 2 2
15 12 19 16 12
45 46 48 46 46
44 43 42 44 43
122 123 126 124 124
0 0 0 0 0
0 0 0 0 0
2 2 2 2 2
2 2 2 2 2
1 1 1 1 1
1 1 1 1 1
50.2 50.2 50.2 50.2 50.2
49.95 49.95 49.95 49.95 49.95
set set set set set
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
set set set set set
clear clear clear clear clear
set set set set set
set set set set set
clear clear clear clear clear
clear clear clear clear clear
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
set set set set set
clear clear clear clear clear
set set set set set

Page 131
Sheet1

set set set set set


set set set set set
clear clear clear clear clear
set set set set set
set set set set set
set set set set set
set set set set set
set set set set set
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
set set set set set
set set set set set
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
set set set set set
clear clear clear clear clear
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear

Page 132
Sheet1

clear clear clear clear clear


clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear

Page 133
Sheet1

clear clear clear clear clear


clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
Emergency mode
Emergency mode
Emergency mode
Emergency mode
Emergency mode
Clear Clear Clear Clear Clear
ok ok ok ok ok
ok ok ok ok ok
ok ok ok ok ok
ok ok ok ok ok
ok ok ok ok ok
ok ok ok ok ok
Clear Clear Clear Clear Clear

Clear Clear Clear Clear Clear


Clear Clear Clear Clear Clear
Clear Clear Clear Clear Clear
Set Set Set Set Set
Set Set Set Set Set
Set Set Set Set Set
Enable Enable Enable Enable Enable
636 640 640 648 644
20 21 20 20 20
125 125 125 125 125
72 75 69 72 69
5070 5031 5031 4953 5031
39 39 39 39 39
2 2 2 2 2
0 0 0 0 0
set set set set set
set set set set set
clear clear clear clear clear
set set set set set
set set set set set
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear

Page 134
Sheet1

clear clear clear clear clear


clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
124 124 123 124 123
110 110 110 110 109
1 1 3 1 3
64 64 65 57 60
-3 -8 -3 -2 -2
15 14 14 15 14
33 33 33 33 33
121 120 121 121 122
2 2 2 2 2
0 0 0 0 0
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear

Page 135
Sheet1

set set set set set


set set set set set
clear clear clear clear clear
set set set set set
clear clear clear clear clear

clear clear clear clear clear


set set set set set
clear clear clear clear clear
set set set set set
clear clear clear clear clear
set set set set set
clear clear clear clear clear

set set set set set


set set set set set
set set set set set
set set set set set
clear clear clear clear clear
set set set set set
clear clear clear clear clear
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
set set set set set
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
ok ok ok ok ok
ok ok ok ok ok
Set Set Set Set Set
Disable Disable Disable Disable Disable
Enable Enable Enable Enable Enable
Set Set Set Set Set
ok ok ok ok ok
ok ok ok ok ok
ok ok ok ok ok
Set Set Set Set Set

Set Set Set Set Set


Set Set Set Set Set
Set Set Set Set Set

clear clear clear clear clear


set set set set set

Page 136
Sheet1

clear clear clear clear clear


set set set set set
clear clear clear clear clear
set set set set set
clear clear clear clear clear
set set set set set
clear clear clear clear clear
set set set set set
clear clear clear clear clear
set set set set set
clear clear clear clear clear
set set set set set
EPC,EPCR,MCC2
MCC2R,ATC1,TC1,
ATC2,TC2,ALC1LC1,ALC2,LC2ATC3,TC3,ATC4
1067 1061 1028 1028 1028
1067 1028 1027 1028 1027
1067 1027 1028 1028 1028
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
170 170 170 170 170
43520 43520 43520 43520 43520
5 6 5 6 6
1894711000 555024400 3735355000 2427847000 577306600
6144 6144 6144 6144 6144
0 0 0 0 0
1183 1180 1181 1180 1181
32768 32768 32768 32768 32768
0.43 0.55 0.43 0.49 0.43
0 0 0 0 0
1183 1181 1181 1180 1181
8 8 8 8 8
set set set set set
set set set set set
set set set set set
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
1180 1177 1177 1177 1178
1184.03 1180.96 1182.13 1181.1 1182.28
0 0 0 0 1
11 11 11 11 11
47941 47941 47941 47941 47941
172.55 172.55 175.35 169.01 173.95
171.88 173.28 176.03 171.14 174.68
171.88 173.95 173.95 169.68 174.68
1.03 1.17 1.32 1.32 1.46

Page 137
Sheet1

805 809 807 810 804


187 187 187 187 187
1803 1800 1801 1792 1801
1 1 1 1 1
420 429 425 420 429
6144 6144 6144 6144 6144
0 0 0 0 0
1180 1179 1180 1178 1180
0 0 0 0 0
0.31 0.37 0.43 0.31 0.49
0 0 0 0 0
1181 1182 1181 1180 1180
8 8 8 8 8
set set set set set
set set set set set
set set set set set
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
1179 1178 1179 1178 1178
1181.1 1179.93 1180.96 1179.49 1181.54
0 0 0 0 0
11 11 11 11 11
12080 12080 12080 12080 12080
172.55 173.28 176.03 173.95 176.03
172.55 173.95 175.35 173.95 177.43
173.95 173.95 177.43 174.68 178.1
1.03 1.17 1.32 1.32 1.46
803 812 814 804 805
47 47 47 47 47
1815 1803 1799 1795 1801
1 1 1 1 1
431 420 433 427 425
Healthy Healthy Healthy Healthy Healthy
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
Healthy Healthy Healthy Healthy Healthy
Healthy Healthy Healthy Healthy Healthy
Healthy Healthy Healthy Healthy Healthy
Healthy Healthy Healthy Healthy Healthy
Healthy Healthy Healthy Healthy Healthy
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear

Page 138
Sheet1

clear clear clear clear clear


clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
Healthy Healthy Healthy Healthy Healthy
clear clear clear clear clear
Healthy Healthy Healthy Healthy Healthy
Passed Passed Passed Passed Passed
clear clear clear clear clear
Not Fired Not Fired Not Fired Not Fired Not Fired
Not Fired Not Fired Not Fired Not Fired Not Fired
clear clear clear clear clear
Passed Passed Passed Passed Passed
Passed Passed Passed Passed Passed
Passed Passed Passed Passed Passed
Not Tripped Not Tripped Not Tripped Not Tripped Not Tripped
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
Acquired Acquired Acquired Acquired Acquired
Released Released Released Released Released
Acquired Acquired Acquired Acquired Acquired
Released Released Released Released Released
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear

Page 139
Sheet1

clear clear clear clear clear


2.01 2.1 2.09 2.02 2
92 97 92 103 99
1800 1800 1800 1800 1800
1835 1837 1829 1829 1834
34.38 34.16 34.27 34.41 34.68
221 220 225 232 222
2 2 2 2 2
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
0.76 0.758 0.759 0.759 0.76
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
33 33 33 33 32
2 2 -2 1 -1
12848 12848 12848 12848 12848
0.011 0.033 -0.1978 -0.1318 0.011
93.42 93.53 93.26 93.2 93.3
359.13 359.13 359.13 359.13 359.13
clear clear clear clear clear
clear clear clear clear clear

Page 140
Sheet1

clear clear clear clear clear


clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
6 6 6 6 6
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
Low Low Low Low Low
High High High High High
Low Low Low Low Low
Low Low Low Low Low
Low Low Low Low Low
Low Low Low Low Low
Low Low Low Low Low
Low Low Low Low Low
Low Low Low Low Low
Low Low Low Low Low

Page 141
Sheet1

Low Low Low Low Low


Low Low Low Low Low
Disabled Disabled Disabled Disabled Disabled
Low Low Low Low Low
Manual Manual Manual Manual Manual
Normal Normal Normal Normal Normal
Healthy Healthy Healthy Healthy Healthy
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
Healthy Healthy Healthy Healthy Healthy
Healthy Healthy Healthy Healthy Healthy
Healthy Healthy Healthy Healthy Healthy
Healthy Healthy Healthy Healthy Healthy
Healthy Healthy Healthy Healthy Healthy
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
Healthy Healthy Healthy Healthy Healthy
clear clear clear clear clear
Healthy Healthy Healthy Healthy Healthy
Passed Passed Passed Passed Passed
clear clear clear clear clear
Not Fired Not Fired Not Fired Not Fired Not Fired
Not Fired Not Fired Not Fired Not Fired Not Fired
clear clear clear clear clear
Passed Passed Passed Passed Passed
Passed Passed Passed Passed Passed
Passed Passed Passed Passed Passed
Not Tripped Not Tripped Not Tripped Not Tripped Not Tripped
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear

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clear clear clear clear clear


clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
Acquired Acquired Acquired Acquired Acquired
Released Released Released Released Released
Acquired Acquired Acquired Acquired Acquired
Released Released Released Released Released
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
1.9 2.04 2 1.96 1.91
85 89 105 96 105
1800 1800 1800 1800 1800
1832 1830 1830 1830 1829
34.33 34.19 34.39 34.43 34.51
197 217 229 241 242
2 2 2 2 2
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
0.756 0.757 0.757 0.759 0.757
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear

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clear clear clear clear clear


clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
36 37 42 39 42
-1 0 2 0 2
12848 12848 12848 12844 12848
0.0659 0.0879 -0.0549 -0.2307 0.011
98.33 98.28 98.01 98.07 98.05
352.21 352.21 352.21 352.21 352.21
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
6 6 6 6 6
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear

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clear clear clear clear clear


clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
Low Low Low Low Low
High High High High High
Low Low Low Low Low
Low Low Low Low Low
Low Low Low Low Low
Low Low Low Low Low
Low Low Low Low Low
Low Low Low Low Low
Low Low Low Low Low
Low Low Low Low Low
Low Low Low Low Low
Low Low Low Low Low
Disabled Disabled Disabled Disabled Disabled
Low Low Low Low Low
Manual Manual Manual Manual Manual
Normal Normal Normal Normal Normal
6144 4096 4096 4096 4096
0 0 0 0 0
1183 1180 1179 1180 1179
32768 32768 32768 32768 32768
0.18 0.18 0.18 0.18 0.18
0 0 0 0 0
1183 1182 1180 1180 1179
8 8 8 8 8
set set set set set
set set set set set
set set set set set
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
1179 1178 1178 1178 1178
1182.72 1190.63 1189.31 1190.92 1189.31
0 0 0 0 0
11 11 11 11 11
15148 15148 15148 15148 15148
171.88 0 0 0 0
173.28 0 0 0 0

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172.55 0 0 0 0
0 10.4 10.4 10.4 10.4
794 0 0 0 0
59 59 59 59 59
1807 1804 1805 1805 1804
1 1 1 1 1
432 10 9 13 11
6144 6144 6144 6144 6144
0 0 0 0 0
1182 1181 1181 1180 1180
0 0 0 0 0
0.61 0.79 0.79 0.67 0.73
0 0 0 0 0
1182 1180 1181 1181 1181
8 8 8 8 8
set set set set set
set set set set set
set set set set set
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
1179 1179 1179 1177 1176
1184.62 1183.45 1184.18 1182.86 1183.16
0 0 0 1 0
11 11 11 11 11
14316 14316 14316 14316 14316
177.43 178.83 180.18 181.52 186.83
176.03 178.83 180.18 180.85 185.49
176.03 179.5 180.18 183.53 185.49
2.2 2.34 2.64 2.78 3.08
803 807 822 811 804
55 55 55 55 55
1801 1808 1784 1783 1819
1 1 1 1 1
429 433 434 439 432
Healthy Healthy Healthy Healthy Healthy
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
Healthy Healthy Healthy Healthy Healthy
Healthy Healthy Healthy Healthy Healthy
Healthy Healthy Healthy Healthy Healthy
Healthy Healthy Healthy Healthy Healthy
Healthy Healthy Healthy Healthy Healthy
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear

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clear clear clear clear clear


clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
Healthy Healthy Healthy Healthy Healthy
clear clear clear clear clear
Healthy Healthy Healthy Healthy Healthy
Passed Passed Passed Passed Passed
clear clear clear clear clear
Not Fired Not Fired Not Fired Not Fired Not Fired
Not Fired Not Fired Not Fired Not Fired Not Fired
clear clear clear clear clear
Passed Passed Passed Passed Passed
Passed Passed Passed Passed Passed
Passed Passed Passed Passed Passed
Not Tripped Not Tripped Not Tripped Not Tripped Not Tripped
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
Acquired Acquired Acquired Acquired Acquired
Released Released Released Released Released
Acquired Acquired Acquired Acquired Acquired
Released Released Released Released Released
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear

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clear clear clear clear clear


clear clear clear clear clear
clear clear clear clear clear
1.99 2.07 2.07 2.02 2.01
62 55 55 55 56
1800 1800 1800 1800 1800
1829 1837 1824 1824 1824
34.53 34.77 34.61 34.75 34.65
162 141 136 139 140
2 2 2 2 2
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
0.762 0.762 0.762 0.762 0.762
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
18 -17 -17 -17 -16
-1 -1 0 0 1
12848 12848 12848 12848 12848
0.011 0.0659 0.0659 0.011 0.022
112.3 112.53 112.12 112.3 112.36
355.67 355.67 355.67 355.67 355.67

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clear clear clear clear clear


clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
6 6 6 6 6
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
Low Low Low Low Low
High High High High High
Low Low Low Low Low
Low Low Low Low Low
Low Low Low Low Low
Low Low Low Low Low
Low Low Low Low Low
Low Low Low Low Low

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Low Low Low Low Low


Low Low Low Low Low
Low Low Low Low Low
Low Low Low Low Low
Disabled Disabled Disabled Disabled Disabled
Low Low Low Low Low
Manual Manual Manual Manual Manual
Normal Normal Normal Normal Normal
Healthy Healthy Healthy Healthy Healthy
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
Healthy Healthy Healthy Healthy Healthy
Healthy Healthy Healthy Healthy Healthy
Healthy Healthy Healthy Healthy Healthy
Healthy Healthy Healthy Healthy Healthy
Healthy Healthy Healthy Healthy Healthy
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
Healthy Healthy Healthy Healthy Healthy
clear clear clear clear clear
Healthy Healthy Healthy Healthy Healthy
Passed Passed Passed Passed Passed
clear clear clear clear clear
Not Fired Not Fired Not Fired Not Fired Not Fired
Not Fired Not Fired Not Fired Not Fired Not Fired
clear clear clear clear clear
Passed Passed Passed Passed Passed
Passed Passed Passed Passed Passed
Passed Passed Passed Passed Passed
Not Tripped Not Tripped Not Tripped Not Tripped Not Tripped
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear

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clear clear clear clear clear


clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
Acquired Acquired Acquired Acquired Acquired
Released Released Released Released Released
Acquired Acquired Acquired Acquired Acquired
Released Released Released Released Released
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
set set set set set
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
1.97 2.05 2.06 2.05 1.99
131 134 144 155 160
1800 1800 1800 1800 1800
1838 1831 1835 1835 1833
34.71 34.85 34.49 34.46 34.6
264 282 290 301 314
2 2 2 2 2
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
0.063 0.068 0.076 0.081 0.086
clear clear clear clear clear
clear clear clear clear clear

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clear clear clear clear clear


clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
63 66 68 70 71
0 0 0 0 -1
12832 12831 12833 12833 12833
0.0439 0.0549 0.1208 0.011 0.033
108.38 108.45 108.23 108.19 108.27
348.75 348.75 348.75 348.75 348.75
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
6 6 6 6 6
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear

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clear clear clear clear clear


clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
clear clear clear clear clear
Low Low Low Low Low
High High High High High
Low Low Low Low Low
Low Low Low Low Low
Low Low Low Low Low
Low Low Low Low Low
Low Low Low Low Low
Low Low Low Low Low
Low Low Low Low Low
Low Low Low Low Low
Low Low Low Low Low
Low Low Low Low Low
Disabled Disabled Disabled Disabled Disabled
Low Low Low Low Low
Manual Manual Manual Manual Manual
Normal Normal Normal Normal Normal
51 51 51 51 51
43 43 43 43 43
69 69 69 69 69
69 69 69 69 69
50 50 50 50 50
43 43 43 43 43
69 69 69 69 69
70 70 70 70 70
Healthy Healthy Healthy Healthy Healthy
Healthy Healthy Healthy Healthy Healthy
Healthy Healthy Healthy Healthy Healthy
Healthy Healthy Healthy Healthy Healthy
Healthy Healthy Healthy Healthy Healthy
Healthy Healthy Healthy Healthy Healthy
Healthy Healthy Healthy Healthy Healthy
Healthy Healthy Healthy Healthy Healthy
Healthy Healthy Healthy Healthy Healthy
Healthy Healthy Healthy Healthy Healthy
Healthy Healthy Healthy Healthy Healthy
Healthy Healthy Healthy Healthy Healthy
Healthy Healthy Healthy Healthy Healthy

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Healthy Healthy Healthy Healthy Healthy


Healthy Healthy Healthy Healthy Healthy
Healthy Healthy Healthy Healthy Healthy
49.9 49.9 49.9 49.9 49.9
42 42 42 42 42
43 43 43 43 43
0 0 0 0 0
Healthy Healthy Healthy Healthy Healthy
Healthy Healthy Healthy Healthy Healthy
Healthy Healthy Healthy Healthy Healthy
Healthy Healthy Healthy Healthy Healthy
Healthy Healthy Healthy Healthy Healthy
Healthy Healthy Healthy Healthy Healthy
Healthy Healthy Healthy Healthy Healthy
Healthy Healthy Healthy Healthy Healthy
Healthy Healthy Healthy Healthy Healthy
Healthy Healthy Healthy Healthy Healthy
Healthy Healthy Healthy Healthy Healthy
Healthy Healthy Healthy Healthy Healthy
Faulty Faulty Faulty Faulty Faulty
Faulty Faulty Faulty Faulty Faulty
Faulty Faulty Faulty Faulty Faulty
Faulty Faulty Faulty Faulty Faulty
Healthy Healthy Healthy Healthy Healthy
Healthy Healthy Healthy Healthy Healthy
Healthy Healthy Healthy Healthy Healthy
Healthy Healthy Healthy Healthy Healthy
Healthy Healthy Healthy Healthy Healthy
Healthy Healthy Healthy Healthy Healthy
Healthy Healthy Healthy Healthy Healthy
Healthy Healthy Healthy Healthy Healthy
Healthy Healthy Healthy Healthy Healthy
Healthy Healthy Healthy Healthy Healthy
Healthy Healthy Healthy Healthy Healthy
Healthy Healthy Healthy Healthy Healthy
Healthy Healthy Healthy Healthy Healthy
Healthy Healthy Healthy Healthy Healthy
Healthy Healthy Healthy Healthy Healthy
Healthy Healthy Healthy Healthy Healthy
49.9 49.9 49.9 49.9 49.9
42 42 42 42 42
42 42 42 42 42
0 0 0 0 0
Healthy Healthy Healthy Healthy Healthy
Healthy Healthy Healthy Healthy Healthy
Healthy Healthy Healthy Healthy Healthy
Healthy Healthy Healthy Healthy Healthy
Healthy Healthy Healthy Healthy Healthy
Healthy Healthy Healthy Healthy Healthy

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Healthy Healthy Healthy Healthy Healthy


Healthy Healthy Healthy Healthy Healthy
Healthy Healthy Healthy Healthy Healthy
Healthy Healthy Healthy Healthy Healthy
Healthy Healthy Healthy Healthy Healthy
Healthy Healthy Healthy Healthy Healthy
Faulty Faulty Faulty Faulty Faulty
Faulty Faulty Faulty Faulty Faulty
Faulty Faulty Faulty Faulty Faulty
Faulty Faulty Faulty Faulty Faulty
45 45 45 45 45
40 40 40 40 40
224 224 224 224 223
62 62 62 62 62
52 52 52 52 52
43 43 43 43 43
69 69 69 69 69
70 70 70 70 70
Healthy Healthy Healthy Healthy Healthy
Healthy Healthy Healthy Healthy Healthy
Healthy Healthy Healthy Healthy Healthy
Healthy Healthy Healthy Healthy Healthy
Healthy Healthy Healthy Healthy Healthy
Healthy Healthy Healthy Healthy Healthy
Healthy Healthy Healthy Healthy Healthy
Healthy Healthy Healthy Healthy Healthy
Healthy Healthy Healthy Healthy Healthy
Healthy Healthy Healthy Healthy Healthy
Healthy Healthy Healthy Healthy Healthy
Healthy Healthy Healthy Healthy Healthy
Healthy Healthy Healthy Healthy Healthy
Healthy Healthy Healthy Healthy Healthy
Healthy Healthy Healthy Healthy Healthy
Healthy Healthy Healthy Healthy Healthy
49.9 49.9 49.9 49.9 49.9
40 40 40 40 40
39 39 39 39 40
0 0 0 0 0
Healthy Healthy Healthy Healthy Healthy
Healthy Healthy Healthy Healthy Healthy
Healthy Healthy Healthy Healthy Healthy
Healthy Healthy Healthy Healthy Healthy
Healthy Healthy Healthy Healthy Healthy
Healthy Healthy Healthy Healthy Healthy
Healthy Healthy Healthy Healthy Healthy
Healthy Healthy Healthy Healthy Healthy
Healthy Healthy Healthy Healthy Healthy
Healthy Healthy Healthy Healthy Healthy
Healthy Healthy Healthy Healthy Healthy

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Healthy Healthy Healthy Healthy Healthy


Faulty Faulty Faulty Faulty Faulty
Faulty Faulty Faulty Faulty Faulty
Faulty Faulty Faulty Faulty Faulty
Faulty Faulty Faulty Faulty Faulty
Healthy Healthy Healthy Healthy Healthy
Healthy Healthy Healthy Healthy Healthy
Healthy Healthy Healthy Healthy Healthy
Healthy Healthy Healthy Healthy Healthy
Healthy Healthy Healthy Healthy Healthy
Healthy Healthy Healthy Healthy Healthy
Healthy Healthy Healthy Healthy Healthy
Healthy Healthy Healthy Healthy Healthy
Healthy Healthy Healthy Healthy Healthy
Healthy Healthy Healthy Healthy Healthy
Healthy Healthy Healthy Healthy Healthy
Healthy Healthy Healthy Healthy Healthy
Healthy Healthy Healthy Healthy Healthy
Healthy Healthy Healthy Healthy Healthy
Healthy Healthy Healthy Healthy Healthy
Healthy Healthy Healthy Healthy Healthy
50 50 50 50 49.9
44 44 44 44 44
44 44 44 44 44
0 0 0 0 0
Healthy Healthy Healthy Healthy Healthy
Healthy Healthy Healthy Healthy Healthy
Healthy Healthy Healthy Healthy Healthy
Healthy Healthy Healthy Healthy Healthy
Healthy Healthy Healthy Healthy Healthy
Healthy Healthy Healthy Healthy Healthy
Healthy Healthy Healthy Healthy Healthy
Healthy Healthy Healthy Healthy Healthy
Healthy Healthy Healthy Healthy Healthy
Healthy Healthy Healthy Healthy Healthy
Healthy Healthy Healthy Healthy Healthy
Healthy Healthy Healthy Healthy Healthy
Faulty Faulty Faulty Faulty Faulty
Faulty Faulty Faulty Faulty Faulty
Faulty Faulty Faulty Faulty Faulty
Faulty Faulty Faulty Faulty Faulty

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