Translinear Circuits 1, The Bipolar Translinear Principle Ideal and non-ideal behaviour 2. Translinear Circuit Analysis and Synthesis 3, Translinear Principle for MOS Transistors At the end of this section you should be able to: + Derive the translinear principle, and describe situations in which it can be applied. Understand its strengths and limitations. + Use the TLP to analyse the operation of translinear circuits, * Use the TLP to construct simple circuits to implement a given function.1. The Bipolar Translinear Principle The translinear principle provides a simple and elegant method of realising mathematical functions, with quite complex functions often implemented by a small number of transistors Translinear circuits come close to true ‘current-mode” operation, since all input and output signals are in the form of currents, and the voltage swings within the circuit need not be considered at all in order to analyse the circuit behaviour. Obviously the relationship between the device current and junction voltage is fundamental to the operation of translinear circuits, and voltage swings within the circuit will occur as a result of changes in the current levels. However the voltage swings in translinear circuits are fairly small; in bipolar translinear Circuits these voltage swings are changes in Vbes due to changes in the transistor collector current. The limited voltage swings throughout the circuit means that junction capacitances do not have to be significantly charged and discharged, and thus translinear circuits can often operate up to very high speeds. These limited voltage swings also mean that translinear circuits generally avoid the problem of slew rate limiting, which occurs when a limited current is available to charge a node capacitance. This freedom from capacitive slewing is one of the reasons for choosing to process signals in the current-mode domain. ‘An excellent treatment of translinear circuits can be found in B. Gilbert, “Current-Mode Circuits From a Translinear Viewpoint”, Chapter 2 in “Analog IC Design : The Current-Mode Approach”, Peter Peregrinus for IEE, April 1990 The ‘translinear principle’ was originally proposed in 1975 (B. Gilbert, “Translinear Circuits A Proposed Classification”, Electron.Lett., Vol.11, pp.14-16, 1975), and was formulated for bipolar transistors. The translinear principle exploits the linear relationship between transconductance and collector current in a bipolar transistor. Ic=Isexp(Vbe/Vt) or Vbe= Vt In(Ic/Is) Transconductance = Sexp(voe/ vy == where Is is the saturation current of the device, and Vt is the device thermal voltage. The translinear principle applies to circuits in which a number of forward biased base-emitter (Vbe) junctions are connected in a continuous loop. The transistors within the loop can be identified as clockwise (CW) or anticlockwise (ACW), depending on the direction of current flow through the junction. The transistors may be npn or pnp, but the complete loop must satisfy the following conditions () The number of CW npn Vbe junctions is equal to the number of ACW npn Vbe junetio: i) The number of CW pnp Vbe junctions is equal to the number of ACW pnp Vbe junctions. If these conditions are satisfied, then there must be an even number of Vbe junctions within the loop.\ yew "cw acw gf cw Aacw Consider a loop where there are j npn Vbe junctions in each direction, and k pnp Vbe junctions in each direction. Applying KVL around the loop means that the sum of the clockwise junction voltages must be equal to the sum of the anticlockwise junction voltages DX Vogj + YL Vebk = D Vbg + Y Vebk Cw CWe ACW} ACWk Igj nite 1k Ig Ick Vin + == vein + — bk aa > Vth ip bal tn > Ven = cwj CW ACW} ACW Igj and Ick represent the collector currents associated with each of the Vbe junctions within the loop. Isn and Isp represent the npn and pnp saturation currents respectively, and can be expressed in terms of current densities (Isn = JsnA, Isp = JspA), where Jsn and Isp are process dependent. Eu + F at Ich ep h ae lh Ente sy TsnAj TspAp TspAp cw CW ACW; ACW Iejick | Icjlek Iso AjlspkAk Isl AjspEAk CW ACW) The Js terms will cancel from both sides of the equation, assuming good transistor matching, ‘thus yy i = yy Bisk Ajak ~ 11 aja Wk ACWIfj +k =m (ce. 2m junctions in the loop in total), then Jom Jom Am Am CWn ACW The above equation is a statement of the bipolar translinear principle: ina translinear loop, the product of the clockwise junction current densities is equal to the product of the anticlockwise junction current densities. The translinear principle is fundamentally insensitive to temperature and process parameters, but relies on the tight matching of transistors within the translinear loop. The translinear principle is thus a technique for integrated circuit (IC) design, since the levels of matching required cannot be achieved with discrete devices. Non-Ideal Behaviour ) Area Mismatch Emitter area mismatch errors will directly affect the operation of a translinear circuit. For this reason, symmetrical and common centroid layout techniques should be employed for transistors within a translinear loop. Good layout techniques will also help reduce errors due to process and thermal variations (i.e. Js and Vt mismatches) Gi) Finite output resistance If the effects of base-width modulation are taken into account: Ic = Is y exp(Vbe/Vt) where k = (1 + Vce/Va), and Va is the Early voltage of the transistor. Thus Vbe = Vt In (Iolyls) aoe nea Amym Amym CWm ACWm The Early voltage effect appears like an area mismatch. ii) Finite beta Errors due to finite B occur frequently in translinear circuits, since a bipolar transistor needs to be provided with base current. This base current is often taken directly from an input or output current source, and results in error terms in the circuit transfer function. These B errors are due to the circuit implementation, rather than being an inherent error in the translinear circuit principle, Any series base resistance (rj) also affects the operation of a translinear circuit, since it ruins the exponential current-voltage relationship Vbe = Vt In (Ie/Is) + ths (Ie/ B)To simplify the analysis and synthesis of translinear circuits it is usual to neglect transistor base currents. However a full circuit analysis including base current errors is often useful for comparing alternative circuit topologies. 6.2 Translinear Circuit Analysis and Synthesis ‘Two-Loop Translinear Circuits The simplest possible translinear circuit is a two-transistor loop, which implements the well- known current mirror. Tout From the translinear principle, Icl = Ic2 thus Tout = Iin. Including the effects of finite B and Early voltage Tout 2 ‘Tin > 7+ 1/p1 + 42/82 Four Transistor Translinear Circuits The next level of complexity in translinear circuits involves loops containing four transistors. There are two main types; the altemating (type A) cell, and the balanced (type B) cell. These topologies are shown below for an all npn transistor implementation (note that biasing and base currents must additionally be provided). Many functions can be synthesised from these two basic configurations; which cell to use depends on the input and output current drive requirements. Qi Qz Qi 4 QB Q2 Tel Ic3 =1e2 Ie4 Tel Ic3 =Ic2 Io4 Type A Cell (Altemating) ‘Type B Cell (Balanced)Synthesising Translinear Circuits The desired function needs to be arranged into product terms (e.g. arb = cd), which can then be easily implemented using translinear loops. The product terms a, b, c etc. can themselves be a linear combination of terms, since currents can be added and subtracted at a node An explicit function is one where the output term appears as a function of the inputs, eg. Z* = (x?- y?) = (X+Y)(X-Y). An implicit function is one in which the output term appears as a, eg. (Z-YXZ+Y) = X”. Both typ i is translinear loops, since input and output currents can be replicated by current mirrors and thus can be used more than once in the equation Current Sealing Consider the implementation of a squaring circuit: Z=XIC Cis a scaling constant which is needed to ensure an equal number of CW and ACW junctions. Common Transtinear Circuits (1) Squarers : One quadrant squarer Iz= bello Problems: errors and Vce mismatch. X is unipolar (can only take positive values). To correctly implement the squaring function, X should be able to become negative as well as positive, The solution is to impose X on top of a constant bias level.Two quadrant squarer (1+ X)Io es ’ { To Q3 rec Tout Hw” 2OY za (1+ X¥Io? = Ie3107 (1 - Xf lo? = Ie4Te7 Ic4 = 210 - Ie3 Rearranging the equations: Ic? =(1+X°Jlo ~Iout = Ic7 - Io = X"Io (2) Harmonic Mean The harmonic mean function is implemented as the product of two values divided by their sum: tak T SeY, Zz (i Rewriting the above equation Z(X+ Y)=2XY This can be directly implemented as shown in the following circuit: Iz ly Q 3 Ql Qs Supplying bias and base currents may interfere with the circuit operation.i) Alternative implementation: Z(X+Y)=2x¥ 2X = YQX-Z) kY J *~ % at it Tel Ic3 = 1e2 ed Ix Iz = (2Ix - Iz) ly ii) Third method 2XY = Z(X+Y) ‘a 4XY - 2XZ -2YZ ? . 2XZ - 2YZ + 4XY Poox Z)2Y -Z) (2/2) = (X - Z/2\(¥ - Z/2) ‘ie yi 2 boa Ix St e ateTel Ic3 = Ie2 Ie4 104 = [2/2 Ix-Io4=Ix-I2/21e2 = Ix- Ie3 = Ia/2 fy ~ Ic2 = ly - 12/2 Thus (ly - Iz/2) (Ix - Iz/2) = 12/4 (2ly - Iz) (21x - Iz) = Iz? In this implementation, the loop transistors are all diode-connected, so there will be no errors due to the finite output resistance of the transistors. The final circuit implementation depends upon the way in which the original function is Tewritten. c (3) Square-Rooter / Geometric Mean The geometric mean of two numbers is the square root of their product: Z=VxXY I?=Ixly Ifly is a constant bias current, then this circuit calculates the square root Z=kyX Considering B and y errors: where y4=1. Define on = Bn/( Bn + 1): Tel = Ix- Ib2 - 163 1c2 = (ly + Ibl)a2 Ic Ted = 12/3Rearranging these equations and solving for Iz (neglecting 1/B” terms): a= WR Zz z) XB2- XB3~ YB4 y3a2a3 where y= > yiye (4) Vector Sum/Difference ° ° y& Viz a KE be he A=2 ly 3 > ~~ Uf Q Q5 a A=2 First loop: 1e2=Ie3 (current mirror) Second loop: Tod 108 Tel Ic2 = 2 2 Ie4 = Ie5 = Iz Tel = (Ix - Ic3) = (Ix - Ie2) 1c2=Iel + ly = (Ix-1e2)+]y thus Ic2=(Ix+lyy/2_ and Iel = (Ix- Iy)/2 ee ee 2 2 4 Vector DifferenceIx is unipolar (can flow in one direction only), while Iy can be positive or negative (bipolar), provided that Ic2 remains positive. Ideally both Ix and ly should be bipolar to fully implement the vector difference function. ° Viz Vix Qu in Ne A=2 I Q3 ye het gc Q2 Q5 ha A=2 Tel = Iz - Ie3 = Iz - Ie 1e2=Iel +ly Thus = Ic2 =(Iz- ly)/2, Tel = (Iz + lyy/2 Tod 105 Tel e2=- (z+ ly) (z-ly)=1? I=? +1y" Vector Sum Again Ix is unipolar and ly is bipolar Iz y Ix Ny @ a@ as a (\ oO Q252 ZZ 6Loop 1: Ix. = Ie3 lz Loop 2: ly = Ie4 lz Tod = I~ [03 = Iz- lz 242, .2 Thus ke =Ix'+ly Vector Sum In this circuit, both X and Y are unipolar. The circuit is symmetrical, which may improve performance as regards matching, series resistance, parasitics etc. (5) Analog Multipliers + The most important commercial application of the translinear principle is in the implementation of analog multipliers + Initially available as stand alone ICs, analog multipliers are now embedded in many analog IC systems, including practically all communications circuits + Analog multipliers are used to provide frequency conversion as well as gain. There are two main types, the alternating (type A) cell, and the balanced (type B) cell Qu Q2 Qi a Q2 Type A Cell (Alternating) Type B Cell (Balanced) Which cell to use depends on the input and output current drive requirements.(@® Type A Cell (1+ 2x4 G+Yly (-yyly 40-90% 1. 3 2 a Qt 8 Le v aly Vv (1+ X)kx (1 - Y)ly=(1- Xx (1+ YOly X-¥ ‘The currents in the inner pair of transistors are an exact replica of the currents in the outer pair. The current gain: ae Olay: “GX = ik ‘The current gain is determined by the ratio of input and output quiescent bias levels + First Order Base-Current Errors: Assuming all transistors are matched, let 6 = 1/B or 1/(B + 1) Jel = (1 + X)Ix(1 - 8) - 8(1 + YY 1c2 = (1 - X)Ix(1 - 8) - 8(1 - Y)ly Thus: (1 + XY - 8) ~ (1 + ¥)ly) (1 - Yly = ( (I - X)Ix(1 - 8) - (1 - YI + Yly X#Y This type A cell is therefore ‘immune’ to first order base current errors.(ii) Type B Cell aly Ignoring base current errors: (1- X)Ix (1 + Y)ly = (1 - Yly (1+ Xie x=¥ ‘The output currents of Q1-Q4 can be combined: ylot ¥ 102 Qi Fe @B a Y Y (1-X)Ix (1+ X)Ix 2ly To a first order approximation: Tol =(1 - X)(Ix + ly) To2 = (1 + X)(Ix+ ly) Thus the current gain: Ai= 1+ Iy/ixThis circuit is known as the Gilbert Gain Cell, and is often used to provide wideband current amplification. Since the transistors are being used to provide current gain, there are no large voltage swings in the circuit, and so the cell is not bandwidth-limited by capacitive effects (eg. Miller) + First Order Base-Current Errors: Tel = ((1 - X)Ix + 8(1 + Y)ly (1 - 8) 1e2 = ((1 + X)Ix + 8(1 - Y)ly 1-8) Thus ((1 = X)lx + (1 + Y)ly)(1 - 81 + Y)ly = ((1 + X)bx + 8(1 - Yly)(1 - 8)(1 - Yly (1+ Y)G - XIx + 6(1 + Y)'ly = (1 - (1 + Xx + 601 - Y) ly (¥-X)k=-28Yly Y(kx + 251y) = XIx x Y= Ty 2aly ik This cell is therefore not immune to first-order base current errors (f ‘allergic’) The base-current error 6 is effectively multiplied by the ideal current gain (Iy/Ix). The output current: Jc2 + Io3 = ((1 + Xx + 8(1 - Yplyy(1 -8) + (1+ Y)ly =(1 +X) - dix + GU -81- ¥) + (1+ Yy =(1+X)(1- d+ (1+ ¥ +8 -8Y)ly Substituting for ¥: it x(1-8) ) Tout = Ix(1 - 8X1 so sy(s ee Rearranging: S60+206-26%) tout = +3) (1+6-8+ (1+ X\0+25G) where G = Iy/Ix. ThusTout 6G(1_+ 26G - 2GX) Tex F 146-84 “GTC + 256) Ai The effective gain is reduced due to the finite base current error. This limits the practical gain of the cell to well below the value of B. The Gilbert gain cell can be very easily cascaded to increase the total current gain. (6) Translinear Cross-Quad The bipolar ‘cross-quad” circuit is not strictly translinear since the loop is broken. However it has many uses and is often found embedded within translinear circuits, so it will be briefly discussed here. V = Vbe4 + Vbel - Vbe3 - Vbe2 If we neglect base current errors, Vbel = Vbe2 and Vbe3 = Vbe4, thus. v=0 If the base current errors are included: Ic2 =a Ic4 =I Icl = (Ja + 6Ib)(1 - 8) Ie3 = (Ib + Slay(1 - 8) lttet) mie (Se‘Thus V is the voltage required to establish a given current ratio in a the cross-quad transistors. This voltage is much less than that required for a simple pair of transistors. For a 10:1 current ratio, V = 2.5mV for the cross-quad circuit, and 60mV for a simple transistor pair. If la = Ib =, the input resistance of this circuit is very low. However, the low input resistance is achieved via positive feedback, and so the circuit is prone to oscillation See if you can calculate Rin of this cross-coupled circuit + Applications of the Cross-Quad: ( V-I Converter (Caprio’s Quad) EV/R ee Vee i Vv ~ Me + Since the Vbes of QI - Q4 cancel, the voltage source V is accurately replicated across the resistor R. + Since Vee4 = Vbe - V and Vce2 = Vbe + V, the input voltage swing is limited (to +/- 400mY) by the need to keep Q3 and Q4 out of saturation. For large input signals these transistors will saturate, which could invert the polarity of the output signal + The input resistance is -R, which can cause instability problems if the source impedance is reactive, or if significant parasitic capacitance is present at the emitters of Q2 and Q4(ii) Half-Wave Rectifier Analysis is left for you! (iii) PTAT Cell (6Vbe) oo Ql 3 he Oa ba R VR = Vbe2 + Vbe3 - Vbel - Vbet Neglecting base current errors:(1 Vp=Ic3R= Vt ln eas) (Aeasteties Since Ie1=Ic2 and Ie3=Ic4: _Mt (44) TSR Maas The resulting output current is PTAT (via Vt), and also inversely proportional to the temperature coefficient of the resistor. This is often desirable if we are trying to achieve a constant voltage gain Av=~gmRI ie, RL, (AIA cave SRD (x) Thus the resistor tempcos cancel, and the voltage gain remains constant with temperature.3. MOS Translinear Circuits The transconductance of a bipolar transistor is linearly related to the collector current of the device. In contrast, the transconductance of a MOS transistor in saturated strong inversion is linearly related to the increase in gate-source voltage above the threshold | a id= Fo (gs - vin ad KW Ti duct ave Vs Vt ranseonductance Sy (Vgs - Vth) where K = 1oCox is process-dependent (s10 is the surface mobility of the device, and Cox is the capacitance per unit area of gate oxide). A translinear principle for MOS circuits can therefore be derived in a similar way to the bipolar formulation. Consider a loop of clockwise and anticlockwise MOS transistors, which satisfies the following conditions: + All transitors operate in strong inversion (i.e. Vgs > Vth) + All transistors are in saturation (thus |Vds| > |Vgs - Vth| ) + The number of CW NMOS devices is equal to the number of ACW NMOS devices. + The number of CW PMOS devices is equal to the number of ACW PMOS devices In each direction around the loop there are j NMOS transistors and k PMOS transistors. Applying KVL around the loop Eve + Live = Eves E vee Cw; CW ACW) ACWk 1G idk \_ Sy (vi,i+vaier Raw iD) *\ERWiDe)” CW zr (va. j+ Vth, +e ew DE) ACWixk The threshold voltage terms will cancel on both sides of the equation ( ij, [ik )_ Kn(W/L)j VKp(W/L)k. CWix dj Tdk z ( Kn(W/L)j ~ \Kp(W/1)k. ACW)The above equation is a statement of the MOS translinear principle. The process dependent terms Kn and Kp cannot be cancelled out even with equal numbers of PMOS and NMOS transistors in each direction, because this is a summation rather than a multiplication. However if the loop is constrained to include just one type of device (e.g, all NMOS), then the K terms will cancel from the equation 1g i 1G ZVwy - Vw; cw ACwix Alternatively, the device (W/L) ratios can be scaled to ensure that the NMOS and PMOS devices within the loop are matched Comparison between Bipolar and MOS Translinear Principle + The bipolar translinear principle is a product relation, and so lends itself naturally to the implementation of functions involving multiplication and division. The MOS version is a sum- of-roots relation, which makes circuit synthesis more complicated. + The MOS translinear principle is not as suited as to mixed transistor loops, since (W/L) ratios of devices have to be scaled to ensure matching of N and P type devices. + Bipolar transistors follow the exponential law over a wide current range, while the range of currents over which MOS transistors conform to an ideal square law is much more limited Therefore bipolar translinear circuits should have a wider dynamic range. + Bipolar transistors generally exhibit superior matching properties, which is a fundamental requirement for translinear circuits + The absence of de gate current means that MOS translinear circuits are not susceptible to 8 errors. MOS Translinear Circuit Synthesis For the synthesis of functions using MOS translinear circuits, we need to rearrange the desired function into a sum of square root terms. This can be much more complicated than in the bipolar case, where functions were arranged as simple product terms. eg. Vector sum Z=x+y Z-xX=_" (Z+#xX)@-xX)=Y" VZ+X \Z-X =¥ * Now (= a =a 2-X | (WZ=X\vZ-X)Thus YZ+X YZ-X = Combining these equations Vata 7Vez aX ZX _ [SZ , [ez ant Qu 4 4 This function is now in the form of a sum of square root terms, and thus can be implemented using a four transistor MOS translinear loop. ° 2 Zz Y+Z | ! m| Uf x eee M4, M5 Mo U [vs (WiL)=4 > > The basic topology of this circuit is identical to the bipolar vector sum circuit shown previously. However the input and output current drive conditions for the two circuits are quite different