Status Trace Command 06-06-2019

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10:30:21 : PS2 : VISA Initialization Successful

10:30:21 : SG : VISA Initialization Successful
10:30:21 : SA : VISA Initialization Successful
10:30:21 : PNA : VISA Initialization Successful
10:30:21 : DSO : VISA Initialization Successful
10:30:21 : PM : VISA Initialization Successful
10:30:21 : DMM : VISA Initialization Successful
10:30:21 : FPGA : Command - FPGA_STOP_TRANSMIT
10:30:21 : FPGA :
da_11_22_33_44_55_5a_11_22_33_44_55_88_b6_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0
_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_
0_0_0_0
10:30:21 : RF Path : PSU_DUT1_RFST1
10:30:22 : PS2 : INST:NSEL 01
10:30:22 : PS2 : SYST:ERR:ENAB
10:30:22 : PS2 : :VOLT 0
10:30:22 : PS2 : :CURR 0
10:30:22 : PS2 : :OUTP 0
10:30:23 : PS2 : INST:NSEL 03
10:30:23 : PS2 : :VOLT 0
10:30:23 : PS2 : :CURR 0
10:30:23 : PS2 : :OUTP 0
10:30:23 : PS2 : INST:NSEL 04
10:30:23 : PS2 : :VOLT 8
10:30:23 : PS2 : :CURR 0.22
10:30:23 : PS2 : :OUTP 1
10:30:23 : PS2 : :MEAS:CURR?
10:30:23 : PS2 : Tried to read data....

10:30:23 : PS2 : INST:NSEL 02
10:30:23 : PS2 : :VOLT 6
10:30:23 : PS2 : :CURR 0.4
10:30:23 : PS2 : :OUTP 1
10:30:24 : FPGA : Command - XBAND_LINK_TEST

10:30:24 : FPGA :
da_11_22_33_44_55_5a_11_22_33_44_55_88_b6_0_1_aa_6f_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0
_6f_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0
_0_0_0_0_0
10:30:24 : FPGA :
da_11_22_33_44_55_5a_11_22_33_44_55_88_b6_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0
_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_
0_0_0_0
10:30:24 : -------------Main Script Start----------- : Link_Test
10:30:24 : FPGA :
da_11_22_33_44_55_5a_11_22_33_44_55_88_b6_0_1_aa_6f_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0
_6f_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0
_0_0_0_0_0
10:30:28 : FPGA :
da_11_22_33_44_55_5a_11_22_33_44_55_88_b6_0_1_aa_6f_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0
_6f_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0
_0_0_0_0_0
10:30:31 : FPGA :
da_11_22_33_44_55_5a_11_22_33_44_55_88_b6_0_1_aa_6f_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0
_6f_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0
_0_0_0_0_0
10:30:34 : FPGA :
da_11_22_33_44_55_5a_11_22_33_44_55_88_b6_0_1_aa_6f_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0
_6f_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0
_0_0_0_0_0
10:30:37 : FPGA :
da_11_22_33_44_55_5a_11_22_33_44_55_88_b6_0_1_aa_6f_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0
_6f_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0
_0_0_0_0_0
10:30:40 : -------------Main Script End----------- : Link_Test
10:30:41 : PS2 : INST:NSEL 01
10:30:41 : PS2 : :VOLT 0
10:30:41 : PS2 : :OUTP 0
10:30:41 : PS2 : INST:NSEL 03
10:30:41 : PS2 : :VOLT 0
10:30:41 : PS2 : :OUTP 0
10:30:41 : PS2 : INST:NSEL 02
10:30:41 : PS2 : :VOLT 0
10:30:41 : PS2 : :OUTP 0
10:30:41 : PS2 : INST:NSEL 04
10:30:41 : PS2 : :VOLT 0
10:30:41 : PS2 : :OUTP 0

10:30:45 : RF Path : PSU_DUT1_RFST1
10:30:46 : PS2 : INST:NSEL 04
10:30:46 : PS2 : :VOLT 8
10:30:46 : PS2 : :CURR 0.2
10:30:46 : PS2 : :OUTP 1
10:30:47 : PS2 : :MEAS:CURR?

10:30:47 : PS2 : INST:NSEL 02
10:30:47 : PS2 : :VOLT 6
10:30:47 : PS2 : :CURR 0.4
10:30:47 : PS2 : :OUTP 1
10:30:47 : FPGA : Command - XBAND_NORMAL

10:30:47 : FPGA :
da_11_22_33_44_55_5a_11_22_33_44_55_88_b6_0_1_aa_f_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_
f_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0
_0_0_0_0
10:30:47 : PS2 : INST:NSEL 03
10:30:47 : PS2 : :VOLT 6
10:30:47 : PS2 : :CURR 0.85
10:30:47 : PS2 : :OUTP 1
10:30:48 : PS2 : INST:NSEL 01
10:30:48 : PS2 : :VOLT 8.35
10:30:48 : PS2 : :CURR 4.25
10:30:48 : PS2 : :OUTP 1

10:30:48 : FPGA :
da_11_22_33_44_55_5a_11_22_33_44_55_88_b6_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0
_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_
0_0_0_0
10:30:48 : -------------Main Script Start----------- : BIT_Test
10:30:48 : FPGA : Command - DUT_TRIGGER
10:30:48 : FPGA :
da_11_22_33_44_55_5a_11_22_33_44_55_88_b6_0_1_cd_f_0_1_86_a0_27_d8_27_10_27_10_27_1
0_27_10_27_10_27_10_27_10_27_10_0_0_0_64_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_
0_0_0_0_0_0_0_0_0_0_0_0_0_0_0
10:30:49 : FPGA :
da_11_22_33_44_55_5a_11_22_33_44_55_88_b6_0_1_aa_f_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_
f_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0
_0_0_0_0
10:30:53 : FPGA :
da_11_22_33_44_55_5a_11_22_33_44_55_88_b6_0_1_aa_f_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_
f_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0
_0_0_0_0
10:30:56 : -------------Main Script End----------- : BIT_Test
10:30:57 : PS2 : INST:NSEL 01
10:30:57 : PS2 : :VOLT 0
10:30:57 : PS2 : :OUTP 0
10:30:57 : PS2 : INST:NSEL 03
10:30:57 : PS2 : :VOLT 0
10:30:57 : PS2 : :OUTP 0
10:30:57 : PS2 : INST:NSEL 02
10:30:57 : PS2 : :VOLT 0
10:30:57 : PS2 : :OUTP 0
10:30:57 : PS2 : INST:NSEL 04
10:30:57 : PS2 : :VOLT 0
10:30:57 : PS2 : :OUTP 0
10:30:57 : RF Path : PNA1_W18J_W18A_PWR SNR_TX_RFST1

10:30:59 : PS2 : INST:NSEL 04
10:30:59 : PS2 : :VOLT 8
10:30:59 : PS2 : :CURR 0.2
10:30:59 : PS2 : :OUTP 1
10:30:59 : PS2 : :MEAS:CURR?

10:30:59 : PS2 : INST:NSEL 02
10:30:59 : PS2 : :VOLT 6
10:30:59 : PS2 : :CURR 0.4
10:30:59 : PS2 : :OUTP 1

10:31:00 : FPGA :
da_11_22_33_44_55_5a_11_22_33_44_55_88_b6_0_1_aa_f_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_
f_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0
_0_0_0_0
10:31:00 : PS2 : INST:NSEL 03
10:31:00 : PS2 : :VOLT 6
10:31:00 : PS2 : :CURR 0.85
10:31:00 : PS2 : :OUTP 1
10:31:00 : PS2 : INST:NSEL 01
10:31:00 : PS2 : :VOLT 8.35
10:31:00 : PS2 : :CURR 4.25
10:31:00 : PS2 : :OUTP 1

10:31:00 : FPGA :
da_11_22_33_44_55_5a_11_22_33_44_55_88_b6_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0
_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_
0_0_0_0
10:31:00 : -------------Main Script Start----------- : Total_Power_Consumption
10:31:00 : PNA : :SYSTem:PRESet
10:31:00 : PNA : :CALCulate:PARameter:DELete:ALL
10:31:00 : PM : :SYSTem:PRESet
10:31:00 : PNA : :CALCulate1:PARameter:DEFine:EXTended 'asd1','S21'
10:31:00 : PNA : :DISPlay:WINDow1:STATe 1
10:31:00 : PNA : :DISPlay:WINDow1:TRACe1:FEED 'asd1'
10:31:00 : PNA : :OUTPut:STATe 0
10:31:00 : PNA : :SENSe:SWEep:TYPE CW
10:31:01 : PNA : :SENSe:PATH:CONFig:SELect 'Default'
10:31:01 : PNA : :SENSe:PULSe0:STATe 1
10:31:01 : PNA : :SENSe1:PULSe1:WIDTh 0.0001
10:31:01 : PNA : :SENSe1:PULSe1:DELay 0.0
10:31:01 : PNA : :SENSe1:PULSe1:INVert 0
10:31:01 : PNA : :SENSe1:PULSe1:STATe 1
10:31:01 : PNA : :SENSe1:PULSe1:PERiod 0.0005
10:31:01 : PNA : :SENSe:PATH:CONFig:ELEMent:STATe 'PulseTrigInput','External'
10:31:01 : PNA : :SENS:PULS:TTYP EDGE
10:31:01 : PNA : :SENSe:PATH:CONFig:ELEMent:STATe 'PulseModDrive','Pulse1'
10:31:01 : PNA : :SENSe:PATH:CONFig:ELEMent:STATe 'Src1Out1PulseModEnable','Enable'
10:31:01 : PNA : :SOURce:POWer1:ALC:MODE OPENloop
10:31:01 : FPGA :
da_11_22_33_44_55_5a_11_22_33_44_55_88_b6_0_1_cd_f_0_0_c3_50_27_d8_27_10_27_10_27_1
0_27_10_27_10_27_10_27_10_27_10_0_0_0_64_0_0_0_bf_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_c8_
0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0
10:31:01 : PNA : :SOURce1:POWer:LEVel:IMMediate:AMPLitude 12.0
10:31:01 : PNA : :SENSe:FREQuency:CW 9.5 GHZ
10:31:01 : PM : :SENSe:FREQuency:CW 9.5 GHZ
10:31:01 : PM : :TRIGger1:SOURce INTernal
10:31:01 : PM : :CALCulate1:FEED1 'POW:PEAK'
10:31:01 : PM : :TRACe1:UNIT DBM
10:31:01 : PM : :FETCh:SCALar:POWer:AC?
10:31:01 : PM : Tried to read data....
10:31:01 : PS2 : INST:NSEL 04
10:31:01 : PS2 : :MEAS:CURR?

10:31:01 : PS2 : :MEAS:VOLT?

10:31:01 : PS2 : INST:NSEL 03
10:31:01 : PS2 : :MEAS:CURR?

10:31:01 : PS2 : :MEAS:VOLT?

10:31:01 : PS2 : INST:NSEL 02
10:31:01 : PS2 : :MEAS:CURR?

10:31:01 : PS2 : :MEAS:VOLT?

10:31:01 : PS2 : INST:NSEL 01
10:31:01 : PS2 : :MEAS:CURR?

10:31:01 : PS2 : :MEAS:VOLT?

10:31:01 : FPGA :
da_11_22_33_44_55_5a_11_22_33_44_55_88_b6_0_1_aa_f_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_
f_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0
_0_0_0_0
10:31:04 : FPGA :
da_11_22_33_44_55_5a_11_22_33_44_55_88_b6_0_1_aa_f_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_
f_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0
_0_0_0_0
10:31:07 : FPGA :
da_11_22_33_44_55_5a_11_22_33_44_55_88_b6_0_1_cd_0_0_0_c3_50_27_d8_27_10_27_10_27_1
0_27_10_27_10_27_10_27_10_27_10_0_0_0_64_0_0_0_bf_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_c8_
0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0
10:31:07 : -------------Main Script End----------- : Total_Power_Consumption
10:31:08 : PS2 : INST:NSEL 01
10:31:08 : PS2 : :VOLT 0
10:31:08 : PS2 : :OUTP 0
10:31:08 : PS2 : INST:NSEL 03
10:31:08 : PS2 : :VOLT 0
10:31:08 : PS2 : :OUTP 0
10:31:08 : PS2 : INST:NSEL 02
10:31:08 : PS2 : :VOLT 0
10:31:08 : PS2 : :OUTP 0
10:31:09 : PS2 : INST:NSEL 04
10:31:09 : PS2 : :VOLT 0
10:31:09 : PS2 : :OUTP 0
10:31:09 : RF Path : PNA2_W18A_W18J_SA_ATTN_RX_RFST1

10:31:10 : PS2 : INST:NSEL 04
10:31:10 : PS2 : :VOLT 8
10:31:10 : PS2 : :CURR 0.2
10:31:10 : PS2 : :OUTP 1
10:31:11 : PS2 : :MEAS:CURR?

10:31:11 : PS2 : INST:NSEL 02

10:31:11 : PS2 : :VOLT 6
10:31:11 : PS2 : :CURR 0.4
10:31:11 : PS2 : :OUTP 1

10:31:11 : FPGA :
da_11_22_33_44_55_5a_11_22_33_44_55_88_b6_0_1_aa_f_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_
f_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0
_0_0_0_0
10:31:11 : PS2 : INST:NSEL 03
10:31:11 : PS2 : :VOLT 6
10:31:11 : PS2 : :CURR 0.85
10:31:11 : PS2 : :OUTP 1
10:31:11 : PS2 : INST:NSEL 01
10:31:11 : PS2 : :VOLT 8.35
10:31:11 : PS2 : :CURR 4.25
10:31:11 : PS2 : :OUTP 1

10:31:12 : FPGA :
da_11_22_33_44_55_5a_11_22_33_44_55_88_b6_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0
_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_
0_0_0_0
10:31:12 : -------------Main Script Start----------- : Tx/Rx_Isolation
10:31:12 : SA : :SYSTem:PRESet
10:31:12 : SA : :SENSe:BANDwidth:RESolution:AUTO 1
10:31:12 : SA : :SENSe:BANDwidth:VIDeo:AUTO 1
10:31:12 : SA : :DISPlay:WINDow:TRACe:Y:SCALe:RLEVel -2
10:31:12 : SA : :SENSe:BWIDth:RESolution 90000
10:31:12 : SA : :SENSe:BWIDth:VIDeo 10000000
10:31:12 : NA : :SYSTem:PRESet
10:31:12 : NA : :CALCulate:PARameter:DELete:ALL
10:31:12 : NA : :CALCulate1:PARameter:DEFine:EXTended 'asd1','S12'
10:31:12 : NA : :DISPlay:WINDow1:STATe 1
10:31:12 : NA : :DISPlay:WINDow1:TRACe1:FEED 'asd1'
10:31:12 : NA : :SENSe1:SWEep:TYPE CW
10:31:12 : SA : :SENSe:SWEep:TIME 0.0008
10:31:12 : SA : :SENSe:SWEep:POINts 201
10:31:13 : SA : :SENSe:AVERage:COUNt 10
10:31:13 : SA : :TRIGger:SEQuence:SOURce EXTernal1
10:31:13 : FPGA :
da_11_22_33_44_55_5a_11_22_33_44_55_88_b6_0_1_cd_f_0_1_86_a0_27_d8_27_10_27_10_27_1
0_27_10_27_10_27_10_27_10_27_10_0_0_0_64_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_c8_0_0_0_0_0
_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0
10:31:13 : SA : :SENSe:FREQuency:CENTer 9.0 GHZ
10:31:13 : SA : :SENSe:FREQuency:SPAN 0 MHZ
10:31:13 : PNA : :SOURce1:POWer:LEVel:IMMediate:AMPLitude -62.0
10:31:13 : NA : :OUTPut:STATe 1
10:31:13 : SA : :TRACe:TYPE AVERage
10:31:14 : SA : :CALCulate:MARKer1:MAXimum:PEAK
10:31:14 : SA : :CALCulate:MARKer1:Y?
10:31:14 : SA : Tried to read data....
10:31:14 : SA : :CALCulate:MARKer1:MINimum:PEAK
10:31:19 : FPGA :
da_11_22_33_44_55_5a_11_22_33_44_55_88_b6_0_1_cd_0_0_1_86_a0_27_d8_27_10_27_10_27_1
0_27_10_27_10_27_10_27_10_27_10_0_0_0_64_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_c8_0_0_0_0_0
_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0
10:31:19 : NA : :SYSTem:PRESet
10:31:19 : SA : :DISPlay:ENABle 1
10:31:20 : -------------Main Script End----------- : Tx/Rx_Isolation
10:31:21 : PS2 : INST:NSEL 01
10:31:21 : PS2 : :VOLT 0
10:31:21 : PS2 : :OUTP 0
10:31:21 : PS2 : INST:NSEL 03
10:31:21 : PS2 : :VOLT 0
10:31:21 : PS2 : :OUTP 0
10:31:21 : PS2 : INST:NSEL 02
10:31:21 : PS2 : :VOLT 0
10:31:21 : PS2 : :OUTP 0
10:31:21 : PS2 : INST:NSEL 04
10:31:21 : PS2 : :VOLT 0
10:31:21 : PS2 : :OUTP 0
10:31:21 : RF Path : PNA2_W18A_W18J_PNA1_RX_RFST1

10:31:22 : PS2 : INST:NSEL 01
10:31:22 : PS2 : :VOLT 0
10:31:22 : PS2 : :CURR 0
10:31:22 : PS2 : :OUTP 0

10:31:22 : PS2 : INST:NSEL 04
10:31:22 : PS2 : :VOLT 8
10:31:22 : PS2 : :CURR 0.2
10:31:22 : PS2 : :OUTP 1
10:31:23 : PS2 : :MEAS:CURR?

10:31:23 : PS2 : INST:NSEL 02
10:31:23 : PS2 : :VOLT 6
10:31:23 : PS2 : :CURR 0.4
10:31:23 : PS2 : :OUTP 1
10:31:23 : FPGA : Command - XBAND_RX_CALIB

10:31:23 : FPGA :
da_11_22_33_44_55_5a_11_22_33_44_55_88_b6_0_1_aa_2f_40_40_40_40_3f_3f_3f_3f_3f_3f_3
f_3f_3f_3f_3f_3f_2f_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0
_0_0_0_0_0_0_0_0_0_0_0_0_0
10:31:24 : FPGA :
da_11_22_33_44_55_5a_11_22_33_44_55_88_b6_0_1_aa_2f_40_40_40_40_3f_3f_3f_3f_3f_3f_3
f_3f_3f_3f_3f_3f_2f_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0
_0_0_0_0_0_0_0_0_0_0_0_0_0
10:31:25 : PS2 : INST:NSEL 03
10:31:25 : PS2 : :VOLT 6
10:31:25 : PS2 : :CURR 0.55
10:31:25 : PS2 : :OUTP 1

10:31:25 : FPGA :
da_11_22_33_44_55_5a_11_22_33_44_55_88_b6_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0
_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_
0_0_0_0
10:31:25 : -------------Main Script Start----------- : Power_Consumption_Rx
10:31:25 : PNA : :MMEMory:CATalog:CSARchive?
10:31:25 : PNA : Tried to read data....
10:31:25 : PNA : :MMEMory:LOAD:FILE 'PNA2_W18A_W18J_PNA1_RX_RFST1.csa'
10:31:25 : PNA : :SENSe:FREQuency:STARt 9.5 GHZ
10:31:25 : PNA : :SENSe:FREQuency:STOP 9.5 GHZ
10:31:25 : PNA : :SOURce:POWer1:LEVel:IMMediate:AMPLitude -25.0
10:31:25 : PNA : :SENSe1:BANDwidth:RESolution 100
10:31:25 : PNA : :SENSe:X:VALues?
10:31:25 : PS2 : INST:NSEL 04
10:31:25 : PS2 : :MEAS:CURR?

10:31:25 : PS2 : :MEAS:VOLT?

10:31:25 : PS2 : INST:NSEL 03
10:31:25 : PS2 : :MEAS:CURR?

10:31:25 : PS2 : :MEAS:VOLT?

10:31:25 : PS2 : INST:NSEL 02
10:31:25 : PS2 : :MEAS:CURR?

10:31:25 : PS2 : :MEAS:VOLT?

10:31:25 : -------------Main Script End----------- : Power_Consumption_Rx
10:31:26 : PS2 : INST:NSEL 01
10:31:26 : PS2 : :VOLT 0
10:31:26 : PS2 : :OUTP 0
10:31:27 : PS2 : INST:NSEL 03
10:31:27 : PS2 : :VOLT 0
10:31:27 : PS2 : :OUTP 0
10:31:27 : PS2 : INST:NSEL 02
10:31:27 : PS2 : :VOLT 0
10:31:27 : PS2 : :OUTP 0
10:31:27 : PS2 : INST:NSEL 04
10:31:27 : PS2 : :VOLT 0
10:31:27 : PS2 : :OUTP 0

10:31:28 : PS2 : INST:NSEL 01
10:31:28 : PS2 : :VOLT 0
10:31:28 : PS2 : :CURR 0
10:31:28 : PS2 : :OUTP 0
10:31:28 : PS2 : INST:NSEL 04
10:31:28 : PS2 : :VOLT 8
10:31:28 : PS2 : :CURR 0.2
10:31:28 : PS2 : :OUTP 1
10:31:29 : PS2 : :MEAS:CURR?

10:31:29 : PS2 : INST:NSEL 02
10:31:29 : PS2 : :VOLT 6
10:31:29 : PS2 : :CURR 0.4
10:31:29 : PS2 : :OUTP 1

10:31:29 : FPGA :
da_11_22_33_44_55_5a_11_22_33_44_55_88_b6_0_1_aa_2f_40_40_40_40_3f_3f_3f_3f_3f_3f_3
f_3f_3f_3f_3f_3f_2f_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0
_0_0_0_0_0_0_0_0_0_0_0_0_0
10:31:30 : FPGA :
da_11_22_33_44_55_5a_11_22_33_44_55_88_b6_0_1_aa_2f_40_40_40_40_3f_3f_3f_3f_3f_3f_3
f_3f_3f_3f_3f_3f_2f_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0
_0_0_0_0_0_0_0_0_0_0_0_0_0
10:31:31 : PS2 : INST:NSEL 03
10:31:31 : PS2 : :VOLT 6
10:31:31 : PS2 : :CURR 0.55
10:31:31 : PS2 : :OUTP 1

10:31:31 : FPGA :
da_11_22_33_44_55_5a_11_22_33_44_55_88_b6_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0
_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_
0_0_0_0
10:31:31 : -------------Main Script Start----------- : Rx_Chain_Gain
10:31:31 : PNA : :SENSe1:FREQuency:STARt 9.0 GHZ
10:31:31 : PNA : :SENSe1:FREQuency:STOP 10.0 GHZ
10:31:31 : PNA : :SENSe1:SWEep:POINts 11
10:31:31 : PNA : :SOURce1:POWer1:LEVel:IMMediate:AMPLitude -25.0
10:31:31 : PNA : :CALCulate1:PARameter:SELect 'Standard_S12'
10:31:31 : PNA : :SENSe:AVERage:STATe 1
10:31:31 : PNA : CALCulate:SMOothing:STATe 1
10:31:31 : PNA : :SENSe:AVERage:COUNt 10
10:31:32 : PNA : :SENSe1:X:VALues?
10:31:32 : PNA : :CALCulate1:DATA? FDATA
10:31:32 : -------------Main Script End----------- : Rx_Chain_Gain
10:31:33 : PS2 : INST:NSEL 01
10:31:33 : PS2 : :VOLT 0
10:31:33 : PS2 : :OUTP 0
10:31:33 : PS2 : INST:NSEL 03
10:31:33 : PS2 : :VOLT 0
10:31:33 : PS2 : :OUTP 0
10:31:33 : PS2 : INST:NSEL 02
10:31:33 : PS2 : :VOLT 0
10:31:33 : PS2 : :OUTP 0
10:31:33 : PS2 : INST:NSEL 04
10:31:33 : PS2 : :VOLT 0
10:31:33 : PS2 : :OUTP 0

10:31:34 : PS2 : INST:NSEL 01
10:31:34 : PS2 : :VOLT 0
10:31:34 : PS2 : :CURR 0
10:31:34 : PS2 : :OUTP 0
10:31:35 : PS2 : INST:NSEL 04

10:31:35 : PS2 : :VOLT 8
10:31:35 : PS2 : :CURR 0.2
10:31:35 : PS2 : :OUTP 1
10:31:35 : PS2 : :MEAS:CURR?

10:31:35 : PS2 : INST:NSEL 02
10:31:35 : PS2 : :VOLT 6
10:31:35 : PS2 : :CURR 0.4
10:31:35 : PS2 : :OUTP 1

10:31:36 : FPGA :
da_11_22_33_44_55_5a_11_22_33_44_55_88_b6_0_1_aa_2f_40_40_40_40_3f_3f_3f_3f_3f_3f_3
f_3f_3f_3f_3f_3f_2f_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0
_0_0_0_0_0_0_0_0_0_0_0_0_0
10:31:36 : FPGA :
da_11_22_33_44_55_5a_11_22_33_44_55_88_b6_0_1_aa_2f_40_40_40_40_3f_3f_3f_3f_3f_3f_3
f_3f_3f_3f_3f_3f_2f_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0
_0_0_0_0_0_0_0_0_0_0_0_0_0
10:31:37 : PS2 : INST:NSEL 03
10:31:37 : PS2 : :VOLT 6
10:31:37 : PS2 : :CURR 0.55
10:31:37 : PS2 : :OUTP 1

10:31:38 : FPGA :
da_11_22_33_44_55_5a_11_22_33_44_55_88_b6_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0
_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_
0_0_0_0
10:31:38 : -------------Main Script Start----------- : Input_Return_Loss_S22
10:31:38 : PNA : :CALCulate1:CUSTom:DEFine 'Input_Return_Loss','Standard','S22'
10:31:38 : PNA : :DISPlay:WINDow:TRACe4:FEED 'Input_Return_Loss'
10:31:38 : PNA : :CALCulate1:PARameter:SELect 'Input_Return_Loss'
10:31:38 : PNA : :CALCulate1:FORMat MLOGarithmic
10:31:38 : PNA : :CALCulate1:PARameter:SELect 'Input_Return_Loss'
10:31:39 : -------------Main Script End----------- : Input_Return_Loss_S22
10:31:40 : PS2 : INST:NSEL 01
10:31:40 : PS2 : :VOLT 0
10:31:40 : PS2 : :OUTP 0
10:31:40 : PS2 : INST:NSEL 03
10:31:40 : PS2 : :VOLT 0
10:31:40 : PS2 : :OUTP 0
10:31:40 : PS2 : INST:NSEL 02
10:31:40 : PS2 : :VOLT 0
10:31:40 : PS2 : :OUTP 0
10:31:40 : PS2 : INST:NSEL 04
10:31:40 : PS2 : :VOLT 0
10:31:40 : PS2 : :OUTP 0

10:31:41 : PS2 : INST:NSEL 01
10:31:41 : PS2 : :VOLT 0
10:31:41 : PS2 : :CURR 0
10:31:41 : PS2 : :OUTP 0
10:31:42 : PS2 : INST:NSEL 04
10:31:42 : PS2 : :VOLT 8
10:31:42 : PS2 : :CURR 0.2
10:31:42 : PS2 : :OUTP 1
10:31:42 : PS2 : :MEAS:CURR?

10:31:42 : PS2 : INST:NSEL 02
10:31:42 : PS2 : :VOLT 6
10:31:42 : PS2 : :CURR 0.4
10:31:42 : PS2 : :OUTP 1

10:31:43 : FPGA :
da_11_22_33_44_55_5a_11_22_33_44_55_88_b6_0_1_aa_2f_40_40_40_40_3f_3f_3f_3f_3f_3f_3
f_3f_3f_3f_3f_3f_2f_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0
_0_0_0_0_0_0_0_0_0_0_0_0_0
10:31:43 : FPGA :
da_11_22_33_44_55_5a_11_22_33_44_55_88_b6_0_1_aa_2f_40_40_40_40_3f_3f_3f_3f_3f_3f_3
f_3f_3f_3f_3f_3f_2f_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0
_0_0_0_0_0_0_0_0_0_0_0_0_0
10:31:44 : PS2 : INST:NSEL 03
10:31:44 : PS2 : :VOLT 6
10:31:44 : PS2 : :CURR 0.55
10:31:44 : PS2 : :OUTP 1

10:31:45 : FPGA :
da_11_22_33_44_55_5a_11_22_33_44_55_88_b6_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0
_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_
0_0_0_0
10:31:45 : -------------Main Script Start----------- : Output_Return_Loss_S11
10:31:45 : PNA : :CALCulate1:CUSTom:DEFine 'Ant_Port_Return_Loss','Standard','S11'
10:31:45 : PNA : :DISPlay:WINDow:TRACe2:FEED 'Ant_Port_Return_Loss'
10:31:45 : PNA : :CALCulate1:PARameter:SELect 'Ant_Port_Return_Loss'
10:31:45 : PNA : :CALCulate1:FORMat MLOGarithmic
10:31:45 : PNA : :CALCulate1:PARameter:SELect 'Ant_Port_Return_Loss'
10:31:46 : -------------Main Script End----------- : Output_Return_Loss_S11
10:31:47 : PS2 : INST:NSEL 01
10:31:47 : PS2 : :VOLT 0
10:31:47 : PS2 : :OUTP 0
10:31:47 : PS2 : INST:NSEL 03
10:31:47 : PS2 : :VOLT 0
10:31:47 : PS2 : :OUTP 0
10:31:47 : PS2 : INST:NSEL 02
10:31:47 : PS2 : :VOLT 0
10:31:47 : PS2 : :OUTP 0
10:31:47 : PS2 : INST:NSEL 04
10:31:47 : PS2 : :VOLT 0
10:31:47 : PS2 : :OUTP 0

10:31:48 : PS2 : INST:NSEL 01
10:31:48 : PS2 : :VOLT 0
10:31:48 : PS2 : :CURR 0
10:31:48 : PS2 : :OUTP 0
10:31:49 : PS2 : INST:NSEL 04
10:31:49 : PS2 : :VOLT 8
10:31:49 : PS2 : :CURR 0.2
10:31:49 : PS2 : :OUTP 1
10:31:49 : PS2 : :MEAS:CURR?

10:31:49 : PS2 : INST:NSEL 02
10:31:49 : PS2 : :VOLT 6
10:31:49 : PS2 : :CURR 0.4
10:31:49 : PS2 : :OUTP 1

10:31:50 : FPGA :
da_11_22_33_44_55_5a_11_22_33_44_55_88_b6_0_1_aa_2f_40_40_40_40_3f_3f_3f_3f_3f_3f_3
f_3f_3f_3f_3f_3f_2f_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0
_0_0_0_0_0_0_0_0_0_0_0_0_0
10:31:50 : FPGA :
da_11_22_33_44_55_5a_11_22_33_44_55_88_b6_0_1_aa_2f_40_40_40_40_3f_3f_3f_3f_3f_3f_3
f_3f_3f_3f_3f_3f_2f_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0
_0_0_0_0_0_0_0_0_0_0_0_0_0
10:31:51 : PS2 : INST:NSEL 03
10:31:51 : PS2 : :VOLT 6
10:31:51 : PS2 : :CURR 0.55
10:31:51 : PS2 : :OUTP 1

10:31:52 : FPGA :
da_11_22_33_44_55_5a_11_22_33_44_55_88_b6_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0
_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_
0_0_0_0
10:31:52 : -------------Main Script Start----------- : Rx_Attenuator_Test
10:31:52 : PNA : *RST
10:31:52 : PNA : :DISPlay:VISible 0
10:31:52 : PNA : :SENSe:BANDwidth:RESolution 10000
10:31:52 : FPGA :
da_11_22_33_44_55_5a_11_22_33_44_55_88_b6_0_1_aa_2f_40_40_40_40_3f_3f_3f_3f_3f_3f_3
f_3f_3f_3f_3f_3f_2f_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0
_0_0_0_0_0_0_0_0_0_0_0_0_0
10:31:53 : FPGA :
da_11_22_33_44_55_5a_11_22_33_44_55_88_b6_0_1_aa_2f_40_40_40_41_3f_3f_3f_3f_3f_3f_3
f_3f_3f_3f_3f_3f_2e_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0
_0_0_0_0_0_0_0_0_0_0_0_0_0
10:31:54 : FPGA :
da_11_22_33_44_55_5a_11_22_33_44_55_88_b6_0_1_aa_2f_40_40_40_42_3f_3f_3f_3f_3f_3f_3
f_3f_3f_3f_3f_3f_2d_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0
_0_0_0_0_0_0_0_0_0_0_0_0_0
10:31:55 : FPGA :
da_11_22_33_44_55_5a_11_22_33_44_55_88_b6_0_1_aa_2f_40_40_40_44_3f_3f_3f_3f_3f_3f_3
f_3f_3f_3f_3f_3f_2b_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0
_0_0_0_0_0_0_0_0_0_0_0_0_0
10:31:55 : FPGA :
da_11_22_33_44_55_5a_11_22_33_44_55_88_b6_0_1_aa_2f_40_40_40_48_3f_3f_3f_3f_3f_3f_3
f_3f_3f_3f_3f_3f_27_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0
_0_0_0_0_0_0_0_0_0_0_0_0_0
10:31:56 : FPGA :
da_11_22_33_44_55_5a_11_22_33_44_55_88_b6_0_1_aa_2f_40_40_40_50_3f_3f_3f_3f_3f_3f_3
f_3f_3f_3f_3f_3f_3f_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0
_0_0_0_0_0_0_0_0_0_0_0_0_0
10:31:57 : FPGA :
da_11_22_33_44_55_5a_11_22_33_44_55_88_b6_0_1_aa_2f_40_40_40_60_3f_3f_3f_3f_3f_3f_3
f_3f_3f_3f_3f_3f_f_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_
0_0_0_0_0_0_0_0_0_0_0_0_0
10:31:58 : FPGA :
da_11_22_33_44_55_5a_11_22_33_44_55_88_b6_0_1_aa_2f_40_40_40_7f_3f_3f_3f_3f_3f_3f_3
f_3f_3f_3f_3f_3f_10_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0
_0_0_0_0_0_0_0_0_0_0_0_0_0
10:31:59 : FPGA :
da_11_22_33_44_55_5a_11_22_33_44_55_88_b6_0_1_aa_2f_40_40_40_40_3f_3f_3f_3f_3f_3f_3
f_3f_3f_3f_3f_3f_2f_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0
_0_0_0_0_0_0_0_0_0_0_0_0_0
10:31:59 : -------------Main Script End----------- : Rx_Attenuator_Test
10:32:00 : PS2 : INST:NSEL 01
10:32:00 : PS2 : :VOLT 0
10:32:00 : PS2 : :OUTP 0
10:32:00 : PS2 : INST:NSEL 03
10:32:00 : PS2 : :VOLT 0
10:32:00 : PS2 : :OUTP 0
10:32:00 : PS2 : INST:NSEL 02
10:32:00 : PS2 : :VOLT 0
10:32:00 : PS2 : :OUTP 0
10:32:00 : PS2 : INST:NSEL 04
10:32:00 : PS2 : :VOLT 0
10:32:00 : PS2 : :OUTP 0

10:32:01 : PS2 : INST:NSEL 01
10:32:01 : PS2 : :VOLT 0
10:32:01 : PS2 : :CURR 0
10:32:01 : PS2 : :OUTP 0
10:32:02 : PS2 : INST:NSEL 04
10:32:02 : PS2 : :VOLT 8
10:32:02 : PS2 : :CURR 0.2
10:32:02 : PS2 : :OUTP 1
10:32:02 : PS2 : :MEAS:CURR?

10:32:02 : PS2 : INST:NSEL 02
10:32:02 : PS2 : :VOLT 6
10:32:02 : PS2 : :CURR 0.4

10:32:02 : PS2 : :OUTP 1

10:32:03 : FPGA :
da_11_22_33_44_55_5a_11_22_33_44_55_88_b6_0_1_aa_2f_40_40_40_40_3f_3f_3f_3f_3f_3f_3
f_3f_3f_3f_3f_3f_2f_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0
_0_0_0_0_0_0_0_0_0_0_0_0_0
10:32:03 : FPGA :
da_11_22_33_44_55_5a_11_22_33_44_55_88_b6_0_1_aa_2f_40_40_40_40_3f_3f_3f_3f_3f_3f_3
f_3f_3f_3f_3f_3f_2f_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0
_0_0_0_0_0_0_0_0_0_0_0_0_0
10:32:04 : PS2 : INST:NSEL 03
10:32:04 : PS2 : :VOLT 6
10:32:05 : PS2 : :CURR 0.55
10:32:05 : PS2 : :OUTP 1

10:32:05 : FPGA :
da_11_22_33_44_55_5a_11_22_33_44_55_88_b6_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0
_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_
0_0_0_0
10:32:05 : -------------Main Script Start----------- : Rx_Phase_Test
10:32:05 : PNA : *RST
10:32:05 : PNA : :CALCulate1:CUSTom:DEFine 'Standard_Phase','Standard','S12'
10:32:05 : PNA : :DISPlay:WINDow:TRACe9:FEED 'Standard_Phase'
10:32:05 : PNA : :CALCulate1:PARameter:SELect 'Standard_Phase'
10:32:05 : PNA : :CALCulate1:FORMat Phase
10:32:06 : FPGA :
da_11_22_33_44_55_5a_11_22_33_44_55_88_b6_0_1_aa_2f_40_40_40_40_3f_3f_3f_3f_3f_3f_3
f_3f_3f_3f_3f_3f_2f_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0
_0_0_0_0_0_0_0_0_0_0_0_0_0
10:32:07 : FPGA :
da_11_22_33_44_55_5a_11_22_33_44_55_88_b6_0_1_aa_2f_40_40_41_40_3f_3f_3f_3f_3f_3f_3
f_3f_3f_3f_3f_3f_2e_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0
_0_0_0_0_0_0_0_0_0_0_0_0_0
10:32:08 : FPGA :
da_11_22_33_44_55_5a_11_22_33_44_55_88_b6_0_1_aa_2f_40_40_42_40_3f_3f_3f_3f_3f_3f_3
f_3f_3f_3f_3f_3f_2d_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0
_0_0_0_0_0_0_0_0_0_0_0_0_0
10:32:09 : FPGA :
da_11_22_33_44_55_5a_11_22_33_44_55_88_b6_0_1_aa_2f_40_40_44_40_3f_3f_3f_3f_3f_3f_3
f_3f_3f_3f_3f_3f_2b_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0
_0_0_0_0_0_0_0_0_0_0_0_0_0
10:32:10 : FPGA :
da_11_22_33_44_55_5a_11_22_33_44_55_88_b6_0_1_aa_2f_40_40_48_40_3f_3f_3f_3f_3f_3f_3
f_3f_3f_3f_3f_3f_27_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0
_0_0_0_0_0_0_0_0_0_0_0_0_0
10:32:11 : FPGA :
da_11_22_33_44_55_5a_11_22_33_44_55_88_b6_0_1_aa_2f_40_40_50_40_3f_3f_3f_3f_3f_3f_3
f_3f_3f_3f_3f_3f_3f_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0
_0_0_0_0_0_0_0_0_0_0_0_0_0
10:32:12 : FPGA :
da_11_22_33_44_55_5a_11_22_33_44_55_88_b6_0_1_aa_2f_40_40_60_40_3f_3f_3f_3f_3f_3f_3
f_3f_3f_3f_3f_3f_f_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_
0_0_0_0_0_0_0_0_0_0_0_0_0
10:32:12 : FPGA :
da_11_22_33_44_55_5a_11_22_33_44_55_88_b6_0_1_aa_2f_40_40_7f_40_3f_3f_3f_3f_3f_3f_3
f_3f_3f_3f_3f_3f_10_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0
_0_0_0_0_0_0_0_0_0_0_0_0_0
10:32:13 : FPGA :
da_11_22_33_44_55_5a_11_22_33_44_55_88_b6_0_1_aa_2f_40_40_40_40_3f_3f_3f_3f_3f_3f_3
f_3f_3f_3f_3f_3f_2f_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0
_0_0_0_0_0_0_0_0_0_0_0_0_0
10:32:13 : -------------Main Script End----------- : Rx_Phase_Test
10:32:14 : PS2 : INST:NSEL 01
10:32:14 : PS2 : :VOLT 0
10:32:14 : PS2 : :OUTP 0
10:32:15 : PS2 : INST:NSEL 03
10:32:15 : PS2 : :VOLT 0
10:32:15 : PS2 : :OUTP 0
10:32:15 : PS2 : INST:NSEL 02
10:32:15 : PS2 : :VOLT 0
10:32:15 : PS2 : :OUTP 0
10:32:15 : PS2 : INST:NSEL 04
10:32:15 : PS2 : :VOLT 0
10:32:15 : PS2 : :OUTP 0

10:32:16 : PS2 : INST:NSEL 01
10:32:16 : PS2 : :VOLT 0
10:32:16 : PS2 : :CURR 0
10:32:16 : PS2 : :OUTP 0
10:32:16 : PS2 : INST:NSEL 04
10:32:16 : PS2 : :VOLT 8
10:32:16 : PS2 : :CURR 0.2
10:32:16 : PS2 : :OUTP 1
10:32:17 : PS2 : :MEAS:CURR?

10:32:17 : PS2 : INST:NSEL 02
10:32:17 : PS2 : :VOLT 6
10:32:17 : PS2 : :CURR 0.4
10:32:17 : PS2 : :OUTP 1

10:32:17 : FPGA :
da_11_22_33_44_55_5a_11_22_33_44_55_88_b6_0_1_aa_2f_40_40_40_40_3f_3f_3f_3f_3f_3f_3
f_3f_3f_3f_3f_3f_2f_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0
_0_0_0_0_0_0_0_0_0_0_0_0_0
10:32:18 : FPGA :
da_11_22_33_44_55_5a_11_22_33_44_55_88_b6_0_1_aa_2f_40_40_40_40_3f_3f_3f_3f_3f_3f_3
f_3f_3f_3f_3f_3f_2f_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0
_0_0_0_0_0_0_0_0_0_0_0_0_0
10:32:19 : PS2 : INST:NSEL 03
10:32:19 : PS2 : :VOLT 6
10:32:19 : PS2 : :CURR 0.55
10:32:19 : PS2 : :OUTP 1

10:32:19 : FPGA :
da_11_22_33_44_55_5a_11_22_33_44_55_88_b6_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0
_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_
0_0_0_0
10:32:19 : -------------Main Script Start----------- : Rx_Insertion_Phase
10:32:19 : PNA : *RST
10:32:19 : PNA : :CALCulate1:CUSTom:DEFine 'Standard_S12','Standard','S12'
10:32:19 : PNA : :DISPlay:WINDow:TRACe1:FEED 'Standard_S12'
10:32:19 : PNA : :SENSe1:FREQuency:STARt 9.0GHz
10:32:19 : PNA : :SENSe1:FREQuency:STOP 10.0GHz
10:32:19 : PNA : :CALCulate:FORMat Phase
10:32:19 : PNA : :CALCulate1:PARameter:MNUMber:SELect 1
10:32:19 : PNA : :CALCulate:CORRection:EDELay:UNIT METer
10:32:19 : PNA : :CALCulate:CORRection:EDELay:DISTance .007
10:32:19 : PNA : :SOURce1:POWer2:LEVel:IMMediate:AMPLitude -25.0
10:32:20 : -------------Main Script End----------- : Rx_Insertion_Phase
10:32:21 : PS2 : INST:NSEL 01
10:32:21 : PS2 : :VOLT 0
10:32:21 : PS2 : :OUTP 0
10:32:21 : PS2 : INST:NSEL 03
10:32:21 : PS2 : :VOLT 0
10:32:21 : PS2 : :OUTP 0
10:32:22 : PS2 : INST:NSEL 02
10:32:22 : PS2 : :VOLT 0
10:32:22 : PS2 : :OUTP 0
10:32:22 : PS2 : INST:NSEL 04
10:32:22 : PS2 : :VOLT 0
10:32:22 : PS2 : :OUTP 0

10:32:23 : PS2 : INST:NSEL 01
10:32:23 : PS2 : :VOLT 0
10:32:23 : PS2 : :CURR 0
10:32:23 : PS2 : :OUTP 0
10:32:23 : PS2 : INST:NSEL 04
10:32:23 : PS2 : :VOLT 8
10:32:23 : PS2 : :CURR 0.2
10:32:23 : PS2 : :OUTP 1
10:32:24 : PS2 : :MEAS:CURR?

10:32:24 : PS2 : INST:NSEL 02
10:32:24 : PS2 : :VOLT 6
10:32:24 : PS2 : :CURR 0.4
10:32:24 : PS2 : :OUTP 1

10:32:24 : FPGA :
da_11_22_33_44_55_5a_11_22_33_44_55_88_b6_0_1_aa_2f_40_40_40_40_3f_3f_3f_3f_3f_3f_3
f_3f_3f_3f_3f_3f_2f_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0
_0_0_0_0_0_0_0_0_0_0_0_0_0
10:32:25 : FPGA :
da_11_22_33_44_55_5a_11_22_33_44_55_88_b6_0_1_aa_2f_40_40_40_40_3f_3f_3f_3f_3f_3f_3
f_3f_3f_3f_3f_3f_2f_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0
_0_0_0_0_0_0_0_0_0_0_0_0_0
10:32:26 : PS2 : INST:NSEL 03
10:32:26 : PS2 : :VOLT 6
10:32:26 : PS2 : :CURR 0.55
10:32:26 : PS2 : :OUTP 1

10:32:26 : FPGA :
da_11_22_33_44_55_5a_11_22_33_44_55_88_b6_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0
_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_
0_0_0_0
10:32:26 : -------------Main Script Start----------- : Rx_Output_1dB
10:32:26 : PNA : *RST
10:32:26 : PNA : :SOURce1:POWer1:ATTenuation 15
10:32:27 : PNA : :SENSe1:SWEep:TYPE CW
10:32:27 : PNA : :SENSe1:SWEep:TYPE POWer
10:32:27 : PNA : :SOURce1:POWer1:PORT:STARt -25.0
10:32:27 : PNA : :SOURce1:POWer1:PORT:STOP -10.0
10:32:28 : PNA : CALCulate1:MARKer1:STATe 1
10:32:28 : PNA : :CALCulate:MARKer:COMPression:LEVel 1
10:32:28 : PNA : CALCulate1:MARKer1:COMPression:POUT?
10:32:35 : -------------Main Script End----------- : Rx_Output_1dB
10:32:36 : PS2 : INST:NSEL 01
10:32:36 : PS2 : :VOLT 0
10:32:36 : PS2 : :OUTP 0
10:32:36 : PS2 : INST:NSEL 03
10:32:36 : PS2 : :VOLT 0
10:32:36 : PS2 : :OUTP 0
10:32:36 : PS2 : INST:NSEL 02
10:32:36 : PS2 : :VOLT 0
10:32:36 : PS2 : :OUTP 0
10:32:37 : PS2 : INST:NSEL 04
10:32:37 : PS2 : :VOLT 0
10:32:37 : PS2 : :OUTP 0
10:32:37 : RF Path : NS_W18A_W18J_SA_RX_RFST1

10:32:38 : PS2 : INST:NSEL 01
10:32:38 : PS2 : :VOLT 0

10:32:38 : PS2 : :CURR 0
10:32:38 : PS2 : :OUTP 0
10:32:38 : PS2 : INST:NSEL 04
10:32:38 : PS2 : :VOLT 8
10:32:38 : PS2 : :CURR 0.2
10:32:38 : PS2 : :OUTP 1
10:32:39 : PS2 : :MEAS:CURR?

10:32:39 : PS2 : INST:NSEL 02
10:32:39 : PS2 : :VOLT 6
10:32:39 : PS2 : :CURR 0.4
10:32:39 : PS2 : :OUTP 1

10:32:39 : FPGA :
da_11_22_33_44_55_5a_11_22_33_44_55_88_b6_0_1_aa_2f_40_40_40_40_3f_3f_3f_3f_3f_3f_3
f_3f_3f_3f_3f_3f_2f_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0
_0_0_0_0_0_0_0_0_0_0_0_0_0
10:32:40 : FPGA :
da_11_22_33_44_55_5a_11_22_33_44_55_88_b6_0_1_aa_2f_40_40_40_40_3f_3f_3f_3f_3f_3f_3
f_3f_3f_3f_3f_3f_2f_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0
_0_0_0_0_0_0_0_0_0_0_0_0_0
10:32:41 : PS2 : INST:NSEL 03
10:32:41 : PS2 : :VOLT 6
10:32:41 : PS2 : :CURR 0.55
10:32:41 : PS2 : :OUTP 1

10:32:41 : FPGA :
da_11_22_33_44_55_5a_11_22_33_44_55_88_b6_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0
_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_
0_0_0_0
10:32:41 : -------------Main Script Start----------- : Rx_Noise_Figure
10:32:41 : SA : :INSTrument:SELect 'nfigure'
10:32:41 : SA : :MMEMory:LOAD:STATe 'C_Band_QTRM_NS_SA_NF_Cal_RFST1.state'
10:32:42 : SA : :SENSe:FREQuency:STARt 9.0 GHZ
10:32:42 : SA : :SENSe:FREQuency:STOP 10.0 GHZ
10:32:42 : SA : :SENSe:NFIGure:SWEep:POINts 11
10:32:42 : SA : :SENSe:CORRection:LOSS:BEFore:MODE TABLe
10:32:42 : SA : :SENSe:CORRection:LOSS:AFTer:MODE TABLe
10:32:42 : SA : DISP:NFIG:VIEW1:WIND1:TRAC:Y:COUP 0
10:32:42 : SA : DISP:NFIG:VIEW:WIND2:TRAC:Y:COUP 1
10:32:42 : SA : :DISPlay:NFIGure:TRACe:NFIGure:Y:SCALe:PDIVision 2
10:32:42 : SA : :DISPlay:NFIGure:TRACe:NFIGure:Y:SCALe:RLEVel 2.5
10:32:42 : SA : :SENSe:NFIGure:AVERage:STATe 0
10:32:42 : SA : :SENSe:SWEep:TIME 0.0012
10:32:42 : SA : :SENSe:NFIGure:AVERage:STATe 1
10:32:43 : SA : :FORMat:TRACe:DATA ASCii,8
10:32:52 : SA : :FETCh:NFIGure:ARRay:DATA:CORRected:NFIGure?
10:32:52 : SA : :INSTrument:SELect SA
10:32:52 : SA : :DISPlay:ENABle 1
10:32:52 : -------------Main Script End----------- : Rx_Noise_Figure
10:32:53 : PS2 : INST:NSEL 01
10:32:53 : PS2 : :VOLT 0
10:32:53 : PS2 : :OUTP 0
10:32:54 : PS2 : INST:NSEL 03
10:32:54 : PS2 : :VOLT 0
10:32:54 : PS2 : :OUTP 0
10:32:54 : PS2 : INST:NSEL 02
10:32:54 : PS2 : :VOLT 0
10:32:54 : PS2 : :OUTP 0
10:32:54 : PS2 : INST:NSEL 04
10:32:54 : PS2 : :VOLT 0
10:32:54 : PS2 : :OUTP 0

10:32:55 : PS2 : INST:NSEL 04
10:32:55 : PS2 : :VOLT 8
10:32:55 : PS2 : :CURR 0.2
10:32:55 : PS2 : :OUTP 1
10:32:56 : PS2 : :MEAS:CURR?

10:32:56 : PS2 : INST:NSEL 02

10:32:56 : PS2 : :VOLT 6
10:32:56 : PS2 : :CURR 0.4
10:32:56 : PS2 : :OUTP 1
10:32:56 : FPGA : Command - XBAND_TX_CALIB

10:32:56 : FPGA :
da_11_22_33_44_55_5a_11_22_33_44_55_88_b6_0_1_aa_3f_c0_c0_c0_c0_3f_3f_3f_3f_3f_3f_3
f_3f_3f_3f_3f_3f_3f_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0
_0_0_0_0_0_0_0_0_0_0_0_0_0
10:32:56 : PS2 : INST:NSEL 03
10:32:56 : PS2 : :VOLT 6
10:32:56 : PS2 : :CURR 0.8
10:32:56 : PS2 : :OUTP 1
10:32:57 : PS2 : INST:NSEL 01
10:32:57 : PS2 : :VOLT 8.35
10:32:57 : PS2 : :CURR 0.75
10:32:57 : PS2 : :OUTP 1

10:32:57 : FPGA :
da_11_22_33_44_55_5a_11_22_33_44_55_88_b6_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0
_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_
0_0_0_0
10:32:57 : -------------Main Script Start----------- : Power_Consumption_Tx
10:32:57 : PNA : :SENSe:SWEep:TYPE CW
10:32:57 : FPGA :
da_11_22_33_44_55_5a_11_22_33_44_55_88_b6_0_1_cd_f_0_1_86_a0_27_d8_27_10_27_10_27_1
0_27_10_27_10_27_10_27_10_27_10_0_0_0_64_0_0_0_bf_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_c8_
0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0
10:32:57 : PM : :TRIGger1:SOURce INTernal
10:32:58 : PS2 : INST:NSEL 04
10:32:58 : PS2 : :MEAS:CURR?

10:32:58 : PS2 : :MEAS:VOLT?

10:32:58 : PS2 : INST:NSEL 03
10:32:58 : PS2 : :MEAS:CURR?

10:32:58 : PS2 : :MEAS:VOLT?

10:32:58 : PS2 : INST:NSEL 02
10:32:58 : PS2 : :MEAS:CURR?

10:32:58 : PS2 : :MEAS:VOLT?

10:32:58 : PS2 : INST:NSEL 01
10:32:58 : PS2 : :MEAS:CURR?

10:32:58 : PS2 : :MEAS:VOLT?

10:32:58 : FPGA :
da_11_22_33_44_55_5a_11_22_33_44_55_88_b6_0_1_cd_0_0_1_86_a0_27_d8_27_10_27_10_27_1
0_27_10_27_10_27_10_27_10_27_10_0_0_0_64_0_0_0_bf_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_c8_
0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0
10:32:58 : -------------Main Script End----------- : Power_Consumption_Tx
10:32:59 : PS2 : INST:NSEL 01
10:32:59 : PS2 : :VOLT 0
10:32:59 : PS2 : :OUTP 0
10:32:59 : PS2 : INST:NSEL 03
10:32:59 : PS2 : :VOLT 0
10:32:59 : PS2 : :OUTP 0
10:32:59 : PS2 : INST:NSEL 02
10:32:59 : PS2 : :VOLT 0
10:32:59 : PS2 : :OUTP 0
10:32:59 : PS2 : INST:NSEL 04
10:32:59 : PS2 : :VOLT 0
10:32:59 : PS2 : :OUTP 0

10:33:01 : PS2 : INST:NSEL 04
10:33:01 : PS2 : :VOLT 8
10:33:01 : PS2 : :CURR 0.2
10:33:01 : PS2 : :OUTP 1
10:33:01 : PS2 : :MEAS:CURR?

10:33:01 : PS2 : INST:NSEL 02
10:33:01 : PS2 : :VOLT 6
10:33:01 : PS2 : :CURR 0.4

10:33:01 : PS2 : :OUTP 1

10:33:02 : FPGA :
f_3f_3f_3f_3f_3f_3f_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0
_0_0_0_0_0_0_0_0_0_0_0_0_0
10:33:02 : PS2 : INST:NSEL 03
10:33:02 : PS2 : :VOLT 6
10:33:02 : PS2 : :CURR 0.8
10:33:02 : PS2 : :OUTP 1
10:33:02 : PS2 : INST:NSEL 01
10:33:02 : PS2 : :VOLT 8.35
10:33:02 : PS2 : :CURR 0.75
10:33:02 : PS2 : :OUTP 1

10:33:03 : FPGA :
da_11_22_33_44_55_5a_11_22_33_44_55_88_b6_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0
_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_
0_0_0_0
10:33:03 : -------------Main Script Start----------- : C_Band_Peak_Droop_Eff-1
10:33:03 : PM : :SENSe1:AVERage:COUNt 12
10:33:03 : PM : :TRIGger1:SOURce EXTernal
10:33:03 : PM : :TRACe1:STATe 1
10:33:03 : PM : :INITiate1:CONTinuous:ALL 1
10:33:03 : FPGA :
da_11_22_33_44_55_5a_11_22_33_44_55_88_b6_0_1_cd_f_0_1_86_a0_27_d8_27_10_27_10_27_1
0_27_10_27_10_27_10_27_10_27_10_0_0_0_64_0_0_0_bf_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_c8_
0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0
10:33:06 : PM : :SENSe:TRACe:OFFSet:TIME -1.0e-005
10:33:06 : PM : :SENSe:TRACe:TIME 0.001
10:33:06 : PM : :SENSe:SWEep:OFFSet:TIME 1.3e-006
10:33:06 : PM : :SENSe1:SWEep:TIME 1.0e-006
10:33:06 : PM : :SENSe:SWEep2:OFFSet:TIME 9.6e-005
10:33:06 : PM : :SENSe1:SWEep2:TIME 5.0e-007
10:33:06 : PM : :SENSe1:SWEep2:TIME 5.0e-007:SENSe:SWEep3:OFFSet:TIME 1.4e-006
10:33:06 : PM : :SENSe1:SWEep3:TIME 1.0e-006
10:33:08 : PM : :CALCulate1:FEED1 'POW:PEAK ON SWEEP3'
10:33:09 : PS2 : INST:NSEL 01
10:33:09 : PS2 : :MEAS:CURR?

10:33:09 : PS2 : :MEAS:VOLT?

10:33:09 : FPGA :
f_3f_3f_3f_3f_3f_3f_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0
_0_0_0_0_0_0_0_0_0_0_0_0_0
10:33:12 : FPGA :
f_3f_3f_3f_3f_3f_3f_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0
_0_0_0_0_0_0_0_0_0_0_0_0_0
10:33:19 : PS2 : INST:NSEL 01
10:33:19 : PS2 : :MEAS:CURR?

10:33:19 : PS2 : :MEAS:VOLT?

10:33:19 : FPGA :
f_3f_3f_3f_3f_3f_3f_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0
_0_0_0_0_0_0_0_0_0_0_0_0_0
10:33:22 : FPGA :
f_3f_3f_3f_3f_3f_3f_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0
_0_0_0_0_0_0_0_0_0_0_0_0_0
10:33:28 : PS2 : INST:NSEL 01
10:33:28 : PS2 : :MEAS:CURR?

10:33:28 : PS2 : :MEAS:VOLT?

10:34:03 : FPGA :
f_3f_3f_3f_3f_3f_3f_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0
_0_0_0_0_0_0_0_0_0_0_0_0_0
10:34:06 : FPGA :
f_3f_3f_3f_3f_3f_3f_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0
_0_0_0_0_0_0_0_0_0_0_0_0_0
10:34:13 : PS2 : INST:NSEL 01
10:34:13 : PS2 : :MEAS:CURR?

10:34:13 : PS2 : :MEAS:VOLT?

10:34:13 : FPGA :
f_3f_3f_3f_3f_3f_3f_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0
_0_0_0_0_0_0_0_0_0_0_0_0_0
10:34:16 : FPGA :
f_3f_3f_3f_3f_3f_3f_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0
_0_0_0_0_0_0_0_0_0_0_0_0_0
10:34:22 : PS2 : INST:NSEL 01
10:34:22 : PS2 : :MEAS:CURR?

10:34:22 : PS2 : :MEAS:VOLT?

10:34:22 : FPGA :
f_3f_3f_3f_3f_3f_3f_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0
_0_0_0_0_0_0_0_0_0_0_0_0_0
10:34:25 : FPGA :
f_3f_3f_3f_3f_3f_3f_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0
_0_0_0_0_0_0_0_0_0_0_0_0_0
10:34:31 : PS2 : INST:NSEL 01
10:34:31 : PS2 : :MEAS:CURR?

10:34:31 : PS2 : :MEAS:VOLT?

10:34:31 : FPGA :
f_3f_3f_3f_3f_3f_3f_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0
_0_0_0_0_0_0_0_0_0_0_0_0_0
10:34:34 : FPGA :
f_3f_3f_3f_3f_3f_3f_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0
_0_0_0_0_0_0_0_0_0_0_0_0_0
10:34:41 : PS2 : INST:NSEL 01
10:34:41 : PS2 : :MEAS:CURR?

10:34:41 : PS2 : :MEAS:VOLT?

10:34:41 : FPGA :
f_3f_3f_3f_3f_3f_3f_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0
_0_0_0_0_0_0_0_0_0_0_0_0_0
10:34:44 : FPGA :
f_3f_3f_3f_3f_3f_3f_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0
_0_0_0_0_0_0_0_0_0_0_0_0_0
10:34:50 : PS2 : INST:NSEL 01
10:34:50 : PS2 : :MEAS:CURR?

10:34:50 : PS2 : :MEAS:VOLT?

10:34:50 : FPGA :
f_3f_3f_3f_3f_3f_3f_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0
_0_0_0_0_0_0_0_0_0_0_0_0_0
10:34:53 : FPGA :
f_3f_3f_3f_3f_3f_3f_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0
_0_0_0_0_0_0_0_0_0_0_0_0_0
10:35:00 : PS2 : INST:NSEL 01
10:35:00 : PS2 : :MEAS:CURR?

10:35:00 : PS2 : :MEAS:VOLT?

10:35:00 : FPGA :
f_3f_3f_3f_3f_3f_3f_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0
_0_0_0_0_0_0_0_0_0_0_0_0_0
10:35:03 : FPGA :
f_3f_3f_3f_3f_3f_3f_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0
_0_0_0_0_0_0_0_0_0_0_0_0_0
10:35:09 : PS2 : INST:NSEL 01
10:35:09 : PS2 : :MEAS:CURR?

10:35:09 : PS2 : :MEAS:VOLT?

10:35:09 : FPGA :
f_3f_3f_3f_3f_3f_3f_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0
_0_0_0_0_0_0_0_0_0_0_0_0_0
10:35:12 : FPGA :
f_3f_3f_3f_3f_3f_3f_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0
_0_0_0_0_0_0_0_0_0_0_0_0_0
10:35:18 : PS2 : INST:NSEL 01
10:35:18 : PS2 : :MEAS:CURR?

10:35:18 : PS2 : :MEAS:VOLT?

10:35:18 : FPGA :
f_3f_3f_3f_3f_3f_3f_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0
_0_0_0_0_0_0_0_0_0_0_0_0_0
10:35:21 : FPGA :
f_3f_3f_3f_3f_3f_3f_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0
_0_0_0_0_0_0_0_0_0_0_0_0_0
10:35:25 : FPGA :
da_11_22_33_44_55_5a_11_22_33_44_55_88_b6_0_1_cd_0_0_1_86_a0_27_d8_27_10_27_10_27_1
0_27_10_27_10_27_10_27_10_27_10_0_0_0_64_0_0_0_bf_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_c8_
0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0
10:35:25 : -------------Main Script End----------- : C_Band_Peak_Droop_Eff-1
10:35:26 : PS2 : INST:NSEL 01
10:35:26 : PS2 : :VOLT 0
10:35:26 : PS2 : :OUTP 0
10:35:26 : PS2 : INST:NSEL 03
10:35:26 : PS2 : :VOLT 0
10:35:26 : PS2 : :OUTP 0
10:35:26 : PS2 : INST:NSEL 02
10:35:26 : PS2 : :VOLT 0

10:35:26 : PS2 : :OUTP 0
10:35:26 : PS2 : INST:NSEL 04
10:35:26 : PS2 : :VOLT 0
10:35:26 : PS2 : :OUTP 0

10:35:27 : PS2 : INST:NSEL 04
10:35:27 : PS2 : :VOLT 8
10:35:27 : PS2 : :CURR 0.2
10:35:27 : PS2 : :OUTP 1
10:35:28 : PS2 : :MEAS:CURR?

10:35:28 : PS2 : INST:NSEL 02
10:35:28 : PS2 : :VOLT 6
10:35:28 : PS2 : :CURR 0.4
10:35:28 : PS2 : :OUTP 1

10:35:28 : FPGA :
f_3f_3f_3f_3f_3f_3f_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0
_0_0_0_0_0_0_0_0_0_0_0_0_0
10:35:29 : PS2 : INST:NSEL 03
10:35:29 : PS2 : :VOLT 6
10:35:29 : PS2 : :CURR 0.8
10:35:29 : PS2 : :OUTP 1
10:35:29 : PS2 : INST:NSEL 01
10:35:29 : PS2 : :VOLT 8.35
10:35:29 : PS2 : :CURR 0.75
10:35:29 : PS2 : :OUTP 1

10:35:29 : FPGA :
da_11_22_33_44_55_5a_11_22_33_44_55_88_b6_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0
_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_
0_0_0_0
10:35:30 : PS2 : INST:NSEL 01
10:35:30 : PS2 : :VOLT 0
10:35:30 : PS2 : :OUTP 0
10:35:30 : PS2 : INST:NSEL 03
10:35:30 : PS2 : :VOLT 0
10:35:30 : PS2 : :OUTP 0
10:35:30 : PS2 : INST:NSEL 02
10:35:30 : PS2 : :VOLT 0
10:35:30 : PS2 : :OUTP 0
10:35:30 : PS2 : INST:NSEL 04
10:35:30 : PS2 : :VOLT 0
10:35:30 : PS2 : :OUTP 0

10:35:32 : PS2 : INST:NSEL 04
10:35:32 : PS2 : :VOLT 8
10:35:32 : PS2 : :CURR 0.2
10:35:32 : PS2 : :OUTP 1
10:35:32 : PS2 : :MEAS:CURR?

10:35:32 : PS2 : INST:NSEL 02
10:35:32 : PS2 : :VOLT 6
10:35:32 : PS2 : :CURR 0.4
10:35:32 : PS2 : :OUTP 1

10:35:33 : FPGA :
f_3f_3f_3f_3f_3f_3f_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0
_0_0_0_0_0_0_0_0_0_0_0_0_0
10:35:33 : PS2 : INST:NSEL 03
10:35:33 : PS2 : :VOLT 6
10:35:33 : PS2 : :CURR 0.8
10:35:33 : PS2 : :OUTP 1
10:35:33 : PS2 : INST:NSEL 01
10:35:33 : PS2 : :VOLT 8.35
10:35:33 : PS2 : :CURR 0.75
10:35:33 : PS2 : :OUTP 1

10:35:33 : FPGA :
da_11_22_33_44_55_5a_11_22_33_44_55_88_b6_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0
_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_
0_0_0_0
10:35:34 : PS2 : INST:NSEL 01
10:35:34 : PS2 : :VOLT 0
10:35:34 : PS2 : :OUTP 0
10:35:35 : PS2 : INST:NSEL 03
10:35:35 : PS2 : :VOLT 0
10:35:35 : PS2 : :OUTP 0
10:35:35 : PS2 : INST:NSEL 02
10:35:35 : PS2 : :VOLT 0
10:35:35 : PS2 : :OUTP 0
10:35:35 : PS2 : INST:NSEL 04
10:35:35 : PS2 : :VOLT 0
10:35:35 : PS2 : :OUTP 0

10:35:36 : PS2 : INST:NSEL 04
10:35:36 : PS2 : :VOLT 8
10:35:36 : PS2 : :CURR 0.2

10:35:36 : PS2 : :OUTP 1
10:35:37 : PS2 : :MEAS:CURR?

10:35:37 : PS2 : INST:NSEL 02
10:35:37 : PS2 : :VOLT 6
10:35:37 : PS2 : :CURR 0.4
10:35:37 : PS2 : :OUTP 1

10:35:37 : FPGA :
f_3f_3f_3f_3f_3f_3f_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0
_0_0_0_0_0_0_0_0_0_0_0_0_0
10:35:37 : PS2 : INST:NSEL 03
10:35:37 : PS2 : :VOLT 6
10:35:37 : PS2 : :CURR 0.8
10:35:37 : PS2 : :OUTP 1
10:35:38 : PS2 : INST:NSEL 01
10:35:38 : PS2 : :VOLT 8.35
10:35:38 : PS2 : :CURR 0.75
10:35:38 : PS2 : :OUTP 1

10:35:38 : FPGA :
da_11_22_33_44_55_5a_11_22_33_44_55_88_b6_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0
_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_
0_0_0_0
10:35:39 : PS2 : INST:NSEL 01
10:35:39 : PS2 : :VOLT 0
10:35:39 : PS2 : :OUTP 0
10:35:39 : PS2 : INST:NSEL 03
10:35:39 : PS2 : :VOLT 0
10:35:39 : PS2 : :OUTP 0

10:35:39 : PS2 : INST:NSEL 02
10:35:39 : PS2 : :VOLT 0
10:35:39 : PS2 : :OUTP 0
10:35:39 : PS2 : INST:NSEL 04
10:35:39 : PS2 : :VOLT 0
10:35:39 : PS2 : :OUTP 0
10:35:39 : RF Path : PNA1_W18J_W18A_OSC1_TX_RFST1

10:35:41 : PS2 : INST:NSEL 04
10:35:41 : PS2 : :VOLT 8
10:35:41 : PS2 : :CURR 0.2
10:35:41 : PS2 : :OUTP 1
10:35:41 : PS2 : :MEAS:CURR?

10:35:41 : PS2 : INST:NSEL 02
10:35:41 : PS2 : :VOLT 6
10:35:41 : PS2 : :CURR 0.4
10:35:41 : PS2 : :OUTP 1

10:35:42 : FPGA :
f_3f_3f_3f_3f_3f_3f_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0
_0_0_0_0_0_0_0_0_0_0_0_0_0
10:35:42 : PS2 : INST:NSEL 03
10:35:42 : PS2 : :VOLT 6
10:35:42 : PS2 : :CURR 0.8
10:35:42 : PS2 : :OUTP 1
10:35:42 : PS2 : INST:NSEL 01
10:35:42 : PS2 : :VOLT 8.35
10:35:42 : PS2 : :CURR 0.75

10:35:42 : PS2 : :OUTP 1

10:35:42 : FPGA :
da_11_22_33_44_55_5a_11_22_33_44_55_88_b6_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0
_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_
0_0_0_0
10:35:42 : -------------Main Script Start----------- : C_Band_Rise_Fall_Time
10:35:42 : DSO : :SYSTem:PRESet
10:35:43 : DSO : :CHANnel1:DISPlay 1
10:35:43 : DSO : :CHANnel2:DISPlay 0
10:35:43 : DSO : :CHANnel1:COUPling DC
10:35:43 : DSO : :TRIGger:MODE EDGE
10:35:43 : DSO : :TRIGger:EDGE:SOURce CHANNEL1
10:35:43 : DSO : :TRIGger:EDGE:SLOPe POSitive
10:35:43 : DSO : :TRIGger:GLITch:QUALifier GREaterthan
10:35:43 : DSO : :CHANnel1:INVert 1
10:35:43 : DSO : :CHANnel1:IMPedance FIFTy
10:35:44 : DSO : :CHANnel1:SCALe 0.01
10:35:44 : DSO : :TRIGger:GLITch:LEVel 0.008
10:35:44 : FPGA :
da_11_22_33_44_55_5a_11_22_33_44_55_88_b6_0_1_cd_f_0_1_86_a0_27_d8_27_10_27_10_27_1
0_27_10_27_10_27_10_27_10_27_10_0_0_0_64_0_0_0_bf_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0
_0_0_c8_0_0_0_0_0_0_0_0_0_0_0_0
10:35:44 : PNA : :SENSe1:FREQuency:CW 9.0GHZ
10:35:44 : DSO : :TIMebase:MAIN:RANGe 5.0e-005
10:35:44 : DSO : :MEASure:RISetime? CHANNEL1
10:35:44 : DSO : Tried to read data....
10:35:44 : DSO : :TRIGger:EDGE:SLOPe NEGative
10:35:44 : DSO : :MEASure:FALLtime? CHANNEL1
10:35:50 : FPGA :
da_11_22_33_44_55_5a_11_22_33_44_55_88_b6_0_1_cd_0_0_1_86_a0_27_d8_27_10_27_10_27_1
0_27_10_27_10_27_10_27_10_27_10_0_0_0_64_0_0_0_bf_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0
_0_0_c8_0_0_0_0_0_0_0_0_0_0_0_0
10:35:50 : DSO : :SYSTem:PRESet
10:35:50 : -------------Main Script End----------- : C_Band_Rise_Fall_Time
10:35:51 : PS2 : INST:NSEL 01
10:35:51 : PS2 : :VOLT 0
10:35:51 : PS2 : :OUTP 0
10:35:51 : PS2 : INST:NSEL 03
10:35:51 : PS2 : :VOLT 0
10:35:51 : PS2 : :OUTP 0
10:35:51 : PS2 : INST:NSEL 02
10:35:51 : PS2 : :VOLT 0
10:35:51 : PS2 : :OUTP 0
10:35:51 : PS2 : INST:NSEL 04
10:35:51 : PS2 : :VOLT 0
10:35:51 : PS2 : :OUTP 0
10:35:51 : RF Path : PNA1_W18J_W18A_PNA2_TX_RFST1

10:35:52 : PS2 : INST:NSEL 04
10:35:52 : PS2 : :VOLT 8
10:35:52 : PS2 : :CURR 0.2
10:35:52 : PS2 : :OUTP 1
10:35:53 : PS2 : :MEAS:CURR?

10:35:53 : PS2 : INST:NSEL 02
10:35:53 : PS2 : :VOLT 6
10:35:53 : PS2 : :CURR 0.4
10:35:53 : PS2 : :OUTP 1

10:35:53 : FPGA :
f_3f_3f_3f_3f_3f_3f_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0
_0_0_0_0_0_0_0_0_0_0_0_0_0
10:35:54 : PS2 : INST:NSEL 03
10:35:54 : PS2 : :VOLT 6
10:35:54 : PS2 : :CURR 0.8
10:35:54 : PS2 : :OUTP 1
10:35:54 : PS2 : INST:NSEL 01
10:35:54 : PS2 : :VOLT 8.35
10:35:54 : PS2 : :CURR 0.75
10:35:54 : PS2 : :OUTP 1

10:35:54 : FPGA :
da_11_22_33_44_55_5a_11_22_33_44_55_88_b6_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0
_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_
0_0_0_0
10:35:54 : -------------Main Script Start----------- : Tx_Insertion_Phase
10:35:54 : PNA : *RST
10:35:54 : PNA : :MMEMory:LOAD:FILE 'PNA1_W18J_W18A_PNA2_TX_RFST1.csa'
10:35:54 : PNA : :SENSe1:FREQuency:STARt 9.0GHz
10:35:54 : PNA : :SENSe1:FREQuency:STOP 10.0GHz
10:35:54 : PNA : :CALCulate:FORMat Phase
10:35:54 : PNA : :CALCulate:CORRection:EDELay:UNIT METer
10:35:54 : PNA : :CALCulate:CORRection:EDELay:DISTance 0.007
10:35:54 : PNA : :SOURce1:POWer2:LEVel:IMMediate:AMPLitude 5.0
10:35:54 : PNA : :SENSe1:POWer:ATTenuator ARECeiver,10
10:35:54 : PNA : :SENSe1:POWer:ATTenuator BRECeiver,10
10:35:55 : FPGA :
da_11_22_33_44_55_5a_11_22_33_44_55_88_b6_0_1_cd_f_0_1_86_a0_27_d8_27_10_27_10_27_1
0_27_10_27_10_27_10_27_10_27_10_0_0_0_64_0_0_0_bf_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0
_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0
10:35:55 : FPGA :
da_11_22_33_44_55_5a_11_22_33_44_55_88_b6_0_1_cd_0_0_1_86_a0_27_d8_27_10_27_10_27_1
0_27_10_27_10_27_10_27_10_27_10_0_0_0_64_0_0_0_bf_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0
_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0
10:35:55 : -------------Main Script End----------- : Tx_Insertion_Phase
10:35:56 : PS2 : INST:NSEL 01
10:35:56 : PS2 : :VOLT 0
10:35:56 : PS2 : :OUTP 0
10:35:56 : PS2 : INST:NSEL 03
10:35:56 : PS2 : :VOLT 0
10:35:56 : PS2 : :OUTP 0
10:35:56 : PS2 : INST:NSEL 02
10:35:56 : PS2 : :VOLT 0
10:35:56 : PS2 : :OUTP 0
10:35:56 : PS2 : INST:NSEL 04
10:35:56 : PS2 : :VOLT 0

10:35:56 : PS2 : :OUTP 0
10:35:57 : RF Path : SG_W18J_W18A_SA_TX_RFST1

10:35:58 : PS2 : INST:NSEL 04
10:35:58 : PS2 : :VOLT 8
10:35:58 : PS2 : :CURR 0.2
10:35:58 : PS2 : :OUTP 1
10:35:58 : PS2 : :MEAS:CURR?

10:35:58 : PS2 : INST:NSEL 02
10:35:58 : PS2 : :VOLT 6
10:35:58 : PS2 : :CURR 0.4
10:35:58 : PS2 : :OUTP 1

10:35:59 : FPGA :
f_3f_3f_3f_3f_3f_3f_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0
_0_0_0_0_0_0_0_0_0_0_0_0_0
10:35:59 : PS2 : INST:NSEL 03
10:35:59 : PS2 : :VOLT 6
10:35:59 : PS2 : :CURR 0.8
10:35:59 : PS2 : :OUTP 1
10:35:59 : PS2 : INST:NSEL 01
10:35:59 : PS2 : :VOLT 8.35
10:35:59 : PS2 : :CURR 0.75
10:35:59 : PS2 : :OUTP 1

10:36:00 : FPGA :
da_11_22_33_44_55_5a_11_22_33_44_55_88_b6_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0
_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_
0_0_0_0
10:36:00 : -------------Main Script Start----------- : Harmonic_Rejection
10:36:00 : SG : :SYSTem:PRESet
10:36:00 : SG : :OUTPut:STATe 0
10:36:00 : SA : :INITiate:HARMonics
10:36:00 : SA : :SENSe:HARMonics:SWEeptime 0.0001
10:36:00 : SA : :DISPlay:HARMonics:VIEW1:WINDow:TRACe:Y:SCALe:RLEVel 20 DBMw
10:36:00 : SA : :SENSe:HARMonics:BWIDth:RESolution 600000
10:36:00 : SA : :TRIGger:HARMonics:SEQuence:RF:SOURce EXTernal1
10:36:00 : SA : :SENSe:POWer:RF:ATTenuation 30
10:36:00 : SG : SOURce:POWer:ALC:STATe OFF
10:36:00 : SG : :SOURce1:PULM:SOUR1:INTernal TRIGgered
10:36:00 : SG : :SOURce1:PULM:INTernal:PWIDth 0.0001
10:36:00 : SG : :SOURce1:PULM:STATe ON
10:36:00 : SG : :OUTPut:MODulation:STATe 1
10:36:00 : FPGA :
da_11_22_33_44_55_5a_11_22_33_44_55_88_b6_0_1_cd_f_0_1_86_a0_27_d8_27_10_27_10_27_1
0_27_10_27_10_27_10_27_10_27_10_0_0_0_64_0_0_0_0_0_0_0_bf_0_0_0_0_0_0_0_c8_0_0_0_0_
0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0
10:36:01 : SG : :SOURce1:POWer:LEVel:IMMediate:AMPLitude 13.15
10:36:01 : SG : :SOURce:FREQuency:CW 9.0 GHZ
10:36:01 : SA : :SENSe:HARMonics:FREQuency:FUNDamental 9.0 GHZ
10:36:01 : SA : :FETCh:HARMonics:FREQuency2?
10:36:01 : SA : :FETCh:HARMonics:AMPLitude2?
10:36:09 : FPGA :
da_11_22_33_44_55_5a_11_22_33_44_55_88_b6_0_1_cd_0_0_1_86_a0_27_d8_27_10_27_10_27_1
0_27_10_27_10_27_10_27_10_27_10_0_0_0_64_0_0_0_0_0_0_0_bf_0_0_0_0_0_0_0_c8_0_0_0_0_
0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0
10:36:09 : SA : :INSTrument:SELect SA
10:36:09 : SG : :SYSTem:PRESet
10:36:09 : -------------Main Script End----------- : Harmonic_Rejection
10:36:10 : PS2 : INST:NSEL 01
10:36:10 : PS2 : :VOLT 0
10:36:10 : PS2 : :OUTP 0
10:36:10 : PS2 : INST:NSEL 03
10:36:10 : PS2 : :VOLT 0
10:36:10 : PS2 : :OUTP 0
10:36:10 : PS2 : INST:NSEL 02
10:36:10 : PS2 : :VOLT 0
10:36:10 : PS2 : :OUTP 0
10:36:10 : PS2 : INST:NSEL 04
10:36:10 : PS2 : :VOLT 0
10:36:10 : PS2 : :OUTP 0
10:36:15 : FPGA :
ff_ff_ff_ff_ff_ff_ff_11_22_33_44_55_88_b6_0_1_cd_0_0_1_86_a0_27_d8_27_10_27_10_27_1
0_27_10_27_10_27_10_27_10_27_10_0_0_0_64_0_0_0_0_0_0_0_bf_0_0_0_0_0_0_0_c8_0_0_0_0_
0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0
10:36:15 : PS2 : INST:NSEL 01
10:36:15 : PS2 : :VOLT 0
10:36:15 : PS2 : :OUTP 0
10:36:15 : PS2 : INST:NSEL 03
10:36:15 : PS2 : :VOLT 0
10:36:15 : PS2 : :OUTP 0
10:36:15 : PS2 : INST:NSEL 02
10:36:15 : PS2 : :VOLT 0
10:36:15 : PS2 : :OUTP 0
10:36:15 : PS2 : INST:NSEL 04
10:36:15 : PS2 : :VOLT 0

10:36:15 : PS2 : :OUTP 0
10:36:15 : PS2 : VISA Close Successful

10:36:15 : SG : VISA Close Successful
10:36:15 : SA : VISA Close Successful
10:36:15 : PNA : VISA Close Successful
10:36:15 : DSO : VISA Close Successful
10:36:15 : PM : VISA Close Successful
10:36:15 : DMM : VISA Close Successful

Status Trace Command 06-06-2019

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10:30:21 : PS2 : VISA Initialization Successful

10:30:22 : PS2 : SYST:ERR:ENAB

10:30:22 : PS2 : :VOLT 0

10:30:22 : PS2 : :CURR 0

10:30:22 : PS2 : :OUTP 0

10:30:23 : PS2 : INST:NSEL 03

10:30:23 : PS2 : SYST:ERR:ENAB

10:30:23 : PS2 : :VOLT 0

10:30:23 : PS2 : :CURR 0

10:30:23 : PS2 : :OUTP 0

10:30:23 : PS2 : INST:NSEL 04

10:30:23 : PS2 : SYST:ERR:ENAB

10:30:23 : PS2 : :VOLT 8

10:30:23 : PS2 : :CURR 0.22

10:30:23 : PS2 : :OUTP 1

10:30:23 : PS2 : :MEAS:CURR?

10:30:23 : PS2 : Tried to read data....

10:30:23 : PS2 : SYST:ERR:ENAB

10:30:23 : PS2 : :VOLT 6

10:30:23 : PS2 : :CURR 0.4

10:30:23 : PS2 : :OUTP 1

10:30:24 : FPGA : Command - XBAND_LINK_TEST

10:30:41 : PS2 : :VOLT 0

10:30:41 : PS2 : :OUTP 0

10:30:41 : PS2 : INST:NSEL 03

10:30:41 : PS2 : :VOLT 0

10:30:41 : PS2 : :OUTP 0

10:30:41 : PS2 : INST:NSEL 02

10:30:41 : PS2 : :VOLT 0

10:30:41 : PS2 : :OUTP 0

10:30:41 : PS2 : INST:NSEL 04

10:30:41 : PS2 : :VOLT 0

10:30:41 : PS2 : :OUTP 0

10:30:46 : PS2 : SYST:ERR:ENAB

10:30:46 : PS2 : :VOLT 8

10:30:46 : PS2 : :CURR 0.2

10:30:46 : PS2 : :OUTP 1

10:30:47 : PS2 : :MEAS:CURR?

10:30:47 : PS2 : Tried to read data....

10:30:47 : PS2 : SYST:ERR:ENAB

10:30:47 : PS2 : :VOLT 6

10:30:47 : PS2 : :CURR 0.4

10:30:47 : PS2 : :OUTP 1

10:30:47 : FPGA : Command - XBAND_NORMAL

10:30:47 : PS2 : SYST:ERR:ENAB

10:30:47 : PS2 : :VOLT 6

10:30:47 : PS2 : :CURR 0.85

10:30:47 : PS2 : :OUTP 1

10:30:48 : PS2 : INST:NSEL 01

10:30:48 : PS2 : SYST:ERR:ENAB

10:30:48 : PS2 : :VOLT 8.35

10:30:48 : PS2 : :CURR 4.25

10:30:48 : PS2 : :OUTP 1

10:30:48 : FPGA : Command - FPGA_STOP_TRANSMIT

10:30:57 : PS2 : :VOLT 0

10:30:57 : PS2 : :OUTP 0

10:30:57 : PS2 : INST:NSEL 03

10:30:57 : PS2 : :VOLT 0

10:30:57 : PS2 : :OUTP 0

10:30:57 : PS2 : INST:NSEL 02

10:30:57 : PS2 : :VOLT 0

10:30:57 : PS2 : :OUTP 0