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  • SK - Shakeera: - Dual DLL Advantages

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    Sandeep Tatavarthi
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    The document describes a time-to-digital converter (TDC) circuit that uses a dual delay locked loop (DLL) structure with a linear feedback shift register (LFSR) counter for measurement range extension and differential delay cells for improved time resolution. The dual DLL structure and LFSR counter provide a high-level TDC circuit with strong noise immunity that can be used to detect fast and weak signals in applications like high energy physics experiments and photon time of flight measurements.

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    ARTICLE.465.pdf

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    The document describes a time-to-digital converter (TDC) circuit that uses a dual delay locked loop (DLL) structure with a linear feedback shift register (LFSR) counter for measurement range extension and differential delay cells for improved time resolution. The dual DLL structure and LFSR counter provide a high-level TDC circuit with strong noise immunity that can be used to detect fast and weak signals in applications like high energy physics experiments and photon time of flight measurements.

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    © All Rights Reserved
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    21 views1 page

    SK - Shakeera: - Dual DLL Advantages

    Uploaded by

    Sandeep Tatavarthi
    The document describes a time-to-digital converter (TDC) circuit that uses a dual delay locked loop (DLL) structure with a linear feedback shift register (LFSR) counter for measurement range extension and differential delay cells for improved time resolution. The dual DLL structure and LFSR counter provide a high-level TDC circuit with strong noise immunity that can be used to detect fast and weak signals in applications like high energy physics experiments and photon time of flight measurements.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Flag for inappropriate content
    Download as pdf or txt
    of 1

    TheTDC with 3 level conversion scheme

    based on dual DLL structure.


    The linear feedback shift register counter for
    measurement range extension and
    differential dealycells adopted for time
    resolution improvement.
    DLL is applied to Improve the stability of the
    multi-phase clock frequency

    THE TDC CIRCUIT CONSISTS OF

    • High level LFSR Counter


    • Dual DLL
    • Edge detector
    ADVANTAGES:
    • Low level TDC circuit The digital TDC consists of strong noise immunity capability and it can be
    used in various fast and weak signal detecting systems such as photon time of
    sight.

    APPLICATIONS:
    It is used in measurement events happen infrequently such as high energy
    physics experiments

    17VV5A0465
    SK.SHAKEERA

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