8 7 6 5 4 3 2 1

D6990
K9OI POWER SYSTEM ARCHITECTURE
ENABLE
PPDCIN_G3H
PPDCIN_S5_P3V42G3H
3.425V G3HOT SMC PWRGD
R6990 PM6640 PP3V42_G3H
SN0903048 SMC_RESET_L
U6990
(PAGE 63)
U5010
(PAGE 44)
SMC_PBUS_VSENSE

R7640
R5400
J6900 F7040

D PPBUS_G3H SMC_CPU_HI_ISENSE
PP5V_S0_CPUVCCIOS0
VCC 1.05V VOUT
A PPCPUVCCIO_S0 D
F6905
6A FUSE R7020 A CPUVCCIOS0_EN
ISL95870
U7600 SMC_CPU_FSB_ISENSE
AC DCIN(16.5V)
EN
TPS22924
ADAPTER A VIN
U7000
VOUT
PPVBAT_G3H (PAGE 70)
PGOOD
CPUVCCIOS0_PGOOD
U4202
(PAGE 38)
PP1V0_FW_FWPHY

IN ISL6259HRTZ SMC_CPU_VSENSE
SMC_DCIN_ISENSE
V EN

PBUS SUPPLY/ CPU VCORE

BATTERY CHARGER
R7050
A VIN
VOUT A PPVCORE_S0_CPU FW_PWR_EN

SMC_RESET_L ISL95231
SMC_BATT_ISENSE SMC_CPU_ISENSE SMC_GFX_VSENSE

(PAGE 64)
CPUIMVP7_VR_ON
VR_ON
U7400
V
J6950
Q7055
(PAGE 68)
VOUT A PPVCORE_S0_AXG

PPVBATT_G3H_CONN PPVBAT_G3H_CHGR_R
CPUIMVP_IMON
COUGAR-POINT
(9 TO 12.6V)

IMON PM_PWRBTN_L
(PCH) PWRBTN#
3S2P

SYS_RERST# PM_SYSRST_L
IMONG CPUIMVP_IMONG
CHGR_BGATE
RSMRST# PM_RSMRST_L
PGOOD CPUIMVP7_PGOOD
U1800
PGOODG CPUIMVP7_AXG_PGOOD
PM_PCH_PWRGD PLT_RERST_L
PLTRST#

C DDRREG_EN
VIN
1.5V
VLDOIN PROCPWRGD
CPU_PWRGD
C
PP1V5_S3 PM_MEM_PWRGD
S5 VOUT1 DRAMPWROK

SMC MEMVTT_EN
U2850 (PAGE 16~21)
S3 0.75V PP0V75_S0_DDRVTT
VOUT2

U4900
TPS51916 TP_DDRREG_PGOOD
RC P3V3S5_EN
P60 U7300 PGOOD
DELAY
SMC_PM_G2_EN (PAGE 67)
(PAGE 44)

SM_DRAMPWROK

PPVCCSA_S0_CPU CPU
R5410 PP5V_S0
VCC VOUT
U1000 UNCOREPWRGOOD
ISL95870A
PPBUS_S5_HS_OTHER_ISNS PVCCSA_EN U7100
COUGAR-POINT A EN

PGOOD
PVCCSA_PGOOD
(PAGE 9~13) RESET*
(PCH) (PAGE 65)

PM_SLP_S5_L PG 17
SLP_S5#(E4)
VIN
P5VS3_EN_L 5V PP5V_S3 Q7860
EN1 VOUT1
RC P5VS3_EN PG71 (L/H)
PP5V_S0
DELAY PP3V3_S5 PP3V3_S5
P3V3S5_EN_L 3.3V
EN2 VOUT2
(R/H)
PP3V3_S5_PWRCTL
RC DDRREG_EN PG71 PM_SLP_S3_L_R
TPS51125 Q7922
DELAY U7200 SMC
B U1800
P3V3S3_EN PG71 F9700
Q9706 (PAGE 66)
PGOOD
PP3V3_ENET
EN
BCM57765
U3900
PP1V2_ENET_PHY

U7980
ALL_SYS_PWRGD B
PWRGD(P12)
CAESAR IV
P5V3V3_PGOOD (PAGE 35)
RSMRST_PWRGD RSMRST_IN(P13)
PM_SLP_S3_L&&WOL_EN||SMC_ADAPTER_EN RSMRST_OUT(P15)
PM_RSMRST_L
PM_SLP_S4_L PG 17 LCD_BKLT_EN
SLP_S4#(H4) SMC_ONOFF_L 99ms DLY
PWR_BUTTON(P90) CPUIMVP_VR_ON
&& BKLT_PLT_RST_L PP1V05_S5 IMVP_VR_ON(P16)
TPS720105
PM_SLP_S3_L PG 17 VIN U7740
SLP_S3#(F4) SYSRST(PA2) PM_SYSRST_L
LP8550 (PAGE 71)

(PAGE 16~21) PPBUS_SW_LCDBKLT_PWR U9701 CPUVCCIOS0_PGOOD PM_PWRBTN_L

PPVOUT_SW_LCDBKLT P17(BTN_OUT)
EN
VOUT PVCCSA_PGOOD PM_SLP_S5_L
SLP_S5_L(P95)
(PAGE 77) Q7810 SMC_RESET_L
P1V8S0_PGOOD PM_SLP_S4_L RES*
R7978 PG71 PP3V3_S3 SLP_S4_L(P94)
P5V3V3_PGOOD PM_SLP_S3_L
SLP_S3_L(P93)
S0PGOOD_PWROK
Q4260
F4260 U4900
P3V3S3_EN
PPVP_FW PP3V3_S5_VMON (PAGE 43)

6
Q7830
PP3V3_S0
PM_SLP_S3_L_R PG71 PP3V3_S0 Q7970
PP3V3_S0 && FWPORT_PWR_EN VMON_Q2
PP1V5_S3RS0 ASMCC0179
VMON_Q3 4
Q3880
PM_SLP_S3_L_R
PP1V05_S0 VMON_Q4
P5VS0_EN MAX15053EWL
A DELAY
RC P1V8S0_EN PG71 P1V8_S0_EN
EN U7760
PP1V8_S0 (PAGE 73)
SYNC_MASTER=K17_REF SYNC_DATE=06/30/2009 A
(PAGE 71) PAGE TITLE
P3V3S0_EN T29_A_HV_EN Power Block Diagram
CPUVCCIOS0_EN PG71 DRAWING NUMBER SIZE
RC
DELAY
VIN
Apple Inc. D
PBUSVSENS_EN LT3957 FW_PWR_EN TPS22924
PP3V3_FW_FWPHY REVISION
EN U4201 R
U3890
(PAGE 40) NOTICE OF PROPRIETARY PROPERTY: BRANCH
VOUT PP24V_T29
(PAGE 36) THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
3 OF 109
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART SHEET
IV ALL RIGHTS RESERVED 3 OF 86
8 7 6 5 4 3 2 1
 8 7 6 5 4 3 2 1
NOTE: Unused pins have "SMC_Pxx" names. Unused
pins designed as outputs can be left floating,
those designated as inputs require pull-ups.
46 PP3V3_S5_AVREF_SMC
64 63 53 48 47 46 43 26 7 6 PP3V42_G3H
73

C4902 1 1 C4903 1 C4904 1 C4905 1 C4906

22UF 0.1UF 0.1UF 0.1UF 0.1UF
20% 20% 20% 20% 20%
6.3V 10V 10V 10V 10V
CERM 2 2 CERM 2 CERM 2 CERM 2 CERM
805 402 402 402 402

D R4999 PLACE_NEAR=U4900.M12:3mm
PLACE_NEAR=U4900.M12:3mm
SMC_VCL
PLACE_NEAR=U4900.E1:3mm
D
4.7
1 2 PP3V3_S5_SMC_AVCC
5%
MIN_LINE_WIDTH=0.25 MM C4907 1
MIN_NECK_WIDTH=0.1 MM 0.47UF

M12

H10

L11
1/16W VOLTAGE=3.3V

B1

M1

E1
MF-LF
402
C4920 1 10%
6.3V
2
0.1UF CERM-X5R
20% VCL AVREF 402

B12
U4900 L13
10V
CERM 2
AVCC VCC
46 TP_SMC_P10 P10 DF2117RVPLP20HV P60 SMC_PM_G2_EN OUT 6 73
402
U4900 R4909 1 1
R4901
TP_SMC_RSTGATE_L A13 K12 E5
46 OUT P11 TLP-145V P61 NC NC NC 10K 10K
A12 K11 DF2117RVPLP20HV 5% 5%
ALL_SYS_PWRGD P12 (1 OF 3) P62 1/16W 1/16W
73 26 23 IN NC TLP-145V MF-LF MF-LF
S5_PWRGD B13 J12
73 IN P13 OMIT P63 NC (3 OF 3) 402
2 2
402
D11 K13 SMC_ADAPTER_EN
NC P14 P64 OUT 17 46 73 D1
C13 J10 OMIT MD1 SMC_MD1 IN 6 47
PM_DSW_PWRGD P15 P65
17 OUT NC MD2 H1 SMC_KBC_MDE
SMC_DELAYED_PWRGD C12 J11 SMC_PROCHOT_3_3_L SMC_RESET_L D3
36 26 OUT P16 P66 IN 46 64 47 46 IN RES*
PM_PWRBTN_L D10 H12 SMC_BIL_BUTTON_L
23 17 OUT P17 P67 IN 6 46 63
A3
46 SMC_XTAL XTAL
TP_SMC_P20 D13 N10 SMC_CPU_VSENSE SMC_EXTAL A2 E3 SMC_NMI
46 P20 P70 IN 46 49 46 EXTAL NMI IN 47
E11 M11 SMC_CPU_ISENSE
NC P21 P71 IN 46 49
D12 L10 TP_SMC_ADC2
NC P22 P72 IN 46
F11 N11 TP_SMC_ADC3
NC P23 P73 IN 46
H3
E13 N12 ETRST* SMC_TRST_L IN 6 47
46 TP_SMC_P24 P24 P74 SMC_GFX_VSENSE IN 46 49
E12 M13 L9
NO STUFF
P25 P75 SMC_GFX_ISENSE AVSS
NC IN 46 49
1 1 1
50 46 SMC_BMON_MUX_SEL F13
P26 P76 N13 TP_SMC_P1V5S3_ISENSE IN 46
VSS R4902 R4998 R4903
E10 L12 10K 10K 0
P27 P77 SMC_CPUVCCIO_ISENSE 46 49 5% 5% 5%
NC IN

D2

L3

F10

B11

C5
1/16W 1/16W 1/16W
LPC_AD<0> A9 A7 SMC_SCI_L
XW4900 MF-LF MF-LF MF-LF
81 47 16 6 BI P30 P80 OUT 16 19 SM 2 402 2 402 2 402
LPC_AD<1> D9 B6 2 1
81 47 16 6 BI P31 P81 NC
LPC_AD<2> C8 C7 PM_CLKRUN_L
81 47 16 6 BI P32 P82 OUT 6 17 47

C 81 47 16 6

81 47 16 6
BI
IN
LPC_AD<3>
LPC_FRAME_L
B7

A8
P33
P34
P83
P84
D5

A6
LPC_PWRDWN_L
SMC_TX_L
IN
OUT
6 17 47

6 43 45 46 47
PLACE_NEAR=U4900.L3:4mm
C
SMC_LRESET_L D8 B5 SMC_RX_L
26 IN P35 P85 IN 6 43 45 46 47
D7 C6
GND_SMC_AVSS 46 49 50
81 26 IN LPC_CLK33M_SMC P36 P86 (OC) SMBUS_SMC_MGMT_SCL BI 48 84

LPC_SERIRQ D6
47 16 6 BI P37 J4
P90 SMC_ONOFF_L IN 46 53
D4 G3 SMC_BC_ACOK
NC P40 P91 IN 46 49 63 64

TP_SMC_P41 A5 H2 SMC_PME_S4_WAKE_L
46 P41 P92 IN 46 53

SMBUS_SMC_MGMT_SDA B4 G1 PM_SLP_S3_L
84 48 BI (OC) P42 P93 IN 6 17 30 73

TP_SMC_P43 A1 H4 PM_SLP_S4_L
46 P43 P94 IN 6 17 30 73
C2 G4 PM_SLP_S5_L
NC P44 P95 IN 17 73
B2 F4 SMC_CLK32K
NC P45 P96 IN 46

TP_SMC_GFX_THROTTLE_L C1 F1 SMBUS_SMC_0_S0_SDA
46 OUT P46 P97 (OC) BI 6 32 48 51 84

SMC_SYS_KBDLED C3
54 OUT P47
SMC_TX_L G2
47 46 45 43 6 OUT P50
SMC_RX_L F3
47 46 45 43 6 IN P51
SMBUS_SMC_0_S0_SCL E4
84 51 48 32 6 BI (OC) P52

N3
U4900 K1
SMC_PA0_PU (OC) PA0 PE0 SMC_CASE_OPEN
46
DF2117RVPLP20HV IN 46

SPI_DESCRIPTOR_OVERRIDE_L N1 J3 SMC_TCK
16 OUT (OC) PA1 TLP-145V PE1 IN 6 46 47

PM_SYSRST_L M3 K2 SMC_TDI
26 17 OUT (OC) PA2 (2 OF 3) PE2 IN 6 46 47

USB_DEBUGPRT_EN_L M2 J1 SMC_TDO
43 OUT (OC) PA3 OMIT PE3 OUT 6 46 47

MEM_EVENT_L N2 K4 SMC_TMS
29 27 BI (OC) PA4 PE4 IN 6 46 47

B 46 32

63
BI
BI
WIFI_EVENT_L
SYS_ONEWIRE
(OC)
(OC)
L1

K3
PA5
PA6
PF0 K5

N5
G3_POWERON_L IN 46
B
L2 PF1 SMC_SYS_LED OUT 46
73 46 OUT SMC_BATLOW_L (OC) PA7 M6
PF2 SMC_LID IN 46 53 63
B8 L5
NC PB0 PF3 NC
SMC_RUNTIME_SCI_L C9 M5
46 19 OUT PB1 PF4 NC
SMC_ODD_DETECT B9 N4 TP_SMC_PF5
42 6 IN PB2 PF5 46

SMC_S4_WAKESRC_EN A10 L4
76 73 46 8 OUT PB3 PF6 NC
SMC_PB4 C10 M4
46 PB4 PF7 NC
B10
NC PB5 M8
C11 PG0 NC
46 IN SMC_DP_HPD_L PB6 N7
A11 PG1 SMS_INT_L IN 46 55 NOTE: SMS Interrupt can be active high or low, rename net accordingly.
46 IN SMC_GFX_OVERTEMP_L PB7 K8
PG2 (OC) SMBUS_SMC_BSA_SDA BI 6 48 63 64 84 If SMS interrupt is not used, pull up to SMC rail.
SMC_FAN_0_CTL G11 K7 SMBUS_SMC_BSA_SCL
52 OUT PC0 PG3 (OC) BI 6 48 63 64 84

NC_SMC_FAN_1_CTL G13 K6 SMBUS_SMC_A_S3_SDA

46 OUT PC1 PG4 (OC) BI 6 32 48 54 55 84

NC_SMC_FAN_2_CTL F12 N6 SMBUS_SMC_A_S3_SCL

46 OUT PC2 PG5 (OC) BI 6 32 48 54 55 84

NC_SMC_FAN_3_CTL H13 M7 SMBUS_SMC_B_S0_SDA

46 OUT PC3 PG6 (OC) BI 48 51 84

SMC_FAN_0_TACH G10 L6 SMBUS_SMC_B_S0_SCL

52 IN PC4 PG7 (OC) BI 48 51 84

NC_SMC_FAN_1_TACH G12
46 IN PC5 E2
H11 PH0 SMC_PROCHOT OUT 46
46 IN NC_SMC_FAN_2_TACH PC6 F2
J13 PH1 SMC_THRMTRIP OUT 46
NC_SMC_FAN_3_TACH PC7
46 IN
PH2 J2 R4910
NC 43
TP_SMC_SA_ISENSE M10 A4 CPU_PECI_R CPU_PECI
46 IN PD0 PECI/PH3 1 2 10 19 78

SMC_DCIN_VSENSE N9 B3 PVCCIO_S0_SMC_R
49 46 IN PD1 PEVREF/PH4 5%
1/16W
SMC_DCIN_ISENSE K10 C4 PM_PECI_PWRGD_R
50 46 IN PD2 PEVSTP/PH5 MF-LF
402
SMC_PBUS_VSENSE L8
49 46 IN PD3
50 46 IN SMC_BMON_ISENSE M9
PD4 R4911
N8 0
SMC_CPU_HI_ISENSE C4910 1 PP1V05_S0
A 50 46

46
IN
IN TP_SMC_ADC14 K9
PD5
PD6 0.1UF
20%
1

5%
1/16W
2 6 7 9 10 12 14 16 17 20 22 23
36 40 68 70 73
SYNC_MASTER=LINDA_K90I SYNC_DATE=07/07/2010 A
50 46 SMC_OTHER_HI_ISENSE L7
PD7 10V
2 MF-LF PAGE TITLE
IN CERM 402
402
SMC
R4912 DRAWING NUMBER SIZE
0
1 2 PM_PECI_PWRGD 73
Apple Inc. D
5% REVISION
1/16W R
MF-LF
402
NOTICE OF PROPRIETARY PROPERTY: BRANCH
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
49 OF 109
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART SHEET
IV ALL RIGHTS RESERVED 45 OF 86
8 7 6 5 4 3 2 1
 8 7 6 5 4 3 2 1
NC_SMC_FAN_2_CTL NC_SMC_FAN_2_CTL
SMC Reset "Button", Supervisor & AVREF Supply 46 45
MAKE_BASE=TRUE
45 46
SMC FSB to 3.3V Level Shifting
46 45 NC_SMC_FAN_2_TACH NC_SMC_FAN_2_TACH 45 46
MAKE_BASE=TRUE 72 71 62 61 57 54 52 51 50 49
53 48 47 46 45 43 26 7 6 PP3V42_G3H 23 22 20 19 18 17 16 12 8 7 6 PP3V3_S0
73 64 63 46 45 NC_SMC_FAN_3_CTL NC_SMC_FAN_3_CTL 45 46 48 42 41 40 37 36 33 29 27 26
53 48 47 46 45 43 26 7 6 PP3V42_G3H MAKE_BASE=TRUE
85 77 75 74 73
73 64 63
Desktops: 5V 46 45 NC_SMC_FAN_3_TACH NC_SMC_FAN_3_TACH 45 46
MAKE_BASE=TRUE
Mobiles: 3.42V 1 1
64 63 49 46 45 SMC_BC_ACOK SMC_BC_ACOK 45 46 49 63 64
R5061 R5060
1 100K 10K
R5000 MAKE_BASE=TRUE

3
C5020 1
SMS_INT_L SMS_INT_L
5% 5%
0.47UF V+ VIN 100K 55 46 45 45 46 55 1/16W 1/16W
5% MAKE_BASE=TRUE MF-LF MF-LF
10%
6.3V U5010 1/16W 2 402 2 402 TO SMC
CERM-X5R 2 MF-LF 49 46 45 SMC_CPU_VSENSE SMC_CPU_VSENSE 45 46 49
402 VREF-3.3V-VDET-3.0V 2
402 MAKE_BASE=TRUE
SMC_PROCHOT_3_3_L OUT 45
DFN SMC_CPU_ISENSE SMC_CPU_ISENSE

D 53

53 46 45
IN
IN
SMC_TPAD_RST_L
SMC_ONOFF_L
6

7
MR1*
MR2*
(IPU)
SN0903048
(IPU)
RESET* 5 SMC_RESET_L OUT 45 47 64
49 46 45
MAKE_BASE=TRUE
45 46 49

6
D
PP3V3_S5_AVREF_SMC 45
MIN_LINE_WIDTH=0.4 mm
SMC_MANUAL_RST_L 4
DELAY REFOUT 8
MIN_NECK_WIDTH=0.1 mm D Q5060
VOLTAGE=3.3V
OMIT THRM DMB53D0UV
GND PAD 49 46 45 SMC_GFX_VSENSE SMC_GFX_VSENSE 45 46 49
1 SOT-563
R5001 C5001 1
MAKE_BASE=TRUE
CPU_PROCHOT_BUF 2 G
2

9
0 0.01UF C5025 1 1
C5026 49 46 45 SMC_GFX_ISENSE SMC_GFX_ISENSE 45 46 49
5%
10% 10uF 0.01UF MAKE_BASE=TRUE confirm if K90 needs Isense on DDR rail
1/10W 16V 20% 10% TP_SMC_P1V5S3_ISENSE TP_SMC_P1V5S3_ISENSE
MF-LF CERM 2 6.3V 16V 46 45 45 46 TO CPU R5062 3
603 402 X5R 2 2 CERM MAKE_BASE=TRUE
2
SILK_PART=SMC_RST 603 402 SMC_CPUVCCIO_ISENSE SMC_CPUVCCIO_ISENSE CPU_PROCHOT_L 1
3.3K
2 CPU_PROCHOT_L_R 5 Q5060 S
49 46 45 45 46 49 78 68 10 BI
MAKE_BASE=TRUE DMB53D0UV
5% 1
SOT-563
PLACEMENT_NOTE=Place R5001 on BOTTOM side GND_SMC_AVSS 45 49 50 46 45 TP_SMC_SA_ISENSE TP_SMC_SA_ISENSE 45 46 1/16W
MIN_LINE_WIDTH=0.4 mm MAKE_BASE=TRUE MF-LF 4
MIN_NECK_WIDTH=0.1 mm 402
MR1* and MR2* must both be low to cause manual reset. VOLTAGE=0V 49 46 45 SMC_DCIN_VSENSE SMC_DCIN_VSENSE 45 46 49 6 D
MAKE_BASE=TRUE Q5059
Used on mobiles to support SMC reset via keyboard. SSM6N37FEAPE
50 46 45 SMC_DCIN_ISENSE SMC_DCIN_ISENSE 45 46 50
MAKE_BASE=TRUE SOT563
NOTE: Internal pull-ups are to VIN, not V+.
49 46 45 SMC_PBUS_VSENSE SMC_PBUS_VSENSE 45 46 49
MAKE_BASE=TRUE

50 46 45 SMC_BMON_ISENSE SMC_BMON_ISENSE 45 46 50 S G 2
MAKE_BASE=TRUE 1

50 46 45 SMC_CPU_HI_ISENSE SMC_CPU_HI_ISENSE 45 46 50 SMC_PROCHOT IN 45

MAKE_BASE=TRUE

19 OUT PM_THRMTRIP_L_R
50 46 45 SMC_OTHER_HI_ISENSE SMC_OTHER_HI_ISENSE 45 46 50
MAKE_BASE=TRUE

46 45 TP_SMC_P10 TP_SMC_P10 45 46 3 D Q5059

Debug Power "Buttons" 46 45 TP_SMC_P20
MAKE_BASE=TRUE
TP_SMC_P20 45 46 SSM6N37FEAPE
MAKE_BASE=TRUE SOT563

SMC_ONOFF_L OUT 45 46 53 46 45 TP_SMC_P24 TP_SMC_P24 45 46

MAKE_BASE=TRUE
OMIT OMIT
C PLACE_SIDE=BOTTOM
R5016
0
1 1
R5015
0 PLACE_SIDE=TOP
50 46 45

46 45
SMC_BMON_MUX_SEL

TP_SMC_P41
SMC_BMON_MUX_SEL
MAKE_BASE=TRUE
TP_SMC_P41
45 46 50

45 46
4 S G 5

SMC_THRMTRIP 45
C
IN
5% 5% MAKE_BASE=TRUE
1/10W 1/10W
MF-LF MF-LF 46 45 TP_SMC_P43 TP_SMC_P43 45 46
603 603 MAKE_BASE=TRUE
2 2
SILK_PART=PWR_BTN SILK_PART=PWR_BTN 46 45 TP_SMC_PF5 TP_SMC_PF5 45 46
MAKE_BASE=TRUE

46 45 TP_SMC_RSTGATE_L TP_SMC_RSTGATE_L 45 46
MAKE_BASE=TRUE

63 53 48 47 46 45 43 26 7 6 PP3V42_G3H
73 64
R5012
PLACE_NEAR=U1800.N14:5.1mm 22
17 IN PM_CLK32K_SUSCLK_R 1 2 SMC_CLK32K OUT 45 53 46 45 SMC_ONOFF_L R5070 10K 1 2
5% 1/16W MF-LF 402
5% 45 G3_POWERON_L R5072 10K 1 2
1/16W 5% 1/16W MF-LF 402
MF-LF 63 53 45 SMC_LID R5071 100K 1 2
402 5% 1/16W MF-LF 402
47 45 43 6 SMC_TX_L R5073 10K 1 2
5% 1/16W MF-LF 402
47 45 43 6 SMC_RX_L R5074 100K 1 2
5% 1/16W MF-LF 402

PP3V3_S4 7 46 53 54 72 47 45 6 SMC_TMS R5077 10K 1 2

5% 1/16W MF-LF 402
47 45 6 SMC_TDO R5078 10K 1 2
5% 1/16W MF-LF 402
1
R5020 SMC_TDI R5079 10K 1 2
SMC Crystal Circuit 100K
47 45 6

47 45 6 SMC_TCK R5080 10K 1 2

5% 1/16W MF-LF 402

5% 5% 1/16W MF-LF 402

C5010 1/16W 63 45 6 SMC_BIL_BUTTON_L R5081 10K 1 2
R5010 15pF
MF-LF
PP3V3_S4 SMC_BC_ACOK R5087 470K 1 2
5% 1/16W MF-LF 402
0 2 402 7 46 53 54 72 64 63 49 46 45
5% 1/16W MF-LF 402
45 SMC_XTAL 1 2 SMC_XTAL_R 1 2 55 46 45 SMS_INT_L R5093 10K 1 2 NOSTUFF
NO STUFF SMC_DP_HPD_L OUT 45 5% 1/16W MF-LF 402
5% 1
1 1/16W CRITICAL 5% R5076
R5011 MF-LF 1
50V
Q5020 100K
1M 402 Y5010 CERM
402 D 3 5%
SMC_PA0_PU R5091 100K 1 2
SSM3K15FV 1/16W
B 2
5%
1/16W
MF-LF
402
20.00MHZ
5X3.2-SM
2
C5011
SOD-VESM-HF
2
MF-LF
402
45

45 19 SMC_RUNTIME_SCI_L R5094 100K 1 2

5%

5%
1/16W

1/16W
MF-LF

MF-LF
402

402
B
15pF NOSTUFF
53 46 45 IN SMC_PME_S4_WAKE_L SMC_PME_S4_WAKE_L OUT 45 46 53
SMC_EXTAL 1 2
45 MAKE_BASE=TRUE

5%
1 G S 2
50V
CERM
73 45 17 SMC_ADAPTER_EN R5085 10K 1 2
75 DP_A_EXT_HPD 5% 1/16W MF-LF 402
402 IN
45 SMC_CASE_OPEN R5086 10K 1 2
5% 1/16W MF-LF 402

45 SMC_PB4 R5088 10K 1 2

5% 1/16W MF-LF 402
SMC_S4_WAKESRC_EN R5090 100K 1 2
System (Sleep) LED Circuit 76 73 45 8
5% 1/16W MF-LF 402

60 59 57 44
7 6 PP5V_S3
43 42 32 30
72 67 66 61

R5031
523
1%
1 1

1%
R5030
20
BATLOW# Isolation 45 32 WIFI_EVENT_L R5089 10K 1
32 6

2
PP3V3_WLAN

1/16W 1/16W 5% 1/16W MF-LF 402

MF-LF MF-LF
402 2 2 402
30 26 24 23 22 20 19 17 8 7 6
85 76 74 73 72 66 56
PP3V3_S5 PP3V3_SUS 7 16 17 18 19 20 22 71 72 73

SYS_LED_ILIM

CRITICAL
SYS_LED_L_VDIV R50401 Below connections are different from K91
100K Q5040
5% 1
1/20W
MF
SSM3K15FV
G

R5032 1 201 2 SOD-VESM-HF 46 45 NC_SMC_FAN_1_CTL NC_SMC_FAN_1_CTL

MAKE_BASE=TRUE
45 46

1.47K 6 5 4 CRITICAL
NC_SMC_FAN_1_TACH NC_SMC_FAN_1_TACH
A 1% 46 45 45 46

A
D

1/16W
D B E Q5030 73 45 IN SMC_BATLOW_L PM_BATLOW_L OUT 17 MAKE_BASE=TRUE
MF-LF 3 2 SYNC_MASTER=LINDA_K90I SYNC_DATE=07/08/2010
402 2 DMB54D0UV 46 45 TP_SMC_ADC2 TP_SMC_ADC2 45 46
PAGE TITLE
MAKE_BASE=TRUE
SOT-563

SYS_LED_L R5041 46 45 TP_SMC_ADC3 TP_SMC_ADC3

MAKE_BASE=TRUE
45 46 SMC Support
1
0 2 TP_SMC_ADC14 TP_SMC_ADC14
DRAWING NUMBER SIZE
Q2
Q1
5% NOSTUFF
46 45
MAKE_BASE=TRUE
45 46

Apple Inc. D
1/16W 46 45 TP_SMC_GFX_THROTTLE_L TP_SMC_GFX_THROTTLE_L 45 46 REVISION
MF-LF MAKE_BASE=TRUE R
S G C 402
63 53 48 47 46 45 43 26 7 6 PP3V42_G3H
1 2 3 73 64 NOTICE OF PROPRIETARY PROPERTY: BRANCH
Internal 20K pull-up on PM_BATLOW_L in PCH.
THE INFORMATION CONTAINED HEREIN IS THE
45 SMC_GFX_OVERTEMP_L R5095 10K 1 2 PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.
5% 1/16W MF-LF 402 THE POSESSOR AGREES TO THE FOLLOWING: PAGE

45 SMC_SYS_LED SYS_LED_ANODE 42
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
50 OF 109
IN OUT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART SHEET
IV ALL RIGHTS RESERVED 46 OF 86
8 7 6 5 4 3 2 1
 8 7 6 5 4 3 2 1

D D
LPC+SPI Connector
CRITICAL
LPCPLUS
J5100
55909-0374
M-ST-SM
PP3V42_G3H 31 32
64 63 53 48 46 45 43 26 7 6
73
72 70 68 65 54 52 42 22 7 6 PP5V_S0
77 73
1 2 LPC_CLK33M_LPCPLUS IN 6 26 81

81 45 16 6 BI LPC_AD<0> 3 4 LPC_AD<2> BI 6 16 45 81

81 45 16 6 BI LPC_AD<1> 5 6 LPC_AD<3> BI 6 16 45 81
7 8

47 6 IN SPI_ALT_MOSI 9 10 SPIROM_USE_MLB OUT 6 19 56

47 6 OUT SPI_ALT_MISO 11 12 SPI_ALT_CLK IN 6 47

LPC_FRAME_L 13 14 SPI_ALT_CS_L
81 45 16 6 IN IN 6 47

45 17 6 OUT PM_CLKRUN_L 15 16 LPC_SERIRQ BI 6 16 45

46 45 6 OUT SMC_TMS 17 18 LPC_PWRDWN_L IN 6 17 45

LPCPLUS_RESET_L 19 20 SMC_TDI
81 26 6 IN OUT 6 45 46

46 45 6 OUT SMC_TDO 21 22 SMC_TCK OUT 6 45 46

45 6 IN SMC_TRST_L 23 24 SMC_RESET_L OUT 45 46 64

45 6 OUT SMC_MD1 25 26 SMC_NMI OUT 45

46 45 43 6 IN SMC_TX_L 27 28 SMC_RX_L OUT 6 43 45 46

29 30 LPCPLUS_GPIO OUT 6 19

C 33 34 C

516S0573

SPI Bus Series Termination

SPI_ALT_MISO 6 47

SPI_ALT_MOSI 6 47

SPI_ALT_CLK 6 47

SPI_ALT_CS_L 6 47

LPCPLUS LPCPLUS LPCPLUS LPCPLUS

1 1 1 1
R5128 R5127 R5126 R5125 PLACE_NEAR=J5100.14:5mm
0 47 47 47 PLACE_NEAR=J5100.12:5mm
5% 5% 5% 5% PLACE_NEAR=J5100.9:5mm
1/16W 1/16W 1/16W 1/16W PLACE_NEAR=J5100.11:5mm
MF-LF MF-LF MF-LF MF-LF
402 402 402 402
2 2 2 2

PLACE_NEAR=U1800.Y14:5mm R5110 R5120

15 47
81 16 IN SPI_CS0_R_L 1 2 81 SPI_CS0_L 1 2 SPI_MLB_CS_L OUT 56

5% 5% PLACE_NEAR=R5125.2:5mm
1/16W 1/16W

B PLACE_NEAR=U1800.T3:5mm R5111
15
MF-LF
402 R5121
47
MF-LF
402 B
81 16 IN SPI_CLK_R 1 2 81 SPI_CLK 1 2 SPI_MLB_CLK OUT 56

5% 5% PLACE_NEAR=R5126.2:5mm
1/16W 1/16W
PLACE_NEAR=U1800.V4:5mm MF-LF MF-LF
R5112 402 R5122 402
15 47
81 16 IN SPI_MOSI_R 1 2 81 SPI_MOSI 1 2 SPI_MLB_MOSI OUT 56

5% 5% PLACE_NEAR=R5127.2:5mm
1/16W 1/16W
MF-LF MF-LF
402 R5123 402
15
81 16 OUT SPI_MISO 1 2 SPI_MLB_MISO IN 56

5% PLACE_NEAR=U6100.2:5mm
1/16W
MF-LF
402

A SYNC_MASTER=K91_MLB SYNC_DATE=05/15/2010 A
PAGE TITLE

LPC+SPI Debug Connector

DRAWING NUMBER SIZE

Apple Inc. D
REVISION
R

NOTICE OF PROPRIETARY PROPERTY: BRANCH

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
51 OF 109
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART SHEET
IV ALL RIGHTS RESERVED 47 OF 86
8 7 6 5 4 3 2 1
 8 7 6 5 4 3 2 1
PCH SMBus "0" Connections SMC "0" SMBus Connections SMC "Battery A" SMBus Connections
62 61 57 54 52 51 50 49 48 62 61 57 54 52 51 50 49 48
23 22 20 19 18 17 16 12 8 7 6 PP3V3_S0 23 22 20 19 18 17 16 12 8 7 6 PP3V3_S0 64 63 53 47 46 45 43 26 7 6 PP3V42_G3H
46 42 41 40 37 36 33 29 27 26 46 42 41 40 37 36 33 29 27 26 73
85 77 75 74 73 72 71 85 77 75 74 73 72 71

Cougar-Point R5200 1 1
R5201 SO-DIMM "A" SMC R5250 1 1
R5251 SMC R5280 1 1
R5281 Battery Charger
1K 1K 4.7K 4.7K 2.0K 2.0K
5% 5% J2900 5% 5% 5% 5%
U1800 1/16W 1/16W U4900 1/16W 1/16W U4900 1/16W 1/16W ISL6258 - U7000
MF-LF MF-LF (Write: 0xA0 Read: 0xA1) MF-LF MF-LF MF-LF MF-LF
(MASTER) 402 2 2 402 (MASTER) 402 2 2 402 (MASTER) 402
2 2
402 (Write: 0x12 Read: 0x13)
81 77 48 62 77
SMBUS_PCH_CLK SMBUS_PCH_CLK SMBUS_SMC_0_S0_SCL SMBUS_SMC_0_S0_SCL SMBUS_SMC_BSA_SCL SMBUS_SMC_BSA_SCL SMBUS_SMC_BSA_SCL

D
29 27 23 16
62 48 42 31 MAKE_BASE=TRUE
81 77
29 27 23 16 SMBUS_PCH_DATA SMBUS_PCH_DATA
16
29
81
48
16
23 27
31 42
62 77
23 27
48 45 32 6
84 51

48 45 32 6 SMBUS_SMC_0_S0_SDA
MAKE_BASE=TRUE
SMBUS_SMC_0_S0_SDA
63 48 45 6
84 64

63 48 45 6 SMBUS_SMC_BSA_SDA
MAKE_BASE=TRUE
SMBUS_SMC_BSA_SDA SMBUS_SMC_BSA_SDA
6 45 48
63 64 84

6 45 48
D
62 48 42 31 MAKE_BASE=TRUE 29 31 42 84 51 MAKE_BASE=TRUE 84 64 MAKE_BASE=TRUE 63 64 84
81

T29 Temp
VRef DACs SO-DIMM "B" EMC1414-A: U5520 Battery
J3100 (Write: 0x98 Read: 0x99)
U3300 J6955
(Write: 0xA4 Read: 0xA5)
SMBUS_SMC_0_S0_SCL 84 Battery
(Write: 0x98 Read: 0x99) 6 32
45 48 51
(See Table)
77 62 48 48 62 77 84 Battery Manager - (Write: 0x16 Read: 0x17)
27 23 16 SMBUS_PCH_CLK SMBUS_PCH_CLK 16 23 27 SMBUS_SMC_0_S0_SDA 6 32 SMBUS_SMC_BSA_SCL 6 45 48
42 31 29
81
29 31 42
81
45 48 51 Battery LED Driver - (Write: 0x36 Read: 0x37) 63 64 84
77 62 48 48 62 77
27 23 16 SMBUS_PCH_DATA SMBUS_PCH_DATA 16 23 27 Battery Temp - (Write: 0x90 Read: 0x91) SMBUS_SMC_BSA_SDA 6 45 48
42 31 29 29 31 42 63 64 84
81 81

Margin Control LED BACKLIGHT X19

U9701
U3301
(WRITE: 0x58 READ: 0x59)
SMC "Management" SMBus Connections
(Write: 0x30 Read: 0x31) (Write: 0x90 Read: 0x91)
77 62 48 48 62 77 84
27 23 16 SMBUS_PCH_CLK SMBUS_PCH_CLK 16 23 27 SMBUS_SMC_0_S0_SCL 6 32 48 33 32 31 30 26 24 18 8 7 6 PP3V3_S3
42 31 29 29 31 42 45 48 51 73 72 55 54 50
81 81
77 62 48 48 62 77 84
27 23 16 SMBUS_PCH_DATA SMBUS_PCH_DATA 16 23 27 SMBUS_SMC_0_S0_SDA 6 32
42 31 29 29 31 42 45 48 51
81 81

SMC R5290 1 1
R5291
4.7K 4.7K
5% 5%
U4900 1/16W 1/16W
Mikey (MASTER)
MF-LF
402 2
MF-LF
2 402
U6800 84 48
84 48 45 SMBUS_SMC_MGMT_SCL 45 SMBUS_SMC_MGMT_SCL
C XDP Connectors
(Write: 0x72 Read: 0x73)
SMBUS_PCH_CLK 48
16
62 77
23 27 SMC "A" SMBus Connections 84 48 45 SMBUS_SMC_MGMT_SDA 84 48
45
MAKE_BASE=TRUE
SMBUS_SMC_MGMT_SDA
MAKE_BASE=TRUE
C
J2600 & J2650 29
81
31 42
48 62 77 NOTE: SMC RMT bus remains powered and may be active in S3 state
(MASTER) SMBUS_PCH_DATA 16 23 27
29 31 42
81 77
81
48 33 32 31 30 26 24 18 8 7 6 PP3V3_S3
29 27 23 16 SMBUS_PCH_CLK 73 72 55 54 50
62 48 42 31
81 77
29 27 23 16 SMBUS_PCH_DATA
62 48 42 31
SATA_Redriver
SMC R5270 1 1
R5271 Trackpad
1K 1K
U4510 5% 5%
U4900 1/16W 1/16W J5800
(Write: 0xB6 Read: 0xB7) MF-LF MF-LF
(MASTER) 402 2 2 402 (Write: 0x90 Read: 0x91)
48 62 77
SMBUS_PCH_CLK 16 23 27 55 84
29 31 42
81 48 45 32 6 SMBUS_SMC_A_S3_SCL SMBUS_SMC_A_S3_SCL SMBUS_SMC_A_S3_SCL 6 32
84 55 54 MAKE_BASE=TRUE 45 48 54
48 62 77
SMBUS_PCH_DATA 16 23 27 55 84
29 31 42 48 45 32 6 SMBUS_SMC_A_S3_SDA SMBUS_SMC_A_S3_SDA SMBUS_SMC_A_S3_SDA 6 32
81 84 55 54 MAKE_BASE=TRUE 45 48 54
T29 I2C Connections
ALS
71 62 61 57 54 52 51 50 49 48
23 22 20 19 18 17 16 12 8 7 6 PP3V3_S0
J3402 46 42 41 40 37 36 33 29 27 26
85 77 75 74 73 72
(Write: 0x72 Read: 0x73) Microcontroller abstracts
55 84 1 1 actual CDR(s) in plug.
SMBUS_SMC_A_S3_SCL 6 32 R5230 R5231
45 48 54
4.7K 4.7K
SMBUS_SMC_A_S3_SDA 55 84
6 32
45 48 54
T29 IC 5%
1/16W
5%
1/16W
T29 Plug uC
U3600 MF-LF MF-LF J9400
402 402
2 2
(MASTER) (Write: 0xA0 Read: 0xA1)

B PCH "SMLink 0" Connections Digital SMS 83 75 48 34 I2C_T29_SDA

MAKE_BASE=TRUE
I2C_T29_SDA 75
34
48
83
75
B
LIS331DLH: U5920 83 75 48 34 I2C_T29_SCL I2C_T29_SCL 34
MAKE_BASE=TRUE 48
83
62 61 57 54 52 51 50 49 48 (Write: 0x30 Read: 0x31)
23 22 20 19 18 17 16 12 8 7 6 PP3V3_S0
46 42 41 40 37 36 33 29 27 26
55 84
85 77 75 74 73 72 71 SMBUS_SMC_A_S3_SCL 6 32
45 48 54
SDRVI2C:MCU SDRVI2C:MCU
SMBUS_SMC_A_S3_SDA 55 84
6 32
R52341 1
R5235
R5210 1 1
R5211 45 48 54 0 0
Cougar-Point 8.2K 8.2K
5% 5%
1/20W 1/20W
5% 5% MF MF
U1800 1/16W 1/16W 201 2 2 201
MF-LF MF-LF
(MASTER) 402 2 2 402
For Compliance Testing
81 16 SML_PCH_0_CLK SDRVI2C:SB
MAKE_BASE=TRUE
R5236 0 1 2 75 48 I2C_DPSDRVA_SCL DP Re-driver
81 16 SML_PCH_0_DATA 5% 1/20W MAKE_BASE=TRUE U9310
MAKE_BASE=TRUE MF 201
(Write: 0x94 Read: 0x95)
SDRVI2C:SB
SMC "B" SMBus Connections R5237 0 1 2 75 48 I2C_DPSDRVA_SDA
5% 1/20W MAKE_BASE=TRUE
MF 201 I2C_DPSDRVA_SCL 48
75
62 61 57 54 52 51 50 49 48
23 22 20 19 18 17 16 12 8 7 6 PP3V3_S0
46 42 41 40 37 36 33 29 27 26
85 77 75 74 73 72 71
I2C_DPSDRVA_SDA 48
75
PCH "SMLink 1" Connections
62 61 57 54 52 51 50 49 48 SMC R5260 1 1
R5261 CPU Temp
23 22 20 19 18 17 16 12 8 7 6 PP3V3_S0 4.7K 4.7K
46 42 41 40 37 36 33 29 27 26 5% 5%
85 77 75 74 73 72 71
U4900 1/16W 1/16W EMC1414-A: U5570
MF-LF MF-LF
NO STUFF NO STUFF (MASTER) 402
2 2
402 (Write: 0x98 Read: 0x99)
1 1
Cougar-Point R5220 R5221 84 51 48 45 SMBUS_SMC_B_S0_SCL
84 51 48
45 SMBUS_SMC_B_S0_SCL SMBUS_SMC_B_S0_SCL 45 48 51
8.2K 8.2K R5223 MAKE_BASE=TRUE 84
5% 5% 84 51 48
SMBUS_SMC_B_S0_SDA SMBUS_SMC_B_S0_SDA SMBUS_SMC_B_S0_SDA
A U1800
(Write: 0x88 Read: 0x89)
1/16W
MF-LF
402 2
1/16W
MF-LF
2 402
0
5%
1/16W
MF-LF
84 51 48 45 45
MAKE_BASE=TRUE
45 48 51
84
SYNC_MASTER=K91_MLB SYNC_DATE=05/26/2010 A
402 PAGE TITLE
SML_PCH_1_CLK 1 2
81 16
MAKE_BASE=TRUE SMBus Connections
81 16 SML_PCH_1_DATA 1 2 DRAWING NUMBER SIZE
MAKE_BASE=TRUE
R5222 Apple Inc. D
0 REVISION
5% R
1/16W
MF-LF
SMLink 1 is slave port to 402 NOTICE OF PROPRIETARY PROPERTY: BRANCH
THE INFORMATION CONTAINED HEREIN IS THE
access PCH & CPU via PECI. PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
52 OF 109
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART SHEET
IV ALL RIGHTS RESERVED 48 OF 86
8 7 6 5 4 3 2 1
 8 7 6 5 4 3 2 1

PBUS Voltage Sense Enable & Filter CPU VCore Load Side Current Sense / Filter
IMVPISNS_ENG 54 85 77
52 51 50 49 48 46 42 41 40
PP3V3_S0 IMVPISNS_ENG
20 19 18 17 16 12 8 7 6

Q5300 PLACE_NEAR=R7510.4:5MM R5346 37 36 33 29 27 26 23 22

75 74 73 72 71 62 61 57
PLACE_NEAR=U5340.5:3MM
NTUD3169CZ CPUIMVP_ISNS1_P 1
4.42K2 1 C5340
SOT-963 85 69 68 IN 0.1UF
N-CHANNEL 0.1% 20%
6 PBUSVSENS_EN_L 1/16W 2 10V
CERM
MF IMVPISNS_ENG 402
D
IMVPISNS_ENG 0402 IMVPISNS_ENG
CRITICAL
R53021 PLACE_NEAR=R7520.3:5MM R5347 R5342
D 73 72 IN PM_SLP_S3_R_L 2 G
100K
1% 85 69 68 IN CPUIMVP_ISNS2_P 1
4.42K2 85 CPUIMVP_ISNS_P 1
2.21K2 85 CPUIMVP_ISUM_R_P 8
U5340
OPA2333
IMVPISNS_ENG
PLACE_NEAR=U4900.M11:5MM
D
S 1/16W
MF-LF Max VOut: 3.3V at 19.77V Input 0.1% 0.1% 3 DFN R5341
Enables PBUS VSense 1
402 2 1/16W
MF
1/16W
MF V+ 1 CPUIMVP_ISUM_IOUT 1
4.53K2 SMC_CPU_ISENSE OUT 45 46
divider when in S0. 3 PBUS_S0_VSENSE
0402 0402
IMVPISNS_ENG IMVPISNS_ENG 2 V- 1%
1/16W PLACE_NEAR=U4900.M11:5MM
PLACE_NEAR=R7510.3:5MM R5348 R5343 THRM MF-LF
D 4 402 1 C5341
R53031 85 69 IN
CPUIMVP_ISNS1_N 1
4.42K2 85 CPUIMVP_ISNS_N 1
2.21K2 85 CPUIMVP_ISUM_R_N
9
0.22UF
20%
27.4K
5 G 1% 0.1% 0.1% 2 6.3V
X5R
PPBUS_G3H S 1/16W PLACE_NEAR=U4900.L8:5MM 1/16W
MF
1/16W
MF
IMVPISNS_ENG 402
77 64 63 50 40 36 8 7 6 MF-LF
4
402 2 RTHEVENIN = 4573 Ohms IMVPISNS_ENG 0402 0402
GND_SMC_AVSS
IMVPISNS_ENG IMVPISNS_ENG 45 46 49 50
P-CHANNEL SMC_PBUS_VSENSE R5349 NOSTUFF 1 R5345
OUT 45 46
4.42K2 C5344 1 R5344 715K 2
R53011 PLACE_NEAR=U4900.L8:5MM
PLACE_NEAR=U4900.L8:5MM
85 69 IN CPUIMVP_ISNS2_N 1
470PF 715K
0.1%
1 Gain:161.765x
100K 1 10% SIGNAL_MODEL=EMPTY
1% R5304 1 C5304
0.1%
1/16W 50V
CERM 2
1/16W
MF
NOSTUFF
C5345
0.1%
1/16W Scale: 16.48A / V
1/16W 5.49K 0.22UF MF
2 402
MF
MF-LF
402 2
1%
1/16W 20%
0402 402 470PF 402 Max VOut: 3.3V at 54.4A
MF-LF 6.3V
2 X5R Sense R is R7510 & R7520 1 2
402 2 402
PBUSVSENS_EN_L_DIV Sense R is 0.75mOhm 10% SIGNAL_MODEL=EMPTY
GND_SMC_AVSS 45 46 49 50 EDP: 53A TDP :36A 50V
CERM
402
(Effective Sense R is 0.375mOhm
due to averaging of the 2 cores)

DC-In Voltage Sense Enable & Filter

GFX/IG VCore Load Side Current Sense / Filter
C Q5310 IMVPISNS_ENG C
NTUD3169CZ CRITICAL
SOT-963 IMVPISNS_ENG
N-CHANNEL 6 DCINVSENS_EN_L R5352 U5340 IMVPISNS_ENG
8 OPA2333 PLACE_NEAR=U4900.M13:5MM
4.42K2 R5351
D 85 69 IN CPUIMVP_ISNS1G_P 1 85 CPUIMVP_ISUMG_R_P 5 DFN
R53121 0.1% V+ 7 CPUIMVP_ISUMG_IOUT 4.53K2
1 SMC_GFX_ISENSE OUT 45 46

SMC_BC_ACOK 2 G
100K 1/16W
64 63 46 45 IN 1% IMVPISNS_ENG MF
0402
6 V- 1%
1/16W
PLACE_NEAR=U4900.M13:5MM
1/16W
Enables DC-In VSense
S
MF-LF
402 2
Max VOut: 3.3V at 19.77V Input R5353 THRM
4 MF-LF
402
1 C5351
1 4.42K2 CPUIMVP_ISUMG_R_N 9 0.22UF
divider when AC present. 85 69 CPUIMVP_ISNS1G_N 1 20%
2 6.3V
3 DCIN_S5_VSENSE IN
0.1%
IMVPISNS_ENG X5R
1/16W 402
D MF IMVPISNS_ENG
R53131 0402 R5355 GND_SMC_AVSS 45 46 49 50

5 G
27.4K IMVPISNS_ENG 1
715K 2
1% NOSTUFF
1/16W PLACE_NEAR=U4900.N9:5MM Sense R is R7550 1
R5354 Gain:161.765x
Sense R is 0.75mOhm C5354
S
64 63 7 PPDCIN_G3H MF-LF 1 NOSTUFF 0.1% SIGNAL_MODEL=EMPTY
402 2 RTHEVENIN = 4573 Ohms 470PF 715K C5355 1/16W
4
EDP: 26A TDP: 21.5A 10% 0.1%
1/16W 470PF
MF
402
Scale: 8.24A / V
P-CHANNEL SMC_DCIN_VSENSE 50V MF Max VOut: 3.3V at 27.2A
OUT 45 46 CERM 2 1 2
402 2 402
R53111 PLACE_NEAR=U4900.N9:5MM
1 PLACE_NEAR=U4900.N9:5MM 10% SIGNAL_MODEL=EMPTY
100K R5314
1%
1/16W 5.49K
1 C5314 50V
CERM
MF-LF 1% 0.22UF 402
402 2 1/16W 20%
MF-LF 6.3V
2 X5R
402 2 402
PDCINVSENS_EN_L_DIV
GND_SMC_AVSS 45 46 49 50

B B

CPU 1.05V VCCIO Current Sense / Filter

CPU Vcore Voltage Sense / Filter 71 62 61 57 54 52 51 50 49 48
23 22 20 19 18 17 16 12 8 7 6
46 42 41 40 37 36 33 29 27 26
PP3V3_S0
85 77 75 74 73 72
XW5320
SM R5320
4.53K2
PPVCORE_S0_CPU 1 2 CPUVSENSE_IN 1 SMC_CPU_VSENSE 1 C5360

3
69 14 12 9 7 6 OUT 45 46

PLACE_NEAR=R7510.2:5 MM 1% PLACE_NEAR=U4900.N10:5MM V+
0.1uF
1/16W 20% PLACE_NEAR=U4900.L12:5MM
MF-LF
402
1 C5320 U5360
10V
2 CERM
0.22UF
20%
PLACE_NEAR=R7640.4:5MM
INA210
402 R5361
4.53K2
PLACE_NEAR=U4900.N10:5MM 2 6.3V
X5R 85 70 IN CPUVCCIOS0_CS_N 5 IN- SC70 OUT 6 CPUVCCIO_IOUT 1 SMC_CPUVCCIO_ISENSE OUT 45 46
402 CRITICAL 1% PLACE_NEAR=U4900.L12:5MM
1/16W
GND_SMC_AVSS 45 46 49 50 85 70 IN CPUVCCIOS0_CS_P 4 IN+ (200V/V) REF 1 MF-LF
402
1 C5361
0.22UF
20%
GND 6.3V
2 X5R
402

2
Sense R is R7640, 1mOhm GND_SMC_AVSS
EDP: 17.5A TDP :13.1A Gain: 200x 45 46 49 50

GFX/IG Vcore Voltage Sense / Filter Scale: 5A / V

Max VOut: 3.3V at 16.5A
XW5330
SM R5330
4.53K2
A 69 15 12 9 7 6 PPVCORE_S0_AXG 1 2 GFXVSENSE_IN
PLACE_NEAR=R7550.2:5 MM
1
1%
SMC_GFX_VSENSE
PLACE_NEAR=U4900.N12:5MM
OUT 45 46
SYNC_MASTER=LINDA_K90I SYNC_DATE=10/22/2010 A
1/16W PAGE TITLE
MF-LF
402
1 C5330 Voltage & Load Side Current Sensing
0.22UF
20% DRAWING NUMBER SIZE
PLACE_NEAR=U4900.N12:5MM 2 6.3V
X5R
402 Apple Inc. D
REVISION
GND_SMC_AVSS 45 46 49 50 R

NOTICE OF PROPRIETARY PROPERTY: BRANCH

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
53 OF 109
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART SHEET
IV ALL RIGHTS RESERVED 49 OF 86

8 7 6 5 4 3 2 1
 8 7 6 5 4 3 2 1

D COMPUTING High Side Current Sense / Filter OTHER High Side Current Sense / Filter D

71 62 61 57 54 52 51 50 49 48
23 22 20 19 18 17 16 12 8 7 6
46 42 41 40 37 36 33 29 27 26
85 77 75 74 73 72
PP3V3_S0 71 62 61 57 54 52 51 50 49 48
23 22 20 19 18 17 16 12 8 7 6 PP3V3_S0
46 42 41 40 37 36 33 29 27 26
85 77 75 74 73 72

1 C5401
0.1UF 1 C5411
10% 0.1UF
16V 20%

3
X5R-CERM 10V
2

3
0201 CERM
V+ 2 402
69 68 67 65 7 OUT PPBUS_S5_HS_COMPUTING_ISNS V+
70 PLACE_NEAR=U4900.N8:5MM 66 7 OUT PPBUS_S5_HS_OTHER_ISNS PLACE_NEAR=U4900.L7:5MM
U5400 R5403
0612 2 4
85 ISNS_HS_COMPUTING_N INA213 CRITICAL U5410 R5413
4.53K
MF
1W
1%
5 IN- SC70 OUT 6 HS_COMPUTING_IOUT 1 2 SMC_CPU_HI_ISENSE OUT 45 46 R5410 1 3 ISNS_HS_OTHER_N
5 IN-
INA213
SC70 OUT 6 HS_OTHER_IOUT 1
4.53K
2 SMC_OTHER_HI_ISENSE OUT 45 46
0.005 CRITICAL 1% PLACE_NEAR=U4900.N8:5MM 0.01
0.5% CRITICAL
R5400 1 4 IN+ (50V/V) REF 1 Gain: 50x 1/16W
MF-LF C5403 1W
1%
1/16W
PLACE_NEAR=U4900.L7:5MM

CRITICAL
3
85 ISNS_HS_COMPUTING_P
402 1
0.22UF
MF
0612-3
4 IN+ (50V/V) REF 1 Gain: 50x MF-LF
402 1 C5413
Scale: 4A / V 20% 85
2 4 ISNS_HS_OTHER_P 0.22UF
49 40 36 8 7 6 IN PPBUS_G3H GND 6.3V
Scale: 2A / V 20%
77 64 63 50 Max VOut: 3.3V at 13.2A 2 X5R
77 64 63 50 49 40 36 8 7 6 IN PPBUS_G3H GND 6.3V
2

402 X5R
Max VOut: 3.3V at 6.6A 2 402

2
EDP: 15.5A TDP :11.1A GND_SMC_AVSS 45 46 49 50 EDP: 10.0A TDP :5.2A GND_SMC_AVSS 45 46 49 50

C C

DC-IN (AMON) Current Sense Filter

CHARGER BMON High Side (BATTERY DISCHAEGE) Current Sense, MUX & Filter PLACE_NEAR=U4900.K10:5MM
R5431
4.53K
64 IN CHGR_AMON 1 2 SMC_DCIN_ISENSE OUT 45 46
48 33 32 31 30 26 24 18 8 7 6 PP3V3_S3
73 72 55 54 1% PLACE_NEAR=U4900.K10:5MM
1/16W

B BMON:ENG BMON:ENG Sense R is R7020, 20mOhm

MF-LF
402
1 C5431
0.22UF
B
1
C5420 C5421 1 20%
3

6.3V
BMON:ENG 2
Sense R is R7050, 10mOhm V+
CRITICAL
0.1uF
20%
0.1uF
20%
X5R
402
10V 10V
Charger/Load side U5420
2 CERM CERM 2 U5421 GND_SMC_AVSS 45 46 49 50
PLACE_NEAR=R7050.3:5MM
402 402 NC7SB3157P6XG
INA213 SC70
85 64 IN CHGR_CSO_R_P 5 IN- SC70 OUT 6 BMON_INA_OUT 1 B1 SEL 6 SMC_BMON_MUX_SEL IN 45 46 DC-In AMON
BMON:ENG
85 64 IN CHGR_CSO_R_N 4 IN+ REF 1
1 ISL6259 Gain: 20x
(50V/V) 2
GND VCC 5 Scale: 2.5A / V
PLACE_NEAR=U4900.M9:5MM
Battery side R5422 Max VOut: 3.3V at 8.25A
GND INA Solution 0
45.3K
2

3 4 BMON_AMUX_OUT 1 2 SMC_BMON_ISENSE
NOTE: Monitoring current from Gain: 50x B0 A
1%
PLACE_NEAR=U4900.M9:5MM
OUT 45 46

battery to PBUS (battery discharge) Scale: 2A / V VER 1 BMON:ENG 1/16W C5422

MF-LF 1
across R7050 Max VOut: 3.3V at 6.6A 1 402 0.022UF
BMON:PROD R5423 10%
16V
R5420 100K
5% 2 CERM-X5R
402
0 1/16W
64 IN CHGR_BMON 2 1 MF-LF
402
PLACE_NEAR=U5421.1:5MM 5% 2 GND_SMC_AVSS 45 46 49 50
From charger 1/16W
For engineering, stuff BMON_ENG MF-LF
402
For production, stuff BMON_PROD

INA (Engineering) Solution Charger BMON (Production) Solution

Gain: 50x ISL6259 Gain: 36x
Scale: 2A / V Scale: 2.78A / V
A Max VOut: 3.3V at 6.6A Max VOut: 3.3V at 9.167A
SYNC_MASTER=LINDA_K90I SYNC_DATE=10/22/2010 A
PAGE TITLE

High Side Current Sensing

DRAWING NUMBER SIZE

Apple Inc. D
REVISION
R

NOTICE OF PROPRIETARY PROPERTY: BRANCH

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
54 OF 109
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART SHEET
IV ALL RIGHTS RESERVED 50 OF 86
8 7 6 5 4 3 2 1
 8 7 6 5 4 3 2 1

MagSafe DC Power Jack

CRITICAL
J6900 CRITICAL

78048-0573 F6905
M-RT-SM
6AMP-24V
1 6 PP18V5_DCIN_FUSE 1 2 PPDCIN_G3H 7 49 63 64
MIN_LINE_WIDTH=1mm
2 MIN_NECK_WIDTH=0.20mm
VOLTAGE=18.5V 1206-1
3
1
C6905 PP3V42_G3H

D
4

5 6 ADAPTER_SENSE
0.01UF
20%
50V
1
C6908
6 7 26 43 45 46 47 48 53 63 64
73
D
2
CERM 0.1UF
603 20%
SMC_BC_ACOK_VCC SOT665
R6929 5
TC7SZ08AFEAPE
2
10V
CERM
1 2.0K
R6900

2
402
518S0656

1
402 2
A PLACE_NEAR=U6901.5:1mm
100K NOSTUFF MF-LF
1/16W
VCC 4
5%
1/16W
5% Y U6901
MF-LF U6900 B
1
402

1
2 MAX9940 SMC_BC_ACOK 45 46 49 64
SC70-5 3
45 BI SYS_ONEWIRE 4 INT EXT 5

GND NC

3
NC

1-Wire OverVoltage Protection

BIL CONNECTOR
516S0523
CRITICAL

J6955
CPB6312-0101F

C 14
F-ST-SM

13
C
2 1

84 64 63 48 45 6 SMBUS_SMC_BSA_SDA 4 3 PP3V42_G3H R6961

BI
100
SMBUS_SMC_BSA_SCL 6 5 6 SMC_LID_R 1 2 SMC_LID
84 64 63 48 45 6 BI 45 46 53
46 1/16W 402
45 6 SMC_BIL_BUTTON_L 8 7
TO SMC 5%
MF-LF
10 9

3.425V "G3Hot" Supply C6952

47PF
1
NC 12 11
NC
C6951 1
1
C6955
0.001UF
10%
5% 16 15 0.1UF 50V
50V 2 CERM
10%
Supply needs to guarantee 3.31V delivered to SMC VRef generator 1 1 CERM
2
25V 402
C6954 C6953 402 X5R
2

0.001UF 47PF 402

10% 5%
50V 50V
2 2
CERM CERM
402 402

D6990
BAT30CWFILM
SOT-323
50 49 40 36 8 7 6
PPBUS_G3H 1 P3V42G3H_REF3
77 64

R6990 3 PPVIN_G3H_P3V42G3H
MIN_LINE_WIDTH=0.3 mm
1 C6996
47 MIN_NECK_WIDTH=0.3 mm 0.1UF
PPDCIN_G3H PPDCIN_S5_P3V42G3H 2 1 10%
64 63 49 7 1 2
MIN_LINE_WIDTH=0.3 mm
VOLTAGE=18.5V R6995 2 16V
REF3 10

1% 1.00M X5R
MIN_NECK_WIDTH=0.3 mm
VIN 7

1/3W 402-1
VOLTAGE=18.5V 1%
MF
805
C6990 1 1/8W
MF-LF
4.7UF
10% 2 805
35V P3V42G3H_TON 3 TON BYP 9
X5R-CERM 2
0805
4 EN
U6990
PM6640
B P3V42G3H_FB 8 VCC DFN CRITICAL B
2 FB CRITICAL
L6995
33UH-20%-0.44A-0.455OHM PP3V42_G3H 6 7 26 43 45 46 47 48 53 63 64
73
1 REF SW 6 P3V42G3H_SW 1 2
C6991 1 NC THRM MIN_LINE_WIDTH=0.5 mm Vout = 3.425
GND PAD MIN_NECK_WIDTH=0.25 mm D52LC-SM
1UF SWITCH_NODE=TRUE DIDT=TRUE
10%
5

11

25V 300mA max output

X5R 2 353S2776
603-1
C6994 1 f = 470 kHz
0.1UF
10%
16V 2
X5R
1 C6999
402-1 22UF
20%
2 6.3V
X5R-CERM-1
603

518-0375
CRITICAL
J6950 BATTERY CONNECTOR
BAT-K90-K91-K92
M-RT-TH

1
P1
2
P2
3
P3
4 SMBUS_SMC_BSA_SCL
P4 6 45 48 63 64 84

5 6 SYS_DETECT_L
P5
6 SMBUS_SMC_BSA_SDA
P6 CRITICAL
6
45 48 63 64 84

A P7
P8
7

8
64 6 PPVBAT_G3H_CONN
D6950 1
SYNC_MASTER=JACK_K90I SYNC_DATE=08/20/2010 A
1

RCLAMP2402B R6950
9 C6950 1
C6960 1 SC-75 10K PAGE TITLE
P9
10
0.1UF
10%
1UF
10%
5%
1/16W DC-In & Battery Connectors
SHLD_PIN 25V 25V MF-LF
X5R
2
X5R 2 402
2
DRAWING NUMBER SIZE
11
SHLD_PIN 402 603-1
D
3

SHLD_PIN 12 Apple Inc. REVISION

13
SHLD_PIN R

NOTICE OF PROPRIETARY PROPERTY: BRANCH

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
69 OF 109
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART SHEET
IV ALL RIGHTS RESERVED 63 OF 86
8 7 6 5 4 3 2 1
 8 7 6 5 4 3 2 1

Inrush Limiter Reverse-Current Protection

CRITICAL CRITICAL
Q7085 Q7080
FROM ADAPTER AON6405L AON6405L
DFN5X6 DFN5X6
63 49 7 PPDCIN_G3H OMIT OMIT
PPDCIN_G3H_INRUSH
D

3 2 1

3 2 1
D

S
PPDCIN_G3H_INRUSH_FET MIN_LINE_WIDTH=0.6 mm PART NUMBER QTY DESCRIPTION REFERENCE DES CRITICAL BOM OPTION
MIN_NECK_WIDTH=0.4 mm

5
1 MIN_LINE_WIDTH=0.6 MM VOLTAGE=18.5V
1 C7085 R7085 MIN_NECK_WIDTH=0.3 MM
VOLTAGE=18.5V 1
R7080
376S0761 1 SI7137DP Q7055 CRITICAL
0.1UF 470K
10% 1% 100K 376S0845 1 SI7149DP Q7080 CRITICAL
1/16W 5%
2 25V
X5R MF-LF 1/16W

G
402 2 402 MF-LF 376S0845 1 SI7149DP Q7085 CRITICAL
2 402

4
CHGR_AGATE_DIV CHGR_SGATE_DIV
MIN_LINE_WIDTH=0.3 mm MIN_LINE_WIDTH=0.3 mm
MIN_NECK_WIDTH=0.3 mm MIN_NECK_WIDTH=0.3 mm
R70861 1
R7081
332K 62K
1% 5%
CRITICAL 1/16W 1/16W
MF-LF MF-LF
D7005 402 2 2 402
BAT30CWFILM
SOT-323 (CHGR_AGATE)
1
R7005 (CHGR_SGATE)
3 CHGR_DCIN_D_R 20 R7021
1 2 (CHGR_DCIN) 10
5% 1 2
2 1/16W CRITICAL
ACIN pin threshold is 3.2V, +/- 50mV MF-LF 5%
CHGR_CSI_R_P 3 1
402 1 C7020 1/16W
MF-LF
85
R7020
Divider sets ACIN threshold at 13.55V 0.047UF 402 0.02
0.5%
10% 1W
Input impedance of ~40K meets 2 10V
CERM R7022 85 CHGR_CSI_R_N MF
30mA max load 402 10 4 2 0612-1
sparkitecture requirements 1 2
PP5V1_CHGR_VDD R7001 PPDCIN_G3H_CHGR
PP3V42_G3H MIN_LINE_WIDTH=0.2 mm 1
4.7 2 PP5V1_CHGR_VDDP
5% MIN_LINE_WIDTH=0.6 mm
63 53 48 47 46 45 43 26 7 6 MIN_NECK_WIDTH=0.2 mm 1/16W
MF-LF
MIN_NECK_WIDTH=0.4 mm CRITICAL CRITICAL
73 VOLTAGE=5.1V MIN_LINE_WIDTH=0.2 mm VOLTAGE=18.5V
5%
1/16W
MIN_NECK_WIDTH=0.2 mm
VOLTAGE=5.1V
402 1
C7030 1
C7031 1 C7035 1 C7036 1 C7037
MF-LF 22UF 22UF 1UF 1UF 0.001UF
402 C7001 1 C7022 1 1 C7021 20% 20% 10%
25V
10%
25V
10%
50V
C BATT_3S C7002 1 1
NO STUFF 1UF
10%
10V 2
0.1UF
10%
25V 2
0.1UF
10%
2 25V
25V
2 POLY-TANT
CASE-D2-SM
25V
2 POLY-TANT
CASE-D2-SM
2 X5R
603-1
2 X5R
603-1
2 X7R
402 C
R70121 1UF
10%
R7002 X5R
402
X5R
402
X5R
402
10V 2 100K
1K 5%
19

20

1% X5R 1/16W
1/16W 402 64 MF-LF
MF-LF 2 402
402 2 GND_CHGR_AGND VDD VDDP CHGR_BOOT_R 5 PART NUMBER QTY DESCRIPTION REFERENCE DES CRITICAL BOM OPTION
R7000 12 VHST CRITICAL DCIN 2 CHGR_DCIN MIN_LINE_WIDTH=0.2 mm
MIN_NECK_WIDTH=0.2 mm
1 47
SMC_RESET_L 0 CHGR_RST_L 13 C7025
OMIT Max Current = 8A 376S0966 1 RJK03E1DNS Q7030 CRITICAL
R7010 45 IN
1 2 SMB_RST_N 26 CHGR_SGATE R70251 1 D CRITICAL
30.1K
46
5% 48
1/16W84
45 6 IN SMBUS_SMC_BSA_SCL 11 SCL U7000
SGATE
1 CHGR_AGATE 0 10%
0.22UF
4 G
Q7030 (L7030 limit) 376S0966 1 RJK03E1DNS Q7035 CRITICAL
1% 63 AGATE 5% 10V RJK03E1DNS
1/16W MF-LF48 SMBUS_SMC_BSA_SDA 10 SDA TQFN 1/16W 2 CERM
MF-LF 402 84
45 6
63 BI
CSIP 28 84 CHGR_CSI_P MF-LF HWSON-8 f = 400 kHz
ISL6259

CHGR_VFRQ 4 402
2 402 73 IN VFRQ
CSIN 27 84 CHGR_CSI_N 402 2 PLACE_NEAR=U7000.25:2mm
CHGR_CELL 6 CELL MIN_LINE_WIDTH=0.2 mm S CRITICAL CRITICAL
Float CELL for 1S 25 CHGR_BOOT MIN_NECK_WIDTH=0.2 mm
L7030 TO SYSTEM
CHGR_ACIN 3 ACIN
BOOT SWITCH_NODE=TRUE
DIDT=TRUE MIN_LINE_WIDTH=0.6 mm 4.7UH-9.5A F7040
UGATE 24 CHGR_UGATE MIN_NECK_WIDTH=0.2 mm 1 2 3 8AMP-24V
GATE_NODE=TRUE
1
CHGR_ICOMP 5 ICOMP PHASE 23 CHGR_PHASE DIDT=TRUE 1 2 1 2 PPBUS_G3H 6 7 8 36 40 49 50 63 77
R7011 CHGR_VCOMP 7 VCOMP MIN_NECK_WIDTH=0.2 mm
MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.2 mm IHLP4040DZ-SM
9.31K LGATE 21 CHGR_LGATE MIN_LINE_WIDTH=0.6 mm SWITCH_NODE=TRUE 1206
1% CHGR_VNEG 8 VNEG GATE_NODE=TRUE DIDT=TRUE
1/16W 1 CHGR_CSO_P 18 16 CHGR_BGATE DIDT=TRUE NO STUFF
MF-LF
2 402
R7015 84 CSOP BGATE
R70391
100K 84 CHGR_CSO_N 17 CSON 20V/V AMON 9 CHGR_AMON OUT 50
1% 180
29 THRM_PAD

1/16W 36V/V BMON 15 CHGR_BMON 50 5%

(AGND)

OUT PPVBAT_G3H_CHGR_REG
MF-LF 1/10W
BATT_2S 2 402
1 C7050 (OD) ACOK 14 SMC_BC_ACOK OUT 45 46 49 63 5 MF-LF MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.4 mm CRITICAL
PGND

1UF 603 2
R70131 CHGR_VCOMP_R 10% OMIT
VOLTAGE=12.6V 1
C7040 1 C7045
1K 2 16V D CRITICAL 0.001UF
1% X5R
Q7035 22UF
C7015 402 CHGR_PHASE_RC 10%
22

1/16W 1 353S2929 20%

MF-LF 4 G 2 25V 50V
2 X7R
402 2 330PF RJK03E1DNS DIDT=TRUE
CRITICAL POLY-TANT
5% HWSON-8 CASE-D2-SM 402
2 50V
COG BATT_3S CRITICAL
NO STUFF
402
S R7050 Q7055
B 1 C7039 0.01 AON6403L B
470PF 0.5% DFN5X6
1 2 3 10%
2 50V
1W
MF
SYM-VER-2
OMIT
TO/FROM BATTERY
CERM
R70161 XW7000 402 1
0612-3
2 PPVBAT_G3H_CHGR_R 3 S
3.01K SM 3 4 MIN_LINE_WIDTH=0.6 mm 2 D 5 PPVBAT_G3H_CONN
1% 1 2 MIN_NECK_WIDTH=0.4 mm 6 63
1/16W (GND) VOLTAGE=12.6V MIN_LINE_WIDTH=0.6 mm
MF-LF
402 2 PLACE_NEAR=U7000.29:1mm
C7055 1 C7056 1 C7057 1 1 MIN_NECK_WIDTH=0.4 mm
VOLTAGE=12.6V
PLACE_NEAR=U7000.22:1mm 1UF 0.1UF 0.01uF
10% 10% 10% G
CHGR_VNEG_R 25V 16V 16V
X5R 2 X5R 2 CERM 2 4
603-1 402-1 402
1 C7016 (CHGR_CSO_P) R7051 2.2 1 2 85 50 CHGR_CSO_R_P
5% 1/16W MF-LF 402
470PF
10% (CHGR_CSO_N) R7052 0 1 2 85 50 CHGR_CSO_R_N
2 50V
CERM 5% 1/16W MF-LF 402
402
(PPVBAT_G3H_CHGR_R) (PPVBAT_G3H_CHGR_R)
(CHGR_BGATE)
1 C7042 C7011 1 1 C7000 C7005 1 C7026 1
0.068UF 0.01UF 1UF 0.22UF 0.001UF
10% 10% 10% 20% 10%
2 10V
CERM
16V
CERM 2 2 10V
X5R
25V 2
X5R
50V
CERM 2
TABLE_5_HEAD

402 402 402-1 603 402 PART# QTY DESCRIPTION REFERENCE DESIGNATOR(S) CRITICAL BOM OPTION
64 GND_CHGR_AGND TABLE_5_ITEM

MIN_LINE_WIDTH=0.2 mm 107S0129 1 RES,5MOHM,1%,1W,0612,4-TERM R7050 CRITICAL BATT_2S

MIN_NECK_WIDTH=0.2 mm
VOLTAGE=0V

A SYNC_MASTER=JACK_K90I SYNC_DATE=10/11/2010 A
PAGE TITLE

PBus Supply & Battery Charger

DRAWING NUMBER SIZE

Apple Inc. D
REVISION
R

NOTICE OF PROPRIETARY PROPERTY: BRANCH

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE

K6 NOTES : L7030 CHANGED BACK TO K24 IND DUE TO LAYOUT

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
70 OF 109
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART SHEET
IV ALL RIGHTS RESERVED 64 OF 86
8 7 6 5 4 3 2 1
 8 7 6 5 4 3 2 1

System Agent Power Supply

D D

70 69 68 67 50 7 PPBUS_S5_HS_COMPUTING_ISNS
72 70 68 54 52 47 42 22 7 6
77 73
PP5V_S0
VCCSAS0_BOOT_RC PLACE_NEAR=Q7100.2:1.5mm
MIN_LINE_WIDTH=0.3 mm CRITICAL
MIN_NECK_WIDTH=0.2 mm
R71011 C7101
1
10UF
DIDT=TRUE C7120 1 C7121
0.1UF
1 1 C7122
1000PF
2.2 20%
39UF-0.027OHM 10% 5%
5% 20%
1/16W 10V
2 X5R 1 C7130 16V 2 25V 2
X5R
25V
2 NP0-C0G
MF-LF
2 402
603 R71301 1UF
10%
POLY
B1A-SM 402 402
2.2
5% 2 16V
X5R
PP5V_S0_VCCSAS0_VCC 1/10W 402
MIN_LINE_WIDTH=0.6 mm MF-LF
MIN_NECK_WIDTH=0.2 mm 603 2
VOLTAGE=5V

19

20
C VCC PVCC VCCSAS0_VBST
C
MIN_LINE_WIDTH=0.3 mm
U7100 MIN_NECK_WIDTH=0.2 mm
DIDT=TRUE 2 3 7 CRITICAL
ISL95870AH CRITICAL
UTQFN VCCSAS0_DRVH Q7100 R7140
12 CPU_VCCSASENSE PVCCSA_EN 15 EN BOOT 18 MIN_LINE_WIDTH=0.6 mm SIZ700DT CRITICAL
73 IN
CRITICAL MIN_NECK_WIDTH=0.2 mm POWERPAIR-6X3.7 0.001
VCCSAS0_FB 10 FB UGATE 17
GATE_NODE=TRUE
DIDT=TRUE 1 L7100 1%
1W PPVCCSA_S0_CPU
1.0UH-7.7A MF-1 6 7 12 15
0612
VCCSAS0_SREF 7 SREF PHASE 16 VCCSAS0_LL 8 1 2 PPVCCSA_S0_REG_R 1 2
MIN_LINE_WIDTH=0.6 mm MIN_LINE_WIDTH=0.6 mm 3
1 VCCSAS0_VO 12 VO LGATE 1
MIN_NECK_WIDTH=0.2 mm FDV0630H-SM MIN_NECK_WIDTH=0.2 mm 4 6A Max Output
R7146 SWITCH_NODE=TRUE
DIDT=TRUE
VOLTAGE=1.05V
113K
1% VCCSAS0_OCSET 11 OCSET 6 f = 300 kHz
1/16W
MF-LF 14
2 402 73 OUT PVCCSA_PGOOD PGOOD
4 RTN VCCSAS0_DRVL 4 5
MIN_LINE_WIDTH=0.6 mm
13 MIN_NECK_WIDTH=0.2 mm
1
R7147 VCCSAS0_FSEL FSEL GATE_NODE=TRUE
DIDT=TRUE
140K
1% 1 C7103 1
8 SET0
1/16W
MF-LF 10%
0.022UF R7103 9 SET1
2 402 16V 0
2 CERM-X5R 5%
402 1/16W 6 VID0
MF-LF
C7102 1
2 402
1 C7105 1 2.2UF 5 VID1
1000PF
R7148 10%
16V
85 VCCSAS0_CS_P
5% 47.5K X5R 2
1%
2 25V
NP0-C0G 1/16W 603 85 VCCSAS0_CS_N
402 MF-LF
2 402
GND PGND
R71411
VCCSAS0_SET0 1K
3

1%
VCCSAS0_SET1 1/16W
B MF-LF
402 2 C7140
1000PF
B
2 1

5%
25V 1
NP0-C0G
402
R7142
CPU_VCCSA_VID<1>
1K
12 IN 1%
1/16W
MF-LF
(VCCSAS0_OCSET) 2 402
(VCCSAS0_VO)

A SYNC_MASTER=JACK_K90I SYNC_DATE=08/19/2010 A
PAGE TITLE

System Agent Supply

DRAWING NUMBER SIZE

Apple Inc. D
REVISION
R

NOTICE OF PROPRIETARY PROPERTY: BRANCH

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
71 OF 109
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART SHEET
IV ALL RIGHTS RESERVED 65 OF 86
8 7 6 5 4 3 2 1
 8 7 6 5 4 3 2 1

5V_S3/3.3V_S5 POWER SUPPLY D

D

VOUT = (2 * RA / RB) + 2 VOUT = (2 * RC / RD) + 2

<RA> <RB> <RD> <RC>

R7267 R7268 R7269 R7270
15.0K 10K 10K 6.49K
1% 1% 1% 1%
XW7203 1/16W 1/16W 1/16W 1/16W XW7204
MF-LF MF-LF MF-LF MF-LF
SM 402 402 402 402 SM
2 1 5V_S3_VFB_XW7203 1 2 1 2 1 2 1 2 3V3S5_VFB_R7270 2 1

PLACE_NEAR=L7260.1:1 MM
PLACE_NEAR=L7220.2:1 MM

XW7205
SM
73 P5V3V3_REG_EN 2 1

PLACE_NEAR=C7251.1:1 MM
C 66 50 7 PPBUS_S5_HS_OTHER_ISNS
C
1
R7273
XW7202 1 C7272 100K
5%
SM 1UF 1/16W
2 1 10% MF-LF
2
25V
2 X5R
402
PLACE_NEAR=C7291.1:1 MM 603-1

P5VP3V3_REG3

66 50 7 PPBUS_S5_HS_OTHER_ISNS P5VP3V3_VREF
PPBUS_S5_HS_OTHER_ISNS
CRITICAL 1 C7270
1
C7282 1 1 C7281 1UF
C7280 20% 1 C7241 1 CRITICAL 1
C7242
0.001UF 39UF-0.027OHM 1UF 10V
2 CERM
C7240
20% 20%
10% 1
C7271 1UF 39UF-0.027OHM 0.001UF

16
50V 25V 603 10% 20%

3
2 2 16V 2 X5R 0.22UF 20%
CERM
402
POLY
B1A-SM 603-1
5
C7260 10% VIN VREF 2 25V
X5R 2 16V
POLY
2
50V
CERM
0.1UF 10V
2 CERM 14
SKIPSEL VREG3 8 603-1 B1A-SM 402
10%
OMIT 402

2
16V
CRITICAL D X5R
402
R7260 4
TONSEL VREG5
72 54 7 17 PP5V_S5 R7220 C7220 10%
16V
CRITICAL
Q7260 G 4 2 1
402 5% 1/16W MF-LF

1
0 2 22 CRITICAL 9
402 5% 1/16W MF-LF

1
0 2 P3V3S5_VBST_R 2
0.1UF X5R
1 402
D1 Q7220
RJK03E1DNS P5VS3_VBST_R P5VS3_VBST VBST1 VBST2 P3V3S5_VBST
RJK0384DPA
HWSON-8 MIN_LINE_WIDTH=0.6 MM DIDT=TRUE MIN_LINE_WIDTH=0.6 MM
MIN_NECK_WIDTH=0.2 MM
DIDT=TRUE U7200 MIN_LINE_WIDTH=0.6 MM
MIN_NECK_WIDTH=0.2 MM
DIDT=TRUE
MIN_LINE_WIDTH=0.6 MM
MIN_NECK_WIDTH=0.2 MM
DIDT=TRUE WPAK
MIN_NECK_WIDTH=0.2 MM
P5VS3_DRVH 21
DRVH1 DRVH2 10 P3V3S5_DRVH 1 G1
QFN
MIN_LINE_WIDTH=0.6 MM DIDT=TRUE MIN_LINE_WIDTH=0.6 MM CRITICAL
S MIN_NECK_WIDTH=0.2 MM 20
LL1 LL2 11 MIN_NECK_WIDTH=0.2 MM
DIDT=TRUE
S1/D2 7 PWM FREQ. = 375 KHZ

TPS51125
P5VS3_LL P3V3S5_LL
L7260 MIN_LINE_WIDTH=0.6 MM DIDT=TRUE MIN_LINE_WIDTH=0.6 MM L7220
4.7UH-13A-15MOHM 3 2 1
MIN_NECK_WIDTH=0.2 MM
P5VS3_DRVL 19
DRVL1 DRVL2 12 P3V3S5_DRVL
MIN_NECK_WIDTH=0.2 MM DIDT=TRUE
4.7UH-5.5A MAX CURRENT = 7.45A
MAX CURRENT = 12.947A 1 2 MIN_LINE_WIDTH=0.6 MM
MIN_NECK_WIDTH=0.2 MM
DIDT=TRUE 6 G2 1 2
24 7
PWM FREQ. = 300 KHZ P5VS3_VO1 VO1 VO2 P3V3S5_VO2

B PCMB104E4R7-SM
CRITICAL P5VS3_VFB 2
VFB1 VFB2 5 P3V3S5_VFB S2
IHLP2525CZ
B
72 67
43 42 32 30 7 6 PP5V_S3 5 PP3V3_S5 74 76 85
6 7 8 17 19 20 22 23

5
1 6
61 60 59 57 46 44
OMIT
P5VS3_ENTRIP ENTRIP1 ENTRIP2 P3V3S5_ENTRIP 24 26 30 46 56 72 73

CRITICAL D MIN_LINE_WIDTH=0.6 MM 18
Q7261 MIN_NECK_WIDTH=0.2 MM VCLK NC CRITICAL
1
C7293 1 C7290 1
C7291 RJK03E0DNS G 4 DIDT=TRUE
23
1
C7251 1 C7250 1
C7253
0.001UF 10UF 220UF HWSON-8 1
R7271
PGOOD 1 R7272 150UF 10UF
0.001UF
20%
50V
20%
10V 20%
88.7K 13
1 C7273 75K 20% 20%
6.3V 20%
2 CERM 2 X5R 2 6.3V
ELEC
EN0 5V3V3_REG_EN
10UF 1% 2 6.3V
POLY
2 X5R 50V
402 603 S 1% 20% 1/16W 603 2 CERM
D1A-SM 1/16W GND THRM_PAD 6.3V MF-LF
B1A-SM
402
MF-LF 2 X5R
15

25

402
CRITICAL 3 2 1 2 402 603 2

GND_5V3V3S5_SGND 1 2
VOLTAGE=0V
MIN_LINE_WIDTH=0.6 MM
MIN_NECK_WIDTH=0.2 MM
XW7201
SM
D 6 Q7221 PLACE_NEAR=U7200.25:1 MM
SSM6N37FEAPE
SOT563
P5V3V3_PGOOD 73

P5VS3_EN_L 2 G S
73 IN
1 Q7221
D 3
SSM6N37FEAPE

SOT563

A PART NUMBER QTY DESCRIPTION REFERENCE DES CRITICAL BOM OPTION

73
P3V3S5_EN_L 5 G S 4
SYNC_MASTER=JACK_K90I SYNC_DATE=10/04/2010 A
IN PAGE TITLE
376S0966 1 Q7260 CRITICAL
RJK03E1DNS
5V/3.3V SUPPLY
376S0895 1 RJK03E0DNS Q7261 CRITICAL DRAWING NUMBER SIZE

Apple Inc. D
REVISION
SEPERATED MASTER PGOOD FOR BOTH 5V AND 3V3. R

NOTICE OF PROPRIETARY PROPERTY: BRANCH

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
72 OF 109
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART SHEET
IV ALL RIGHTS RESERVED 66 OF 86
8 7 6 5 4 3 2 1
 8 7 6 5 4 3 2 1

D D

70 69 68 65 50 7 PPBUS_S5_HS_COMPUTING_ISNS
TABLE_ALT_HEAD

CRITICAL CRITICAL CRITICAL PART NUMBER ALTERNATE FOR BOM OPTION REF DES COMMENTS:
1 1 1 PART NUMBER
C7330 C7331 1
C7332 1
C7333 C7334 TABLE_ALT_ITEM

39UF-0.027OHM 39UF-0.027OHM 1UF

10%
0.001UF
10%
33UF 128S0299 128S0218 ALL
20% 20% 20%
25V 50V
2 16V 2 16V 2 X5R 2 X7R 2 16V TABLE_ALT_ITEM

POLY POLY POLY-TANT 128S0093 128S0218 ALL

PP1V5_S3 B1A-SM B1A-SM 603-1 402 CASED2E-SM
72 67 30 29 27 7 6
NO STUFF
59 57 46 44 43 42 32 30 7 6 PP5V_S3
72 66 61 60 C7301 1
10UF
20%
10V
X5R 2 5
C7300 1
603
PLACE_NEAR=U7300.2:1mm
10UF
20% D CRITICAL
10V
X5R
603
2
4 G
Q7330
PLACE_NEAR=U7300.12:1mm (DDRREG_DRVH) CSD58858Q3

2
MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.17 mm
3.3X3.3-QFN-COMBO

C VLDOIN
DDRREG_VBST
MIN_NECK_WIDTH=0.17 mm
402
5%
R7325
0
MF-LF
1/16W
C7325
0.1UF S
OMIT
C
1 2 1 2
12 V5IN VBST 15 MIN_LINE_WIDTH=0.6 mm DDRREG_VBST_RC CRITICAL

U7300
DRVH 14 DDRREG_DRVH
MIN_NECK_WIDTH=0.17 mm
MIN_LINE_WIDTH=0.6 mm
10% 1 2 3 L7330
30 8 MEMVTT_EN VTT Enable 17 S3 SW 13
GATE_NODE=TRUE
DDRREG_LL
DIDT=TRUE
25V 0.88UH-20%-19A-2.3MOHM
IN X5R
TPS51916 SWITCH_NODE=TRUE DIDT=TRUE
402 1 2
73 43 IN DDRREG_EN VDDQ/VTTREF Enable 16 S5 PP1V5_S3 6 7 27 29 30 67 72
QFN (DDRREG_LL)
DRVL 11 DDRREG_DRVL MIN_LINE_WIDTH=0.6 mm
MPCG1040LR88-SM
DDRREG_1V8_VREF 6 VREF GATE_NODE=TRUE DIDT=TRUE MIN_NECK_WIDTH=0.17 mm
CRITICAL PGOOD 20 TP_DDRREG_PGOOD
OUT 8 CRITICAL Vout = 1.5V
1
1
VDDQSNS 9 DDRREG_VDDQSNS 5 C7340 14.1A max output
R7315 31 DDRREG_FB 8 REFIN
C7315 1
VTT 3 PP0V75_S0_DDRVTT XW7360 (DDRREG_DRVL) 270UF (Q7335 limit)
0.1UF 20.0K SM 20%
1% DDRREG_MODE 19 MODE VTTSNS 1 D CRITICAL 2 2V 1
C7346 f = 400 kHz
10%
16V
X5R 2
1/16W
MF-LF DDRREG_TRIP 18 TRIP
DDRREG_VTTSNS 1 2
PLACE_NEAR=C7361.1:3mm
4 G
Q7335 TANT
CASE-B4-SM 0.001UF
10%
402
PLACE_NEAR=U7300.6:1mm
2
402
PLACE_NEAR=U7300.8:5mm VTTREF 5 PPVTTDDR_S3 MIN_LINE_WIDTH=0.6 mm
CSD58858Q3 CRITICAL 2
50V
10mA max load MIN_NECK_WIDTH=0.17 mm
3.3X3.3-QFN-COMBO X7R
402
CRITICAL CRITICAL OMIT C7341 1 1
C7345
VTT THRM C7360 1 1
C7361 270UF 10UF
PGND GND GND PAD S 20% 20% 2
1 10UF 10UF 6.3V
R7316 1
C7316 20% 20%
2V 2 2 X5R XW7301
10

21

TANT
6.3V 6.3V 603 SM
100K 0.01UF 1 1 X5R 2 2 X5R 1 2 3 CASE-B4-SM
1%
1/16W
10% R7317 R7318 603 603
1
MF-LF 2
16V
CERM 200K 95.3K PLACE_NEAR=C3101.1:1mm PLACE_NEAR=C3101.1:3mm PLACE_NEAR=L7330.2:1mm
2
402 402 1% 1%
PLACE_NEAR=U7300.8:5mm PLACE_NEAR=U7300.8:1mm 1/16W 1/16W
MF-LF MF-LF C7360, C7361 close to memory
2
402
2 402 2 C7350 1
(DDRREG_VDDQSNS)
PLACE_NEAR=U7300.19:3mm PLACE_NEAR=U7300.18:3mm
0.22UF MIN_LINE_WIDTH=0.2 mm

XW7300 10% MIN_NECK_WIDTH=0.17 mm

SM 10V
CERM 2
402 PART NUMBER QTY DESCRIPTION REFERENCE DES CRITICAL BOM OPTION
1
PLACE_NEAR=U7300.21:1mm
376S0790 1 CSDS58858Q3 Q7330 CRITICAL
GND_DDRREG_SGND
MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.17 mm 376S0928 1 FDMC2514SDC Q7335 CRITICAL

B
VOLTAGE=0V

A SYNC_MASTER=JACK_K90I SYNC_DATE=10/11/2010 A
PAGE TITLE

1.5V DDR3 Supply

DRAWING NUMBER SIZE

Apple Inc. D
REVISION
R

NOTICE OF PROPRIETARY PROPERTY: BRANCH

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
73 OF 109
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART SHEET
IV ALL RIGHTS RESERVED 67 OF 86
8 7 6 5 4 3 2 1
 8 7 6 5 4 3 2 1

PART NUMBER QTY DESCRIPTION REFERENCE DES CRITICAL BOM OPTION

353S3259 1 IC,MAX15092,3+1PH CPU REG,IMVP7,5X5QFN40 U7400 CRITICAL

Need symbol to be re-drawn to clean up this page

PP5V_S0 6 7 22 42 47 52 54 65 70 72 73
77

D D
R7401
10
P5V_S0_CPUIMVP_VDD 1 2

MIN_LINE_WIDTH=0.4 mm 5%
MIN_NECK_WIDTH=0.2 mm 1/16W
VOLTAGE=5V
MF-LF PPBUS_S5_HS_COMPUTING_ISNS 7 50 65 67 69 70
402
23 22 20 17 16 14 12 10 9 7 6PP1V05_S0
73 70 45 40 36

C7401 1 1
C7402 1
C7403
2.2UF 2.2UF 2.2UF
20% 20% 20%
10V 10V 10V
X5R-CERM 2 2 X5R-CERM 2 X5R-CERM
1 1
R7479 R7480 402 402 402
54.9 130
1% 1%
1/16W 1/16W
MF-LF MF-LF
402 402 PLACE_NEAR=U7400.24:2mm
2 2
PLACE_NEAR=U7400.15:2mm
PLACE_NEAR=U7400.18:2mm PLACE_NEAR=U7400.16:2mm

40

24

15
VCC
VDDA

VDDB
R7406
300
1 2 CPUIMVP_ISNS1_P
IN 49 69 85
U7400
MAX17511 R7402 5%
1/16W
QFN 90.9K2 MF-LF
NC
31
DRVPWMA TON 2 CPUIMVP_TON 1 402
OMIT 1%
CRITICAL 1/16W R7407
39 CSPA3 BSTA1 20 CPUIMVP_BOOT1 OUT 69 MF-LF 300
402 1 2 CPUIMVP_ISNS2_P
IN 49 69 85
78 46 10 OUT CPU_PROCHOT_L 5 VRHOT* DHA1 22 CPUIMVP_UGATE1 OUT 69
5%
LXA1 21 CPUIMVP_PHASE1 OUT 69 NO STUFF 1/16W
MF-LF
26 OUT CPUIMVP_PGOOD 19 POKA DLA1 23 CPUIMVP_LGATE1 OUT 69
C7408 402

C 73 OUT CPUIMVP_AXG_PGOOD 10
POKB CSPA1 36
CPUIMVP_ISUM1_P OUT 69
0.039UF
1 2 CPUIMVP_ISUM_R C
73 IN CPUIMVP_VR_ON 1 EN
CSPAAVE 35
CPUIMVP_ISUM 10%

CPU_VIDSOUT 16
VDIO CSNA 37
CPUIMVP_ISUM_N
1 C7404 10V
X5R-CERM
78 12 IN 0.0022UF 0402
78 12 IN CPU_VIDSCLK 18 CLK FBA 4
CPUIMVP_FBA 68
10%
2 50V
CERM C7409
78 12 IN CPU_VIDALERT_L 17
ALERT* 402 R7410
470PF
CSPA2 38
CPUIMVP_ISUM2_P 1 2 1
1
2
CPUIMVP_NTC 33 THERMA BSTA2 28
CPUIMVP_BOOT2 OUT 69
5%
CPUIMVP_NTCG 34 DHA2 26
CPUIMVP_UGATE2 5%
THERMB OUT 69
50V
1/16W
MF-LF
LXA2 27 CPUIMVP_PHASE2 OUT 69
1 C7405 NP0-C0G
402 NO STUFF 402

CPUIMVP_SLEW 32
SR DLA2 25
CPUIMVP_LGATE2 OUT 69
0.0022UF R7409
10% 40.2K
50V 1 2
2 CERM
CPUIMVP_IMAXA 29 BSTB 11 CPUIMVP_BOOT1G 402 1%
IMAXA OUT 69
1/16W
1 1 NO STUFF CPUIMVP_IMAXB 30
IMAXB DHB 13
CPUIMVP_UGATE1G OUT 69 OUT 69 OUT 69 MF-LF
R7468 R7466 1
R7464 1
R7462 1
R7460 LXB 12
CPUIMVP_PHASE1G OUT 69
402

5.76K 5.76K
1% 1% 200K 154K 215K DLB 14
CPUIMVP_LGATE1G OUT 69
1/16W 1/16W 1% 1% 1%
MF-LF MF-LF 1/16W 1/16W 1/16W
2 402 2 402 MF-LF MF-LF MF-LF
CSPB1 8
CPUIMVP_ISUMG_P
2
402
2 402 2 402 OUT 69 85

CSNB 9
CPUIMVP_ISUMG_N
NO STUFF
FBB 6
CPUIMVP_FBB 68
1 C7407

GNDSA

GNDSB
0.0022UF

THRM
PAD
10%
1 1 2 50V
CERM
402
CRITICAL CRITICAL 1 1 1
R7469 R7467 R7465 R7463 R7461

41
NO STUFF NO STUFF NO STUFF NO STUFF NO STUFF
OUT 69 85

100KOHM-1%-100MW 100KOHM-1%-100MW 200K 107K 137K 1

C7418 1
C7419 1
C7414 1
C7415 1
C7416
1% 1% 1% XW7400 100PF 100PF 100PF 100PF 100PF
0603 0603 1/16W 1/16W 1/16W SM
5% 5% 5% 5% 5%
MF-LF MF-LF MF-LF
B 2 2 2 402 2 402 2 402
2 1 2
50V
CERM
402
2
50V
CERM
402
2
50V
CERM
402
2
50V
CERM
402
2
50V
CERM
402
B
GND_CPUIMVP_SGND
MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.2 mm
VOLTAGE=0V 1
C7440
1000PF
5%
25V
1
C7412
2 NP0-C0G
402
R7440 1000PF
10 5%
CPU_AXG_SENSE_R 1 2 CPU_AXG_SENSE_N IN 12 78 2
25V
NP0-C0G
VOLTAGE=0V
5% R7412 402 R7413
1
C7441 1/16W 8.45K2 10
1000PF
MF-LF 68 CPUIMVP_FBA 1 CPUIMVP_FBA_R 1 2 CPU_VCCSENSE_P IN 12 78
402
5% 1% 5%
25V 1/16W 1/16W
2 NP0-C0G MF-LF MF-LF
402 R7441 402 402
10
CPU_VCCSENSE_R 1 2 CPU_VCCSENSE_N IN 12 78
VOLTAGE=0V
5%
C7422 1

1/16W 1000PF
OMIT OMIT MF-LF 5%
25V
1
C7442 1
C7443 402
NP0-C0G 2
NOSTUFF NOSTUFF R7422 402 R7423
NONE NONE 8.66K2 10
2
NONE
NONE 2
NONE
NONE 68 CPUIMVP_FBB 1 CPUIMVP_FBB_R 1 2 CPU_AXG_SENSE_P IN 12 78
402 402 1% 5%
1/16W 1/16W
MF-LF MF-LF
402 402

A SYNC_MASTER=JACK_K90I SYNC_DATE=10/14/2010 A
PAGE TITLE

CPU IMVP7 & AXG VCore Regulator

DRAWING NUMBER SIZE

Apple Inc. D
REVISION
R

NOTICE OF PROPRIETARY PROPERTY: BRANCH

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
74 OF 109
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART SHEET
IV ALL RIGHTS RESERVED 68 OF 86
8 7 6 5 4 3 2 1
 8 7 6 5 4 3 2 1

70 69 68 67 65 50 7 PPBUS_S5_HS_COMPUTING_ISNS
THESE TWO CAPS ARE FOR EMC
CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL
1 1 1 1 1 1 1 1
C7513 C7514 C7515 C7516 C7517 C7518 C7519 C7540
82UF 39UF-0.027OHM 10UF 10UF 1UF 0.001UF 0.001UF 33UF
20% 20% 10% 10% 10% 10% 10% 20%
16V 16V 16V 16V 50V 50V
2 2 16V 2 X5R-CERM 2 X5R-CERM 2 X5R 2 X7R 2 X7R 2 16V
ELEC POLY POLY-TANT
CPUIMVP_BOOT1_RC B6S-SM B1A-SM 0805 0805 402 402 402 CASED2E-SM
MIN_LINE_WIDTH=0.25 MM

PHASE 1 MIN_NECK_WIDTH=0.2 MM
DIDT=TRUE

D R7511
1
1
D
C7511
0 0.22UF
5%
10%
1/16W 10V
MF-LF 2 CERM 376S0906
402 2 402
CRITICAL CRITICAL

68 IN CPUIMVP_BOOT1 Q7510 R7510

MIN_LINE_WIDTH=0.25 MM
MIN_NECK_WIDTH=0.2 MM
R7515 DIDT=TRUE CSD58864Q5D CRITICAL 0.00075
4.7 SON5X6 VIN 1 L7510 1%
CPUIMVP_UGATE1 1 2 CPUIMVP_UGATE1_R 3 TG 1W
68 IN 0.36UH-20%-35A-0.00081OHM MF
MIN_LINE_WIDTH=0.5 MM DIDT=TRUE MIN_LINE_WIDTH=0.5 MM DIDT=TRUE
GATE_NODE=TRUE 5% GATE_NODE=TRUE PPVCORE_S0_CPU_PH1_L PPVCORE_S0_CPU_PH1 0612
MIN_NECK_WIDTH=0.2 MM
1/16W
MIN_NECK_WIDTH=0.2 MM
VSW 6 1 2 2 1 PPVCORE_S0_CPU 6 7 9 12 14 49 69
MF-LF DIDT=TRUE
68 CPUIMVP_PHASE1 402 4 TGR 7 FCUL1040-SM MIN_LINE_WIDTH=0.5 MM
MIN_NECK_WIDTH=0.25 MM 4 3
IN SWITCH_NODE=TRUE
MIN_LINE_WIDTH=1.5 MM
MIN_NECK_WIDTH=0.2 MM
DIDT=TRUE 8 MIN_LINE_WIDTH=0.5 MM
MIN_NECK_WIDTH=0.25 MM
NOSTUFF
152S1271
VOLTAGE=1.25V 85 49 CPUIMVP_ISNS1_N
SWITCH_NODE=TRUE 1
VOLTAGE=1.25V R7512 CPUIMVP_ISNS1_P 49 68 85
OUT
BG 2.2
68 IN CPUIMVP_LGATE1 5
5%
DIDT=TRUE 1/10W
MIN_LINE_WIDTH=0.5 MM
MIN_NECK_WIDTH=0.2 MM GATE_NODE=TRUE
PGND
MF-LF
603 2
R75131 1
R7514
46.4 10

9
1% 1%
CPUIMVP_PH1_SNUB 1/16W 1/16W
MIN_LINE_WIDTH=0.4 MM DIDT=TRUE
MF-LF MF-LF
MIN_NECK_WIDTH=0.2 MM NOSTUFF 402 2 2
402
VOLTAGE=1.25V
1
C7512 CPUIMVP_ISUM_N
IN 68 69
0.001UF
10%
50V NO STUFF
2 CERM
402
1 C7571
0.0022UF
10%
50V
2 CERM
402
CPUIMVP_ISUM1_P 68
IN

C 70 69 68 67 65 50 7 PPBUS_S5_HS_COMPUTING_ISNS C
THESE TWO CAPS ARE FOR EMC
CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL
1 1
C75251 1
C7526 1
C7527 1
C7528 1
C7529 1
C7523 C7524 C7530
82UF 39UF-0.027OHM 10UF 10UF 1UF 0.001UF 0.001UF 33UF
20% 20% 10% 10% 10% 10% 10% 20%
16V 16V 16V 50V 50V
2 16V 2 16V 2 X5R-CERM 2 X5R-CERM 2 X5R 2 X7R 2 X7R 2 16V
ELEC POLY POLY-TANT
CPUIMVP_BOOT2_RC B6S-SM B1A-SM 0805 0805 402 402 402 CASED2E-SM
MIN_LINE_WIDTH=0.25 MM

PHASE 2 MIN_NECK_WIDTH=0.25 MM
DIDT=TRUE

1
R7521 1
C7521
0 0.22UF
5%
1/16W 10%
10V
MF-LF 2
402 2
CERM 376S0906
402
CRITICAL CRITICAL

68 IN CPUIMVP_BOOT2 Q7520 R7520

MIN_LINE_WIDTH=0.25 MM
MIN_NECK_WIDTH=0.2 MM
R7525 DIDT=TRUE CSD58864Q5D CRITICAL 0.00075
4.7 SON5X6 VIN 1 L7520 1%
CPUIMVP_UGATE2 1 2 CPUIMVP_UGATE2_R 3 TG 1W
68 IN 0.36UH-20%-35A-0.00081OHM MF
MIN_LINE_WIDTH=0.5 MM GATE_NODE=TRUE MIN_LINE_WIDTH=0.5 MM DIDT=TRUE
DIDT=TRUE 5% GATE_NODE=TRUE PPVCORE_S0_CPU_PH2_L PPVCORE_S0_CPU_PH2 0612
MIN_NECK_WIDTH=0.2 MM
1/16W
MIN_NECK_WIDTH=0.25 MM
VSW 6 1 2 1 2 PPVCORE_S0_CPU 6 7 9 12 14 49 69
MF-LF DIDT=TRUE
68 CPUIMVP_PHASE2 402 4 TGR 7 FCUL1040-SM MIN_LINE_WIDTH=0.5 MM
MIN_NECK_WIDTH=0.25 MM 3 4
IN SWITCH_NODE=TRUE
MIN_LINE_WIDTH=1.5 MM
MIN_NECK_WIDTH=0.2 MM
DIDT=TRUE
SWITCH_NODE=TRUE 8 MIN_LINE_WIDTH=0.5 MM
MIN_NECK_WIDTH=0.25 MM 152S1271
VOLTAGE=1.25V 85 49 CPUIMVP_ISNS2_N
VOLTAGE=1.25V
CPUIMVP_ISNS2_P 49 68 85
68 CPUIMVP_LGATE2 5 BG OUT
IN
MIN_LINE_WIDTH=0.5 MM DIDT=TRUE
MIN_NECK_WIDTH=0.2 MM GATE_NODE=TRUE
PGND
Removed snubber with EMC’s comment R75231 1
R7524
46.4 10
9

1% 1%
1/16W 1/16W
B MF-LF
402 2 2
MF-LF
402 B
CPUIMVP_ISUM_N 68 69
IN
NO STUFF
1 C7572
0.0022UF
10%
50V
2 CERM
402
CPUIMVP_ISUM2_P 68
IN

70 69 68 67 65 50 7 PPBUS_S5_HS_COMPUTING_ISNS
THESE TWO CAPS ARE FOR EMC
CRITICAL CRITICAL CRITICAL CRITICAL
1 1 1 1 1 1 1 1
C7553 C7554 C7555 C7556 C7557 C7558 C7559 C7560
82UF 39UF-0.027OHM10UF 10UF 1UF 0.001UF 0.001UF 33UF
CPUIMVP_UGATE1G_R 20% 20% 10%
16V
10%
16V
10%
16V
10%
50V
10%
50V
20%
MIN_NECK_WIDTH=0.25 MM DIDT=TRUE 2 16V 2 16V 2 X5R-CERM 2 X5R-CERM 2 X5R 2 X7R 2 X7R 2 16V
MIN_LINE_WIDTH=0.5 MM GATE_NODE=TRUE 376S0906 ELEC POLY POLY-TANT
B6S-SM B1A-SM 0805 0805 402 402 402 CASED2E-SM
CRITICAL
CPUIMVP_BOOT1G_RC CRITICAL

AXG PHASE MIN_LINE_WIDTH=0.25 MM

MIN_NECK_WIDTH=0.25 MM
DIDT=TRUE
Q7550
CSD58864Q5D
VIN
CRITICAL
R7550
0.00075
3 TG SON5X6 1 L7550 1%
1W
0.36UH-20%-35A-0.00081OHM MF
PPVCORE_S0_AXG_R 0612
R7551
1 VSW 6 CPUIMVP_VSWG 1 2 1 2 PPVCORE_S0_AXG 6 7 9 12 15 49
1
C7551 4 TGR 7 MIN_LINE_WIDTH=0.5 MM FCUL1040-SM MIN_LINE_WIDTH=0.5 MM 3 4
0 0.22UF MIN_NECK_WIDTH=0.25 MM
NOSTUFF
MIN_NECK_WIDTH=0.25 MM
5% SWITCH_NODE=TRUE VOLTAGE=1.05V
10% 8 1
1/16W
MF-LF
10V
2
DIDT=TRUE R7552 152S1271 85 49 CPUIMVP_ISNS1G_P 85 49 CPUIMVP_ISNS1G_N
CERM
402 402 2.2
2
5 BG 5%
1/10W
R75531 1
R7554
68 IN CPUIMVP_BOOT1G MF-LF 46.4 10
MIN_LINE_WIDTH=0.25 MM
MIN_NECK_WIDTH=0.2 MM
DIDT=TRUE R7555 PGND 2 603 1%
1/16W
1%
1/16W
4.7
A CPUIMVP_UGATE1G 1 2
MF-LF MF-LF
A
9

68 IN CPUIMVP_AXG_SNUB 402 2 2
402
MIN_NECK_WIDTH=0.2 MM DIDT=TRUE SYNC_MASTER=JACK_K90I SYNC_DATE=09/03/2010
MIN_LINE_WIDTH=0.5 MM GATE_NODE=TRUE 5%
1/16W NOSTUFF
DIDT=TRUE PAGE TITLE
68 IN CPUIMVP_PHASE1G MF-LF
MIN_LINE_WIDTH=0.4 MM
MIN_NECK_WIDTH=0.2 MM
MIN_LINE_WIDTH=1.5 MM DIDT=TRUE 402 1
C7552 VOLTAGE=1.25V CPU IMVP7 & AXG VCore Output
MIN_NECK_WIDTH=0.2 MM SWITCH_NODE=TRUE 0.001UF CPUIMVP_ISUMG_N 68 85 DRAWING NUMBER SIZE
CPUIMVP_LGATE1G 10% IN
68 IN
MIN_LINE_WIDTH=0.5 MM
MIN_NECK_WIDTH=0.2 MM
DIDT=TRUE
GATE_NODE=TRUE
2
50V
CERM
Apple Inc. D
402
REVISION
1 C7574 R

0.001UF NOTICE OF PROPRIETARY PROPERTY: BRANCH

10%
50V
2 X7R THE INFORMATION CONTAINED HEREIN IS THE
402 PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE 75 OF 109
CPUIMVP_ISUMG_P 68 85
II NOT TO REPRODUCE OR COPY IT
SHEET
IN III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED 69 OF 86
8 7 6 5 4 3 2 1
 8 7 6 5 4 3 2 1

D D
CPU VCCIO (1.05V S0) Regulator

69 68 67 65 50 7 PPBUS_S5_HS_COMPUTING_ISNS
72 68 65 54 52 47 42 22 7 6 PP5V_S0
77 73
CPUVCCIOS0_VBST_RC
MIN_LINE_WIDTH=0.3 mm
MIN_NECK_WIDTH=0.2 mm CRITICAL CRITICAL
1DIDT=TRUE
R76011 1
C7601 R7630 1
C7620 1
C7621 1
C7622
2.2 10UF
20%
0 39UF-0.027OHM 39UF-0.027OHM 1000PF
5%
5% 5% 20% 20%
10V 25V
1/16W 2 X5R 1/16W 2 16V 2 16V 2 NP0-C0G
MF-LF MF-LF POLY POLY

C PP5V_S0_CPUVCCIOS0_VCC
402 2 603
2 402
1
C7630
B1A-SM B1A-SM 402
PLACE_NEAR=Q7630.1:1.5mm C
78 12 CPU_VCCIOSENSE_P MIN_LINE_WIDTH=0.6 mm CPUVCCIOS0_VBST 1UF
10%
MIN_NECK_WIDTH=0.2 mm MIN_LINE_WIDTH=0.3 mm 16V
VOLTAGE=5V MIN_NECK_WIDTH=0.2 mm 2

13

14
CPU_VCCIOSENSE_N X5R
78 12 DIDT=TRUE 402

VCC PVCC
R7604 1 1
R7644 U7600 2
3.01K 3.01K CRITICAL
1% 1% ISL95870 CRITICAL
1/16W 1/16W Q7630
MF-LF
402
MF-LF
402 CPUVCCIOS0_EN 3
EN
UTQFN
BOOT 12
FDMS3602S CRITICAL
R7640
73 71 IN
2 2 CPUVCCIOS0_DRVH 0.001
<Ra> 6 CRITICAL 11 MIN_LINE_WIDTH=0.6 mm
1 POWER56 L7630 1%
CPUVCCIOS0_FB FB UGATE MIN_NECK_WIDTH=0.2 mm 0.68UH-18A-3.3MOHM
1W
GATE_NODE=TRUE MF-1 PP1V05_S0 6 7 9 10 12 14 16 17 20 22 23
DIDT=TRUE 0612 36 40 45 68 73
CPUVCCIOS0_SREF 4
SREF PHASE 10 CPUVCCIOS0_LL 7 1 2 PPCPUVCCIO_S0_REG_R 1 2
MIN_LINE_WIDTH=1.5 mm
PCMB103T
MIN_LINE_WIDTH=0.6 mm
3 4
Vout = 1.05V
8 15 MIN_NECK_WIDTH=0.2 mm MIN_NECK_WIDTH=0.2 mm
CPUVCCIOS0_VO VO LGATE SWITCH_NODE=TRUE VOLTAGE=1.05V
DIDT=TRUE
1 18A Max Output
CPUVCCIOS0_OCSET 7 CPUVCCIOS0_DRVL 6 C7623
OCSET
MIN_LINE_WIDTH=0.6 mm
R7631 1000PF f = 300 kHz
CPUVCCIOS0_PGOOD 9 MIN_NECK_WIDTH=0.2 mm
2
2.2 1 CPUVCCSAS0_SNUB
5%
25V
73 OUT PGOOD GATE_NODE=TRUE NP0-C0G 2
DIDT=TRUE MIN_LINE_WIDTH=0.6 MM
5% DIDT=TRUE 402
CPUVCCIOS0_RTN 2 1/10W
RTN 3 4 5 MIN_NECK_WIDTH=0.2 MM
MF-LF
603
CPUVCCIOS0_FSEL 5
FSEL NOSTUFF
R7605 1 1
R7645 GND PGND NOSTUFF
2.74K 2.74K 1
1
C7631
1

16

1% 1%
C7602 1 R7603
1/16W
MF-LF
1/16W
MF-LF 0 0.001UF
402 402
2.2UF 5%
10%
2 2 10%
1/16W 2 50V
CERM
<Rb> 16V
X5R 2 MF-LF 402
603 402
2

C7604 1 1
C7605 1
C7603
B 47PF
5%
50V
47PF
5%
50V
0.047UF
10%
B
CERM 2 2 CERM 2
16V
X7R
XW7600
402 402 402 SM
CPUVCCIOS0_AGND 1 2 85 49 CPUVCCIOS0_CS_P
MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.2 mm PLACE_NEAR=U7600.1:1mm 85 49 CPUVCCIOS0_CS_N
VOLTAGE=0V
R76411
2.67K
1%
1/16W
MF-LF C7640
402 2
1000PF
2 1

5%
1
25V
NP0-C0G R7642
402 2.67K
1%
1/16W
MF-LF
(CPUVCCIOS0_OCSET) 2 402

(CPUVCCIOS0_VO)

OCP = R7641 x 8.5uA / R7640

OCP = 22.695A
Vout = 0.5V * (1 + Ra / Rb)

A SYNC_MASTER=JACK_K90I SYNC_DATE=08/19/2010 A
PAGE TITLE

CPUVCCIO (1.05V) Power Supply

DRAWING NUMBER SIZE

Apple Inc. D
REVISION
R

NOTICE OF PROPRIETARY PROPERTY: BRANCH

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
76 OF 109
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART SHEET
IV ALL RIGHTS RESERVED 70 OF 86
8 7 6 5 4 3 2 1
 8 7 6 5 4 3 2 1

CAESAR IV 1.2V INT.VR CMPTS

CRITICAL
L7700
1.05V S5 LDO
4.7UH-0.91A Cougar Point requires JTAG pull-ups to be powered at 1.05V in S5.
D 73 37 26 7 6 PP3V3_ENET 1 2 ENET_SR_LX 37
Pull-ups (3) must be 51 ohms to support XDP (not required in production). D
PLE031B-SM
70mA is required to support pull-ups. Alternative is strong voltage
MIN_LINE_WIDTH=0.4MM
PLACE_NEAR=U3900.16:1mm MIN_NECK_WIDTH=0.2MM dividers (200/100) to 3.3V S5, which burns 100mW in all S-states.
1 1 VOLTAGE=1.2V
C7717 C7718 SWITCH_NODE=TRUE
CRITICAL
4.7UF 0.1UF DIDT=TRUE
20% 10% XDP_PCH
6.3V 16V
2 CERM 2 X5R
603 402 XW7700
SM
U7740
TPS720105
1 2 ENET_SR_VFB 37 73 72 46 22 20 19 18 17 16 7 PP3V3_SUS SON
MIN_LINE_WIDTH=0.25MM 4 BIAS
PP1V05_SUS 7 23
PLACE_NEAR=C7725.1:1mm MIN_NECK_WIDTH=0.2MM
VOLTAGE=1.2V
PLACE_NEAR=U3900.14:1mm 6 IN OUT 1
Vout = 1.05V
PLACE_NEAR=U3900.14:3mm
PP1V2_S3_ENET_INTREG 6 37 71
3 EN NC 2
Max Current = 0.35A
NC
XDP_PCH THRM
XDP_PCH
C7740 1 GND PAD 1 C7741
PP1V2_S3_ENET_INTREG 6 37 71
1UF 5 7 2.2UF
MAKE_BASE=TRUE 10% 10%
MIN_LINE_WIDTH=0.25MM 6.3V 6.3V
MIN_NECK_WIDTH=0.2MM CERM 2 2 X5R
1 C7725 1 C7726 VOLTAGE=1.2V 402 402
10UF 0.1UF
20% 10%
2 6.3V
X5R
16V
2 X5R
603-2 402

PLACE_NEAR=L7700.1:1mm
PLACE_NEAR=L7700.1:3mm

C Vout = 1.8V C
1.8V S0 Switcher MAX CURRENT = 2A
F = 1MHZ
71 62 61 57 54 52 51 50 49 48
23 22 20 19 18 17 16 12 8 7 6 PP3V3_S0
46 42 41 40 37 36 33 29 27 26
85 77 75 74 73 72

1 C7760 1 C7761
22UF 0.1UF
20% 10%
2 6.3V
CERM-X5R 2 16V
X5R
U7760
805 402-1 MAX15053EWL CRITICAL
WLP
B2 SKIP CRITICAL IN A3
L7760
1.0UH-20%-11A-0.013OHM
PP1V8_S0
73 IN P1V8S0_EN B3 EN LX A2 P1V8S0_SW 1 2 6 7 14 17 20 22 26 71
MIN_LINE_WIDTH=0.4 mm PIC0503H-SM
MIN_NECK_WIDTH=0.2 mm
P1V8S0_SS C2 SS/REFIN PGOOD C3 SWITCH_NODE=TRUE 1 1
DIDT=TRUE R7767 R7760 1 C7766
1 C7764 R7765 C1 FB 10K
1% NOSTUFF
20.0K
1% 100PF
0.022UF 3.24K2 1/16W 1/16W 5%
50V
1 C7762 1 C7772 1 C7763
10% P1V8_S0_COMP_RC 1 P1V8S0_COMP B1 COMP P1V8S0_PGOOD MF-LF MF-LF 2 CERM
16V
2 CERM-X5R
OUT 73
22UF 22UF 0.1UF
1% GND 2 402 2 402 402 20% 20% 10%
402 1/16W 6.3V 6.3V 16V
2 X5R-CERM-1 2 X5R-CERM-1 2 X5R
MF-LF

A1
402 P1V8_S0_RC 603 603 402-1

P1V8SO_FB
1 C7765
1 C7767 1
R7761
100PF 10K
1500PF 5%
50V 1%
10% 2 CERM NOSTUFF 1/16W
25V
2 X7R 402 MF-LF
402 2 402

B B

1.5V S0 Switcher 1.05V S0 LDO

CRITICAL
PP1V5_S0 7 16 20 22 26 42 57

71 62 61 57 54 52 51 50 49 48
23 22 20 19 18 17 16 12 8 7 6 PP3V3_S0 Vout = 1.5V U7780
46 42 41 40 37 36 33 29 27 26 TPS720105
85 77 75 74 73 72 1 MAX CURRENT = 0.3A SON PP1V05_S0_PCH_VCCADPLL
CRITICAL 71 62 61 57 54 52 51 50 49 48
PP3V3_S0 4 BIAS
C7770 1 1 CRITICAL L7770 F = 1MHZ 23 22 20 19 18 17 16 12 8 7 6
46 42 41 40 37 36 33 29 27 26
85 77 75 74 73 72
Vout = 1.05V
10uF 10UH-0.55A-330MOHM 71 26 22 20 17 14 7 6 PP1V8_S0 6 IN OUT 1
20% VI PCAA031B-SM Max Current = 0.35A
6.3V 2
X5R U7770 1 C7773 73 70 CPUVCCIOS0_EN 3 EN NC 2 NC
603 TPS62201 10uF
SOT23-5 2 20% THRM
4 FB 6.3V
2 X5R C7782 1 C7780 1 GND PAD 1 C7781
73 IN P1V5S0_EN 3 EN SW 5 P1V5S0_SW 603 1UF 1UF 5 7 2.2UF
MIN_LINE_WIDTH=0.4 mm 10% 10% 10%
6.3V 6.3V 6.3V
GND MIN_NECK_WIDTH=0.2 mm CERM 2 CERM 2 2 X5R
A 2
SWITCH_NODE=TRUE
DIDT=TRUE 402 402 402
SYNC_MASTER=JACK_K90I SYNC_DATE=08/19/2010 A
PLACE_NEAR=U7780.4:1mm PAGE TITLE
PLACE_NEAR=U7780.6:1mm Misc Power Supplies
DRAWING NUMBER SIZE

Apple Inc. D
REVISION
R

NOTICE OF PROPRIETARY PROPERTY: BRANCH

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
77 OF 109
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART SHEET
IV ALL RIGHTS RESERVED 71 OF 86
8 7 6 5 4 3 2 1
 8 7 6 5 4 3 2 1

R7803
0
1
5%
1/10W
2
3.3V S0 FET CRITICAL
Q7830
MF-LF
603
SIA427DJ
SC70-6L
3.3V S4 FET CRITICAL PP3V3_S0 48 49 50 51 52 54 57 61 62 71
6 7 8 12 16 17 18 19 20 22 23

7
Q7800 30 26 24 23 22 20 19 17 8 7 6 PP3V3_S5 26 27 29 33 36 37 40 41 42 46
73 74 75 77 85
85 76 74 73 72 66 56 46

D
4

1
SIA427DJ
SC70-6L 3.3V S0 FET
1 C7831
R7832 1
PP3V3_S5
D

G
D 30 26 24 23 22 20 19 17 8 7 6
85 76 74 73 72 66 56 46 10K 0.033UF MOSFET SiA427

S
D 3

D
PP3V3_S4 Q7812

1
10%
7 46 53 54 5% 16V
1/16W

3
X5R 2
NO STUFF NO STUFF SSM6N37FEAPE MF-LF CHANNEL P-TYPE 8V/5V
402
2 402
SOT563
1
R7802 C7809 C7830
1
R7830 RDS(ON) 26 mOhm @1.8V

G
Q7802 D 6
5%
220K 0.033UF
10%
16V
NO STUFF
3.3V S4 FET P3V3S0_EN_L 1
91K 2 P3V3S0_SS
0.01UF
1 2
SSM6N37FEAPE 1/16W NO STUFF 5 G S 4 LOADING 3.2 A (EDP)

3
NO STUFF X5R 2
PM_SLP_S3_R_L 5%
SOT563 MF-LF 73 72 49 IN
2 402
402
C7800 MOSFET SiA427 1/16W 10%

R7800
5.1K 0.01UF
CHANNEL P-TYPE 8V/5V
MF-LF
402
16V
CERM
402
P3V3S4_EN_L 1 2 P3V3S4_GATE
73 IN P3V3_S4_EN
2 G S 1
5%
1/16W
MF-LF
1

10%
16V
2

RDS(ON) 26 mOhm @1.8V 3.3V_SUS FET Q7820 CRITICAL

402 CERM
402
LOADING 1.35 A (EDP) SIA427DJ
SC70-6L

PP3V3_S5

7
30 26 24 23 22 20 19 17 8 7 6
85 76 74 73 72 66 56 46

D
PP3V3_SUS

1
7 16 17 18 19 20 22 46 71 73

1
R7822 C7821 1
3.3V SUS FET

G
Q7822 D 6 100K 0.033UF
5% 10%
SSM6N37FEAPE 1/16W 16V 2

3
SOT563 MF-LF X5R

3.3V S3 FET 2 402

402
C7820 MOSFET SiA427
CRITICAL
Q7810 R7820
12K 0.01UF
CHANNEL P-TYPE 8V/5V
SIA427DJ 2 G S 1 P3V3SUS_EN_L 1 2 P3V3SUS_SS 1 2

SC70-6L 73 72 IN PM_SUS_EN 5% 10% RDS(ON) 26 mOhm @1.8V

1/16W 16V
MF-LF CERM LOADING 100? mA (EDP)
7
30 26 24 23 22 20 19 17 8 7 6 PP3V3_S5 402 402
85 76 74 73 72 66 56 46

D
4

1
PP3V3_S3 6 7 8 18 24 26 30 31 32 33 48
50 54 55 73

C Q7812 D 6
R7812
1
100K
C7811
0.033UF
10%
1
G
3.3V S3 FET
5V_SUS FET CRITICAL
Q7840
C
SSM6N37FEAPE
5% 16V
1/16W SIA413DJ
3

X5R 2
SOT563 MF-LF
2402
402
C7810 MOSFET SiA427 SC70-6L
R7810 PP5V_S5

4 7
0.01UF 72 66 54 7
47K CHANNEL P-TYPE 8V/5V

D
PP5V_SUS

1
P3V3S3_EN_L 1 2 P3V3S3_SS 1 2
2 G S 1 7 22

73 IN P3V3S3_EN 5%
1/16W 10%
RDS(ON) 31 mOhm @1.8V
MF-LF 16V 1
R7842 C7841 1
CERM
LOADING 1.608 A (EDP)
5V SUS FET

G
402
402
Q7822 D 3 220K 0.033UF
5% 10%
SSM6N37FEAPE 16V
1/16W X5R 2

3
SOT563 MF-LF 402
2 402 C7840 MOSFET SiA427
R7840
3.3K 0.01UF
CHANNEL P-TYPE 8V/5V
5 G S 4 P5VSUS_EN_L 1 2 P5VSUS_SS 1 2
73 72 IN PM_SUS_EN 5% 10% RDS(ON) 16 mOhm @4.5V
1/16W 16V
MF-LF CERM
402 402 LOADING 100? mA (EDP)

1.5V S3/S0 FET

67 30 29 27 7 6 PP1V5_S3 5.0V S0 FET CRITICAL
Q7860
72 66 54 7 PP5V_S5
TPCP8102
1
PP5V_S0 6 7 22 42 47 52 54 65 68 70 73
C7801 23V1K-SM 77

5 6 7 8
0.1UF

1 2 3
PP5V_S3
1

20%
60 59 57 46 44 43 42 32 30 7 6
10V
5.0V S0 FET

D
2 67 66 61
VCC
CERM
402 5 APN 376S0928

B U7801 R7862
1
C7861 B

G
1
MOSFET TPCP8102
SLG5AP020 CRITICAL 220K 0.033UF

4
D 5%
P1V5CPU_EN 2 TDFN
30 IN ON D 5 R7801 Q7801 1/16W 10%
CHANNEL P-TYPE
CRITICAL MF-LF 16V
2

3 7 1
0 2 4
SI7108DN 2402
X5R
402 C7860
SHDN* G G PWRPK-1212-8-HF R7860 0.01UF
RDS(ON) 18 MOHM @4.5V
NO STUFF 6
P1V5S0FET_GATE 5% P1V5S0FET_GATE_R 10K
S 1/16W S P5V0S0_EN_L 1 2 P5V0S0_SS 1 2
LOADING 1.678 A (EDP)
C7802 1 MF-LF
402
4.7UF PG 8 1 2 3 PP1V5_S3RS0 6 7 10 12 15 30 73 85
5%
1/16W 10%
10% MF-LF 16V
6.3V THRM CERM
X5R-CERM 2 GND PAD
402
402
603
4

Q7802 D 3
SSM6N37FEAPE

1.5V S3/S0 FET SOT563

TP_P1V5S3RS0_RAMP_DONE MOSFET SI7108DN 5 G S 4

8
OUT
73 72 49 IN PM_SLP_S3_R_L
CHANNEL N-TYPE
RDS(ON) 6 mOhm @4.5V
LOADING 5 A (EDP)

A SYNC_MASTER=JACK_K90I SYNC_DATE=10/22/2010 A
PAGE TITLE

Power FETs
DRAWING NUMBER SIZE

Apple Inc. D
REVISION
R

NOTICE OF PROPRIETARY PROPERTY: BRANCH

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
78 OF 109
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART SHEET
IV ALL RIGHTS RESERVED 72 OF 86
8 7 6 5 4 3 2 1