Et1201 Electronic Engineering Principles: Boolean & Demorgan'S Theorems

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ET1201

ELECTRONIC ENGINEERING PRINCIPLES

CHAPTER 3:
Boolean & DeMorgan’s Theorems
Part 3: Sections 3.10, 3.11, 3.12

ET1201/Chap3: Describe logic circuits/part 3 3B -1


OBJECTIVES:
• DeMorgan’s Theorems

• Universal NAND gates and NOR


gates

ET1201/Chap3: Describe logic circuits/part 3 3B -2


When designing a circuit…
• How can you achieve a simpler
circuit design ?

• How can you ensure the circuit


uses minimum number of logic
gates ?

• How to reduce the number of ICs


used in circuit design ?

ET1201/Chap3: Describe logic circuits/part 3 3B -3


3.10 Boolean Theorems

Boolean theorems are RULES that help to :


– Simplify logic circuits expression;

– Achieve simpler logic circuits and

– Reduce the number of logic gates


used in the circuit.

ET1201/Chap3: Describe logic circuits/part 3 3B -4


Single variable theorems (OR):
X
X+0 = X X
0

X
X+1 = 1 1
1

X
X+X= X X

X
X+X =1 1

ET1201/Chap3: Describe logic circuits/part 3 3B -5


Single variable theorems
(AND):
X
X•0 = 0 0
0

X
X•1 = X X
1

X•X= X X X

X•X =0 X 0

ET1201/Chap3: Describe logic circuits/part 3 3B -6


Multi-variable theorems: The order we AND
or OR two variables
Commutative is not important!
laws x+y = y+x
x.y = y.x

Associative
laws x + (y + z) = (x + y) + z = x + y + z

x(yz)=(xy)z=xyz

We can group variables in


an AND or OR expression!

ET1201/Chap3: Describe logic circuits/part 3 3B -7


Multi-variable theorems: Expansion by
multiplying term
Distributive by term!
laws x (y + z) = x y + x z

(w + x) (y + z) = w y + x y + w z + x z

x +xy = x Common variable


is factored out
Special x + x y = x +y
theorems! x + xy = x+y

ET1201/Chap3: Describe logic circuits/part 3 3B -8


LET’S REVISE (part 1) :

• A+1= 1

• A .A= A

• B. B= 0

• C+C= C LEARNING ACTIVITY:

Can you use Multisim to


• X . 0= 0 simulate these circuits?

ET1201/Chap3: Describe logic circuits/part 3 3B -9


LET’S REVISE (part 2):

• D . 1 = D

• D + 0= D

• C + C = 1

• G + GF = G

• y +wy= y

ET1201/Chap3: Describe logic circuits/part 3 3B -10


3.10 Boolean Theorems
Let’s
• RECALL… Boolean theorems help to : illustrate
this!
– Simplify logic circuits expression;
– Achieve simpler logic circuits and
– Reduce the number of logic gates used
in the circuit.

ET1201/Chap3: Describe logic circuits/part 3 3B -11


Consider this complex logic circuit:

AB
A ABC
C
B
B X  ABC  ABC  B
ABC
C
B
C
A AB
Has 6 gates in
3 ICs

ET1201/Chap3: Describe logic circuits/part 3 3B -12


How to simplify ? Use Boolean
theorems!

X  ABC  ABC  B Factor common


variable “A C”
 A C (B  B )  B
X +X =1
 AC .1 B
 AC  B
 A simpler expression…
 A simpler circuit
ET1201/Chap3: Describe logic circuits/part 3 3B -13
What happens to original complex
circuit after simplifying?

AB
A ABC
C
B
B X  ABC  ABC  B
ABC
C
B
C
A AB

ET1201/Chap3: Describe logic circuits/part 3 3B -14


Circuit reduced to this…. after
simplifying!

A
C X = AC + B
B
From original 6 gates in 3
ICs, circuit now has 2
gates in 2 ICs !!!

ET1201/Chap3: Describe logic circuits/part 3 3B -15


3.11 DeMorgan’s theorems
• DeMorgan’s theorems are good for:
– Simplifying expressions containing a
product (A.B) or a sum (A+B) which is
inverted.
E.g. A.B , A  B

– Converting one gate to equivalent.

ET1201/Chap3: Describe logic circuits/part 3 3B -17


DeMorgan’s theorem (1) states:
(1) x y  x. y

x x
x+y x.y
y
y

 NOR gate = AND gate with inverted


inputs

ET1201/Chap3: Describe logic circuits/part 3 3B -18


DeMorgan’s theorem (2) states:
(2) x.y  xy

=
x
x.y x+y
y y

 NAND gate = OR gate with inverted


inputs

ET1201/Chap3: Describe logic circuits/part 3 3B -19


Simplifying using DeMorgan’s:
• Given the expression: X  ( A B C) . B C

X  ( A B C) . B C DeMorgan' s theorem (1) :


x. y  x  y
Distributive law :
 ( A  B  C) . B C x (y + z) = x y + x z

0 0
Single variable
theorem: x . x = 0
 A BC  BBC  C BC

 A BC
ET1201/Chap3: Describe logic circuits/part 3 3B -20
Use DeMorgan’s to simplify:

X  ( AB  B C) . BC
DeMorgan' s theorem (1) :
x. y  x  y

 ( AB  BC )  BC Double inversion

 (AB  BC )  BC Associative law

 AB  ( BC  BC) X+ X = 1

 AB  1 X+ 1 = 1
1
ET1201/Chap3: Describe logic circuits/part 3 3B -21
After simplifications:
X  ( AB  B C) . BC (unsimplif ied)
1 (simplifie d)

A
X = logic ’1’
B
x +5v

C Gnd

Un-simplified circuit Simplified circuit

ET1201/Chap3: Describe logic circuits/part 3 3B -22


Gate conversions
DeMorgan’s theorems help to substitute one
gate with an equivalent one …E.g.

x x

x x x x

ET1201/Chap3: Describe logic circuits/part 3 3B -23


3.12 Universal NAND gates

ET1201/Chap3: Describe logic circuits/part 3 3B -24


Demand for NAND gates in SSD

ET1201/Chap3: Describe logic circuits/part 3 3B -25


3.12 Universality of NAND
gatesAny gate can be replaced
by all-NAND equivalent…

x x
x x

A A
X = AB X = AB
B B

A
A X=A+B
X=A+B
B
B

ET1201/Chap3: Describe logic circuits/part 3 3B -26


Implement NOT & OR using all-NAND
gates

x
x.x = x = x ?

 NOT

A
A
X= (A . B )
=A+B?
B B

 OR

ET1201/Chap3: Describe logic circuits/part 3 3B -27


3.12 NAND equivalent of NOT, AND & OR
gates

x x
x x

A
A X = A.B
B X=AB B

A
X=A+B
A
X=A+B B
B

ET1201/Chap3: Describe logic circuits/part 3 3B -28


3.12 NOR equivalent of NOT, AND & OR gates

x x x x

A A
X=A+B X=A+B
B B

A
A
X = AB
B X = A.B
B

ET1201/Chap3: Describe logic circuits/part 3 3B -29


NAND as universal gate:
To replace this circuit with only NAND gates:
E.g A
C X = AC + B
B

Use DeMorgan’s:
X  AC  B A AC
C
AC  B B
X

AC . B B

ET1201/Chap3: Describe logic circuits/part 3 3B -30


WHY all-NAND?
A
C X = AC + B
B

It reduces
package cost
All-NAND equivalent circuit :
A
C
X
B

ET1201/Chap3: Describe logic circuits/part 3 3B -31


NOR as universal gate:
A
C X = AC + B
B

Replacing with NOR gates ONLY :


X  AC  B X  A C B
A
 AC  B X
C
A C B
B
A C B
ET1201/Chap3: Describe logic circuits/part 3 3B -32
Why All-NOR?
A
C X = AC + B
B

All-NOR equivalent circuit:


It reduces
package cost
A

X
C

ET1201/Chap3: Describe logic circuits/part 3 3B -33


TUTORIAL problems:
[Reference book]

• Gp2 Q3-22, Q3-24, Q 3-26 (g)


• Gp3 Q3-22, Q3-24, Q 3-26 (h)
• Gp4 Q3-22, Q3-24, Q 3-26 (c)
• Gp1 Q3-22, Q3-24, Q 3-26 (i)

ET1201/Chap3: Describe logic circuits/part 3 3B -34

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