Analog Electronics LAB MANUAL-2016 (Cbcs Scheme) : Rns Institute of Technology

ANALOG ELECTRONICS
LAB MANUAL-2016
[CBCS SCHEME ]
Subject Code: 15ECL37
RNS INSTITUTE OF TECHNOLOGY

ANALOG ELECTRONICS LAB MANUAL-2016 [CBCS SCHEME ]
Department of ECE, RNS Institute of Technology. Page | 1


Experiment No 1:-
Rectifier Circuits
Aim: To design and verify the performance of Center tap full wave rectifier and Bridge rectifier
with and without ‘C’ filter.
Components required:
SI. No. Components Range Quantity
1. Transformer As per design 01
2. Diode(1N4007) - 04
3. Resistors & Capacitors As per design -
4. Multimeter, CRO - 01
5. CRO Probes - 02 Set
6. Spring board and connecting wires - -
Theory:
Full Wave Rectifier Working & Operation
The working & operation of a full wave bridge rectifier is pretty simple. The
circuit diagrams and wave forms we have given below will help you understand
the operation of a bridge rectifier perfectly. In the circuit diagram, 4 diodes are
arranged in the form of a bridge. The transformer secondary is connected to two
diametrically opposite points of the bridge at points A & C. The load resistance RL
is connected to bridge through points B and D.

During the first half cycle
During first half cycle of the

input voltage, the upper
end of the transformer
secondary winding is
positive with respect to the
lower end. Thus during the
first half cycle diodes D1
and D3 are forward biased
and current flows through
arm AB, enters the load
resistance RL, and returns
back flowing through arm
DC. During this half of each
input cycle, the diodes
D2 and D4 are reverse
biased and current is not
allowed to flow in arms AD
and BC. The flow of current
is indicated by solid arrows
in the figure above. We
have developed another
diagram below to help you
understand the current
flow quickly. See the
diagram below – the green
arrows indicate beginning
of current flow from source
(transformer secondary) to
the load resistance. The red
arrows indicate return path
of current from load
resistance to the source,
thus completing the circuit.

230V / 50Hz
Flow of current in Bridge Rectifier
During the second half cycle
During second half cycle of the input voltage, the lower end of the transformer
secondary winding is positive with respect to the upper end. Thus diodes D2 and
D4 become forward biased and current flows through arm CB, enters the load
resistance RL, and returns back to the source flowing through arm DA. Flow of
current has been shown by dotted arrows in the figure. Thus the direction of flow
of current through the load resistance RL remains the same during both half cycles
of the input supply voltage. See the diagram below – the green arrows indicate
beginning of current flow from source (transformer secondary) to the load
resistance. The red arrows indicate return path of current from load resistance to
the source, thus completing the circuit.
Path of current in 2nd Half Cycle

Centre-Tap Full Wave Rectifier

We have already discussed the Full Wave Bridge Rectifier, which uses four diodes,
arranged as a bridge, to convert the input alternating current (AC) in both half
cycles to direct current (DC).
In the case of center-tap full wave rectifier, only two diodes are used, and are
connected to the opposite ends of a center-tapped secondary transformer as
shown in the figure below. The center-tap is usually considered as the ground
point or the zero voltage reference point.
Working of Centre-Tap Full Wave Rectifier
As shown in the figure, an AC input is applied to the primary coils of the

transformer. This input makes the secondary ends P1 and P2 become positive and
negative alternately. For the positive half of the ac signal, the secondary point D1
is positive, GND point will have zero volt and P2 will be negative. At this instant
diode D1 will be forward biased and diode D2 will be reverse biased. As explained
in the Theory behind P-N Junction and Characteristics of P-N Junction Diode, the
diode D1 will conduct and D2 will not conduct during the positive half cycle. Thus

the current flow will be in the direction P1-D1-C-A-B-GND. Thus, the positive half
cycle appears across the load resistance RLOAD.
During the negative half cycle, the secondary ends P1 becomes negative and P2
becomes positive. At this instant, the diode D1 will be negative and D2 will be
positive with the zero reference point being the ground, GND. Thus, the diode D2
will be forward biased and D1 will be reverse biased. The diode D2 will conduct
and D1 will not conduct during the negative half cycle. The current flow will be in
the direction P2-D2-C-A-B-GND.
Centre-tap Full-wave Rectifier-Waveform
When comparing the current flow in the positive and negative half cycles, we can
conclude that the direction of the current flow is the same (through load
resistance 𝑅𝐿 ). When compared to the Half-Wave Rectifier, both the half cycles
are used to produce the corresponding output. The frequency of the rectified
output voltage is twice the input frequency. The output that is rectified, consists
of a dc component and a lot of ac components of minute amplitudes.
Full-wave Rectifier with Shunt Capacitor Filter

The circuit diagram of a full-wave rectifier with capacitor filter is shown below.

Full-wave Rectifier with Capacitor Filter
Circuit Diagram
The filter capacitor C is placed across the resistance load 𝑅𝐿𝑜𝑎𝑑 .
The whole working is pretty much similar to that of a half-wave
rectifier with shunt capacitor. The only difference is that two pulses of current will
charge the capacitor during alternate positive (D1) and negative (D2) half cycles.
Similarly capacitor C discharges twice through 𝑅𝐿𝑜𝑎𝑑 during one full cycle. This is
shown in the waveform below.
Full-wave Rectifier with

Capacitor Filter - Waveform
The load current reduces

by a smaller amount
before the next pulse is
received as there are 2
current pulses per cycle.
This causes a good
reduction in ripples and a
further increase in the
average dc load current.

Design:
For Centre tap full wave rectifier / Bridge rectifier:
𝑉𝐷𝐶 = 2𝑉𝑚 𝜋 for FWR (both center tap and bridge rectifier)
For the given 𝑉𝑑𝑐 calculate 𝑉𝑚 and 𝑉𝑟𝑚𝑠 using the formula, 𝑉𝑟𝑚𝑠 = 𝑉𝑚 2.
Choose the transformer of rating 𝑉𝑟𝑚𝑠 - 0 - 𝑉𝑟𝑚𝑠 /≥ 𝐼𝑑𝑐 for center tap full wave
rectifier and 0 - 𝑉𝑟𝑚 𝑠 /≥ 𝐼𝑑𝑐 for Bridge rectifier.
The value of the load resistance, 𝑅𝐿 = 𝑉𝑑𝑐 𝐼𝑑𝑐 & 𝑃𝑅𝐿 = 𝑉𝐷𝐶 2 𝑅𝐿 (Use DRB).
Procedure:
1. Components are tested for their good working condition.
2. Connections are made as shown in the circuit diagram.
3. Observe the different waveforms on the CRO.
4. Measure 𝑉𝐷𝐶 using multimeter in DC mode and 𝑉𝑚 on CRO, measure 𝐼𝐷𝐶
using DC ammeter and 𝐼𝐴𝐶 using AC ammeter.
5. Calculate 𝑉𝑟𝑚𝑠 from 𝑉𝑚 using the formula, 𝑉𝑟𝑚𝑠 = 𝑉𝑚 2 for full wave
rectifier.
6. Calculate the efficiency and ripple factor. Compare the results with the
theoretical values.
Note: Formula to calculate theoretical 𝛾 = 1 4 3𝑓𝐶𝑅𝐿

Tabular column:
a) Without filter:
𝐼𝑑𝑐 2
Circuit 𝑅𝑙 𝑉𝐷𝐶 𝐼𝑑𝑐 𝐼𝑎𝑐 𝜂= × 100 𝐼
𝐼𝑑𝑐 2 + 𝐼𝑎𝑐 2 𝛾 = 𝐼𝑎𝑐
𝑑𝑐
Center tapped
FWR
Bridge FWR

b) With filter:
Circuits 𝑉𝑟𝑝𝑝 𝑉𝑟𝑝𝑝 𝑉𝐷𝐶 𝑉𝑟,𝑟𝑚𝑠

𝑉𝑟,𝑟𝑚𝑠 = 𝛾=
2 3 𝑉𝐷𝐶
Center tapped
FWR
Bridge FWR
Result:
a) Without filter: 1) 𝛾 =
2) 𝜂 =
b) With filter: 1) 𝛾 =
2) 𝜂 =
Viva Questions:
1. What is a rectifier?
A rectifier is an electrical device that converts alternating current (AC) to pulsating direct
current (DC).
2. What are PIV’s of the three different rectifiers?
Vm For half wave rectifier and bridge rectifier and 2Vm for full wave rectifier using
center-tapped transformer.
3. What are the advantages of bridge rectifiers over center-tapped FWR?
Voltages across the non-conducting diode is 2Vm in FWR, where Vm is the peak value of
the input voltage. But in bridge rectifiers, it is Vm . The FWR needs a center-tapped transformer
which is costlier. In the HWR, the peak value of the output voltage is less than the peak value of
input voltage by 0.6 V because of the 0.6 V drop across the diodes in each half cycle. In bridge
rectifiers, the drop across diodes is 1.2 V.
4. What is the peak value of the wave form that can be observed if the output of a 6V
transformer is fed to a CRO?

√2x 6 =8.49 V
5. How do you measure the Vr,rms using a multi-meter?
Vr,rms is the rms value of the ripple voltage. To measure this, connect a 10 µF capacitor
in series with the positive terminal of the output to block DC. Now the rms value of the ripple
can be measured using the multi-meter, setting it in AC volts mode.
6. Define Transformer utilization factor (TUF). Calculate it for HWR.
It is defined as the ratio of DC power delivered to load and the AC rating of the
transformer secondary.
𝑑𝑐 𝑝𝑜𝑤𝑒𝑟 𝑑𝑒𝑙𝑖𝑣𝑒𝑟𝑒𝑑 𝑡𝑜 𝑙𝑜𝑎𝑑
TUF =
𝑎𝑐 𝑟𝑎𝑡𝑖𝑛𝑔 𝑜𝑓 𝑡𝑕𝑒 𝑡𝑟𝑎𝑛𝑠𝑓𝑜𝑟𝑚𝑒𝑟 𝑠𝑒𝑐𝑜𝑛𝑑𝑎𝑟𝑦
2
𝐼𝑑𝑐 𝑅𝐿
=
(𝑉𝑚 2)(𝐼𝑚 2)
(𝐼𝑚 𝜋 )2 𝑅𝐿
=
𝑉𝑚 𝐼𝑚 2
= 2 𝜋 2 = 20.26%
7. What is the TUF for full wave rectifier and bridge rectifier?
TUF for FWR = 0.693; TUF for bridge rectifier = 0.812.
8. What are different types of filters used?
i) C Filter
ii) L Filter
iii) LC Filter
iv) π Filter
9. How does the performance of the capacitor input filter improve when RC time
constant is increased?
When RC is high, the capacitor discharges slowly and hence the ripple deceases.
10. Why the capacitor input filter so called?
Since the unrectified voltage is fed to the capacitor, it is called capacitor input filter.
11. Why is a choke input filter not used with HWR?
A half wave rectifier does not supply continuous current to a coil. Interrupted current
through a coil will cause distortions.

Experiment No 2:-
Clipping Circuits
Aim : To design and study the shunt clipping circuits using diodes
1. Diode (1N4001) - 02
2. Resistor As per design -
3. Multimeter - 01
4. CRO Probes - 3 set
5. Spring board & wires - -
Theory:
A clipper is a circuit that removes either positive or negative portion of a
waveform. This kind of processing is useful for signal shaping, circuit protection
and communications. The clippers are usually constructed by using diodes and
resistors and sometimes to adjust the clipping level DC power supplies are also
used. There are two types of clippers namely series clippers and shunt clippers. If
the clipping element (diode) is in series with the source then we call such clippers
as series clippers.
Selection criterion for R or design of R
The value of R should be chosen as geometric mean of 𝑅𝑓 and 𝑅𝑟 of diode.

Where, 𝑅𝑓 → dynamic forward resistance, and 𝑅𝑟 → reverse resistance of the
diode.
R = 𝑅𝑓 × 𝑅𝑟 Say, 𝑅𝑓 = 100Ω, 𝑅𝑟 = 1MΩ, then R = 10k
Procedure:
1) Components are tested for their good working condition.
2) Connections are made as shown in the circuit diagram.

3) Apply a sine wave of amplitude greater than the designed clipping level
with frequency of 500 Hz.
4) Observe the output waveform on the CRO.
5) Observe the transfer characteristic curve on the CRO by applying waveform
to channel X and output waveform to channel Y.
6) Measure the clipped voltage and compare with the designed value.
Circuits and waveforms:

a) Circuit to remove positive peak above some reference level (𝑉𝐵 + 𝑉𝛾 ) :
Input Voltage Diode status Output Voltage

𝑉𝑖 ≥ 𝑉𝛾 + 𝑉𝐵 ON 𝑉𝑜 = 𝑉𝛾 + 𝑉𝐵
𝑉𝑖 < 𝑉𝛾 + 𝑉𝐵 OFF 𝑉𝑜 = 𝑉𝑖
b) Circuit to remove negative peak above some reference level (−𝑉𝐵 − 𝑉𝛾 ) :
Input Voltage Diode status Output Voltage

𝑉𝑖 ≤ −𝑉𝛾 − 𝑉𝐵 ON 𝑉𝑜 = −𝑉𝛾 − 𝑉𝐵
𝑉𝑖 > −𝑉𝛾 − 𝑉𝐵 OFF 𝑉𝑜 = 𝑉𝑖

c) Circuit to remove positive peak above some reference level (𝑉𝐵1 + 𝑉𝛾 ) and
negative peak above some reference level (−𝑉𝐵2 − 𝑉𝛾 )
Input Voltage 𝐷1 𝐷2 Output Voltage

Status Status
𝑉𝑖 ≤ −(𝑉𝛾 + 𝑉𝐵2 ) OFF ON 𝑉𝑜 = −(𝑉𝛾 + 𝑉𝐵2 )
−(𝑉𝐵2 + 𝑉𝛾 ) ≤ 𝑉𝑖 ≤ (𝑉𝐵1 + 𝑉𝛾 ) OFF OFF 𝑉𝑜 = 𝑉𝑖
𝑉𝑖 ≥ 𝑉𝛾 + 𝑉𝐵1 ON OFF 𝑉𝑜 = 𝑉𝛾 + 𝑉𝐵1 )
Result: The waveforms have been observed and verified.

Clamping Circuits
Aim: To design and study clamping circuits.

1. Diode (1N4007) - 01
4. Spring board and wires - -
Theory:
Clamper is a circuit that "clamps" a signal to a different DC level
without changing the shape of the applied signal Clamping circuit introduces a DC
level into an AC signal The different types of clampers are positive, negative and
biased clampers A clamping network must have a capacitor, a diode and a load
resistor. The magnitude R and C must be chosen such that the time constant RC is
large enough to ensure that the voltage across the capacitor does not discharge

significantly during the interval when the diode is non- conducting. By connecting
suitable DC voltage in series with the diode, clamping level can be varied.
Clampers are very much used in communication systems for

example clampers are used in analog television receivers for the purpose of
restoring the DC component of the video signal prior to it being fed into the
picture tube.
Procedure:
1) Components are tested for their good working condition.
2) Connections are made as shown in the circuit diagram.
3) Apply a square wave / triangular wave / sine wave of amplitude 10V peak
to peak and frequency of 1 KHz.
4) Observe the input and output waveform.
5) Measure the clamping level and compare with the designed value.
Design of R & C:
Assume C, and for the clamping to occur select R such that RC ≫ T, where T is the period of the
input signal.
RC ≫10T; Assume f = 1 KHz, hence T = 1ms. Choose C = 1µF, then R = 10KΩ
a) Negative Clamper: Positive peak clamper Positive Reference
8
7
6 vi
5
4 vo
3
2
1
0
-1
-2 0 90 180 270 360 450
-3
-4
-5
-6
-7
-8

Design:
Assume Vin = 10VP-P, Vref = 2V, VK = 0.6V
a. During the positive half of the input signal diode is forward biased ∴ D = ON
Applying KVL to the loop
Vin – VC – VK – VR = 0
VC = Vin– VK – VR
VC = 5 – 0.6 – 2
VC = 2.4V
b. During the negative half of the input signal diode is reverse biased ∴ D = OFF
Vin – VC – VO = 0
VO = Vin – VC
When Vin = 0V VO = -2.6V
Vin = 5V VO = 2.6V
Vin = -5V VO = -7.4V
The output varies between +2.6V to -7.4V
b) Positive clamper: Negative peak clamped to negative reference.
10
9
8 vi
7
6 vo
5
4
3
2
1
0
-1
-2 0 90 180 270 360 450
-3
-4
-5
-6
Design:
Assume Vin = 10VP-P, Vref = 2V, VK = 0.6V
a. During the negative half of the input signal diode is forward biased ∴ D = ON
-Vin + VC + VK + VR = 0
VC = - (-Vin– VK – VR)
VC = - (-5V + 0.6V + 2V)

VC = 2.4V
b. During the positive half of the input signal diode is reverse biased ∴ D = OFF
Vin + VC – VO = 0
VO = Vin + VC
When Vin = 0V VO = 2.4V
Vin = 5V VO = 7.4V
Vin = -5V VO = -2.4V
The output varies between -2.4V to 7.6V
Result:
Negative and positive clamping observed, tabulated and verified as per above
design.
Viva Questions:
1. Define clipper, limiter and slicer?
Depending on the type of limiting action, the circuit is known as a limiter or clipper. The
limiter limits the maximum value of the input signal to a specified level but keeps the shape of
the input waveform intact. For example, FM limiter. The clipper clips off a part of the input
waveform. If the clipped output is a slice of the input waveform with both clipping levels are
either in positive or negative half cycle, it is known as a slicer.
2. What is the applications of clippers?
In digital communication circuits, if noise occurs on the digital pulses it can be clipped to make
the pulses flat top.
3. What is the need of the resistor used in the clipping circuits? Why is it taken as
𝑹𝒇 × 𝑹𝒓 ?
It is to limit the current through the diode in order to avoid the damage due to
excessive current through it. In clipping circuits, diode operates in two modes, ‘ON’ and ‘OFF’
modes. When the diode is ON, the series resistor R must be much higher than the forward
resistance 𝑅𝑓 of the diode to protect the diode from excess current. Let it be R = k𝑅𝑓 , where k
is a large value. When the diode is OFF, series resistance must be much smaller than the
reverse resistance 𝑅𝑟 of the diode, i.e., R = 𝑅𝑟 𝑘. Otherwise, large amount of voltage will get

dropped across the series resistor. To suit to two conditions, the resistance is taken as the
geometrical mean of forward resistance and reverse resistance. We get 𝑅 2 = 𝑅𝑓 × 𝑅𝑟 . Hence,
= 𝑅𝑓 × 𝑅𝑟 .
4. What is a Clamper?
A Clamper is an electronic circuit that fixes either the positive or the negative peak of a
signal to a defined value by shifting its DC value. The Clamper moves the whole signal up or
down so as to place to peaks to the reference level.
5. Which are the other names of clamping circuits?

DC restoring circuits or inserting circuits.
6. How is the capacitance chosen in a clamper?
The clamper circuit consists of a capacitor and diode connected in parallel across the load. The
clamper circuit depends on the time constant of the capacitor. The capacitor must be chosen
such that, during the conduction of the diode, the capacitor must charge quickly and during the
non-conducting period of the diode, it should not discharge drastically.
Time constant T = RC.
7. Give an application of clamping circuits.
In television receivers, the DC level of the video signals will be lost due to coupling
capacitances of amplifiers in it. This DC level has to be restored since it corresponds to the
brightness level of the picture. Clamping circuits are used for the insertion of DC voltage.
8. Based on the portion of the waveform clipped, clippers are classified into how many
types? What are they?
Clippers are classified into 3 types, they are,
i) Positive clippers.
ii) Negative clippers.
iii) Combination clippers.
9. What is positive clamping?
Positive clamping occurs when positive peaks are raised or clamped to ground or on the
zero level. In other words, it pushes the signal upwards so that negative peaks fall on
zero level.
10. What is negative clamping?

Negative clamping occurs when positive peaks are raised or clamped to ground or on
the zero level. In other words, it pushes the signal downwards so that the positive peaks
fall on the zero level.
11. What are the other names of clampers?
DC restorer or re-inserter.
12. Why capacitors are used in clampers?
The capacitor in the clamper is there to discharge when the diode is reverse biased.
13. What is transient response?
A transient response is the response of a system to a change from an equilibrium or a

steady state. The impulse response, step response are transient responses to a specific
input

Experiment No 3:-
Series Voltage Regulator using Zener Diode and Power
Transistor
Aim: To Conduct an experiment on Series Voltage Regulator using Zener diode and power
transistor to determine line and load regulation characteristics.
Components Required: Zener diode (1N4739), Power Transistor (2N3055), resistors supply and
wires
Theory:
Zener Diode is a general purpose diode, which behaves like a normal diode when
forward biased. But when it is reverse biased above a certain voltage known as zener
breakdown voltage or zener voltage or avalanche point or zener knee voltage the voltage
remains constant for a wide range of current.
Clarence Zener is the scientist who discovered this electrical property and the device is named
after him.
Zener Diode
Ordinary diodes will not have any significant current (only leakage current) when reverse biased
below its reverse breakdown voltage. When the reverse bias is increased beyond reverse
breakdown voltage its potential barrier breaks down. This may damage the diode due to excess
heat produced by the high current flow through the diode unless the current is limited. Zener
diode also exhibits similar properties except that it is designed to have lower breakdown
voltage. Ordinary diodes have breakdown voltages in the order of 100 or above.

Zener Diode as Voltage Regulator:

The function of a regulator is to provide a constant output voltage to a load connected in
parallel with it in spite of the ripples in the supply voltage or the variation in the load current
and the zener diode will continue to regulate the voltage until the diodes current falls below
the minimum IZ(min) value in the reverse breakdown region. The purpose of a voltage regulator
is to maintain a constant voltage across a load regardless of variations in the applied input
voltage and variations in the load current.
The resistor is selected so that when the input voltage is at V IN(min) and the load current is at
IL(max) that the current through the Zener diode is at least I z(min). Then for all other
combinations of input voltage and load current the Zener diode conducts the excess current
thus maintaining a constant voltage across the load. The Zener conducts the least current when
the load current is the highest and it conducts the most current when the load current is the
lowest.
A Zener diode of break down voltage Vz is reverse connected to an input voltage source
Vi across a load resistance RL and a series resistor RS. The voltage across the zener will remain
steady at its break down voltage VZ for all the values of zener current IZ as long as the current
remains in the break down region. Hence a regulated DC output voltage V 0 = VZ is obtained
across RL, whenever the input voltage remains within a minimum and maximum voltage.
Basically there are two type of regulations such as:
a. Line Regulation: In this type of regulation, series resistance and load resistance are
fixed, only input voltage is changing. Output voltage remains the same as long as the
input voltage is maintained above a minimum value.
b. Load Regulation: In this type of regulation, input voltage is fixed and the load resistance
is varying. Output volt remains same, as long as the load resistance is maintained above
a minimum value.
Transistor Series Voltage Regulator is simple series voltage regulator using a transistor and
Zener diode. The circuit is called a series voltage regulator because the load current passes
through the series transistor Q1 as shown in Fig. The unregulated DC supply is fed to the input
terminals and the regulated output is obtained across the load. The Zener diode provides the
reference voltage.
Operation: The base voltage of transistor Q1 is held to a relatively constant voltage across the
Zener diode. For example, if 8V Zener (i.e., VZ = 8V) is used, the base voltage of Q1 will remain
approximately 8V. Referring to Fig, V𝑜𝑢𝑡 = VZ – VBE (i) If the output voltage decreases, the
increased base-emitter voltage causes transistor Q1 to conduct more, thereby raising the
output voltage. As a result, the output voltage is maintained at a constant level. (ii) If the

output voltage increases, the decreased base-emitter voltage causes transistor Q1 to conduct
less, thereby reducing the output voltage. Consequently, the output voltage is maintained at a
constant level. The advantage of this circuit is that the changes in zener current are reduced by
a factor β. Therefore, the effect of zener impedance is greatly reduced and much more
stabilized output is obtained
Limitations:
(i) Although the changes in Zener current are much reduced, yet the output is not absolutely
constant. It is because both VBE and VZ decrease with the increase in room temperature.
(ii) The output voltage cannot be changed easily as no such means is provided.
Circuit diagram:
Design:
The value of RS should be such that it supplies current for the base of transistor Q1 and for the
Zener diode to keep it in the regulating region. The worst condition occurs at the minimum
input voltage and maximum load current. This means that under worst condition.
The current through RS must beat least IZ (min) = 1 mA and Maximum load current ILmax = 1A
𝐼𝐿 𝑀𝑎𝑥 1
IB (max) = = 50 = 20 mA
β

𝐼𝑅 𝑆 = IZ (min) + IB (max) = 1 + 20 = 21 mA Now 21 mA must be drawn by RS under all
Conditions of input voltage variations .Even when the input voltage falls to 12V which causes
the minimum voltage across RS and hence the lowest value of current it will be able to supply.
𝑉𝑖𝑛𝑀𝑖𝑛 −𝑉 𝑧 12−8.5
∴ RS = = 21𝑚𝐴 = 166 Ω choose 220ohms
𝐼𝑅 𝑆
Procedure:
a) Zener Diode as Line Regulator (for variations in supply voltage):
1. Connect the circuit for Line regulation as shown in fig above

2. Vary supply voltage (Vs) in in steps of 1V from 0 - 30 V and note the corresponding Zener
Current (IZ), Load Current (IL) and Output Voltage (VO).
3. Plot the graph between VS and VO taking VS on X-axis and VO on Y-axis.
4.
b) Zener Diode as Load Regulator (for variations in load connected):
1. Connect the circuit for Load regulation as shown in fig.

2. Now fix the power supply voltage, Vs at 15V.
3. Without connecting the load RL, note down the No-Load Voltage (VNL).
4. Now connect the load (RL) using Decade Resistance Box (DRB) and vary the resistance in
steps 1K from 1K to10K / in steps of 10 K from10K to 100K and note the
corresponding Zener Current (IZ), Load Current (IL) and Output Voltage (VO) for 10
readings and calculate the percentage regulation.
5. Plot the graph between RL and VO taking RL on X-axis and VO on Y-axis.
Line Regulation:
Load Resistance RL = ____________ (K )
Unregulated Power Load Current Regulated Output

Supply Vs (V) IL (mA) Voltage Vo (V)

Load Regulation:
Input Supply Voltage VS = _________ Volts
No-load DC Voltage, VNL = _________ Volts
Load Resistance Load Current Regulated
RL (K ) IL (mA) Output Voltage
Vo (V)
Expected Graph:
Line Regulation
Load Regulation:
IL(mA)
𝑉𝑁𝐿 −𝑉𝐹𝐿
For Load regulation, % Voltage Regulation = 𝑋100
𝑉𝐹𝐿
Precautions:

1. While doing the experiment do not exceed the readings of the diode. This may lead to
damaging of the diode.
2. Connect voltmeter and ammeter in correct polarities as shown in the circuit diagram.
3. Do not switch ON the power supply unless you have checked the circuit connections as
per the circuit diagram.
Result: The characteristics and Voltage Regulation of Zener diode are studied.
Viva Questions:
1. What is the use of power transistor in the circuit shown in figure?

Power transistor acts as a series pass element to dissipate excess power developed in the
circuit and hence protects from thermal run away.
2. What is the use of RB in the circuit as shown in figure?
RB meets the varying current requirements of the regulator circuit. We know, 𝑉𝑖 = 𝐼𝑅𝐵 +
𝑉𝑍 where 𝑉𝑍 = 𝑉𝐵𝐸 + 𝑉𝑂 and I is the current through 𝑅𝐵 .The resistor 𝑅𝐵 controls current I
and drops excess voltage across itself.
3. What are the ideal values of line and load regulation?
Zero, which means that the output voltage remains constant in spite of change in input
voltage and load current.
4. What is the difference between p-n Junction diode and zener diode?
A zener is designed to operate stably in reverse breakdown, which is designed to be at a low

voltage, between 3 volts and 200 volts. The breakdown voltage is specified as a voltage with a
tolerance, such as 10 volts ±5%, which means the breakdown voltage (or operating voltage) will
be between 9.5 volts and 10.5 volts.
A signal diode or rectifier will have a high reverse breakdown, from 50 to 2000 volts, and is NOT
designed to operate in the breakdown region. So exceeding the reverse voltage may result in
the device being damaged. In addition, the breakdown voltage is specified as a minimum only.
Forward characteristics are similar to both, although the zener's forward characteristics is
usually not specified, as the zener will never be used in that region. A signal diode or rectifier
has the forward voltage specified as a max voltage at one or more current levels.

5. What is break down voltage?
The breakdown voltage of a diode is the minimum reverse voltage to make the diode
conduct in reverse.
6. What are the applications of Zener diode?
Zener diodes are widely used as voltage references and as shunt regulators to regulate the
voltage across small circuits.
7. What is cut-in-voltage?
The forward voltage at which the current through the junction starts increasing rapidly, is
called the knee voltage or cut-in voltage. It is generally 0.6v for a Silicon diode.
8. What is voltage regulator?
A voltage regulator is an electronic circuit that provides a stable dc voltage independent of
the load current, temperature and ac line voltage variations
Voltage regulator, any electrical or electronic device that maintains the voltage of a power
source within acceptable limits. The voltage regulator is needed to keep voltages within the
prescribed range that can be tolerated by the electrical equipment using that voltage.
9. What is line regulation?
In this type of regulation, series resistance and load resistance are fixed, only input voltage is
changing. Output voltage remains the same as long as the input voltage is maintained above a
minimum value. Percentage of line regulation can be calculated by = (ΔV0/ΔVIN) x100
Where V0 is the output voltage and VIN is the input voltage and ΔV0 is the change in output
voltage for a particular change in input voltage ΔVIN.
10. What is load regulation?

In this type of regulation, input voltage is fixed and the load resistance is varying. Output
volt remains same, as long as the load resistance is maintained above a minimum value.
11. Types of voltage regulators?
a) Series voltage regulator
b) Shunt voltage regulator

12 What is series voltage regulator?
The unregulated DC voltage is the input to the circuit .The control element, controls the
amount of the input voltage that gets to the output.
For e.g. if the load voltage tries to increase, the comparator generates a control signal based on
the feedback information. This control signal causes the control element to decrease the
amount of the output voltage.
13. What is shunt voltage regulator?

Resistor 𝑅𝑆 drops the unregulated voltage by an amount that depends on the current supplied
to the load RL .The voltage across the load is set by the Zener diode and transistor base emitter
voltage .If the load resistance decreases ,a reduced drive current to the base of Q results,
shunting less collector current . The load current is thus larger, thereby maintaining the
regulated voltage across the load.
14. What is improved shunt regulator?
Improved Shunt Regulator: The circuit of shows an improved shunt voltage regulator circuit.
The Zener diode provides a reference voltage so that the voltage across 𝑅1 senses the output
voltage. As the output voltage tries to change, the current shunted by transistor 𝑄1 is varied to
maintain the output voltage constant. Transistor 𝑄2 provides a larger base current to transistor
𝑄1 than the circuit , so that the regulator handles a larger load current. The output voltage is
set by the Zener voltage and that across the two transistor base-emitters,
VO = VL = VZ + VBE2 + VBE1
15. What is improved series regulator?
Improved Series Regulator: An improved series regulator circuit is shown in the below

diagram. Resistors 𝑅1 and 𝑅2 act as a sampling circuit, with Zener diode 𝐷𝑍 providing a
reference voltage, and transistor 𝑄2 then controls the base current to transistor 𝑄1 to vary the
current passed by transistor 𝑄1 to maintain the output voltage constant. If the output voltage
tries to increase, the increased voltage, 𝑉2 sampled by 𝑅1 and 𝑅2 , causes the base-emitter
voltage of transistor 𝑄2 to go up (since 𝑉𝑍 remains fixed). If 𝑄2 conducts more current, less
goes to the base of transistor 𝑄1 , which then passes less current to the load, reducing the
output voltage—thereby maintaining the output voltage constant. The opposite takes place if
the output voltage tries to decrease, causing less current to be supplied to the load, to keep the
voltage from decreasing. The voltage 𝑉2 provided by sensing resistors 𝑅1 and 𝑅2 must be
equal to the sum of the base-emitter voltage of 𝑄2 and the Zener diode, that is,
𝑉𝐵𝐸2 + 𝑉𝑍 = 𝑉2 = 𝑅2 𝑅1 + 𝑅2 ∗ 𝑉𝑂
16. Applications of voltage regulators?

1) Power supplies - simple DC supply.
2) Chopper supply.
3) Special TV horizontal high-voltage supply.
4) Battery charger circuit.

Experiment No. 4 :-
Frequency characteristics of BJT amplifier
Aim: To design an RC coupled single stage BJT amplifier and to determine frequency response,
input and output impedances.
Components Required: SL100, capacitors and resistors of required values, signal generator,
CRO, DRB, connecting wires.
Theory:
A single stage common emitter RC coupled amplifier is a simple and elementary

amplifier circuit. The main purpose of this circuit is pre-amplification that is to make weak
signals to be stronger enough for further amplification. If designed properly, this RC coupled
amplifier can provide excellent signal characteristics.
The capacitor Cin at the input acts as a filter which is used to block the DC voltage and allow
only AC voltage to the transistor. If any external DC voltage reaches the base of the transistor, it
will alter the biasing conditions and affects the performance of the amplifier. R1 and R2
resistors are used for providing proper biasing to the bipolar transistor. R1 and R2 form a
biasing network which provides necessary base voltage to drive the transistor in active region.
The region between cut off and saturation region is known as active region. The region where
the bipolar transistor operation is completely switched off is known as cut off region and the
region where the transistor is completely switched on is known as saturation region. Resistors
Rc and Re are used to drop voltage of Vcc. Resistor Rc are a collector resistor and Re is emitter
resistor. Both are selected in such a way that both should drop Vcc voltage by 50% in the above
circuit. The emitter capacitor Ce and emitter resistor Re makes a negative feedback for making
the circuit operation more stable. The Frequency Response of an amplifier is presented in a
form of a graph that shows output amplitude (or, more often, voltage gain) plotted versus
frequency. Typical plot of the voltage gain of an amplifier versus frequency is shown in the
figure. The gain is null at zero frequency, then rises as frequency increases, level off for further
increases in frequency, and then begins to drop again at high frequencies.

PROCEDURE:
1. Connections are made as shown in circuit diagram.
2. Measure the D.C. condition. VBE = ________Volts. VCE =_______Volts.
3. The input voltage Vin is adjusted to a convenient value (Approximately 20 to 40 mV)
within the distortion less limit and value must be kept constant throughout the
experiment.
4. Frequency of the input signal is varied from 100Hz to 2MHz in steps and at each step,
corresponding output Vo is noted down.
5. All readings are tabulated and graph of Voltage gain in dB V/s frequency is drawn on a
semi-log sheet.
6. 3dB bandwidth is determined from the frequency response curve.
TO MEASURE INPUT IMPEDANCE:
1. A DRB is connected in series with the input as shown in figure.

2. In the mid frequency region (where the gain is constant) with R i = 0, (i.e., all the knobs of
DRB in Zero position.) the output voltage is measured.
3. Now the DRB resistance is increased till the output voltage falls to half of the initial
value.
4. The corresponding DRB value gives the input impedance.
TO MEASURE OUTPUT IMPEDANCE:
1. A DRB is connected across the output as shown in figure.

2. In the mid frequency region, say 10kHz (where the gain is constant) with R o = max, (i.e.,
all the knobs of DRB in Maximum position.) the output voltage is measured.
3. Now the DRB resistance is decreased till the output voltage falls to half of the initial
value.
4. The corresponding DRB value gives the input impedance.

Circuit Diagram:
Design:
Let 𝑉𝐶𝐸 = 5V, 𝛽=100 and 𝐼𝑐 = 2mA, for maximum output swing 𝑉𝑐𝑐 = 2𝑉𝐶𝐸 ∴ 𝑉𝑐𝑐 = 10𝑉;
𝑉𝐸 Is chosen to be 10% of 𝑉𝐶𝐶 . (Reason: Values of 𝑅𝐶 and 𝑅𝐸 are so selected that 50% of 𝑉𝐶𝐶
gets dropped across the collector & emitter of the transistor.This is done to ensure that the
operating point is positioned at the center of the load line. 40% of 𝑉𝑐𝑐 is dropped across 𝑅𝐶 and
10% of 𝑉𝑐𝑐 is dropped across 𝑅𝐸 . A higher voltage drop across 𝑅𝐸 will reduce the output voltage
swing and so it is a common practice to keep the voltage drop across 𝑅𝐸 = 10% of 𝑉𝑐𝑐 )
Therefore 𝑉𝐸 =1V ∴ 𝑅𝐸 = 500Ω. (Choose 100 and 330Ω in series).

𝑉𝐶𝐶 −𝑉𝐶𝐸 −𝑉𝐸
RC = = 2KΩ; VB = VBE + VE; VB = 1.7V; 𝑉𝑅1 = (𝑉𝐶𝐶 − 𝑉𝐵 ) = 8.3V;
𝐼𝐶
𝑉𝐶𝐶 ×𝑅𝐶
VB = ;
𝑅1 +𝑅2
10×𝑅2
1.7V = 𝑅1+𝑅2
10R2 = 1.7R1 + 1.7 R2; R1 = 4.8R2;

R2 is less than or equal to (βRe/10);
Choose R2 = 4.7KΩ. Therefore 𝑅1 is chosen approximately as 22KΩ.
Result: Frequency response is studied.

Viva Questions:
1. What are frequency response characteristics of an amplifier?

The variation of voltage gain of an amplifier with frequency is frequency response
characteristics of amplifier.
2. Mention the stages in frequency response and give its causes.
a) Low frequency response (due to external capacitor).
b) Mid frequency response (due to amplifier).
c) High frequency response (due to internal capacitor).
3. How does amplifier behave for high and low frequencies?
High frequency: Amplifiers behave as low pass filter.
Low frequency: Amplifiers behave as high pass filter.
4. Bandwidth of an amplifier can be increased by?
Minimizing stray capacitance.
5. Lower cut off frequency of an amplifier is primarily determined by?
Capacitors of coupling and by pass capacitors.
6. The main reason for variation of amplifier gain with frequency is?
The presence of internal and external capacitance.
7. Define bandwidth and cut off frequencies.
BW: Range of acceptable frequencies. (OR) Difference between lower and upper cut off
frequencies.
Cut-off frequencies: Also called as half power frequencies are the frequency obtained when
gain is reduced by 1/√2 times the frequency response.
8. What is the impact of frequency response curve plotted for with and without feedback?
The gain and bandwidth product remains same.
9. Explain how Gain-BW product remains constant?
Gain-BW product of an amplifier with feedback is same as Gain-BW product of an amplifier
without feedback. Because as we use negative feedback the gain with feedback amplifier is
given by

Af = A / (1+Aβ)
WKT, A×BW = Af × BWf
A×BW= (A/ (1+Aβ))× BWf
BWf = BW (1+Aβ)
Hence as there is change OR decrease in gain with the factor (1+Aβ), there is an increase in BW
with (1+Aβ) factor. Hence Gain-BW product remains constant.

Experiment No. 5:-

Emitter follower with and without Bootstrap
Aim: Design a BJT Darlington emitter follower and determine the gain input and output
impedances.
Components Required: NPN transistor, Resistors and Capacitors of required values, Signal
Generator, CRO, RPS and DMM.
Theory:
A very popular connection of two BJTs for operation as one super beta transistor is
the Darlington connection. The main feature of Darlington connection is that the composite
transistor acts, as a single unit with a current gain is equal to product of individual current
gains. i.e. βD=β1xβ2 if β1= β2= β Then βD= β2 To make the two transistors Darlington pair, the
emitter terminal of the first transistor is connected to the base of the second transistor and the
collector terminals of the two transistors are connected together. The result is that emitter
current of the first transistor is the base current of the second transistor.
Bootstrapping: In the field of electronics, a bootstrap circuit is one where part of the output of
an amplifier stage is applied to the input, so as to alter the input impedance of the amplifier.
When applied deliberately, the intention is usually to increase rather than decrease the
impedance. Generally, any technique where part of the output of a system is used at startup is
described as bootstrapping. In analog circuit designs a bootstrap circuit is an arrangement of
components deliberately intended to alter the input impedance of a circuit. Usually it is
intended to increase the impedance, by using a small amount of positive feedback, usually over
two stages.
Procedure:
1. Study the circuit and draw the required tables.
2. Place the components on bread board and connect them as per given fig.
3. DC Conditions: - Connect the circuit without AC supply. Set V𝐶𝐶 = 12V. Measure the DC
voltage (using CRO /multimeter) at the Base (𝑉B2 ), Collector (𝑉C2 ), Emitter (𝑉E2 ) w.r.t ground.
Then determine 𝑉CE 2 = 𝑉C2 – 𝑉E2 and 𝐼C2 = IE2 = VE2 / R E . Then Q point is (𝑉CE 2 , IC2 ).

4. Connect the signal generator and apply a sine wave of peak-to-peak amplitude 1V, 1KHz.
Connect input and output (𝑉O ) of the circuit to the two channels of CRO. And observe the
waveforms
5. Gradually increase the input signal until the output signal gets distorted. When this
happens slightly reduce the input signal amplitude such that output is maximum undistorted
signal. Then measure the magnitude of the input and output waveform. Calculate Voltage gain.
6. Connect input and output (𝑉O ) of the circuit to the two channels of CRO. And observe the
waveforms. Note down the waveform on the graph.
7. Find input and output impedance per given procedure.
8. Connect the bootstrap circuit R B & CB and make the necessary changes as per figure b.
9. Find the gain, input and output impedance with this circuit. Voltage gain for maximum
undistorted output, AVM = Vo/Vi
To measure𝐙𝒊 :
DRB
Darlington Emitter
𝑉𝑜
𝑉𝑖𝑛 Follower Circuit
Fig a1
\
1. Adjust the input sinusoidal peak to peak in such a way that the output sine wave is
not clipped.
2. Note down this value of the input Vin (Let the frequency of the input be around
2kHZ).
3. Note down the peak to peak amplitude of the corresponding output V o.
Let Vo = Va ;
4. Connect a DRB (with zero resistance included) in series with the Function
generator.
5. Increase the resistance in DRB and observe the magnitude of the output V o
simultaneously on the Oscilloscope.
6. When the magnitude of the output Vo is reduced to half of its original value, stop
varying the potentiometer further and remove the DRB from the circuit. Vo=Va/2
7. Measure the value of the resistance in DRB and this measured value will be the
input impedance ( Ri) of the circuit.

To measure Zo:
Darlington Emitter
DRB Vo
Vin Follower Circuit
Fig a2
1. Adjust the input sinusoidal peak to peak in such a way that the output sine wave is
not clipped.
2. Note down this value of the input Vin. (Let the frequency of the input be around
2KHz)
3. Note down the peak to peak amplitude of the corresponding output V o . Let
Vo=Va
4. Connect a DRB (with maximum resistance included) in parallel with the load as
shown in fig c.
5. Decrease the DRB and observe the magnitude of the output V o simultaneously on
the Oscilloscope.
6. When the magnitude of the output Vo is reduced to half of its original value, stop
varying the resistance further and remove the DRB from the circuit. Vo=Va/2
7. Measure the value of the DRB and this measured value will be the output
impedance ( Ro) of the circuit.

Design:
Let VCEq = 6V and IEq = 10mA;
We choose VCEq to be usually half VCC for maximum output swing (placing the Q point exactly
at the center of the dc load line).
So, VCC = 12V, VRE = VCC − VCE = 6V; R E = (VCE /IE ) = 0.6KΩ. Choose 560Ω.
Consider β1= β2= β =100.
IB2 = IE1 = IC2/ β = 0.1mA;
Therefore, IB1 = (IC1/ β) ≈ (IE1/ β)= 0.1m / 100 = 0.001 mA.
Apply KVL to B-E Loop
V2 = 0.6 +0.6 +6 =7.2 V;
R2 = V2 / 9IB1 = 800 kΩ;
R1 = (VCC – V2) / 10IB1 = 480 kΩ;

(Reason: The current “I” flows through both resistors R1 and R2. Very little flows into the base
of the transistor and is a negligible amount.
To ensure a good stability factor, the current “I” flowing through the resistors should be in the
magnitude of 10 times the base current flow as following.
I = 10 × Ib)
Design of Bootstrap capacitor and resistor:
τ =(R B x CB )/D (Eq. 10) This relationship between the duty cycle and the step response of the
system allows us to understand that for lower duty cycles, the time constant (τ) becomes larger
(and thus the response is slower) and that for higher duty cycles, the response is faster
To satisfy this equation, there are lot of criterion
We choose R B = 100KΩ and CB = 47𝜇𝐹.
Result:
Thus the Darlington’s Emitter follower was designed and studied. It is proved that, by
connecting bootstrap circuit, input impedance increases.

Parameters Avm =Vo/Vi Zi Zo
Without Bootstrap
With bootstrap
Viva Questions:
1. What are the differences between CE,CB and CC amplifier?
1. In CC configuration we use to get the low output impedance where as in CE we use to

get the high output impedance.
2. In CC amplifier we use to have the voltage gain equal to unity where as in CE amplifier
we use to have the high voltage gain.
3. In CC amplifier there is high power gain which is used for impedance matching where as
in CE amplifier due to the high voltage gain the impedance matching is less impossible.
2. Mention the characteristics of CC amplifier?

At low frequencies and using a simplified hybrid-pi model, the following small-
signal characteristics can be derived. (Parameter and the parallel lines indicate components in
parallel.)
3. What is gain BW product?
The gain–bandwidth product (designated as GBWP, GBW, GBP or GB) for an amplifier is the
product of the amplifier's bandwidth and the gain at which the bandwidth is measured.
For devices such as operational amplifiers that are designed to have a simple one-pole
frequency response, the gain–bandwidth product is nearly independent of the gain at which it
is measured; in such devices the gain–bandwidth product will also be equal to the unity-gain
bandwidth of the amplifier
4. What is the effect in the output waveform if the base resistance RB has been
increased?
The base current will decrease and hence slope will also decrease.
5. What is the need of -VEE supply?

It provides bias for keeping transistor Q2 in active region. It also improves the recovery time
and linearity of the output.
6. Justify that the potential difference across R is constant?
Consider the situation at which the capacitor is charging. The potential at lower end of the
resistance R is increasing. At the same time the potential at the upper end of the resistor is also
increasing, since the emitter follower feeds back the voltage to the capacitor C2 to the upper
end of the resistor. As a result the potential difference across the resistor remains constant.

Experiment No. 6:-

RC coupled FET Amplifier
Aim: Wiring of R-C coupled Single stage FET amplifier and Determination of the gain-
frequency response.
Components Required: FET BFW10, Resistors and capacitors, CRO probes, DMM, DRB,
Spring board and connecting wires.
Theory:
The FET is based around the concept that charge on a nearby object can attract
charges within a semiconductor channel. The FET consists of a semiconductor channel with
electrodes at either end referred to as the drain and the source. A control electrode called the
gate is placed in very close proximity to the channel so that its electric charge is able to affect
the channel. In this way, the gate of the FET controls the flow of carriers (electrons or holes)
flowing from the source to drain. It does this by controlling the size and shape of the conductive
channel. The semiconductor channel where the current flow occurs may be either P-type or N-
type. This gives rise to two types or categories of FET known as P-Channel and N-Channel FETs.
Common source FET configuration is probably the most widely

used of all the FET circuit configurations.
Like its bipolar counterpart the common emitter circuit, the FET
common source amplifier provides a good level of all round
performance for many applications.
The common source circuit provides a medium input and
output impedance levels. Both current and voltage gain can be
described as medium, but the output is the inverse of the input, i.e. 180° phase change. This
provides a good overall performance and as such it is often thought of as the most widely used
configuration.
Procedure:

2. Measure the D.C. condition.
3. The input voltage is adjusted to a convenient value within the distortion less limit
and value must be kept constant throughout the experiment.
4. Frequency of the input signal is varied from 100 Hz to 2 MHz in steps and at each
step, corresponding output Vo is noted down.
5. All readings are tabulated and graph of voltage gain in dB V/s frequency is drawn on
a semi-log sheet.

6. 3 dB bandwidth is determined from the frequency response curve
Expected Graph:
Circuit Diagram:
820Ω
.47uF
.47uF
330Ω
2M 47uF
ohmoh
m ΩΩ
Ω00
ΩΩΩ
ΩΩΩΩ
Design: ΩΩΩΩ
ΩΩO
VDD = 10V; VP = −4V; IDSS = 12mA; R G = 2MΩ (Given).
The almost vertical part of the drain characteristics curve is called Ohmic Region, there
R DS = (−VP /IDSS );

For a self-bias circuit, there is a medium value of R S at which VGS is half the cutoff voltage,
there R S = R DS ;
Therefore, R S = 333Ω. Choose 330Ω
Solving Shockley’s equation and VGS = −ID × R S
We get ID = 4.6mA (the other root of the quadratic equation so obtained by solving the above
two is not considered as it gives ID more than IDSS )
W.K.T.,
R D = (VDD − VDS − (𝐼𝐷 × 𝑅𝑆 ))/ R S ;
VDS = (50% of VDD );
R D = 756Ω. Choose 820Ω.
OBSERVATIONS:
VGS= VDS=
TABULAR COLUMN:
Input Voltage Vin= ________Volts.

Sl. # Frequency in Vo in Volts. Gain dB=20 log10 (Vo/Vin)
Hz.
Result:
AV = ______
BW = ______

Viva Questions:
1 .How to find half power frequency?
First we have to find voltage gain Av, then we have to divide by 2 then we will get half
power frequency.
2. What is bandwidth?
Bandwidth is a difference between higher frequency to the lower frequency.
3. FET is a which kind of device?

FET is a voltage controlled current device, because the output drain current ID is controlled
by the input voltage VGS .
4. What is the use of using coupling capacitor & bypass capacitor in an RC coupled amplifier
circuit?
Coupling capacitors used to block dc current flow through load and the source. The source
bypass capacitor is connected to avoid negative feedback.
5. Define amplification factor?

It is defined as the product of Trans conductance and drain resistance.
6. What is meant by amplifier?

An amplifier is a circuit which increases the voltage, current, power level of input signal
where the frequency is maintained constant from output to input signal.
7. What is the necessity of cascading?

To increase the gain of an amplifier, we need the cascading.

8. Define RC coupled amplifier?

An amplifier in which resistance-capacitance coupling is employed between stages and at the
input and output point of the circuit is known as RC coupled amplifier.
9. What is loading effect?

Loading refers to the phenomena that occurs when a load circuit having low effective
impedance is connected to a supply circuit having higher effective impedance. This happens
because the net parallel resistance is lower than any individual resistors making up the parallel
combination.
10. Which type of biasing is used in RC coupled amplifier?

Voltage divider biasing is used in RC coupled amplifier.
11. Why RC coupling is preferred in audio range?

RC coupling has a great frequency response. The gain is uniform over the audio frequency
range, hence it is preferred in audio range.
12. Why in RC coupled frequency response graph, the frequency remains constant in the
middle?
As the frequency increases in this range, reactance of a coupling capacitor decreases which
in result increases the gain. However, at the same time lower reactance means higher loading
effect of first stage to the next one and hence gain decreases. Thus, these two factor almost
cancel each other, resulting in a uniform gain at this mid frequency.
13. Impedance matching is poor for an RC coupled amplifier, Why?

Because the output impedance of RC coupled amplifier is several hundred ohms, whereas
the input impedance of a speaker is only few ohms.

14. How FET will works as an amplifier?

In FET VGS varies as input signal varies in turn the drain current varies hence FET will works
as an amplifier.
15. What is the application of RC coupled FET amplifier?

It is commonly used in RF communication and optical fiber communication (OFC).

Experiment No. 7:
Drain and Transfer characteristics of JFET
Aim: Plot the input and output characteristics of a JFET. Calculate its parameters, namely;
drain dynamic resistance, mutual conductance and amplification factor from the plot.
COMPONENTS REQUIRED:
Sl. No. Components Details Specification Qty
1. Transistor BFW10/BFW11 1 No.
2. Resistors 22 KΩ 1 No
3. Digital Ammeters ( 0 - 200 mA) 1 NO
4. Digital Voltmeter (0 - 20V) 2 NO
5. Dual DC Regulated Power supply (0 - 30 V) 1 NO
THEORY:
A field effect transistor (FET) is a unipolar device, which conducts current using
only one kind of charge carriers. FET uses the Gate voltage that is applied to input
terminal to control the current flowing through it resulting in the output current being
proportional to the input voltage. As their operation depends on an electric field (hence
the name field effect) generated by the input Gate voltage, this makes the Field Effect
Transistor a “VOLTAGE” operated device.
There are two main types of field effect transistor, the Junction Field Effect
Transistor (JFET) and Metal Oxide Semiconductor Field Effect Transistor (MOSFET).
Junction Field Effect Transistor

There are two types of JFET namely n-channel and p-channel. N-channel type
means the carrier type in the conducting channel is electron. Likewise, for p-channel
type, the carrier type in conducting channel is hole. JFET has three terminals, which are
gate G, drain D and source S. The gate is used to control the flow of carrier from source

To drain. Source is the terminal that emits carrier and the drain is the terminal that
receives carrier.
In normal operation, the gate of JFET is always reverse-biased. Thus, in n-channel type, the gate
is biased with negative voltage i.e. gate voltage is less than zero volt VG < 0, whilst for p channel
type, the gate is biased with positive voltage i.e. gate voltage is greater than zero voltage VG >
0. The source and drain are biased according to the channel type or carrier type. If it is an n-
channel JFET (electron as carrier), the source is biased with negative voltage while the drain is
biased with positive voltage. Alternatively, it can be biased such that the drain voltage VD is
greater than the source voltage VS . i.e., VD > VS. If it is a p-channel JFET (hole as carrier), the
source is biased with positive voltage while the drain is biased with negative voltage.
Alternatively, it can be biased such that the drain voltage VD is less than the source voltage VS.
i.e., VD < VS
Circuit Diagram:
Expected Waveforms:

Procedure:
a) Transfer Characteristics:
1. Connect the circuit as shown in the figure above.

2. Set voltage VDS = 5V (BFW10).
3. Varying VDD in steps of 0.5V until the current ID reduces to minimum value.
4. Varying VGG gradually, note down both drain current ID and gate-source voltage
(VGS).
5. Repeat above procedure (step 3) for VDS = 10V (BFW10).
b) Drain Characteristics:
1. Connect the circuit as shown in the figure above.
2. Keep VGS = 0V by varying VGG.
3. Varying VDD gradually in steps of 1V up to 10V note down drain current I D and
drain to source voltage (VDS).
4. Repeat above procedure for VGS = -1V, -2V, up to VGS = VP;
OBSERVATION:
Drain Characteristics:
SI.NO VGS=0V VGS= -1V VGS= -3V VGS= VP

(Constant) (Constant) (Constant) (Constant)
VDS ID VDS ID VDS ID VDS ID
(V) (mA) (V) (mA) (V) (mA) (V) (mA)
1
2
3
5
6

Transfer Characteristics:
VDS = 1V VDS = 3V VDS = 5V

VGS(v) ID(mA) VGS(v) ID(mA) VGS(v) ID(mA)
1.Plot the drain characteristics by taking VDS on X-axis and ID on Y-axis at a

constant VGS.
2.Plot the transfer characteristics by taking VGS on X-axis and taking ID on Y-axis at
constant VDS.
Operation:
The circuit diagram for studying drain and transfer characteristics is shown in the figure1.
1.Drain characteristics are obtained between the drain to source voltage (V DS) and
drain current (ID) taking gate to source voltage (VGS) as the constant parameter.
2.Transfer characteristics are obtained between the gate to source voltage (V GS)
and drain current (ID) taking drain to source voltage (VDS) as the constant
parameter.
Calculations from Graph:
1. Drain Resistance (rd): It is given by the relation of small change in drain to

source voltage (∆VDS) to the corresponding change in Drain current (∆ID) for a
constant gate to source voltage ( VGS), when the JFET is operating in pinch-off
∆𝑉
region. 𝑟𝑑 = ∆𝐼𝐷𝑆 at a constant VGS (from drain characteristics)
𝐷
2. Trans Conductance (gm): Ratio of small change in drain current (∆ID) to the
corresponding change in gate to source voltage (∆VGS) for a constant VDS.
∆𝐼
g m = ∆𝑉 𝐷 at constant VDS (from transfer characteristics).
𝐺𝑆

The value of gm is expressed in mho’s ( ) or Siemens (s).
3. Amplification factor (µ): It is given by the ratio of small change in drain to

source voltage ( VDS) to the corresponding change in gate to source voltage (
VGS) for a constant drain current (ID).
RESULTS:
1. 𝒓𝒅 =
2. g 𝒎 =
3. 𝝁 =
Viva Questions:
Q1. Why is JFET called as a unipolar device?

JFETs can be called UNIPOLAR devices because the charge carriers that carry the current
through the device are all of the same type i.e. either holes or electrons, but not both. This
distinguishes JFETs from the bipolar devices in which both holes and electrons are responsible
for current flow in any one device.
Q2. How JFET is a voltage controlled device?
A JFET is voltage controlled device because its output characteristics are determined by the
Field which depends on Voltage applied.
It is a voltage−controlled device in which current flows from the SOURCE terminal (equivalent
to the emitter in a bipolar transistor) to the DRAIN (equivalent to the collector). A voltage
applied between the source terminal and a GATE terminal (equivalent to the base) is used to
control the source − drain current.
Q3. What are the advantages of JFET?

It is a unipolar device, depending only upon majority current flow. It is less noisy. and is thus
found in FM tuners and in low-noise amplifiers for VHF and satellite receivers. It is relatively
immune to radiation. It exhibits no offset voltage at zero drain current and hence makes an
excellent signal chopper.
Q4. What is pinch-off voltage?
Pinch-off voltage is the drain to source voltage after which the drain to source current
becomes almost constant and JFET enters into saturation region and is defined only when gate
to source voltage is zero.
Q5. Which type of JFET biasing requires negative voltage supply?

Gate
Q6. What are the applications of JFET?
JFETs can be used for several applications including:
 High input impedance amplifier
 Low noise amplifier
 Differential amplifier
 Analog switch
 Voltage controlled resistor
Q7. What is trans conductance?
Trans conductance is an expression of the performance of a bipolar transistor or field-effect

transistor (FET). In general, the larger the Trans conductance figure for a device, the greater
the gain (amplification) it is capable of delivering, when all other factors are held constant. The
symbol for Trans conductance is gm.
Q8. When the JFET is no longer able to control the current, this point is called as?
Breakdown region
Q9. What is transfer characteristics? Give the relation between µ, 𝒈𝒎 and 𝒓𝒅 ?
The transfer characteristic for a JFET can be determined by keeping drain-source voltage, VDS
constant and determining drain current ID for various values of gate-source voltage VGS. The
curve is plotted between gate-source voltage VGS and drain current ID.

µ = 𝒈𝒎 × 𝒓𝒅
Q10. Why do we get 180 degree phase shift in FET amplifier?
The reason for the phase shift can be seen easily by observing the operation of the N-channel
JFET. On the positive alternation of the input signal, the amount of reverse bias on the P-type
gate material is reduced, thus increasing the effective cross-sectional area of the channel and
decreasing source-to-drain resistance. When resistance decreases, current flow through the
JFET increases. This increase causes the voltage drop to increase, which in turn causes the
drain voltage to decrease. On the negative alternation of the cycle, the amount of reverse bias
on the gate of the JFET is increased and the action of the circuit is reversed. The result is an
output signal, which is an amplified 180-degree-out-of-phase version of the input signal.
Q11. ______ JFET amplifier provides a gain less than 1?
Common-drain
Q12. Why JFET apparatus must be handled with care while performing the experiment?
Because transistors are damaged by excess of heat while soldering or when there is a sudden
urge of current due to accidental shorting of leads while measuring voltages on transistors, in
operation.

Experiment No. 8:
Characteristics of MOSFET:
Aim: To design and plot the input and output characteristics of n-channel MOSFET and to
Calculate drain dynamic resistance, mutual conductance and amplification factor
Sl. No. Components Details Specification Quantity

1. Transistor BS170 1 No.
2. Resistors 1 KΩ Each 2 No
3. DC Supply, Signal Generator, CRO with Probes
THEORY:
Metal Oxide Semiconductor Field Effect Transistor (MOSFET) has three terminals
source gate and drain. It uses a thin layer of silicon dioxide as an insulator between the
gate and the channel. It is also known as Insulated Gate Field Effect Transistor.
There are two types of MOSFET, depletion and enhancement types. Consider
the N channel depletion type MOSFET. Heavily doped two N- type regions are diffused
on a lightly doped P-type substrate to form source and drain. Between these two N type
wells a lightly doped N type material forms a channel. A thin layer of SiO2 which is an
insulating material is fabricated on the surface above the channel and the gate terminal
is attached to it. Source and Drain terminals are attached to the heavily doped N type
material with metal contacts.
A positive voltage VDS is applied at the drain with respect to source to establish
drain current. When a negative voltage VGS is applied at the gate with respect to the
source, positive charges get induced in the channel resulting the channel becoming

Thinner. This reduces the current flow through the channel. If the magnitude of
VGS is increased, the drain current decreases. If a positive voltage is applied at the gate,
drain current increases.
Enhancement type MOSFET does not have a channel fabricated in it. The applied
positive voltage induces negative charges between the source and drain and a channel
forms. BS170 is a low power enhancement type MOSFET. Some MOSFETS are able to
function in Enhancement and Depletion modes.
EMOSFET-Enhancement MOSFET
Although DE-MOSFET is useful in special applications, it does not enjoy

widespread use. However, it played an important role in history because it was part of
the evolution towards the E-mode MOSFET, a device that has revolutionized the
electronic industry. E-MOSFET has become enormously important, in digital electronics
and. In the absence of E-MOSFET’s the personal computers (PCs) that are now so
widespread would not exist.
Construction of an EMOSFET:
Construction of EMOSFET
Figure shows the construction of an N-channel E-MOSFET. The main difference

between the construction of DE-MOSFET and that of E-MOSFET, as we see from the
figures given below the E-MOSFET substrate extends all the way to the silicon dioxide

(SiO2) and no channels are doped between the source and the drain. Channels are
electrically induced in these MOSFETs, when a positive gate-source voltage VGS is
applied to it.
Operation of an EMOSFET:
Working of an EMOSFET
As its name indicates, this MOSFET operates only in the enhancement

mode and has no depletion mode. It operates with large positive gate voltage only. It
does not conduct when the gate-source voltage VGS = 0. This is the reason that it is
called normally-off MOSFET. In these MOSFET’s drain current ID flows only when
VGS exceeds VGST [gate-to-source threshold voltage].
When drain is applied with positive voltage with respect to source and no
potential is applied to the gate two N-regions and one P-substrate from two P-N
junctions connected back to back with a resistance of the P-substrate. So a very small
drain current that is, reverse leakage current flows. If the P-type substrate is now
connected to the source terminal, there is zero voltage across the source substrate
junction, and the–drain-substrate junction remains reverse biased.
When the gate is made positive with respect to the source and the substrate,
negative (i.e. minority) charge carriers within the substrate are attracted to the
positive gate and accumulate close to the-surface of the substrate. As the gate
voltage is increased, more and more electrons accumulate under the gate. Since these

electrons can not flow across the insulated layer of silicon dioxide to the gate, so they
accumulate at the surface of the substrate just below the gate. These accumulated
minority charge carriers N -type channel stretching from drain to source. When this
occurs, a channel is induced by forming what is termed an inversion layer (N-type).
Now a drain current start flowing. The strength of the drain current depends upon the
channel resistance which, in turn, depends upon the number of charge carriers
attracted to the positive gate. Thus drain current is controlled by the gate potential.
Since the conductivity of the channel is enhanced by the positive bias on the
gate so this device is also called the enhancement MOSFET or E- MOSFET.
The minimum value of gate-to-source voltage VGS that is required to form the
inversion layer (N-type) is termed the gate-to-source threshold voltage VGST. For
VGSbelow VGST, the drain current ID = 0. But for VGS exceeding VGST an N-type
inversion layer connects the source to drain and the drain current ID is large.
Depending upon the device being used, VGST may vary from less than 1 V to more
than 5 V.
JFETs and DE-MOSFETs are classified as the depletion-mode devices because

their conductivity depends on the action of depletion layers. E-MOSFET is classified as
an enhancement-mode device because its conductivity depends on the action of the
inversion layer. Depletion-mode devices are normally ON when the gate-source
voltage VGS = 0, whereas the enhancement-mode devices are normally OFF when
VGS = 0.
Characteristics of an EMOSFET.

Drain Characteristics-EMOSFET
Drain characteristics of an N-channel E-MOSFET are shown in figure. The

lowest curve is the VGST curve. When VGS is lesser than VGST, ID is approximately
zero. When VGS is greater than VGST, the device turns- on and the drain current ID is
controlled by the gate voltage. The characteristic curves have almost vertical and
almost horizontal parts. The almost vertical components of the curves correspond to
the ohmic region, and the horizontal components correspond to the constant current
region. Thus E-MOSFET can be operated in either of these regions i.e. it can be used as
a variable-voltage resistor (WR) or as a constant current source.
EMOSFET-Transfer Characteristics

Figure shows a typical transconductance curve. The current IDSS at VGS <=0 is
very small, being of the order of a few nano-amperes. When the VGS is made positive,
the drain current ID increases slowly at first, and then much more rapidly with an
increase in VGS. The manufacturer sometimes indicates the gate-source threshold
voltage VGST at which the drain current ID attains some defined small value, say 10 u
A. A current ID (0N,corresponding approximately to the maximum value given on the
drain characteristics and the values of VGS required to give this current VGs QN are
also usually given on the manufacturers data sheet.
The equation for the transfer characteristic does not obey equation. However
it does follow a similar “square law type” of relationship. The equation for the
transfer characteristic of E-MOSFETs is given as:
ID=K(VGS-VGST)2
Schematic Symbols of EMOSFET.
EMOSFET-Schematic symbols
Schematic symbols for an N-channel E-MOSFET are shown in figure. For zero
value of VGS, the E-MOSFET is OFF because there is no conducting channel between
source and drain. Each of schematic symbols shown in figures, has broken channel
line to indicate this normally OFF condition. As we know that for VGS exceeding the
threshold voltage VGST, an N-type inversion layer, connecting the source to drain, is

created. In each of the schematic symbols, the arrow points to this inversion layer,
which acts like an N-channel when the device is conducting. In each case, the fact that
the device has an insulated gate is indicated by the gate not making direct contact
with the channel. The schematic symbol shown in figure shows the source and
substrate internally connected, while the other symbol shown in figure shows the
substrate connection brought out separately from the source.
The schematic symbols for a P-channel E-MOSFET are also shown. In these
cases the arrow points outwards.
CIRCUIT DIAGRAM:
Fig 8.1. Enhancement Mode MOSFET and
Expected Graph:
Fig 8.2: Transfer characteristics and Drain characteristics

Procedure (Transfer characteristics):

1. Now vary the power supply V2 and set the VDS to 6v
2. Vary the power supply V1 in steps and note down the readings of VGS and ID at
each step and tabulate the readings in tabular column 2.
3. Vary the power supply V2 and set the VDS to 12v
4. Vary the power supply V1 in steps and note down the readings of VGS and ID at
each step and tabulate the readings in tabular column 2.
5. Determine trans conductance (gm) with the help of graph VGS v/s ID.
Procedure (Drain characteristics):

1. Rig up the circuit as shown in fig 8.2 above and set VGS=0v.
2. Then vary the power supply V2 and note down VDS and ID at each step and
tabulate the reading in the tabular column 1.
3. Now set the gate voltage VGS to -0.5v with the help of power supply V1.
4. Then vary the power supply V2 and note down VDS and ID at each step and
tabulate the readings in tabular column 1.
5. Repeat the same for VGS = +0.5v.
6. Determine drain resistance (rd) with the help of graph VDS v/s ID.
Tabular column 1 (Transfer characteristics):
VDS = 5V VDS = 10V

VGS(v) ID(mA) VGS(v) ID(mA)
Tabular column 2(Drain characteristics):
VGS = VGS = VGS =

VDS(v) ID(mA) VDS(v) ID(mA) VDS(v) ID(mA)
Calculations from Graph:
1. Trans Conductance (gm): Ratio of small change in drain current ( ID) to the
corresponding change in gate to source voltage ( VGS) for a constant VDS.
∆𝐼
g m = ∆𝑉 𝐷 At constant VDS (from transfer characteristics).
𝐺𝑆
The value of g m is expressed in mho’s ( ) or Siemens (s).
Result:
1. g 𝒎 =
Viva Questions:
1. What is drift current?

Drift current is the current due to the movement of charge carriers in a specific direction
opposite to the applied electric field.
2. Expand MOSFET
Metal Oxide Semiconductor Field Effect Transistor
3. What is a MOSFET?
It is a special type of FET in which there is a thin layer of silicon dioxide between gate
and the channel that works by electronically varying the width of a channel along which charge
carriers flow.
4. Mention the two types of MOSFETs

i) Depletion -type
ii) Enhancement –type

5. Mention the applications of MOSFET.

a) It is used as an analog switch.
b) MOSFET is used as a transistor in integrated circuits.
c) It is used as an oscillator in radio system.
6. What is biasing?
Biasing is a method of applying a suitable potential across any electronic equipment in
order to make it operate as we require.
7. What is the advantage of MOSFETs over JFETs?

MOSFETs have a very high input impedance. MOSFETs are thermally very stable which
make them extremely popular in computer circuit design.
8. Mention the number of terminals that a MOSFET has.

MOSFET has four terminals:- source, gate, ,substrate.
9. What accounts for the high input impedance of a MOSFET device?

The insulating layer of SiO2 accounts for the desirable high input impedance.
10. Mention the parameters of a MOSFET.

Drain Resistance, Trans conductance, Amplification factor.
11. What is the basic difference in construction of a depletion type MOSFET and an
Enhancement type MOSFET?
The depletion type MOSFET consists of an n-channel between the two n-doped regions
while the enhancement type MOSFET does not.
12. What does it mean “the channel is pinched off”?

For a MOSFET when VGS is greater than Vt, a channel is induced. As we increase VDS
current starts flowing from Drain to Source (triode region). When we further increase VDS, till
the voltage between gate and channel at the drain end to become Vt, i.e. VGS – VDS = Vt, the
channel depth at Drain MOSFET end decreases almost to zero, and the channel is said to be
pinched off. This is where a MOSFET enters saturation region.
13. What is Forward Trans conductance?

It is the ratio of ID and (VGS – VGS(th)). In a MOSFET switching circuit it determines the
𝑑𝑉
clamping voltage level of the gate – source voltage and thus influences 𝑑𝑡𝐷𝑆 during turn on and
turn off.
14. Explain the three regions of operation of a MOSFET.

Cut-off region: When VGS < VT, no channel is induced and the MOSFET will be in cut-off
region. No current flows.

Triode region: When VGS ≥ VT, a channel will be induced and current starts flowing if
VDS > 0. MOSFET will be in triode region as long as VDS < VGS – VT.
Saturation region: When VGS ≥ VT, and VDS ≥ VGS – VT, the channel will be in saturation
mode, where the current value saturates. There will be little or no effect on MOSFET when VDS
is further increased.

Experiment No. 9:
Class B Push-Pull Amplifier
Aim: Set-up and study the working of complementary symmetry class B push pull power
amplifier and calculate the efficiency.
Components Required: SL100, SK100, resistors, DRB, DC milli ammeter, DMM, CRO probes,
spring board and connecting wires.
Theory:
A push pull amplifier is an amplifier which has an output stage that can drive a current
in either direction through the load. The output stage of a typical push pull amplifier consists of
two identical BJTs or MOSFETs one sourcing current through the load while the other one
sinking the current from the load. Push pull amplifiers are superior over single ended amplifiers
(using a single transistor at the output for driving the load) in terms of distortion and
performance. A single ended amplifier, how well it may be designed will surely introduce some
distortion due to the non-linearity of its dynamic transfer characteristics. Push pull amplifiers
are commonly used in situations where low distortion, high efficiency and high output power
are required. The basic operation of a push pull amplifier is as follows: The signal to be
amplified is first split into two identical signals 180° out of phase. Generally this splitting is done
using an input coupling transformer. The input coupling transformer is so arranged that one
signal in applied to the input of one transistor and the other signal is applied to the input of the
other transistor. Advantages of push pull amplifier are low distortion, absence of magnetic
saturation in the coupling transformer core, and cancellation of power supply ripples which
results in the absence of hum while the disadvantages are the need of two identical transistors
and the requirement of bulky and costly coupling transformers.
Cross over distortion.

Cross over distortion is a type of distortion commonly seen in Class B amplifier configurations.
As we said earlier, the transistor are biased at cut off point in the Class B amplifier. We all know
a Silicon transistor requires 0.7V and a Germanium diode requires 0.2V of voltage across its
base emitter junction before entering in to conducting mode and this base emitter voltage is
called cut in voltage. Germanium diodes are out of scope in amplifiers and we can talk about a
Class B push pull amplifier based on Silicon transistors. Since the transistors are biased to cut
off, the voltage across their base emitter junction remains zero during the zero input condition.
The only source for the transistors to get the necessary cut in voltage is the input signal itself
and the required cut in voltage will be looted from the input signal itself. As a result portions of
the input wave form that are below 0.7V (cut in voltage) will be cancelled and so the

corresponding portions will be absent in the output wave form too. Have a look at the figure
Procedure:-
1. Place the components on spring board or bread board and connect them as per
given fig a. Use wires for connection as required.
2. Connect one channel of CRO to input signal and connect second channel to output.
3. Keep frequency of signal generator around 10kHz and increase the amplitude.
Observe the cross over distortion.
4. Gradually increase the input signal until the output signal gets distorted. When this
happens slightly reduce the input signal amplitude such that output is maximum
undistorted signal. Note down the Vpeak of the output waveform and VCC.
5. Calculate the efficiency using equation %efficiency = [Pac/Pdc]x 100
Circuit Diagram:
XMM1
Vcc1
XSC1
XFG1 5V
Q1 Ext Trig
+
_
A B
SL100 + _ + _
Q2
DRB
SK100
Vcc2
XMM2
-5 V
Tabular column:

Po=(Vop-p)2 / Pin = Vcc x (Idc1 +

RL in Ω Vop-p Idc %ŋ=Po/Pinx100
8RL Idc2)
Result:
Maximum Efficiency = _____________
Viva Questions:
1. What is an amplifier?
An amplifier is one which strengthens the signal i.e. it increases its amplitude.
2. What are the different types of amplifiers?

The different types of amplifiers are voltage amplifiers, current amplifiers, power
amplifiers.
3. What are the different types of power amplifiers?

The different types of power amplifiers are class-A, class-B, class-AB, class-C and class-D.
4. What are some of the applications of power amplifiers?

Power amplifiers are used in DVD players, audio systems and are also used as audio and
video amplifiers.
5. What is the conduction angle of Class-A power amplifier?

360 degree
6. What is the conduction angle of Class-B power amplifier?

180 degree
7. What is the conduction angle of Class-AB power amplifier?

Between 180- 360 degree.
8. What is the conduction angle of Class-C power amplifier?

Less than 180 degree.
9. What is the efficiency of Class-A power amplifier?

25%
10. How can we increase the efficiency of Class-A power amplifier?

We can increase the efficiency of a Class-A power amplifier by coupling it with a
transformer.
11. What is the efficiency of a transformer coupled Class-A power amplifier?

50%
12. What is the efficiency of a Class-B power amplifier?

75%
13. What is the efficiency of a Class-AB power amplifier?

25% - 75%
14. What is the efficiency of a Class-C power amplifier?

Greater than 75%
15. What is the efficiency of a Class-D power amplifier?

Approximately 100%

Experiment No. 10:

RC Phase shift Oscillator
Aim: To design and test an RC phase shift oscillator for the given frequency of
oscillations.
Components Required:
Sl.
Particulars Range Quantity
No.
1. Transistor SL 100 - 01
4. Multi meter - 01
5. DRB - 01
Theory:
An oscillator is an Electronic circuit that produces a repetitive electronic signal, often a
sine wave or a square wave. RC-phase shift oscillator is used generally at low frequencies
(Audio frequency). It consists of a CE amplifier as basic amplifier circuit and three identical RC
networks for feedback, each section of RC network introduces a phase shift of 60 and the total
phase shift by feedback network is 180. The CE amplifier introduces 180 phase shift hence the
overall phase shift is 360. The feedback factor for an RC phase shift oscillator is 1/29, hence
the gain of amplifier (A) should be  29 to satisfy Barkhausen criteria.
The Barkhausen criteria states that in a positive feedback amplifier to obtain sustained
oscillations, the overall loop gain must be unity (1) and the overall phase shift must be 0 or
360. The amount of phase shift in the circuit depends upon the values of the resistor and the
capacitor and the chosen frequency of oscillations with the phase angle being given as
 XC 
  tan 1  
 R 

Circuit diagram:
VDD
34V
Rd Design:
47kΩ
Cc2
𝑉𝑜
0.47µF Choosing the Q-point,
Q1
Cc1
WKT, 𝐼𝐷𝑆𝑆 = 8𝑚𝐴 and Vp= -4V;
0.47µF BFW10
R8 Using Shockley’s equation

𝑉
1kΩ
50 % 𝐼𝐷 = 𝐼𝐷𝑆𝑆 (1 − 𝑉𝐺𝑆 )2
Rg Key=A 𝑝
2.2MΩ We get 𝑉𝐺𝑆𝑞 = -3V; (Assume 𝐼𝐷𝑞 = 0.5𝑚𝐴)
R4 C5
10kΩ 1µF Now,
Applying KVL to output side, we have
𝑉𝐷𝐷 = 𝑉𝐷𝑆 + 𝐼𝐷 (𝑅𝐷 + 𝑅𝑆 )
For better amplification select 𝑉𝐷𝑆 such
R1 R2 R3
that it is greater than Vp.
27kΩ 27kΩ 27kΩ
0.01µF 0.01µF 0.01µF
Let 𝑉𝐷𝑆 be 8V and 𝑉𝐷𝐷 = 34V;
C1 C2 C3
Therefore, if we select 𝑅𝑆 to be 5.6K, then
from the above equation we get

𝑅𝐷 = 47𝐾Ω ; (We know that the gain of the amplifier has to be greater than 29. So we have
chosen RD such that the loss occurred in the tank circuit is compensated and sustained
oscillations are obtained)
Now,
𝐴𝑣 = −𝑔𝑚 × 𝑟𝑑 ;
If 𝑔𝑚 = 1m℧, then gain
𝐴𝑣 = 1m × 47K ; 𝐴𝑣 = 47;
For RC network:
6
𝑓𝑜 =
2𝜋𝑅𝐶
For 𝑓𝑜 = 1.5𝐾𝐻𝑧, Choose, C=0.01uF,
∴𝑅 = 25.98 KΩ, Choose R=27KΩ;
PROCEDURE:
1. Connect the circuit diagram as shown in the figure.

2. Switch on the power supply.
3. Connect the O/P terminals to C.R.O.
4. Observe the sinusoidal wave form on C.R.O. Determine the time period (T) of the wave form
and frequency (1/T).
Result:
𝑓𝑜 =
Viva Questions:
1. Classify the sinusoidal oscillators.

Sinusoidal oscillators are classified as RC and LC oscillators. The LC oscillators are used
for high frequency signal generation, while the RC oscillators are used for audio frequency
signal generation.
2. What are the practical applications of a phase shift oscillator?
RC phase shift oscillators are widely used as audio frequency oscillators.

3. What happens when 𝑪𝒆 is removed? Why?

When 𝐶𝑒 is removed, feedback exists and the gain of the amplifier decreases. Therefore,
the oscillation gets damped.
4. Why a minimum 𝒉𝑭𝑬 value is necessary for the circuit to function as an oscillator?
A minimum 𝑕𝐹𝐸 is necessary to obtain sufficient gain for the amplifier part to satisfy the
Barkhausen criteria for oscillations.
5. How does one RC section generate a phase difference of 60⁰?
Phase shift introduced by one RC section is equal to tan−1 (𝜔𝑅𝐶). Suitable values of R and C will
provide 60⁰ phase shift between input and output of one RC network at a particular frequency.
6. Expression for frequency of RC phase shift oscillator.
1 6 𝑅𝑐
For a BJT ckt :- ; For a FET ckt :- ; where k =
2𝜋𝑅𝐶 6+4𝑘 2𝜋𝑅𝐶 𝑅
7. What is the formula for feedback fraction?

Feedback fraction β=output of feedback circuit/input to feedback circuit.
8. What is other name of phase shift oscillator?

Fixed frequency oscillator.
15. What are the advantages of using RC phase shift oscillator?

1. Simple to design.
2. Can produce output over audio frequency range.
3. Produces sinusoidal output.
4. It is fixed frequency oscillator.
16. What are the disadvantages of using RC phase shift oscillator?
1. To vary the frequency, values of R and C of all three sections are to be varied
simultaneously which is practically difficult.
2. Frequency stability is poor. 3. Circuit will give low output.
17. What are the applications of RC oscillator?
1. Used in commercial audio frequency generator.
2. Used in low frequency applications

Experiment No. 11
RF Oscillators (Hartley & Collpit’s)
Aim: To design and test Hartley and Colpitt’s oscillator for the given frequency of oscillations
crystal oscillator.
Sl.
Particulars Range Quantity
No.
1. Transistor SL 100 - 01
4. Multi meter - 01
5. DCB, DIB - 2 each
Theory:
An oscillator is an electronic circuit that produces a repetitive electronic signal, often a
sine wave or a square wave. The Hartley oscillator is an LC electronic oscillator that derives its
feedback from a tapped coil in parallel with a capacitor (the tank circuit). A Hartley oscillator is
essentially any configuration that uses a pair of series-connected coils and a single capacitor. It
was invented by Ralph Hartley.
A Colpitts oscillator, named after its inventor Edwin H. Colpitts, is one of a number of
designs for electronic oscillator circuits using the combination of an inductance (L) with a
capacitor (C) for frequency determination, thus also called LC oscillator. One of the key features
of this type of oscillator is its simplicity (needs only a single inductor) and robustness. A Colpitts
oscillator is the electrical dual of a Hartley oscillator. Fig. 1 shows the basic Colpitts circuit,
where two capacitors and one inductor determine the frequency of oscillation. The feedback
needed for oscillation is taken from a voltage divider made by the two capacitors, where in the
Hartley
oscillator the feedback is taken from a voltage divider made by two inductors (or a
tapped single inductor).

The basic CE amplifier provides 180 phase shift and the feedback network provides the
remaining 180 phase shift so that the overall phase shift is 360 to satisfy the Barkhausen
criteria. The Barkhausen criteria states that in a positive feedback amplifier to obtain sustained
oscillations, the overall loop gain must be unity (1) and the overall phase shift must be 0 or
360.
When the power supply is switched on, due to random motion of electrons in passive
components like resistor, capacitor a noise voltage of different frequencies will be developed at
the collector terminal of transistor, out of these the designed frequency signal is fed back to the
amplifier by the feedback network and the process repeats to give suitable oscillation at output
terminal.
Design:
Select the transistor having the following parameters,
IE = IC = 2mA, 𝛽 = 100, VCE = 5V;
Selection of R E :
𝑉𝐶𝐶 = 100𝑉, We normally take 𝑉𝐸 to be 10% of 𝑉𝐶𝐶 . Therefore, 𝑉𝐸 = 1𝑉.

𝑉
WKT, 𝑉𝐸 = 𝐼𝐸 𝑅𝐸 , hence 𝑅𝐸 = 𝐼 𝐸 = 500Ω. Choose 𝑅𝐸 = 470Ω.
𝐸
Selection of 𝑅𝐶 :
Taking 𝑉𝐶𝐸 = 𝑉𝐶𝐶 /2 and applying KVL to output loop we have, 𝑅𝐶 = (𝑉𝐶𝐶 − 𝑉𝐶𝐸 − 𝑉𝐸 )/𝐼𝐸 .
By substituting the values we have 𝑅𝐶 = 2.2𝐾Ω.
Selection of 𝑅1 & 𝑅2 :
From circuit, 𝑉𝐵 = 𝑉𝐵𝐸 + 𝑉𝐸 ; Therefore, 𝑉𝐵 = 1.7𝑉;

By applying voltage divider rule we have 𝑉𝐵 = (𝑉𝐶𝐶 × 𝑅2 )/(𝑅1 + 𝑅2 );
By substituting the values we get 𝑅1 = 4.8𝑅2 ;
Assume 𝑅2 = 4.7𝐾Ω, then, 𝑅1 = 22𝐾Ω.
Selection of bypass capacitors:

In the basic series feedback circuit above, the emitter resistor, RE performs two functions: DC
negative feedback for stable biasing and AC negative feedback for signal trans conductance and
voltage gain specification. But as the emitter resistance is a feedback resistor, it will also reduce
the amplifiers gain due to fluctuations in the emitter current IE owing to the AC input signal.
To overcome this problem a capacitor, called an “Emitter Bypass Capacitor”, CE is connected
across the emitter resistance as shown. This bypass capacitor causes the frequency response of
the amplifier to break at a designated cut-off frequency, ƒc, by-passing (hence its name) signal
currents to ground.
Being a capacitor it appears as an open circuit for the DC bias and therefore, the biased
currents and voltages are unaffected by the addition of the bypass capacitor. Over the
amplifiers operating range of frequencies, the capacitors reactance, XC will be extremely high at
low frequencies producing a negative feedback effect, reducing the amplifiers gain.
The value of this bypass capacitor CE is generally chosen to provide a capacitive reactance of, at
most one-tenth (1/10th) of the value of the emitter resistor RE at the lowest cut-off frequency
point. Then assuming that the lowest signal frequency to be amplified is 100 Hz. The value of
the bypass capacitor CE is calculated as:
𝑋𝐶𝐸 = 𝑅𝐸 /10, At f = 100Hz, by substituting the values we get C= 33𝜇𝐹. Choose C = 47µF.
(Select Coupling capacitors to be 0.47µF).
Circuit for Hartley oscillator:
Hartley oscillator: Design of tank circuit:
1
Let 𝑓𝑜 = 100𝐾𝐻𝑧; WKT, 𝑓𝑜 = 2𝜋 ;
𝐿𝑒𝑞 ×𝐶
Assume C = 1000pF, then 𝐿𝑒𝑞 = 2.5𝑚𝐻; But 𝐿𝑒𝑞 = 𝐿1 + 𝐿2 , Hence, Choose 𝐿1 = 𝐿2 = 1.2𝑚𝐻.

Circuit for Colpitts oscillator:
Colpitts oscillator: Design of tank circuit.

1
Let 𝑓𝑜 = 100𝐾𝐻𝑧; WKT, 𝑓𝑜 = 2𝜋 ;
𝐶𝑒𝑞 ×𝐿
𝐶 𝐶
Assume 𝐶1 = 𝐶2 = 1000pF, where 𝐶𝑒𝑞 = 𝐶 1+𝐶2 ; we get, 𝐿 = 5𝑚𝐻;
1 2
Procedure:
1. Components / equipment are tested for their good working condition.
2. Connections are made as shown in the diagram.
3. By disconnecting the AC source measure the quiescent point (VCE and IC = VRC / RC)
and VBE.
4. Observe the output wave form on CRO and measure the frequency.
5. Verify the frequency with the crystal frequency.

Result:
Hartley Oscillator:
Q Point: VCE = _____ V, 𝐼𝐶 = ______ mA
𝑓𝑜 Theoretical = __________ Hz, 𝑓𝑜 Practical = ____________ Hz
Colpitt’s Oscillator:
Q Point: VCE = _____ V, 𝐼𝐶 = ______ mA
𝑓𝑜 Theoretical = __________ Hz, 𝑓𝑜 Practical = ____________ Hz
Viva Questions:
1. What are oscillators?

An oscillator is an electronic circuit that produces a repetitive electronic signal, often
a sine wave or a square wave
2. What is Barkhausen’s criterion?
It states the two conditions that must be met to obtain sustained oscillations.
i) Loop gain = 1 ; i.e., Aβ = 1;
ii) Loop phase shift = 0⁰ (or) 360⁰.
3. How do the oscillation initially start?

When the power supply is switched on, due to random motion of electrons in passive
components like resistors and capacitors, a noise voltage of different frequencies will be
developed at the collector terminal of the transistor, out of these, the designed frequency
signal is fed back to the amplifier by the feedback n/w and the process repeats to give suitable
oscillations at output terminal.

4. How are oscillations produced in the tank circuit?

The tanks circuit mainly consists of an inductor and a capacitor connected together
(LC n/w). An LC circuit, oscillating at its natural resonant frequency, can store electrical energy.
A capacitor stores energy in the electric field (E) between its plates, depending on the voltage
across it, and an inductor stores energy in its magnetic field (B), depending on the current
through it.
If an inductor is connected across a charged capacitor, current will start to flow through the
inductor, building up a magnetic field around it and reducing the voltage on the capacitor.
Eventually all the charge on the capacitor will be gone and the voltage across it will reach zero.
However, the current will continue, because inductors resist changes in current. The current
will begin to charge the capacitor with a voltage of opposite polarity to its original charge. Due
to Faraday's law, the EMF which drives the current is caused by a decrease in the magnetic
field, thus the energy required to charge the capacitor is extracted from the magnetic field.
When the magnetic field is completely dissipated the current will stop and the charge will again
be stored in the capacitor, with the opposite polarity as before. Then the cycle will begin again,
with the current flowing in the opposite direction through the inductor.
5. Which type of biasing is used in the oscillator circuit?

Voltage divider biasing is used.
6. What is the use of coupling capacitors?
Coupling capacitors are used to provide isolation between AC & DC circuits.
7. What is the expression for frequency of oscillations obtained?

The frequency of oscillations is given by,
1
For Hartley, 𝑓0 = where 𝐿𝑒𝑞 = 𝐿1 + 𝐿2
2𝜋 𝐿𝑒𝑞 ×𝐶
1 1 1 1
For Colpitt’s, 𝑓0 = 2𝜋 where = +
𝐶𝑒𝑞 ×𝐿 𝐶𝑒𝑞 𝐶1 𝐶2

Experiment No. 12:

Crystal Oscillator
Aim: Testing for the performance of BJT -Crystal oscillator for f0 > 100 KHz.
Transistor, Crystal 2MHz, Capacitors, Resistors, POT, CRO, Power supply, Connecting wire
Multimeter, CRO probes etc.
Theory:
A crystal oscillator is an electronic circuit that uses the mechanical resonance of a vibrating
crystal of piezoelectric material to create an electrical signal with a very precise frequency. This
frequency is commonly used to keep track of time, to provide a stable clock signal for digital
integrated circuits and to stabilize frequencies for radio transmitters and receivers, the most
common type of piezoelectric resonator used is the quartz crystal, so the oscillator designed
using this crystal us called as the Crystal Oscillator.
Circuit diagram:

Design:
Select the transistor having the following parameters,
IE = IC = 2mA, 𝛽 = 100, VCE = 5V;
Selection of R E :
𝑉𝐶𝐶 = 100𝑉, We normally take 𝑉𝐸 to be 10% of 𝑉𝐶𝐶 . Therefore, 𝑉𝐸 = 1𝑉.

𝑉
WKT, 𝑉𝐸 = 𝐼𝐸 𝑅𝐸 , hence 𝑅𝐸 = 𝐼 𝐸 = 500Ω. Choose 𝑅𝐸 = 470Ω.
𝐸
Selection of 𝑅𝐶 :
Taking 𝑉𝐶𝐸 = 𝑉𝐶𝐶 /2 and applying KVL to output loop we have, 𝑅𝐶 = (𝑉𝐶𝐶 − 𝑉𝐶𝐸 − 𝑉𝐸 )/𝐼𝐸 .
By substituting the values we have 𝑅𝐶 = 2.2𝐾Ω.
Selection of 𝑅1 & 𝑅2 :
From circuit, 𝑉𝐵 = 𝑉𝐵𝐸 + 𝑉𝐸 ; Therefore, 𝑉𝐵 = 1.7𝑉;

By applying voltage divider rule we have 𝑉𝐵 = (𝑉𝐶𝐶 × 𝑅2 )/(𝑅1 + 𝑅2 );
By substituting the values we get 𝑅1 = 4.8𝑅2 ;
Assume 𝑅2 = 4.7𝐾Ω, then, 𝑅1 = 22𝐾Ω.
Selection of bypass capacitors:
In the basic series feedback circuit above, the emitter resistor, RE performs two functions: DC
negative feedback for stable biasing and AC negative feedback for signal trans conductance and
voltage gain specification. But as the emitter resistance is a feedback resistor, it will also reduce
the amplifiers gain due to fluctuations in the emitter current IE owing to the AC input signal.
To overcome this problem a capacitor, called an “Emitter Bypass Capacitor”, CE is connected
across the emitter resistance as shown. This bypass capacitor causes the frequency response of
the amplifier to break at a designated cut-off frequency, ƒC, by-passing (hence its name) signal
currents to ground.
Being a capacitor it appears as an open circuit for the DC bias and therefore, the biased
currents and voltages are unaffected by the addition of the bypass capacitor. Over the
amplifiers operating range of frequencies, the capacitors reactance, XC will be extremely high at
low frequencies producing a negative feedback effect, reducing the amplifiers gain.
The value of this bypass capacitor CE is generally chosen to provide a capacitive reactance of, at
most one-tenth (1/10th) of the value of the emitter resistor RE at the lowest cut-off frequency

point. Then assuming that the lowest signal frequency to be amplified is 100 Hz. The value of
the bypass capacitor CE is calculated as:
𝑋𝐶𝐸 = 𝑅𝐸 /10, At f = 100Hz, by substituting the values we get C= 33𝜇𝐹. Choose C = 47µF.
(Select Coupling capacitors to be 0.47µF).
OBSERVATIONS:
VBE =______Volts. VCE =______Volts.
PROCEDURE:

2. Measure the D.C. condition.
3. Vary the 1k potentiometer so as to get an un-distorted sine wave at the output.
4. Note down the amplitude & frequency of the output wave & frequency has to match
with the crystal frequency.
RESULT:
Frequency = __________Hz.
Amplitude =__________Hz
Viva Questions:
1. What is Crystal oscillator?

A crystal oscillator is an electronic circuit that uses mechanical resonance of a vibrating
crystal of piezoelectric material to create an electrical signal with precise frequency.
2. Which are two modes of resonance the crystal oscillator provides?
i) Parallel resonance
ii) Series resonance

3. What is the typical value of ‘Q’ of a crystal?

50,000
4. What is the electrical equivalent circuit of a piezoelectric crystal?
It is a capacitor C’ connected in parallel to a coil L, a capacitor C and a resistor R. the L is the
electrical equivalent of the crystal mass that is effective when it vibrates, C is the electrical
equivalent of mechanical compliance, R is electrical equivalent of mechanical friction and C’ is
the capacitance between the electrodes.
5. What are the advantages crystal oscillators?
i) Crystal has very high ‘Q’ value.
ii) Generates a very stable signal.
iii) Low level of phase noise.
iv) When used in a filter, it is possible to achieve very high selectivity.
v) Low cost.
6. Give some applications of crystal oscillators.

They are used in quartz wrist watches, to provide stable clock signal in circuits, used in radio
transmitters and receivers, used in computers etc.. In the modern age basically almost all
electronic circuits contain a crystal oscillator.
ADDITIONAL VIVA-VOCE QUESTIONS
[1] What are conductors, insulators, and semi-conductors? Give examples.
[2] Name different types of semiconductors.
[3] What are intrinsic semiconductors and extrinsic semiconductors?
[4] How do you get P-type and N-type semiconductors?
[5] What is doping? Name different levels of doping.
[6] Name different types of Dopants. .
[7] What do you understand by Donor and acceptor atoms?
[8] What is the other name for p-type and N-type semiconductors?
[9] What are majority carriers and minority carriers?
[10] What is the effect of temperature on semiconductors?
[11] What is drift current?.
[12] What is depletion region or space charge region?

[13] What is junction potential or potential barrier in PN junction?
[14] What is a diode? Name different types of diodes and name its applications
[15] What is biasing? Name different types w.r.t. Diode biasing
[16] How does a diode behave in its forward and reverse biased conditions?
[17] What is static and dynamic resistance of diode?
[18] Why the current in the forward biased diode takes exponential path?
[19] What do you understand 1?y Avalanche breakdown and zener breakdown?
[20] Why diode is called unidirectional device.
[21] What is PIV of a diode
[22] What is knee voltage or cut-in voltage?
[23] What do you mean by transition capacitance or space charge capacitor?
[24] What do you mean by diffusion capacitance or storage capacitance?
[25] What is a transistor? Why is it called so? .
[26] Name different types, of transistors?
[27] Name different configurations in which the transistor is operated
[28] Mention the applications of transistor. Explain how transistor is used as switch
[29] What is transistor biasing? Why is it necessary?
[30] What are the three different regions in which the transistor works?
[31] Why transistor is called current controlled device?
[32] What is FET? Why it is called so?
[33] What are the parameters of FET?
[34] What are the characteristics of FET?
[35] Why FET is known as voltage controlled device?
[36] What are the differences between BJT and FET?
[37] Mention applications of FET. What is pinch off voltage.
[38] What is an amplifier? What is the need for an amplifier circuit?
[39] How do you classify amplifiers? ,
[40] What is faithful amplification? How do you achieve this?
[41] What is coupling? Name different types of coupling

[42] What is operating point or quiescent point?
[43] What do you mean by frequency response of an amplifier?
[44] What are gain, Bandwidth, lower cutoff frequency and upper cutoff frequency?
[45] What is the figure of merit of an amplifier circuit?
[46] What are the advantages of RC coupled amplifier?
[47] Why a 3db point is taken to calculate Bandwidth?
[48] What is semi-log graph sheet? Why it is used to plot frequency response?
[49] How do you test a diode, transistor, FET?
[50] How do you identify the terminals of Diode, Transistor& FET?
[51] Mention the type number of the devices used in your lab.
[52] Describe the operation of NPN transistor. Define reverse saturation current.
[51] Explain Doping w.r.t. Three regions of transistor
[52] Explain the terms hie/hib, hoe/hob, hre/hrb, hre/hfb.
[53] Explain thermal runaway. How it can be prevented.
[54] Define FET parameters and write the relation between them.
[55] What are Drain Characteristics and transfer characteristics?
[56] Explain the construction and working of FET
[57] What is feedback? Name different types.
[58] What is the effect of negative feedback on the characteristics of an amplifier?
[59] Why common collector amplifier is known as emitter follower circuit?
[60] What is the application of emitter follower ckt?
[61] What is cascading and cascoding? Why do you cascade the amplifier ckts.?
[62] How do you determine the value of capacitor?
[63] Write down the diode current equation.
[64] Write symbols of various passive and active components
[65] How do you determine the value of resistor by color code method?
[66] What is tolerance and power rating of resistor?
[67] Name different types of resistors.
[68] How do you classify resistors?

[69] Name different types of capacitors.
[70] What are clipping circuits? Classify them.
[71] Mention the application of clipping circuits.
[72] What are clamping circuits? Classify them
[73] What is the other name of clamping circuits?
[74] Mention the applications of clamping circuits.
[75] What is Darlington emitter follower circuit?
[76] Can we increase the number of transistors in Darlington emitter follower circuit?
[77] Name different types of Emitter follower circuits.
[78] What is an Oscillator? Classify them.
[79] What are damped & Un-damped Oscillations?
[80] What are Barkhausen's criteria?
[81] What type of oscillator has got more frequency stability?
[82] What is the disadvantage of Hartley & Colpit's Oscillator?
[83] Why RC tank Circuit Oscillator is used for AF range?
[84] Why LC tank Circuit Oscillator is used for RF range?
[85] What type of feedback is used in Oscillator circuit?
[86] In a Transistor type No. SL 100 and in Diode BY 127, what does SL and BY stands for?
[87] Classify Amplifiers based on: operating point selection.
[88] What is the efficiency of Class B push pull amplifier?
[89] What is the drawback of Class B Push pull Amplifier? How it is eliminated.
[90] What is the advantage of having complimentary symmetry push pull amplifier?
[91] What is Bootstrapping? What is the advantage of bootstrapping?
[92] State Thevenin's Theorem and Maximum power transfer theorem.
[93] What is the figure of merit of resonance circuit?
[94] What is the application of resonant circuit?
[95] What is a rectifier? Classify.
[96] What is the efficiency of half wave and full wave rectifier?
[97] What is the advantage of Bridge rectifier of Centre tapped type FWR.

[98] What is the different between Darlington emitter follower circuit & Voltage follower
circuit using Op-Amp. Which is better
AEC LAB QUEETION BANK
1. Design a single stage CE amplifier using BJT with voltage divider bias
(Q-pt: 5V, 2mA) without feedback and obtain frequency response,
determine Gain, input and output impedances and find GBW.
2. Design a single stage CE amplifier using BJT with voltage divider bias
(Q-pt: 5V, 2mA) with feedback and obtain frequency response, determine
Gain, input and output impedance and find GBW.
3. Rig up a single stage BJT CE amplifier using voltage divider bias (Q-pt: 5V, 2mA)
with and without feedback and determine the GBW from its frequency response.
4. Design and set up a FWR with and without filter to determine ripple factor and
rectifier efficiency.
5. Design and set up a Bridge Rectifier with and without filter to determine ripple
factor and rectifier efficiency.
6. Conduct an experiment to test:
(i) Single ended diode clipping circuit.
(ii) Positive clamping circuit.
7. Conduct an experiment to test:
(i) Double ended diode clipping circuit.
(ii) Negative clamping circuit.
8. Conduct an experiment on series voltage regulator using Zener diode and power
transistor to determine line and load regulation characteristics.
9. Realize BJT Darlington Emitter Follower with and without Bootstrapping and
determine the gain, input and output impedances at f=10KHz.
10. Plot the transfer and drain characteristics of a JFET and calculate its drain
resistance, transconductance and amplification factor.
11. Design, setup and plot the frequency response of a common source JFET amplifier
and obtain the BW.
12. Plot the transfer and drain characteristics of an n-channel MOSFET and calculate
its drain resistance, transconductance and amplification factor.
13. Rig up the circuit of a complementary symmetry Class B Push-Pull amplifier and
calculate the efficiency.

14. Design and set up the Hartley’s Oscillator using BJT and determine the frequency
of oscillations
15. Design and set up the Colpitt’s Oscillator using BJT and determine the frequency
of oscillations
16. Design and set up the crystal oscillator and determine the frequency of
oscillations.
17. Design and set up the RC phase shift Oscillator using FET and calculate frequency
of output waveform.
18. Design and test the working of clipping circuit for the following transfer
characteristics:
19. Design and test clamping circuits which changes the positive peak to a level of:
(i) +2V
(ii) -2V
(iii) Vγ
20. Design and test clamping circuits which changes the negative peak to a level of:
(iv) +3V
(v) -3V
(vi) Vγ

Analog Electronics LAB MANUAL-2016 (Cbcs Scheme) : Rns Institute of Technology

Uploaded by

Copyright:

Available Formats

You might also like

Analog Electronics LAB MANUAL-2016 (Cbcs Scheme) : Rns Institute of Technology

Uploaded by

Document Information

Original Title

Copyright

Available Formats

Share this document

Share or Embed Document

Sharing Options

Did you find this document useful?

Is this content inappropriate?

Copyright:

Available Formats

Analog Electronics LAB MANUAL-2016 (Cbcs Scheme) : Rns Institute of Technology

Uploaded by

Copyright:

Available Formats

ANALOG ELECTRONICS

RNS INSTITUTE OF TECHNOLOGY

Department of ECE, RNS Institute of Technology. Page | 1

Department of ECE, RNS Institute of Technology. Page | 2

Department of ECE, RNS Institute of Technology. Page | 3

During the first half cycle

During first half cycle of the

Department of ECE, RNS Institute of Technology. Page | 4

Flow of current in Bridge Rectifier

During the second half cycle

Path of current in 2nd Half Cycle

Department of ECE, RNS Institute of Technology. Page | 5

Centre-Tap Full Wave Rectifier

Working of Centre-Tap Full Wave Rectifier

As shown in the figure, an AC input is applied to the primary coils of the

Department of ECE, RNS Institute of Technology. Page | 6

Centre-tap Full-wave Rectifier-Waveform

Full-wave Rectifier with Shunt Capacitor Filter

Department of ECE, RNS Institute of Technology. Page | 7

Full-wave Rectifier with Capacitor Filter

Full-wave Rectifier with

The load current reduces

Department of ECE, RNS Institute of Technology. Page | 8

Note: Formula to calculate theoretical 𝛾 = 1 4 3𝑓𝐶𝑅𝐿

Department of ECE, RNS Institute of Technology. Page | 9

Circuits 𝑉𝑟𝑝𝑝 𝑉𝑟𝑝𝑝 𝑉𝐷𝐶 𝑉𝑟,𝑟𝑚𝑠

Department of ECE, RNS Institute of Technology. Page | 10

Department of ECE, RNS Institute of Technology. Page | 11

Selection criterion for R or design of R

The value of R should be chosen as geometric mean of 𝑅𝑓 and 𝑅𝑟 of diode.

R = 𝑅𝑓 × 𝑅𝑟 Say, 𝑅𝑓 = 100Ω, 𝑅𝑟 = 1MΩ, then R = 10k

Department of ECE, RNS Institute of Technology. Page | 12

Circuits and waveforms:

Input Voltage Diode status Output Voltage

Input Voltage Diode status Output Voltage

Department of ECE, RNS Institute of Technology. Page | 13

Input Voltage 𝐷1 𝐷2 Output Voltage

Result: The waveforms have been observed and verified.

Aim: To design and study clamping circuits.

Department of ECE, RNS Institute of Technology. Page | 14

Clampers are very much used in communication systems for

a) Negative Clamper: Positive peak clamper Positive Reference

Department of ECE, RNS Institute of Technology. Page | 15

b) Positive clamper: Negative peak clamped to negative reference.

Department of ECE, RNS Institute of Technology. Page | 16

Department of ECE, RNS Institute of Technology. Page | 17

5. Which are the other names of clamping circuits?

9. What is positive clamping?

10. What is negative clamping?

Department of ECE, RNS Institute of Technology. Page | 18

11. What are the other names of clampers?

12. Why capacitors are used in clampers?

13. What is transient response?

A transient response is the response of a system to a change from an equilibrium or a

Department of ECE, RNS Institute of Technology. Page | 19

Department of ECE, RNS Institute of Technology. Page | 20

Zener Diode as Voltage Regulator:

Department of ECE, RNS Institute of Technology. Page | 21