Resume Builder: Silicon Validation Engineer Resume Samples

6/17/2019 Silicon Validation Engineer Resume Samples | Velvet Jobs
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(/resume/resume-samples?categories=Installation+and+Maintenance+and+Repair)  Silicon Validation
Engineer Resume Samples
Silicon Validation Engineer Resume Samples
 THE GUIDE TO RESUME TAILORING
Guide the recruiter to the conclusion that you are the best candidate for the silicon validation
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 Craft your perfect resume by picking job responsibilities written by professional recruiters
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 Tailor your resume by selecting wording that best fits for each job you apply
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Hailey Ruecker
17251 Maggio Canyon , Houston , TX ♦ Phone: +1 (555) 382 1219
https://www.velvetjobs.com/resume/silicon-validation-engineer-resume-sample 1/14
6/17/2019 EXPERIENCE DDR & SOC POST SILICON VALIDATION
Silicon Validation ENGINEER
Engineer Resume Samples | Velvet Jobs
Resume Builder
New York, NY
09/2016 – present
Minutescompliance
with Create a Resume (/resume-builder?utm_campaign=resume-
Validation of DDR4, DDR3, RLDRAM3, LPDDR4 and other memory protocols
Create a Resume in JEDEC testing of memory protocols
Professional ResumeWriting
Templates
firmware and validation test cases in C++ for SOC and memory interfaces
Bench automation, PVT and volume characterization to improve product quality Analyze test results and
identify potential issues, debug and root cause any silicon issues to improve quality and performance of circuits,
hard and soft IPs
Generate test plans and characterization reports for both internal and external customers to clearly illustrate
performance for key protocols/features/circuits
Publish Specs for EMIF and SOC IPs coordinating with cross-functional teams spanning IC Design, SW & IP,
Applications and Marketing for NPI
BSEE or related
SYSTEM LEVEL SILICON VALIDATION ENGINEER

San Francisco, CA
05/2011 – 08/2016
Computer architecture coursework is a plus
Develop methodology for automation of failure analysis
System data analysis and correlation to production testing
System level failure analysis to root cause the failures
BSEE or equivalent
Creating/Modifying/Improving infrastructure for System Level Testing
Define and design experimental electrical DOE test structures to assess design and process weak points in order
to ensure design rule/PDK and process flow robustness
POST-SILICON VALIDATION ENGINEER

Dallas, TX
01/2009 – 01/2011
Major: Electrical engineering or Communication Engineering or related
Work with SoC development team and platform team for trouble shooting of hardware and software issues
Component and System verification of ICs baseband, integrated baseband and application processor with full
responsibility for functional quality of SoC
Execution and Automation of TestCases to increase Test Coverage under different external conditions
Definition and implementation of test cases for functional verification (ASM/C-language)
Good team-work spirits
Definition and implementation of chip and system verification environment for ICs containing all peripherals
(i.e. SPI, MIPI, SIM Card controller, I2C, NAND flash controller, LPDDR1/2/3 controller...) and interfaces to
other ICs
EDUCATION UNIVERSITY OF SAN FRANCISCO

Bachelor’s Degree in Electrical
SKILLS Excellent Knowledge in Power Management & Mixed Signal ICs

Excellent language skills in verbal and written English
Experience in one or more scripting languages such as python, lua etc. or C/C++/Java, LabView/LabWindow
Hands-on Experience working in a lab environment, making power measurements and probing high speed
interfaces
Characterization/Validation of High Speed SERDES Experience is
Some experience in silicon bring-up and debugging is
Experience with the analog circuit characterization and digital design validation of integrated circuits
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1 Senior Post-silicon Validation Engineer

Resume Examples & Samples
 7+ years of Strong Hardware and Software Debugging Skills
 7+ years of programming experience in programming languages (C,python..)
 7+ experience in Embedded Software engineering
 5+ years of experience in Embedded Linux with emphasis on Driver Development
2 SOC Post Silicon Validation Engineer

 B.Sc. or M.Sc. in Computer, Software, and/or Electrical Engineering
 3+ years of experience with Hardware and Software Debugging Skills 3+years of experience
with Second and Third generation Low Power Double Data Rate (LPDDR2/3) SDRAM Controller
and Physical Layer Technologies
 3+ years of experience with USB Testing and Debug
 3+ years of experience with Programming in C/C++, Linux Shell Scripting, and Linux Kernel
Programming
 2+ years of experience in High Speed Oscilloscopes, Logic Analyzers, Data Acquisition

Tools/Hardware
 Good understanding of the Hardware Principle and Hardware Validation Capabilities; for
example, understand the Peripheral Programming from IC Datasheet and define Validation of
Aforementioned Features
 Knowledge of High Speed Oscilloscopes, Logic Analyzers, Data Acquisition Tools/Hardware

Experience with SOC Functional Power Measurements (Leakage, Standby, Dynamic, etc.)
 Experience with Power Control/Management Concepts
 Experience with ASIC Clock Generation Concepts
 Experience with Network on a Chip (NOC) and System on a Chip (SOC) Concepts and Drivers
 Experience with Image, Video, and Graphics Processing and Display Content Control Concepts
 Experience with Mobile Industry Processor Interface (MIPI) Physical Layer Technology
 Experience with U-Boot Development Environment
 Experience with Processor Emulation Tools (preferably Lauterbach) and Scripting, specifically in
the context of Trace and Debug
6/17/2019
 Experience with Secure DigitalSilicon
MMC, embedded
Validation EngineerMMC,
Resumeand Secure
Samples Digital
| Velvet Jobs I/O
Resume Builder
(SDMMC/eMMC/SDIO) Technologies
Experience with Perl, Python, and LabVIEW
Professional Resume Templates
3 SOC Post Silicon Validation Engineer

 5+ years (with B.Sc.) or 3+ years (with M.Sc.) experience with ASIC Validation
 3+ years of experience with Second and Third Generation Low Power Double Data Rate
(LPDDR2/3) SDRAM Controller and Physical Layer Technologies
 3+ years of experience with Hardware and Software Debugging
 3+ years of experience with Hardware Principle and Hardware Validation capabilities; for
example, understanding Peripheral Programming from IC Datasheet and Define Validation of
 Experience with SOC Functional Power Measurements (Leakage, Standby, Dynamic, etc.)
 Experience with Boot-Code (preferably U-Boot)
 Experience with Secure Digital MMC, Embedded MMC, and Secure Digital I/O
(SDMMC/eMMC/SDIO) Technologies
 Knowledge of High Speed Oscilloscopes, Logic Analyzers, Data Acquisition Tools/Hardware
 Must be team player, able to work independently, quick learner, problem solver
4 Post-silicon Validation Engineer

 3+ years of experience with SOC Functional Power Measurements (Leakage, Standby,

Dynamic, etc.); with Power Control/Management Concepts
 3+ years of experience Programming in C/C++
 3+ years of experience with Linux Shell Scripting, Linux Kernel Programming; and with Boot-
Code (preferably U-Boot)
 3+ years of experience in Hardware and Software Debugging
 3+ years of experience with Hardware Principle and Hardware Validation; for example,
understand the Peripheral Programming from IC Datasheet and define Validation of
 Experience with System Control Unit Concepts
 Experience with Processor Emulation Tools (preferably Lauterbach) and Scripting
 Experience with Programming Perl, Python, LabVIEW
 Experience with Source Repository Systems - Git and ClearCase
Post-silicon Validation Engineer
5 Resume Builder
 B.Sc. or M.Sc. in Computer, Software, and/or Electrical Engineering; or Computer Science
 5+ years (with B.Sc.) or 3 years (with M.Sc.) experience with ASIC Validation
 3+ years of experience with SOC Functional Power Measurements (Leakage, Standby,

Dynamic, etc.); with Power Control/Management concepts; with programming in C/C++, Linux
shell scripting, and Linux kernel programming; and with boot-code (preferably U-Boot)
 3+ years of strong Hardware and Software Debugging Skills
 3+ years of the Hardware Principle and Hardware Validation Capabilities; for example,
understand the Peripheral Programming from IC datasheet and define validation of
aforementioned features
 Experience with ASIC Clock generation concepts
 Experience with System Control Unit concepts

 Definition and implementation of chip and system verification environment for ICs containing
all peripherals (i.e. SPI, MIPI, SIM Card controller, I2C, NAND flash controller, LPDDR1/2/3
controller...) and interfaces to other ICs
 Development of a Hardware Abstraction Layer, Low Level Drivers and Libraries for ICs
 Definition and implementation of test cases for functional verification (ASM/C-language)
 Work with SoC development team and platform team for trouble shooting of hardware and
software issues
 Execution and Automation of TestCases to increase Test Coverage under different external
conditions
 Minimum of 5, preferably 7 years' experiences in SoC validation/development or in embedded

Linux/ RTOS development
 Good understanding of the hardware principle and hardware validation capabilities
 Good understanding of ARM/X86 architecture and proficient in ASM/C-language programming
 Major: Electrical engineering or Communication Engineering or related
 Good at reading, writing and speaking English skills
 Good team-work spirits
7 Silicon Validation Engineer

6/17/2019
 You should possess BSc or MSc in Computer
Silicon Science
Validation Engineer or Computer
Resume Engineering
Samples | Velvet Jobs or Electrical
Resume Builder
Engineering
Experience in the following areas will be an advantage
 Very comfortable with various operating systems: Windows and Linux
 Familiar with Networking protocols - Ethernet and TCP/IP
 Familiar with SoC integration
 Good Communication skills (Hebrew and English)
8 GPU Silicon Validation Engineer

 10 plus years of experience in silicon validation in a system environment
 Strong experience debugging complex, multi-master SOC hardware and software
 Strong experience in C-programming
 Strong scripting skills (e.g., TCL, Expect, Python, Bash)
 Strong written and verbal communication skills and organizational abilities
 Results oriented with emphasis on measurement and continuous improvement
 Proven track record of delivering product on time
 Lab skills (operation of lab equipment, interested and able to work in the lab)
 Ability to work well on a team, but to be responsible and self-driven
 Strong understanding of GPU Architecture a plus
 Strong experience in C++-programming a plus
 Strong experience in GPU firmware, drivers, or software a plus
9 DDR & SoC Post Silicon Validation Engineer

 Validation of DDR4, DDR3, RLDRAM3, LPDDR4 and other memory protocols
 JEDEC compliance testing of memory protocols
 Writing firmware and validation test cases in C++ for SOC and memory interfaces
 Bench automation, PVT and volume characterization to improve product quality Analyze test
results and identify potential issues, debug and root cause any silicon issues to improve quality
and performance of circuits, hard and soft IPs
 Defining DFT/DFX features for next generation products to enable debug access to complex
circuits to enable characterization
 Generate test plans and characterization reports for both internal and external customers to
clearly illustrate performance for key protocols/features/circuits
6/17/2019
 Publish Specs for EMIF and SOC IPsValidation
Silicon coordinating
Engineer with cross-functional
Resume teams spanning IC
Samples | Velvet Jobs
Resume
Design, SWBuilder
& IP, Applications and Marketing for NPI
BSEE or related
 3 years of experience in a post silicon validation role (in SOC, memory interfaces, or related)
 Experience with memory interface protocols such as DDR3/4, LPDDR3/4, RLDRAM2/3, QDR
 Experience with board design
 MSEE or related
 5+ years of experience in related role
 Experience with signal and power integrity concepts
 Experience in RTL design for FPGAs, scripting languages and bench automation
 Experience in C++ and TCL

 Work with Technology Enablement, DM, PI and Yield engineering teams to understand and
validate technology design rules and prevalent process/design driven fail modes
 Define and design experimental electrical DOE test structures to assess design and process
weak points in order to ensure design rule/PDK and process flow robustness
 Perform detailed Si validation analysis for the process bring-up at the manufacturing facility.
Analyze test structure data to investigate systematic design driven yield and performance
detractors, followed by root cause analysis and understanding
 Compile Si validation reports and communicate Si analysis results to the multiple design and
process development engineering teams
 Drive Si validation of critical process and design fail modes to ensure product manufacturability
and customer satisfaction
 BS in Electrical Engineering, Materials Science, Solid State Physics, or other relevant

engineering discipline
 MS or PhD in Electrical Engineering, Materials Science, Solid State Physics, or other relevant
engineering discipline
 1 year Semiconductor industry experience in device, process integration or unit process areas
preferred
 Hand-on processes integration, device or design experience in advanced technology nodes

(14nm and below)
 Strong layout and design tool experience and good understanding of process and design
layout interactions
 Understanding on process and design layout interaction, FMEA methodology
 Design for manufacturing experience and programming skills are desirable
6/17/2019
 Understanding of semiconductor fabrication
Silicon process,
Validation Engineer semiconductor
Resume Samples | Velvetdevices
Jobs and DOE
Resume Builder
methodology
Familiarity with design, physical layout tools, experience with Cadence Virtuoso layout
generation
 Strong data analysis, data mining and problem solving skills. Experience with statistical data
analysis packages like JMP
 Strong interpersonal skills; team player; able to work effectively in a dynamic, fast paced
environment
11 Senior Silicon Validation Engineer

 Experience with the analog circuit characterization and digital design validation of integrated
circuits
 Excellent Knowledge in Power Management & Mixed Signal ICs
 Hands-on Experience working in a lab environment, making power measurements and probing
high speed interfaces
 Experience in one or more scripting languages such as python, lua etc. or C/C++/Java,
LabView/LabWindow
 Characterization/Validation of High Speed SERDES Experience is a plus
 Some experience in silicon bring-up and debugging is a plus
 Excellent language skills in verbal and written English
12 Silicon Validation Engineer Intern

 Presently pursuing a degree in Electrical Engineering, Computer Science, Engineering Physics,

or similar
 3+ months experience with the "C" programming language
 3+ months experience with the Python Scripting language
 3+ months experience with Verilog or VHDL
 3+ months experience with typical lab equipment: Oscilloscopes, Logic analyzers, protocol
analyzers, power supplies, etc
 Ability to work effectively within diverse teams
13 Processor SOC Post-silicon Validation Engineer

Resume
You will be Builder
working on complex processor SOCs
Create
Youawill
Resume
workinin
Minutes with and maintaining a Xilinx instruction based random test system to
debugging
ensure high quality of processor SOCs
 BSc./MSc. in Computer Science, Computer Engineering, or Electrical Engineering
 3+ years of hands on experience with Processor Random Test methodologies in SOCs
 Embedded coding in C and Assembly Language with knowledge of processor micro-

architecture
 Detailed oriented and good debugging skills
 Strong communication skills and ability to work independently in a large team
 Able to effectively work across multiple functional teams, different geographies, and
organizations
 Knowledge of ARM v8 instruction set and architecture is a plus
 Knowledge and expertise in CPU mechanism such as caches, TLBs, DMA, out-of-order
execution, virtual memory etc
 Knowledge of Xilinx Vivado flow, like IPI (IP Integrator), is a plus

 Component and System verification of ICs baseband, integrated baseband and application
processor with full responsibility for functional quality of SoC
 Definition and implementation of chip and system verification environment for ICs containing
all peripherals i.e. SPI, MIPI, SIM Card controller, I2C, NAND flash controller, LPDDR1/2/3
controller... and interfaces to other ICs
 Definition and implementation of test cases for functional verification ASM/C-language
 Execution and Automation of Test Cases to increase Test Coverage under different external
conditions
 Minimum of 5, preferably 7 years' experiences in SoC validation/development or in the

embedded Linux/RTOS
 Bachelor degree or above with majors of Electrical engineering or Communication Engineering

or related
15 System Level Silicon Validation Engineer

 Creating/Modifying/Improving infrastructure for System Level Testing
 System level failure analysis to root cause the failures

6/17/2019
 Develop methodology for automation of failure
Silicon Validation analysis
Engineer Resume Samples | Velvet Jobs
Resume Builder
System data analysis and correlation to production testing
Professional
Computer Resume Templatescoursework is a plus
architecture
 Familiarity with Python or Perl is required
16 Digital Circuit Silicon Validation Engineer

 Responsible for digital circuit design verification on silicon chips
 Post-silicon test for MCU/MPU chips, and the modules/blocks in the chips
 Work on customer support tasks if needed
17 SoC Post-silicon Validation Engineer

 MS in Electrical or Computer Engineering with 0-2 experience
 Thorough understanding of computer architecture concepts, including CPU, DSP, memory

hierarchy, multiprocessing, etc.System validation and/or verification/AV and/or post silicon
validation and experience with Linux OS is desiredGood experience with
C/C++/Perl/TCL/Python Scripting in BASH, Python
 Ruby or similar runtime scripting languages familiarity with Hardware verification languages
HVL like SystemVerilog testbench and SystemC Hardware description languages HDL, Verilog
and SystemVerilogInternship experience on post silicon validation, system integration, hands-
on debugging in lab both silicon and on emulation platforms, performance and power analysis
across relevant use cases
 Familiarity in SOC troubleshooting, include hands-on experience with schematics, layout and
post silicon debug and real time debugging tools like logic analyzer,
 Benchmarks and workloads
 DS-5 and Lauterbach
18 Nand Senior Silicon Validation Engineer

 Minimum of 8 years of experience with Verilog / System Verilog design and validation
 Minimum of 8 years of experience with High level programming language such as C++, perl,
tcl, python
 Minimum of 8 years of experience in Logic and or Mixed signal design and verification
6/17/2019
 Minimum of 8 years of experience
Siliconin Semiconductor
Validation Device
Engineer Resume Physics
Samples | Velvet Jobs
Resume
Minimum ofBuilder
8 years of experience with CMOS circuit / analog circuit design and validation
Professional
MinimumResume Templates
of 8 years of experience with NAND 2D or 3D Flash or NOR Flash or Non-Volatile
Memory Experience in Test Mode validation, 1st silicon bring up working with product
engineers PE is a must
 Detailed understanding of NAND 2D or 3D Flash or NOR Flash user mode read and write
algorithms and ucode
 Trained in MOSAid, Advantest testers
 Experience in HVM High Volume Mfg
 Experience with the physical design engineering of NAND / NOR / NVM
19 System & Silicon Validation Engineer

 ➢MSEE in power electronics with 6+ years experience
 ➢Strong principles, design, and testing with DC-DC, AC-DC and DC-AC converters
 ➢Experience with bench equipment such as power supply, oscilloscope, signal generator,
electronic load, spectrum analyzer, etc
 ➢Use LabVIEW, Python, device drivers, GPIB, USB, I2C, SPI, and UART interfaces, etc. is
strongly preferred
 ➢Working knowledge with finite state machine (FSM), digital design and verification is a plus
 ➢Ability to work with development team directly to establish project requirements and
develop test plan
 ➢Ability to complete projects independently with minimal supervision
 ➢Exposure to both Windows and MacOS operating systems preferred
 ➢Strong analytical/problem solving skills and ability to guide critical decisions
 ➢Must be highly motivated, self-starter with innovation, integrity and attention to details
 ➢Proven track record of working in fast paced innovative work environment

 Exposures to post-Silicon validation, silicon bringup, testing/debug/root cause of circuit

marginalities, product engineering, foundry manufacturing, etc
 Understanding test execution through both functional mode and DFX hooks
 Strong scripting skills in one of the major languages: eg. Perl, python, Tcl, bash
 System level understanding of CPU/SoC architecture, Memories (DDR, NAND), Systems

6/17/2019
 Good data analysis skills and attention to details
Silicon Validation Engineer Resume Samples | Velvet Jobs
Resume Builder
Nice-to-haves (in at least one and preferably several)
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Professional Resume
Chip design Templates in circuit/physical design (timing closure, power, etc.) or DV
background
(correlating SW signatures to block level tests)
 Post silicon physical debug background in speed-path/Vmin, memory arrays, clocking or yield
improvements
 Post silicon logic debug background in exercising various DFX features, analyzing
scandump/memdump, suggesting tests in both system level or to DV
 Good understanding of boot process, boot-loaders, embedded software, micro-kernel and able
to tweak system tests
 Product engineering background and familiarity with ATE coverage, margin, binning, scan
pattern generation, etc
 Good IP knowledge in some PHY blocks (eg. DDR, PCIe, USB, etc)
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6/17/2019 Silicon Validation Engineer Resume Samples | Velvet Jobs

Resume Samples (/resume/resume-samples)  Installation and Maintenance and Repair

Silicon Validation Engineer Resume Samples

 THE GUIDE TO RESUME TAILORING

Create a Resume in Minutes (/resume-builder?utm_campaign=resume-

SYSTEM LEVEL SILICON VALIDATION ENGINEER

POST-SILICON VALIDATION ENGINEER

EDUCATION UNIVERSITY OF SAN FRANCISCO

SKILLS Excellent Knowledge in Power Management & Mixed Signal ICs

 Create a Resume (/resume-builder?utm_campaign=resume-

1 Senior Post-silicon Validation Engineer

 7+ years of Strong Hardware and Software Debugging Skills

 7+ years of programming experience in programming languages (C,python..)

 7+ experience in Embedded Software engineering

 5+ years of experience in Embedded Linux with emphasis on Driver Development

2 SOC Post Silicon Validation Engineer

 B.Sc. or M.Sc. in Computer, Software, and/or Electrical Engineering

 3+ years of experience with USB Testing and Debug

 2+ years of experience in High Speed Oscilloscopes, Logic Analyzers, Data Acquisition

 Knowledge of High Speed Oscilloscopes, Logic Analyzers, Data Acquisition Tools/Hardware

 Experience with Power Control/Management Concepts

 Experience with ASIC Clock Generation Concepts

 Experience with U-Boot Development Environment

3 SOC Post Silicon Validation Engineer

 3+ years of experience with Hardware and Software Debugging

 Experience with Boot-Code (preferably U-Boot)

 Knowledge of High Speed Oscilloscopes, Logic Analyzers, Data Acquisition Tools/Hardware

4 Post-silicon Validation Engineer

 3+ years of experience with SOC Functional Power Measurements (Leakage, Standby,

 3+ years of experience Programming in C/C++

 3+ years of experience in Hardware and Software Debugging

 Experience with System Control Unit Concepts

 Experience with Processor Emulation Tools (preferably Lauterbach) and Scripting

 Experience with Programming Perl, Python, LabVIEW

 Experience with Source Repository Systems - Git and ClearCase

 B.Sc. or M.Sc. in Computer, Software, and/or Electrical Engineering; or Computer Science

 3+ years of experience with SOC Functional Power Measurements (Leakage, Standby,

 3+ years of strong Hardware and Software Debugging Skills

 Experience with ASIC Clock generation concepts

 Experience with System Control Unit concepts

6 Post-silicon Validation Engineer

 Definition and implementation of test cases for functional verification (ASM/C-language)

 Minimum of 5, preferably 7 years' experiences in SoC validation/development or in embedded

 Good understanding of the hardware principle and hardware validation capabilities

 Good understanding of ARM/X86 architecture and proficient in ASM/C-language programming

 Major: Electrical engineering or Communication Engineering or related

 Good at reading, writing and speaking English skills

 Good team-work spirits

7 Silicon Validation Engineer

 Familiar with Networking protocols - Ethernet and TCP/IP

 Familiar with SoC integration

 Good Communication skills (Hebrew and English)

8 GPU Silicon Validation Engineer

 10 plus years of experience in silicon validation in a system environment

 Strong experience debugging complex, multi-master SOC hardware and software

 Strong experience in C-programming

 Strong scripting skills (e.g., TCL, Expect, Python, Bash)

 Strong written and verbal communication skills and organizational abilities

 Results oriented with emphasis on measurement and continuous improvement

 Proven track record of delivering product on time

 Ability to work well on a team, but to be responsible and self-driven

 Strong understanding of GPU Architecture a plus

 Strong experience in C++-programming a plus